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gerrit-public.fairphone.software / platform / external / XNNPACK / b559fe9f2d5a3271545b6ca601da842883f9ed4f / . / CMakeLists.txt
blob: d7048929ca426aa91c8d446abc5d1a0858b89152 [file] [log] [blame]
Frank Barcharda49e41f2021-08-31 20:30:24 -0700[diff] [blame]1
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2# Copyright (c) Facebook, Inc. and its affiliates.
3# All rights reserved.
4#
5# Copyright 2019 Google LLC
6#
7# This source code is licensed under the BSD-style license found in the
8# LICENSE file in the root directory of this source tree.
9
10CMAKE_MINIMUM_REQUIRED(VERSION 3.5 FATAL_ERROR)
11
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]12# ---[ Project and semantic versioning.
13PROJECT(XNNPACK C CXX ASM)
14
15# ---[ Options.
16SET(XNNPACK_LIBRARY_TYPE "default" CACHE STRING "Type of library (shared, static, or default) to build")
17SET_PROPERTY(CACHE XNNPACK_LIBRARY_TYPE PROPERTY STRINGS default static shared)
Marat Dukhanefc184a2020-02-13 09:47:01 -0800[diff] [blame]18OPTION(XNNPACK_ENABLE_ASSEMBLY "Build XNNPACK with assembly micro-kernels" ON)
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]19OPTION(XNNPACK_ENABLE_MEMOPT "Build XNNPACK with optimized memory allocation scheme" ON)
Marat Dukhanb36582b2020-12-08 11:16:28 -0800[diff] [blame]20OPTION(XNNPACK_ENABLE_SPARSE "Build XNNPACK with graph rewriting for sparse inference" ON)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]21OPTION(XNNPACK_BUILD_TESTS "Build XNNPACK unit tests" ON)
22OPTION(XNNPACK_BUILD_BENCHMARKS "Build XNNPACK benchmarks" ON)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]23OPTION(XNNPACK_USE_SYSTEM_LIBS "Use system-provided dependency libraries" OFF)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]24
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]25# --- [ Determine target processor
26SET(XNNPACK_TARGET_PROCESSOR "${CMAKE_SYSTEM_PROCESSOR}")
Chester Liu25bab072020-12-24 17:07:10 +0800[diff] [blame]27IF(CMAKE_SYSTEM_NAME STREQUAL "Darwin" AND CMAKE_OSX_ARCHITECTURES MATCHES "^(x86_64|arm64|arm64e)$")
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]28 SET(XNNPACK_TARGET_PROCESSOR "${CMAKE_OSX_ARCHITECTURES}")
29ENDIF()
30
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]31# ---[ CMake options
Marat Dukhanbcbae1e2020-04-13 10:54:18 -0700[diff] [blame]32INCLUDE(GNUInstallDirs)
33
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]34IF(XNNPACK_BUILD_TESTS)
35 ENABLE_TESTING()
36ENDIF()
37
Marat Dukhanefc184a2020-02-13 09:47:01 -0800[diff] [blame]38IF(XNNPACK_ENABLE_ASSEMBLY)
39 ADD_DEFINITIONS(-DXNN_ENABLE_ASSEMBLY=1)
40ELSE()
41 ADD_DEFINITIONS(-DXNN_ENABLE_ASSEMBLY=0)
42ENDIF()
43
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]44IF(XNNPACK_ENABLE_MEMOPT)
45 ADD_DEFINITIONS(-DXNN_ENABLE_MEMOPT=1)
46ELSE()
47 ADD_DEFINITIONS(-DXNN_ENABLE_MEMOPT=0)
48ENDIF()
49
Marat Dukhanb36582b2020-12-08 11:16:28 -0800[diff] [blame]50IF(XNNPACK_ENABLE_SPARSE)
51 ADD_DEFINITIONS(-DXNN_ENABLE_SPARSE=1)
52ELSE()
53 ADD_DEFINITIONS(-DXNN_ENABLE_SPARSE=0)
54ENDIF()
55
Marat Dukhan8a9be592020-05-09 21:49:19 -0700[diff] [blame]56IF(CMAKE_C_COMPILER_ID STREQUAL "MSVC")
Marat Dukhan1b555e02020-04-14 22:40:29 -0700[diff] [blame]57 # Disable "unary minus operator applied to unsigned type, result still unsigned" warning
58 ADD_COMPILE_OPTIONS("/wd4146")
59ENDIF()
60
Marat Dukhan8a9be592020-05-09 21:49:19 -0700[diff] [blame]61IF(CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
62 # Disable "note: parameter passing for argument of type ... changed/will change in ..."
63 ADD_COMPILE_OPTIONS("-Wno-psabi")
64ENDIF()
65
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]66# ---[ Build flags
67IF(NOT CMAKE_SYSTEM_PROCESSOR)
68 IF(IOS)
69 LIST(LENGTH IOS_ARCH IOS_ARCH_COUNT)
70 IF(IOS_ARCH_COUNT GREATER 1)
71 MESSAGE(FATAL_ERROR "Unsupported XNNPACK build with multiple iOS architectures (${IOS_ARCH}). "
72 "Specify a single architecture in IOS_ARCH and re-configure. ")
73 ENDIF()
Yasuhiro Matsumoto462be052020-02-29 13:41:14 +0900[diff] [blame]74 IF(NOT IOS_ARCH MATCHES "^(i386|x86_64|AMD64|armv7.*|arm64.*)$")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]75 MESSAGE(FATAL_ERROR "Unrecognized IOS_ARCH = ${IOS_ARCH}")
76 ENDIF()
77 ELSE()
78 MESSAGE(FATAL_ERROR "CMAKE_SYSTEM_PROCESSOR is not defined")
79 ENDIF()
Marat Dukhane3cb19b2021-05-07 03:38:49 -0700[diff] [blame]80ELSEIF(NOT XNNPACK_TARGET_PROCESSOR MATCHES "^(i[3-6]86|x86|x86_64|AMD64|armv[5-8].*|aarch64|arm64.*|riscv(32|64|128))$")
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]81 MESSAGE(FATAL_ERROR "Unrecognized XNNPACK_TARGET_PROCESSOR = ${XNNPACK_TARGET_PROCESSOR}")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]82ENDIF()
83
84IF(NOT CMAKE_SYSTEM_NAME)
85 MESSAGE(FATAL_ERROR "CMAKE_SYSTEM_NAME not defined")
Marat Dukhan78583c72020-04-26 22:00:43 -0700[diff] [blame]86ELSEIF(NOT CMAKE_SYSTEM_NAME MATCHES "^(Darwin|Linux|Android|Windows|CYGWIN|MSYS)$")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]87 MESSAGE(FATAL_ERROR "Unrecognized CMAKE_SYSTEM_NAME = ${CMAKE_SYSTEM_NAME}")
88ENDIF()
89
90# ---[ Download deps
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]91IF(NOT XNNPACK_USE_SYSTEM_LIBS)
92 IF(NOT DEFINED CLOG_SOURCE_DIR)
93 MESSAGE(STATUS "Downloading clog to ${CMAKE_BINARY_DIR}/clog-source (define CLOG_SOURCE_DIR to avoid it)")
94 CONFIGURE_FILE(cmake/DownloadCLog.cmake "${CMAKE_BINARY_DIR}/clog-download/CMakeLists.txt")
95 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
96 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/clog-download")
97 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
98 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/clog-download")
99 SET(CLOG_SOURCE_DIR "${CMAKE_BINARY_DIR}/clog-source" CACHE STRING "clog source directory")
100 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]101
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]102 IF(NOT DEFINED CPUINFO_SOURCE_DIR)
103 MESSAGE(STATUS "Downloading cpuinfo to ${CMAKE_BINARY_DIR}/cpuinfo-source (define CPUINFO_SOURCE_DIR to avoid it)")
104 CONFIGURE_FILE(cmake/DownloadCpuinfo.cmake "${CMAKE_BINARY_DIR}/cpuinfo-download/CMakeLists.txt")
105 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
106 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/cpuinfo-download")
107 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
108 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/cpuinfo-download")
109 SET(CPUINFO_SOURCE_DIR "${CMAKE_BINARY_DIR}/cpuinfo-source" CACHE STRING "cpuinfo source directory")
110 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]111
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]112 IF(NOT DEFINED FP16_SOURCE_DIR)
113 MESSAGE(STATUS "Downloading FP16 to ${CMAKE_BINARY_DIR}/FP16-source (define FP16_SOURCE_DIR to avoid it)")
114 CONFIGURE_FILE(cmake/DownloadFP16.cmake "${CMAKE_BINARY_DIR}/FP16-download/CMakeLists.txt")
115 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
116 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FP16-download")
117 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
118 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FP16-download")
119 SET(FP16_SOURCE_DIR "${CMAKE_BINARY_DIR}/FP16-source" CACHE STRING "FP16 source directory")
120 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]121
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]122 IF(NOT DEFINED FXDIV_SOURCE_DIR)
123 MESSAGE(STATUS "Downloading FXdiv to ${CMAKE_BINARY_DIR}/FXdiv-source (define FXDIV_SOURCE_DIR to avoid it)")
124 CONFIGURE_FILE(cmake/DownloadFXdiv.cmake "${CMAKE_BINARY_DIR}/FXdiv-download/CMakeLists.txt")
125 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
126 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FXdiv-download")
127 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
128 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FXdiv-download")
129 SET(FXDIV_SOURCE_DIR "${CMAKE_BINARY_DIR}/FXdiv-source" CACHE STRING "FXdiv source directory")
130 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]131
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]132 IF(NOT DEFINED PTHREADPOOL_SOURCE_DIR)
133 MESSAGE(STATUS "Downloading pthreadpool to ${CMAKE_BINARY_DIR}/pthreadpool-source (define PTHREADPOOL_SOURCE_DIR to avoid it)")
134 CONFIGURE_FILE(cmake/DownloadPThreadPool.cmake "${CMAKE_BINARY_DIR}/pthreadpool-download/CMakeLists.txt")
135 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
136 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/pthreadpool-download")
137 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
138 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/pthreadpool-download")
139 SET(PTHREADPOOL_SOURCE_DIR "${CMAKE_BINARY_DIR}/pthreadpool-source" CACHE STRING "pthreadpool source directory")
140 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]141
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]142 IF(XNNPACK_BUILD_TESTS AND NOT DEFINED GOOGLETEST_SOURCE_DIR)
143 MESSAGE(STATUS "Downloading Google Test to ${CMAKE_BINARY_DIR}/googletest-source (define GOOGLETEST_SOURCE_DIR to avoid it)")
144 CONFIGURE_FILE(cmake/DownloadGoogleTest.cmake "${CMAKE_BINARY_DIR}/googletest-download/CMakeLists.txt")
145 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
146 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googletest-download")
147 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
148 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googletest-download")
149 SET(GOOGLETEST_SOURCE_DIR "${CMAKE_BINARY_DIR}/googletest-source" CACHE STRING "Google Test source directory")
150 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]151
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]152 IF(XNNPACK_BUILD_BENCHMARKS AND NOT DEFINED GOOGLEBENCHMARK_SOURCE_DIR)
153 MESSAGE(STATUS "Downloading Google Benchmark to ${CMAKE_BINARY_DIR}/googlebenchmark-source (define GOOGLEBENCHMARK_SOURCE_DIR to avoid it)")
154 CONFIGURE_FILE(cmake/DownloadGoogleBenchmark.cmake "${CMAKE_BINARY_DIR}/googlebenchmark-download/CMakeLists.txt")
155 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
156 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googlebenchmark-download")
157 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
158 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googlebenchmark-download")
159 SET(GOOGLEBENCHMARK_SOURCE_DIR "${CMAKE_BINARY_DIR}/googlebenchmark-source" CACHE STRING "Google Benchmark source directory")
160 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]161ENDIF()
162
163# ---[ XNNPACK library
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]164SET(OPERATOR_SRCS
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]165 src/operators/argmax-pooling-nhwc.c
166 src/operators/average-pooling-nhwc.c
167 src/operators/binary-elementwise-nd.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]168 src/operators/channel-shuffle-nc.c
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]169 src/operators/constant-pad-nd.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]170 src/operators/convolution-nchw.c
171 src/operators/convolution-nhwc.c
172 src/operators/deconvolution-nhwc.c
Marat Dukhan13b68f22020-11-12 11:55:19 -0800[diff] [blame]173 src/operators/depth-to-space-nchw2nhwc.c
Marat Dukhan0e521172020-11-25 13:10:04 -0800[diff] [blame]174 src/operators/depth-to-space-nhwc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]175 src/operators/fully-connected-nc.c
176 src/operators/global-average-pooling-ncw.c
177 src/operators/global-average-pooling-nwc.c
Marat Dukhanf6c991e2021-09-09 01:10:40 -0700[diff] [blame]178 src/operators/lut-elementwise-nc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]179 src/operators/max-pooling-nhwc.c
180 src/operators/prelu-nc.c
Artsiom Ablavatski97918102020-10-27 15:52:59 -0700[diff] [blame]181 src/operators/resize-bilinear-nchw.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]182 src/operators/resize-bilinear-nhwc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]183 src/operators/softmax-nc.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]184 src/operators/unary-elementwise-nc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]185 src/operators/unpooling-nhwc.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]186
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]187SET(SUBGRAPH_SRCS
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]188 src/subgraph/abs.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]189 src/subgraph/add2.c
190 src/subgraph/argmax-pooling-2d.c
191 src/subgraph/average-pooling-2d.c
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]192 src/subgraph/bankers-rounding.c
Im Sunghoonea2088b2020-06-15 03:17:07 +0900[diff] [blame]193 src/subgraph/ceiling.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]194 src/subgraph/clamp.c
Marat Dukhan20483c72021-12-05 09:56:40 -0800[diff] [blame]195 src/subgraph/convert.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]196 src/subgraph/convolution-2d.c
197 src/subgraph/deconvolution-2d.c
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -0800[diff] [blame]198 src/subgraph/depth-to-space.c
Frank Barchard9cef5ea2020-11-18 14:52:08 -0800[diff] [blame]199 src/subgraph/depthwise-convolution-2d.c
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]200 src/subgraph/divide.c
Marat Dukhana1600202020-12-01 22:17:16 -0800[diff] [blame]201 src/subgraph/elu.c
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]202 src/subgraph/floor.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]203 src/subgraph/fully-connected.c
Marat Dukhana059b7d2020-06-11 11:41:27 -0700[diff] [blame]204 src/subgraph/global-average-pooling-2d.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]205 src/subgraph/hardswish.c
Marat Dukhan5bbebac2020-06-10 19:42:15 -0700[diff] [blame]206 src/subgraph/leaky-relu.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]207 src/subgraph/max-pooling-2d.c
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]208 src/subgraph/maximum2.c
209 src/subgraph/minimum2.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]210 src/subgraph/multiply2.c
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]211 src/subgraph/negate.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]212 src/subgraph/prelu.c
213 src/subgraph/sigmoid.c
214 src/subgraph/softmax.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]215 src/subgraph/square-root.c
216 src/subgraph/square.c
217 src/subgraph/squared-difference.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]218 src/subgraph/static-constant-pad.c
Marat Dukhand27202d2020-07-09 23:43:40 -0700[diff] [blame]219 src/subgraph/static-reshape.c
Marat Dukhanaff24e22020-07-23 01:43:58 -0700[diff] [blame]220 src/subgraph/static-resize-bilinear-2d.c
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]221 src/subgraph/subtract.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]222 src/subgraph/unpooling-2d.c)
223
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]224SET(LOGGING_SRCS
Marat Dukhanccd3a1d2021-03-29 16:03:12 -0700[diff] [blame]225 src/datatype-strings.c
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]226 src/operator-strings.c
227 src/subgraph-strings.c)
228
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]229SET(COLD_SRCS ${OPERATOR_SRCS} ${SUBGRAPH_SRCS} ${LOGGING_SRCS})
230LIST(APPEND COLD_SRCS
Marat Dukhan496389f2021-04-07 15:47:12 -0700[diff] [blame]231 src/allocator.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]232 src/init.c
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]233 src/memory-planner.c
Marat Dukhan98ca6352020-02-03 12:53:02 -0800[diff] [blame]234 src/operator-delete.c
235 src/runtime.c
236 src/subgraph.c
237 src/tensor.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]238
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]239SET(HOT_SRCS
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]240 src/indirection.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]241 src/operator-run.c
242 src/packing.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]243
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]244SET(TABLE_SRCS
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]245 src/tables/exp2-k-over-64.c
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700[diff] [blame]246 src/tables/exp2-k-over-2048.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]247 src/tables/exp2minus-k-over-4.c
248 src/tables/exp2minus-k-over-8.c
Marat Dukhan79fd7302020-11-28 22:24:06 -0800[diff] [blame]249 src/tables/exp2minus-k-over-16.c
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700[diff] [blame]250 src/tables/exp2minus-k-over-64.c
251 src/tables/exp2minus-k-over-2048.c)
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]252
Zhi An Ngb559fe92021-12-06 09:25:38 -0800[diff] [blame^]253SET (JIT_SRCS
254 src/jit/aarch32-assembler.cc)
255
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]256SET(PROD_SCALAR_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]257 src/f16-f32-vcvt/gen/vcvt-scalar-float-x1.c
258 src/f16-f32-vcvt/gen/vcvt-scalar-float-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]259 src/f32-argmaxpool/4x-scalar-c1.c
260 src/f32-argmaxpool/9p8x-scalar-c1.c
261 src/f32-argmaxpool/9x-scalar-c1.c
262 src/f32-avgpool/9p8x-minmax-scalar-c1.c
263 src/f32-avgpool/9x-minmax-scalar-c1.c
264 src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c
265 src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c
266 src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]267 src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]268 src/f32-dwconv/gen/up1x3-scalar-acc2.c
Frank Barchard66ae2572021-11-02 17:36:21 -0700[diff] [blame]269 src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]270 src/f32-dwconv/gen/up1x4-scalar-acc2.c
271 src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c
272 src/f32-dwconv/gen/up1x9-scalar-acc2.c
273 src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c
274 src/f32-dwconv/gen/up1x25-scalar-acc2.c
275 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c
276 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c
277 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c
278 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c
279 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c
280 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c
281 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c
282 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]283 src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x4.c
284 src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]285 src/f32-gavgpool-cw/scalar-x1.c
286 src/f32-gavgpool/7p7x-minmax-scalar-c1.c
287 src/f32-gavgpool/7x-minmax-scalar-c1.c
288 src/f32-gemm/gen/1x4-minmax-scalar.c
289 src/f32-gemm/gen/1x4-relu-scalar.c
290 src/f32-gemm/gen/1x4-scalar.c
291 src/f32-gemm/gen/2x4-minmax-scalar.c
292 src/f32-gemm/gen/2x4-relu-scalar.c
293 src/f32-gemm/gen/2x4-scalar.c
294 src/f32-gemm/gen/4x2-minmax-scalar.c
295 src/f32-gemm/gen/4x2-relu-scalar.c
296 src/f32-gemm/gen/4x2-scalar.c
297 src/f32-gemm/gen/4x4-minmax-scalar.c
298 src/f32-gemm/gen/4x4-relu-scalar.c
299 src/f32-gemm/gen/4x4-scalar.c
300 src/f32-ibilinear-chw/gen/scalar-p4.c
301 src/f32-ibilinear/gen/scalar-c2.c
302 src/f32-igemm/gen/1x4-minmax-scalar.c
303 src/f32-igemm/gen/1x4-relu-scalar.c
304 src/f32-igemm/gen/1x4-scalar.c
305 src/f32-igemm/gen/2x4-minmax-scalar.c
306 src/f32-igemm/gen/2x4-relu-scalar.c
307 src/f32-igemm/gen/2x4-scalar.c
308 src/f32-igemm/gen/4x2-minmax-scalar.c
309 src/f32-igemm/gen/4x2-relu-scalar.c
310 src/f32-igemm/gen/4x2-scalar.c
311 src/f32-igemm/gen/4x4-minmax-scalar.c
312 src/f32-igemm/gen/4x4-relu-scalar.c
313 src/f32-igemm/gen/4x4-scalar.c
314 src/f32-maxpool/9p8x-minmax-scalar-c1.c
315 src/f32-pavgpool/9p8x-minmax-scalar-c1.c
316 src/f32-pavgpool/9x-minmax-scalar-c1.c
317 src/f32-prelu/gen/scalar-2x4.c
Marat Dukhan430b1732021-12-04 02:53:12 -0800[diff] [blame]318 src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x1.c
319 src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x4.c
320 src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x1.c
321 src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]322 src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c
323 src/f32-rmax/scalar.c
324 src/f32-spmm/gen/8x1-minmax-scalar.c
325 src/f32-spmm/gen/8x2-minmax-scalar.c
326 src/f32-spmm/gen/8x4-minmax-scalar.c
327 src/f32-vbinary/gen/vadd-minmax-scalar-x8.c
328 src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c
329 src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c
330 src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c
331 src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c
332 src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c
333 src/f32-vbinary/gen/vmax-scalar-x8.c
334 src/f32-vbinary/gen/vmaxc-scalar-x8.c
335 src/f32-vbinary/gen/vmin-scalar-x8.c
336 src/f32-vbinary/gen/vminc-scalar-x8.c
337 src/f32-vbinary/gen/vmul-minmax-scalar-x8.c
338 src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c
339 src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c
340 src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c
341 src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c
342 src/f32-vbinary/gen/vsqrdiff-scalar-x8.c
343 src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c
344 src/f32-vbinary/gen/vsub-minmax-scalar-x8.c
345 src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c
346 src/f32-vclamp/gen/vclamp-scalar-x4.c
347 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c
348 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c
349 src/f32-vhswish/gen/vhswish-scalar-x4.c
350 src/f32-vlrelu/gen/vlrelu-scalar-x4.c
351 src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c
352 src/f32-vrelu/gen/vrelu-scalar-x8.c
353 src/f32-vrnd/gen/vrndd-scalar-libm-x1.c
354 src/f32-vrnd/gen/vrndd-scalar-libm-x4.c
355 src/f32-vrnd/gen/vrndne-scalar-libm-x1.c
356 src/f32-vrnd/gen/vrndne-scalar-libm-x4.c
357 src/f32-vrnd/gen/vrndu-scalar-libm-x1.c
358 src/f32-vrnd/gen/vrndu-scalar-libm-x4.c
359 src/f32-vrnd/gen/vrndz-scalar-libm-x1.c
360 src/f32-vrnd/gen/vrndz-scalar-libm-x4.c
361 src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c
362 src/f32-vsqrt/gen/scalar-sqrt-x1.c
363 src/f32-vunary/gen/vabs-scalar-x4.c
364 src/f32-vunary/gen/vneg-scalar-x4.c
365 src/f32-vunary/gen/vsqr-scalar-x4.c
366 src/params-init.c
367 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
368 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
369 src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
370 src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
371 src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
372 src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
373 src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
374 src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
375 src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
376 src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan66a3ca12021-08-06 18:24:19 -0700[diff] [blame]377 src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
378 src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]379 src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
380 src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
381 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c
382 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c
383 src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c
384 src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c
385 src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
386 src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
387 src/qs8-gemm/gen/1x4-minmax-rndnu-scalar.c
388 src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
389 src/qs8-gemm/gen/3x4-minmax-rndnu-scalar.c
390 src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
391 src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
392 src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
393 src/qs8-igemm/gen/1x4-minmax-rndnu-scalar.c
394 src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
395 src/qs8-igemm/gen/3x4-minmax-rndnu-scalar.c
396 src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan66a3ca12021-08-06 18:24:19 -0700[diff] [blame]397 src/qs8-vadd/gen/minmax-scalar-x1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]398 src/qs8-vadd/gen/minmax-scalar-x4.c
Marat Dukhan66a3ca12021-08-06 18:24:19 -0700[diff] [blame]399 src/qs8-vaddc/gen/minmax-scalar-x1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]400 src/qs8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]401 src/qs8-vmul/gen/minmax-fp32-scalar-x4.c
402 src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]403 src/qu8-avgpool/9p8x-minmax-scalar-c1.c
404 src/qu8-avgpool/9x-minmax-scalar-c1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]405 src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]406 src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]407 src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]408 src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
409 src/qu8-gavgpool/7p7x-minmax-scalar-c1.c
410 src/qu8-gavgpool/7x-minmax-scalar-c1.c
411 src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
412 src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
413 src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
414 src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
415 src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
416 src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
417 src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
418 src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
419 src/qu8-vadd/gen/minmax-scalar-x1.c
420 src/qu8-vadd/gen/minmax-scalar-x4.c
421 src/qu8-vaddc/gen/minmax-scalar-x1.c
422 src/qu8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]423 src/qu8-vmul/gen/minmax-fp32-scalar-x4.c
424 src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]425 src/s8-ibilinear/gen/scalar-c1.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]426 src/s8-maxpool/9p8x-minmax-scalar-c1.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]427 src/s8-vclamp/scalar-x4.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]428 src/u8-ibilinear/gen/scalar-c1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]429 src/u8-lut32norm/scalar.c
430 src/u8-maxpool/9p8x-minmax-scalar-c1.c
431 src/u8-rmax/scalar.c
432 src/u8-vclamp/scalar-x4.c
Marat Dukhan548542c2021-09-09 14:15:51 -0700[diff] [blame]433 src/x8-lut/gen/lut-scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]434 src/x8-zip/x2-scalar.c
435 src/x8-zip/x3-scalar.c
436 src/x8-zip/x4-scalar.c
437 src/x8-zip/xm-scalar.c
438 src/x32-depthtospace2d-chw2hwc/scalar.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]439 src/x32-packx/x2-scalar.c
440 src/x32-packx/x3-scalar.c
441 src/x32-packx/x4-scalar.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]442 src/x32-unpool/scalar.c
443 src/x32-zip/x2-scalar.c
444 src/x32-zip/x3-scalar.c
445 src/x32-zip/x4-scalar.c
446 src/x32-zip/xm-scalar.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]447 src/xx-copy/memcpy.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]448 src/xx-fill/scalar-x16.c
449 src/xx-pad/scalar.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]450
451SET(ALL_SCALAR_MICROKERNEL_SRCS
Marat Dukhane2c00012021-10-17 22:02:35 -0700[diff] [blame]452 src/f16-f32-vcvt/gen/vcvt-scalar-float-x1.c
453 src/f16-f32-vcvt/gen/vcvt-scalar-float-x2.c
454 src/f16-f32-vcvt/gen/vcvt-scalar-float-x3.c
455 src/f16-f32-vcvt/gen/vcvt-scalar-float-x4.c
Ashkan Aliabadif866a452019-11-20 10:58:51 -0800[diff] [blame]456 src/f32-argmaxpool/4x-scalar-c1.c
457 src/f32-argmaxpool/9p8x-scalar-c1.c
458 src/f32-argmaxpool/9x-scalar-c1.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]459 src/f32-avgpool/9p8x-minmax-scalar-c1.c
460 src/f32-avgpool/9x-minmax-scalar-c1.c
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]461 src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]462 src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]463 src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]464 src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c
465 src/f32-dwconv/gen/up1x3-minmax-scalar.c
466 src/f32-dwconv/gen/up1x3-scalar-acc2.c
467 src/f32-dwconv/gen/up1x3-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]468 src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]469 src/f32-dwconv/gen/up1x4-minmax-scalar.c
470 src/f32-dwconv/gen/up1x4-scalar-acc2.c
471 src/f32-dwconv/gen/up1x4-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]472 src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]473 src/f32-dwconv/gen/up1x9-minmax-scalar.c
474 src/f32-dwconv/gen/up1x9-scalar-acc2.c
475 src/f32-dwconv/gen/up1x9-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]476 src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]477 src/f32-dwconv/gen/up1x25-minmax-scalar.c
478 src/f32-dwconv/gen/up1x25-scalar-acc2.c
479 src/f32-dwconv/gen/up1x25-scalar.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]480 src/f32-dwconv/gen/up2x3-minmax-scalar-acc2.c
481 src/f32-dwconv/gen/up2x3-minmax-scalar.c
482 src/f32-dwconv/gen/up2x3-scalar-acc2.c
483 src/f32-dwconv/gen/up2x3-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]484 src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]485 src/f32-dwconv/gen/up2x4-minmax-scalar.c
486 src/f32-dwconv/gen/up2x4-scalar-acc2.c
487 src/f32-dwconv/gen/up2x4-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]488 src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]489 src/f32-dwconv/gen/up2x9-minmax-scalar.c
490 src/f32-dwconv/gen/up2x9-scalar-acc2.c
491 src/f32-dwconv/gen/up2x9-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]492 src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]493 src/f32-dwconv/gen/up2x25-minmax-scalar.c
494 src/f32-dwconv/gen/up2x25-scalar-acc2.c
495 src/f32-dwconv/gen/up2x25-scalar.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]496 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c
497 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c
498 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c
Marat Dukhan91249d22020-10-24 12:02:51 -0700[diff] [blame]499 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]500 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c
Marat Dukhan91249d22020-10-24 12:02:51 -0700[diff] [blame]501 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c
502 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c
503 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c
504 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c
505 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700[diff] [blame]506 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c
507 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c
508 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]509 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700[diff] [blame]510 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]511 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c
512 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c
513 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c
Marat Dukhanc4efb002020-10-25 23:14:47 -0700[diff] [blame]514 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c
515 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c
516 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c
517 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]518 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c
Marat Dukhanc4efb002020-10-25 23:14:47 -0700[diff] [blame]519 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c
520 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]521 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c
Marat Dukhanc4efb002020-10-25 23:14:47 -0700[diff] [blame]522 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]523 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c
Marat Dukhan29c0c332020-10-28 22:11:00 -0700[diff] [blame]524 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c
525 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c
526 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c
527 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c
528 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c
529 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c
530 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c
531 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c
532 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c
533 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c
Marat Dukhan1fe89952021-11-10 01:27:15 -0800[diff] [blame]534 src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x1.c
535 src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x2.c
536 src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x3.c
537 src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x4.c
538 src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x1.c
539 src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c
540 src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x3.c
541 src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x4.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]542 src/f32-gavgpool-cw/scalar-x1.c
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]543 src/f32-gavgpool/7p7x-minmax-scalar-c1.c
544 src/f32-gavgpool/7x-minmax-scalar-c1.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]545 src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c
546 src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c
547 src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]548 src/f32-gemm/gen/1x4-minmax-scalar.c
549 src/f32-gemm/gen/1x4-relu-scalar.c
550 src/f32-gemm/gen/1x4-scalar.c
551 src/f32-gemm/gen/2x4-minmax-scalar.c
552 src/f32-gemm/gen/2x4-relu-scalar.c
553 src/f32-gemm/gen/2x4-scalar.c
554 src/f32-gemm/gen/4x2-minmax-scalar.c
555 src/f32-gemm/gen/4x2-relu-scalar.c
556 src/f32-gemm/gen/4x2-scalar.c
557 src/f32-gemm/gen/4x4-minmax-scalar.c
558 src/f32-gemm/gen/4x4-relu-scalar.c
559 src/f32-gemm/gen/4x4-scalar.c
Marat Dukhan9f426b42020-10-21 11:18:35 -0700[diff] [blame]560 src/f32-ibilinear-chw/gen/scalar-p1.c
561 src/f32-ibilinear-chw/gen/scalar-p2.c
562 src/f32-ibilinear-chw/gen/scalar-p4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]563 src/f32-ibilinear/gen/scalar-c1.c
564 src/f32-ibilinear/gen/scalar-c2.c
565 src/f32-ibilinear/gen/scalar-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]566 src/f32-igemm/gen/1x4-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]567 src/f32-igemm/gen/1x4-relu-scalar.c
568 src/f32-igemm/gen/1x4-scalar.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]569 src/f32-igemm/gen/2x4-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]570 src/f32-igemm/gen/2x4-relu-scalar.c
571 src/f32-igemm/gen/2x4-scalar.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]572 src/f32-igemm/gen/4x2-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]573 src/f32-igemm/gen/4x2-relu-scalar.c
574 src/f32-igemm/gen/4x2-scalar.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]575 src/f32-igemm/gen/4x4-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]576 src/f32-igemm/gen/4x4-relu-scalar.c
577 src/f32-igemm/gen/4x4-scalar.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]578 src/f32-maxpool/9p8x-minmax-scalar-c1.c
579 src/f32-pavgpool/9p8x-minmax-scalar-c1.c
580 src/f32-pavgpool/9x-minmax-scalar-c1.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]581 src/f32-ppmm/gen/2x4-minmax-scalar.c
582 src/f32-ppmm/gen/3x3-minmax-scalar.c
583 src/f32-ppmm/gen/4x2-minmax-scalar.c
584 src/f32-ppmm/gen/4x4-minmax-scalar.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]585 src/f32-prelu/gen/scalar-2x1.c
586 src/f32-prelu/gen/scalar-2x4.c
Marat Dukhan430b1732021-12-04 02:53:12 -0800[diff] [blame]587 src/f32-qs8-vcvt/gen/vcvt-scalar-magic-fminmax-x1.c
588 src/f32-qs8-vcvt/gen/vcvt-scalar-magic-fminmax-x2.c
589 src/f32-qs8-vcvt/gen/vcvt-scalar-magic-fminmax-x3.c
590 src/f32-qs8-vcvt/gen/vcvt-scalar-magic-fminmax-x4.c
591 src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x1.c
592 src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x2.c
593 src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x3.c
594 src/f32-qs8-vcvt/gen/vcvt-scalar-magic-iminmax-x4.c
595 src/f32-qu8-vcvt/gen/vcvt-scalar-magic-fminmax-x1.c
596 src/f32-qu8-vcvt/gen/vcvt-scalar-magic-fminmax-x2.c
597 src/f32-qu8-vcvt/gen/vcvt-scalar-magic-fminmax-x3.c
598 src/f32-qu8-vcvt/gen/vcvt-scalar-magic-fminmax-x4.c
599 src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x1.c
600 src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x2.c
601 src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x3.c
602 src/f32-qu8-vcvt/gen/vcvt-scalar-magic-iminmax-x4.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]603 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]604 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]605 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]606 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c
607 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]608 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]609 src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]610 src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]611 src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]612 src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c
613 src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]614 src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]615 src/f32-rmax/scalar.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]616 src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c
617 src/f32-spmm/gen/1x1-minmax-scalar.c
618 src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c
619 src/f32-spmm/gen/2x1-minmax-scalar.c
620 src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c
621 src/f32-spmm/gen/4x1-minmax-scalar.c
622 src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c
623 src/f32-spmm/gen/8x1-minmax-scalar.c
624 src/f32-spmm/gen/8x2-minmax-scalar.c
625 src/f32-spmm/gen/8x4-minmax-scalar.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]626 src/f32-vbinary/gen/vadd-minmax-scalar-x1.c
627 src/f32-vbinary/gen/vadd-minmax-scalar-x2.c
628 src/f32-vbinary/gen/vadd-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]629 src/f32-vbinary/gen/vadd-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]630 src/f32-vbinary/gen/vadd-relu-scalar-x1.c
631 src/f32-vbinary/gen/vadd-relu-scalar-x2.c
632 src/f32-vbinary/gen/vadd-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]633 src/f32-vbinary/gen/vadd-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]634 src/f32-vbinary/gen/vadd-scalar-x1.c
635 src/f32-vbinary/gen/vadd-scalar-x2.c
636 src/f32-vbinary/gen/vadd-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]637 src/f32-vbinary/gen/vadd-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]638 src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c
639 src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c
640 src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]641 src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]642 src/f32-vbinary/gen/vaddc-relu-scalar-x1.c
643 src/f32-vbinary/gen/vaddc-relu-scalar-x2.c
644 src/f32-vbinary/gen/vaddc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]645 src/f32-vbinary/gen/vaddc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]646 src/f32-vbinary/gen/vaddc-scalar-x1.c
647 src/f32-vbinary/gen/vaddc-scalar-x2.c
648 src/f32-vbinary/gen/vaddc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]649 src/f32-vbinary/gen/vaddc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]650 src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c
651 src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c
652 src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]653 src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]654 src/f32-vbinary/gen/vdiv-relu-scalar-x1.c
655 src/f32-vbinary/gen/vdiv-relu-scalar-x2.c
656 src/f32-vbinary/gen/vdiv-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]657 src/f32-vbinary/gen/vdiv-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]658 src/f32-vbinary/gen/vdiv-scalar-x1.c
659 src/f32-vbinary/gen/vdiv-scalar-x2.c
660 src/f32-vbinary/gen/vdiv-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]661 src/f32-vbinary/gen/vdiv-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]662 src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c
663 src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c
664 src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]665 src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]666 src/f32-vbinary/gen/vdivc-relu-scalar-x1.c
667 src/f32-vbinary/gen/vdivc-relu-scalar-x2.c
668 src/f32-vbinary/gen/vdivc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]669 src/f32-vbinary/gen/vdivc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]670 src/f32-vbinary/gen/vdivc-scalar-x1.c
671 src/f32-vbinary/gen/vdivc-scalar-x2.c
672 src/f32-vbinary/gen/vdivc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]673 src/f32-vbinary/gen/vdivc-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]674 src/f32-vbinary/gen/vmax-scalar-x1.c
675 src/f32-vbinary/gen/vmax-scalar-x2.c
676 src/f32-vbinary/gen/vmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]677 src/f32-vbinary/gen/vmax-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]678 src/f32-vbinary/gen/vmaxc-scalar-x1.c
679 src/f32-vbinary/gen/vmaxc-scalar-x2.c
680 src/f32-vbinary/gen/vmaxc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]681 src/f32-vbinary/gen/vmaxc-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]682 src/f32-vbinary/gen/vmin-scalar-x1.c
683 src/f32-vbinary/gen/vmin-scalar-x2.c
684 src/f32-vbinary/gen/vmin-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]685 src/f32-vbinary/gen/vmin-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]686 src/f32-vbinary/gen/vminc-scalar-x1.c
687 src/f32-vbinary/gen/vminc-scalar-x2.c
688 src/f32-vbinary/gen/vminc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]689 src/f32-vbinary/gen/vminc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]690 src/f32-vbinary/gen/vmul-minmax-scalar-x1.c
691 src/f32-vbinary/gen/vmul-minmax-scalar-x2.c
692 src/f32-vbinary/gen/vmul-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]693 src/f32-vbinary/gen/vmul-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]694 src/f32-vbinary/gen/vmul-relu-scalar-x1.c
695 src/f32-vbinary/gen/vmul-relu-scalar-x2.c
696 src/f32-vbinary/gen/vmul-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]697 src/f32-vbinary/gen/vmul-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]698 src/f32-vbinary/gen/vmul-scalar-x1.c
699 src/f32-vbinary/gen/vmul-scalar-x2.c
700 src/f32-vbinary/gen/vmul-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]701 src/f32-vbinary/gen/vmul-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]702 src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c
703 src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c
704 src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]705 src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]706 src/f32-vbinary/gen/vmulc-relu-scalar-x1.c
707 src/f32-vbinary/gen/vmulc-relu-scalar-x2.c
708 src/f32-vbinary/gen/vmulc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]709 src/f32-vbinary/gen/vmulc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]710 src/f32-vbinary/gen/vmulc-scalar-x1.c
711 src/f32-vbinary/gen/vmulc-scalar-x2.c
712 src/f32-vbinary/gen/vmulc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]713 src/f32-vbinary/gen/vmulc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]714 src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c
715 src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c
716 src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]717 src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]718 src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c
719 src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c
720 src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]721 src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]722 src/f32-vbinary/gen/vrdivc-scalar-x1.c
723 src/f32-vbinary/gen/vrdivc-scalar-x2.c
724 src/f32-vbinary/gen/vrdivc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]725 src/f32-vbinary/gen/vrdivc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]726 src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c
727 src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c
728 src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]729 src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]730 src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c
731 src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c
732 src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]733 src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]734 src/f32-vbinary/gen/vrsubc-scalar-x1.c
735 src/f32-vbinary/gen/vrsubc-scalar-x2.c
736 src/f32-vbinary/gen/vrsubc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]737 src/f32-vbinary/gen/vrsubc-scalar-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]738 src/f32-vbinary/gen/vsqrdiff-scalar-x1.c
739 src/f32-vbinary/gen/vsqrdiff-scalar-x2.c
740 src/f32-vbinary/gen/vsqrdiff-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]741 src/f32-vbinary/gen/vsqrdiff-scalar-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]742 src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c
743 src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c
744 src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]745 src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]746 src/f32-vbinary/gen/vsub-minmax-scalar-x1.c
747 src/f32-vbinary/gen/vsub-minmax-scalar-x2.c
748 src/f32-vbinary/gen/vsub-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]749 src/f32-vbinary/gen/vsub-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]750 src/f32-vbinary/gen/vsub-relu-scalar-x1.c
751 src/f32-vbinary/gen/vsub-relu-scalar-x2.c
752 src/f32-vbinary/gen/vsub-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]753 src/f32-vbinary/gen/vsub-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]754 src/f32-vbinary/gen/vsub-scalar-x1.c
755 src/f32-vbinary/gen/vsub-scalar-x2.c
756 src/f32-vbinary/gen/vsub-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]757 src/f32-vbinary/gen/vsub-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]758 src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c
759 src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c
760 src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]761 src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]762 src/f32-vbinary/gen/vsubc-relu-scalar-x1.c
763 src/f32-vbinary/gen/vsubc-relu-scalar-x2.c
764 src/f32-vbinary/gen/vsubc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]765 src/f32-vbinary/gen/vsubc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]766 src/f32-vbinary/gen/vsubc-scalar-x1.c
767 src/f32-vbinary/gen/vsubc-scalar-x2.c
768 src/f32-vbinary/gen/vsubc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]769 src/f32-vbinary/gen/vsubc-scalar-x8.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]770 src/f32-vclamp/gen/vclamp-scalar-x1.c
771 src/f32-vclamp/gen/vclamp-scalar-x2.c
772 src/f32-vclamp/gen/vclamp-scalar-x4.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]773 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c
774 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c
775 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c
776 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c
777 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c
778 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c
779 src/f32-velu/gen/velu-scalar-rr2-p6-x1.c
780 src/f32-velu/gen/velu-scalar-rr2-p6-x2.c
781 src/f32-velu/gen/velu-scalar-rr2-p6-x3.c
782 src/f32-velu/gen/velu-scalar-rr2-p6-x4.c
783 src/f32-velu/gen/velu-scalar-rr2-p6-x5.c
784 src/f32-velu/gen/velu-scalar-rr2-p6-x6.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]785 src/f32-vhswish/gen/vhswish-scalar-x1.c
786 src/f32-vhswish/gen/vhswish-scalar-x2.c
787 src/f32-vhswish/gen/vhswish-scalar-x4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]788 src/f32-vlrelu/gen/vlrelu-scalar-x1.c
789 src/f32-vlrelu/gen/vlrelu-scalar-x2.c
790 src/f32-vlrelu/gen/vlrelu-scalar-x4.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]791 src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c
792 src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c
793 src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]794 src/f32-vrelu/gen/vrelu-scalar-x1.c
795 src/f32-vrelu/gen/vrelu-scalar-x2.c
796 src/f32-vrelu/gen/vrelu-scalar-x4.c
797 src/f32-vrelu/gen/vrelu-scalar-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]798 src/f32-vrnd/gen/vrndd-scalar-libm-x1.c
799 src/f32-vrnd/gen/vrndd-scalar-libm-x2.c
800 src/f32-vrnd/gen/vrndd-scalar-libm-x4.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]801 src/f32-vrnd/gen/vrndne-scalar-libm-x1.c
802 src/f32-vrnd/gen/vrndne-scalar-libm-x2.c
803 src/f32-vrnd/gen/vrndne-scalar-libm-x4.c
804 src/f32-vrnd/gen/vrndu-scalar-libm-x1.c
805 src/f32-vrnd/gen/vrndu-scalar-libm-x2.c
806 src/f32-vrnd/gen/vrndu-scalar-libm-x4.c
807 src/f32-vrnd/gen/vrndz-scalar-libm-x1.c
808 src/f32-vrnd/gen/vrndz-scalar-libm-x2.c
809 src/f32-vrnd/gen/vrndz-scalar-libm-x4.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]810 src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c
811 src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c
812 src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c
813 src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c
814 src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c
815 src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c
816 src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c
817 src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c
818 src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]819 src/f32-vsqrt/gen/scalar-sqrt-x1.c
820 src/f32-vsqrt/gen/scalar-sqrt-x2.c
821 src/f32-vsqrt/gen/scalar-sqrt-x4.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]822 src/f32-vunary/gen/vabs-scalar-x1.c
823 src/f32-vunary/gen/vabs-scalar-x2.c
824 src/f32-vunary/gen/vabs-scalar-x4.c
825 src/f32-vunary/gen/vneg-scalar-x1.c
826 src/f32-vunary/gen/vneg-scalar-x2.c
827 src/f32-vunary/gen/vneg-scalar-x4.c
828 src/f32-vunary/gen/vsqr-scalar-x1.c
829 src/f32-vunary/gen/vsqr-scalar-x2.c
830 src/f32-vunary/gen/vsqr-scalar-x4.c
Marat Dukhan78f039d2021-11-09 16:42:27 -0800[diff] [blame]831 src/math/cvt-f32-f16-scalar-bitcast.c
832 src/math/cvt-f32-f16-scalar-fabsf.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]833 src/math/expm1minus-scalar-rr2-lut4-p4.c
834 src/math/expm1minus-scalar-rr2-lut8-p3.c
835 src/math/expm1minus-scalar-rr2-lut8-p4.c
Marat Dukhanc60742b2020-11-23 12:33:27 -0800[diff] [blame]836 src/math/expm1minus-scalar-rr2-lut16-p3.c
837 src/math/expm1minus-scalar-rr2-lut16-p4.c
838 src/math/expm1minus-scalar-rr2-p5.c
839 src/math/expm1minus-scalar-rr2-p6.c
Frank Barchard22136062020-11-24 18:44:46 -0800[diff] [blame]840 src/math/expminus-scalar-rr2-lut64-p2.c
841 src/math/expminus-scalar-rr2-lut2048-p1.c
842 src/math/expminus-scalar-rr2-p5.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]843 src/math/roundd-scalar-addsub.c
844 src/math/roundd-scalar-cvt.c
Marat Dukhancc55f812020-05-14 03:52:49 -0700[diff] [blame]845 src/math/roundd-scalar-floor.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]846 src/math/roundne-scalar-addsub.c
847 src/math/roundne-scalar-nearbyint.c
848 src/math/roundne-scalar-rint.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]849 src/math/roundu-scalar-addsub.c
Marat Dukhancc55f812020-05-14 03:52:49 -0700[diff] [blame]850 src/math/roundu-scalar-ceil.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]851 src/math/roundu-scalar-cvt.c
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]852 src/math/roundz-scalar-addsub.c
853 src/math/roundz-scalar-cvt.c
Marat Dukhancc55f812020-05-14 03:52:49 -0700[diff] [blame]854 src/math/roundz-scalar-trunc.c
Marat Dukhanf8475d62020-09-17 15:01:43 -0700[diff] [blame]855 src/math/sigmoid-scalar-rr2-lut64-p2-div.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]856 src/math/sigmoid-scalar-rr2-lut2048-p1-div.c
Marat Dukhanf8475d62020-09-17 15:01:43 -0700[diff] [blame]857 src/math/sigmoid-scalar-rr2-p5-div.c
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]858 src/params-init.c
Marat Dukhan57547062021-06-30 16:53:29 -0700[diff] [blame]859 src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c
860 src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
861 src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c
862 src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
863 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c
864 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
865 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c
866 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
867 src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c
868 src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c
869 src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c
870 src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c
Marat Dukhand6021542021-06-30 09:04:20 -0700[diff] [blame]871 src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c
872 src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
873 src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c
874 src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
875 src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c
876 src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
877 src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c
878 src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c
879 src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c
880 src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c
881 src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c
882 src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c
883 src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c
884 src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c
885 src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c
886 src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
887 src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c
888 src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
889 src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c
890 src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
891 src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c
892 src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
893 src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c
894 src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c
895 src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c
896 src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c
897 src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c
898 src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c
899 src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c
900 src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c
901 src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c
902 src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan85d772b2021-06-30 11:02:42 -0700[diff] [blame]903 src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c
904 src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]905 src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c
906 src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
Marat Dukhan85d772b2021-06-30 11:02:42 -0700[diff] [blame]907 src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c
908 src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]909 src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c
910 src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
Marat Dukhan85d772b2021-06-30 11:02:42 -0700[diff] [blame]911 src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c
912 src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]913 src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c
914 src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c
Marat Dukhan047b6202021-05-11 20:32:25 -0700[diff] [blame]915 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c
916 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c
917 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c
918 src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c
919 src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c
920 src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]921 src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c
922 src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]923 src/qs8-gemm/gen/1x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]924 src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c
925 src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]926 src/qs8-gemm/gen/1x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]927 src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c
928 src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]929 src/qs8-gemm/gen/2x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]930 src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c
931 src/qs8-gemm/gen/2x4-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]932 src/qs8-gemm/gen/2x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]933 src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c
934 src/qs8-gemm/gen/3x2-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]935 src/qs8-gemm/gen/3x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]936 src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c
937 src/qs8-gemm/gen/3x4-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]938 src/qs8-gemm/gen/3x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]939 src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c
940 src/qs8-gemm/gen/4x2-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]941 src/qs8-gemm/gen/4x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]942 src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c
943 src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]944 src/qs8-gemm/gen/4x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]945 src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c
946 src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]947 src/qs8-igemm/gen/1x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]948 src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c
949 src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]950 src/qs8-igemm/gen/1x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]951 src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c
952 src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]953 src/qs8-igemm/gen/2x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]954 src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c
955 src/qs8-igemm/gen/2x4-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]956 src/qs8-igemm/gen/2x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]957 src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c
958 src/qs8-igemm/gen/3x2-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]959 src/qs8-igemm/gen/3x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]960 src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c
961 src/qs8-igemm/gen/3x4-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]962 src/qs8-igemm/gen/3x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]963 src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c
964 src/qs8-igemm/gen/4x2-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]965 src/qs8-igemm/gen/4x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]966 src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c
967 src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]968 src/qs8-igemm/gen/4x4-minmax-rndnu-scalar.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]969 src/qs8-requantization/fp32-scalar-lrintf.c
970 src/qs8-requantization/fp32-scalar-magic.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]971 src/qs8-requantization/gemmlowp-scalar.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]972 src/qs8-requantization/rndna-scalar-signed64.c
973 src/qs8-requantization/rndna-scalar-unsigned32.c
974 src/qs8-requantization/rndna-scalar-unsigned64.c
Marat Dukhan062bee32021-05-27 20:31:07 -0700[diff] [blame]975 src/qs8-requantization/rndnu-scalar.c
Marat Dukhand481c282021-05-11 23:48:31 -0700[diff] [blame]976 src/qs8-vadd/gen/minmax-scalar-x1.c
977 src/qs8-vadd/gen/minmax-scalar-x2.c
978 src/qs8-vadd/gen/minmax-scalar-x4.c
979 src/qs8-vaddc/gen/minmax-scalar-x1.c
980 src/qs8-vaddc/gen/minmax-scalar-x2.c
981 src/qs8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan79993412021-08-02 15:02:57 -0700[diff] [blame]982 src/qs8-vmul/gen/minmax-fp32-scalar-x1.c
983 src/qs8-vmul/gen/minmax-fp32-scalar-x2.c
984 src/qs8-vmul/gen/minmax-fp32-scalar-x4.c
985 src/qs8-vmulc/gen/minmax-fp32-scalar-x1.c
986 src/qs8-vmulc/gen/minmax-fp32-scalar-x2.c
987 src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]988 src/qu8-avgpool/9p8x-minmax-scalar-c1.c
989 src/qu8-avgpool/9x-minmax-scalar-c1.c
Marat Dukhan1f714282021-07-15 15:41:32 -0700[diff] [blame]990 src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c
991 src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
992 src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c
993 src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
994 src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c
995 src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
996 src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c
997 src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
998 src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c
999 src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c
1000 src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c
1001 src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]1002 src/qu8-gavgpool/7p7x-minmax-scalar-c1.c
1003 src/qu8-gavgpool/7x-minmax-scalar-c1.c
Marat Dukhan927d4742021-07-15 13:42:49 -0700[diff] [blame]1004 src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c
1005 src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
1006 src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c
1007 src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
1008 src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c
1009 src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
1010 src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c
1011 src/qu8-gemm/gen/2x4-minmax-fp32-scalar-magic.c
1012 src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c
1013 src/qu8-gemm/gen/3x2-minmax-fp32-scalar-magic.c
1014 src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c
1015 src/qu8-gemm/gen/3x4-minmax-fp32-scalar-magic.c
1016 src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c
1017 src/qu8-gemm/gen/4x2-minmax-fp32-scalar-magic.c
1018 src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c
1019 src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan927d4742021-07-15 13:42:49 -0700[diff] [blame]1020 src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c
1021 src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
1022 src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c
1023 src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
1024 src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c
1025 src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
1026 src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c
1027 src/qu8-igemm/gen/2x4-minmax-fp32-scalar-magic.c
1028 src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c
1029 src/qu8-igemm/gen/3x2-minmax-fp32-scalar-magic.c
1030 src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c
1031 src/qu8-igemm/gen/3x4-minmax-fp32-scalar-magic.c
1032 src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c
1033 src/qu8-igemm/gen/4x2-minmax-fp32-scalar-magic.c
1034 src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c
1035 src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]1036 src/qu8-requantization/fp32-scalar-lrintf.c
1037 src/qu8-requantization/fp32-scalar-magic.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]1038 src/qu8-requantization/gemmlowp-scalar.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]1039 src/qu8-requantization/rndna-scalar-signed64.c
1040 src/qu8-requantization/rndna-scalar-unsigned32.c
1041 src/qu8-requantization/rndna-scalar-unsigned64.c
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]1042 src/qu8-vadd/gen/minmax-scalar-x1.c
1043 src/qu8-vadd/gen/minmax-scalar-x2.c
1044 src/qu8-vadd/gen/minmax-scalar-x4.c
1045 src/qu8-vaddc/gen/minmax-scalar-x1.c
1046 src/qu8-vaddc/gen/minmax-scalar-x2.c
1047 src/qu8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan79993412021-08-02 15:02:57 -0700[diff] [blame]1048 src/qu8-vmul/gen/minmax-fp32-scalar-x1.c
1049 src/qu8-vmul/gen/minmax-fp32-scalar-x2.c
1050 src/qu8-vmul/gen/minmax-fp32-scalar-x4.c
1051 src/qu8-vmulc/gen/minmax-fp32-scalar-x1.c
1052 src/qu8-vmulc/gen/minmax-fp32-scalar-x2.c
1053 src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan6a69c8e2021-11-24 15:00:59 -0800[diff] [blame]1054 src/s8-ibilinear/gen/scalar-c1.c
1055 src/s8-ibilinear/gen/scalar-c2.c
1056 src/s8-ibilinear/gen/scalar-c4.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]1057 src/s8-maxpool/9p8x-minmax-scalar-c1.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]1058 src/s8-vclamp/scalar-x4.c
Marat Dukhan6a69c8e2021-11-24 15:00:59 -0800[diff] [blame]1059 src/u8-ibilinear/gen/scalar-c1.c
1060 src/u8-ibilinear/gen/scalar-c2.c
1061 src/u8-ibilinear/gen/scalar-c4.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1062 src/u8-lut32norm/scalar.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1063 src/u8-maxpool/9p8x-minmax-scalar-c1.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1064 src/u8-rmax/scalar.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]1065 src/u8-vclamp/scalar-x4.c
Marat Dukhan548542c2021-09-09 14:15:51 -0700[diff] [blame]1066 src/x8-lut/gen/lut-scalar-x1.c
1067 src/x8-lut/gen/lut-scalar-x2.c
1068 src/x8-lut/gen/lut-scalar-x4.c
1069 src/x8-lut/gen/lut-scalar-x8.c
1070 src/x8-lut/gen/lut-scalar-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1071 src/x8-zip/x2-scalar.c
1072 src/x8-zip/x3-scalar.c
1073 src/x8-zip/x4-scalar.c
1074 src/x8-zip/xm-scalar.c
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800[diff] [blame]1075 src/x32-depthtospace2d-chw2hwc/scalar.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1076 src/x32-packx/x2-scalar.c
1077 src/x32-packx/x3-scalar.c
1078 src/x32-packx/x4-scalar.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1079 src/x32-unpool/scalar.c
1080 src/x32-zip/x2-scalar.c
1081 src/x32-zip/x3-scalar.c
1082 src/x32-zip/x4-scalar.c
Marat Dukhan048931b2020-11-24 20:53:54 -0800[diff] [blame]1083 src/x32-zip/xm-scalar.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]1084 src/xx-copy/memcpy.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]1085 src/xx-fill/scalar-x16.c
1086 src/xx-pad/scalar.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1087
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1088SET(PROD_NEON_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]1089 src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1090 src/f32-argmaxpool/4x-neon-c4.c
1091 src/f32-argmaxpool/9p8x-neon-c4.c
1092 src/f32-argmaxpool/9x-neon-c4.c
1093 src/f32-avgpool/9p8x-minmax-neon-c4.c
1094 src/f32-avgpool/9x-minmax-neon-c4.c
1095 src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1096 src/f32-dwconv/gen/up8x3-minmax-neon.c
Frank Barcharddbe781b2021-10-18 10:29:52 -0700[diff] [blame]1097 src/f32-dwconv/gen/up8x4-minmax-neon.c
1098 src/f32-dwconv/gen/up8x9-minmax-neon.c
1099 src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1100 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c
1101 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c
1102 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c
1103 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]1104 src/f32-f16-vcvt/gen/vcvt-neon-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1105 src/f32-gavgpool-cw/neon-x4.c
1106 src/f32-gavgpool/7p7x-minmax-neon-c4.c
1107 src/f32-gavgpool/7x-minmax-neon-c4.c
1108 src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c
1109 src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c
1110 src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c
1111 src/f32-ibilinear-chw/gen/neon-p8.c
1112 src/f32-ibilinear/gen/neon-c8.c
1113 src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c
1114 src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c
1115 src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c
1116 src/f32-maxpool/9p8x-minmax-neon-c4.c
1117 src/f32-pavgpool/9p8x-minmax-neon-c4.c
1118 src/f32-pavgpool/9x-minmax-neon-c4.c
1119 src/f32-prelu/gen/neon-2x8.c
Marat Dukhaned2d7762021-12-03 23:51:19 -0800[diff] [blame]1120 src/f32-qs8-vcvt/gen/vcvt-neon-x32.c
1121 src/f32-qu8-vcvt/gen/vcvt-neon-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1122 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c
1123 src/f32-rmax/neon.c
1124 src/f32-spmm/gen/32x1-minmax-neon.c
1125 src/f32-vbinary/gen/vadd-minmax-neon-x8.c
1126 src/f32-vbinary/gen/vaddc-minmax-neon-x8.c
1127 src/f32-vbinary/gen/vmax-neon-x8.c
1128 src/f32-vbinary/gen/vmaxc-neon-x8.c
1129 src/f32-vbinary/gen/vmin-neon-x8.c
1130 src/f32-vbinary/gen/vminc-neon-x8.c
1131 src/f32-vbinary/gen/vmul-minmax-neon-x8.c
1132 src/f32-vbinary/gen/vmulc-minmax-neon-x8.c
1133 src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c
1134 src/f32-vbinary/gen/vsqrdiff-neon-x8.c
1135 src/f32-vbinary/gen/vsqrdiffc-neon-x8.c
1136 src/f32-vbinary/gen/vsub-minmax-neon-x8.c
1137 src/f32-vbinary/gen/vsubc-minmax-neon-x8.c
1138 src/f32-vclamp/gen/vclamp-neon-x8.c
1139 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c
1140 src/f32-vhswish/gen/vhswish-neon-x16.c
1141 src/f32-vlrelu/gen/vlrelu-neon-x8.c
1142 src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c
1143 src/f32-vrnd/gen/vrndd-neon-x8.c
1144 src/f32-vrnd/gen/vrndne-neon-x8.c
1145 src/f32-vrnd/gen/vrndu-neon-x8.c
1146 src/f32-vrnd/gen/vrndz-neon-x8.c
1147 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c
1148 src/f32-vunary/gen/vabs-neon-x8.c
1149 src/f32-vunary/gen/vneg-neon-x8.c
1150 src/f32-vunary/gen/vsqr-neon-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1151 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c
Frank Barchard7da8b022021-08-31 09:49:10 -0700[diff] [blame]1152 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c
1153 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1154 src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c
1155 src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c
1156 src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c
1157 src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1158 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c
Frank Barchard7da8b022021-08-31 09:49:10 -0700[diff] [blame]1159 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c
1160 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1161 src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c
1162 src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1163 src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1164 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1165 src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c
1166 src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1167 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1168 src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c
Marat Dukhan01debd92021-07-29 18:14:21 -0700[diff] [blame]1169 src/qs8-vadd/gen/minmax-neon-ld64-x16.c
1170 src/qs8-vadd/gen/minmax-neon-ld64-x32.c
1171 src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
1172 src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]1173 src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c
1174 src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1175 src/qu8-avgpool/9p8x-minmax-neon-c8.c
1176 src/qu8-avgpool/9x-minmax-neon-c8.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1177 src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c
1178 src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1179 src/qu8-gavgpool/7p7x-minmax-neon-c8.c
1180 src/qu8-gavgpool/7x-minmax-neon-c8.c
1181 src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
1182 src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1183 src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
1184 src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
1185 src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
1186 src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1187 src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
1188 src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard0a3093c2021-08-31 09:58:11 -0700[diff] [blame]1189 src/qu8-vadd/gen/minmax-neon-ld64-x16.c
1190 src/qu8-vadd/gen/minmax-neon-ld64-x32.c
1191 src/qu8-vaddc/gen/minmax-neon-ld64-x16.c
1192 src/qu8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]1193 src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c
1194 src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]1195 src/s8-ibilinear/gen/neon-c8.c
1196 src/s8-ibilinear/gen/neon-c16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]1197 src/s8-maxpool/9p8x-minmax-neon-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]1198 src/s8-vclamp/neon-x64.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]1199 src/u8-ibilinear/gen/neon-c8.c
1200 src/u8-ibilinear/gen/neon-c16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1201 src/u8-maxpool/9p8x-minmax-neon-c16.c
1202 src/u8-rmax/neon.c
1203 src/u8-vclamp/neon-x64.c
1204 src/x8-zip/x2-neon.c
1205 src/x8-zip/x3-neon.c
1206 src/x8-zip/x4-neon.c
1207 src/x8-zip/xm-neon.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1208 src/x32-packx/x4-neon-st4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1209 src/x32-unpool/neon.c
1210 src/x32-zip/x2-neon.c
1211 src/x32-zip/x3-neon.c
1212 src/x32-zip/x4-neon.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]1213 src/x32-zip/xm-neon.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]1214 src/xx-fill/neon-x64.c
1215 src/xx-pad/neon.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1216
1217SET(ALL_NEON_MICROKERNEL_SRCS
Marat Dukhan322ed6f2021-10-16 17:44:16 -0700[diff] [blame]1218 src/f16-f32-vcvt/gen/vcvt-neon-int16-x8.c
1219 src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c
1220 src/f16-f32-vcvt/gen/vcvt-neon-int16-x24.c
1221 src/f16-f32-vcvt/gen/vcvt-neon-int16-x32.c
1222 src/f16-f32-vcvt/gen/vcvt-neon-int32-x8.c
1223 src/f16-f32-vcvt/gen/vcvt-neon-int32-x16.c
1224 src/f16-f32-vcvt/gen/vcvt-neon-int32-x24.c
1225 src/f16-f32-vcvt/gen/vcvt-neon-int32-x32.c
Marat Dukhanef25c6d2020-07-24 00:59:40 -0700[diff] [blame]1226 src/f32-argmaxpool/4x-neon-c4.c
1227 src/f32-argmaxpool/9p8x-neon-c4.c
1228 src/f32-argmaxpool/9x-neon-c4.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1229 src/f32-avgpool/9p8x-minmax-neon-c4.c
1230 src/f32-avgpool/9x-minmax-neon-c4.c
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]1231 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1232 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1233 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1234 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]1235 src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1236 src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1237 src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1238 src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c
Marat Dukhanc7634882020-12-07 15:11:12 -0800[diff] [blame]1239 src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1240 src/f32-dwconv/gen/up4x3-minmax-neon-acc2.c
1241 src/f32-dwconv/gen/up4x3-minmax-neon.c
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1242 src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1243 src/f32-dwconv/gen/up4x4-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1244 src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1245 src/f32-dwconv/gen/up4x9-minmax-neon.c
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1246 src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1247 src/f32-dwconv/gen/up4x25-minmax-neon.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1248 src/f32-dwconv/gen/up8x3-minmax-neon-acc2.c
1249 src/f32-dwconv/gen/up8x3-minmax-neon.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1250 src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c
1251 src/f32-dwconv/gen/up8x4-minmax-neon.c
1252 src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c
1253 src/f32-dwconv/gen/up8x9-minmax-neon.c
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1254 src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1255 src/f32-dwconv/gen/up8x25-minmax-neon.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1256 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c
1257 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c
1258 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c
Marat Dukhanc581e482020-10-24 01:28:11 -0700[diff] [blame]1259 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1260 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c
Marat Dukhanc581e482020-10-24 01:28:11 -0700[diff] [blame]1261 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c
1262 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c
1263 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c
1264 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c
1265 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]1266 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c
1267 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c
1268 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1269 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]1270 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1271 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c
1272 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c
1273 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1274 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c
1275 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c
1276 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c
1277 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1278 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1279 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c
1280 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1281 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1282 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1283 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1284 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1285 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c
1286 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]1287 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c
1288 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c
1289 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c
1290 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c
1291 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c
1292 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c
1293 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c
1294 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]1295 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]1296 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c
Marat Dukhan4edfdbf2021-11-09 13:47:11 -0800[diff] [blame]1297 src/f32-f16-vcvt/gen/vcvt-neon-x8.c
1298 src/f32-f16-vcvt/gen/vcvt-neon-x16.c
1299 src/f32-f16-vcvt/gen/vcvt-neon-x24.c
1300 src/f32-f16-vcvt/gen/vcvt-neon-x32.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1301 src/f32-gavgpool-cw/neon-x4.c
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]1302 src/f32-gavgpool/7p7x-minmax-neon-c4.c
1303 src/f32-gavgpool/7x-minmax-neon-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1304 src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1305 src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c
1306 src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1307 src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1308 src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c
1309 src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c
1310 src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c
1311 src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c
1312 src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1313 src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c
1314 src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1315 src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c
1316 src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1317 src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c
1318 src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1319 src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c
1320 src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c
1321 src/f32-gemm/gen/1x8s4-minmax-neon.c
1322 src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c
1323 src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c
1324 src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c
1325 src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c
1326 src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c
1327 src/f32-gemm/gen/4x8s4-minmax-neon.c
1328 src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c
1329 src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c
1330 src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c
1331 src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c
1332 src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c
1333 src/f32-gemm/gen/6x8s4-minmax-neon.c
1334 src/f32-gemm/gen/8x8s4-minmax-neon.c
Artsiom Ablavatski2202c812021-01-22 14:16:43 -0800[diff] [blame]1335 src/f32-ibilinear-chw/gen/neon-p4.c
1336 src/f32-ibilinear-chw/gen/neon-p8.c
Frank Barchard8247e212021-02-03 18:12:33 -0800[diff] [blame]1337 src/f32-ibilinear/gen/neon-c4.c
1338 src/f32-ibilinear/gen/neon-c8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1339 src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1340 src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1341 src/f32-igemm/gen/1x8s4-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1342 src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c
1343 src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1344 src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1345 src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c
1346 src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c
1347 src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c
1348 src/f32-igemm/gen/4x8s4-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1349 src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c
1350 src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1351 src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c
1352 src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1353 src/f32-igemm/gen/6x8s4-minmax-neon.c
1354 src/f32-igemm/gen/8x8s4-minmax-neon.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1355 src/f32-maxpool/9p8x-minmax-neon-c4.c
1356 src/f32-pavgpool/9p8x-minmax-neon-c4.c
1357 src/f32-pavgpool/9x-minmax-neon-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1358 src/f32-ppmm/gen/4x8-minmax-neon.c
1359 src/f32-ppmm/gen/8x8-minmax-neon.c
Frank Barcharda5316982020-07-23 13:19:28 -0700[diff] [blame]1360 src/f32-prelu/gen/neon-1x4.c
1361 src/f32-prelu/gen/neon-1x8.c
1362 src/f32-prelu/gen/neon-1x16.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1363 src/f32-prelu/gen/neon-2x4.c
1364 src/f32-prelu/gen/neon-2x8.c
Frank Barcharda5316982020-07-23 13:19:28 -0700[diff] [blame]1365 src/f32-prelu/gen/neon-2x16.c
1366 src/f32-prelu/gen/neon-4x4.c
1367 src/f32-prelu/gen/neon-4x8.c
1368 src/f32-prelu/gen/neon-4x16.c
Marat Dukhanb2d0a2a2021-12-02 09:04:57 -0800[diff] [blame]1369 src/f32-qs8-vcvt/gen/vcvt-neon-x8.c
1370 src/f32-qs8-vcvt/gen/vcvt-neon-x16.c
1371 src/f32-qs8-vcvt/gen/vcvt-neon-x24.c
1372 src/f32-qs8-vcvt/gen/vcvt-neon-x32.c
1373 src/f32-qu8-vcvt/gen/vcvt-neon-x8.c
1374 src/f32-qu8-vcvt/gen/vcvt-neon-x16.c
1375 src/f32-qu8-vcvt/gen/vcvt-neon-x24.c
1376 src/f32-qu8-vcvt/gen/vcvt-neon-x32.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1377 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1378 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1379 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1380 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c
1381 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1382 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1383 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c
1384 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1385 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1386 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c
1387 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1388 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c
1389 src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c
1390 src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c
1391 src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c
1392 src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c
1393 src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c
1394 src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c
1395 src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c
1396 src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c
1397 src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c
1398 src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c
1399 src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c
1400 src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1401 src/f32-rmax/neon.c
Marat Dukhan5b86c432020-12-06 19:15:03 -0800[diff] [blame]1402 src/f32-spmm/gen/4x1-minmax-neon-pipelined.c
1403 src/f32-spmm/gen/4x1-minmax-neon-x2.c
1404 src/f32-spmm/gen/4x1-minmax-neon.c
1405 src/f32-spmm/gen/8x1-minmax-neon-pipelined.c
1406 src/f32-spmm/gen/8x1-minmax-neon-x2.c
1407 src/f32-spmm/gen/8x1-minmax-neon.c
1408 src/f32-spmm/gen/12x1-minmax-neon.c
1409 src/f32-spmm/gen/16x1-minmax-neon-pipelined.c
1410 src/f32-spmm/gen/16x1-minmax-neon-x2.c
1411 src/f32-spmm/gen/16x1-minmax-neon.c
1412 src/f32-spmm/gen/32x1-minmax-neon-pipelined.c
1413 src/f32-spmm/gen/32x1-minmax-neon-x2.c
1414 src/f32-spmm/gen/32x1-minmax-neon.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1415 src/f32-vbinary/gen/vadd-minmax-neon-x4.c
1416 src/f32-vbinary/gen/vadd-minmax-neon-x8.c
1417 src/f32-vbinary/gen/vaddc-minmax-neon-x4.c
1418 src/f32-vbinary/gen/vaddc-minmax-neon-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1419 src/f32-vbinary/gen/vmax-neon-x4.c
1420 src/f32-vbinary/gen/vmax-neon-x8.c
1421 src/f32-vbinary/gen/vmaxc-neon-x4.c
1422 src/f32-vbinary/gen/vmaxc-neon-x8.c
1423 src/f32-vbinary/gen/vmin-neon-x4.c
1424 src/f32-vbinary/gen/vmin-neon-x8.c
1425 src/f32-vbinary/gen/vminc-neon-x4.c
1426 src/f32-vbinary/gen/vminc-neon-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1427 src/f32-vbinary/gen/vmul-minmax-neon-x4.c
1428 src/f32-vbinary/gen/vmul-minmax-neon-x8.c
1429 src/f32-vbinary/gen/vmulc-minmax-neon-x4.c
1430 src/f32-vbinary/gen/vmulc-minmax-neon-x8.c
1431 src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c
1432 src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]1433 src/f32-vbinary/gen/vsqrdiff-neon-x4.c
1434 src/f32-vbinary/gen/vsqrdiff-neon-x8.c
1435 src/f32-vbinary/gen/vsqrdiffc-neon-x4.c
1436 src/f32-vbinary/gen/vsqrdiffc-neon-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1437 src/f32-vbinary/gen/vsub-minmax-neon-x4.c
1438 src/f32-vbinary/gen/vsub-minmax-neon-x8.c
1439 src/f32-vbinary/gen/vsubc-minmax-neon-x4.c
1440 src/f32-vbinary/gen/vsubc-minmax-neon-x8.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]1441 src/f32-vclamp/gen/vclamp-neon-x4.c
1442 src/f32-vclamp/gen/vclamp-neon-x8.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]1443 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c
1444 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c
1445 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c
1446 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c
1447 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c
1448 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c
1449 src/f32-velu/gen/velu-neon-rr2-p6-x4.c
1450 src/f32-velu/gen/velu-neon-rr2-p6-x8.c
1451 src/f32-velu/gen/velu-neon-rr2-p6-x12.c
1452 src/f32-velu/gen/velu-neon-rr2-p6-x16.c
1453 src/f32-velu/gen/velu-neon-rr2-p6-x20.c
1454 src/f32-velu/gen/velu-neon-rr2-p6-x24.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]1455 src/f32-vhswish/gen/vhswish-neon-x4.c
1456 src/f32-vhswish/gen/vhswish-neon-x8.c
1457 src/f32-vhswish/gen/vhswish-neon-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1458 src/f32-vlrelu/gen/vlrelu-neon-x4.c
1459 src/f32-vlrelu/gen/vlrelu-neon-x8.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1460 src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c
1461 src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]1462 src/f32-vrelu/gen/vrelu-neon-x4.c
1463 src/f32-vrelu/gen/vrelu-neon-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1464 src/f32-vrnd/gen/vrndd-neon-x4.c
1465 src/f32-vrnd/gen/vrndd-neon-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1466 src/f32-vrnd/gen/vrndne-neon-x4.c
1467 src/f32-vrnd/gen/vrndne-neon-x8.c
1468 src/f32-vrnd/gen/vrndu-neon-x4.c
1469 src/f32-vrnd/gen/vrndu-neon-x8.c
1470 src/f32-vrnd/gen/vrndz-neon-x4.c
1471 src/f32-vrnd/gen/vrndz-neon-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]1472 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c
1473 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c
1474 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c
1475 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c
1476 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c
1477 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c
1478 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c
1479 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c
1480 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c
1481 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c
1482 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c
1483 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c
1484 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c
1485 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c
1486 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c
1487 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c
1488 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c
1489 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]1490 src/f32-vunary/gen/vabs-neon-x4.c
1491 src/f32-vunary/gen/vabs-neon-x8.c
1492 src/f32-vunary/gen/vneg-neon-x4.c
1493 src/f32-vunary/gen/vneg-neon-x8.c
1494 src/f32-vunary/gen/vsqr-neon-x4.c
1495 src/f32-vunary/gen/vsqr-neon-x8.c
Marat Dukhan60f903b2021-09-30 09:43:13 -0700[diff] [blame]1496 src/math/cvt-f16-f32-neon-int16.c
1497 src/math/cvt-f16-f32-neon-int32.c
Marat Dukhana6eb1e52021-11-06 18:29:36 -0700[diff] [blame]1498 src/math/cvt-f32-f16-neon.c
Marat Dukhand24301d2021-12-02 00:13:45 -0800[diff] [blame]1499 src/math/cvt-f32-qs8-neon.c
1500 src/math/cvt-f32-qu8-neon.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]1501 src/math/expm1minus-neon-rr2-lut16-p3.c
1502 src/math/expm1minus-neon-rr2-p6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1503 src/math/roundd-neon-addsub.c
1504 src/math/roundd-neon-cvt.c
1505 src/math/roundne-neon-addsub.c
1506 src/math/roundu-neon-addsub.c
1507 src/math/roundu-neon-cvt.c
1508 src/math/roundz-neon-addsub.c
1509 src/math/roundz-neon-cvt.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1510 src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c
1511 src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c
1512 src/math/sigmoid-neon-rr2-p5-nr2recps.c
1513 src/math/sqrt-neon-nr1rsqrts.c
1514 src/math/sqrt-neon-nr2rsqrts.c
1515 src/math/sqrt-neon-nr3rsqrts.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1516 src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c
1517 src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1518 src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1519 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c
1520 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1521 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1522 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c
1523 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c
1524 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c
1525 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1526 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1527 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c
1528 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c
1529 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c
1530 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1531 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c
1532 src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c
1533 src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c
1534 src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c
1535 src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1536 src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1537 src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c
1538 src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1539 src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1540 src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c
1541 src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1542 src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c
1543 src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1544 src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c
1545 src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1546 src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1547 src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1548 src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c
1549 src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1550 src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1551 src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c
1552 src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1553 src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c
1554 src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1555 src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c
1556 src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1557 src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1558 src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1559 src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c
1560 src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1561 src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1562 src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c
1563 src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1564 src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c
1565 src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1566 src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c
1567 src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1568 src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1569 src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1570 src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c
1571 src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1572 src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1573 src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c
1574 src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1575 src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c
1576 src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1577 src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c
1578 src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1579 src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1580 src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1581 src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c
1582 src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1583 src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1584 src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1585 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c
1586 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1587 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1588 src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1589 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c
1590 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c
1591 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c
1592 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1593 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1594 src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1595 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c
1596 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c
1597 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c
1598 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1599 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1600 src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1601 src/qs8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1602 src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1603 src/qs8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1604 src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1605 src/qs8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1606 src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c
Frank Barchard2aa2e2a2021-09-16 14:59:13 -0700[diff] [blame]1607 src/qs8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1608 src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c
1609 src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c
1610 src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c
1611 src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c
1612 src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c
1613 src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c
1614 src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c
1615 src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1616 src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c
1617 src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1618 src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1619 src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1620 src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c
1621 src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1622 src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1623 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1624 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c
1625 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1626 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1627 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1628 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c
1629 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1630 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1631 src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c
1632 src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c
1633 src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c
1634 src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1635 src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c
1636 src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1637 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1638 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c
1639 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1640 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1641 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c
1642 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1643 src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c
1644 src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c
1645 src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c
1646 src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1647 src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1648 src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mull.c
1649 src/qs8-gemm/gen/1x8c16-minmax-rndnu-neon-mlal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1650 src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]1651 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c
1652 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]1653 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1654 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1655 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c
1656 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1657 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1658 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1659 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c
1660 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1661 src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1662 src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c
1663 src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c
1664 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1665 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c
1666 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1667 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1668 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c
1669 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1670 src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c
1671 src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1672 src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mlal.c
1673 src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mull.c
1674 src/qs8-gemm/gen/1x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1675 src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c
1676 src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1677 src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1678 src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1679 src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c
1680 src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1681 src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1682 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1683 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c
1684 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1685 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1686 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1687 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c
1688 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1689 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1690 src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c
1691 src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c
1692 src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c
1693 src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1694 src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c
1695 src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1696 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1697 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c
1698 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1699 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1700 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c
1701 src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1702 src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c
1703 src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c
1704 src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c
1705 src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1706 src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1707 src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mull.c
1708 src/qs8-gemm/gen/2x8c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1709 src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c
1710 src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1711 src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1712 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1713 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c
1714 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1715 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1716 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1717 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c
1718 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1719 src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1720 src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c
1721 src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c
1722 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1723 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c
1724 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1725 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1726 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c
1727 src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1728 src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c
1729 src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1730 src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mlal.c
1731 src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mull.c
1732 src/qs8-gemm/gen/2x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1733 src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c
1734 src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1735 src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1736 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1737 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c
1738 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1739 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1740 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1741 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c
1742 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1743 src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1744 src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c
1745 src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c
1746 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1747 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c
1748 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1749 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1750 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c
1751 src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1752 src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c
1753 src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1754 src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mlal.c
1755 src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mull.c
1756 src/qs8-gemm/gen/3x8c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1757 src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c
1758 src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1759 src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1760 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1761 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c
1762 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1763 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1764 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1765 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c
1766 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1767 src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1768 src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c
1769 src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c
1770 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1771 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c
1772 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1773 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1774 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c
1775 src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1776 src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c
1777 src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1778 src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mlal.c
1779 src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mull.c
1780 src/qs8-gemm/gen/3x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1781 src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c
1782 src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1783 src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1784 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1785 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c
1786 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1787 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1788 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1789 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c
1790 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1791 src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1792 src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c
1793 src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c
1794 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1795 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c
1796 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1797 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1798 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c
1799 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1800 src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c
1801 src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1802 src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mlal.c
1803 src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mull.c
1804 src/qs8-gemm/gen/4x8c16-minmax-rndnu-neon-mlal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1805 src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]1806 src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c
1807 src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]1808 src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1809 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1810 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c
1811 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1812 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1813 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1814 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c
1815 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1816 src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1817 src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c
1818 src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c
1819 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1820 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c
1821 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1822 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1823 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c
1824 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1825 src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c
1826 src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1827 src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mlal.c
1828 src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mull.c
1829 src/qs8-gemm/gen/4x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1830 src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c
1831 src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1832 src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c
1833 src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1834 src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c
1835 src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1836 src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1837 src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1838 src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c
1839 src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1840 src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1841 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1842 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c
1843 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1844 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1845 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1846 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c
1847 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1848 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1849 src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c
1850 src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c
1851 src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c
1852 src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1853 src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c
1854 src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1855 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1856 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c
1857 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1858 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1859 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c
1860 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1861 src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c
1862 src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c
1863 src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c
1864 src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1865 src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1866 src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mull.c
1867 src/qs8-igemm/gen/1x8c16-minmax-rndnu-neon-mlal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1868 src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]1869 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c
1870 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]1871 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1872 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1873 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c
1874 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1875 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1876 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1877 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c
1878 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1879 src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1880 src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c
1881 src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c
1882 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1883 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c
1884 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1885 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1886 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c
1887 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1888 src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c
1889 src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1890 src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mlal.c
1891 src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mull.c
1892 src/qs8-igemm/gen/1x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1893 src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c
1894 src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1895 src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1896 src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1897 src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c
1898 src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1899 src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1900 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1901 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c
1902 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1903 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1904 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1905 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c
1906 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1907 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1908 src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c
1909 src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c
1910 src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c
1911 src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1912 src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c
1913 src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1914 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1915 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c
1916 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1917 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1918 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c
1919 src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1920 src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c
1921 src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c
1922 src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c
1923 src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1924 src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1925 src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mull.c
1926 src/qs8-igemm/gen/2x8c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1927 src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c
1928 src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1929 src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1930 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1931 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c
1932 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1933 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1934 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1935 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c
1936 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1937 src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1938 src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c
1939 src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c
1940 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1941 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c
1942 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1943 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1944 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c
1945 src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1946 src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c
1947 src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1948 src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mlal.c
1949 src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mull.c
1950 src/qs8-igemm/gen/2x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1951 src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c
1952 src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1953 src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1954 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1955 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c
1956 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1957 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1958 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1959 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c
1960 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1961 src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1962 src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c
1963 src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c
1964 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1965 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c
1966 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1967 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1968 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c
1969 src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1970 src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c
1971 src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1972 src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mlal.c
1973 src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mull.c
1974 src/qs8-igemm/gen/3x8c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1975 src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c
1976 src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1977 src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1978 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1979 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c
1980 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1981 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1982 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]1983 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c
1984 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]1985 src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1986 src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c
1987 src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c
1988 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1989 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c
1990 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1991 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]1992 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c
1993 src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]1994 src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c
1995 src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]1996 src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mlal.c
1997 src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mull.c
1998 src/qs8-igemm/gen/3x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]1999 src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c
2000 src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]2001 src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2002 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2003 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c
2004 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2005 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2006 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2007 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c
2008 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2009 src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2010 src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c
2011 src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c
2012 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2013 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c
2014 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2015 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2016 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c
2017 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2018 src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c
2019 src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]2020 src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mlal.c
2021 src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mull.c
2022 src/qs8-igemm/gen/4x8c16-minmax-rndnu-neon-mlal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]2023 src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]2024 src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c
2025 src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2026 src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2027 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2028 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c
2029 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2030 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2031 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2032 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c
2033 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2034 src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2035 src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c
2036 src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c
2037 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2038 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c
2039 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2040 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2041 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c
2042 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2043 src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c
2044 src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c
Marat Dukhan89991902021-12-06 00:54:36 -0800[diff] [blame]2045 src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mlal.c
2046 src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mull.c
2047 src/qs8-igemm/gen/4x16c16-minmax-rndnu-neon-mlal.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]2048 src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c
2049 src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c
Frank Barchard27bf92c2021-11-24 15:47:52 -0800[diff] [blame]2050 src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c
2051 src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]2052 src/qs8-requantization/fp32-neon.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]2053 src/qs8-requantization/gemmlowp-neon.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]2054 src/qs8-requantization/rndna-neon.c
Marat Dukhand3d818c2021-07-16 17:56:54 -0700[diff] [blame]2055 src/qs8-requantization/rndnu-neon-mull.c
2056 src/qs8-requantization/rndnu-neon-qdmulh.c
Marat Dukhanba7b2792020-09-02 14:26:45 -0700[diff] [blame]2057 src/qs8-vadd/gen/minmax-neon-ld64-x8.c
2058 src/qs8-vadd/gen/minmax-neon-ld64-x16.c
2059 src/qs8-vadd/gen/minmax-neon-ld64-x24.c
2060 src/qs8-vadd/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]2061 src/qs8-vadd/gen/minmax-neon-ld128-x16.c
2062 src/qs8-vadd/gen/minmax-neon-ld128-x32.c
Marat Dukhanba7b2792020-09-02 14:26:45 -0700[diff] [blame]2063 src/qs8-vaddc/gen/minmax-neon-ld64-x8.c
2064 src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
2065 src/qs8-vaddc/gen/minmax-neon-ld64-x24.c
2066 src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]2067 src/qs8-vaddc/gen/minmax-neon-ld128-x16.c
2068 src/qs8-vaddc/gen/minmax-neon-ld128-x32.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]2069 src/qs8-vmul/gen/minmax-fp32-neon-ld64-x8.c
2070 src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c
2071 src/qs8-vmul/gen/minmax-fp32-neon-ld128-x16.c
2072 src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x8.c
2073 src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
2074 src/qs8-vmulc/gen/minmax-fp32-neon-ld128-x16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]2075 src/qu8-avgpool/9p8x-minmax-neon-c8.c
2076 src/qu8-avgpool/9x-minmax-neon-c8.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2077 src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2078 src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]2079 src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2080 src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2081 src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]2082 src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2083 src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2084 src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]2085 src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2086 src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2087 src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]2088 src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2089 src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2090 src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul8.c
2091 src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2092 src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2093 src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul8.c
2094 src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2095 src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2096 src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul8.c
2097 src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]2098 src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]2099 src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul8.c
2100 src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]2101 src/qu8-gavgpool/7p7x-minmax-neon-c8.c
2102 src/qu8-gavgpool/7x-minmax-neon-c8.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]2103 src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]2104 src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]2105 src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
2106 src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]2107 src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]2108 src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
2109 src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]2110 src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]2111 src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
2112 src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]2113 src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]2114 src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]2115 src/qu8-requantization/fp32-neon.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]2116 src/qu8-requantization/gemmlowp-neon.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]2117 src/qu8-requantization/rndna-neon.c
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]2118 src/qu8-vadd/gen/minmax-neon-ld64-x8.c
2119 src/qu8-vadd/gen/minmax-neon-ld64-x16.c
Frank Barchard0a3093c2021-08-31 09:58:11 -0700[diff] [blame]2120 src/qu8-vadd/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]2121 src/qu8-vadd/gen/minmax-neon-ld128-x16.c
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]2122 src/qu8-vaddc/gen/minmax-neon-ld64-x8.c
2123 src/qu8-vaddc/gen/minmax-neon-ld64-x16.c
Frank Barchard0a3093c2021-08-31 09:58:11 -0700[diff] [blame]2124 src/qu8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]2125 src/qu8-vaddc/gen/minmax-neon-ld128-x16.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]2126 src/qu8-vmul/gen/minmax-fp32-neon-ld64-x8.c
2127 src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c
2128 src/qu8-vmul/gen/minmax-fp32-neon-ld128-x16.c
2129 src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x8.c
2130 src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
2131 src/qu8-vmulc/gen/minmax-fp32-neon-ld128-x16.c
Marat Dukhancdb42a52021-11-22 20:09:32 -0800[diff] [blame]2132 src/s8-ibilinear/gen/neon-c8.c
2133 src/s8-ibilinear/gen/neon-c16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]2134 src/s8-maxpool/9p8x-minmax-neon-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]2135 src/s8-vclamp/neon-x64.c
Marat Dukhancdb42a52021-11-22 20:09:32 -0800[diff] [blame]2136 src/u8-ibilinear/gen/neon-c8.c
2137 src/u8-ibilinear/gen/neon-c16.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]2138 src/u8-maxpool/9p8x-minmax-neon-c16.c
Marat Dukhan36aecb52019-11-22 17:21:49 -0800[diff] [blame]2139 src/u8-rmax/neon.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]2140 src/u8-vclamp/neon-x64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2141 src/x8-zip/x2-neon.c
2142 src/x8-zip/x3-neon.c
2143 src/x8-zip/x4-neon.c
2144 src/x8-zip/xm-neon.c
Marat Dukhan36aecb52019-11-22 17:21:49 -0800[diff] [blame]2145 src/x32-packx/x4-neon-st4.c
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]2146 src/x32-unpool/neon.c
Marat Dukhan36aecb52019-11-22 17:21:49 -0800[diff] [blame]2147 src/x32-zip/x2-neon.c
2148 src/x32-zip/x3-neon.c
2149 src/x32-zip/x4-neon.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]2150 src/x32-zip/xm-neon.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]2151 src/xx-fill/neon-x64.c
2152 src/xx-pad/neon.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2153
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]2154SET(PROD_NEONFP16_MICROKERNEL_SRCS
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]2155 src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c
2156 src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c)
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]2157
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]2158SET(ALL_NEONFP16_MICROKERNEL_SRCS
2159 src/f16-f32-vcvt/gen/vcvt-neonfp16-x8.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]2160 src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]2161 src/f32-f16-vcvt/gen/vcvt-neonfp16-x8.c
2162 src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c
Marat Dukhan582e1842021-10-25 17:18:36 -0700[diff] [blame]2163 src/math/cvt-f16-f32-neonfp16.c
2164 src/math/cvt-f32-f16-neonfp16.c)
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]2165
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2166SET(PROD_NEONFMA_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2167 src/f32-dwconv/gen/up8x3-minmax-neonfma.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2168 src/f32-dwconv/gen/up8x4-minmax-neonfma.c
2169 src/f32-dwconv/gen/up8x9-minmax-neonfma.c
Frank Barcharddbe781b2021-10-18 10:29:52 -0700[diff] [blame]2170 src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2171 src/f32-gemm/gen/1x8s4-minmax-neonfma.c
2172 src/f32-gemm/gen/6x8s4-minmax-neonfma.c
2173 src/f32-ibilinear-chw/gen/neonfma-p8.c
2174 src/f32-ibilinear/gen/neonfma-c8.c
2175 src/f32-igemm/gen/1x8s4-minmax-neonfma.c
2176 src/f32-igemm/gen/6x8s4-minmax-neonfma.c
2177 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c
2178 src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c
2179 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c
2180 src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c
2181 src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c
2182 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c)
2183
2184SET(ALL_NEONFMA_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2185 src/f32-dwconv/gen/up4x3-minmax-neonfma-acc2.c
2186 src/f32-dwconv/gen/up4x3-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2187 src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c
2188 src/f32-dwconv/gen/up4x4-minmax-neonfma.c
2189 src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c
2190 src/f32-dwconv/gen/up4x9-minmax-neonfma.c
2191 src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c
2192 src/f32-dwconv/gen/up4x25-minmax-neonfma.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2193 src/f32-dwconv/gen/up8x3-minmax-neonfma-acc2.c
2194 src/f32-dwconv/gen/up8x3-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2195 src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c
2196 src/f32-dwconv/gen/up8x4-minmax-neonfma.c
2197 src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c
2198 src/f32-dwconv/gen/up8x9-minmax-neonfma.c
2199 src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c
2200 src/f32-dwconv/gen/up8x25-minmax-neonfma.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2201 src/f32-dwconv/gen/up16x3-minmax-neon-acc2.c
2202 src/f32-dwconv/gen/up16x3-minmax-neon.c
2203 src/f32-dwconv/gen/up16x3-minmax-neonfma-acc2.c
2204 src/f32-dwconv/gen/up16x3-minmax-neonfma.c
Frank Barchardc9f9d672021-10-18 12:51:59 -0700[diff] [blame]2205 src/f32-dwconv/gen/up16x4-minmax-neon-acc2.c
2206 src/f32-dwconv/gen/up16x4-minmax-neon.c
2207 src/f32-dwconv/gen/up16x4-minmax-neonfma-acc2.c
2208 src/f32-dwconv/gen/up16x4-minmax-neonfma.c
2209 src/f32-dwconv/gen/up16x9-minmax-neon-acc2.c
2210 src/f32-dwconv/gen/up16x9-minmax-neon.c
2211 src/f32-dwconv/gen/up16x9-minmax-neonfma-acc2.c
2212 src/f32-dwconv/gen/up16x9-minmax-neonfma.c
2213 src/f32-dwconv/gen/up16x25-minmax-neon-acc2.c
2214 src/f32-dwconv/gen/up16x25-minmax-neon.c
2215 src/f32-dwconv/gen/up16x25-minmax-neonfma-acc2.c
2216 src/f32-dwconv/gen/up16x25-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2217 src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c
2218 src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c
2219 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c
2220 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c
2221 src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c
2222 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c
2223 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c
2224 src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c
2225 src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c
2226 src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c
2227 src/f32-gemm/gen/1x8s4-minmax-neonfma.c
2228 src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c
2229 src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c
2230 src/f32-gemm/gen/4x8s4-minmax-neonfma.c
2231 src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c
2232 src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c
2233 src/f32-gemm/gen/6x8s4-minmax-neonfma.c
2234 src/f32-gemm/gen/8x8s4-minmax-neonfma.c
Artsiom Ablavatski2202c812021-01-22 14:16:43 -0800[diff] [blame]2235 src/f32-ibilinear-chw/gen/neonfma-p4.c
2236 src/f32-ibilinear-chw/gen/neonfma-p8.c
Frank Barchard8247e212021-02-03 18:12:33 -0800[diff] [blame]2237 src/f32-ibilinear/gen/neonfma-c4.c
2238 src/f32-ibilinear/gen/neonfma-c8.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2239 src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2240 src/f32-igemm/gen/1x8s4-minmax-neonfma.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2241 src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2242 src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c
2243 src/f32-igemm/gen/4x8s4-minmax-neonfma.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2244 src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c
2245 src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2246 src/f32-igemm/gen/6x8s4-minmax-neonfma.c
2247 src/f32-igemm/gen/8x8s4-minmax-neonfma.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2248 src/f32-ppmm/gen/4x8-minmax-neonfma.c
2249 src/f32-ppmm/gen/8x8-minmax-neonfma.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]2250 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]2251 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2252 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]2253 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c
2254 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2255 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]2256 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c
2257 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2258 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]2259 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c
2260 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2261 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c
2262 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c
2263 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c
2264 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c
2265 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c
2266 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c
2267 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c
2268 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c
2269 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c
2270 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c
2271 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c
2272 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c
2273 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -0800[diff] [blame]2274 src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c
2275 src/f32-spmm/gen/4x1-minmax-neonfma-x2.c
2276 src/f32-spmm/gen/4x1-minmax-neonfma.c
2277 src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c
2278 src/f32-spmm/gen/8x1-minmax-neonfma-x2.c
2279 src/f32-spmm/gen/8x1-minmax-neonfma.c
2280 src/f32-spmm/gen/12x1-minmax-neonfma.c
2281 src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c
2282 src/f32-spmm/gen/16x1-minmax-neonfma-x2.c
2283 src/f32-spmm/gen/16x1-minmax-neonfma.c
2284 src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c
2285 src/f32-spmm/gen/32x1-minmax-neonfma-x2.c
2286 src/f32-spmm/gen/32x1-minmax-neonfma.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]2287 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c
2288 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c
2289 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c
2290 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c
2291 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c
2292 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c
2293 src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c
2294 src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c
2295 src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c
2296 src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c
2297 src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c
2298 src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]2299 src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c
2300 src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2301 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c
2302 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c
2303 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c
2304 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c
2305 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c
2306 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c
2307 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c
2308 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c
2309 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c
2310 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c
2311 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c
2312 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c
2313 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c
2314 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c
2315 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c
2316 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c
2317 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c
2318 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c
2319 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c
2320 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c
2321 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c
2322 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c
2323 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c
2324 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c
2325 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c
2326 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c
2327 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c
2328 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c
2329 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c
2330 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c
2331 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c
2332 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c
2333 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c
2334 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c
2335 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c
2336 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c
2337 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c
2338 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c
2339 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c
2340 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c
2341 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c
2342 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c
2343 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c
2344 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c
2345 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c
2346 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c
2347 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c
2348 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c
2349 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c
2350 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c
2351 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c
2352 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c
2353 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c
2354 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]2355 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c
2356 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c
2357 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c
2358 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c
2359 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c
2360 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c
2361 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c
2362 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c
2363 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c
2364 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c
2365 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c
2366 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c
2367 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c
2368 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c
2369 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c
2370 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c
2371 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c
2372 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c
2373 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c
2374 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]2375 src/math/exp-neonfma-rr2-lut64-p2.c
2376 src/math/exp-neonfma-rr2-p5.c
Frank Barcharde7223ee2020-12-04 19:04:01 -0800[diff] [blame]2377 src/math/expm1minus-neonfma-rr1-lut16-p3.c
2378 src/math/expm1minus-neonfma-rr1-p6.c
Marat Dukhan9dd119a2020-11-20 18:20:04 -0800[diff] [blame]2379 src/math/expminus-neonfma-rr2-lut64-p2.c
2380 src/math/expminus-neonfma-rr2-lut2048-p1.c
2381 src/math/expminus-neonfma-rr2-p5.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2382 src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c
2383 src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c
2384 src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2385 src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c
2386 src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c
2387 src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2388 src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c
2389 src/math/sigmoid-neonfma-rr1-p5-nr2fma.c
2390 src/math/sigmoid-neonfma-rr1-p5-nr2recps.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2391 src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c
2392 src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c
2393 src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2394 src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c
2395 src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c
2396 src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2397 src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c
2398 src/math/sigmoid-neonfma-rr2-p5-nr2fma.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2399 src/math/sigmoid-neonfma-rr2-p5-nr2recps.c
2400 src/math/sqrt-neonfma-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2401 src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2402 src/math/sqrt-neonfma-nr2fma.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2403 src/math/sqrt-neonfma-nr2fma1adj.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2404 src/math/sqrt-neonfma-nr3fma.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2405
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]2406SET(PROD_AARCH64_NEON_MICROKERNEL_SRCS
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2407 src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c
2408 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c
2409 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c
2410 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c
2411 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c
2412 src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c
2413 src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c
2414 src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c
2415 src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c
2416 src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c
2417 src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c
2418 src/f32-spmm/gen/32x2-minmax-neonfma.c
2419 src/f32-spmm/gen/32x4-minmax-neonfma.c
2420 src/f32-vbinary/gen/vdiv-minmax-neon-x8.c
2421 src/f32-vbinary/gen/vdivc-minmax-neon-x8.c
2422 src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c
Marat Dukhane4118ef2021-09-14 17:41:00 -0700[diff] [blame]2423 src/f32-vsqrt/gen/neon-sqrt-x4.c
2424 src/x8-lut/gen/lut-neon-tbx128x4-x64.c)
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2425
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]2426SET(ALL_AARCH64_NEON_MICROKERNEL_SRCS
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]2427 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2428 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2429 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2430 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]2431 src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2432 src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2433 src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2434 src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]2435 src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2436 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c
2437 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c
2438 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c
Marat Dukhan1268a242020-10-24 00:36:32 -0700[diff] [blame]2439 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2440 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c
Marat Dukhan1268a242020-10-24 00:36:32 -0700[diff] [blame]2441 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c
2442 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c
2443 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c
2444 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c
2445 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]2446 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c
2447 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c
2448 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2449 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]2450 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2451 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c
2452 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c
2453 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2454 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c
2455 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c
2456 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c
2457 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2458 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2459 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c
2460 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2461 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2462 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2463 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2464 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2465 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c
2466 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]2467 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c
2468 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c
2469 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c
2470 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c
2471 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c
2472 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c
2473 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c
2474 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]2475 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2476 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2477 src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c
2478 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c
2479 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c
2480 src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c
2481 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c
2482 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c
2483 src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c
2484 src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c
2485 src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c
2486 src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c
2487 src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c
2488 src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c
2489 src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c
2490 src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c
2491 src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c
2492 src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c
2493 src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c
2494 src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c
2495 src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c
2496 src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]2497 src/f32-spmm/gen/4x2-minmax-neonfma.c
2498 src/f32-spmm/gen/4x4-minmax-neonfma.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]2499 src/f32-spmm/gen/8x2-minmax-neonfma.c
2500 src/f32-spmm/gen/8x4-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2501 src/f32-spmm/gen/12x2-minmax-neonfma.c
2502 src/f32-spmm/gen/12x4-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2503 src/f32-spmm/gen/16x2-minmax-neonfma.c
2504 src/f32-spmm/gen/16x4-minmax-neonfma.c
Frank Barchard846c0c62020-10-26 15:01:39 -0700[diff] [blame]2505 src/f32-spmm/gen/32x2-minmax-neonfma.c
2506 src/f32-spmm/gen/32x4-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2507 src/f32-vbinary/gen/vdiv-minmax-neon-x4.c
2508 src/f32-vbinary/gen/vdiv-minmax-neon-x8.c
2509 src/f32-vbinary/gen/vdivc-minmax-neon-x4.c
2510 src/f32-vbinary/gen/vdivc-minmax-neon-x8.c
2511 src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c
2512 src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2513 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c
2514 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c
2515 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c
2516 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c
2517 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c
2518 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c
2519 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c
2520 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c
2521 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c
2522 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c
2523 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c
2524 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c
2525 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c
2526 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c
2527 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c
2528 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c
2529 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c
2530 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]2531 src/f32-vsqrt/gen/neon-sqrt-x4.c
2532 src/f32-vsqrt/gen/neon-sqrt-x8.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2533 src/math/sigmoid-neonfma-rr1-lut64-p2-div.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2534 src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2535 src/math/sigmoid-neonfma-rr1-p5-div.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2536 src/math/sigmoid-neonfma-rr2-lut64-p2-div.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2537 src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]2538 src/math/sigmoid-neonfma-rr2-p5-div.c
2539 src/x8-lut/gen/lut-neon-tbx128x4-x16.c
2540 src/x8-lut/gen/lut-neon-tbx128x4-x32.c
2541 src/x8-lut/gen/lut-neon-tbx128x4-x48.c
2542 src/x8-lut/gen/lut-neon-tbx128x4-x64.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2543
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2544SET(PROD_NEONV8_MICROKERNEL_SRCS
Marat Dukhaned2d7762021-12-03 23:51:19 -0800[diff] [blame]2545 src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c
2546 src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2547 src/f32-vrnd/gen/vrndd-neonv8-x8.c
2548 src/f32-vrnd/gen/vrndne-neonv8-x8.c
2549 src/f32-vrnd/gen/vrndu-neonv8-x8.c
2550 src/f32-vrnd/gen/vrndz-neonv8-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2551 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c
Frank Barchard7da8b022021-08-31 09:49:10 -0700[diff] [blame]2552 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c
2553 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2554 src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c
2555 src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2556 src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2557 src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c
2558 src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2559 src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2560 src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c
2561 src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2562 src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2563 src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c
2564 src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]2565 src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2566 src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2567 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c
2568 src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2569 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2570
2571SET(ALL_NEONV8_MICROKERNEL_SRCS
2572 src/f32-vrnd/gen/vrndd-neonv8-x4.c
2573 src/f32-vrnd/gen/vrndd-neonv8-x8.c
2574 src/f32-vrnd/gen/vrndne-neonv8-x4.c
2575 src/f32-vrnd/gen/vrndne-neonv8-x8.c
2576 src/f32-vrnd/gen/vrndu-neonv8-x4.c
2577 src/f32-vrnd/gen/vrndu-neonv8-x8.c
2578 src/f32-vrnd/gen/vrndz-neonv8-x4.c
2579 src/f32-vrnd/gen/vrndz-neonv8-x8.c
Marat Dukhan3df14d32021-12-01 13:05:51 -0800[diff] [blame]2580 src/f32-qs8-vcvt/gen/vcvt-neonv8-x8.c
2581 src/f32-qs8-vcvt/gen/vcvt-neonv8-x16.c
2582 src/f32-qs8-vcvt/gen/vcvt-neonv8-x24.c
2583 src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c
2584 src/f32-qu8-vcvt/gen/vcvt-neonv8-x8.c
2585 src/f32-qu8-vcvt/gen/vcvt-neonv8-x16.c
2586 src/f32-qu8-vcvt/gen/vcvt-neonv8-x24.c
2587 src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c
Marat Dukhand24301d2021-12-02 00:13:45 -0800[diff] [blame]2588 src/math/cvt-f32-qs8-neonv8.c
2589 src/math/cvt-f32-qu8-neonv8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2590 src/math/roundd-neonv8.c
2591 src/math/roundne-neonv8.c
2592 src/math/roundu-neonv8.c
2593 src/math/roundz-neonv8.c
2594 src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c
2595 src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8-ld64.c
2596 src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c
2597 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c
2598 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8-ld64.c
2599 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c
2600 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c
2601 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld128.c
2602 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld64.c
2603 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c
2604 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c
2605 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c
2606 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c
2607 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld64.c
2608 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld128.c
2609 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c
2610 src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c
2611 src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c
2612 src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c
2613 src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2614 src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2615 src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2616 src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2617 src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2618 src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c
2619 src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2620 src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2621 src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2622 src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c
2623 src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2624 src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2625 src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2626 src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2627 src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2628 src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2629 src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c
2630 src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2631 src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2632 src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2633 src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c
2634 src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2635 src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2636 src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2637 src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2638 src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2639 src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2640 src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c
2641 src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2642 src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2643 src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2644 src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c
2645 src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2646 src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2647 src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2648 src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2649 src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2650 src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2651 src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c
2652 src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2653 src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2654 src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2655 src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c
2656 src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2657 src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2658 src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c
2659 src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c
2660 src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c
2661 src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c
2662 src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c
2663 src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c
2664 src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c
2665 src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2666 src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2667 src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2668 src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2669 src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2670 src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c
2671 src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2672 src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2673 src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2674 src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c
2675 src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2676 src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2677 src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2678 src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2679 src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2680 src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2681 src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c
2682 src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2683 src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2684 src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2685 src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c
2686 src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2687 src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2688 src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2689 src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2690 src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2691 src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2692 src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c
2693 src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2694 src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2695 src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2696 src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c
2697 src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2698 src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2699 src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard15eec022021-11-17 13:26:20 -0800[diff] [blame]2700 src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c
2701 src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barchard42f5c502021-11-16 10:04:21 -0800[diff] [blame]2702 src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2703 src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c
2704 src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c
Frank Barchard64ab1b72021-11-22 10:57:40 -0800[diff] [blame]2705 src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c
2706 src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]2707 src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c
2708 src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2709 src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]2710 src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c
2711 src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2712 src/qs8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c
2713 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c
2714 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c
2715 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2716 src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c
2717 src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c
2718 src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c
2719 src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c
2720 src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c
2721 src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c
2722 src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c
2723 src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c
2724 src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2725 src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2726 src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]2727 src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2728 src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c
2729 src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2730 src/qu8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c
2731 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c
2732 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c
2733 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2734
2735SET(PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS
2736 src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c
2737 src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c
2738 src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c
2739 src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c
2740 src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c
2741 src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c
2742 src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c
2743 src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c
2744 src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c
2745 src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c
2746 src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c
2747 src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c
2748 src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c
2749 src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c
2750 src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c)
2751
2752SET(ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]2753 src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c
2754 src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c
2755 src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c
2756 src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2757 src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c
2758 src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c
2759 src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c
2760 src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c
2761 src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c
2762 src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c
2763 src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c
2764 src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c
Frank Barchardc9f9d672021-10-18 12:51:59 -0700[diff] [blame]2765 src/f16-dwconv/gen/up32x4-minmax-neonfp16arith-acc2.c
2766 src/f16-dwconv/gen/up32x4-minmax-neonfp16arith.c
2767 src/f16-dwconv/gen/up32x9-minmax-neonfp16arith-acc2.c
2768 src/f16-dwconv/gen/up32x9-minmax-neonfp16arith.c
2769 src/f16-dwconv/gen/up32x25-minmax-neonfp16arith-acc2.c
2770 src/f16-dwconv/gen/up32x25-minmax-neonfp16arith.c
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]2771 src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c
2772 src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]2773 src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2774 src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2775 src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2776 src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2777 src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2778 src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2779 src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2780 src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2781 src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c
2782 src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c
2783 src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c
2784 src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c
2785 src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c
2786 src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c
2787 src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c
2788 src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2789 src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2790 src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2791 src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2792 src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2793 src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2794 src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2795 src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2796 src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2797 src/f16-prelu/gen/neonfp16arith-2x8.c
2798 src/f16-prelu/gen/neonfp16arith-2x16.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2799 src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2800 src/f16-spmm/gen/8x1-minmax-neonfp16arith.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2801 src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2802 src/f16-spmm/gen/16x1-minmax-neonfp16arith.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2803 src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2804 src/f16-spmm/gen/24x1-minmax-neonfp16arith.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2805 src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]2806 src/f16-spmm/gen/32x1-minmax-neonfp16arith.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2807 src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c
2808 src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c
2809 src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c
2810 src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c
2811 src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c
2812 src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c
2813 src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c
2814 src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c
2815 src/f16-vbinary/gen/vmax-neonfp16arith-x8.c
2816 src/f16-vbinary/gen/vmax-neonfp16arith-x16.c
2817 src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c
2818 src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c
2819 src/f16-vbinary/gen/vmin-neonfp16arith-x8.c
2820 src/f16-vbinary/gen/vmin-neonfp16arith-x16.c
2821 src/f16-vbinary/gen/vminc-neonfp16arith-x8.c
2822 src/f16-vbinary/gen/vminc-neonfp16arith-x16.c
2823 src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c
2824 src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c
2825 src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c
2826 src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c
2827 src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c
2828 src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c
2829 src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c
2830 src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c
2831 src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c
2832 src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c
2833 src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c
2834 src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2835 src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c
2836 src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]2837 src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c
2838 src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2839 src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]2840 src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2841 src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c
2842 src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2843
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2844SET(PROD_NEONDOT_MICROKERNEL_SRCS
2845 src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c
2846 src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c
2847 src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c
2848 src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c
2849 src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c
2850 src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c
2851 src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c
2852 src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c
2853 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
2854 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
2855 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c
2856 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
2857 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
2858 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
2859 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c
Frank Barchard20255152021-08-11 14:01:45 -0700[diff] [blame]2860 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barchard8b698022021-08-26 11:17:32 -0700[diff] [blame]2861 src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
Frank Barchardde9c64a2021-08-17 18:32:50 -0700[diff] [blame]2862 src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
2863 src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c
2864 src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barchard8b698022021-08-26 11:17:32 -0700[diff] [blame]2865 src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
Frank Barchardde9c64a2021-08-17 18:32:50 -0700[diff] [blame]2866 src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
2867 src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c
2868 src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2869
2870SET(ALL_NEONDOT_MICROKERNEL_SRCS
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]2871 src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c
2872 src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c
2873 src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c
2874 src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c
2875 src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c
2876 src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c
2877 src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c
2878 src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c
2879 src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c
2880 src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c
2881 src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c
2882 src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c
2883 src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c
2884 src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c
2885 src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c
2886 src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c
Marat Dukhan18630de2021-06-02 22:20:01 -0700[diff] [blame]2887 src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2888 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2889 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2890 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2891 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
Marat Dukhan4486f872021-08-07 15:22:50 -0700[diff] [blame]2892 src/qs8-gemm/gen/6x8c4-minmax-rndnu-neondot.c
2893 src/qs8-gemm/gen/6x16c4-minmax-rndnu-neondot.c
2894 src/qs8-gemm/gen/8x8c4-minmax-rndnu-neondot.c
2895 src/qs8-gemm/gen/8x16c4-minmax-rndnu-neondot.c
Marat Dukhan18630de2021-06-02 22:20:01 -0700[diff] [blame]2896 src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2897 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2898 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2899 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2900 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c
Marat Dukhan4486f872021-08-07 15:22:50 -0700[diff] [blame]2901 src/qs8-igemm/gen/6x8c4-minmax-rndnu-neondot.c
2902 src/qs8-igemm/gen/6x16c4-minmax-rndnu-neondot.c
2903 src/qs8-igemm/gen/8x8c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2904 src/qs8-igemm/gen/8x16c4-minmax-rndnu-neondot.c
2905 src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
2906 src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2907 src/qu8-gemm/gen/1x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2908 src/qu8-gemm/gen/2x8c4-minmax-rndnu-neondot.c
2909 src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2910 src/qu8-gemm/gen/2x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2911 src/qu8-gemm/gen/3x8c4-minmax-rndnu-neondot.c
2912 src/qu8-gemm/gen/3x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2913 src/qu8-gemm/gen/3x32c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2914 src/qu8-gemm/gen/4x8c4-minmax-rndnu-neondot.c
2915 src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2916 src/qu8-gemm/gen/5x8c4-minmax-rndnu-neondot.c
2917 src/qu8-gemm/gen/5x16c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2918 src/qu8-gemm/gen/6x8c4-minmax-rndnu-neondot.c
2919 src/qu8-gemm/gen/6x16c4-minmax-rndnu-neondot.c
2920 src/qu8-gemm/gen/8x8c4-minmax-rndnu-neondot.c
2921 src/qu8-gemm/gen/8x16c4-minmax-rndnu-neondot.c
2922 src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
2923 src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2924 src/qu8-igemm/gen/1x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2925 src/qu8-igemm/gen/2x8c4-minmax-rndnu-neondot.c
2926 src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2927 src/qu8-igemm/gen/2x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2928 src/qu8-igemm/gen/3x8c4-minmax-rndnu-neondot.c
2929 src/qu8-igemm/gen/3x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2930 src/qu8-igemm/gen/3x32c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2931 src/qu8-igemm/gen/4x8c4-minmax-rndnu-neondot.c
2932 src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2933 src/qu8-igemm/gen/5x8c4-minmax-rndnu-neondot.c
2934 src/qu8-igemm/gen/5x16c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2935 src/qu8-igemm/gen/6x8c4-minmax-rndnu-neondot.c
2936 src/qu8-igemm/gen/6x16c4-minmax-rndnu-neondot.c
2937 src/qu8-igemm/gen/8x8c4-minmax-rndnu-neondot.c
2938 src/qu8-igemm/gen/8x16c4-minmax-rndnu-neondot.c)
Benoit Jacoba9644732020-08-13 12:48:55 -0700[diff] [blame]2939
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2940SET(PROD_SSE_MICROKERNEL_SRCS
2941 src/f32-avgpool/9p8x-minmax-sse-c4.c
2942 src/f32-avgpool/9x-minmax-sse-c4.c
2943 src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2944 src/f32-dwconv/gen/up8x3-minmax-sse.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2945 src/f32-dwconv/gen/up8x4-minmax-sse.c
2946 src/f32-dwconv/gen/up8x9-minmax-sse.c
2947 src/f32-dwconv/gen/up8x25-minmax-sse.c
2948 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c
2949 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c
2950 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c
2951 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c
2952 src/f32-gavgpool-cw/sse-x4.c
2953 src/f32-gavgpool/7p7x-minmax-sse-c4.c
2954 src/f32-gavgpool/7x-minmax-sse-c4.c
2955 src/f32-gemm/gen/1x8-minmax-sse-load1.c
2956 src/f32-gemm/gen/4x2c4-minmax-sse.c
2957 src/f32-gemm/gen/4x8-minmax-sse-load1.c
2958 src/f32-ibilinear-chw/gen/sse-p8.c
2959 src/f32-ibilinear/gen/sse-c8.c
2960 src/f32-igemm/gen/1x8-minmax-sse-load1.c
2961 src/f32-igemm/gen/4x2c4-minmax-sse.c
2962 src/f32-igemm/gen/4x8-minmax-sse-load1.c
2963 src/f32-maxpool/9p8x-minmax-sse-c4.c
2964 src/f32-pavgpool/9p8x-minmax-sse-c4.c
2965 src/f32-pavgpool/9x-minmax-sse-c4.c
2966 src/f32-rmax/sse.c
2967 src/f32-spmm/gen/32x1-minmax-sse.c
2968 src/f32-vbinary/gen/vadd-minmax-sse-x8.c
2969 src/f32-vbinary/gen/vaddc-minmax-sse-x8.c
2970 src/f32-vbinary/gen/vdiv-minmax-sse-x8.c
2971 src/f32-vbinary/gen/vdivc-minmax-sse-x8.c
2972 src/f32-vbinary/gen/vmax-sse-x8.c
2973 src/f32-vbinary/gen/vmaxc-sse-x8.c
2974 src/f32-vbinary/gen/vmin-sse-x8.c
2975 src/f32-vbinary/gen/vminc-sse-x8.c
2976 src/f32-vbinary/gen/vmul-minmax-sse-x8.c
2977 src/f32-vbinary/gen/vmulc-minmax-sse-x8.c
2978 src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c
2979 src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c
2980 src/f32-vbinary/gen/vsqrdiff-sse-x8.c
2981 src/f32-vbinary/gen/vsqrdiffc-sse-x8.c
2982 src/f32-vbinary/gen/vsub-minmax-sse-x8.c
2983 src/f32-vbinary/gen/vsubc-minmax-sse-x8.c
2984 src/f32-vclamp/gen/vclamp-sse-x8.c
2985 src/f32-vhswish/gen/vhswish-sse-x8.c
2986 src/f32-vlrelu/gen/vlrelu-sse-x8.c
2987 src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c
2988 src/f32-vsqrt/gen/sse-sqrt-x4.c
2989 src/f32-vunary/gen/vabs-sse-x8.c
2990 src/f32-vunary/gen/vneg-sse-x8.c
2991 src/f32-vunary/gen/vsqr-sse-x8.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]2992 src/x32-packx/x4-sse.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2993
2994SET(ALL_SSE_MICROKERNEL_SRCS
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]2995 src/f32-avgpool/9p8x-minmax-sse-c4.c
2996 src/f32-avgpool/9x-minmax-sse-c4.c
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]2997 src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c
2998 src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2999 src/f32-dwconv/gen/up4x3-minmax-sse-acc2.c
3000 src/f32-dwconv/gen/up4x3-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3001 src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c
3002 src/f32-dwconv/gen/up4x4-minmax-sse.c
3003 src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c
3004 src/f32-dwconv/gen/up4x9-minmax-sse.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3005 src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c
3006 src/f32-dwconv/gen/up4x25-minmax-sse.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]3007 src/f32-dwconv/gen/up8x3-minmax-sse-acc2.c
3008 src/f32-dwconv/gen/up8x3-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3009 src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c
3010 src/f32-dwconv/gen/up8x4-minmax-sse.c
3011 src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c
3012 src/f32-dwconv/gen/up8x9-minmax-sse.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3013 src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c
3014 src/f32-dwconv/gen/up8x25-minmax-sse.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3015 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c
3016 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c
3017 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c
Marat Dukhan470078a2020-10-23 22:36:52 -0700[diff] [blame]3018 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3019 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c
Marat Dukhan470078a2020-10-23 22:36:52 -0700[diff] [blame]3020 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c
3021 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c
3022 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c
3023 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c
3024 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c
Marat Dukhan0ff97182020-10-25 19:14:03 -0700[diff] [blame]3025 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c
3026 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c
3027 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3028 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c
Marat Dukhan0ff97182020-10-25 19:14:03 -0700[diff] [blame]3029 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3030 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c
3031 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c
3032 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c
Marat Dukhand0503892020-10-30 08:22:04 -0700[diff] [blame]3033 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c
3034 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c
3035 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c
3036 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c
3037 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c
3038 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c
3039 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c
3040 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c
3041 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c
3042 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c
3043 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c
3044 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c
3045 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c
Marat Dukhanccca2142020-10-30 17:32:45 -0700[diff] [blame]3046 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c
3047 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c
3048 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c
3049 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c
3050 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c
3051 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c
3052 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c
3053 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c
Marat Dukhanccca2142020-10-30 17:32:45 -0700[diff] [blame]3054 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c
Frank Barchard9cef5ea2020-11-18 14:52:08 -0800[diff] [blame]3055 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3056 src/f32-gavgpool-cw/sse-x4.c
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]3057 src/f32-gavgpool/7p7x-minmax-sse-c4.c
3058 src/f32-gavgpool/7x-minmax-sse-c4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3059 src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c
3060 src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c
3061 src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3062 src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c
3063 src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c
3064 src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3065 src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c
3066 src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c
3067 src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3068 src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c
3069 src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c
3070 src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3071 src/f32-gemm/gen/1x8-minmax-sse-dup.c
3072 src/f32-gemm/gen/1x8-minmax-sse-load1.c
3073 src/f32-gemm/gen/1x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3074 src/f32-gemm/gen/3x8-minmax-sse-dup.c
3075 src/f32-gemm/gen/3x8-minmax-sse-load1.c
3076 src/f32-gemm/gen/3x8s4-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3077 src/f32-gemm/gen/4x2c4-minmax-sse.c
3078 src/f32-gemm/gen/4x8-minmax-sse-dup.c
3079 src/f32-gemm/gen/4x8-minmax-sse-load1.c
3080 src/f32-gemm/gen/4x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3081 src/f32-gemm/gen/5x8-minmax-sse-dup.c
3082 src/f32-gemm/gen/5x8-minmax-sse-load1.c
3083 src/f32-gemm/gen/5x8s4-minmax-sse.c
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -0700[diff] [blame]3084 src/f32-ibilinear-chw/gen/sse-p4.c
3085 src/f32-ibilinear-chw/gen/sse-p8.c
Frank Barchard4a352042021-04-13 15:52:08 -0700[diff] [blame]3086 src/f32-ibilinear/gen/sse-c4.c
3087 src/f32-ibilinear/gen/sse-c8.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3088 src/f32-igemm/gen/1x8-minmax-sse-dup.c
3089 src/f32-igemm/gen/1x8-minmax-sse-load1.c
3090 src/f32-igemm/gen/1x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3091 src/f32-igemm/gen/3x8-minmax-sse-dup.c
3092 src/f32-igemm/gen/3x8-minmax-sse-load1.c
3093 src/f32-igemm/gen/3x8s4-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3094 src/f32-igemm/gen/4x2c4-minmax-sse.c
3095 src/f32-igemm/gen/4x8-minmax-sse-dup.c
3096 src/f32-igemm/gen/4x8-minmax-sse-load1.c
3097 src/f32-igemm/gen/4x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3098 src/f32-igemm/gen/5x8-minmax-sse-dup.c
3099 src/f32-igemm/gen/5x8-minmax-sse-load1.c
3100 src/f32-igemm/gen/5x8s4-minmax-sse.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3101 src/f32-maxpool/9p8x-minmax-sse-c4.c
3102 src/f32-pavgpool/9p8x-minmax-sse-c4.c
3103 src/f32-pavgpool/9x-minmax-sse-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3104 src/f32-ppmm/gen/4x8-minmax-sse.c
Marat Dukhan39b5e942020-06-24 15:03:48 -0700[diff] [blame]3105 src/f32-prelu/gen/sse-2x4.c
3106 src/f32-prelu/gen/sse-2x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3107 src/f32-rmax/sse.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3108 src/f32-spmm/gen/4x1-minmax-sse.c
3109 src/f32-spmm/gen/8x1-minmax-sse.c
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]3110 src/f32-spmm/gen/16x1-minmax-sse.c
Frank Barchard846c0c62020-10-26 15:01:39 -0700[diff] [blame]3111 src/f32-spmm/gen/32x1-minmax-sse.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3112 src/f32-vbinary/gen/vadd-minmax-sse-x4.c
3113 src/f32-vbinary/gen/vadd-minmax-sse-x8.c
3114 src/f32-vbinary/gen/vaddc-minmax-sse-x4.c
3115 src/f32-vbinary/gen/vaddc-minmax-sse-x8.c
3116 src/f32-vbinary/gen/vdiv-minmax-sse-x4.c
3117 src/f32-vbinary/gen/vdiv-minmax-sse-x8.c
3118 src/f32-vbinary/gen/vdivc-minmax-sse-x4.c
3119 src/f32-vbinary/gen/vdivc-minmax-sse-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]3120 src/f32-vbinary/gen/vmax-sse-x4.c
3121 src/f32-vbinary/gen/vmax-sse-x8.c
3122 src/f32-vbinary/gen/vmaxc-sse-x4.c
3123 src/f32-vbinary/gen/vmaxc-sse-x8.c
3124 src/f32-vbinary/gen/vmin-sse-x4.c
3125 src/f32-vbinary/gen/vmin-sse-x8.c
3126 src/f32-vbinary/gen/vminc-sse-x4.c
3127 src/f32-vbinary/gen/vminc-sse-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3128 src/f32-vbinary/gen/vmul-minmax-sse-x4.c
3129 src/f32-vbinary/gen/vmul-minmax-sse-x8.c
3130 src/f32-vbinary/gen/vmulc-minmax-sse-x4.c
3131 src/f32-vbinary/gen/vmulc-minmax-sse-x8.c
3132 src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c
3133 src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c
3134 src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c
3135 src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]3136 src/f32-vbinary/gen/vsqrdiff-sse-x4.c
3137 src/f32-vbinary/gen/vsqrdiff-sse-x8.c
3138 src/f32-vbinary/gen/vsqrdiffc-sse-x4.c
3139 src/f32-vbinary/gen/vsqrdiffc-sse-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3140 src/f32-vbinary/gen/vsub-minmax-sse-x4.c
3141 src/f32-vbinary/gen/vsub-minmax-sse-x8.c
3142 src/f32-vbinary/gen/vsubc-minmax-sse-x4.c
3143 src/f32-vbinary/gen/vsubc-minmax-sse-x8.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]3144 src/f32-vclamp/gen/vclamp-sse-x4.c
3145 src/f32-vclamp/gen/vclamp-sse-x8.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]3146 src/f32-vhswish/gen/vhswish-sse-x4.c
3147 src/f32-vhswish/gen/vhswish-sse-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3148 src/f32-vlrelu/gen/vlrelu-sse-x4.c
3149 src/f32-vlrelu/gen/vlrelu-sse-x8.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3150 src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c
3151 src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]3152 src/f32-vrelu/gen/vrelu-sse-x4.c
3153 src/f32-vrelu/gen/vrelu-sse-x8.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]3154 src/f32-vsqrt/gen/sse-sqrt-x4.c
3155 src/f32-vsqrt/gen/sse-sqrt-x8.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]3156 src/f32-vunary/gen/vabs-sse-x4.c
3157 src/f32-vunary/gen/vabs-sse-x8.c
3158 src/f32-vunary/gen/vneg-sse-x4.c
3159 src/f32-vunary/gen/vneg-sse-x8.c
3160 src/f32-vunary/gen/vsqr-sse-x4.c
3161 src/f32-vunary/gen/vsqr-sse-x8.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3162 src/math/roundd-sse-addsub.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3163 src/math/roundne-sse-addsub.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3164 src/math/roundu-sse-addsub.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]3165 src/math/roundz-sse-addsub.c
3166 src/math/sqrt-sse-hh1mac.c
3167 src/math/sqrt-sse-nr1mac.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3168 src/math/sqrt-sse-nr2mac.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]3169 src/x32-packx/x4-sse.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3170
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3171SET(PROD_SSE2_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]3172 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3173 src/f32-argmaxpool/4x-sse2-c4.c
3174 src/f32-argmaxpool/9p8x-sse2-c4.c
3175 src/f32-argmaxpool/9x-sse2-c4.c
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]3176 src/f32-f16-vcvt/gen/vcvt-sse2-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3177 src/f32-prelu/gen/sse2-2x8.c
Marat Dukhaned2d7762021-12-03 23:51:19 -0800[diff] [blame]3178 src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c
3179 src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3180 src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c
3181 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c
3182 src/f32-vlrelu/gen/vlrelu-sse2-x8.c
3183 src/f32-vrnd/gen/vrndd-sse2-x8.c
3184 src/f32-vrnd/gen/vrndne-sse2-x8.c
3185 src/f32-vrnd/gen/vrndu-sse2-x8.c
3186 src/f32-vrnd/gen/vrndz-sse2-x8.c
3187 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c
3188 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
3189 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
3190 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3191 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3192 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3193 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3194 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c
3195 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c
3196 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c
3197 src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c
3198 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3199 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3200 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3201 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3202 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
3203 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3204 src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3205 src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3206 src/qu8-avgpool/9p8x-minmax-sse2-c8.c
3207 src/qu8-avgpool/9x-minmax-sse2-c8.c
3208 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
3209 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
3210 src/qu8-gavgpool/7p7x-minmax-sse2-c8.c
3211 src/qu8-gavgpool/7x-minmax-sse2-c8.c
3212 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3213 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3214 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3215 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3216 src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
3217 src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3218 src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3219 src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]3220 src/s8-ibilinear/gen/sse2-c8.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]3221 src/s8-maxpool/9p8x-minmax-sse2-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]3222 src/s8-vclamp/sse2-x64.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]3223 src/u8-ibilinear/gen/sse2-c8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3224 src/u8-maxpool/9p8x-minmax-sse2-c16.c
3225 src/u8-rmax/sse2.c
3226 src/u8-vclamp/sse2-x64.c
3227 src/x8-zip/x2-sse2.c
3228 src/x8-zip/x3-sse2.c
3229 src/x8-zip/x4-sse2.c
3230 src/x8-zip/xm-sse2.c
3231 src/x32-unpool/sse2.c
3232 src/x32-zip/x2-sse2.c
3233 src/x32-zip/x3-sse2.c
3234 src/x32-zip/x4-sse2.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]3235 src/x32-zip/xm-sse2.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]3236 src/xx-fill/sse2-x64.c
3237 src/xx-pad/sse2.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3238
3239SET(ALL_SSE2_MICROKERNEL_SRCS
Marat Dukhan1227adb2021-10-16 17:33:51 -0700[diff] [blame]3240 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x8.c
3241 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x16.c
3242 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x24.c
3243 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c
3244 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x8.c
3245 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x16.c
3246 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x24.c
3247 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x32.c
Ashkan Aliabadif866a452019-11-20 10:58:51 -0800[diff] [blame]3248 src/f32-argmaxpool/4x-sse2-c4.c
3249 src/f32-argmaxpool/9p8x-sse2-c4.c
3250 src/f32-argmaxpool/9x-sse2-c4.c
Marat Dukhaneb844232021-11-08 23:07:53 -0800[diff] [blame]3251 src/f32-f16-vcvt/gen/vcvt-sse2-x8.c
3252 src/f32-f16-vcvt/gen/vcvt-sse2-x16.c
3253 src/f32-f16-vcvt/gen/vcvt-sse2-x24.c
3254 src/f32-f16-vcvt/gen/vcvt-sse2-x32.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]3255 src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c
3256 src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c
3257 src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c
3258 src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c
3259 src/f32-gemm/gen/1x8-minmax-sse2-dup.c
3260 src/f32-gemm/gen/3x8-minmax-sse2-dup.c
3261 src/f32-gemm/gen/4x8-minmax-sse2-dup.c
3262 src/f32-gemm/gen/5x8-minmax-sse2-dup.c
3263 src/f32-igemm/gen/1x8-minmax-sse2-dup.c
3264 src/f32-igemm/gen/3x8-minmax-sse2-dup.c
3265 src/f32-igemm/gen/4x8-minmax-sse2-dup.c
3266 src/f32-igemm/gen/5x8-minmax-sse2-dup.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]3267 src/f32-prelu/gen/sse2-2x4.c
3268 src/f32-prelu/gen/sse2-2x8.c
Marat Dukhanc5aa2422021-12-01 00:15:19 -0800[diff] [blame]3269 src/f32-qs8-vcvt/gen/vcvt-sse2-x8.c
3270 src/f32-qs8-vcvt/gen/vcvt-sse2-x16.c
3271 src/f32-qs8-vcvt/gen/vcvt-sse2-x24.c
3272 src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c
3273 src/f32-qu8-vcvt/gen/vcvt-sse2-x8.c
3274 src/f32-qu8-vcvt/gen/vcvt-sse2-x16.c
3275 src/f32-qu8-vcvt/gen/vcvt-sse2-x24.c
3276 src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]3277 src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]3278 src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3279 src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]3280 src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c
3281 src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3282 src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]3283 src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c
3284 src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3285 src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]3286 src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c
3287 src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3288 src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]3289 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c
3290 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c
3291 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c
3292 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c
3293 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c
3294 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c
3295 src/f32-velu/gen/velu-sse2-rr2-p6-x4.c
3296 src/f32-velu/gen/velu-sse2-rr2-p6-x8.c
3297 src/f32-velu/gen/velu-sse2-rr2-p6-x12.c
3298 src/f32-velu/gen/velu-sse2-rr2-p6-x16.c
3299 src/f32-velu/gen/velu-sse2-rr2-p6-x20.c
3300 src/f32-velu/gen/velu-sse2-rr2-p6-x24.c
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700[diff] [blame]3301 src/f32-vlrelu/gen/vlrelu-sse2-x4.c
3302 src/f32-vlrelu/gen/vlrelu-sse2-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]3303 src/f32-vrnd/gen/vrndd-sse2-x4.c
3304 src/f32-vrnd/gen/vrndd-sse2-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3305 src/f32-vrnd/gen/vrndne-sse2-x4.c
3306 src/f32-vrnd/gen/vrndne-sse2-x8.c
3307 src/f32-vrnd/gen/vrndu-sse2-x4.c
3308 src/f32-vrnd/gen/vrndu-sse2-x8.c
3309 src/f32-vrnd/gen/vrndz-sse2-x4.c
3310 src/f32-vrnd/gen/vrndz-sse2-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]3311 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c
3312 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c
3313 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c
3314 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c
3315 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c
3316 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c
3317 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c
3318 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c
3319 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c
3320 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c
3321 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c
3322 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]3323 src/math/cvt-f16-f32-sse2-int16.c
3324 src/math/cvt-f16-f32-sse2-int32.c
Marat Dukhan056f49d2021-11-08 17:44:42 -0800[diff] [blame]3325 src/math/cvt-f32-f16-sse2.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]3326 src/math/exp-sse2-rr2-lut64-p2.c
3327 src/math/exp-sse2-rr2-p5.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]3328 src/math/expm1minus-sse2-rr2-lut16-p3.c
Marat Dukhana438aca2020-11-20 15:45:01 -0800[diff] [blame]3329 src/math/expm1minus-sse2-rr2-p6.c
Frank Barchard22136062020-11-24 18:44:46 -0800[diff] [blame]3330 src/math/expminus-sse2-rr2-p5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3331 src/math/roundd-sse2-cvt.c
3332 src/math/roundne-sse2-cvt.c
3333 src/math/roundu-sse2-cvt.c
3334 src/math/roundz-sse2-cvt.c
3335 src/math/sigmoid-sse2-rr2-lut64-p2-div.c
3336 src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c
3337 src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c
3338 src/math/sigmoid-sse2-rr2-p5-div.c
3339 src/math/sigmoid-sse2-rr2-p5-nr1.c
3340 src/math/sigmoid-sse2-rr2-p5-nr2.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3341 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3342 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3343 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3344 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3345 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3346 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3347 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3348 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3349 src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c
3350 src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3351 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3352 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3353 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3354 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
3355 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
3356 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
3357 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
3358 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
3359 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
3360 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
3361 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3362 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
3363 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
3364 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3365 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3366 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3367 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3368 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3369 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3370 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3371 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3372 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3373 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3374 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3375 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3376 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3377 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3378 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3379 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3380 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3381 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3382 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3383 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3384 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3385 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3386 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3387 src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3388 src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c
Marat Dukhan453f4b82020-08-07 22:24:21 -0700[diff] [blame]3389 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c
3390 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c
3391 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]3392 src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c
3393 src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c
3394 src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3395 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3396 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3397 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3398 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3399 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3400 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3401 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3402 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3403 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3404 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3405 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3406 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3407 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3408 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3409 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3410 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3411 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3412 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3413 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3414 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3415 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3416 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3417 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3418 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3419 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3420 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3421 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3422 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3423 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3424 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3425 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3426 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3427 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3428 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3429 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]3430 src/qs8-requantization/fp32-sse2.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3431 src/qs8-requantization/gemmlowp-sse2.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3432 src/qs8-requantization/rndna-sse2.c
Marat Dukhand9f3ad42020-08-10 12:30:58 -0700[diff] [blame]3433 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
3434 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
3435 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c
3436 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]3437 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
3438 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
3439 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c
3440 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3441 src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3442 src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c
3443 src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3444 src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]3445 src/qu8-avgpool/9p8x-minmax-sse2-c8.c
3446 src/qu8-avgpool/9x-minmax-sse2-c8.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3447 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
3448 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
3449 src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c
3450 src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]3451 src/qu8-gavgpool/7p7x-minmax-sse2-c8.c
3452 src/qu8-gavgpool/7x-minmax-sse2-c8.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3453 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
3454 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
3455 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3456 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
3457 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
3458 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
3459 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
3460 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3461 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
3462 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
3463 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3464 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
3465 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
3466 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3467 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
3468 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
3469 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
3470 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
3471 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
3472 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
3473 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
3474 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3475 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
3476 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
3477 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
3478 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
3479 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
3480 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]3481 src/qu8-requantization/fp32-sse2.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3482 src/qu8-requantization/gemmlowp-sse2.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3483 src/qu8-requantization/rndna-sse2.c
Marat Dukhan28c82b22021-07-21 13:48:45 -0700[diff] [blame]3484 src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
3485 src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
3486 src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
3487 src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3488 src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3489 src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c
3490 src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3491 src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c
Marat Dukhan7519eb12021-11-23 19:08:29 -0800[diff] [blame]3492 src/s8-ibilinear/gen/sse2-c8.c
3493 src/s8-ibilinear/gen/sse2-c16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]3494 src/s8-maxpool/9p8x-minmax-sse2-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]3495 src/s8-vclamp/sse2-x64.c
Marat Dukhan7519eb12021-11-23 19:08:29 -0800[diff] [blame]3496 src/u8-ibilinear/gen/sse2-c8.c
3497 src/u8-ibilinear/gen/sse2-c16.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3498 src/u8-maxpool/9p8x-minmax-sse2-c16.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3499 src/u8-rmax/sse2.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]3500 src/u8-vclamp/sse2-x64.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3501 src/x8-zip/x2-sse2.c
3502 src/x8-zip/x3-sse2.c
3503 src/x8-zip/x4-sse2.c
Marat Dukhan9d501d52019-11-16 02:30:50 -0800[diff] [blame]3504 src/x8-zip/xm-sse2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3505 src/x32-unpool/sse2.c
3506 src/x32-zip/x2-sse2.c
3507 src/x32-zip/x3-sse2.c
3508 src/x32-zip/x4-sse2.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]3509 src/x32-zip/xm-sse2.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]3510 src/xx-fill/sse2-x64.c
3511 src/xx-pad/sse2.c)
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3512
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3513SET(PROD_SSSE3_MICROKERNEL_SRCS
3514 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c
3515 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c
3516 src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c)
3517
3518SET(ALL_SSSE3_MICROKERNEL_SRCS
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3519 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c
3520 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c
3521 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c
Marat Dukhan98f2eeb2020-10-23 23:13:41 -0700[diff] [blame]3522 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3523 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c
Marat Dukhan98f2eeb2020-10-23 23:13:41 -0700[diff] [blame]3524 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c
3525 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c
3526 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c
3527 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c
3528 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c
Marat Dukhan453f4b82020-08-07 22:24:21 -0700[diff] [blame]3529 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c
3530 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c
3531 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]3532 src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c
3533 src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c
3534 src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3535 src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3536 src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3537 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3538 src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3539 src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3540 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3541 src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3542 src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3543 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3544 src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3545 src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3546 src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3547 src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3548 src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3549 src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3550 src/qs8-requantization/gemmlowp-ssse3.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3551 src/qs8-requantization/rndna-ssse3.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3552 src/qu8-requantization/gemmlowp-ssse3.c
Marat Dukhan7c478e32021-09-10 09:48:13 -0700[diff] [blame]3553 src/qu8-requantization/rndna-ssse3.c
3554 src/x8-lut/gen/lut-ssse3-x16.c
3555 src/x8-lut/gen/lut-ssse3-x32.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3556
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3557SET(PROD_SSE41_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]3558 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]3559 src/f32-f16-vcvt/gen/vcvt-sse41-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3560 src/f32-prelu/gen/sse41-2x8.c
Marat Dukhaned2d7762021-12-03 23:51:19 -0800[diff] [blame]3561 src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3562 src/f32-vlrelu/gen/vlrelu-sse41-x8.c
3563 src/f32-vrnd/gen/vrndd-sse41-x8.c
3564 src/f32-vrnd/gen/vrndne-sse41-x8.c
3565 src/f32-vrnd/gen/vrndu-sse41-x8.c
3566 src/f32-vrnd/gen/vrndz-sse41-x8.c
3567 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c
3568 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
3569 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
3570 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3571 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3572 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3573 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3574 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c
3575 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c
3576 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c
3577 src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c
3578 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3579 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3580 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3581 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3582 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
3583 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3584 src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
3585 src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3586 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
3587 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
3588 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3589 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3590 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3591 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3592 src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3593 src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
3594 src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]3595 src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]3596 src/s8-ibilinear/gen/sse41-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]3597 src/s8-maxpool/9p8x-minmax-sse41-c16.c
Marat Dukhan24abe6b2021-11-24 15:28:57 -0800[diff] [blame]3598 src/s8-vclamp/sse41-x64.c
3599 src/u8-ibilinear/gen/sse41-c16.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3600
3601SET(ALL_SSE41_MICROKERNEL_SRCS
Marat Dukhan1227adb2021-10-16 17:33:51 -0700[diff] [blame]3602 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x8.c
3603 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c
3604 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x24.c
3605 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x32.c
3606 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x8.c
3607 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x16.c
3608 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x24.c
3609 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x32.c
Marat Dukhaneb844232021-11-08 23:07:53 -0800[diff] [blame]3610 src/f32-f16-vcvt/gen/vcvt-sse41-x8.c
3611 src/f32-f16-vcvt/gen/vcvt-sse41-x16.c
3612 src/f32-f16-vcvt/gen/vcvt-sse41-x24.c
3613 src/f32-f16-vcvt/gen/vcvt-sse41-x32.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]3614 src/f32-prelu/gen/sse41-2x4.c
3615 src/f32-prelu/gen/sse41-2x8.c
Marat Dukhanc5aa2422021-12-01 00:15:19 -0800[diff] [blame]3616 src/f32-qs8-vcvt/gen/vcvt-sse41-x8.c
3617 src/f32-qs8-vcvt/gen/vcvt-sse41-x16.c
3618 src/f32-qs8-vcvt/gen/vcvt-sse41-x24.c
3619 src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]3620 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c
3621 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c
3622 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c
3623 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c
3624 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c
3625 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c
3626 src/f32-velu/gen/velu-sse41-rr2-p6-x4.c
3627 src/f32-velu/gen/velu-sse41-rr2-p6-x8.c
3628 src/f32-velu/gen/velu-sse41-rr2-p6-x12.c
3629 src/f32-velu/gen/velu-sse41-rr2-p6-x16.c
3630 src/f32-velu/gen/velu-sse41-rr2-p6-x20.c
3631 src/f32-velu/gen/velu-sse41-rr2-p6-x24.c
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700[diff] [blame]3632 src/f32-vlrelu/gen/vlrelu-sse41-x4.c
3633 src/f32-vlrelu/gen/vlrelu-sse41-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]3634 src/f32-vrnd/gen/vrndd-sse41-x4.c
3635 src/f32-vrnd/gen/vrndd-sse41-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3636 src/f32-vrnd/gen/vrndne-sse41-x4.c
3637 src/f32-vrnd/gen/vrndne-sse41-x8.c
3638 src/f32-vrnd/gen/vrndu-sse41-x4.c
3639 src/f32-vrnd/gen/vrndu-sse41-x8.c
3640 src/f32-vrnd/gen/vrndz-sse41-x4.c
3641 src/f32-vrnd/gen/vrndz-sse41-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]3642 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c
3643 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c
3644 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c
3645 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c
3646 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c
3647 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c
3648 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c
3649 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c
3650 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c
3651 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c
3652 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c
3653 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]3654 src/math/cvt-f16-f32-sse41-int16.c
3655 src/math/cvt-f16-f32-sse41-int32.c
Marat Dukhan056f49d2021-11-08 17:44:42 -0800[diff] [blame]3656 src/math/cvt-f32-f16-sse41.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3657 src/math/roundd-sse41.c
3658 src/math/roundne-sse41.c
3659 src/math/roundu-sse41.c
3660 src/math/roundz-sse41.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3661 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3662 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3663 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3664 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3665 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3666 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3667 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3668 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3669 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3670 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3671 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3672 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c
3673 src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c
3674 src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c
3675 src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c
3676 src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3677 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3678 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3679 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3680 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3681 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3682 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3683 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3684 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3685 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3686 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3687 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3688 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3689 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3690 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3691 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3692 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3693 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3694 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3695 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3696 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3697 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3698 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3699 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3700 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3701 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3702 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3703 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3704 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3705 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3706 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]3707 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3708 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3709 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3710 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3711 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3712 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3713 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3714 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3715 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3716 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3717 src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c
3718 src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3719 src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c
3720 src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c
Marat Dukhan453f4b82020-08-07 22:24:21 -0700[diff] [blame]3721 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c
3722 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c
3723 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]3724 src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c
3725 src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c
3726 src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3727 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3728 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3729 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3730 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3731 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3732 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3733 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3734 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3735 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3736 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3737 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3738 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3739 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3740 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3741 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3742 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3743 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3744 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3745 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3746 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3747 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3748 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3749 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3750 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3751 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3752 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3753 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3754 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3755 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3756 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3757 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3758 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3759 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3760 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3761 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]3762 src/qs8-requantization/fp32-sse4.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3763 src/qs8-requantization/gemmlowp-sse4.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3764 src/qs8-requantization/rndna-sse4.c
Marat Dukhan0d979d52021-06-09 13:21:18 -0700[diff] [blame]3765 src/qs8-requantization/rndnu-sse4-sra.c
3766 src/qs8-requantization/rndnu-sse4-srl.c
Marat Dukhand9f3ad42020-08-10 12:30:58 -0700[diff] [blame]3767 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
3768 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
3769 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c
3770 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c
Marat Dukhanbb9225e2020-09-06 22:40:56 -0700[diff] [blame]3771 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
3772 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
3773 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c
3774 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]3775 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
3776 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
3777 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c
3778 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c
Marat Dukhanbb9225e2020-09-06 22:40:56 -0700[diff] [blame]3779 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
3780 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
3781 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c
3782 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3783 src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c
3784 src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
3785 src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c
3786 src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3787 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3788 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3789 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3790 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3791 src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3792 src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3793 src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3794 src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3795 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
3796 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
3797 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3798 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
3799 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
3800 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
3801 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
3802 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3803 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
3804 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
3805 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3806 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
3807 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
3808 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3809 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
3810 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
3811 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3812 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
3813 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
3814 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
3815 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
3816 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3817 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
3818 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
3819 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3820 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
3821 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
3822 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3823 src/qu8-requantization/gemmlowp-sse4.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]3824 src/qu8-requantization/rndna-sse4.c
3825 src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
3826 src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
3827 src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
3828 src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
3829 src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
3830 src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
3831 src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3832 src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
3833 src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c
3834 src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
3835 src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]3836 src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhan7519eb12021-11-23 19:08:29 -0800[diff] [blame]3837 src/s8-ibilinear/gen/sse41-c8.c
3838 src/s8-ibilinear/gen/sse41-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]3839 src/s8-maxpool/9p8x-minmax-sse41-c16.c
Marat Dukhan7519eb12021-11-23 19:08:29 -0800[diff] [blame]3840 src/s8-vclamp/sse41-x64.c
3841 src/u8-ibilinear/gen/sse41-c8.c
3842 src/u8-ibilinear/gen/sse41-c16.c)
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]3843
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3844SET(PROD_AVX_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]3845 src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3846 src/f32-dwconv/gen/up8x25-minmax-avx.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]3847 src/f32-dwconv/gen/up16x3-minmax-avx.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3848 src/f32-dwconv/gen/up16x4-minmax-avx.c
3849 src/f32-dwconv/gen/up16x9-minmax-avx.c
Frank Barchardeb704f72021-11-12 01:26:50 -0800[diff] [blame]3850 src/f32-f16-vcvt/gen/vcvt-avx-x24.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3851 src/f32-gemm/gen/1x16-minmax-avx-broadcast.c
3852 src/f32-gemm/gen/5x16-minmax-avx-broadcast.c
3853 src/f32-igemm/gen/1x16-minmax-avx-broadcast.c
3854 src/f32-igemm/gen/5x16-minmax-avx-broadcast.c
3855 src/f32-prelu/gen/avx-2x16.c
3856 src/f32-vbinary/gen/vadd-minmax-avx-x16.c
3857 src/f32-vbinary/gen/vaddc-minmax-avx-x16.c
3858 src/f32-vbinary/gen/vdiv-minmax-avx-x16.c
3859 src/f32-vbinary/gen/vdivc-minmax-avx-x16.c
3860 src/f32-vbinary/gen/vmax-avx-x16.c
3861 src/f32-vbinary/gen/vmaxc-avx-x16.c
3862 src/f32-vbinary/gen/vmin-avx-x16.c
3863 src/f32-vbinary/gen/vminc-avx-x16.c
3864 src/f32-vbinary/gen/vmul-minmax-avx-x16.c
3865 src/f32-vbinary/gen/vmulc-minmax-avx-x16.c
3866 src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c
3867 src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c
3868 src/f32-vbinary/gen/vsqrdiff-avx-x16.c
3869 src/f32-vbinary/gen/vsqrdiffc-avx-x16.c
3870 src/f32-vbinary/gen/vsub-minmax-avx-x16.c
3871 src/f32-vbinary/gen/vsubc-minmax-avx-x16.c
3872 src/f32-vclamp/gen/vclamp-avx-x16.c
3873 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c
3874 src/f32-vhswish/gen/vhswish-avx-x16.c
3875 src/f32-vlrelu/gen/vlrelu-avx-x16.c
3876 src/f32-vrnd/gen/vrndd-avx-x16.c
3877 src/f32-vrnd/gen/vrndne-avx-x16.c
3878 src/f32-vrnd/gen/vrndu-avx-x16.c
3879 src/f32-vrnd/gen/vrndz-avx-x16.c
3880 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c
3881 src/f32-vsqrt/gen/avx-sqrt-x8.c
3882 src/f32-vunary/gen/vabs-avx-x16.c
3883 src/f32-vunary/gen/vneg-avx-x16.c
3884 src/f32-vunary/gen/vsqr-avx-x16.c
Marat Dukhan28480592021-07-27 23:52:27 -0700[diff] [blame]3885 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
3886 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3887 src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3888 src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3889 src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3890 src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3891 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
3892 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
3893 src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3894 src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3895 src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3896 src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3897 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c
3898 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3899 src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
3900 src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3901 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
3902 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
3903 src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3904 src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3905 src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3906 src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3907 src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3908 src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
3909 src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
Marat Dukhan98e054b2021-09-13 09:43:50 -0700[diff] [blame]3910 src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
3911 src/x8-lut/gen/lut-avx-x64.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3912
3913SET(ALL_AVX_MICROKERNEL_SRCS
Marat Dukhan1227adb2021-10-16 17:33:51 -0700[diff] [blame]3914 src/f16-f32-vcvt/gen/vcvt-avx-int16-x8.c
3915 src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c
3916 src/f16-f32-vcvt/gen/vcvt-avx-int16-x24.c
3917 src/f16-f32-vcvt/gen/vcvt-avx-int16-x32.c
3918 src/f16-f32-vcvt/gen/vcvt-avx-int32-x8.c
3919 src/f16-f32-vcvt/gen/vcvt-avx-int32-x16.c
3920 src/f16-f32-vcvt/gen/vcvt-avx-int32-x24.c
3921 src/f16-f32-vcvt/gen/vcvt-avx-int32-x32.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]3922 src/f32-dwconv/gen/up8x3-minmax-avx-acc2.c
3923 src/f32-dwconv/gen/up8x3-minmax-avx.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3924 src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c
3925 src/f32-dwconv/gen/up8x4-minmax-avx.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3926 src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c
3927 src/f32-dwconv/gen/up8x9-minmax-avx.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3928 src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c
3929 src/f32-dwconv/gen/up8x25-minmax-avx.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]3930 src/f32-dwconv/gen/up16x3-minmax-avx-acc2.c
3931 src/f32-dwconv/gen/up16x3-minmax-avx.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3932 src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c
3933 src/f32-dwconv/gen/up16x4-minmax-avx.c
3934 src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c
3935 src/f32-dwconv/gen/up16x9-minmax-avx.c
3936 src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c
3937 src/f32-dwconv/gen/up16x25-minmax-avx.c
Marat Dukhaneb844232021-11-08 23:07:53 -0800[diff] [blame]3938 src/f32-f16-vcvt/gen/vcvt-avx-x8.c
3939 src/f32-f16-vcvt/gen/vcvt-avx-x16.c
3940 src/f32-f16-vcvt/gen/vcvt-avx-x24.c
3941 src/f32-f16-vcvt/gen/vcvt-avx-x32.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3942 src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3943 src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c
3944 src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3945 src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3946 src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3947 src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3948 src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3949 src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c
3950 src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c
3951 src/f32-gemm/gen/1x8-minmax-avx-broadcast.c
3952 src/f32-gemm/gen/1x16-minmax-avx-broadcast.c
3953 src/f32-gemm/gen/3x16-minmax-avx-broadcast.c
3954 src/f32-gemm/gen/4x8-minmax-avx-broadcast.c
3955 src/f32-gemm/gen/4x16-minmax-avx-broadcast.c
3956 src/f32-gemm/gen/5x8-minmax-avx-broadcast.c
3957 src/f32-gemm/gen/5x16-minmax-avx-broadcast.c
3958 src/f32-gemm/gen/6x8-minmax-avx-broadcast.c
3959 src/f32-gemm/gen/7x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3960 src/f32-igemm/gen/1x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3961 src/f32-igemm/gen/1x16-minmax-avx-broadcast.c
3962 src/f32-igemm/gen/3x16-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3963 src/f32-igemm/gen/4x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3964 src/f32-igemm/gen/4x16-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3965 src/f32-igemm/gen/5x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3966 src/f32-igemm/gen/5x16-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3967 src/f32-igemm/gen/6x8-minmax-avx-broadcast.c
3968 src/f32-igemm/gen/7x8-minmax-avx-broadcast.c
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]3969 src/f32-prelu/gen/avx-2x8.c
3970 src/f32-prelu/gen/avx-2x16.c
Marat Dukhana5977df2019-10-30 22:02:15 -0700[diff] [blame]3971 src/f32-rmax/avx.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3972 src/f32-vbinary/gen/vadd-minmax-avx-x8.c
3973 src/f32-vbinary/gen/vadd-minmax-avx-x16.c
3974 src/f32-vbinary/gen/vaddc-minmax-avx-x8.c
3975 src/f32-vbinary/gen/vaddc-minmax-avx-x16.c
3976 src/f32-vbinary/gen/vdiv-minmax-avx-x8.c
3977 src/f32-vbinary/gen/vdiv-minmax-avx-x16.c
3978 src/f32-vbinary/gen/vdivc-minmax-avx-x8.c
3979 src/f32-vbinary/gen/vdivc-minmax-avx-x16.c
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]3980 src/f32-vbinary/gen/vmax-avx-x8.c
3981 src/f32-vbinary/gen/vmax-avx-x16.c
3982 src/f32-vbinary/gen/vmaxc-avx-x8.c
3983 src/f32-vbinary/gen/vmaxc-avx-x16.c
3984 src/f32-vbinary/gen/vmin-avx-x8.c
3985 src/f32-vbinary/gen/vmin-avx-x16.c
3986 src/f32-vbinary/gen/vminc-avx-x8.c
3987 src/f32-vbinary/gen/vminc-avx-x16.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3988 src/f32-vbinary/gen/vmul-minmax-avx-x8.c
3989 src/f32-vbinary/gen/vmul-minmax-avx-x16.c
3990 src/f32-vbinary/gen/vmulc-minmax-avx-x8.c
3991 src/f32-vbinary/gen/vmulc-minmax-avx-x16.c
3992 src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c
3993 src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c
3994 src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c
3995 src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]3996 src/f32-vbinary/gen/vsqrdiff-avx-x8.c
3997 src/f32-vbinary/gen/vsqrdiff-avx-x16.c
3998 src/f32-vbinary/gen/vsqrdiffc-avx-x8.c
3999 src/f32-vbinary/gen/vsqrdiffc-avx-x16.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4000 src/f32-vbinary/gen/vsub-minmax-avx-x8.c
4001 src/f32-vbinary/gen/vsub-minmax-avx-x16.c
4002 src/f32-vbinary/gen/vsubc-minmax-avx-x8.c
4003 src/f32-vbinary/gen/vsubc-minmax-avx-x16.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]4004 src/f32-vclamp/gen/vclamp-avx-x8.c
4005 src/f32-vclamp/gen/vclamp-avx-x16.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]4006 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c
4007 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c
4008 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c
4009 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c
4010 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c
4011 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c
4012 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c
4013 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c
4014 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c
4015 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c
4016 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c
4017 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c
4018 src/f32-velu/gen/velu-avx-rr2-p6-x8.c
4019 src/f32-velu/gen/velu-avx-rr2-p6-x16.c
4020 src/f32-velu/gen/velu-avx-rr2-p6-x24.c
4021 src/f32-velu/gen/velu-avx-rr2-p6-x32.c
4022 src/f32-velu/gen/velu-avx-rr2-p6-x40.c
4023 src/f32-velu/gen/velu-avx-rr2-p6-x48.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]4024 src/f32-vhswish/gen/vhswish-avx-x8.c
4025 src/f32-vhswish/gen/vhswish-avx-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4026 src/f32-vlrelu/gen/vlrelu-avx-x8.c
4027 src/f32-vlrelu/gen/vlrelu-avx-x16.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4028 src/f32-vrnd/gen/vrndd-avx-x8.c
4029 src/f32-vrnd/gen/vrndd-avx-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4030 src/f32-vrnd/gen/vrndne-avx-x8.c
4031 src/f32-vrnd/gen/vrndne-avx-x16.c
4032 src/f32-vrnd/gen/vrndu-avx-x8.c
4033 src/f32-vrnd/gen/vrndu-avx-x16.c
4034 src/f32-vrnd/gen/vrndz-avx-x8.c
4035 src/f32-vrnd/gen/vrndz-avx-x16.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]4036 src/f32-vscale/avx-x32.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]4037 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c
4038 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c
4039 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c
4040 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c
4041 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c
4042 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c
4043 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c
4044 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c
4045 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c
4046 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c
4047 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c
4048 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c
4049 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c
4050 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c
4051 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c
4052 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c
4053 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c
4054 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c
4055 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c
4056 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]4057 src/f32-vsqrt/gen/avx-sqrt-x8.c
4058 src/f32-vsqrt/gen/avx-sqrt-x16.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]4059 src/f32-vunary/gen/vabs-avx-x8.c
4060 src/f32-vunary/gen/vabs-avx-x16.c
4061 src/f32-vunary/gen/vneg-avx-x8.c
4062 src/f32-vunary/gen/vneg-avx-x16.c
4063 src/f32-vunary/gen/vsqr-avx-x8.c
Marat Dukhand08abcb2020-09-21 00:26:25 -0700[diff] [blame]4064 src/f32-vunary/gen/vsqr-avx-x16.c
Frank Barchard4a352042021-04-13 15:52:08 -0700[diff] [blame]4065 src/math/exp-avx-rr2-p5.c
4066 src/math/expm1minus-avx-rr2-lut4-p4-perm.c
4067 src/math/expm1minus-avx-rr2-lut16-p3.c
4068 src/math/expm1minus-avx-rr2-p6.c
4069 src/math/sigmoid-avx-rr2-lut64-p2-div.c
4070 src/math/sigmoid-avx-rr2-p5-div.c
4071 src/math/sigmoid-avx-rr2-p5-nr1.c
4072 src/math/sigmoid-avx-rr2-p5-nr2.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4073 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4074 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4075 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4076 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4077 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4078 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4079 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4080 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4081 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4082 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4083 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4084 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c
4085 src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c
4086 src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c
4087 src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c
4088 src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4089 src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4090 src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4091 src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4092 src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4093 src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4094 src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4095 src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4096 src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4097 src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4098 src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4099 src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4100 src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4101 src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4102 src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4103 src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4104 src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4105 src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4106 src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4107 src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4108 src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4109 src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4110 src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4111 src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4112 src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4113 src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4114 src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4115 src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4116 src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4117 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4118 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]4119 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4120 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4121 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4122 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4123 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4124 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4125 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4126 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4127 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4128 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4129 src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c
4130 src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4131 src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c
4132 src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4133 src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4134 src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4135 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4136 src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4137 src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4138 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4139 src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4140 src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4141 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4142 src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4143 src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4144 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4145 src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4146 src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4147 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4148 src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4149 src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4150 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4151 src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4152 src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4153 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4154 src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4155 src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4156 src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4157 src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4158 src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4159 src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4160 src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4161 src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4162 src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4163 src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4164 src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4165 src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4166 src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4167 src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhane9c4b962021-04-02 16:56:55 -0700[diff] [blame]4168 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c
4169 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c
4170 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c
4171 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c
4172 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c
4173 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c
4174 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c
4175 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c
4176 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
4177 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
4178 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c
4179 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c
4180 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
4181 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
4182 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4183 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]4184 src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c
4185 src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
4186 src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c
4187 src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]4188 src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4189 src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]4190 src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4191 src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]4192 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4193 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]4194 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4195 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4196 src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c
4197 src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c
4198 src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c
4199 src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
4200 src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c
4201 src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c
4202 src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c
4203 src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
4204 src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c
4205 src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c
4206 src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c
4207 src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c
4208 src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c
4209 src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c
4210 src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c
4211 src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c
4212 src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c
4213 src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
4214 src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c
4215 src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c
4216 src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c
4217 src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
4218 src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c
4219 src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c
4220 src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c
4221 src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c
4222 src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]4223 src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c
4224 src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c
4225 src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c
4226 src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c
4227 src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c
4228 src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
4229 src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
4230 src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]4231 src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
4232 src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c
4233 src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
4234 src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c
Marat Dukhan7c478e32021-09-10 09:48:13 -0700[diff] [blame]4235 src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
4236 src/x8-lut/gen/lut-avx-x16.c
4237 src/x8-lut/gen/lut-avx-x32.c
4238 src/x8-lut/gen/lut-avx-x48.c
4239 src/x8-lut/gen/lut-avx-x64.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]4240
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]4241SET(PROD_F16C_MICROKERNEL_SRCS
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]4242 src/f16-f32-vcvt/gen/vcvt-f16c-x16.c
4243 src/f32-f16-vcvt/gen/vcvt-f16c-x16.c)
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]4244
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]4245SET(ALL_F16C_MICROKERNEL_SRCS
4246 src/f16-f32-vcvt/gen/vcvt-f16c-x8.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]4247 src/f16-f32-vcvt/gen/vcvt-f16c-x16.c
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]4248 src/f32-f16-vcvt/gen/vcvt-f16c-x8.c
4249 src/f32-f16-vcvt/gen/vcvt-f16c-x16.c
Marat Dukhan582e1842021-10-25 17:18:36 -0700[diff] [blame]4250 src/math/cvt-f16-f32-f16c.c
4251 src/math/cvt-f32-f16-f16c.c)
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]4252
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4253SET(PROD_XOP_MICROKERNEL_SRCS
Marat Dukhan28480592021-07-27 23:52:27 -0700[diff] [blame]4254 src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
4255 src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4256 src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4257 src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4258 src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4259 src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4260 src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
4261 src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
4262 src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4263 src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4264 src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4265 src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4266 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c
4267 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
4268 src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
4269 src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
4270 src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4271 src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4272 src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4273 src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4274 src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c
4275 src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c)
4276
4277SET(ALL_XOP_MICROKERNEL_SRCS
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4278 src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4279 src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4280 src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4281 src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4282 src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4283 src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4284 src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4285 src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
4286 src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c
4287 src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4288 src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4289 src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4290 src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4291 src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4292 src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4293 src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4294 src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4295 src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4296 src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4297 src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4298 src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4299 src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4300 src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4301 src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4302 src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4303 src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4304 src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4305 src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4306 src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4307 src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4308 src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4309 src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4310 src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4311 src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4312 src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4313 src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]4314 src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4315 src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4316 src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]4317 src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4318 src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4319 src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4320 src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4321 src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]4322 src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4323 src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4324 src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4325 src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4326 src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4327 src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4328 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4329 src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4330 src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4331 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4332 src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4333 src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4334 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4335 src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4336 src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4337 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4338 src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4339 src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4340 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4341 src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4342 src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4343 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4344 src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4345 src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]4346 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4347 src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4348 src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4349 src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4350 src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4351 src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4352 src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4353 src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4354 src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4355 src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4356 src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4357 src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4358 src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]4359 src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4360 src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanbb9225e2020-09-06 22:40:56 -0700[diff] [blame]4361 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c
4362 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c
4363 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c
4364 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c
4365 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
4366 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c
4367 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4368 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]4369 src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c
4370 src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c
4371 src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
4372 src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]4373 src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c
4374 src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c
4375 src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4376 src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c
4377 src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c
4378 src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c
4379 src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4380 src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c
4381 src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c
4382 src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c
4383 src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c
4384 src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c
4385 src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c
4386 src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c
4387 src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c
4388 src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c
4389 src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
4390 src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c
4391 src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c
4392 src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c
4393 src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
4394 src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c
4395 src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c
4396 src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c
4397 src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c
4398 src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c
4399 src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]4400 src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c
4401 src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c
4402 src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c
4403 src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
4404 src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c)
Marat Dukhan1566fee2020-08-02 21:55:41 -0700[diff] [blame]4405
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4406SET(PROD_FMA3_MICROKERNEL_SRCS
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4407 src/f32-dwconv/gen/up8x25-minmax-fma3.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4408 src/f32-dwconv/gen/up16x3-minmax-fma3.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4409 src/f32-dwconv/gen/up16x4-minmax-fma3.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4410 src/f32-dwconv/gen/up16x9-minmax-fma3.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4411 src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c
4412 src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c
4413 src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c
4414 src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c
4415 src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c
4416 src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c
4417 src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c
4418 src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c
4419 src/f32-vhswish/gen/vhswish-fma3-x16.c)
4420
4421SET(ALL_FMA3_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4422 src/f32-dwconv/gen/up8x3-minmax-fma3-acc2.c
4423 src/f32-dwconv/gen/up8x3-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4424 src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c
4425 src/f32-dwconv/gen/up8x4-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4426 src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c
4427 src/f32-dwconv/gen/up8x9-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4428 src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c
4429 src/f32-dwconv/gen/up8x25-minmax-fma3.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4430 src/f32-dwconv/gen/up16x3-minmax-fma3-acc2.c
4431 src/f32-dwconv/gen/up16x3-minmax-fma3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4432 src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c
4433 src/f32-dwconv/gen/up16x4-minmax-fma3.c
4434 src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c
4435 src/f32-dwconv/gen/up16x9-minmax-fma3.c
4436 src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c
4437 src/f32-dwconv/gen/up16x25-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4438 src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4439 src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c
4440 src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c
4441 src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c
4442 src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4443 src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4444 src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c
4445 src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4446 src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4447 src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c
4448 src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4449 src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c
4450 src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c
4451 src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4452 src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c
4453 src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c
4454 src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c
4455 src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c
4456 src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c
4457 src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c
4458 src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c
4459 src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c
4460 src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c
4461 src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c
4462 src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c
4463 src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c
4464 src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c
4465 src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4466 src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4467 src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c
4468 src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c
4469 src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c
4470 src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4471 src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4472 src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c
4473 src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4474 src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4475 src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c
4476 src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4477 src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c
4478 src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c
4479 src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]4480 src/f32-vhswish/gen/vhswish-fma3-x8.c
4481 src/f32-vhswish/gen/vhswish-fma3-x16.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]4482 src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c
4483 src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c
4484 src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c
4485 src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c
4486 src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c
4487 src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c
4488 src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c
4489 src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]4490 src/math/sqrt-fma3-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4491 src/math/sqrt-fma3-nr1fma1adj.c
4492 src/math/sqrt-fma3-nr2fma.c)
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]4493
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4494SET(PROD_AVX2_MICROKERNEL_SRCS
4495 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c
4496 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c
4497 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4498 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4499 src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4500 src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4501 src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4502 src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4503 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4504 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4505 src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4506 src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4507 src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4508 src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4509 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
4510 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4511 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4512 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4513 src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4514 src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4515 src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4516 src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4517 src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
Marat Dukhan98e054b2021-09-13 09:43:50 -0700[diff] [blame]4518 src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4519 src/x8-lut/gen/lut-avx2-x128.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4520
4521SET(ALL_AVX2_MICROKERNEL_SRCS
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4522 src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c
4523 src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4524 src/f32-raddexpminusmax/gen/avx2-p5-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4525 src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4526 src/f32-raddexpminusmax/gen/avx2-p5-x72.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4527 src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c
4528 src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4529 src/f32-raddexpminusmax/gen/avx2-p5-x80.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4530 src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c
4531 src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c
4532 src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4533 src/f32-raddexpminusmax/gen/avx2-p5-x96.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4534 src/f32-raddextexp/gen/avx2-p5-x64-acc2.c
4535 src/f32-raddextexp/gen/avx2-p5-x64-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4536 src/f32-raddextexp/gen/avx2-p5-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4537 src/f32-raddextexp/gen/avx2-p5-x72-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4538 src/f32-raddextexp/gen/avx2-p5-x72.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4539 src/f32-raddextexp/gen/avx2-p5-x80-acc2.c
4540 src/f32-raddextexp/gen/avx2-p5-x80-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4541 src/f32-raddextexp/gen/avx2-p5-x80.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4542 src/f32-raddextexp/gen/avx2-p5-x96-acc2.c
4543 src/f32-raddextexp/gen/avx2-p5-x96-acc3.c
4544 src/f32-raddextexp/gen/avx2-p5-x96-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4545 src/f32-raddextexp/gen/avx2-p5-x96.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4546 src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c
4547 src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4548 src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4549 src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4550 src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4551 src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c
4552 src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4553 src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4554 src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c
4555 src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c
4556 src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4557 src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]4558 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c
4559 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c
4560 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c
4561 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c
4562 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c
4563 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c
4564 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c
4565 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c
4566 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c
4567 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c
4568 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c
4569 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c
4570 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c
4571 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c
4572 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c
4573 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c
4574 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c
4575 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c
4576 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c
4577 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c
4578 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c
4579 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c
4580 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c
4581 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c
4582 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c
4583 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c
4584 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c
4585 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c
4586 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c
4587 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c
4588 src/f32-velu/gen/velu-avx2-rr1-p6-x8.c
4589 src/f32-velu/gen/velu-avx2-rr1-p6-x16.c
4590 src/f32-velu/gen/velu-avx2-rr1-p6-x24.c
4591 src/f32-velu/gen/velu-avx2-rr1-p6-x32.c
4592 src/f32-velu/gen/velu-avx2-rr1-p6-x40.c
4593 src/f32-velu/gen/velu-avx2-rr1-p6-x48.c
4594 src/f32-velu/gen/velu-avx2-rr1-p6-x56.c
4595 src/f32-velu/gen/velu-avx2-rr1-p6-x64.c
4596 src/f32-velu/gen/velu-avx2-rr1-p6-x72.c
4597 src/f32-velu/gen/velu-avx2-rr1-p6-x80.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]4598 src/f32-vrelu/gen/vrelu-avx-x8.c
4599 src/f32-vrelu/gen/vrelu-avx-x16.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4600 src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c
4601 src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c
4602 src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c
4603 src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c
4604 src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c
4605 src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c
4606 src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c
4607 src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c
4608 src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c
4609 src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c
4610 src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c
4611 src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c
4612 src/f32-vscaleextexp/gen/avx2-p5-x8.c
4613 src/f32-vscaleextexp/gen/avx2-p5-x16.c
4614 src/f32-vscaleextexp/gen/avx2-p5-x24.c
4615 src/f32-vscaleextexp/gen/avx2-p5-x32.c
4616 src/f32-vscaleextexp/gen/avx2-p5-x40.c
4617 src/f32-vscaleextexp/gen/avx2-p5-x48.c
4618 src/f32-vscaleextexp/gen/avx2-p5-x56.c
4619 src/f32-vscaleextexp/gen/avx2-p5-x64.c
4620 src/f32-vscaleextexp/gen/avx2-p5-x72.c
4621 src/f32-vscaleextexp/gen/avx2-p5-x80.c
4622 src/f32-vscaleextexp/gen/avx2-p5-x88.c
4623 src/f32-vscaleextexp/gen/avx2-p5-x96.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]4624 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c
4625 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c
4626 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c
4627 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c
4628 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c
4629 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c
4630 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c
4631 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c
4632 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c
4633 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c
4634 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c
4635 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c
4636 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c
4637 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c
4638 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c
4639 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c
4640 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c
4641 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c
4642 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c
4643 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c
4644 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c
4645 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c
4646 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c
4647 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c
4648 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c
4649 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c
4650 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c
4651 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c
4652 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c
4653 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]4654 src/math/exp-avx2-rr2-lut8-p3-perm.c
4655 src/math/exp-avx2-rr2-lut8-p4-perm.c
4656 src/math/exp-avx2-rr2-p5.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]4657 src/math/expm1minus-avx2-rr1-lut4-p4-perm.c
4658 src/math/expm1minus-avx2-rr1-lut8-p4-perm.c
4659 src/math/expm1minus-avx2-rr1-lut16-p3-gather.c
4660 src/math/expm1minus-avx2-rr1-p6.c
Frank Barcharde7223ee2020-12-04 19:04:01 -0800[diff] [blame]4661 src/math/expminus-avx2-rr2-p5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4662 src/math/extexp-avx2-p5.c
4663 src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c
4664 src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c
4665 src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c
4666 src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c
4667 src/math/sigmoid-avx2-rr1-p5-div.c
4668 src/math/sigmoid-avx2-rr1-p5-nr1fma.c
4669 src/math/sigmoid-avx2-rr1-p5-nr2fma.c
4670 src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c
4671 src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c
4672 src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c
4673 src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c
4674 src/math/sigmoid-avx2-rr2-p5-div.c
4675 src/math/sigmoid-avx2-rr2-p5-nr1fma.c
4676 src/math/sigmoid-avx2-rr2-p5-nr2fma.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4677 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c
4678 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4679 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4680 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c
4681 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4682 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4683 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4684 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c
4685 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4686 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4687 src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c
4688 src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4689 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4690 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c
4691 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4692 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4693 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4694 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c
4695 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4696 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]4697 src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4698 src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c
4699 src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c
4700 src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c
4701 src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4702 src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4703 src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4704 src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c
4705 src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4706 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4707 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4708 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4709 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c
4710 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4711 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4712 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4713 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c
4714 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4715 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4716 src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4717 src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4718 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4719 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c
4720 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4721 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4722 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4723 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c
4724 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4725 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4726 src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]4727 src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4728 src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]4729 src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4730 src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]4731 src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4732 src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4733 src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4734 src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c
Marat Dukhane6dc0b62020-09-08 23:57:14 -0700[diff] [blame]4735 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
4736 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
4737 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c
4738 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c
4739 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
4740 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4741 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c
Marat Dukhan902ef7f2021-07-02 16:11:06 -0700[diff] [blame]4742 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c
Marat Dukhan09c312b2021-07-09 00:45:04 -0700[diff] [blame]4743 src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c
4744 src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c
4745 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4746 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4747 src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c
4748 src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c
Marat Dukhan902ef7f2021-07-02 16:11:06 -0700[diff] [blame]4749 src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4750 src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c
4751 src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4752 src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4753 src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]4754 src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4755 src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
4756 src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
4757 src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
Marat Dukhan7c478e32021-09-10 09:48:13 -0700[diff] [blame]4758 src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4759 src/x8-lut/gen/lut-avx2-x32.c
4760 src/x8-lut/gen/lut-avx2-x64.c
4761 src/x8-lut/gen/lut-avx2-x96.c
4762 src/x8-lut/gen/lut-avx2-x128.c)
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]4763
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4764SET(PROD_AVX512F_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4765 src/f32-dwconv/gen/up16x3-minmax-avx512f.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4766 src/f32-dwconv/gen/up16x4-minmax-avx512f.c
4767 src/f32-dwconv/gen/up16x9-minmax-avx512f.c
4768 src/f32-dwconv/gen/up16x25-minmax-avx512f.c
4769 src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c
4770 src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c
4771 src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c
4772 src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c
4773 src/f32-prelu/gen/avx512f-2x16.c
4774 src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c
4775 src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c
4776 src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c
4777 src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c
4778 src/f32-vbinary/gen/vmax-avx512f-x32.c
4779 src/f32-vbinary/gen/vmaxc-avx512f-x32.c
4780 src/f32-vbinary/gen/vmin-avx512f-x32.c
4781 src/f32-vbinary/gen/vminc-avx512f-x32.c
4782 src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c
4783 src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c
4784 src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c
4785 src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c
4786 src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c
4787 src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c
4788 src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c
4789 src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c
4790 src/f32-vclamp/gen/vclamp-avx512f-x16.c
4791 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c
4792 src/f32-vhswish/gen/vhswish-avx512f-x16.c
4793 src/f32-vlrelu/gen/vlrelu-avx512f-x16.c
4794 src/f32-vrnd/gen/vrndd-avx512f-x16.c
4795 src/f32-vrnd/gen/vrndne-avx512f-x16.c
4796 src/f32-vrnd/gen/vrndu-avx512f-x16.c
4797 src/f32-vrnd/gen/vrndz-avx512f-x16.c
4798 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c
4799 src/f32-vunary/gen/vabs-avx512f-x16.c
4800 src/f32-vunary/gen/vneg-avx512f-x16.c
4801 src/f32-vunary/gen/vsqr-avx512f-x16.c)
4802
4803SET(ALL_AVX512F_MICROKERNEL_SRCS
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4804 src/f32-dwconv/gen/up16x3-minmax-avx512f-acc2.c
4805 src/f32-dwconv/gen/up16x3-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4806 src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c
4807 src/f32-dwconv/gen/up16x4-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4808 src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c
4809 src/f32-dwconv/gen/up16x9-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4810 src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c
4811 src/f32-dwconv/gen/up16x25-minmax-avx512f.c
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]4812 src/f32-dwconv/gen/up32x3-minmax-avx512f-acc2.c
4813 src/f32-dwconv/gen/up32x3-minmax-avx512f.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4814 src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c
4815 src/f32-dwconv/gen/up32x4-minmax-avx512f.c
4816 src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c
4817 src/f32-dwconv/gen/up32x9-minmax-avx512f.c
4818 src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c
4819 src/f32-dwconv/gen/up32x25-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4820 src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c
4821 src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c
4822 src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c
4823 src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c
4824 src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c
4825 src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4826 src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c
4827 src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c
4828 src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c
4829 src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c
4830 src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c
4831 src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4832 src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c
4833 src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c
4834 src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c
4835 src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c
4836 src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c
4837 src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]4838 src/f32-prelu/gen/avx512f-2x16.c
4839 src/f32-prelu/gen/avx512f-2x32.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4840 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c
4841 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4842 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4843 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4844 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4845 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c
4846 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4847 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4848 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c
4849 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c
4850 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4851 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4852 src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c
4853 src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4854 src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4855 src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4856 src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4857 src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c
4858 src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4859 src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4860 src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c
4861 src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c
4862 src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4863 src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4864 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c
4865 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4866 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4867 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4868 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4869 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c
4870 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4871 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4872 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c
4873 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c
4874 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4875 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4876 src/f32-rmax/avx512f.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4877 src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c
4878 src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c
4879 src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c
4880 src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c
4881 src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c
4882 src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c
4883 src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c
4884 src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]4885 src/f32-vbinary/gen/vmax-avx512f-x16.c
4886 src/f32-vbinary/gen/vmax-avx512f-x32.c
4887 src/f32-vbinary/gen/vmaxc-avx512f-x16.c
4888 src/f32-vbinary/gen/vmaxc-avx512f-x32.c
4889 src/f32-vbinary/gen/vmin-avx512f-x16.c
4890 src/f32-vbinary/gen/vmin-avx512f-x32.c
4891 src/f32-vbinary/gen/vminc-avx512f-x16.c
4892 src/f32-vbinary/gen/vminc-avx512f-x32.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4893 src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c
4894 src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c
4895 src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c
4896 src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c
4897 src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c
4898 src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c
4899 src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c
4900 src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]4901 src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c
4902 src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c
4903 src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c
4904 src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4905 src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c
4906 src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c
4907 src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c
4908 src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]4909 src/f32-vclamp/gen/vclamp-avx512f-x16.c
4910 src/f32-vclamp/gen/vclamp-avx512f-x32.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]4911 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c
4912 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c
4913 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c
4914 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c
4915 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c
4916 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c
4917 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c
4918 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c
4919 src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c
4920 src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c
4921 src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c
4922 src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c
4923 src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c
4924 src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c
4925 src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c
4926 src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]4927 src/f32-vhswish/gen/vhswish-avx512f-x16.c
4928 src/f32-vhswish/gen/vhswish-avx512f-x32.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4929 src/f32-vlrelu/gen/vlrelu-avx512f-x16.c
4930 src/f32-vlrelu/gen/vlrelu-avx512f-x32.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]4931 src/f32-vrelu/gen/vrelu-avx512f-x16.c
4932 src/f32-vrelu/gen/vrelu-avx512f-x32.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4933 src/f32-vrnd/gen/vrndd-avx512f-x16.c
4934 src/f32-vrnd/gen/vrndd-avx512f-x32.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4935 src/f32-vrnd/gen/vrndne-avx512f-x16.c
4936 src/f32-vrnd/gen/vrndne-avx512f-x32.c
4937 src/f32-vrnd/gen/vrndu-avx512f-x16.c
4938 src/f32-vrnd/gen/vrndu-avx512f-x32.c
4939 src/f32-vrnd/gen/vrndz-avx512f-x16.c
4940 src/f32-vrnd/gen/vrndz-avx512f-x32.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]4941 src/f32-vscale/avx512f-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4942 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c
4943 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c
4944 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c
4945 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c
4946 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c
4947 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c
4948 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c
4949 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c
4950 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c
4951 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c
4952 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c
4953 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c
4954 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c
4955 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c
4956 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c
4957 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c
4958 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c
4959 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c
4960 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c
4961 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c
4962 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c
4963 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c
4964 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c
4965 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]4966 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c
4967 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c
4968 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c
4969 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c
4970 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c
4971 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c
4972 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c
4973 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c
4974 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c
4975 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c
4976 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c
4977 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c
4978 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c
4979 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c
4980 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c
4981 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c
4982 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c
4983 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c
4984 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c
4985 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c
4986 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c
4987 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c
4988 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c
4989 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c
4990 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c
4991 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c
4992 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c
4993 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c
4994 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c
4995 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c
4996 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c
4997 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c
4998 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c
4999 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c
5000 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c
5001 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c
5002 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c
5003 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c
5004 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c
5005 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c
5006 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c
5007 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c
5008 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c
5009 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c
5010 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c
5011 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c
5012 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c
5013 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]5014 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c
5015 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c
5016 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c
5017 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c
5018 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c
5019 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c
5020 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c
5021 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]5022 src/f32-vunary/gen/vabs-avx512f-x16.c
5023 src/f32-vunary/gen/vabs-avx512f-x32.c
5024 src/f32-vunary/gen/vneg-avx512f-x16.c
5025 src/f32-vunary/gen/vneg-avx512f-x32.c
5026 src/f32-vunary/gen/vsqr-avx512f-x16.c
5027 src/f32-vunary/gen/vsqr-avx512f-x32.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]5028 src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c
5029 src/math/exp-avx512f-rr2-lut16-p3-perm.c
5030 src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c
5031 src/math/exp-avx512f-rr2-lut32-p2-perm2.c
5032 src/math/exp-avx512f-rr2-p5-scalef.c
5033 src/math/exp-avx512f-rr2-p5.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]5034 src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c
5035 src/math/expm1minus-avx512f-rr1-p6.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]5036 src/math/extexp-avx512f-p5.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]5037 src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]5038 src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5039 src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]5040 src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]5041 src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5042 src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]5043 src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]5044 src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5045 src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c
5046 src/math/sigmoid-avx512f-rr1-p5-scalef-div.c
5047 src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c
5048 src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c
5049 src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c
5050 src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c
5051 src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c
5052 src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c
5053 src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c
5054 src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]5055 src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]5056 src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5057 src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c
5058 src/math/sigmoid-avx512f-rr2-p5-scalef-div.c
5059 src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c
5060 src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]5061 src/math/sqrt-avx512f-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5062 src/math/sqrt-avx512f-nr1fma1adj.c
5063 src/math/sqrt-avx512f-nr2fma.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5064
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5065SET(PROD_AVX512SKX_MICROKERNEL_SRCS
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]5066 src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c
Marat Dukhana0c61682021-11-10 19:23:41 -0800[diff] [blame]5067 src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5068 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
5069 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
5070 src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
5071 src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
5072 src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
5073 src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
5074 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
5075 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
5076 src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
5077 src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
5078 src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
5079 src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
5080 src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
5081 src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
5082 src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
5083 src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
5084 src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
5085 src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
5086 src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
5087 src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
5088 src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
Marat Dukhan98e054b2021-09-13 09:43:50 -0700[diff] [blame]5089 src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
5090 src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5091
5092SET(ALL_AVX512SKX_MICROKERNEL_SRCS
Marat Dukhan79c76ab2021-09-26 20:26:39 -0700[diff] [blame]5093 src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c
5094 src/f16-f32-vcvt/gen/vcvt-avx512skx-x32.c
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]5095 src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c
5096 src/f32-f16-vcvt/gen/vcvt-avx512skx-x32.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]5097 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c
5098 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c
5099 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
5100 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -0700[diff] [blame]5101 src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
5102 src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c
5103 src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c
5104 src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
5105 src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
5106 src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c
5107 src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c
5108 src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5109 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5110 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5111 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5112 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5113 src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5114 src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5115 src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5116 src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5117 src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5118 src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]5119 src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]5120 src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
Marat Dukhane76049a2021-07-22 14:48:59 -0700[diff] [blame]5121 src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
5122 src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c
5123 src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
5124 src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c
Marat Dukhancfd606b2021-07-09 01:18:45 -0700[diff] [blame]5125 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c
5126 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c
5127 src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
5128 src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhan3cf2e222021-07-08 11:38:45 -0700[diff] [blame]5129 src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
5130 src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c
5131 src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c
5132 src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
5133 src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
5134 src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c
5135 src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c
Marat Dukhane76049a2021-07-22 14:48:59 -0700[diff] [blame]5136 src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
5137 src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
5138 src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c
5139 src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
Marat Dukhan2b3c4102021-09-10 19:05:37 -0700[diff] [blame]5140 src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c
5141 src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c
5142 src/x8-lut/gen/lut-avx512skx-vpshufb-x128.c
5143 src/x8-lut/gen/lut-avx512skx-vpshufb-x192.c
5144 src/x8-lut/gen/lut-avx512skx-vpshufb-x256.c)
Marat Dukhanbb00b1d2020-08-10 11:37:23 -0700[diff] [blame]5145
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5146SET(AARCH32_ASM_MICROKERNEL_SRCS
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]5147 src/f32-gemm/4x4-aarch32-vfp-ld64.S
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]5148 src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5149 src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S
5150 src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S
Frank Barchard490febe2020-07-16 18:42:17 -0700[diff] [blame]5151 src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5152 src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S
Frank Barchard569561d2020-06-17 13:11:12 -0700[diff] [blame]5153 src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S
Frank Barchard490febe2020-07-16 18:42:17 -0700[diff] [blame]5154 src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5155 src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S
Marat Dukhandc2e4372020-07-21 17:01:00 -0700[diff] [blame]5156 src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S
Frank Barchard490febe2020-07-16 18:42:17 -0700[diff] [blame]5157 src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S
5158 src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S
5159 src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S
Marat Dukhandc2e4372020-07-21 17:01:00 -0700[diff] [blame]5160 src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5161
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5162SET(AARCH64_ASM_MICROKERNEL_SRCS
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]5163 src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5164 src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]5165 src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5166 src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]5167 src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard80fc5f42021-06-07 10:43:16 -0700[diff] [blame]5168 src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S
Frank Barchard97374612021-06-07 11:51:07 -0700[diff] [blame]5169 src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]5170 src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S
5171 src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5172 src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S
5173 src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S
5174 src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S
5175 src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S
5176 src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard80fc5f42021-06-07 10:43:16 -0700[diff] [blame]5177 src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S
Frank Barchard97374612021-06-07 11:51:07 -0700[diff] [blame]5178 src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]5179 src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S
5180 src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5181 src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S
5182 src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5183 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5184 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5185 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5186 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5187 src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5188 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S
5189 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5190 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5191 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5192 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5193 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5194 src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5195 src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5196 src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5197 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S
5198 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5199 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5200 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5201 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5202 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5203 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5204 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5205 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S
5206 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5207 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5208 src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S
5209 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S
5210 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5211 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S
5212 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S
5213 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5214 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5215 src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5216 src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5217 src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5218 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S
5219 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5220 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S
5221 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S
5222 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S
5223 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5224 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5225 src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5226 src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5227 src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S
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5229 src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5230 src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S
5231 src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S
5232 src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]5233 src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5234 src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]5235 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barcharde3491242021-06-11 14:04:57 -0700[diff] [blame]5236 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S
Frank Barchard79cd5f92021-06-21 17:34:59 -0700[diff] [blame]5237 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5238 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
5239 src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S
5240 src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
5241 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barcharde3491242021-06-11 14:04:57 -0700[diff] [blame]5242 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S
Frank Barchard79cd5f92021-06-21 17:34:59 -0700[diff] [blame]5243 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]5244 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5245 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5246 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5247 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5248 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5249 src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S
5250 src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5251 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5252 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5253 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5254 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S
5255 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S
5256 src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5257 src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5258 src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5259 src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5260 src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5261 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
5262 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S
5263 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
5264 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5265 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5266 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5267 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5268 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S
5269 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5270 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5271 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5272 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S
5273 src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5274 src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5275 src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5276 src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5277 src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]5278 src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
5279 src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
5280 src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5281 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5282 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5283 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5284 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5285 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S
5286 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S
5287 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S
5288 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S
Frank Barchard1a0b2762021-06-29 18:37:59 -0700[diff] [blame]5289 src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S
5290 src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5291 src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld32.S
5292 src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld64.S
Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5293 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5294 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5295 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
5296 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S
5297 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S
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5299 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S
5300 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S
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Frank Barcharde22685a2021-11-12 11:36:58 -0800[diff] [blame]5304 src/qs8-gemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal.S
Frank Barchard98af05c2021-06-30 12:15:04 -0700[diff] [blame]5305 src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5306 src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S
Frank Barchard98af05c2021-06-30 12:15:04 -0700[diff] [blame]5307 src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5308 src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5309 src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
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Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]5311 src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5312 src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barchard1a0b2762021-06-29 18:37:59 -0700[diff] [blame]5313 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
5314 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S
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5318 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S
5319 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S
Frank Barchard60729d02021-07-20 12:25:09 -0700[diff] [blame]5320 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S
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5322 src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
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5326 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S
5327 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S
5328 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S
5329 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S
5330 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S
5331 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S
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5334 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S
5335 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S
5336 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal.S
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Frank Barchard98af05c2021-06-30 12:15:04 -0700[diff] [blame]5339 src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchard0bc58012021-11-22 18:12:05 -0800[diff] [blame]5340 src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S
Frank Barchard98af05c2021-06-30 12:15:04 -0700[diff] [blame]5341 src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
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Frank Barchard9cdc10d2021-11-22 19:03:54 -0800[diff] [blame]5357 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5358 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchardfb3a94f2021-08-02 20:37:06 -0700[diff] [blame]5359 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S
Frank Barchard9cdc10d2021-11-22 19:03:54 -0800[diff] [blame]5360 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barcharda49e41f2021-08-31 20:30:24 -0700[diff] [blame]5361 src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barchard0c764222021-08-24 16:13:06 -0700[diff] [blame]5362 src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchardca4c68e2021-08-25 19:06:40 -0700[diff] [blame]5363 src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barcharddf8e6042021-09-03 13:56:29 -0700[diff] [blame]5364 src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]5365 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchardfb3a94f2021-08-02 20:37:06 -0700[diff] [blame]5366 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S
Frank Barchard9cdc10d2021-11-22 19:03:54 -0800[diff] [blame]5367 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S
Frank Barchardfb3a94f2021-08-02 20:37:06 -0700[diff] [blame]5368 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0c764222021-08-24 16:13:06 -0700[diff] [blame]5369 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S
Frank Barchard9cdc10d2021-11-22 19:03:54 -0800[diff] [blame]5370 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S
Frank Barcharda49e41f2021-08-31 20:30:24 -0700[diff] [blame]5371 src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barchard0c764222021-08-24 16:13:06 -0700[diff] [blame]5372 src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5373
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5374SET(PROD_MICROKERNEL_SRCS ${PROD_SCALAR_MICROKERNEL_SRCS})
5375SET(ALL_MICROKERNEL_SRCS ${ALL_SCALAR_MICROKERNEL_SRCS})
Chester Liu5c29c642020-12-30 09:55:57 +0800[diff] [blame]5376IF(CMAKE_SYSTEM_PROCESSOR MATCHES "^armv[5-8]" OR IOS_ARCH MATCHES "^armv7")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5377 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEON_MICROKERNEL_SRCS})
Marat Dukhanb4cde5a2021-11-09 10:35:17 -0800[diff] [blame]5378 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONFP16_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5379 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONFMA_MICROKERNEL_SRCS})
5380 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONV8_MICROKERNEL_SRCS})
5381 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEON_MICROKERNEL_SRCS})
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]5382 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFP16_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5383 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFMA_MICROKERNEL_SRCS})
5384 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONV8_MICROKERNEL_SRCS})
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -0700[diff] [blame]5385 IF(NOT IOS)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5386 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONDOT_MICROKERNEL_SRCS})
5387 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONDOT_MICROKERNEL_SRCS})
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -0700[diff] [blame]5388 ENDIF()
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]5389 IF(XNNPACK_ENABLE_ASSEMBLY)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5390 LIST(APPEND PROD_MICROKERNEL_SRCS ${AARCH32_ASM_MICROKERNEL_SRCS})
5391 LIST(APPEND ALL_MICROKERNEL_SRCS ${AARCH32_ASM_MICROKERNEL_SRCS})
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]5392 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5393ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5394IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(aarch64|arm64)$" OR IOS_ARCH MATCHES "^arm64.*")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5395 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEON_MICROKERNEL_SRCS})
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]5396 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONFP16_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5397 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONFMA_MICROKERNEL_SRCS})
5398 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONV8_MICROKERNEL_SRCS})
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]5399 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AARCH64_NEON_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5400 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS})
5401 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONDOT_MICROKERNEL_SRCS})
5402 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEON_MICROKERNEL_SRCS})
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]5403 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFP16_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5404 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFMA_MICROKERNEL_SRCS})
5405 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONV8_MICROKERNEL_SRCS})
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]5406 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AARCH64_NEON_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5407 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS})
5408 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONDOT_MICROKERNEL_SRCS})
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]5409 IF(XNNPACK_ENABLE_ASSEMBLY)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5410 LIST(APPEND PROD_MICROKERNEL_SRCS ${AARCH64_ASM_MICROKERNEL_SRCS})
5411 LIST(APPEND ALL_MICROKERNEL_SRCS ${AARCH64_ASM_MICROKERNEL_SRCS})
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]5412 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5413ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5414IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(i[3-6]86|x86_64|AMD64)$" OR IOS_ARCH MATCHES "^(i386|x86_64|AMD64)$")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5415 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSE_MICROKERNEL_SRCS})
5416 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSE2_MICROKERNEL_SRCS})
5417 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSSE3_MICROKERNEL_SRCS})
5418 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSE41_MICROKERNEL_SRCS})
5419 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX_MICROKERNEL_SRCS})
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]5420 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_F16C_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5421 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_XOP_MICROKERNEL_SRCS})
5422 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_FMA3_MICROKERNEL_SRCS})
5423 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX2_MICROKERNEL_SRCS})
5424 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX512F_MICROKERNEL_SRCS})
5425 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX512SKX_MICROKERNEL_SRCS})
5426 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSE_MICROKERNEL_SRCS})
5427 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSE2_MICROKERNEL_SRCS})
5428 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSSE3_MICROKERNEL_SRCS})
5429 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSE41_MICROKERNEL_SRCS})
5430 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX_MICROKERNEL_SRCS})
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5431 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_F16C_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5432 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_XOP_MICROKERNEL_SRCS})
5433 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_FMA3_MICROKERNEL_SRCS})
5434 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX2_MICROKERNEL_SRCS})
5435 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX512F_MICROKERNEL_SRCS})
5436 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX512SKX_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5437ENDIF()
5438
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5439ADD_LIBRARY(all_microkernels OBJECT ${ALL_MICROKERNEL_SRCS} ${TABLE_SRCS})
Marat Dukhan599d3db2021-08-03 10:50:53 -0700[diff] [blame]5440ADD_LIBRARY(indirection OBJECT src/indirection.c)
5441ADD_LIBRARY(packing OBJECT src/packing.c)
Zhi An Ngb559fe92021-12-06 09:25:38 -0800[diff] [blame^]5442ADD_LIBRARY(jit OBJECT ${JIT_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5443
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5444IF(XNNPACK_LIBRARY_TYPE STREQUAL "default")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5445 ADD_LIBRARY(XNNPACK ${COLD_SRCS} ${HOT_SRCS} ${TABLE_SRCS} ${PROD_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5446ELSEIF(XNNPACK_LIBRARY_TYPE STREQUAL "shared")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5447 ADD_LIBRARY(XNNPACK SHARED ${COLD_SRCS} ${HOT_SRCS} ${TABLE_SRCS} ${PROD_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5448ELSEIF(XNNPACK_LIBRARY_TYPE STREQUAL "static")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5449 ADD_LIBRARY(XNNPACK STATIC ${COLD_SRCS} ${HOT_SRCS} ${TABLE_SRCS} ${PROD_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5450ELSE()
5451 MESSAGE(FATAL_ERROR "Unsupported XNNPACK library type \"${XNNPACK_LIBRARY_TYPE}\". Must be \"static\", \"shared\", or \"default\"")
5452ENDIF()
5453SET_TARGET_PROPERTIES(XNNPACK PROPERTIES
5454 C_STANDARD 99
5455 C_EXTENSIONS YES)
Chester Liu5c29c642020-12-30 09:55:57 +0800[diff] [blame]5456IF(CMAKE_SYSTEM_PROCESSOR MATCHES "^armv[5-8]" OR IOS_ARCH MATCHES "^armv7")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5457 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -marm ")
5458 SET_PROPERTY(SOURCE ${ALL_NEON_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv7-a -mfpu=neon ")
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]5459 SET_PROPERTY(SOURCE ${ALL_NEONFP16_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv7-a -mfpu=neon-fp16 ")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5460 SET_PROPERTY(SOURCE ${ALL_NEONFMA_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv7-a -mfpu=neon-vfpv4 ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5461 IF(IOS)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5462 SET_PROPERTY(SOURCE ${ALL_NEONV8_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mcpu=cyclone -mtune=generic ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5463 SET_PROPERTY(SOURCE ${AARCH32_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -arch ${IOS_ARCH} ")
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -0700[diff] [blame]5464 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5465 SET_PROPERTY(SOURCE ${ALL_NEONV8_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8-a -mfpu=neon-fp-armv8 ")
5466 SET_PROPERTY(SOURCE ${ALL_NEONDOT_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+dotprod -mfpu=neon-fp-armv8 ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5467 ENDIF()
peterjc123ae2d0f62020-10-23 11:00:25 +0800[diff] [blame]5468 # Workground the neon detection bug in ARM v8
5469 # Related links:
5470 # https://github.com/android/ndk/issues/910
5471 # https://reviews.llvm.org/D58477
5472 IF(ANDROID_NDK_MAJOR AND ANDROID_NDK_MAJOR LESS 21)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5473 SET_PROPERTY(SOURCE ${ALL_NEONV8_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfloat-abi=softfp ")
5474 SET_PROPERTY(SOURCE ${ALL_NEONDOT_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfloat-abi=softfp ")
peterjc123ae2d0f62020-10-23 11:00:25 +0800[diff] [blame]5475 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5476ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5477IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(aarch64|arm64)$" OR IOS_ARCH MATCHES "^arm64.*")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5478 SET_PROPERTY(SOURCE ${ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+fp16 ")
5479 SET_PROPERTY(SOURCE ${ALL_NEONDOT_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+dotprod ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5480 SET_PROPERTY(SOURCE ${AARCH64_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+fp16+dotprod ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5481 IF(IOS)
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5482 SET_PROPERTY(SOURCE ${AARCH64_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -arch ${IOS_ARCH} ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5483 ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5484 IF(XNNPACK_TARGET_PROCESSOR STREQUAL "arm64" AND CMAKE_HOST_SYSTEM_PROCESSOR STREQUAL "x86_64")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5485 SET_PROPERTY(SOURCE ${AARCH64_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -arch arm64 ")
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5486 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5487ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5488IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(i[3-6]86|x86|x86_64|AMD64)$" OR IOS_ARCH MATCHES "^(i386|x86_64|AMD64)$")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5489 IF(MSVC)
5490 IF(CMAKE_SYSTEM_PROCESSOR STREQUAL "x86" OR CMAKE_SIZEOF_VOID_P EQUAL 4)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5491 SET_PROPERTY(SOURCE ${ALL_SSE_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE ")
5492 SET_PROPERTY(SOURCE ${ALL_SSE2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE2 ")
5493 SET_PROPERTY(SOURCE ${ALL_SSSE3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE2 ")
5494 SET_PROPERTY(SOURCE ${ALL_SSE41_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE2 ")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5495 ENDIF()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5496 SET_PROPERTY(SOURCE ${ALL_AVX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5497 SET_PROPERTY(SOURCE ${ALL_F16C_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5498 SET_PROPERTY(SOURCE ${ALL_XOP_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
5499 SET_PROPERTY(SOURCE ${ALL_FMA3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
5500 SET_PROPERTY(SOURCE ${ALL_AVX2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX2 ")
5501 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX512 ")
5502 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX512 ")
peter65692c72021-08-17 23:41:05 +0800[diff] [blame]5503 IF(CMAKE_CXX_COMPILER_ID STREQUAL "Clang")
5504 SET_PROPERTY(SOURCE ${ALL_SSE_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-msse ")
5505 SET_PROPERTY(SOURCE ${ALL_SSE2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-msse2 ")
5506 SET_PROPERTY(SOURCE ${ALL_SSSE3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mssse3 ")
5507 SET_PROPERTY(SOURCE ${ALL_SSE41_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-msse4.1 ")
5508 SET_PROPERTY(SOURCE ${ALL_AVX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mavx ")
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5509 SET_PROPERTY(SOURCE ${ALL_F16C_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mf16c ")
peter65692c72021-08-17 23:41:05 +0800[diff] [blame]5510 SET_PROPERTY(SOURCE ${ALL_XOP_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mxop ")
5511 SET_PROPERTY(SOURCE ${ALL_FMA3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mfma ")
5512 SET_PROPERTY(SOURCE ${ALL_AVX2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mfma -clang:-mavx2 ")
5513 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mavx512f ")
5514 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRIDE PROPERTY COMPILE_FLAGS " -clang:-mavx512f -clang:-mavx512cd -clang:-mavx512bw -clang:-mavx512dq -clang:-mavx512vl ")
5515 ENDIF()
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5516 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5517 SET_PROPERTY(SOURCE ${ALL_SSE_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -msse ")
5518 SET_PROPERTY(SOURCE ${ALL_SSE2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -msse2 ")
5519 SET_PROPERTY(SOURCE ${ALL_SSSE3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mssse3 ")
5520 SET_PROPERTY(SOURCE ${ALL_SSE41_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -msse4.1 ")
5521 SET_PROPERTY(SOURCE ${ALL_AVX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mavx ")
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5522 SET_PROPERTY(SOURCE ${ALL_F16C_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mf16c ")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5523 SET_PROPERTY(SOURCE ${ALL_XOP_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mxop ")
5524 SET_PROPERTY(SOURCE ${ALL_FMA3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfma ")
5525 SET_PROPERTY(SOURCE ${ALL_AVX2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfma -mavx2 ")
5526 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mavx512f ")
5527 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRIDE PROPERTY COMPILE_FLAGS " -mavx512f -mavx512cd -mavx512bw -mavx512dq -mavx512vl ")
Marat Dukhan78583c72020-04-26 22:00:43 -0700[diff] [blame]5528 IF(MINGW OR CMAKE_SYSTEM_NAME MATCHES "^(CYGWIN|MSYS)$")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5529 # Work-around for https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65782
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5530 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -fno-asynchronous-unwind-tables ")
5531 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -fno-asynchronous-unwind-tables ")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5532 ENDIF()
Yasuhiro Matsumoto081b77c2020-03-02 10:20:53 +0900[diff] [blame]5533 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5534ENDIF()
Marat Dukhan5fd403b2020-06-23 17:43:48 -0700[diff] [blame]5535TARGET_COMPILE_DEFINITIONS(XNNPACK PRIVATE "XNN_LOG_LEVEL=$<$<CONFIG:Debug>:5>$<$<NOT:$<CONFIG:Debug>>:0>")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5536IF(MSVC)
Marat Dukhanf196d012020-04-15 11:50:03 -0700[diff] [blame]5537 # Even though MSVC has __restrict, it can't be used in all the same contexts as the C99 restrict keyword
5538 TARGET_COMPILE_DEFINITIONS(XNNPACK PRIVATE "restrict=")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5539 TARGET_COMPILE_DEFINITIONS(all_microkernels PRIVATE "restrict=")
5540 TARGET_COMPILE_DEFINITIONS(packing PRIVATE "restrict=")
5541 TARGET_COMPILE_DEFINITIONS(indirection PRIVATE "restrict=")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5542 IF(${CMAKE_VERSION} VERSION_LESS "3.8.0")
peterjc12360a3b192020-10-22 12:01:20 +0800[diff] [blame]5543 IF(NOT CMAKE_BUILD_TYPE STREQUAL "Debug")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5544 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /O2 ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5545 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /O2 ")
5546 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /O1 ")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5547 ENDIF()
5548 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5549 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: /O2 >")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5550 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: /O2 >")
5551 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: /O1 >")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5552 ENDIF()
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5553ELSE()
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5554 IF(${CMAKE_VERSION} VERSION_LESS "3.8.0")
5555 IF(NOT CMAKE_BUILD_TYPE STREQUAL "Debug")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5556 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -O2 ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5557 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -O2 ")
5558 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -Os ")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5559 ENDIF()
5560 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5561 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: -O2 >")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5562 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: -O2 >")
5563 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: -Os >")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5564 ENDIF()
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5565ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5566
5567TARGET_INCLUDE_DIRECTORIES(XNNPACK PUBLIC include)
5568TARGET_INCLUDE_DIRECTORIES(XNNPACK PRIVATE src)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5569TARGET_INCLUDE_DIRECTORIES(all_microkernels PRIVATE include src)
5570TARGET_INCLUDE_DIRECTORIES(packing PRIVATE include src)
5571TARGET_INCLUDE_DIRECTORIES(indirection PRIVATE include src)
Zhi An Ngb559fe92021-12-06 09:25:38 -0800[diff] [blame^]5572TARGET_INCLUDE_DIRECTORIES(jit PRIVATE include src)
Marat Dukhan6ae741a2020-04-13 02:33:53 -0700[diff] [blame]5573IF(WIN32)
5574 # Target Windows 7+ API
5575 TARGET_COMPILE_DEFINITIONS(XNNPACK PRIVATE _WIN32_WINNT=0x0601)
5576ENDIF()
Ashkan Aliabadid255a312019-12-03 12:44:34 -0800[diff] [blame]5577SET_TARGET_PROPERTIES(XNNPACK PROPERTIES PUBLIC_HEADER include/xnnpack.h)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5578
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5579# ---[ Find libm
5580FIND_LIBRARY(LIBM m)
5581IF(LIBM)
5582 TARGET_LINK_LIBRARIES(XNNPACK PRIVATE ${LIBM})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5583 TARGET_LINK_LIBRARIES(all_microkernels PRIVATE ${LIBM})
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5584ENDIF()
5585
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5586# ---[ Configure clog
5587IF(NOT TARGET clog)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5588 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5589 SET(CLOG_BUILD_TESTS OFF CACHE BOOL "")
5590 SET(CLOG_RUNTIME_TYPE "${CPUINFO_RUNTIME_TYPE}" CACHE STRING "")
5591 ADD_SUBDIRECTORY(
5592 "${CLOG_SOURCE_DIR}/deps/clog"
5593 "${CMAKE_BINARY_DIR}/clog")
5594 # We build static version of clog but a dynamic library may indirectly depend on it
5595 SET_PROPERTY(TARGET clog PROPERTY POSITION_INDEPENDENT_CODE ON)
5596 ELSE()
5597 ADD_LIBRARY(clog STATIC IMPORTED)
5598 FIND_LIBRARY(CLOG_LIBRARY clog)
5599 IF(NOT CLOG_LIBRARY)
5600 MESSAGE(FATAL_ERROR "Cannot find clog")
5601 ENDIF()
5602 SET_PROPERTY(TARGET clog PROPERTY IMPORTED_LOCATION "${CLOG_LIBRARY}")
5603 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5604ENDIF()
5605TARGET_LINK_LIBRARIES(XNNPACK PRIVATE clog)
5606
5607# ---[ Configure cpuinfo
5608IF(NOT TARGET cpuinfo)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5609 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5610 SET(CPUINFO_BUILD_TOOLS OFF CACHE BOOL "")
5611 SET(CPUINFO_BUILD_UNIT_TESTS OFF CACHE BOOL "")
5612 SET(CPUINFO_BUILD_MOCK_TESTS OFF CACHE BOOL "")
5613 SET(CPUINFO_BUILD_BENCHMARKS OFF CACHE BOOL "")
5614 ADD_SUBDIRECTORY(
5615 "${CPUINFO_SOURCE_DIR}"
5616 "${CMAKE_BINARY_DIR}/cpuinfo")
5617 ELSE()
5618 ADD_LIBRARY(cpuinfo SHARED IMPORTED)
5619 FIND_LIBRARY(CPUINFO_LIBRARY cpuinfo)
5620 IF(NOT CPUINFO_LIBRARY)
5621 MESSAGE(FATAL_ERROR "Cannot find cpuinfo")
5622 ENDIF()
5623 SET_PROPERTY(TARGET cpuinfo PROPERTY IMPORTED_LOCATION "${CPUINFO_LIBRARY}")
5624 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5625ENDIF()
5626TARGET_LINK_LIBRARIES(XNNPACK PRIVATE cpuinfo)
5627
5628# ---[ Configure pthreadpool
5629IF(NOT TARGET pthreadpool)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5630 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5631 SET(PTHREADPOOL_BUILD_TESTS OFF CACHE BOOL "")
5632 SET(PTHREADPOOL_BUILD_BENCHMARKS OFF CACHE BOOL "")
5633 SET(PTHREADPOOL_ALLOW_DEPRECATED_API OFF CACHE BOOL "")
5634 ADD_SUBDIRECTORY(
5635 "${PTHREADPOOL_SOURCE_DIR}"
5636 "${CMAKE_BINARY_DIR}/pthreadpool")
5637 ELSE()
5638 ADD_LIBRARY(pthreadpool SHARED IMPORTED)
5639 FIND_LIBRARY(PTHREADPOOL_LIBRARY pthreadpool)
5640 IF(NOT PTHREADPOOL_LIBRARY)
5641 MESSAGE(FATAL_ERROR "Cannot find pthreadpool")
5642 ENDIF()
5643 SET_PROPERTY(TARGET pthreadpool PROPERTY IMPORTED_LOCATION "${PTHREADPOOL_LIBRARY}")
5644 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5645ENDIF()
5646TARGET_LINK_LIBRARIES(XNNPACK PUBLIC pthreadpool)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5647TARGET_LINK_LIBRARIES(all_microkernels PRIVATE pthreadpool)
5648TARGET_LINK_LIBRARIES(packing PRIVATE pthreadpool)
5649TARGET_LINK_LIBRARIES(indirection PRIVATE pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5650
5651# ---[ Configure FXdiv
5652IF(NOT TARGET fxdiv)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5653 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5654 SET(FXDIV_BUILD_TESTS OFF CACHE BOOL "")
5655 SET(FXDIV_BUILD_BENCHMARKS OFF CACHE BOOL "")
5656 ADD_SUBDIRECTORY(
5657 "${FXDIV_SOURCE_DIR}"
5658 "${CMAKE_BINARY_DIR}/FXdiv")
5659 ELSE()
5660 FIND_FILE(FXDIV_HDR fxdiv.h PATH_SUFFIXES include)
5661 IF(NOT FXDIV_HDR)
5662 MESSAGE(FATAL_ERROR "Cannot find fxdiv")
5663 ENDIF()
5664 ADD_LIBRARY(fxdiv STATIC "${FXDIV_HDR}")
5665 SET_PROPERTY(TARGET fxdiv PROPERTY LINKER_LANGUAGE C)
5666 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5667ENDIF()
5668TARGET_LINK_LIBRARIES(XNNPACK PRIVATE fxdiv)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5669TARGET_LINK_LIBRARIES(all_microkernels PRIVATE fxdiv)
5670TARGET_LINK_LIBRARIES(indirection PRIVATE fxdiv)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5671
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5672# ---[ Configure FP16
5673IF(NOT TARGET fp16)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5674 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5675 SET(FP16_BUILD_TESTS OFF CACHE BOOL "")
5676 SET(FP16_BUILD_BENCHMARKS OFF CACHE BOOL "")
5677 ADD_SUBDIRECTORY(
5678 "${FP16_SOURCE_DIR}"
5679 "${CMAKE_BINARY_DIR}/FP16")
5680 ELSE()
5681 FIND_FILE(FP16_HDR fp16.h PATH_SUFFIXES include)
5682 IF(NOT FP16_HDR)
5683 MESSAGE(FATAL_ERROR "Cannot find fp16")
5684 ENDIF()
5685 ADD_LIBRARY(fp16 STATIC "${FP16_HDR}")
5686 SET_PROPERTY(TARGET fp16 PROPERTY LINKER_LANGUAGE C)
5687 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5688ENDIF()
5689TARGET_LINK_LIBRARIES(XNNPACK PRIVATE fp16)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5690TARGET_LINK_LIBRARIES(all_microkernels PRIVATE fp16)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5691
5692INSTALL(TARGETS XNNPACK
5693 LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR}
5694 ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR}
5695 PUBLIC_HEADER DESTINATION ${CMAKE_INSTALL_INCLUDEDIR})
5696
5697# ---[ XNNPACK unit tests
5698IF(XNNPACK_BUILD_TESTS)
5699 # ---[ Build google test
5700 IF(NOT TARGET gtest)
5701 SET(gtest_force_shared_crt ON CACHE BOOL "" FORCE)
5702 ADD_SUBDIRECTORY(
5703 "${GOOGLETEST_SOURCE_DIR}"
5704 "${CMAKE_BINARY_DIR}/googletest")
5705 ENDIF()
5706
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]5707 # ---[ Build size tests
5708
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5709 ADD_EXECUTABLE(operator-size-test test/operator-size.c)
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]5710 SET_TARGET_PROPERTIES(operator-size-test PROPERTIES
5711 C_STANDARD 99
5712 C_EXTENSIONS NO)
5713 TARGET_LINK_LIBRARIES(operator-size-test PRIVATE XNNPACK)
5714
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5715 ADD_EXECUTABLE(subgraph-size-test test/subgraph-size.c)
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]5716 SET_TARGET_PROPERTIES(subgraph-size-test PROPERTIES
5717 C_STANDARD 99
5718 C_EXTENSIONS NO)
5719 TARGET_LINK_LIBRARIES(subgraph-size-test PRIVATE XNNPACK)
5720
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5721 # ---[ Build operator-level unit tests
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5722 ADD_EXECUTABLE(abs-nc-test test/abs-nc.cc)
5723 SET_TARGET_PROPERTIES(abs-nc-test PROPERTIES
5724 CXX_STANDARD 11
5725 CXX_STANDARD_REQUIRED YES
5726 CXX_EXTENSIONS NO)
5727 TARGET_INCLUDE_DIRECTORIES(abs-nc-test PRIVATE src test)
5728 TARGET_LINK_LIBRARIES(abs-nc-test PRIVATE XNNPACK gtest gtest_main)
5729 ADD_TEST(abs-nc-test abs-nc-test)
5730
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]5731 ADD_EXECUTABLE(add-nd-test test/add-nd.cc)
5732 SET_TARGET_PROPERTIES(add-nd-test PROPERTIES
5733 CXX_STANDARD 11
5734 CXX_STANDARD_REQUIRED YES
5735 CXX_EXTENSIONS NO)
5736 TARGET_INCLUDE_DIRECTORIES(add-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5737 TARGET_LINK_LIBRARIES(add-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]5738 ADD_TEST(add-nd-test add-nd-test)
5739
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5740 ADD_EXECUTABLE(argmax-pooling-nhwc-test test/argmax-pooling-nhwc.cc)
5741 SET_TARGET_PROPERTIES(argmax-pooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5742 CXX_STANDARD 11
5743 CXX_STANDARD_REQUIRED YES
5744 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5745 TARGET_INCLUDE_DIRECTORIES(argmax-pooling-nhwc-test PRIVATE src test)
5746 TARGET_LINK_LIBRARIES(argmax-pooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5747 ADD_TEST(argmax-pooling-nhwc-test argmax-pooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5748
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5749 ADD_EXECUTABLE(average-pooling-nhwc-test test/average-pooling-nhwc.cc)
5750 SET_TARGET_PROPERTIES(average-pooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5751 CXX_STANDARD 11
5752 CXX_STANDARD_REQUIRED YES
5753 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5754 TARGET_INCLUDE_DIRECTORIES(average-pooling-nhwc-test PRIVATE src test)
5755 TARGET_LINK_LIBRARIES(average-pooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5756 ADD_TEST(average-pooling-nhwc-test average-pooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5757
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5758 ADD_EXECUTABLE(bankers-rounding-nc-test test/bankers-rounding-nc.cc)
5759 SET_TARGET_PROPERTIES(bankers-rounding-nc-test PROPERTIES
5760 CXX_STANDARD 11
5761 CXX_STANDARD_REQUIRED YES
5762 CXX_EXTENSIONS NO)
5763 TARGET_INCLUDE_DIRECTORIES(bankers-rounding-nc-test PRIVATE src test)
5764 TARGET_LINK_LIBRARIES(bankers-rounding-nc-test PRIVATE XNNPACK gtest gtest_main)
5765 ADD_TEST(bankers-rounding-nc-test bankers-rounding-nc-test)
5766
5767 ADD_EXECUTABLE(ceiling-nc-test test/ceiling-nc.cc)
5768 SET_TARGET_PROPERTIES(ceiling-nc-test PROPERTIES
5769 CXX_STANDARD 11
5770 CXX_STANDARD_REQUIRED YES
5771 CXX_EXTENSIONS NO)
5772 TARGET_INCLUDE_DIRECTORIES(ceiling-nc-test PRIVATE src test)
5773 TARGET_LINK_LIBRARIES(ceiling-nc-test PRIVATE XNNPACK gtest gtest_main)
5774 ADD_TEST(ceiling-nc-test ceiling-nc-test)
5775
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5776 ADD_EXECUTABLE(channel-shuffle-nc-test test/channel-shuffle-nc.cc)
5777 SET_TARGET_PROPERTIES(channel-shuffle-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5778 CXX_STANDARD 11
5779 CXX_STANDARD_REQUIRED YES
5780 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5781 TARGET_INCLUDE_DIRECTORIES(channel-shuffle-nc-test PRIVATE src test)
5782 TARGET_LINK_LIBRARIES(channel-shuffle-nc-test PRIVATE XNNPACK gtest gtest_main)
5783 ADD_TEST(channel-shuffle-nc-test channel-shuffle-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5784
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5785 ADD_EXECUTABLE(clamp-nc-test test/clamp-nc.cc)
5786 SET_TARGET_PROPERTIES(clamp-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5787 CXX_STANDARD 11
5788 CXX_STANDARD_REQUIRED YES
5789 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5790 TARGET_INCLUDE_DIRECTORIES(clamp-nc-test PRIVATE src test)
5791 TARGET_LINK_LIBRARIES(clamp-nc-test PRIVATE XNNPACK gtest gtest_main)
5792 ADD_TEST(clamp-nc-test clamp-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5793
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]5794 ADD_EXECUTABLE(constant-pad-nd-test test/constant-pad-nd.cc)
5795 SET_TARGET_PROPERTIES(constant-pad-nd-test PROPERTIES
5796 CXX_STANDARD 11
5797 CXX_STANDARD_REQUIRED YES
5798 CXX_EXTENSIONS NO)
5799 TARGET_INCLUDE_DIRECTORIES(constant-pad-nd-test PRIVATE src test)
5800 TARGET_LINK_LIBRARIES(constant-pad-nd-test PRIVATE XNNPACK gtest gtest_main)
5801 ADD_TEST(constant-pad-nd-test constant-pad-nd-test)
5802
Marat Dukhanaf2ba002021-10-24 14:21:41 -0700[diff] [blame]5803 ADD_EXECUTABLE(convert-nc-test test/convert-nc.cc)
5804 SET_TARGET_PROPERTIES(convert-nc-test PROPERTIES
5805 CXX_STANDARD 11
5806 CXX_STANDARD_REQUIRED YES
5807 CXX_EXTENSIONS YES)
5808 TARGET_INCLUDE_DIRECTORIES(convert-nc-test PRIVATE src test)
5809 TARGET_LINK_LIBRARIES(convert-nc-test PRIVATE XNNPACK fp16 gtest gtest_main)
5810 ADD_TEST(convert-nc-test convert-nc-test)
5811
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5812 ADD_EXECUTABLE(convolution-nhwc-test test/convolution-nhwc.cc)
5813 SET_TARGET_PROPERTIES(convolution-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5814 CXX_STANDARD 11
5815 CXX_STANDARD_REQUIRED YES
Marat Dukhan258b6392021-06-29 19:18:09 -0700[diff] [blame]5816 CXX_EXTENSIONS YES)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5817 TARGET_INCLUDE_DIRECTORIES(convolution-nhwc-test PRIVATE src test)
Frank Barchard49b4dcc2020-06-26 14:07:19 -0700[diff] [blame]5818 TARGET_LINK_LIBRARIES(convolution-nhwc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5819 ADD_TEST(convolution-nhwc-test convolution-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5820
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5821 ADD_EXECUTABLE(convolution-nchw-test test/convolution-nchw.cc)
5822 SET_TARGET_PROPERTIES(convolution-nchw-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5823 CXX_STANDARD 11
5824 CXX_STANDARD_REQUIRED YES
Marat Dukhan258b6392021-06-29 19:18:09 -0700[diff] [blame]5825 CXX_EXTENSIONS YES)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5826 TARGET_INCLUDE_DIRECTORIES(convolution-nchw-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5827 TARGET_LINK_LIBRARIES(convolution-nchw-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5828 ADD_TEST(convolution-nchw-test convolution-nchw-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5829
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]5830 ADD_EXECUTABLE(copy-nc-test test/copy-nc.cc)
5831 SET_TARGET_PROPERTIES(copy-nc-test PROPERTIES
5832 CXX_STANDARD 11
5833 CXX_STANDARD_REQUIRED YES
5834 CXX_EXTENSIONS NO)
5835 TARGET_INCLUDE_DIRECTORIES(copy-nc-test PRIVATE src test)
5836 TARGET_LINK_LIBRARIES(copy-nc-test PRIVATE XNNPACK gtest gtest_main)
5837 ADD_TEST(copy-nc-test copy-nc-test)
5838
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5839 ADD_EXECUTABLE(deconvolution-nhwc-test test/deconvolution-nhwc.cc)
5840 SET_TARGET_PROPERTIES(deconvolution-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5841 CXX_STANDARD 11
5842 CXX_STANDARD_REQUIRED YES
5843 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5844 TARGET_INCLUDE_DIRECTORIES(deconvolution-nhwc-test PRIVATE src test)
5845 TARGET_LINK_LIBRARIES(deconvolution-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5846 ADD_TEST(deconvolution-nhwc-test deconvolution-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5847
Marat Dukhan188d1042020-11-24 23:39:40 -0800[diff] [blame]5848 ADD_EXECUTABLE(depth-to-space-nchw2nhwc-test test/depth-to-space-nchw2nhwc.cc)
5849 SET_TARGET_PROPERTIES(depth-to-space-nchw2nhwc-test PROPERTIES
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -0800[diff] [blame]5850 CXX_STANDARD 11
5851 CXX_STANDARD_REQUIRED YES
5852 CXX_EXTENSIONS NO)
Marat Dukhan188d1042020-11-24 23:39:40 -0800[diff] [blame]5853 TARGET_INCLUDE_DIRECTORIES(depth-to-space-nchw2nhwc-test PRIVATE src test)
5854 TARGET_LINK_LIBRARIES(depth-to-space-nchw2nhwc-test PRIVATE XNNPACK gtest gtest_main)
5855 ADD_TEST(depth-to-space-nchw2nhwc-test depth-to-space-nchw2nhwc-test)
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -0800[diff] [blame]5856
Marat Dukhan0e521172020-11-25 13:10:04 -0800[diff] [blame]5857 ADD_EXECUTABLE(depth-to-space-nhwc-test test/depth-to-space-nhwc.cc)
5858 SET_TARGET_PROPERTIES(depth-to-space-nhwc-test PROPERTIES
5859 CXX_STANDARD 11
5860 CXX_STANDARD_REQUIRED YES
5861 CXX_EXTENSIONS NO)
5862 TARGET_INCLUDE_DIRECTORIES(depth-to-space-nhwc-test PRIVATE src test)
5863 TARGET_LINK_LIBRARIES(depth-to-space-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5864 ADD_TEST(depth-to-space-nhwc-test depth-to-space-nhwc-test)
5865
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]5866 ADD_EXECUTABLE(divide-nd-test test/divide-nd.cc)
5867 SET_TARGET_PROPERTIES(divide-nd-test PROPERTIES
5868 CXX_STANDARD 11
5869 CXX_STANDARD_REQUIRED YES
5870 CXX_EXTENSIONS NO)
5871 TARGET_INCLUDE_DIRECTORIES(divide-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5872 TARGET_LINK_LIBRARIES(divide-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]5873 ADD_TEST(divide-nd-test divide-nd-test)
5874
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -0800[diff] [blame]5875 ADD_EXECUTABLE(elu-nc-test test/elu-nc.cc)
5876 SET_TARGET_PROPERTIES(elu-nc-test PROPERTIES
5877 CXX_STANDARD 11
5878 CXX_STANDARD_REQUIRED YES
5879 CXX_EXTENSIONS NO)
5880 TARGET_INCLUDE_DIRECTORIES(elu-nc-test PRIVATE src test)
5881 TARGET_LINK_LIBRARIES(elu-nc-test PRIVATE XNNPACK gtest gtest_main)
5882 ADD_TEST(elu-nc-test elu-nc-test)
5883
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5884 ADD_EXECUTABLE(fully-connected-nc-test test/fully-connected-nc.cc)
5885 SET_TARGET_PROPERTIES(fully-connected-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5886 CXX_STANDARD 11
5887 CXX_STANDARD_REQUIRED YES
5888 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5889 TARGET_INCLUDE_DIRECTORIES(fully-connected-nc-test PRIVATE src test)
Marat Dukhanddb3d162021-10-25 17:05:51 -0700[diff] [blame]5890 TARGET_LINK_LIBRARIES(fully-connected-nc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5891 ADD_TEST(fully-connected-nc-test fully-connected-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5892
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5893 ADD_EXECUTABLE(floor-nc-test test/floor-nc.cc)
5894 SET_TARGET_PROPERTIES(floor-nc-test PROPERTIES
5895 CXX_STANDARD 11
5896 CXX_STANDARD_REQUIRED YES
5897 CXX_EXTENSIONS NO)
5898 TARGET_INCLUDE_DIRECTORIES(floor-nc-test PRIVATE src test)
5899 TARGET_LINK_LIBRARIES(floor-nc-test PRIVATE XNNPACK gtest gtest_main)
5900 ADD_TEST(floor-nc-test floor-nc-test)
5901
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5902 ADD_EXECUTABLE(global-average-pooling-nwc-test test/global-average-pooling-nwc.cc)
5903 SET_TARGET_PROPERTIES(global-average-pooling-nwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5904 CXX_STANDARD 11
5905 CXX_STANDARD_REQUIRED YES
5906 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5907 TARGET_INCLUDE_DIRECTORIES(global-average-pooling-nwc-test PRIVATE src test)
Marat Dukhanef61d022020-06-19 13:54:49 -0700[diff] [blame]5908 TARGET_LINK_LIBRARIES(global-average-pooling-nwc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5909 ADD_TEST(global-average-pooling-nwc-test global-average-pooling-nwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5910
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5911 ADD_EXECUTABLE(global-average-pooling-ncw-test test/global-average-pooling-ncw.cc)
5912 SET_TARGET_PROPERTIES(global-average-pooling-ncw-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5913 CXX_STANDARD 11
5914 CXX_STANDARD_REQUIRED YES
5915 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5916 TARGET_INCLUDE_DIRECTORIES(global-average-pooling-ncw-test PRIVATE src test)
Marat Dukhan5fd403b2020-06-23 17:43:48 -0700[diff] [blame]5917 TARGET_LINK_LIBRARIES(global-average-pooling-ncw-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5918 ADD_TEST(global-average-pooling-ncw-test global-average-pooling-ncw-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5919
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5920 ADD_EXECUTABLE(hardswish-nc-test test/hardswish-nc.cc)
5921 SET_TARGET_PROPERTIES(hardswish-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5922 CXX_STANDARD 11
5923 CXX_STANDARD_REQUIRED YES
5924 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5925 TARGET_INCLUDE_DIRECTORIES(hardswish-nc-test PRIVATE src test)
Marat Dukhanae24dfc2020-09-23 17:12:45 -0700[diff] [blame]5926 TARGET_LINK_LIBRARIES(hardswish-nc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5927 ADD_TEST(hardswish-nc-test hardswish-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5928
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5929 ADD_EXECUTABLE(leaky-relu-nc-test test/leaky-relu-nc.cc)
5930 SET_TARGET_PROPERTIES(leaky-relu-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5931 CXX_STANDARD 11
5932 CXX_STANDARD_REQUIRED YES
5933 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5934 TARGET_INCLUDE_DIRECTORIES(leaky-relu-nc-test PRIVATE src test)
5935 TARGET_LINK_LIBRARIES(leaky-relu-nc-test PRIVATE XNNPACK gtest gtest_main)
5936 ADD_TEST(leaky-relu-nc-test leaky-relu-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5937
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5938 ADD_EXECUTABLE(max-pooling-nhwc-test test/max-pooling-nhwc.cc)
5939 SET_TARGET_PROPERTIES(max-pooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5940 CXX_STANDARD 11
5941 CXX_STANDARD_REQUIRED YES
5942 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5943 TARGET_INCLUDE_DIRECTORIES(max-pooling-nhwc-test PRIVATE src test)
5944 TARGET_LINK_LIBRARIES(max-pooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5945 ADD_TEST(max-pooling-nhwc-test max-pooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5946
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5947 ADD_EXECUTABLE(maximum-nd-test test/maximum-nd.cc)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5948 SET_TARGET_PROPERTIES(maximum-nd-test PROPERTIES
5949 CXX_STANDARD 11
5950 CXX_STANDARD_REQUIRED YES
5951 CXX_EXTENSIONS NO)
5952 TARGET_INCLUDE_DIRECTORIES(maximum-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5953 TARGET_LINK_LIBRARIES(maximum-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5954 ADD_TEST(maximum-nd-test maximum-nd-test)
5955
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5956 ADD_EXECUTABLE(minimum-nd-test test/minimum-nd.cc)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5957 SET_TARGET_PROPERTIES(minimum-nd-test PROPERTIES
5958 CXX_STANDARD 11
5959 CXX_STANDARD_REQUIRED YES
5960 CXX_EXTENSIONS NO)
5961 TARGET_INCLUDE_DIRECTORIES(minimum-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5962 TARGET_LINK_LIBRARIES(minimum-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5963 ADD_TEST(minimum-nd-test minimum-nd-test)
5964
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5965 ADD_EXECUTABLE(multiply-nd-test test/multiply-nd.cc)
5966 SET_TARGET_PROPERTIES(multiply-nd-test PROPERTIES
Marat Dukhan9d501d52019-11-16 02:30:50 -0800[diff] [blame]5967 CXX_STANDARD 11
5968 CXX_STANDARD_REQUIRED YES
5969 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5970 TARGET_INCLUDE_DIRECTORIES(multiply-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5971 TARGET_LINK_LIBRARIES(multiply-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5972 ADD_TEST(multiply-nd-test multiply-nd-test)
Marat Dukhan9d501d52019-11-16 02:30:50 -0800[diff] [blame]5973
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5974 ADD_EXECUTABLE(negate-nc-test test/negate-nc.cc)
5975 SET_TARGET_PROPERTIES(negate-nc-test PROPERTIES
5976 CXX_STANDARD 11
5977 CXX_STANDARD_REQUIRED YES
5978 CXX_EXTENSIONS NO)
5979 TARGET_INCLUDE_DIRECTORIES(negate-nc-test PRIVATE src test)
5980 TARGET_LINK_LIBRARIES(negate-nc-test PRIVATE XNNPACK gtest gtest_main)
5981 ADD_TEST(negate-nc-test negate-nc-test)
5982
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5983 ADD_EXECUTABLE(prelu-nc-test test/prelu-nc.cc)
5984 SET_TARGET_PROPERTIES(prelu-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5985 CXX_STANDARD 11
5986 CXX_STANDARD_REQUIRED YES
5987 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5988 TARGET_INCLUDE_DIRECTORIES(prelu-nc-test PRIVATE src test)
5989 TARGET_LINK_LIBRARIES(prelu-nc-test PRIVATE XNNPACK gtest gtest_main)
5990 ADD_TEST(prelu-nc-test prelu-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5991
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5992 ADD_EXECUTABLE(resize-bilinear-nhwc-test test/resize-bilinear-nhwc.cc)
5993 SET_TARGET_PROPERTIES(resize-bilinear-nhwc-test PROPERTIES
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5994 CXX_STANDARD 11
5995 CXX_STANDARD_REQUIRED YES
5996 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5997 TARGET_INCLUDE_DIRECTORIES(resize-bilinear-nhwc-test PRIVATE src test)
5998 TARGET_LINK_LIBRARIES(resize-bilinear-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5999 ADD_TEST(resize-bilinear-nhwc-test resize-bilinear-nhwc-test)
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]6000
Artsiom Ablavatski97918102020-10-27 15:52:59 -0700[diff] [blame]6001 ADD_EXECUTABLE(resize-bilinear-nchw-test test/resize-bilinear-nchw.cc)
6002 SET_TARGET_PROPERTIES(resize-bilinear-nchw-test PROPERTIES
6003 CXX_STANDARD 11
6004 CXX_STANDARD_REQUIRED YES
6005 CXX_EXTENSIONS NO)
6006 TARGET_INCLUDE_DIRECTORIES(resize-bilinear-nchw-test PRIVATE src test)
6007 TARGET_LINK_LIBRARIES(resize-bilinear-nchw-test PRIVATE XNNPACK gtest gtest_main)
6008 ADD_TEST(resize-bilinear-nchw-test resize-bilinear-nchw-test)
6009
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6010 ADD_EXECUTABLE(sigmoid-nc-test test/sigmoid-nc.cc)
6011 SET_TARGET_PROPERTIES(sigmoid-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6012 CXX_STANDARD 11
6013 CXX_STANDARD_REQUIRED YES
6014 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6015 TARGET_INCLUDE_DIRECTORIES(sigmoid-nc-test PRIVATE src test)
6016 TARGET_LINK_LIBRARIES(sigmoid-nc-test PRIVATE XNNPACK gtest gtest_main)
6017 ADD_TEST(sigmoid-nc-test sigmoid-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6018
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]6019 ADD_EXECUTABLE(softmax-nc-test test/softmax-nc.cc)
6020 SET_TARGET_PROPERTIES(softmax-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6021 CXX_STANDARD 11
6022 CXX_STANDARD_REQUIRED YES
6023 CXX_EXTENSIONS NO)
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]6024 TARGET_INCLUDE_DIRECTORIES(softmax-nc-test PRIVATE src test)
6025 TARGET_LINK_LIBRARIES(softmax-nc-test PRIVATE XNNPACK gtest gtest_main)
6026 ADD_TEST(softmax-nc-test softmax-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6027
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]6028 ADD_EXECUTABLE(square-nc-test test/square-nc.cc)
6029 SET_TARGET_PROPERTIES(square-nc-test PROPERTIES
6030 CXX_STANDARD 11
6031 CXX_STANDARD_REQUIRED YES
6032 CXX_EXTENSIONS NO)
6033 TARGET_INCLUDE_DIRECTORIES(square-nc-test PRIVATE src test)
6034 TARGET_LINK_LIBRARIES(square-nc-test PRIVATE XNNPACK gtest gtest_main)
6035 ADD_TEST(square-nc-test square-nc-test)
6036
Marat Dukhan6804bbd2020-06-30 19:26:11 -0700[diff] [blame]6037 ADD_EXECUTABLE(square-root-nc-test test/square-root-nc.cc)
6038 SET_TARGET_PROPERTIES(square-root-nc-test PROPERTIES
6039 CXX_STANDARD 11
6040 CXX_STANDARD_REQUIRED YES
6041 CXX_EXTENSIONS NO)
6042 TARGET_INCLUDE_DIRECTORIES(square-root-nc-test PRIVATE src test)
6043 TARGET_LINK_LIBRARIES(square-root-nc-test PRIVATE XNNPACK gtest gtest_main)
6044 ADD_TEST(square-root-nc-test square-root-nc-test)
6045
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]6046 ADD_EXECUTABLE(squared-difference-nd-test test/squared-difference-nd.cc)
6047 SET_TARGET_PROPERTIES(squared-difference-nd-test PROPERTIES
6048 CXX_STANDARD 11
6049 CXX_STANDARD_REQUIRED YES
6050 CXX_EXTENSIONS NO)
6051 TARGET_INCLUDE_DIRECTORIES(squared-difference-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]6052 TARGET_LINK_LIBRARIES(squared-difference-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]6053 ADD_TEST(squared-difference-nd-test squared-difference-nd-test)
6054
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]6055 ADD_EXECUTABLE(subtract-nd-test test/subtract-nd.cc)
6056 SET_TARGET_PROPERTIES(subtract-nd-test PROPERTIES
6057 CXX_STANDARD 11
6058 CXX_STANDARD_REQUIRED YES
6059 CXX_EXTENSIONS NO)
6060 TARGET_INCLUDE_DIRECTORIES(subtract-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]6061 TARGET_LINK_LIBRARIES(subtract-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]6062 ADD_TEST(subtract-nd-test subtract-nd-test)
6063
Marat Dukhan5de7bc02021-09-09 19:04:01 -0700[diff] [blame]6064 ADD_EXECUTABLE(tanh-nc-test test/tanh-nc.cc)
6065 SET_TARGET_PROPERTIES(tanh-nc-test PROPERTIES
6066 CXX_STANDARD 11
6067 CXX_STANDARD_REQUIRED YES
6068 CXX_EXTENSIONS NO)
6069 TARGET_INCLUDE_DIRECTORIES(tanh-nc-test PRIVATE src test)
6070 TARGET_LINK_LIBRARIES(tanh-nc-test PRIVATE XNNPACK gtest gtest_main)
6071 ADD_TEST(tanh-nc-test tanh-nc-test)
6072
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]6073 ADD_EXECUTABLE(truncation-nc-test test/truncation-nc.cc)
6074 SET_TARGET_PROPERTIES(truncation-nc-test PROPERTIES
6075 CXX_STANDARD 11
6076 CXX_STANDARD_REQUIRED YES
6077 CXX_EXTENSIONS NO)
6078 TARGET_INCLUDE_DIRECTORIES(truncation-nc-test PRIVATE src test)
6079 TARGET_LINK_LIBRARIES(truncation-nc-test PRIVATE XNNPACK gtest gtest_main)
6080 ADD_TEST(truncation-nc-test truncation-nc-test)
6081
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6082 ADD_EXECUTABLE(unpooling-nhwc-test test/unpooling-nhwc.cc)
6083 SET_TARGET_PROPERTIES(unpooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6084 CXX_STANDARD 11
6085 CXX_STANDARD_REQUIRED YES
6086 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]6087 TARGET_INCLUDE_DIRECTORIES(unpooling-nhwc-test PRIVATE src test)
6088 TARGET_LINK_LIBRARIES(unpooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
6089 ADD_TEST(unpooling-nhwc-test unpooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6090
XNNPACK Teamab8c4c82020-10-09 08:05:51 -0700[diff] [blame]6091 ADD_EXECUTABLE(memory-planner-test test/memory-planner-test.cc)
6092 SET_TARGET_PROPERTIES(memory-planner-test PROPERTIES
6093 C_STANDARD 11
6094 CXX_STANDARD_REQUIRED YES
6095 C_EXTENSIONS NO)
6096 TARGET_INCLUDE_DIRECTORIES(memory-planner-test PRIVATE src test)
6097 TARGET_LINK_LIBRARIES(memory-planner-test PRIVATE XNNPACK gtest gtest_main)
6098 ADD_TEST(memory-planner-test memory-planner-test)
6099
6100 ADD_EXECUTABLE(subgraph-nchw-test test/subgraph-nchw.cc)
6101 SET_TARGET_PROPERTIES(subgraph-nchw-test PROPERTIES
6102 C_STANDARD 11
6103 CXX_STANDARD_REQUIRED YES
6104 C_EXTENSIONS NO)
6105 TARGET_INCLUDE_DIRECTORIES(subgraph-nchw-test PRIVATE src test)
6106 TARGET_LINK_LIBRARIES(subgraph-nchw-test PRIVATE XNNPACK gtest gtest_main)
6107 ADD_TEST(subgraph-nchw-test subgraph-nchw-test)
6108
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6109 # ---[ Build microkernel-level unit tests
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]6110 ADD_EXECUTABLE(f16-f32-vcvt-test test/f16-f32-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
6111 SET_TARGET_PROPERTIES(f16-f32-vcvt-test PROPERTIES
6112 CXX_STANDARD 11
6113 CXX_STANDARD_REQUIRED YES
6114 CXX_EXTENSIONS YES)
6115 TARGET_INCLUDE_DIRECTORIES(f16-f32-vcvt-test PRIVATE include src test)
6116 TARGET_LINK_LIBRARIES(f16-f32-vcvt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6117 ADD_TEST(f16-f32-vcvt-test f16-f32-vcvt-test)
6118
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6119 ADD_EXECUTABLE(f16-dwconv-minmax-test test/f16-dwconv-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]6120 SET_TARGET_PROPERTIES(f16-dwconv-minmax-test PROPERTIES
6121 CXX_STANDARD 11
6122 CXX_STANDARD_REQUIRED YES
6123 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6124 TARGET_INCLUDE_DIRECTORIES(f16-dwconv-minmax-test PRIVATE include src test)
6125 TARGET_LINK_LIBRARIES(f16-dwconv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]6126 ADD_TEST(f16-dwconv-minmax-test f16-dwconv-minmax-test)
6127
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6128 ADD_EXECUTABLE(f16-gavgpool-minmax-test test/f16-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]6129 SET_TARGET_PROPERTIES(f16-gavgpool-minmax-test PROPERTIES
6130 CXX_STANDARD 11
6131 CXX_STANDARD_REQUIRED YES
6132 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6133 TARGET_INCLUDE_DIRECTORIES(f16-gavgpool-minmax-test PRIVATE include src test)
6134 TARGET_LINK_LIBRARIES(f16-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]6135 ADD_TEST(f16-gavgpool-minmax-test f16-gavgpool-minmax-test)
6136
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6137 ADD_EXECUTABLE(f16-gemm-minmax-test test/f16-gemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6138 SET_TARGET_PROPERTIES(f16-gemm-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6139 CXX_STANDARD 11
6140 CXX_STANDARD_REQUIRED YES
6141 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6142 TARGET_INCLUDE_DIRECTORIES(f16-gemm-minmax-test PRIVATE include src test)
6143 TARGET_LINK_LIBRARIES(f16-gemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6144 ADD_TEST(f16-gemm-minmax-test f16-gemm-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6145
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6146 ADD_EXECUTABLE(f16-igemm-minmax-test test/f16-igemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]6147 SET_TARGET_PROPERTIES(f16-igemm-minmax-test PROPERTIES
6148 CXX_STANDARD 11
6149 CXX_STANDARD_REQUIRED YES
6150 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6151 TARGET_INCLUDE_DIRECTORIES(f16-igemm-minmax-test PRIVATE include src test)
6152 TARGET_LINK_LIBRARIES(f16-igemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]6153 ADD_TEST(f16-igemm-minmax-test f16-igemm-minmax-test)
6154
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6155 ADD_EXECUTABLE(f16-spmm-minmax-test test/f16-spmm-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6156 SET_TARGET_PROPERTIES(f16-spmm-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6157 CXX_STANDARD 11
6158 CXX_STANDARD_REQUIRED YES
6159 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6160 TARGET_INCLUDE_DIRECTORIES(f16-spmm-minmax-test PRIVATE include src test)
6161 TARGET_LINK_LIBRARIES(f16-spmm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6162 ADD_TEST(f16-spmm-minmax-test f16-spmm-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6163
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6164 ADD_EXECUTABLE(f16-vadd-minmax-test test/f16-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6165 SET_TARGET_PROPERTIES(f16-vadd-minmax-test PROPERTIES
6166 CXX_STANDARD 11
6167 CXX_STANDARD_REQUIRED YES
6168 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6169 TARGET_INCLUDE_DIRECTORIES(f16-vadd-minmax-test PRIVATE include src test)
6170 TARGET_LINK_LIBRARIES(f16-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6171 ADD_TEST(f16-vadd-minmax-test f16-vadd-minmax-test)
6172
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6173 ADD_EXECUTABLE(f16-vaddc-minmax-test test/f16-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6174 SET_TARGET_PROPERTIES(f16-vaddc-minmax-test PROPERTIES
6175 CXX_STANDARD 11
6176 CXX_STANDARD_REQUIRED YES
6177 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6178 TARGET_INCLUDE_DIRECTORIES(f16-vaddc-minmax-test PRIVATE include src test)
6179 TARGET_LINK_LIBRARIES(f16-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6180 ADD_TEST(f16-vaddc-minmax-test f16-vaddc-minmax-test)
6181
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6182 ADD_EXECUTABLE(f16-vclamp-test test/f16-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6183 SET_TARGET_PROPERTIES(f16-vclamp-test PROPERTIES
6184 CXX_STANDARD 11
6185 CXX_STANDARD_REQUIRED YES
6186 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6187 TARGET_INCLUDE_DIRECTORIES(f16-vclamp-test PRIVATE include src test)
6188 TARGET_LINK_LIBRARIES(f16-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6189 ADD_TEST(f16-vclamp-test f16-vclamp-test)
6190
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6191 ADD_EXECUTABLE(f16-vdiv-minmax-test test/f16-vdiv-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6192 SET_TARGET_PROPERTIES(f16-vdiv-minmax-test PROPERTIES
6193 CXX_STANDARD 11
6194 CXX_STANDARD_REQUIRED YES
6195 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6196 TARGET_INCLUDE_DIRECTORIES(f16-vdiv-minmax-test PRIVATE include src test)
6197 TARGET_LINK_LIBRARIES(f16-vdiv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6198 ADD_TEST(f16-vdiv-minmax-test f16-vdiv-minmax-test)
6199
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6200 ADD_EXECUTABLE(f16-vdivc-minmax-test test/f16-vdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6201 SET_TARGET_PROPERTIES(f16-vdivc-minmax-test PROPERTIES
6202 CXX_STANDARD 11
6203 CXX_STANDARD_REQUIRED YES
6204 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6205 TARGET_INCLUDE_DIRECTORIES(f16-vdivc-minmax-test PRIVATE include src test)
6206 TARGET_LINK_LIBRARIES(f16-vdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6207 ADD_TEST(f16-vdivc-minmax-test f16-vdivc-minmax-test)
6208
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6209 ADD_EXECUTABLE(f16-vrdivc-minmax-test test/f16-vrdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6210 SET_TARGET_PROPERTIES(f16-vrdivc-minmax-test PROPERTIES
6211 CXX_STANDARD 11
6212 CXX_STANDARD_REQUIRED YES
6213 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6214 TARGET_INCLUDE_DIRECTORIES(f16-vrdivc-minmax-test PRIVATE include src test)
6215 TARGET_LINK_LIBRARIES(f16-vrdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6216 ADD_TEST(f16-vrdivc-minmax-test f16-vrdivc-minmax-test)
6217
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6218 ADD_EXECUTABLE(f16-vhswish-test test/f16-vhswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6219 SET_TARGET_PROPERTIES(f16-vhswish-test PROPERTIES
6220 CXX_STANDARD 11
6221 CXX_STANDARD_REQUIRED YES
6222 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6223 TARGET_INCLUDE_DIRECTORIES(f16-vhswish-test PRIVATE include src test)
6224 TARGET_LINK_LIBRARIES(f16-vhswish-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6225 ADD_TEST(f16-vhswish-test f16-vhswish-test)
6226
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6227 ADD_EXECUTABLE(f16-vmax-test test/f16-vmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6228 SET_TARGET_PROPERTIES(f16-vmax-test PROPERTIES
6229 CXX_STANDARD 11
6230 CXX_STANDARD_REQUIRED YES
6231 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6232 TARGET_INCLUDE_DIRECTORIES(f16-vmax-test PRIVATE include src test)
6233 TARGET_LINK_LIBRARIES(f16-vmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6234 ADD_TEST(f16-vmax-test f16-vmax-test)
6235
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6236 ADD_EXECUTABLE(f16-vmaxc-test test/f16-vmaxc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6237 SET_TARGET_PROPERTIES(f16-vmaxc-test PROPERTIES
6238 CXX_STANDARD 11
6239 CXX_STANDARD_REQUIRED YES
6240 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6241 TARGET_INCLUDE_DIRECTORIES(f16-vmaxc-test PRIVATE include src test)
6242 TARGET_LINK_LIBRARIES(f16-vmaxc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6243 ADD_TEST(f16-vmaxc-test f16-vmaxc-test)
6244
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6245 ADD_EXECUTABLE(f16-vmin-test test/f16-vmin.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6246 SET_TARGET_PROPERTIES(f16-vmin-test PROPERTIES
6247 CXX_STANDARD 11
6248 CXX_STANDARD_REQUIRED YES
6249 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6250 TARGET_INCLUDE_DIRECTORIES(f16-vmin-test PRIVATE include src test)
6251 TARGET_LINK_LIBRARIES(f16-vmin-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6252 ADD_TEST(f16-vmin-test f16-vmin-test)
6253
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6254 ADD_EXECUTABLE(f16-vminc-test test/f16-vminc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6255 SET_TARGET_PROPERTIES(f16-vminc-test PROPERTIES
6256 CXX_STANDARD 11
6257 CXX_STANDARD_REQUIRED YES
6258 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6259 TARGET_INCLUDE_DIRECTORIES(f16-vminc-test PRIVATE include src test)
6260 TARGET_LINK_LIBRARIES(f16-vminc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6261 ADD_TEST(f16-vminc-test f16-vminc-test)
6262
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6263 ADD_EXECUTABLE(f16-vmul-minmax-test test/f16-vmul-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6264 SET_TARGET_PROPERTIES(f16-vmul-minmax-test PROPERTIES
6265 CXX_STANDARD 11
6266 CXX_STANDARD_REQUIRED YES
6267 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6268 TARGET_INCLUDE_DIRECTORIES(f16-vmul-minmax-test PRIVATE include src test)
6269 TARGET_LINK_LIBRARIES(f16-vmul-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6270 ADD_TEST(f16-vmul-minmax-test f16-vmul-minmax-test)
6271
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6272 ADD_EXECUTABLE(f16-vmulc-minmax-test test/f16-vmulc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6273 SET_TARGET_PROPERTIES(f16-vmulc-minmax-test PROPERTIES
6274 CXX_STANDARD 11
6275 CXX_STANDARD_REQUIRED YES
6276 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6277 TARGET_INCLUDE_DIRECTORIES(f16-vmulc-minmax-test PRIVATE include src test)
6278 TARGET_LINK_LIBRARIES(f16-vmulc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6279 ADD_TEST(f16-vmulc-minmax-test f16-vmulc-minmax-test)
6280
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6281 ADD_EXECUTABLE(f16-vmulcaddc-minmax-test test/f16-vmulcaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6282 SET_TARGET_PROPERTIES(f16-vmulcaddc-minmax-test PROPERTIES
6283 CXX_STANDARD 11
6284 CXX_STANDARD_REQUIRED YES
6285 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6286 TARGET_INCLUDE_DIRECTORIES(f16-vmulcaddc-minmax-test PRIVATE include src test)
6287 TARGET_LINK_LIBRARIES(f16-vmulcaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6288 ADD_TEST(f16-vmulcaddc-minmax-test f16-vmulcaddc-minmax-test)
6289
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6290 ADD_EXECUTABLE(f16-prelu-test test/f16-prelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6291 SET_TARGET_PROPERTIES(f16-prelu-test PROPERTIES
6292 CXX_STANDARD 11
6293 CXX_STANDARD_REQUIRED YES
6294 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6295 TARGET_INCLUDE_DIRECTORIES(f16-prelu-test PRIVATE include src test)
6296 TARGET_LINK_LIBRARIES(f16-prelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6297 ADD_TEST(f16-prelu-test f16-prelu-test)
6298
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6299 ADD_EXECUTABLE(f16-vsub-minmax-test test/f16-vsub-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6300 SET_TARGET_PROPERTIES(f16-vsub-minmax-test PROPERTIES
6301 CXX_STANDARD 11
6302 CXX_STANDARD_REQUIRED YES
6303 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6304 TARGET_INCLUDE_DIRECTORIES(f16-vsub-minmax-test PRIVATE include src test)
6305 TARGET_LINK_LIBRARIES(f16-vsub-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6306 ADD_TEST(f16-vsub-minmax-test f16-vsub-minmax-test)
6307
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6308 ADD_EXECUTABLE(f16-vsubc-minmax-test test/f16-vsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6309 SET_TARGET_PROPERTIES(f16-vsubc-minmax-test PROPERTIES
6310 CXX_STANDARD 11
6311 CXX_STANDARD_REQUIRED YES
6312 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6313 TARGET_INCLUDE_DIRECTORIES(f16-vsubc-minmax-test PRIVATE include src test)
6314 TARGET_LINK_LIBRARIES(f16-vsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6315 ADD_TEST(f16-vsubc-minmax-test f16-vsubc-minmax-test)
6316
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6317 ADD_EXECUTABLE(f16-vrsubc-minmax-test test/f16-vrsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6318 SET_TARGET_PROPERTIES(f16-vrsubc-minmax-test PROPERTIES
6319 CXX_STANDARD 11
6320 CXX_STANDARD_REQUIRED YES
6321 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6322 TARGET_INCLUDE_DIRECTORIES(f16-vrsubc-minmax-test PRIVATE include src test)
6323 TARGET_LINK_LIBRARIES(f16-vrsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]6324 ADD_TEST(f16-vrsubc-minmax-test f16-vrsubc-minmax-test)
6325
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6326 ADD_EXECUTABLE(f32-argmaxpool-test test/f32-argmaxpool.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6327 SET_TARGET_PROPERTIES(f32-argmaxpool-test PROPERTIES
6328 CXX_STANDARD 11
6329 CXX_STANDARD_REQUIRED YES
6330 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6331 TARGET_INCLUDE_DIRECTORIES(f32-argmaxpool-test PRIVATE include src test)
6332 TARGET_LINK_LIBRARIES(f32-argmaxpool-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6333 ADD_TEST(f32-argmaxpool-test f32-argmaxpool-test)
6334
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6335 ADD_EXECUTABLE(f32-avgpool-minmax-test test/f32-avgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6336 SET_TARGET_PROPERTIES(f32-avgpool-minmax-test PROPERTIES
6337 CXX_STANDARD 11
6338 CXX_STANDARD_REQUIRED YES
6339 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6340 TARGET_INCLUDE_DIRECTORIES(f32-avgpool-minmax-test PRIVATE include src test)
6341 TARGET_LINK_LIBRARIES(f32-avgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6342 ADD_TEST(f32-avgpool-minmax-test f32-avgpool-minmax-test)
6343
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6344 ADD_EXECUTABLE(f32-conv-hwc-test test/f32-conv-hwc.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6345 SET_TARGET_PROPERTIES(f32-conv-hwc-test PROPERTIES
6346 CXX_STANDARD 11
6347 CXX_STANDARD_REQUIRED YES
6348 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6349 TARGET_INCLUDE_DIRECTORIES(f32-conv-hwc-test PRIVATE include src test)
6350 TARGET_LINK_LIBRARIES(f32-conv-hwc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6351 ADD_TEST(f32-conv-hwc-test f32-conv-hwc-test)
6352
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6353 ADD_EXECUTABLE(f32-conv-hwc2chw-test test/f32-conv-hwc2chw.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6354 SET_TARGET_PROPERTIES(f32-conv-hwc2chw-test PROPERTIES
6355 CXX_STANDARD 11
6356 CXX_STANDARD_REQUIRED YES
6357 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6358 TARGET_INCLUDE_DIRECTORIES(f32-conv-hwc2chw-test PRIVATE include src test)
6359 TARGET_LINK_LIBRARIES(f32-conv-hwc2chw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6360 ADD_TEST(f32-conv-hwc2chw-test f32-conv-hwc2chw-test)
6361
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6362 ADD_EXECUTABLE(f32-dwconv-test test/f32-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6363 SET_TARGET_PROPERTIES(f32-dwconv-test PROPERTIES
6364 CXX_STANDARD 11
6365 CXX_STANDARD_REQUIRED YES
6366 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6367 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-test PRIVATE include src test)
6368 TARGET_LINK_LIBRARIES(f32-dwconv-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6369 ADD_TEST(f32-dwconv-test f32-dwconv-test)
6370
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6371 ADD_EXECUTABLE(f32-dwconv2d-chw-test test/f32-dwconv2d-chw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6372 SET_TARGET_PROPERTIES(f32-dwconv2d-chw-test PROPERTIES
6373 CXX_STANDARD 11
6374 CXX_STANDARD_REQUIRED YES
6375 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6376 TARGET_INCLUDE_DIRECTORIES(f32-dwconv2d-chw-test PRIVATE include src test)
6377 TARGET_LINK_LIBRARIES(f32-dwconv2d-chw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6378 ADD_TEST(f32-dwconv2d-chw-test f32-dwconv2d-chw-test)
6379
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6380 ADD_EXECUTABLE(f32-dwconv-minmax-test test/f32-dwconv-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6381 SET_TARGET_PROPERTIES(f32-dwconv-minmax-test PROPERTIES
6382 CXX_STANDARD 11
6383 CXX_STANDARD_REQUIRED YES
6384 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6385 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-minmax-test PRIVATE include src test)
6386 TARGET_LINK_LIBRARIES(f32-dwconv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6387 ADD_TEST(f32-dwconv-minmax-test f32-dwconv-minmax-test)
6388
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]6389 ADD_EXECUTABLE(f32-f16-vcvt-test test/f32-f16-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
6390 SET_TARGET_PROPERTIES(f32-f16-vcvt-test PROPERTIES
6391 CXX_STANDARD 11
6392 CXX_STANDARD_REQUIRED YES
6393 CXX_EXTENSIONS YES)
6394 TARGET_INCLUDE_DIRECTORIES(f32-f16-vcvt-test PRIVATE include src test)
6395 TARGET_LINK_LIBRARIES(f32-f16-vcvt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6396 ADD_TEST(f32-f16-vcvt-test f32-f16-vcvt-test)
6397
Marat Dukhanc5aa2422021-12-01 00:15:19 -0800[diff] [blame]6398 ADD_EXECUTABLE(f32-qs8-vcvt-test test/f32-f16-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
6399 SET_TARGET_PROPERTIES(f32-qs8-vcvt-test PROPERTIES
6400 CXX_STANDARD 11
6401 CXX_STANDARD_REQUIRED YES
6402 CXX_EXTENSIONS YES)
6403 TARGET_INCLUDE_DIRECTORIES(f32-qs8-vcvt-test PRIVATE include src test)
6404 TARGET_LINK_LIBRARIES(f32-qs8-vcvt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6405 ADD_TEST(f32-qs8-vcvt-test f32-qs8-vcvt-test)
6406
6407 ADD_EXECUTABLE(f32-qu8-vcvt-test test/f32-f16-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
6408 SET_TARGET_PROPERTIES(f32-qu8-vcvt-test PROPERTIES
6409 CXX_STANDARD 11
6410 CXX_STANDARD_REQUIRED YES
6411 CXX_EXTENSIONS YES)
6412 TARGET_INCLUDE_DIRECTORIES(f32-qu8-vcvt-test PRIVATE include src test)
6413 TARGET_LINK_LIBRARIES(f32-qu8-vcvt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6414 ADD_TEST(f32-qu8-vcvt-test f32-qu8-vcvt-test)
6415
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6416 ADD_EXECUTABLE(f32-gavgpool-cw-test test/f32-gavgpool-cw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6417 SET_TARGET_PROPERTIES(f32-gavgpool-cw-test PROPERTIES
6418 CXX_STANDARD 11
6419 CXX_STANDARD_REQUIRED YES
6420 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6421 TARGET_INCLUDE_DIRECTORIES(f32-gavgpool-cw-test PRIVATE include src test)
6422 TARGET_LINK_LIBRARIES(f32-gavgpool-cw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6423 ADD_TEST(f32-gavgpool-cw-test f32-gavgpool-cw-test)
6424
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6425 ADD_EXECUTABLE(f32-gavgpool-minmax-test test/f32-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6426 SET_TARGET_PROPERTIES(f32-gavgpool-minmax-test PROPERTIES
6427 CXX_STANDARD 11
6428 CXX_STANDARD_REQUIRED YES
6429 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6430 TARGET_INCLUDE_DIRECTORIES(f32-gavgpool-minmax-test PRIVATE include src test)
6431 TARGET_LINK_LIBRARIES(f32-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6432 ADD_TEST(f32-gavgpool-minmax-test f32-gavgpool-minmax-test)
6433
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6434 ADD_EXECUTABLE(f32-gemm-test test/f32-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6435 SET_TARGET_PROPERTIES(f32-gemm-test PROPERTIES
6436 CXX_STANDARD 11
6437 CXX_STANDARD_REQUIRED YES
6438 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6439 TARGET_INCLUDE_DIRECTORIES(f32-gemm-test PRIVATE include src test)
6440 TARGET_LINK_LIBRARIES(f32-gemm-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6441 ADD_TEST(f32-gemm-test f32-gemm-test)
6442
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6443 ADD_EXECUTABLE(f32-gemm-relu-test test/f32-gemm-relu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6444 SET_TARGET_PROPERTIES(f32-gemm-relu-test PROPERTIES
6445 CXX_STANDARD 11
6446 CXX_STANDARD_REQUIRED YES
6447 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6448 TARGET_INCLUDE_DIRECTORIES(f32-gemm-relu-test PRIVATE include src test)
6449 TARGET_LINK_LIBRARIES(f32-gemm-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6450 ADD_TEST(f32-gemm-relu-test f32-gemm-relu-test)
6451
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6452 ADD_EXECUTABLE(f32-gemm-minmax-test test/f32-gemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6453 SET_TARGET_PROPERTIES(f32-gemm-minmax-test PROPERTIES
6454 CXX_STANDARD 11
6455 CXX_STANDARD_REQUIRED YES
6456 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6457 TARGET_INCLUDE_DIRECTORIES(f32-gemm-minmax-test PRIVATE include src test)
6458 TARGET_LINK_LIBRARIES(f32-gemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6459 ADD_TEST(f32-gemm-minmax-test f32-gemm-minmax-test)
6460
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6461 ADD_EXECUTABLE(f32-gemminc-minmax-test test/f32-gemminc-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6462 SET_TARGET_PROPERTIES(f32-gemminc-minmax-test PROPERTIES
6463 CXX_STANDARD 11
6464 CXX_STANDARD_REQUIRED YES
6465 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6466 TARGET_INCLUDE_DIRECTORIES(f32-gemminc-minmax-test PRIVATE include src test)
6467 TARGET_LINK_LIBRARIES(f32-gemminc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6468 ADD_TEST(f32-gemminc-minmax-test f32-gemminc-minmax-test)
6469
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6470 ADD_EXECUTABLE(f32-ibilinear-test test/f32-ibilinear.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6471 SET_TARGET_PROPERTIES(f32-ibilinear-test PROPERTIES
6472 CXX_STANDARD 11
6473 CXX_STANDARD_REQUIRED YES
6474 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6475 TARGET_INCLUDE_DIRECTORIES(f32-ibilinear-test PRIVATE include src test)
6476 TARGET_LINK_LIBRARIES(f32-ibilinear-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6477 ADD_TEST(f32-ibilinear-test f32-ibilinear-test)
6478
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6479 ADD_EXECUTABLE(f32-ibilinear-chw-test test/f32-ibilinear-chw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6480 SET_TARGET_PROPERTIES(f32-ibilinear-chw-test PROPERTIES
6481 CXX_STANDARD 11
6482 CXX_STANDARD_REQUIRED YES
6483 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6484 TARGET_INCLUDE_DIRECTORIES(f32-ibilinear-chw-test PRIVATE include src test)
6485 TARGET_LINK_LIBRARIES(f32-ibilinear-chw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6486 ADD_TEST(f32-ibilinear-chw-test f32-ibilinear-chw-test)
6487
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6488 ADD_EXECUTABLE(f32-igemm-test test/f32-igemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6489 SET_TARGET_PROPERTIES(f32-igemm-test PROPERTIES
6490 CXX_STANDARD 11
6491 CXX_STANDARD_REQUIRED YES
6492 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6493 TARGET_INCLUDE_DIRECTORIES(f32-igemm-test PRIVATE include src test)
6494 TARGET_LINK_LIBRARIES(f32-igemm-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6495 ADD_TEST(f32-igemm-test f32-igemm-test)
6496
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6497 ADD_EXECUTABLE(f32-igemm-relu-test test/f32-igemm-relu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6498 SET_TARGET_PROPERTIES(f32-igemm-relu-test PROPERTIES
6499 CXX_STANDARD 11
6500 CXX_STANDARD_REQUIRED YES
6501 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6502 TARGET_INCLUDE_DIRECTORIES(f32-igemm-relu-test PRIVATE include src test)
6503 TARGET_LINK_LIBRARIES(f32-igemm-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6504 ADD_TEST(f32-igemm-relu-test f32-igemm-relu-test)
6505
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6506 ADD_EXECUTABLE(f32-igemm-minmax-test test/f32-igemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6507 SET_TARGET_PROPERTIES(f32-igemm-minmax-test PROPERTIES
6508 CXX_STANDARD 11
6509 CXX_STANDARD_REQUIRED YES
6510 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6511 TARGET_INCLUDE_DIRECTORIES(f32-igemm-minmax-test PRIVATE include src test)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6512 IF(MINGW)
6513 # Work-around for "too many sections" error
6514 TARGET_COMPILE_OPTIONS(f32-igemm-minmax-test PRIVATE "$<$<NOT:$<OR:$<CONFIG:Release>,$<CONFIG:MinSizeRel>>>:-Wa,-mbig-obj>")
6515 ENDIF()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6516 TARGET_LINK_LIBRARIES(f32-igemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6517 ADD_TEST(f32-igemm-minmax-test f32-igemm-minmax-test)
6518
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6519 ADD_EXECUTABLE(f32-maxpool-minmax-test test/f32-maxpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6520 SET_TARGET_PROPERTIES(f32-maxpool-minmax-test PROPERTIES
6521 CXX_STANDARD 11
6522 CXX_STANDARD_REQUIRED YES
6523 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6524 TARGET_INCLUDE_DIRECTORIES(f32-maxpool-minmax-test PRIVATE include src test)
6525 TARGET_LINK_LIBRARIES(f32-maxpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6526 ADD_TEST(f32-maxpool-minmax-test f32-maxpool-minmax-test)
6527
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6528 ADD_EXECUTABLE(f32-pavgpool-minmax-test test/f32-pavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6529 SET_TARGET_PROPERTIES(f32-pavgpool-minmax-test PROPERTIES
6530 CXX_STANDARD 11
6531 CXX_STANDARD_REQUIRED YES
6532 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6533 TARGET_INCLUDE_DIRECTORIES(f32-pavgpool-minmax-test PRIVATE include src test)
6534 TARGET_LINK_LIBRARIES(f32-pavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6535 ADD_TEST(f32-pavgpool-minmax-test f32-pavgpool-minmax-test)
6536
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6537 ADD_EXECUTABLE(f32-ppmm-minmax-test test/f32-ppmm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6538 SET_TARGET_PROPERTIES(f32-ppmm-minmax-test PROPERTIES
6539 CXX_STANDARD 11
6540 CXX_STANDARD_REQUIRED YES
6541 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6542 TARGET_INCLUDE_DIRECTORIES(f32-ppmm-minmax-test PRIVATE include src test)
6543 TARGET_LINK_LIBRARIES(f32-ppmm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6544 ADD_TEST(f32-ppmm-minmax-test f32-ppmm-minmax-test)
6545
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6546 ADD_EXECUTABLE(f32-prelu-test test/f32-prelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6547 SET_TARGET_PROPERTIES(f32-prelu-test PROPERTIES
6548 CXX_STANDARD 11
6549 CXX_STANDARD_REQUIRED YES
6550 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6551 TARGET_INCLUDE_DIRECTORIES(f32-prelu-test PRIVATE include src test)
6552 TARGET_LINK_LIBRARIES(f32-prelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6553 ADD_TEST(f32-prelu-test f32-prelu-test)
6554
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6555 ADD_EXECUTABLE(f32-raddexpminusmax-test test/f32-raddexpminusmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6556 SET_TARGET_PROPERTIES(f32-raddexpminusmax-test PROPERTIES
6557 CXX_STANDARD 11
6558 CXX_STANDARD_REQUIRED YES
6559 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6560 TARGET_INCLUDE_DIRECTORIES(f32-raddexpminusmax-test PRIVATE include src test)
6561 TARGET_LINK_LIBRARIES(f32-raddexpminusmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6562 ADD_TEST(f32-raddexpminusmax-test f32-raddexpminusmax-test)
6563
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6564 ADD_EXECUTABLE(f32-raddextexp-test test/f32-raddextexp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6565 SET_TARGET_PROPERTIES(f32-raddextexp-test PROPERTIES
6566 CXX_STANDARD 11
6567 CXX_STANDARD_REQUIRED YES
6568 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6569 TARGET_INCLUDE_DIRECTORIES(f32-raddextexp-test PRIVATE include src test)
6570 TARGET_LINK_LIBRARIES(f32-raddextexp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6571 ADD_TEST(f32-raddextexp-test f32-raddextexp-test)
6572
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6573 ADD_EXECUTABLE(f32-raddstoreexpminusmax-test test/f32-raddstoreexpminusmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6574 SET_TARGET_PROPERTIES(f32-raddstoreexpminusmax-test PROPERTIES
6575 CXX_STANDARD 11
6576 CXX_STANDARD_REQUIRED YES
6577 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6578 TARGET_INCLUDE_DIRECTORIES(f32-raddstoreexpminusmax-test PRIVATE include src test)
6579 TARGET_LINK_LIBRARIES(f32-raddstoreexpminusmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6580 ADD_TEST(f32-raddstoreexpminusmax-test f32-raddstoreexpminusmax-test)
6581
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6582 ADD_EXECUTABLE(f32-rmax-test test/f32-rmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6583 SET_TARGET_PROPERTIES(f32-rmax-test PROPERTIES
6584 CXX_STANDARD 11
6585 CXX_STANDARD_REQUIRED YES
6586 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6587 TARGET_INCLUDE_DIRECTORIES(f32-rmax-test PRIVATE include src test)
6588 TARGET_LINK_LIBRARIES(f32-rmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6589 ADD_TEST(f32-rmax-test f32-rmax-test)
6590
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6591 ADD_EXECUTABLE(f32-spmm-minmax-test test/f32-spmm-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6592 SET_TARGET_PROPERTIES(f32-spmm-minmax-test PROPERTIES
6593 CXX_STANDARD 11
6594 CXX_STANDARD_REQUIRED YES
6595 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6596 TARGET_INCLUDE_DIRECTORIES(f32-spmm-minmax-test PRIVATE include src test)
6597 TARGET_LINK_LIBRARIES(f32-spmm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6598 ADD_TEST(f32-spmm-minmax-test f32-spmm-minmax-test)
6599
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6600 ADD_EXECUTABLE(f32-vabs-test test/f32-vabs.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6601 SET_TARGET_PROPERTIES(f32-vabs-test PROPERTIES
6602 CXX_STANDARD 11
6603 CXX_STANDARD_REQUIRED YES
6604 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6605 TARGET_INCLUDE_DIRECTORIES(f32-vabs-test PRIVATE include src test)
6606 TARGET_LINK_LIBRARIES(f32-vabs-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6607 ADD_TEST(f32-vabs-test f32-vabs-test)
6608
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6609 ADD_EXECUTABLE(f32-vadd-test test/f32-vadd.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6610 SET_TARGET_PROPERTIES(f32-vadd-test PROPERTIES
6611 CXX_STANDARD 11
6612 CXX_STANDARD_REQUIRED YES
6613 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6614 TARGET_INCLUDE_DIRECTORIES(f32-vadd-test PRIVATE include src test)
6615 TARGET_LINK_LIBRARIES(f32-vadd-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6616 ADD_TEST(f32-vadd-test f32-vadd-test)
6617
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6618 ADD_EXECUTABLE(f32-vadd-minmax-test test/f32-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6619 SET_TARGET_PROPERTIES(f32-vadd-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6620 CXX_STANDARD 11
6621 CXX_STANDARD_REQUIRED YES
6622 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6623 TARGET_INCLUDE_DIRECTORIES(f32-vadd-minmax-test PRIVATE include src test)
6624 TARGET_LINK_LIBRARIES(f32-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6625 ADD_TEST(f32-vadd-minmax-test f32-vadd-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6626
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6627 ADD_EXECUTABLE(f32-vadd-relu-test test/f32-vadd-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6628 SET_TARGET_PROPERTIES(f32-vadd-relu-test PROPERTIES
6629 CXX_STANDARD 11
6630 CXX_STANDARD_REQUIRED YES
6631 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6632 TARGET_INCLUDE_DIRECTORIES(f32-vadd-relu-test PRIVATE include src test)
6633 TARGET_LINK_LIBRARIES(f32-vadd-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6634 ADD_TEST(f32-vadd-relu-test f32-vadd-relu-test)
6635
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6636 ADD_EXECUTABLE(f32-vaddc-test test/f32-vaddc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6637 SET_TARGET_PROPERTIES(f32-vaddc-test PROPERTIES
6638 CXX_STANDARD 11
6639 CXX_STANDARD_REQUIRED YES
6640 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6641 TARGET_INCLUDE_DIRECTORIES(f32-vaddc-test PRIVATE include src test)
6642 TARGET_LINK_LIBRARIES(f32-vaddc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6643 ADD_TEST(f32-vaddc-test f32-vaddc-test)
6644
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6645 ADD_EXECUTABLE(f32-vaddc-minmax-test test/f32-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6646 SET_TARGET_PROPERTIES(f32-vaddc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6647 CXX_STANDARD 11
6648 CXX_STANDARD_REQUIRED YES
6649 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6650 TARGET_INCLUDE_DIRECTORIES(f32-vaddc-minmax-test PRIVATE include src test)
6651 TARGET_LINK_LIBRARIES(f32-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6652 ADD_TEST(f32-vaddc-minmax-test f32-vaddc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6653
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6654 ADD_EXECUTABLE(f32-vaddc-relu-test test/f32-vaddc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6655 SET_TARGET_PROPERTIES(f32-vaddc-relu-test PROPERTIES
6656 CXX_STANDARD 11
6657 CXX_STANDARD_REQUIRED YES
6658 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6659 TARGET_INCLUDE_DIRECTORIES(f32-vaddc-relu-test PRIVATE include src test)
6660 TARGET_LINK_LIBRARIES(f32-vaddc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6661 ADD_TEST(f32-vaddc-relu-test f32-vaddc-relu-test)
6662
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6663 ADD_EXECUTABLE(f32-vclamp-test test/f32-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6664 SET_TARGET_PROPERTIES(f32-vclamp-test PROPERTIES
6665 CXX_STANDARD 11
6666 CXX_STANDARD_REQUIRED YES
6667 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6668 TARGET_INCLUDE_DIRECTORIES(f32-vclamp-test PRIVATE include src test)
6669 TARGET_LINK_LIBRARIES(f32-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6670 ADD_TEST(f32-vclamp-test f32-vclamp-test)
6671
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6672 ADD_EXECUTABLE(f32-vhswish-test test/f32-vhswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6673 SET_TARGET_PROPERTIES(f32-vhswish-test PROPERTIES
6674 CXX_STANDARD 11
6675 CXX_STANDARD_REQUIRED YES
6676 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6677 TARGET_INCLUDE_DIRECTORIES(f32-vhswish-test PRIVATE include src test)
6678 TARGET_LINK_LIBRARIES(f32-vhswish-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6679 ADD_TEST(f32-vhswish-test f32-vhswish-test)
6680
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6681 ADD_EXECUTABLE(f32-vdiv-test test/f32-vdiv.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6682 SET_TARGET_PROPERTIES(f32-vdiv-test PROPERTIES
6683 CXX_STANDARD 11
6684 CXX_STANDARD_REQUIRED YES
6685 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6686 TARGET_INCLUDE_DIRECTORIES(f32-vdiv-test PRIVATE include src test)
6687 TARGET_LINK_LIBRARIES(f32-vdiv-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6688 ADD_TEST(f32-vdiv-test f32-vdiv-test)
6689
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6690 ADD_EXECUTABLE(f32-vdiv-minmax-test test/f32-vdiv-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6691 SET_TARGET_PROPERTIES(f32-vdiv-minmax-test PROPERTIES
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6692 CXX_STANDARD 11
6693 CXX_STANDARD_REQUIRED YES
6694 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6695 TARGET_INCLUDE_DIRECTORIES(f32-vdiv-minmax-test PRIVATE include src test)
6696 TARGET_LINK_LIBRARIES(f32-vdiv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6697 ADD_TEST(f32-vdiv-minmax-test f32-vdiv-minmax-test)
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6698
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6699 ADD_EXECUTABLE(f32-vdiv-relu-test test/f32-vdiv-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6700 SET_TARGET_PROPERTIES(f32-vdiv-relu-test PROPERTIES
6701 CXX_STANDARD 11
6702 CXX_STANDARD_REQUIRED YES
6703 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6704 TARGET_INCLUDE_DIRECTORIES(f32-vdiv-relu-test PRIVATE include src test)
6705 TARGET_LINK_LIBRARIES(f32-vdiv-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6706 ADD_TEST(f32-vdiv-relu-test f32-vdiv-relu-test)
6707
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6708 ADD_EXECUTABLE(f32-vdivc-test test/f32-vdivc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6709 SET_TARGET_PROPERTIES(f32-vdivc-test PROPERTIES
6710 CXX_STANDARD 11
6711 CXX_STANDARD_REQUIRED YES
6712 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6713 TARGET_INCLUDE_DIRECTORIES(f32-vdivc-test PRIVATE include src test)
6714 TARGET_LINK_LIBRARIES(f32-vdivc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6715 ADD_TEST(f32-vdivc-test f32-vdivc-test)
6716
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6717 ADD_EXECUTABLE(f32-vdivc-minmax-test test/f32-vdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6718 SET_TARGET_PROPERTIES(f32-vdivc-minmax-test PROPERTIES
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6719 CXX_STANDARD 11
6720 CXX_STANDARD_REQUIRED YES
6721 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6722 TARGET_INCLUDE_DIRECTORIES(f32-vdivc-minmax-test PRIVATE include src test)
6723 TARGET_LINK_LIBRARIES(f32-vdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6724 ADD_TEST(f32-vdivc-minmax-test f32-vdivc-minmax-test)
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6725
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6726 ADD_EXECUTABLE(f32-vdivc-relu-test test/f32-vdivc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6727 SET_TARGET_PROPERTIES(f32-vdivc-relu-test PROPERTIES
6728 CXX_STANDARD 11
6729 CXX_STANDARD_REQUIRED YES
6730 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6731 TARGET_INCLUDE_DIRECTORIES(f32-vdivc-relu-test PRIVATE include src test)
6732 TARGET_LINK_LIBRARIES(f32-vdivc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6733 ADD_TEST(f32-vdivc-relu-test f32-vdivc-relu-test)
6734
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6735 ADD_EXECUTABLE(f32-vrdivc-test test/f32-vrdivc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6736 SET_TARGET_PROPERTIES(f32-vrdivc-test PROPERTIES
6737 CXX_STANDARD 11
6738 CXX_STANDARD_REQUIRED YES
6739 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6740 TARGET_INCLUDE_DIRECTORIES(f32-vrdivc-test PRIVATE include src test)
6741 TARGET_LINK_LIBRARIES(f32-vrdivc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6742 ADD_TEST(f32-vrdivc-test f32-vrdivc-test)
6743
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6744 ADD_EXECUTABLE(f32-vrdivc-minmax-test test/f32-vrdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6745 SET_TARGET_PROPERTIES(f32-vrdivc-minmax-test PROPERTIES
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6746 CXX_STANDARD 11
6747 CXX_STANDARD_REQUIRED YES
6748 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6749 TARGET_INCLUDE_DIRECTORIES(f32-vrdivc-minmax-test PRIVATE include src test)
6750 TARGET_LINK_LIBRARIES(f32-vrdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6751 ADD_TEST(f32-vrdivc-minmax-test f32-vrdivc-minmax-test)
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6752
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6753 ADD_EXECUTABLE(f32-vrdivc-relu-test test/f32-vrdivc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6754 SET_TARGET_PROPERTIES(f32-vrdivc-relu-test PROPERTIES
6755 CXX_STANDARD 11
6756 CXX_STANDARD_REQUIRED YES
6757 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6758 TARGET_INCLUDE_DIRECTORIES(f32-vrdivc-relu-test PRIVATE include src test)
6759 TARGET_LINK_LIBRARIES(f32-vrdivc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6760 ADD_TEST(f32-vrdivc-relu-test f32-vrdivc-relu-test)
6761
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6762 ADD_EXECUTABLE(f32-velu-test test/f32-velu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]6763 SET_TARGET_PROPERTIES(f32-velu-test PROPERTIES
6764 CXX_STANDARD 11
6765 CXX_STANDARD_REQUIRED YES
6766 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6767 TARGET_INCLUDE_DIRECTORIES(f32-velu-test PRIVATE include src test)
6768 TARGET_LINK_LIBRARIES(f32-velu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]6769 ADD_TEST(f32-velu-test f32-velu-test)
6770
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6771 ADD_EXECUTABLE(f32-vlrelu-test test/f32-vlrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]6772 SET_TARGET_PROPERTIES(f32-vlrelu-test PROPERTIES
6773 CXX_STANDARD 11
6774 CXX_STANDARD_REQUIRED YES
6775 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6776 TARGET_INCLUDE_DIRECTORIES(f32-vlrelu-test PRIVATE include src test)
6777 TARGET_LINK_LIBRARIES(f32-vlrelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]6778 ADD_TEST(f32-vlrelu-test f32-vlrelu-test)
6779
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6780 ADD_EXECUTABLE(f32-vmax-test test/f32-vmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6781 SET_TARGET_PROPERTIES(f32-vmax-test PROPERTIES
6782 CXX_STANDARD 11
6783 CXX_STANDARD_REQUIRED YES
6784 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6785 TARGET_INCLUDE_DIRECTORIES(f32-vmax-test PRIVATE include src test)
6786 TARGET_LINK_LIBRARIES(f32-vmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6787 ADD_TEST(f32-vmax-test f32-vmax-test)
6788
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6789 ADD_EXECUTABLE(f32-vmaxc-test test/f32-vmaxc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6790 SET_TARGET_PROPERTIES(f32-vmaxc-test PROPERTIES
6791 CXX_STANDARD 11
6792 CXX_STANDARD_REQUIRED YES
6793 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6794 TARGET_INCLUDE_DIRECTORIES(f32-vmaxc-test PRIVATE include src test)
6795 TARGET_LINK_LIBRARIES(f32-vmaxc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6796 ADD_TEST(f32-vmaxc-test f32-vmaxc-test)
6797
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6798 ADD_EXECUTABLE(f32-vmin-test test/f32-vmin.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6799 SET_TARGET_PROPERTIES(f32-vmin-test PROPERTIES
6800 CXX_STANDARD 11
6801 CXX_STANDARD_REQUIRED YES
6802 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6803 TARGET_INCLUDE_DIRECTORIES(f32-vmin-test PRIVATE include src test)
6804 TARGET_LINK_LIBRARIES(f32-vmin-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6805 ADD_TEST(f32-vmin-test f32-vmin-test)
6806
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6807 ADD_EXECUTABLE(f32-vminc-test test/f32-vminc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6808 SET_TARGET_PROPERTIES(f32-vminc-test PROPERTIES
6809 CXX_STANDARD 11
6810 CXX_STANDARD_REQUIRED YES
6811 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6812 TARGET_INCLUDE_DIRECTORIES(f32-vminc-test PRIVATE include src test)
6813 TARGET_LINK_LIBRARIES(f32-vminc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6814 ADD_TEST(f32-vminc-test f32-vminc-test)
6815
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6816 ADD_EXECUTABLE(f32-vmul-test test/f32-vmul.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6817 SET_TARGET_PROPERTIES(f32-vmul-test PROPERTIES
6818 CXX_STANDARD 11
6819 CXX_STANDARD_REQUIRED YES
6820 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6821 TARGET_INCLUDE_DIRECTORIES(f32-vmul-test PRIVATE include src test)
6822 TARGET_LINK_LIBRARIES(f32-vmul-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6823 ADD_TEST(f32-vmul-test f32-vmul-test)
6824
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6825 ADD_EXECUTABLE(f32-vmul-minmax-test test/f32-vmul-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6826 SET_TARGET_PROPERTIES(f32-vmul-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6827 CXX_STANDARD 11
6828 CXX_STANDARD_REQUIRED YES
6829 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6830 TARGET_INCLUDE_DIRECTORIES(f32-vmul-minmax-test PRIVATE include src test)
6831 TARGET_LINK_LIBRARIES(f32-vmul-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6832 ADD_TEST(f32-vmul-minmax-test f32-vmul-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6833
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6834 ADD_EXECUTABLE(f32-vmul-relu-test test/f32-vmul-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6835 SET_TARGET_PROPERTIES(f32-vmul-relu-test PROPERTIES
6836 CXX_STANDARD 11
6837 CXX_STANDARD_REQUIRED YES
6838 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6839 TARGET_INCLUDE_DIRECTORIES(f32-vmul-relu-test PRIVATE include src test)
6840 TARGET_LINK_LIBRARIES(f32-vmul-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6841 ADD_TEST(f32-vmul-relu-test f32-vmul-relu-test)
6842
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6843 ADD_EXECUTABLE(f32-vmulc-test test/f32-vmulc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6844 SET_TARGET_PROPERTIES(f32-vmulc-test PROPERTIES
6845 CXX_STANDARD 11
6846 CXX_STANDARD_REQUIRED YES
6847 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6848 TARGET_INCLUDE_DIRECTORIES(f32-vmulc-test PRIVATE include src test)
6849 TARGET_LINK_LIBRARIES(f32-vmulc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6850 ADD_TEST(f32-vmulc-test f32-vmulc-test)
6851
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6852 ADD_EXECUTABLE(f32-vmulc-minmax-test test/f32-vmulc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6853 SET_TARGET_PROPERTIES(f32-vmulc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6854 CXX_STANDARD 11
6855 CXX_STANDARD_REQUIRED YES
6856 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6857 TARGET_INCLUDE_DIRECTORIES(f32-vmulc-minmax-test PRIVATE include src test)
6858 TARGET_LINK_LIBRARIES(f32-vmulc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6859 ADD_TEST(f32-vmulc-minmax-test f32-vmulc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6860
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6861 ADD_EXECUTABLE(f32-vmulc-relu-test test/f32-vmulc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6862 SET_TARGET_PROPERTIES(f32-vmulc-relu-test PROPERTIES
6863 CXX_STANDARD 11
6864 CXX_STANDARD_REQUIRED YES
6865 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6866 TARGET_INCLUDE_DIRECTORIES(f32-vmulc-relu-test PRIVATE include src test)
6867 TARGET_LINK_LIBRARIES(f32-vmulc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6868 ADD_TEST(f32-vmulc-relu-test f32-vmulc-relu-test)
6869
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6870 ADD_EXECUTABLE(f32-vmulcaddc-minmax-test test/f32-vmulcaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]6871 SET_TARGET_PROPERTIES(f32-vmulcaddc-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6872 CXX_STANDARD 11
6873 CXX_STANDARD_REQUIRED YES
6874 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6875 TARGET_INCLUDE_DIRECTORIES(f32-vmulcaddc-minmax-test PRIVATE include src test)
6876 TARGET_LINK_LIBRARIES(f32-vmulcaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]6877 ADD_TEST(f32-vmulcaddc-minmax-test f32-vmulcaddc-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6878
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6879 ADD_EXECUTABLE(f32-vneg-test test/f32-vneg.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6880 SET_TARGET_PROPERTIES(f32-vneg-test PROPERTIES
6881 CXX_STANDARD 11
6882 CXX_STANDARD_REQUIRED YES
6883 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6884 TARGET_INCLUDE_DIRECTORIES(f32-vneg-test PRIVATE include src test)
6885 TARGET_LINK_LIBRARIES(f32-vneg-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6886 ADD_TEST(f32-vneg-test f32-vneg-test)
6887
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6888 ADD_EXECUTABLE(f32-vrelu-test test/f32-vrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6889 SET_TARGET_PROPERTIES(f32-vrelu-test PROPERTIES
6890 CXX_STANDARD 11
6891 CXX_STANDARD_REQUIRED YES
6892 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6893 TARGET_INCLUDE_DIRECTORIES(f32-vrelu-test PRIVATE include src test)
6894 TARGET_LINK_LIBRARIES(f32-vrelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6895 ADD_TEST(f32-vrelu-test f32-vrelu-test)
6896
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6897 ADD_EXECUTABLE(f32-vrndne-test test/f32-vrndne.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6898 SET_TARGET_PROPERTIES(f32-vrndne-test PROPERTIES
6899 CXX_STANDARD 11
6900 CXX_STANDARD_REQUIRED YES
6901 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6902 TARGET_INCLUDE_DIRECTORIES(f32-vrndne-test PRIVATE include src test)
6903 TARGET_LINK_LIBRARIES(f32-vrndne-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6904 ADD_TEST(f32-vrndne-test f32-vrndne-test)
6905
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6906 ADD_EXECUTABLE(f32-vrndz-test test/f32-vrndz.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6907 SET_TARGET_PROPERTIES(f32-vrndz-test PROPERTIES
6908 CXX_STANDARD 11
6909 CXX_STANDARD_REQUIRED YES
6910 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6911 TARGET_INCLUDE_DIRECTORIES(f32-vrndz-test PRIVATE include src test)
6912 TARGET_LINK_LIBRARIES(f32-vrndz-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6913 ADD_TEST(f32-vrndz-test f32-vrndz-test)
6914
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6915 ADD_EXECUTABLE(f32-vrndu-test test/f32-vrndu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6916 SET_TARGET_PROPERTIES(f32-vrndu-test PROPERTIES
6917 CXX_STANDARD 11
6918 CXX_STANDARD_REQUIRED YES
6919 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6920 TARGET_INCLUDE_DIRECTORIES(f32-vrndu-test PRIVATE include src test)
6921 TARGET_LINK_LIBRARIES(f32-vrndu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6922 ADD_TEST(f32-vrndu-test f32-vrndu-test)
6923
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6924 ADD_EXECUTABLE(f32-vrndd-test test/f32-vrndd.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6925 SET_TARGET_PROPERTIES(f32-vrndd-test PROPERTIES
6926 CXX_STANDARD 11
6927 CXX_STANDARD_REQUIRED YES
6928 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6929 TARGET_INCLUDE_DIRECTORIES(f32-vrndd-test PRIVATE include src test)
6930 TARGET_LINK_LIBRARIES(f32-vrndd-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6931 ADD_TEST(f32-vrndd-test f32-vrndd-test)
6932
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6933 ADD_EXECUTABLE(f32-vscaleexpminusmax-test test/f32-vscaleexpminusmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]6934 SET_TARGET_PROPERTIES(f32-vscaleexpminusmax-test PROPERTIES
6935 CXX_STANDARD 11
6936 CXX_STANDARD_REQUIRED YES
6937 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6938 TARGET_INCLUDE_DIRECTORIES(f32-vscaleexpminusmax-test PRIVATE include src test)
6939 TARGET_LINK_LIBRARIES(f32-vscaleexpminusmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]6940 ADD_TEST(f32-vscaleexpminusmax-test f32-vscaleexpminusmax-test)
6941
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6942 ADD_EXECUTABLE(f32-vscaleextexp-test test/f32-vscaleextexp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan9f240d12020-04-13 10:42:30 -0700[diff] [blame]6943 SET_TARGET_PROPERTIES(f32-vscaleextexp-test PROPERTIES
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]6944 CXX_STANDARD 11
6945 CXX_STANDARD_REQUIRED YES
6946 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6947 TARGET_INCLUDE_DIRECTORIES(f32-vscaleextexp-test PRIVATE include src test)
6948 TARGET_LINK_LIBRARIES(f32-vscaleextexp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]6949 ADD_TEST(f32-vscaleextexp-test f32-vscaleextexp-test)
6950
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6951 ADD_EXECUTABLE(f32-vsigmoid-test test/f32-vsigmoid.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6952 SET_TARGET_PROPERTIES(f32-vsigmoid-test PROPERTIES
6953 CXX_STANDARD 11
6954 CXX_STANDARD_REQUIRED YES
6955 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6956 TARGET_INCLUDE_DIRECTORIES(f32-vsigmoid-test PRIVATE include src test)
6957 TARGET_LINK_LIBRARIES(f32-vsigmoid-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6958 ADD_TEST(f32-vsigmoid-test f32-vsigmoid-test)
6959
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6960 ADD_EXECUTABLE(f32-vsqr-test test/f32-vsqr.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6961 SET_TARGET_PROPERTIES(f32-vsqr-test PROPERTIES
6962 CXX_STANDARD 11
6963 CXX_STANDARD_REQUIRED YES
6964 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6965 TARGET_INCLUDE_DIRECTORIES(f32-vsqr-test PRIVATE include src test)
6966 TARGET_LINK_LIBRARIES(f32-vsqr-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6967 ADD_TEST(f32-vsqr-test f32-vsqr-test)
6968
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6969 ADD_EXECUTABLE(f32-vsqrdiff-test test/f32-vsqrdiff.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]6970 SET_TARGET_PROPERTIES(f32-vsqrdiff-test PROPERTIES
6971 CXX_STANDARD 11
6972 CXX_STANDARD_REQUIRED YES
6973 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6974 TARGET_INCLUDE_DIRECTORIES(f32-vsqrdiff-test PRIVATE include src test)
6975 TARGET_LINK_LIBRARIES(f32-vsqrdiff-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]6976 ADD_TEST(f32-vsqrdiff-test f32-vsqrdiff-test)
6977
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6978 ADD_EXECUTABLE(f32-vsqrdiffc-test test/f32-vsqrdiffc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]6979 SET_TARGET_PROPERTIES(f32-vsqrdiffc-test PROPERTIES
6980 CXX_STANDARD 11
6981 CXX_STANDARD_REQUIRED YES
6982 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6983 TARGET_INCLUDE_DIRECTORIES(f32-vsqrdiffc-test PRIVATE include src test)
6984 TARGET_LINK_LIBRARIES(f32-vsqrdiffc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]6985 ADD_TEST(f32-vsqrdiffc-test f32-vsqrdiffc-test)
6986
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6987 ADD_EXECUTABLE(f32-vsqrt-test test/f32-vsqrt.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]6988 SET_TARGET_PROPERTIES(f32-vsqrt-test PROPERTIES
6989 CXX_STANDARD 11
6990 CXX_STANDARD_REQUIRED YES
6991 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6992 TARGET_INCLUDE_DIRECTORIES(f32-vsqrt-test PRIVATE include src test)
6993 TARGET_LINK_LIBRARIES(f32-vsqrt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]6994 ADD_TEST(f32-vsqrt-test f32-vsqrt-test)
6995
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6996 ADD_EXECUTABLE(f32-vsub-test test/f32-vsub.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6997 SET_TARGET_PROPERTIES(f32-vsub-test PROPERTIES
6998 CXX_STANDARD 11
6999 CXX_STANDARD_REQUIRED YES
7000 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7001 TARGET_INCLUDE_DIRECTORIES(f32-vsub-test PRIVATE include src test)
7002 TARGET_LINK_LIBRARIES(f32-vsub-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7003 ADD_TEST(f32-vsub-test f32-vsub-test)
7004
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7005 ADD_EXECUTABLE(f32-vsub-minmax-test test/f32-vsub-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7006 SET_TARGET_PROPERTIES(f32-vsub-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7007 CXX_STANDARD 11
7008 CXX_STANDARD_REQUIRED YES
7009 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7010 TARGET_INCLUDE_DIRECTORIES(f32-vsub-minmax-test PRIVATE include src test)
7011 TARGET_LINK_LIBRARIES(f32-vsub-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7012 ADD_TEST(f32-vsub-minmax-test f32-vsub-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7013
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7014 ADD_EXECUTABLE(f32-vsub-relu-test test/f32-vsub-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7015 SET_TARGET_PROPERTIES(f32-vsub-relu-test PROPERTIES
7016 CXX_STANDARD 11
7017 CXX_STANDARD_REQUIRED YES
7018 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7019 TARGET_INCLUDE_DIRECTORIES(f32-vsub-relu-test PRIVATE include src test)
7020 TARGET_LINK_LIBRARIES(f32-vsub-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7021 ADD_TEST(f32-vsub-relu-test f32-vsub-relu-test)
7022
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7023 ADD_EXECUTABLE(f32-vsubc-test test/f32-vsubc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7024 SET_TARGET_PROPERTIES(f32-vsubc-test PROPERTIES
7025 CXX_STANDARD 11
7026 CXX_STANDARD_REQUIRED YES
7027 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7028 TARGET_INCLUDE_DIRECTORIES(f32-vsubc-test PRIVATE include src test)
7029 TARGET_LINK_LIBRARIES(f32-vsubc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7030 ADD_TEST(f32-vsubc-test f32-vsubc-test)
7031
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7032 ADD_EXECUTABLE(f32-vsubc-minmax-test test/f32-vsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7033 SET_TARGET_PROPERTIES(f32-vsubc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]7034 CXX_STANDARD 11
7035 CXX_STANDARD_REQUIRED YES
7036 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7037 TARGET_INCLUDE_DIRECTORIES(f32-vsubc-minmax-test PRIVATE include src test)
7038 TARGET_LINK_LIBRARIES(f32-vsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7039 ADD_TEST(f32-vsubc-minmax-test f32-vsubc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]7040
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7041 ADD_EXECUTABLE(f32-vsubc-relu-test test/f32-vsubc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7042 SET_TARGET_PROPERTIES(f32-vsubc-relu-test PROPERTIES
7043 CXX_STANDARD 11
7044 CXX_STANDARD_REQUIRED YES
7045 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7046 TARGET_INCLUDE_DIRECTORIES(f32-vsubc-relu-test PRIVATE include src test)
7047 TARGET_LINK_LIBRARIES(f32-vsubc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7048 ADD_TEST(f32-vsubc-relu-test f32-vsubc-relu-test)
7049
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7050 ADD_EXECUTABLE(f32-vrsubc-test test/f32-vrsubc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7051 SET_TARGET_PROPERTIES(f32-vrsubc-test PROPERTIES
7052 CXX_STANDARD 11
7053 CXX_STANDARD_REQUIRED YES
7054 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7055 TARGET_INCLUDE_DIRECTORIES(f32-vrsubc-test PRIVATE include src test)
7056 TARGET_LINK_LIBRARIES(f32-vrsubc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]7057 ADD_TEST(f32-vrsubc-test f32-vrsubc-test)
7058
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7059 ADD_EXECUTABLE(f32-vrsubc-minmax-test test/f32-vrsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7060 SET_TARGET_PROPERTIES(f32-vrsubc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]7061 CXX_STANDARD 11
7062 CXX_STANDARD_REQUIRED YES
7063 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7064 TARGET_INCLUDE_DIRECTORIES(f32-vrsubc-minmax-test PRIVATE include src test)
7065 TARGET_LINK_LIBRARIES(f32-vrsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]7066 ADD_TEST(f32-vrsubc-minmax-test f32-vrsubc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]7067
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7068 ADD_EXECUTABLE(f32-vrsubc-relu-test test/f32-vrsubc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7069 SET_TARGET_PROPERTIES(f32-vrsubc-relu-test PROPERTIES
7070 CXX_STANDARD 11
7071 CXX_STANDARD_REQUIRED YES
7072 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7073 TARGET_INCLUDE_DIRECTORIES(f32-vrsubc-relu-test PRIVATE include src test)
7074 TARGET_LINK_LIBRARIES(f32-vrsubc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]7075 ADD_TEST(f32-vrsubc-relu-test f32-vrsubc-relu-test)
7076
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7077 ADD_EXECUTABLE(qc8-dwconv-minmax-fp32-test test/qc8-dwconv-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]7078 SET_TARGET_PROPERTIES(qc8-dwconv-minmax-fp32-test PROPERTIES
7079 CXX_STANDARD 11
7080 CXX_STANDARD_REQUIRED YES
7081 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7082 TARGET_INCLUDE_DIRECTORIES(qc8-dwconv-minmax-fp32-test PRIVATE include src test)
7083 TARGET_LINK_LIBRARIES(qc8-dwconv-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]7084 ADD_TEST(qc8-dwconv-minmax-fp32-test qc8-dwconv-minmax-fp32-test)
7085
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7086 ADD_EXECUTABLE(qc8-gemm-minmax-fp32-test test/qc8-gemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]7087 SET_TARGET_PROPERTIES(qc8-gemm-minmax-fp32-test PROPERTIES
7088 CXX_STANDARD 11
7089 CXX_STANDARD_REQUIRED YES
7090 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7091 TARGET_INCLUDE_DIRECTORIES(qc8-gemm-minmax-fp32-test PRIVATE include src test)
7092 TARGET_LINK_LIBRARIES(qc8-gemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]7093 ADD_TEST(qc8-gemm-minmax-fp32-test qc8-gemm-minmax-fp32-test)
7094
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7095 ADD_EXECUTABLE(qc8-igemm-minmax-fp32-test test/qc8-igemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane06c8132021-06-03 08:59:11 -0700[diff] [blame]7096 SET_TARGET_PROPERTIES(qc8-igemm-minmax-fp32-test PROPERTIES
7097 CXX_STANDARD 11
7098 CXX_STANDARD_REQUIRED YES
7099 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7100 TARGET_INCLUDE_DIRECTORIES(qc8-igemm-minmax-fp32-test PRIVATE include src test)
7101 TARGET_LINK_LIBRARIES(qc8-igemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane06c8132021-06-03 08:59:11 -0700[diff] [blame]7102 ADD_TEST(qc8-igemm-minmax-fp32-test qc8-igemm-minmax-fp32-test)
7103
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7104 ADD_EXECUTABLE(qs8-dwconv-minmax-fp32-test test/qs8-dwconv-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]7105 SET_TARGET_PROPERTIES(qs8-dwconv-minmax-fp32-test PROPERTIES
7106 CXX_STANDARD 11
7107 CXX_STANDARD_REQUIRED YES
7108 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7109 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-minmax-fp32-test PRIVATE include src test)
7110 TARGET_LINK_LIBRARIES(qs8-dwconv-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]7111 ADD_TEST(qs8-dwconv-minmax-fp32-test qs8-dwconv-minmax-fp32-test)
7112
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7113 ADD_EXECUTABLE(qs8-dwconv-minmax-rndnu-test test/qs8-dwconv-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]7114 SET_TARGET_PROPERTIES(qs8-dwconv-minmax-rndnu-test PROPERTIES
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]7115 CXX_STANDARD 11
7116 CXX_STANDARD_REQUIRED YES
7117 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7118 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-minmax-rndnu-test PRIVATE include src test)
7119 TARGET_LINK_LIBRARIES(qs8-dwconv-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]7120 ADD_TEST(qs8-dwconv-minmax-rndnu-test qs8-dwconv-minmax-rndnu-test)
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]7121
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7122 ADD_EXECUTABLE(qs8-gavgpool-minmax-test test/qs8-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]7123 SET_TARGET_PROPERTIES(qs8-gavgpool-minmax-test PROPERTIES
7124 CXX_STANDARD 11
7125 CXX_STANDARD_REQUIRED YES
7126 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7127 TARGET_INCLUDE_DIRECTORIES(qs8-gavgpool-minmax-test PRIVATE include src test)
7128 TARGET_LINK_LIBRARIES(qs8-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]7129 ADD_TEST(qs8-gavgpool-test qs8-gavgpool-minmax-test)
7130
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7131 ADD_EXECUTABLE(qs8-gemm-minmax-fp32-test test/qs8-gemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7132 SET_TARGET_PROPERTIES(qs8-gemm-minmax-fp32-test PROPERTIES
7133 CXX_STANDARD 11
7134 CXX_STANDARD_REQUIRED YES
7135 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7136 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-minmax-fp32-test PRIVATE include src test)
7137 TARGET_LINK_LIBRARIES(qs8-gemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7138 ADD_TEST(qs8-gemm-minmax-fp32-test qs8-gemm-minmax-fp32-test)
7139
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7140 ADD_EXECUTABLE(qs8-gemm-minmax-rndnu-test test/qs8-gemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7141 SET_TARGET_PROPERTIES(qs8-gemm-minmax-rndnu-test PROPERTIES
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]7142 CXX_STANDARD 11
7143 CXX_STANDARD_REQUIRED YES
7144 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7145 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-minmax-rndnu-test PRIVATE include src test)
7146 TARGET_LINK_LIBRARIES(qs8-gemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7147 ADD_TEST(qs8-gemm-minmax-rndnu-test qs8-gemm-minmax-rndnu-test)
7148
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7149 ADD_EXECUTABLE(qs8-igemm-minmax-fp32-test test/qs8-igemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7150 SET_TARGET_PROPERTIES(qs8-igemm-minmax-fp32-test PROPERTIES
7151 CXX_STANDARD 11
7152 CXX_STANDARD_REQUIRED YES
7153 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7154 TARGET_INCLUDE_DIRECTORIES(qs8-igemm-minmax-fp32-test PRIVATE include src test)
7155 TARGET_LINK_LIBRARIES(qs8-igemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7156 ADD_TEST(qs8-igemm-minmax-fp32-test qs8-igemm-minmax-fp32-test)
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]7157
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7158 ADD_EXECUTABLE(qs8-igemm-minmax-rndnu-test test/qs8-igemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7159 SET_TARGET_PROPERTIES(qs8-igemm-minmax-rndnu-test PROPERTIES
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]7160 CXX_STANDARD 11
7161 CXX_STANDARD_REQUIRED YES
7162 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7163 TARGET_INCLUDE_DIRECTORIES(qs8-igemm-minmax-rndnu-test PRIVATE include src test)
7164 TARGET_LINK_LIBRARIES(qs8-igemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]7165 ADD_TEST(qs8-igemm-minmax-rndnu-test qs8-igemm-minmax-rndnu-test)
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]7166
Marat Dukhanf879d9e2021-08-06 01:09:30 -0700[diff] [blame]7167 ADD_EXECUTABLE(qs8-requantization-test test/qs8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
7168 SET_TARGET_PROPERTIES(qs8-requantization-test PROPERTIES
7169 CXX_STANDARD 11
7170 CXX_STANDARD_REQUIRED YES
7171 CXX_EXTENSIONS YES)
7172 TARGET_INCLUDE_DIRECTORIES(qs8-requantization-test PRIVATE include src test)
7173 TARGET_LINK_LIBRARIES(qs8-requantization-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7174 ADD_TEST(qs8-requantization-test qs8-requantization-test)
7175
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7176 ADD_EXECUTABLE(qs8-vadd-minmax-test test/qs8-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]7177 SET_TARGET_PROPERTIES(qs8-vadd-minmax-test PROPERTIES
7178 CXX_STANDARD 11
7179 CXX_STANDARD_REQUIRED YES
7180 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7181 TARGET_INCLUDE_DIRECTORIES(qs8-vadd-minmax-test PRIVATE include src test)
7182 TARGET_LINK_LIBRARIES(qs8-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]7183 ADD_TEST(qs8-vadd-minmax-test qs8-vadd-minmax-test)
7184
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7185 ADD_EXECUTABLE(qs8-vaddc-minmax-test test/qs8-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]7186 SET_TARGET_PROPERTIES(qs8-vaddc-minmax-test PROPERTIES
7187 CXX_STANDARD 11
7188 CXX_STANDARD_REQUIRED YES
7189 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7190 TARGET_INCLUDE_DIRECTORIES(qs8-vaddc-minmax-test PRIVATE include src test)
7191 TARGET_LINK_LIBRARIES(qs8-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]7192 ADD_TEST(qs8-vaddc-minmax-test qs8-vaddc-minmax-test)
7193
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]7194 ADD_EXECUTABLE(qs8-vmul-minmax-fp32-test test/qs8-vmul-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
7195 SET_TARGET_PROPERTIES(qs8-vmul-minmax-fp32-test PROPERTIES
7196 CXX_STANDARD 11
7197 CXX_STANDARD_REQUIRED YES
7198 CXX_EXTENSIONS YES)
7199 TARGET_INCLUDE_DIRECTORIES(qs8-vmul-minmax-fp32-test PRIVATE include src test)
7200 TARGET_LINK_LIBRARIES(qs8-vmul-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7201 ADD_TEST(qs8-vmul-minmax-fp32-test qs8-vmul-minmax-fp32-test)
7202
7203 ADD_EXECUTABLE(qs8-vmulc-minmax-fp32-test test/qs8-vmulc-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
7204 SET_TARGET_PROPERTIES(qs8-vmulc-minmax-fp32-test PROPERTIES
7205 CXX_STANDARD 11
7206 CXX_STANDARD_REQUIRED YES
7207 CXX_EXTENSIONS YES)
7208 TARGET_INCLUDE_DIRECTORIES(qs8-vmulc-minmax-fp32-test PRIVATE include src test)
7209 TARGET_LINK_LIBRARIES(qs8-vmulc-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7210 ADD_TEST(qs8-vmulc-minmax-fp32-test qs8-vmulc-minmax-fp32-test)
7211
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7212 ADD_EXECUTABLE(qu8-avgpool-minmax-test test/qu8-avgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7213 SET_TARGET_PROPERTIES(qu8-avgpool-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7214 CXX_STANDARD 11
7215 CXX_STANDARD_REQUIRED YES
7216 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7217 TARGET_INCLUDE_DIRECTORIES(qu8-avgpool-minmax-test PRIVATE include src test)
7218 TARGET_LINK_LIBRARIES(qu8-avgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7219 ADD_TEST(qu8-avgpool-minmax-test qu8-avgpool-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7220
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7221 ADD_EXECUTABLE(qu8-dwconv-minmax-fp32-test test/qu8-dwconv-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]7222 SET_TARGET_PROPERTIES(qu8-dwconv-minmax-fp32-test PROPERTIES
7223 CXX_STANDARD 11
7224 CXX_STANDARD_REQUIRED YES
7225 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7226 TARGET_INCLUDE_DIRECTORIES(qu8-dwconv-minmax-fp32-test PRIVATE include src test)
7227 TARGET_LINK_LIBRARIES(qu8-dwconv-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]7228 ADD_TEST(qu8-dwconv-minmax-fp32-test qu8-dwconv-minmax-fp32-test)
7229
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7230 ADD_EXECUTABLE(qu8-dwconv-minmax-rndnu-test test/qu8-dwconv-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]7231 SET_TARGET_PROPERTIES(qu8-dwconv-minmax-rndnu-test PROPERTIES
7232 CXX_STANDARD 11
7233 CXX_STANDARD_REQUIRED YES
7234 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7235 TARGET_INCLUDE_DIRECTORIES(qu8-dwconv-minmax-rndnu-test PRIVATE include src test)
7236 TARGET_LINK_LIBRARIES(qu8-dwconv-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]7237 ADD_TEST(qu8-dwconv-minmax-rndnu-test qu8-dwconv-minmax-rndnu-test)
7238
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7239 ADD_EXECUTABLE(qu8-gavgpool-minmax-test test/qu8-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7240 SET_TARGET_PROPERTIES(qu8-gavgpool-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7241 CXX_STANDARD 11
7242 CXX_STANDARD_REQUIRED YES
7243 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7244 TARGET_INCLUDE_DIRECTORIES(qu8-gavgpool-minmax-test PRIVATE include src test)
7245 TARGET_LINK_LIBRARIES(qu8-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7246 ADD_TEST(qu8-gavgpool-test qu8-gavgpool-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7247
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7248 ADD_EXECUTABLE(qu8-gemm-minmax-fp32-test test/qu8-gemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]7249 SET_TARGET_PROPERTIES(qu8-gemm-minmax-fp32-test PROPERTIES
7250 CXX_STANDARD 11
7251 CXX_STANDARD_REQUIRED YES
7252 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7253 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-minmax-fp32-test PRIVATE include src test)
7254 TARGET_LINK_LIBRARIES(qu8-gemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]7255 ADD_TEST(qu8-gemm-minmax-fp32-test qu8-gemm-minmax-fp32-test)
7256
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7257 ADD_EXECUTABLE(qu8-gemm-minmax-rndnu-test test/qu8-gemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]7258 SET_TARGET_PROPERTIES(qu8-gemm-minmax-rndnu-test PROPERTIES
7259 CXX_STANDARD 11
7260 CXX_STANDARD_REQUIRED YES
7261 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7262 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-minmax-rndnu-test PRIVATE include src test)
7263 TARGET_LINK_LIBRARIES(qu8-gemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]7264 ADD_TEST(qu8-gemm-minmax-rndnu-test qu8-gemm-minmax-rndnu-test)
7265
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7266 ADD_EXECUTABLE(qu8-igemm-minmax-fp32-test test/qu8-igemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]7267 SET_TARGET_PROPERTIES(qu8-igemm-minmax-fp32-test PROPERTIES
7268 CXX_STANDARD 11
7269 CXX_STANDARD_REQUIRED YES
7270 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7271 TARGET_INCLUDE_DIRECTORIES(qu8-igemm-minmax-fp32-test PRIVATE include src test)
7272 TARGET_LINK_LIBRARIES(qu8-igemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]7273 ADD_TEST(qu8-igemm-minmax-fp32-test qu8-igemm-minmax-fp32-test)
7274
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7275 ADD_EXECUTABLE(qu8-igemm-minmax-rndnu-test test/qu8-igemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]7276 SET_TARGET_PROPERTIES(qu8-igemm-minmax-rndnu-test PROPERTIES
7277 CXX_STANDARD 11
7278 CXX_STANDARD_REQUIRED YES
7279 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7280 TARGET_INCLUDE_DIRECTORIES(qu8-igemm-minmax-rndnu-test PRIVATE include src test)
7281 TARGET_LINK_LIBRARIES(qu8-igemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]7282 ADD_TEST(qu8-igemm-minmax-rndnu-test qu8-igemm-minmax-rndnu-test)
7283
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7284 ADD_EXECUTABLE(qu8-requantization-test test/qu8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]7285 SET_TARGET_PROPERTIES(qu8-requantization-test PROPERTIES
7286 CXX_STANDARD 11
7287 CXX_STANDARD_REQUIRED YES
7288 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7289 TARGET_INCLUDE_DIRECTORIES(qu8-requantization-test PRIVATE include src test)
7290 TARGET_LINK_LIBRARIES(qu8-requantization-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]7291 ADD_TEST(qu8-requantization-test qu8-requantization-test)
7292
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7293 ADD_EXECUTABLE(qu8-vadd-minmax-test test/qu8-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7294 SET_TARGET_PROPERTIES(qu8-vadd-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7295 CXX_STANDARD 11
7296 CXX_STANDARD_REQUIRED YES
7297 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7298 TARGET_INCLUDE_DIRECTORIES(qu8-vadd-minmax-test PRIVATE include src test)
7299 TARGET_LINK_LIBRARIES(qu8-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7300 ADD_TEST(qu8-vadd-minmax-test qu8-vadd-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7301
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7302 ADD_EXECUTABLE(qu8-vaddc-minmax-test test/qu8-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]7303 SET_TARGET_PROPERTIES(qu8-vaddc-minmax-test PROPERTIES
7304 CXX_STANDARD 11
7305 CXX_STANDARD_REQUIRED YES
7306 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7307 TARGET_INCLUDE_DIRECTORIES(qu8-vaddc-minmax-test PRIVATE include src test)
7308 TARGET_LINK_LIBRARIES(qu8-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]7309 ADD_TEST(qu8-vaddc-minmax-test qu8-vaddc-minmax-test)
7310
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]7311 ADD_EXECUTABLE(qu8-vmul-minmax-fp32-test test/qu8-vmul-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
7312 SET_TARGET_PROPERTIES(qu8-vmul-minmax-fp32-test PROPERTIES
7313 CXX_STANDARD 11
7314 CXX_STANDARD_REQUIRED YES
7315 CXX_EXTENSIONS YES)
7316 TARGET_INCLUDE_DIRECTORIES(qu8-vmul-minmax-fp32-test PRIVATE include src test)
7317 TARGET_LINK_LIBRARIES(qu8-vmul-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7318 ADD_TEST(qu8-vmul-minmax-fp32-test qu8-vmul-minmax-fp32-test)
7319
7320 ADD_EXECUTABLE(qu8-vmulc-minmax-fp32-test test/qu8-vmulc-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
7321 SET_TARGET_PROPERTIES(qu8-vmulc-minmax-fp32-test PROPERTIES
7322 CXX_STANDARD 11
7323 CXX_STANDARD_REQUIRED YES
7324 CXX_EXTENSIONS YES)
7325 TARGET_INCLUDE_DIRECTORIES(qu8-vmulc-minmax-fp32-test PRIVATE include src test)
7326 TARGET_LINK_LIBRARIES(qu8-vmulc-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7327 ADD_TEST(qu8-vmulc-minmax-fp32-test qu8-vmulc-minmax-fp32-test)
7328
Marat Dukhan95510752021-12-01 22:00:56 -0800[diff] [blame]7329 ADD_EXECUTABLE(s8-ibilinear-test test/s8-ibilinear.cc $<TARGET_OBJECTS:all_microkernels>)
7330 SET_TARGET_PROPERTIES(s8-ibilinear-test PROPERTIES
Marat Dukhancdb42a52021-11-22 20:09:32 -0800[diff] [blame]7331 CXX_STANDARD 11
7332 CXX_STANDARD_REQUIRED YES
7333 CXX_EXTENSIONS YES)
Marat Dukhan95510752021-12-01 22:00:56 -0800[diff] [blame]7334 TARGET_INCLUDE_DIRECTORIES(s8-ibilinear-test PRIVATE include src test)
7335 TARGET_LINK_LIBRARIES(s8-ibilinear-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7336 ADD_TEST(s8-ibilinear-test s8-ibilinear-test)
Marat Dukhancdb42a52021-11-22 20:09:32 -0800[diff] [blame]7337
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]7338 ADD_EXECUTABLE(s8-maxpool-minmax-test test/s8-maxpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
7339 SET_TARGET_PROPERTIES(s8-maxpool-minmax-test PROPERTIES
7340 CXX_STANDARD 11
7341 CXX_STANDARD_REQUIRED YES
7342 CXX_EXTENSIONS YES)
7343 TARGET_INCLUDE_DIRECTORIES(s8-maxpool-minmax-test PRIVATE include src test)
7344 TARGET_LINK_LIBRARIES(s8-maxpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7345 ADD_TEST(s8-maxpool-minmax-test s8-maxpool-minmax-test)
7346
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]7347 ADD_EXECUTABLE(s8-vclamp-test test/s8-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
7348 SET_TARGET_PROPERTIES(s8-vclamp-test PROPERTIES
7349 CXX_STANDARD 11
7350 CXX_STANDARD_REQUIRED YES
7351 CXX_EXTENSIONS YES)
7352 TARGET_INCLUDE_DIRECTORIES(s8-vclamp-test PRIVATE include src test)
7353 TARGET_LINK_LIBRARIES(s8-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7354 ADD_TEST(s8-vclamp-test s8-vclamp-test)
7355
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7356 ADD_EXECUTABLE(u8-lut32norm-test test/u8-lut32norm.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7357 SET_TARGET_PROPERTIES(u8-lut32norm-test PROPERTIES
7358 CXX_STANDARD 11
7359 CXX_STANDARD_REQUIRED YES
7360 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7361 TARGET_INCLUDE_DIRECTORIES(u8-lut32norm-test PRIVATE include src test)
7362 TARGET_LINK_LIBRARIES(u8-lut32norm-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7363 ADD_TEST(u8-lut32norm-test u8-lut32norm-test)
7364
Marat Dukhan95510752021-12-01 22:00:56 -0800[diff] [blame]7365 ADD_EXECUTABLE(u8-ibilinear-test test/u8-ibilinear.cc $<TARGET_OBJECTS:all_microkernels>)
7366 SET_TARGET_PROPERTIES(u8-ibilinear-test PROPERTIES
Marat Dukhancdb42a52021-11-22 20:09:32 -0800[diff] [blame]7367 CXX_STANDARD 11
7368 CXX_STANDARD_REQUIRED YES
7369 CXX_EXTENSIONS YES)
Marat Dukhan95510752021-12-01 22:00:56 -0800[diff] [blame]7370 TARGET_INCLUDE_DIRECTORIES(u8-ibilinear-test PRIVATE include src test)
7371 TARGET_LINK_LIBRARIES(u8-ibilinear-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7372 ADD_TEST(u8-ibilinear-test u8-ibilinear-test)
Marat Dukhancdb42a52021-11-22 20:09:32 -0800[diff] [blame]7373
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7374 ADD_EXECUTABLE(u8-maxpool-minmax-test test/u8-maxpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]7375 SET_TARGET_PROPERTIES(u8-maxpool-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7376 CXX_STANDARD 11
7377 CXX_STANDARD_REQUIRED YES
7378 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7379 TARGET_INCLUDE_DIRECTORIES(u8-maxpool-minmax-test PRIVATE include src test)
7380 TARGET_LINK_LIBRARIES(u8-maxpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]7381 ADD_TEST(u8-maxpool-minmax-test u8-maxpool-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7382
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7383 ADD_EXECUTABLE(u8-rmax-test test/u8-rmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7384 SET_TARGET_PROPERTIES(u8-rmax-test PROPERTIES
7385 CXX_STANDARD 11
7386 CXX_STANDARD_REQUIRED YES
7387 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7388 TARGET_INCLUDE_DIRECTORIES(u8-rmax-test PRIVATE include src test)
7389 TARGET_LINK_LIBRARIES(u8-rmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7390 ADD_TEST(u8-rmax-test u8-rmax-test)
7391
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7392 ADD_EXECUTABLE(u8-vclamp-test test/u8-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7393 SET_TARGET_PROPERTIES(u8-vclamp-test PROPERTIES
7394 CXX_STANDARD 11
7395 CXX_STANDARD_REQUIRED YES
7396 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7397 TARGET_INCLUDE_DIRECTORIES(u8-vclamp-test PRIVATE include src test)
7398 TARGET_LINK_LIBRARIES(u8-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7399 ADD_TEST(u8-vclamp-test u8-vclamp-test)
7400
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7401 ADD_EXECUTABLE(x32-packx-test test/x32-packx.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7402 SET_TARGET_PROPERTIES(x32-packx-test PROPERTIES
7403 CXX_STANDARD 11
7404 CXX_STANDARD_REQUIRED YES
7405 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7406 TARGET_INCLUDE_DIRECTORIES(x32-packx-test PRIVATE include src test)
7407 TARGET_LINK_LIBRARIES(x32-packx-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7408 ADD_TEST(x32-packx-test x32-packx-test)
7409
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7410 ADD_EXECUTABLE(x32-unpool-test test/x32-unpool.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7411 SET_TARGET_PROPERTIES(x32-unpool-test PROPERTIES
7412 CXX_STANDARD 11
7413 CXX_STANDARD_REQUIRED YES
7414 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7415 TARGET_INCLUDE_DIRECTORIES(x32-unpool-test PRIVATE include src test)
7416 TARGET_LINK_LIBRARIES(x32-unpool-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7417 ADD_TEST(x32-unpool-test x32-unpool-test)
7418
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7419 ADD_EXECUTABLE(x32-depthtospace2d-chw2hwc-test test/x32-depthtospace2d-chw2hwc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan79fd7302020-11-28 22:24:06 -0800[diff] [blame]7420 SET_TARGET_PROPERTIES(x32-depthtospace2d-chw2hwc-test PROPERTIES
Yury Kartynnike7841862020-11-04 18:22:18 -0800[diff] [blame]7421 CXX_STANDARD 11
7422 CXX_STANDARD_REQUIRED YES
7423 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7424 TARGET_INCLUDE_DIRECTORIES(x32-depthtospace2d-chw2hwc-test PRIVATE include src test)
7425 TARGET_LINK_LIBRARIES(x32-depthtospace2d-chw2hwc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan79fd7302020-11-28 22:24:06 -0800[diff] [blame]7426 ADD_TEST(x32-depthtospace2d-chw2hwc-test x32-depthtospace2d-chw2hwc-test)
Yury Kartynnike7841862020-11-04 18:22:18 -0800[diff] [blame]7427
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7428 ADD_EXECUTABLE(x32-zip-test test/x32-zip.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7429 SET_TARGET_PROPERTIES(x32-zip-test PROPERTIES
7430 CXX_STANDARD 11
7431 CXX_STANDARD_REQUIRED YES
7432 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7433 TARGET_INCLUDE_DIRECTORIES(x32-zip-test PRIVATE include src test)
7434 TARGET_LINK_LIBRARIES(x32-zip-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7435 ADD_TEST(x32-zip-test x32-zip-test)
7436
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7437 ADD_EXECUTABLE(x8-lut-test test/x8-lut.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7438 SET_TARGET_PROPERTIES(x8-lut-test PROPERTIES
7439 CXX_STANDARD 11
7440 CXX_STANDARD_REQUIRED YES
7441 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7442 TARGET_INCLUDE_DIRECTORIES(x8-lut-test PRIVATE include src test)
7443 TARGET_LINK_LIBRARIES(x8-lut-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7444 ADD_TEST(x8-lut-test x8-lut-test)
7445
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7446 ADD_EXECUTABLE(x8-zip-test test/x8-zip.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7447 SET_TARGET_PROPERTIES(x8-zip-test PROPERTIES
7448 CXX_STANDARD 11
7449 CXX_STANDARD_REQUIRED YES
7450 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7451 TARGET_INCLUDE_DIRECTORIES(x8-zip-test PRIVATE include src test)
7452 TARGET_LINK_LIBRARIES(x8-zip-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7453 ADD_TEST(x8-zip-test x8-zip-test)
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]7454
7455 ADD_EXECUTABLE(xx-fill-test test/xx-fill.cc $<TARGET_OBJECTS:all_microkernels>)
7456 SET_TARGET_PROPERTIES(xx-fill-test PROPERTIES
7457 CXX_STANDARD 11
7458 CXX_STANDARD_REQUIRED YES
7459 CXX_EXTENSIONS YES)
7460 TARGET_INCLUDE_DIRECTORIES(xx-fill-test PRIVATE include src test)
7461 TARGET_LINK_LIBRARIES(xx-fill-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7462 ADD_TEST(xx-fill-test xx-fill-test)
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]7463
7464 ADD_EXECUTABLE(xx-pad-test test/xx-pad.cc $<TARGET_OBJECTS:all_microkernels>)
7465 SET_TARGET_PROPERTIES(xx-pad-test PROPERTIES
7466 CXX_STANDARD 11
7467 CXX_STANDARD_REQUIRED YES
7468 CXX_EXTENSIONS YES)
7469 TARGET_INCLUDE_DIRECTORIES(xx-pad-test PRIVATE include src test)
7470 TARGET_LINK_LIBRARIES(xx-pad-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7471 ADD_TEST(xx-pad-test xx-pad-test)
Zhi An Ngb559fe92021-12-06 09:25:38 -0800[diff] [blame^]7472
7473 ADD_EXECUTABLE(aarch32-assembler-test test/aarch32-assembler.cc $<TARGET_OBJECTS:jit>)
7474 SET_TARGET_PROPERTIES(aarch32-assembler-test PROPERTIES
7475 CXX_STANDARD 11
7476 CXX_STANDARD_REQUIRED YES
7477 CXX_EXTENSIONS YES)
7478 TARGET_INCLUDE_DIRECTORIES(aarch32-assembler-test PRIVATE src)
7479 TARGET_LINK_LIBRARIES(aarch32-assembler-test PRIVATE gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7480ENDIF()
7481
7482# ---[ XNNPACK microbenchmarks
7483IF(XNNPACK_BUILD_BENCHMARKS)
7484 # ---[ Build google benchmark
7485 IF(NOT TARGET benchmark)
7486 SET(BENCHMARK_ENABLE_TESTING OFF CACHE BOOL "")
7487 ADD_SUBDIRECTORY(
7488 "${GOOGLEBENCHMARK_SOURCE_DIR}"
7489 "${CONFU_DEPENDENCIES_BINARY_DIR}/googlebenchmark")
7490 ENDIF()
7491
7492 ADD_LIBRARY(bench-utils bench/utils.cc)
7493 SET_TARGET_PROPERTIES(bench-utils PROPERTIES
7494 CXX_STANDARD 11
7495 CXX_STANDARD_REQUIRED YES
7496 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7497 TARGET_INCLUDE_DIRECTORIES(bench-utils PRIVATE .)
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]7498 TARGET_LINK_LIBRARIES(bench-utils PRIVATE benchmark cpuinfo)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7499
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7500 # ---[ Build accuracy microbenchmarks
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7501 ADD_EXECUTABLE(f32-exp-ulp-eval eval/f32-exp-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7502 SET_TARGET_PROPERTIES(f32-exp-ulp-eval PROPERTIES
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7503 CXX_STANDARD 11
7504 CXX_STANDARD_REQUIRED YES
7505 CXX_EXTENSIONS NO)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7506 TARGET_INCLUDE_DIRECTORIES(f32-exp-ulp-eval PRIVATE . src)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7507 TARGET_LINK_LIBRARIES(f32-exp-ulp-eval PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7508
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7509 ADD_EXECUTABLE(f32-expminus-ulp-eval eval/f32-expminus-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7510 SET_TARGET_PROPERTIES(f32-expminus-ulp-eval PROPERTIES
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7511 CXX_STANDARD 11
7512 CXX_STANDARD_REQUIRED YES
7513 CXX_EXTENSIONS NO)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7514 TARGET_INCLUDE_DIRECTORIES(f32-expminus-ulp-eval PRIVATE . src)
7515 TARGET_LINK_LIBRARIES(f32-expminus-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7516
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7517 ADD_EXECUTABLE(f32-expm1minus-ulp-eval eval/f32-expm1minus-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7518 SET_TARGET_PROPERTIES(f32-expm1minus-ulp-eval PROPERTIES
Marat Dukhana438aca2020-11-20 15:45:01 -0800[diff] [blame]7519 CXX_STANDARD 11
7520 CXX_STANDARD_REQUIRED YES
7521 CXX_EXTENSIONS NO)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7522 TARGET_INCLUDE_DIRECTORIES(f32-expm1minus-ulp-eval PRIVATE . src)
7523 TARGET_LINK_LIBRARIES(f32-expm1minus-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhana438aca2020-11-20 15:45:01 -0800[diff] [blame]7524
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7525 ADD_EXECUTABLE(f32-extexp-ulp-eval eval/f32-extexp-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7526 SET_TARGET_PROPERTIES(f32-extexp-ulp-eval PROPERTIES
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7527 CXX_STANDARD 11
7528 CXX_STANDARD_REQUIRED YES
7529 CXX_EXTENSIONS YES)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7530 TARGET_INCLUDE_DIRECTORIES(f32-extexp-ulp-eval PRIVATE . src)
7531 TARGET_LINK_LIBRARIES(f32-extexp-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7532
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7533 ADD_EXECUTABLE(f32-sigmoid-ulp-eval eval/f32-sigmoid-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7534 SET_TARGET_PROPERTIES(f32-sigmoid-ulp-eval PROPERTIES
7535 CXX_STANDARD 11
7536 CXX_STANDARD_REQUIRED YES
7537 CXX_EXTENSIONS NO)
7538 TARGET_INCLUDE_DIRECTORIES(f32-sigmoid-ulp-eval PRIVATE . src)
7539 TARGET_LINK_LIBRARIES(f32-sigmoid-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
7540
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7541 ADD_EXECUTABLE(f32-sqrt-ulp-eval eval/f32-sqrt-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7542 SET_TARGET_PROPERTIES(f32-sqrt-ulp-eval PROPERTIES
7543 CXX_STANDARD 11
7544 CXX_STANDARD_REQUIRED YES
7545 CXX_EXTENSIONS NO)
7546 TARGET_INCLUDE_DIRECTORIES(f32-sqrt-ulp-eval PRIVATE . src)
7547 TARGET_LINK_LIBRARIES(f32-sqrt-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
7548
7549 # ---[ Build accuracy tests
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]7550 ADD_EXECUTABLE(f16-f32-cvt-eval eval/f16-f32-cvt.cc $<TARGET_OBJECTS:all_microkernels>)
7551 SET_TARGET_PROPERTIES(f16-f32-cvt-eval PROPERTIES
7552 CXX_STANDARD 11
7553 CXX_STANDARD_REQUIRED YES
7554 CXX_EXTENSIONS NO)
7555 TARGET_INCLUDE_DIRECTORIES(f16-f32-cvt-eval PRIVATE include src)
7556 TARGET_LINK_LIBRARIES(f16-f32-cvt-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7557
Marat Dukhan582e1842021-10-25 17:18:36 -0700[diff] [blame]7558 ADD_EXECUTABLE(f32-f16-cvt-eval eval/f32-f16-cvt.cc $<TARGET_OBJECTS:all_microkernels>)
7559 SET_TARGET_PROPERTIES(f32-f16-cvt-eval PROPERTIES
7560 CXX_STANDARD 11
7561 CXX_STANDARD_REQUIRED YES
7562 CXX_EXTENSIONS NO)
7563 TARGET_INCLUDE_DIRECTORIES(f32-f16-cvt-eval PRIVATE include src)
7564 TARGET_LINK_LIBRARIES(f32-f16-cvt-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7565
Marat Dukhand24301d2021-12-02 00:13:45 -0800[diff] [blame]7566 ADD_EXECUTABLE(f32-qs8-cvt-eval eval/f32-qs8-cvt.cc $<TARGET_OBJECTS:all_microkernels>)
7567 SET_TARGET_PROPERTIES(f32-qs8-cvt-eval PROPERTIES
7568 CXX_STANDARD 11
7569 CXX_STANDARD_REQUIRED YES
7570 CXX_EXTENSIONS NO)
7571 TARGET_INCLUDE_DIRECTORIES(f32-qs8-cvt-eval PRIVATE include src)
7572 TARGET_LINK_LIBRARIES(f32-qs8-cvt-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7573
7574 ADD_EXECUTABLE(f32-qu8-cvt-eval eval/f32-qu8-cvt.cc $<TARGET_OBJECTS:all_microkernels>)
7575 SET_TARGET_PROPERTIES(f32-qu8-cvt-eval PROPERTIES
7576 CXX_STANDARD 11
7577 CXX_STANDARD_REQUIRED YES
7578 CXX_EXTENSIONS NO)
7579 TARGET_INCLUDE_DIRECTORIES(f32-qu8-cvt-eval PRIVATE include src)
7580 TARGET_LINK_LIBRARIES(f32-qu8-cvt-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7581
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7582 ADD_EXECUTABLE(f32-exp-eval eval/f32-exp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf7291fc2020-12-15 11:02:50 -0800[diff] [blame]7583 SET_TARGET_PROPERTIES(f32-exp-eval PROPERTIES
7584 CXX_STANDARD 11
7585 CXX_STANDARD_REQUIRED YES
7586 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7587 TARGET_INCLUDE_DIRECTORIES(f32-exp-eval PRIVATE include src)
7588 TARGET_LINK_LIBRARIES(f32-exp-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf7291fc2020-12-15 11:02:50 -0800[diff] [blame]7589
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7590 ADD_EXECUTABLE(f32-expm1minus-eval eval/f32-expm1minus.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7591 SET_TARGET_PROPERTIES(f32-expm1minus-eval PROPERTIES
7592 CXX_STANDARD 11
7593 CXX_STANDARD_REQUIRED YES
7594 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7595 TARGET_INCLUDE_DIRECTORIES(f32-expm1minus-eval PRIVATE include src)
7596 TARGET_LINK_LIBRARIES(f32-expm1minus-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7597
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7598 ADD_EXECUTABLE(f32-expminus-eval eval/f32-expminus.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhand28a5a22020-12-14 15:27:22 -0800[diff] [blame]7599 SET_TARGET_PROPERTIES(f32-expminus-eval PROPERTIES
7600 CXX_STANDARD 11
7601 CXX_STANDARD_REQUIRED YES
7602 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7603 TARGET_INCLUDE_DIRECTORIES(f32-expminus-eval PRIVATE include src)
7604 TARGET_LINK_LIBRARIES(f32-expminus-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhand28a5a22020-12-14 15:27:22 -0800[diff] [blame]7605
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7606 ADD_EXECUTABLE(f32-roundne-eval eval/f32-roundne.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf35d73b2020-05-11 19:15:04 -0700[diff] [blame]7607 SET_TARGET_PROPERTIES(f32-roundne-eval PROPERTIES
7608 CXX_STANDARD 11
7609 CXX_STANDARD_REQUIRED YES
7610 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7611 TARGET_INCLUDE_DIRECTORIES(f32-roundne-eval PRIVATE include src)
7612 TARGET_LINK_LIBRARIES(f32-roundne-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf35d73b2020-05-11 19:15:04 -0700[diff] [blame]7613
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7614 ADD_EXECUTABLE(f32-roundd-eval eval/f32-roundd.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]7615 SET_TARGET_PROPERTIES(f32-roundd-eval PROPERTIES
7616 CXX_STANDARD 11
7617 CXX_STANDARD_REQUIRED YES
7618 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7619 TARGET_INCLUDE_DIRECTORIES(f32-roundd-eval PRIVATE include src)
7620 TARGET_LINK_LIBRARIES(f32-roundd-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]7621
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7622 ADD_EXECUTABLE(f32-roundu-eval eval/f32-roundu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]7623 SET_TARGET_PROPERTIES(f32-roundu-eval PROPERTIES
7624 CXX_STANDARD 11
7625 CXX_STANDARD_REQUIRED YES
7626 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7627 TARGET_INCLUDE_DIRECTORIES(f32-roundu-eval PRIVATE include src)
7628 TARGET_LINK_LIBRARIES(f32-roundu-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]7629
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7630 ADD_EXECUTABLE(f32-roundz-eval eval/f32-roundz.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]7631 SET_TARGET_PROPERTIES(f32-roundz-eval PROPERTIES
7632 CXX_STANDARD 11
7633 CXX_STANDARD_REQUIRED YES
7634 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7635 TARGET_INCLUDE_DIRECTORIES(f32-roundz-eval PRIVATE include src)
7636 TARGET_LINK_LIBRARIES(f32-roundz-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]7637
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]7638 # ---[ Build end-to-end microbenchmarks
Marat Dukhan17e16282019-12-10 12:09:35 -0800[diff] [blame]7639 ADD_LIBRARY(bench-models STATIC
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]7640 models/fp16-mobilenet-v1.cc
7641 models/fp32-mobilenet-v1.cc
Marat Dukhane252f922021-08-31 08:57:41 -0700[diff] [blame]7642 models/qc8-mobilenet-v1.cc
7643 models/qc8-mobilenet-v2.cc
Marat Dukhan0743cdf2020-08-04 18:52:07 -0700[diff] [blame]7644 models/qs8-mobilenet-v1.cc
Marat Dukhan70a96182020-09-03 17:13:58 -0700[diff] [blame]7645 models/qs8-mobilenet-v2.cc
Marat Dukhan12a23bb2021-03-08 08:13:21 -0800[diff] [blame]7646 models/qu8-mobilenet-v1.cc
Marat Dukhan036b2b12021-07-21 01:12:58 -0700[diff] [blame]7647 models/qu8-mobilenet-v2.cc
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]7648 models/fp16-mobilenet-v2.cc
7649 models/fp32-mobilenet-v2.cc
Marat Dukhan66f3ccd2020-09-14 16:09:38 -0700[diff] [blame]7650 models/fp16-mobilenet-v3-large.cc
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]7651 models/fp32-mobilenet-v3-large.cc
Marat Dukhan66f3ccd2020-09-14 16:09:38 -0700[diff] [blame]7652 models/fp16-mobilenet-v3-small.cc
Marat Dukhan4cea2322021-03-09 09:35:36 -0800[diff] [blame]7653 models/fp32-mobilenet-v3-small.cc
7654 models/fp32-sparse-mobilenet-v1.cc
7655 models/fp32-sparse-mobilenet-v2.cc
7656 models/fp32-sparse-mobilenet-v3-large.cc
7657 models/fp32-sparse-mobilenet-v3-small.cc)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]7658 SET_TARGET_PROPERTIES(bench-models PROPERTIES
7659 CXX_STANDARD 11
7660 CXX_STANDARD_REQUIRED YES
7661 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7662 TARGET_INCLUDE_DIRECTORIES(bench-models PRIVATE .)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]7663 TARGET_LINK_LIBRARIES(bench-models PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]7664
7665 ADD_EXECUTABLE(end2end-bench bench/end2end.cc)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7666 SET_TARGET_PROPERTIES(end2end-bench PROPERTIES
7667 CXX_STANDARD 11
7668 CXX_STANDARD_REQUIRED YES
7669 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7670 TARGET_INCLUDE_DIRECTORIES(end2end-bench PRIVATE .)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]7671 TARGET_LINK_LIBRARIES(end2end-bench PRIVATE XNNPACK benchmark bench-models bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7672
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7673 ADD_EXECUTABLE(f32-dwconv-e2e-bench bench/f32-dwconv-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]7674 SET_TARGET_PROPERTIES(f32-dwconv-e2e-bench PROPERTIES
7675 CXX_STANDARD 11
7676 CXX_STANDARD_REQUIRED YES
7677 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7678 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-e2e-bench PRIVATE . src)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]7679 TARGET_LINK_LIBRARIES(f32-dwconv-e2e-bench PRIVATE XNNPACK benchmark bench-models bench-utils)
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]7680
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7681 ADD_EXECUTABLE(f32-gemm-e2e-bench bench/f32-gemm-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan0a5a53f2019-10-31 10:58:31 -0700[diff] [blame]7682 SET_TARGET_PROPERTIES(f32-gemm-e2e-bench PROPERTIES
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]7683 CXX_STANDARD 11
7684 CXX_STANDARD_REQUIRED YES
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]7685 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7686 TARGET_INCLUDE_DIRECTORIES(f32-gemm-e2e-bench PRIVATE . src)
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]7687 TARGET_LINK_LIBRARIES(f32-gemm-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]7688
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7689 ADD_EXECUTABLE(qs8-dwconv-e2e-bench bench/qs8-dwconv-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanbbfc6d32021-07-26 18:31:02 -0700[diff] [blame]7690 SET_TARGET_PROPERTIES(qs8-dwconv-e2e-bench PROPERTIES
7691 CXX_STANDARD 11
7692 CXX_STANDARD_REQUIRED YES
7693 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7694 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-e2e-bench PRIVATE . src)
Marat Dukhanbbfc6d32021-07-26 18:31:02 -0700[diff] [blame]7695 TARGET_LINK_LIBRARIES(qs8-dwconv-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
7696
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7697 ADD_EXECUTABLE(qs8-gemm-e2e-bench bench/qs8-gemm-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barcharddc909cb2021-02-08 13:59:31 -0800[diff] [blame]7698 SET_TARGET_PROPERTIES(qs8-gemm-e2e-bench PROPERTIES
7699 CXX_STANDARD 11
7700 CXX_STANDARD_REQUIRED YES
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]7701 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7702 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-e2e-bench PRIVATE . src)
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]7703 TARGET_LINK_LIBRARIES(qs8-gemm-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
Frank Barcharddc909cb2021-02-08 13:59:31 -0800[diff] [blame]7704
Frank Barchard9098aba2021-08-12 12:20:03 -0700[diff] [blame]7705 ADD_EXECUTABLE(qu8-gemm-e2e-bench bench/qu8-gemm-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
7706 SET_TARGET_PROPERTIES(qu8-gemm-e2e-bench PROPERTIES
7707 CXX_STANDARD 11
7708 CXX_STANDARD_REQUIRED YES
7709 CXX_EXTENSIONS YES)
7710 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-e2e-bench PRIVATE . src)
7711 TARGET_LINK_LIBRARIES(qu8-gemm-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
7712
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7713 ADD_EXECUTABLE(qu8-dwconv-e2e-bench bench/qu8-dwconv-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6084fb82021-07-27 07:45:02 -0700[diff] [blame]7714 SET_TARGET_PROPERTIES(qu8-dwconv-e2e-bench PROPERTIES
7715 CXX_STANDARD 11
7716 CXX_STANDARD_REQUIRED YES
7717 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7718 TARGET_INCLUDE_DIRECTORIES(qu8-dwconv-e2e-bench PRIVATE . src)
Marat Dukhan6084fb82021-07-27 07:45:02 -0700[diff] [blame]7719 TARGET_LINK_LIBRARIES(qu8-dwconv-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
7720
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7721 # ---[ Build operator-level microbenchmarks
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7722 ADD_EXECUTABLE(average-pooling-bench bench/average-pooling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7723 SET_TARGET_PROPERTIES(average-pooling-bench PROPERTIES
7724 CXX_STANDARD 11
7725 CXX_STANDARD_REQUIRED YES
7726 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7727 TARGET_INCLUDE_DIRECTORIES(average-pooling-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7728 TARGET_LINK_LIBRARIES(average-pooling-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7729
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7730 ADD_EXECUTABLE(bankers-rounding-bench bench/bankers-rounding.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7731 SET_TARGET_PROPERTIES(bankers-rounding-bench PROPERTIES
7732 CXX_STANDARD 11
7733 CXX_STANDARD_REQUIRED YES
7734 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7735 TARGET_INCLUDE_DIRECTORIES(bankers-rounding-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7736 TARGET_LINK_LIBRARIES(bankers-rounding-bench PRIVATE XNNPACK benchmark bench-utils)
7737
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7738 ADD_EXECUTABLE(ceiling-bench bench/ceiling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7739 SET_TARGET_PROPERTIES(ceiling-bench PROPERTIES
7740 CXX_STANDARD 11
7741 CXX_STANDARD_REQUIRED YES
7742 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7743 TARGET_INCLUDE_DIRECTORIES(ceiling-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7744 TARGET_LINK_LIBRARIES(ceiling-bench PRIVATE XNNPACK benchmark bench-utils)
7745
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7746 ADD_EXECUTABLE(channel-shuffle-bench bench/channel-shuffle.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7747 SET_TARGET_PROPERTIES(channel-shuffle-bench PROPERTIES
7748 CXX_STANDARD 11
7749 CXX_STANDARD_REQUIRED YES
7750 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7751 TARGET_INCLUDE_DIRECTORIES(channel-shuffle-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7752 TARGET_LINK_LIBRARIES(channel-shuffle-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7753
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7754 ADD_EXECUTABLE(convolution-bench bench/convolution.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7755 SET_TARGET_PROPERTIES(convolution-bench PROPERTIES
7756 CXX_STANDARD 11
7757 CXX_STANDARD_REQUIRED YES
7758 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7759 TARGET_INCLUDE_DIRECTORIES(convolution-bench PRIVATE .)
Frank Barchard49b4dcc2020-06-26 14:07:19 -0700[diff] [blame]7760 TARGET_LINK_LIBRARIES(convolution-bench PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7761
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7762 ADD_EXECUTABLE(deconvolution-bench bench/deconvolution.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7763 SET_TARGET_PROPERTIES(deconvolution-bench PROPERTIES
7764 CXX_STANDARD 11
7765 CXX_STANDARD_REQUIRED YES
7766 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7767 TARGET_INCLUDE_DIRECTORIES(deconvolution-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7768 TARGET_LINK_LIBRARIES(deconvolution-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7769
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7770 ADD_EXECUTABLE(elu-bench bench/elu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -0800[diff] [blame]7771 SET_TARGET_PROPERTIES(elu-bench PROPERTIES
7772 CXX_STANDARD 11
7773 CXX_STANDARD_REQUIRED YES
7774 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7775 TARGET_INCLUDE_DIRECTORIES(elu-bench PRIVATE .)
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -0800[diff] [blame]7776 TARGET_LINK_LIBRARIES(elu-bench PRIVATE XNNPACK benchmark bench-utils)
7777
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7778 ADD_EXECUTABLE(floor-bench bench/floor.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7779 SET_TARGET_PROPERTIES(floor-bench PROPERTIES
7780 CXX_STANDARD 11
7781 CXX_STANDARD_REQUIRED YES
7782 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7783 TARGET_INCLUDE_DIRECTORIES(floor-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7784 TARGET_LINK_LIBRARIES(floor-bench PRIVATE XNNPACK benchmark bench-utils)
7785
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7786 ADD_EXECUTABLE(global-average-pooling-bench bench/global-average-pooling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7787 SET_TARGET_PROPERTIES(global-average-pooling-bench PROPERTIES
7788 CXX_STANDARD 11
7789 CXX_STANDARD_REQUIRED YES
7790 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7791 TARGET_INCLUDE_DIRECTORIES(global-average-pooling-bench PRIVATE .)
Frank Barchard0c849732020-06-12 13:31:32 -0700[diff] [blame]7792 TARGET_LINK_LIBRARIES(global-average-pooling-bench PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7793
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7794 ADD_EXECUTABLE(hardswish-bench bench/hardswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanad352602020-06-25 21:50:54 -0700[diff] [blame]7795 SET_TARGET_PROPERTIES(hardswish-bench PROPERTIES
7796 CXX_STANDARD 11
7797 CXX_STANDARD_REQUIRED YES
7798 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7799 TARGET_INCLUDE_DIRECTORIES(hardswish-bench PRIVATE .)
Marat Dukhanae24dfc2020-09-23 17:12:45 -0700[diff] [blame]7800 TARGET_LINK_LIBRARIES(hardswish-bench PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhanad352602020-06-25 21:50:54 -0700[diff] [blame]7801
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7802 ADD_EXECUTABLE(max-pooling-bench bench/max-pooling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7803 SET_TARGET_PROPERTIES(max-pooling-bench PROPERTIES
7804 CXX_STANDARD 11
7805 CXX_STANDARD_REQUIRED YES
7806 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7807 TARGET_INCLUDE_DIRECTORIES(max-pooling-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7808 TARGET_LINK_LIBRARIES(max-pooling-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7809
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7810 ADD_EXECUTABLE(prelu-bench bench/prelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]7811 SET_TARGET_PROPERTIES(prelu-bench PROPERTIES
7812 CXX_STANDARD 11
7813 CXX_STANDARD_REQUIRED YES
7814 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7815 TARGET_INCLUDE_DIRECTORIES(prelu-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7816 TARGET_LINK_LIBRARIES(prelu-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]7817
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7818 ADD_EXECUTABLE(sigmoid-bench bench/sigmoid.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7819 SET_TARGET_PROPERTIES(sigmoid-bench PROPERTIES
7820 CXX_STANDARD 11
7821 CXX_STANDARD_REQUIRED YES
7822 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7823 TARGET_INCLUDE_DIRECTORIES(sigmoid-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7824 TARGET_LINK_LIBRARIES(sigmoid-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7825
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7826 ADD_EXECUTABLE(softmax-bench bench/softmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]7827 SET_TARGET_PROPERTIES(softmax-bench PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7828 CXX_STANDARD 11
7829 CXX_STANDARD_REQUIRED YES
7830 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7831 TARGET_INCLUDE_DIRECTORIES(softmax-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7832 TARGET_LINK_LIBRARIES(softmax-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7833
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7834 ADD_EXECUTABLE(square-root-bench bench/square-root.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6804bbd2020-06-30 19:26:11 -0700[diff] [blame]7835 SET_TARGET_PROPERTIES(square-root-bench PROPERTIES
7836 CXX_STANDARD 11
7837 CXX_STANDARD_REQUIRED YES
7838 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7839 TARGET_INCLUDE_DIRECTORIES(square-root-bench PRIVATE .)
Marat Dukhan6804bbd2020-06-30 19:26:11 -0700[diff] [blame]7840 TARGET_LINK_LIBRARIES(square-root-bench PRIVATE XNNPACK benchmark bench-utils)
7841
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7842 ADD_EXECUTABLE(truncation-bench bench/truncation.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7843 SET_TARGET_PROPERTIES(truncation-bench PROPERTIES
7844 CXX_STANDARD 11
7845 CXX_STANDARD_REQUIRED YES
7846 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7847 TARGET_INCLUDE_DIRECTORIES(truncation-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7848 TARGET_LINK_LIBRARIES(truncation-bench PRIVATE XNNPACK benchmark bench-utils)
7849
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7850 # ---[ Build microkernel-level microbenchmarks
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7851 ADD_EXECUTABLE(f16-dwconv-bench bench/f16-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7852 SET_TARGET_PROPERTIES(f16-dwconv-bench PROPERTIES
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]7853 CXX_STANDARD 11
7854 CXX_STANDARD_REQUIRED YES
7855 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7856 TARGET_INCLUDE_DIRECTORIES(f16-dwconv-bench PRIVATE . include src)
7857 TARGET_LINK_LIBRARIES(f16-dwconv-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]7858
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7859 ADD_EXECUTABLE(f16-gemm-bench bench/f16-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7860 SET_TARGET_PROPERTIES(f16-gemm-bench PROPERTIES
7861 CXX_STANDARD 11
7862 CXX_STANDARD_REQUIRED YES
7863 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7864 TARGET_INCLUDE_DIRECTORIES(f16-gemm-bench PRIVATE . include src)
7865 TARGET_LINK_LIBRARIES(f16-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7866
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7867 ADD_EXECUTABLE(f16-igemm-bench bench/f16-igemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7868 SET_TARGET_PROPERTIES(f16-igemm-bench PROPERTIES
Frank Barchardc2010062020-07-19 10:04:12 -0700[diff] [blame]7869 CXX_STANDARD 11
7870 CXX_STANDARD_REQUIRED YES
7871 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7872 TARGET_INCLUDE_DIRECTORIES(f16-igemm-bench PRIVATE . include src)
7873 TARGET_LINK_LIBRARIES(f16-igemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7874
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7875 ADD_EXECUTABLE(f16-vrelu-bench bench/f16-vrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7876 SET_TARGET_PROPERTIES(f16-vrelu-bench PROPERTIES
7877 CXX_STANDARD 11
7878 CXX_STANDARD_REQUIRED YES
7879 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7880 TARGET_INCLUDE_DIRECTORIES(f16-vrelu-bench PRIVATE . include src)
7881 TARGET_LINK_LIBRARIES(f16-vrelu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Frank Barchardc2010062020-07-19 10:04:12 -0700[diff] [blame]7882
Marat Dukhan434352f2021-10-16 18:28:55 -0700[diff] [blame]7883 ADD_EXECUTABLE(f16-f32-vcvt-bench bench/f16-f32-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
7884 SET_TARGET_PROPERTIES(f16-f32-vcvt-bench PROPERTIES
7885 CXX_STANDARD 11
7886 CXX_STANDARD_REQUIRED YES
7887 CXX_EXTENSIONS YES)
7888 TARGET_INCLUDE_DIRECTORIES(f16-f32-vcvt-bench PRIVATE . include src)
7889 TARGET_LINK_LIBRARIES(f16-f32-vcvt-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7890
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7891 ADD_EXECUTABLE(f32-conv-hwc-bench bench/f32-conv-hwc.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7892 SET_TARGET_PROPERTIES(f32-conv-hwc-bench PROPERTIES
7893 CXX_STANDARD 11
7894 CXX_STANDARD_REQUIRED YES
7895 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7896 TARGET_INCLUDE_DIRECTORIES(f32-conv-hwc-bench PRIVATE . include src)
7897 TARGET_LINK_LIBRARIES(f32-conv-hwc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7898
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7899 ADD_EXECUTABLE(f32-dwconv-bench bench/f32-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7900 SET_TARGET_PROPERTIES(f32-dwconv-bench PROPERTIES
7901 CXX_STANDARD 11
7902 CXX_STANDARD_REQUIRED YES
7903 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7904 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-bench PRIVATE . include src)
7905 TARGET_LINK_LIBRARIES(f32-dwconv-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7906
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7907 ADD_EXECUTABLE(f32-dwconv2d-chw-bench bench/f32-dwconv2d-chw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanbf715f92020-10-23 20:17:00 -0700[diff] [blame]7908 SET_TARGET_PROPERTIES(f32-dwconv2d-chw-bench PROPERTIES
7909 CXX_STANDARD 11
7910 CXX_STANDARD_REQUIRED YES
7911 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7912 TARGET_INCLUDE_DIRECTORIES(f32-dwconv2d-chw-bench PRIVATE . include src)
7913 TARGET_LINK_LIBRARIES(f32-dwconv2d-chw-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhanbf715f92020-10-23 20:17:00 -0700[diff] [blame]7914
Marat Dukhand77f77d2021-10-24 15:39:59 -0700[diff] [blame]7915 ADD_EXECUTABLE(f32-f16-vcvt-bench bench/f32-f16-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
7916 SET_TARGET_PROPERTIES(f32-f16-vcvt-bench PROPERTIES
7917 CXX_STANDARD 11
7918 CXX_STANDARD_REQUIRED YES
7919 CXX_EXTENSIONS YES)
7920 TARGET_INCLUDE_DIRECTORIES(f32-f16-vcvt-bench PRIVATE . include src)
7921 TARGET_LINK_LIBRARIES(f32-f16-vcvt-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7922
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7923 ADD_EXECUTABLE(f32-gemm-bench bench/f32-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7924 SET_TARGET_PROPERTIES(f32-gemm-bench PROPERTIES
7925 CXX_STANDARD 11
7926 CXX_STANDARD_REQUIRED YES
7927 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7928 TARGET_INCLUDE_DIRECTORIES(f32-gemm-bench PRIVATE . include src)
7929 TARGET_LINK_LIBRARIES(f32-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7930
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7931 ADD_EXECUTABLE(f32-igemm-bench bench/f32-igemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7932 SET_TARGET_PROPERTIES(f32-igemm-bench PROPERTIES
7933 CXX_STANDARD 11
7934 CXX_STANDARD_REQUIRED YES
7935 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7936 TARGET_INCLUDE_DIRECTORIES(f32-igemm-bench PRIVATE . include src)
7937 TARGET_LINK_LIBRARIES(f32-igemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7938
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7939 ADD_EXECUTABLE(f32-im2col-gemm-bench bench/f32-im2col-gemm.cc src/im2col.c $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7940 SET_TARGET_PROPERTIES(f32-im2col-gemm-bench PROPERTIES
7941 C_STANDARD 99
7942 C_STANDARD_REQUIRED YES
7943 C_EXTENSIONS NO
7944 CXX_STANDARD 11
7945 CXX_STANDARD_REQUIRED YES
7946 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7947 TARGET_INCLUDE_DIRECTORIES(f32-im2col-gemm-bench PRIVATE . include src)
7948 TARGET_LINK_LIBRARIES(f32-im2col-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7949
Marat Dukhan563eee12021-12-02 14:44:25 -0800[diff] [blame]7950 ADD_EXECUTABLE(f32-qs8-vcvt-bench bench/f32-qs8-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
7951 SET_TARGET_PROPERTIES(f32-qs8-vcvt-bench PROPERTIES
7952 CXX_STANDARD 11
7953 CXX_STANDARD_REQUIRED YES
7954 CXX_EXTENSIONS YES)
7955 TARGET_INCLUDE_DIRECTORIES(f32-qs8-vcvt-bench PRIVATE . include src)
7956 TARGET_LINK_LIBRARIES(f32-qs8-vcvt-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7957
7958 ADD_EXECUTABLE(f32-qu8-vcvt-bench bench/f32-qu8-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
7959 SET_TARGET_PROPERTIES(f32-qu8-vcvt-bench PROPERTIES
7960 CXX_STANDARD 11
7961 CXX_STANDARD_REQUIRED YES
7962 CXX_EXTENSIONS YES)
7963 TARGET_INCLUDE_DIRECTORIES(f32-qu8-vcvt-bench PRIVATE . include src)
7964 TARGET_LINK_LIBRARIES(f32-qu8-vcvt-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7965
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7966 ADD_EXECUTABLE(f32-rmax-bench bench/f32-rmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7967 SET_TARGET_PROPERTIES(f32-rmax-bench PROPERTIES
7968 CXX_STANDARD 11
7969 CXX_STANDARD_REQUIRED YES
7970 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7971 TARGET_INCLUDE_DIRECTORIES(f32-rmax-bench PRIVATE . include src)
7972 TARGET_LINK_LIBRARIES(f32-rmax-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7973
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7974 ADD_EXECUTABLE(f32-spmm-bench bench/f32-spmm.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7975 SET_TARGET_PROPERTIES(f32-spmm-bench PROPERTIES
7976 CXX_STANDARD 11
7977 CXX_STANDARD_REQUIRED YES
7978 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7979 TARGET_INCLUDE_DIRECTORIES(f32-spmm-bench PRIVATE . include src)
7980 TARGET_LINK_LIBRARIES(f32-spmm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7981
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7982 ADD_EXECUTABLE(f32-softmax-bench bench/f32-softmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]7983 SET_TARGET_PROPERTIES(f32-softmax-bench PROPERTIES
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]7984 CXX_STANDARD 11
7985 CXX_STANDARD_REQUIRED YES
7986 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7987 TARGET_INCLUDE_DIRECTORIES(f32-softmax-bench PRIVATE . include src)
7988 TARGET_LINK_LIBRARIES(f32-softmax-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]7989
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7990 ADD_EXECUTABLE(f32-velu-bench bench/f32-velu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]7991 SET_TARGET_PROPERTIES(f32-velu-bench PROPERTIES
7992 CXX_STANDARD 11
7993 CXX_STANDARD_REQUIRED YES
7994 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7995 TARGET_INCLUDE_DIRECTORIES(f32-velu-bench PRIVATE . include src)
7996 TARGET_LINK_LIBRARIES(f32-velu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]7997
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7998 ADD_EXECUTABLE(f32-vhswish-bench bench/f32-vhswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7999 SET_TARGET_PROPERTIES(f32-vhswish-bench PROPERTIES
8000 CXX_STANDARD 11
8001 CXX_STANDARD_REQUIRED YES
8002 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8003 TARGET_INCLUDE_DIRECTORIES(f32-vhswish-bench PRIVATE . include src)
8004 TARGET_LINK_LIBRARIES(f32-vhswish-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8005
Marat Dukhan7c74aff2021-08-07 15:44:27 -0700[diff] [blame]8006 ADD_EXECUTABLE(f32-vlrelu-bench bench/f32-vlrelu.cc $<TARGET_OBJECTS:all_microkernels>)
8007 SET_TARGET_PROPERTIES(f32-vlrelu-bench PROPERTIES
8008 CXX_STANDARD 11
8009 CXX_STANDARD_REQUIRED YES
8010 CXX_EXTENSIONS YES)
8011 TARGET_INCLUDE_DIRECTORIES(f32-vlrelu-bench PRIVATE . include src)
8012 TARGET_LINK_LIBRARIES(f32-vlrelu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8013
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8014 ADD_EXECUTABLE(f32-vrelu-bench bench/f32-vrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8015 SET_TARGET_PROPERTIES(f32-vrelu-bench PROPERTIES
8016 CXX_STANDARD 11
8017 CXX_STANDARD_REQUIRED YES
8018 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8019 TARGET_INCLUDE_DIRECTORIES(f32-vrelu-bench PRIVATE . include src)
8020 TARGET_LINK_LIBRARIES(f32-vrelu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8021
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8022 ADD_EXECUTABLE(f32-vsigmoid-bench bench/f32-vsigmoid.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8023 SET_TARGET_PROPERTIES(f32-vsigmoid-bench PROPERTIES
8024 CXX_STANDARD 11
8025 CXX_STANDARD_REQUIRED YES
8026 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8027 TARGET_INCLUDE_DIRECTORIES(f32-vsigmoid-bench PRIVATE . include src)
8028 TARGET_LINK_LIBRARIES(f32-vsigmoid-bench PRIVATE benchmark bench-utils fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]8029
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8030 ADD_EXECUTABLE(f32-vsqrt-bench bench/f32-vsqrt.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]8031 SET_TARGET_PROPERTIES(f32-vsqrt-bench PROPERTIES
8032 CXX_STANDARD 11
8033 CXX_STANDARD_REQUIRED YES
8034 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8035 TARGET_INCLUDE_DIRECTORIES(f32-vsqrt-bench PRIVATE . include src)
8036 TARGET_LINK_LIBRARIES(f32-vsqrt-bench PRIVATE benchmark bench-utils fp16 pthreadpool)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]8037
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8038 ADD_EXECUTABLE(qs8-dwconv-bench bench/qs8-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan0744fa02021-07-26 22:56:27 -0700[diff] [blame]8039 SET_TARGET_PROPERTIES(qs8-dwconv-bench PROPERTIES
8040 CXX_STANDARD 11
8041 CXX_STANDARD_REQUIRED YES
8042 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8043 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-bench PRIVATE . include src)
8044 TARGET_LINK_LIBRARIES(qs8-dwconv-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan0744fa02021-07-26 22:56:27 -0700[diff] [blame]8045
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8046 ADD_EXECUTABLE(qs8-gemm-bench bench/qs8-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan595e1702020-07-31 10:12:52 -0700[diff] [blame]8047 SET_TARGET_PROPERTIES(qs8-gemm-bench PROPERTIES
8048 CXX_STANDARD 11
8049 CXX_STANDARD_REQUIRED YES
8050 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8051 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-bench PRIVATE . include src)
8052 TARGET_LINK_LIBRARIES(qs8-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan595e1702020-07-31 10:12:52 -0700[diff] [blame]8053
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8054 ADD_EXECUTABLE(qs8-requantization-bench bench/qs8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan56bdd4a2020-08-03 19:47:04 -0700[diff] [blame]8055 SET_TARGET_PROPERTIES(qs8-requantization-bench PROPERTIES
8056 CXX_STANDARD 11
8057 CXX_STANDARD_REQUIRED YES
8058 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8059 TARGET_INCLUDE_DIRECTORIES(qs8-requantization-bench PRIVATE . include src)
8060 TARGET_LINK_LIBRARIES(qs8-requantization-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan56bdd4a2020-08-03 19:47:04 -0700[diff] [blame]8061
Marat Dukhan83a8d2f2021-07-29 16:41:19 -0700[diff] [blame]8062 ADD_EXECUTABLE(qs8-vadd-bench bench/qs8-vadd.cc $<TARGET_OBJECTS:all_microkernels>)
8063 SET_TARGET_PROPERTIES(qs8-vadd-bench PROPERTIES
8064 CXX_STANDARD 11
8065 CXX_STANDARD_REQUIRED YES
8066 CXX_EXTENSIONS YES)
8067 TARGET_INCLUDE_DIRECTORIES(qs8-vadd-bench PRIVATE . include src)
8068 TARGET_LINK_LIBRARIES(qs8-vadd-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8069
8070 ADD_EXECUTABLE(qs8-vaddc-bench bench/qs8-vaddc.cc $<TARGET_OBJECTS:all_microkernels>)
8071 SET_TARGET_PROPERTIES(qs8-vaddc-bench PROPERTIES
8072 CXX_STANDARD 11
8073 CXX_STANDARD_REQUIRED YES
8074 CXX_EXTENSIONS YES)
8075 TARGET_INCLUDE_DIRECTORIES(qs8-vaddc-bench PRIVATE . include src)
8076 TARGET_LINK_LIBRARIES(qs8-vaddc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8077
Marat Dukhan795e5ab2021-08-02 19:07:52 -0700[diff] [blame]8078 ADD_EXECUTABLE(qs8-vmul-bench bench/qs8-vmul.cc $<TARGET_OBJECTS:all_microkernels>)
8079 SET_TARGET_PROPERTIES(qs8-vmul-bench PROPERTIES
8080 CXX_STANDARD 11
8081 CXX_STANDARD_REQUIRED YES
8082 CXX_EXTENSIONS YES)
8083 TARGET_INCLUDE_DIRECTORIES(qs8-vmul-bench PRIVATE . include src)
8084 TARGET_LINK_LIBRARIES(qs8-vmul-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8085
Marat Dukhan8b024c92021-08-03 00:05:14 -0700[diff] [blame]8086 ADD_EXECUTABLE(qs8-vmulc-bench bench/qs8-vmulc.cc $<TARGET_OBJECTS:all_microkernels>)
8087 SET_TARGET_PROPERTIES(qs8-vmulc-bench PROPERTIES
8088 CXX_STANDARD 11
8089 CXX_STANDARD_REQUIRED YES
8090 CXX_EXTENSIONS YES)
8091 TARGET_INCLUDE_DIRECTORIES(qs8-vmulc-bench PRIVATE . include src)
8092 TARGET_LINK_LIBRARIES(qs8-vmulc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8093
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8094 ADD_EXECUTABLE(qu8-gemm-bench bench/qu8-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]8095 SET_TARGET_PROPERTIES(qu8-gemm-bench PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8096 CXX_STANDARD 11
8097 CXX_STANDARD_REQUIRED YES
8098 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8099 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-bench PRIVATE . include src)
8100 TARGET_LINK_LIBRARIES(qu8-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]8101
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8102 ADD_EXECUTABLE(qu8-requantization-bench bench/qu8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]8103 SET_TARGET_PROPERTIES(qu8-requantization-bench PROPERTIES
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]8104 CXX_STANDARD 11
8105 CXX_STANDARD_REQUIRED YES
8106 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8107 TARGET_INCLUDE_DIRECTORIES(qu8-requantization-bench PRIVATE . include src)
8108 TARGET_LINK_LIBRARIES(qu8-requantization-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]8109
Marat Dukhan1ef9de82021-07-29 17:15:33 -0700[diff] [blame]8110 ADD_EXECUTABLE(qu8-vadd-bench bench/qu8-vadd.cc $<TARGET_OBJECTS:all_microkernels>)
8111 SET_TARGET_PROPERTIES(qu8-vadd-bench PROPERTIES
8112 CXX_STANDARD 11
8113 CXX_STANDARD_REQUIRED YES
8114 CXX_EXTENSIONS YES)
8115 TARGET_INCLUDE_DIRECTORIES(qu8-vadd-bench PRIVATE . include src)
8116 TARGET_LINK_LIBRARIES(qu8-vadd-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8117
8118 ADD_EXECUTABLE(qu8-vaddc-bench bench/qu8-vaddc.cc $<TARGET_OBJECTS:all_microkernels>)
8119 SET_TARGET_PROPERTIES(qu8-vaddc-bench PROPERTIES
8120 CXX_STANDARD 11
8121 CXX_STANDARD_REQUIRED YES
8122 CXX_EXTENSIONS YES)
8123 TARGET_INCLUDE_DIRECTORIES(qu8-vaddc-bench PRIVATE . include src)
8124 TARGET_LINK_LIBRARIES(qu8-vaddc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8125
Marat Dukhan795e5ab2021-08-02 19:07:52 -0700[diff] [blame]8126 ADD_EXECUTABLE(qu8-vmul-bench bench/qu8-vmul.cc $<TARGET_OBJECTS:all_microkernels>)
8127 SET_TARGET_PROPERTIES(qu8-vmul-bench PROPERTIES
8128 CXX_STANDARD 11
8129 CXX_STANDARD_REQUIRED YES
8130 CXX_EXTENSIONS YES)
8131 TARGET_INCLUDE_DIRECTORIES(qu8-vmul-bench PRIVATE . include src)
8132 TARGET_LINK_LIBRARIES(qu8-vmul-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8133
Marat Dukhan8b024c92021-08-03 00:05:14 -0700[diff] [blame]8134 ADD_EXECUTABLE(qu8-vmulc-bench bench/qu8-vmulc.cc $<TARGET_OBJECTS:all_microkernels>)
8135 SET_TARGET_PROPERTIES(qu8-vmulc-bench PROPERTIES
8136 CXX_STANDARD 11
8137 CXX_STANDARD_REQUIRED YES
8138 CXX_EXTENSIONS YES)
8139 TARGET_INCLUDE_DIRECTORIES(qu8-vmulc-bench PRIVATE . include src)
8140 TARGET_LINK_LIBRARIES(qu8-vmulc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
8141
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8142 ADD_EXECUTABLE(rounding-bench bench/rounding.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]8143 SET_TARGET_PROPERTIES(rounding-bench PROPERTIES
8144 CXX_STANDARD 11
8145 CXX_STANDARD_REQUIRED YES
8146 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]8147 TARGET_INCLUDE_DIRECTORIES(rounding-bench PRIVATE . include src)
8148 TARGET_LINK_LIBRARIES(rounding-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan54074372021-09-08 23:28:46 -0700[diff] [blame]8149
8150 ADD_EXECUTABLE(x8-lut-bench bench/x8-lut.cc $<TARGET_OBJECTS:all_microkernels>)
8151 SET_TARGET_PROPERTIES(x8-lut-bench PROPERTIES
8152 CXX_STANDARD 11
8153 CXX_STANDARD_REQUIRED YES
8154 CXX_EXTENSIONS YES)
8155 TARGET_INCLUDE_DIRECTORIES(x8-lut-bench PRIVATE . include src)
8156 TARGET_LINK_LIBRARIES(x8-lut-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]8157ENDIF()