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gerrit-public.fairphone.software / platform / external / XNNPACK / c9f9d67435a5a31543a76f62387429a86f23198a / . / CMakeLists.txt
blob: cb61805b8a28e075b129eee05bc5055c2cf3a108 [file] [log] [blame]
Frank Barcharda49e41f2021-08-31 20:30:24 -0700[diff] [blame]1
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2# Copyright (c) Facebook, Inc. and its affiliates.
3# All rights reserved.
4#
5# Copyright 2019 Google LLC
6#
7# This source code is licensed under the BSD-style license found in the
8# LICENSE file in the root directory of this source tree.
9
10CMAKE_MINIMUM_REQUIRED(VERSION 3.5 FATAL_ERROR)
11
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]12# ---[ Project and semantic versioning.
13PROJECT(XNNPACK C CXX ASM)
14
15# ---[ Options.
16SET(XNNPACK_LIBRARY_TYPE "default" CACHE STRING "Type of library (shared, static, or default) to build")
17SET_PROPERTY(CACHE XNNPACK_LIBRARY_TYPE PROPERTY STRINGS default static shared)
Marat Dukhanefc184a2020-02-13 09:47:01 -0800[diff] [blame]18OPTION(XNNPACK_ENABLE_ASSEMBLY "Build XNNPACK with assembly micro-kernels" ON)
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]19OPTION(XNNPACK_ENABLE_MEMOPT "Build XNNPACK with optimized memory allocation scheme" ON)
Marat Dukhanb36582b2020-12-08 11:16:28 -0800[diff] [blame]20OPTION(XNNPACK_ENABLE_SPARSE "Build XNNPACK with graph rewriting for sparse inference" ON)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]21OPTION(XNNPACK_BUILD_TESTS "Build XNNPACK unit tests" ON)
22OPTION(XNNPACK_BUILD_BENCHMARKS "Build XNNPACK benchmarks" ON)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]23OPTION(XNNPACK_USE_SYSTEM_LIBS "Use system-provided dependency libraries" OFF)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]24
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]25# --- [ Determine target processor
26SET(XNNPACK_TARGET_PROCESSOR "${CMAKE_SYSTEM_PROCESSOR}")
Chester Liu25bab072020-12-24 17:07:10 +0800[diff] [blame]27IF(CMAKE_SYSTEM_NAME STREQUAL "Darwin" AND CMAKE_OSX_ARCHITECTURES MATCHES "^(x86_64|arm64|arm64e)$")
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]28 SET(XNNPACK_TARGET_PROCESSOR "${CMAKE_OSX_ARCHITECTURES}")
29ENDIF()
30
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]31# ---[ CMake options
Marat Dukhanbcbae1e2020-04-13 10:54:18 -0700[diff] [blame]32INCLUDE(GNUInstallDirs)
33
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]34IF(XNNPACK_BUILD_TESTS)
35 ENABLE_TESTING()
36ENDIF()
37
Marat Dukhanefc184a2020-02-13 09:47:01 -0800[diff] [blame]38IF(XNNPACK_ENABLE_ASSEMBLY)
39 ADD_DEFINITIONS(-DXNN_ENABLE_ASSEMBLY=1)
40ELSE()
41 ADD_DEFINITIONS(-DXNN_ENABLE_ASSEMBLY=0)
42ENDIF()
43
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]44IF(XNNPACK_ENABLE_MEMOPT)
45 ADD_DEFINITIONS(-DXNN_ENABLE_MEMOPT=1)
46ELSE()
47 ADD_DEFINITIONS(-DXNN_ENABLE_MEMOPT=0)
48ENDIF()
49
Marat Dukhanb36582b2020-12-08 11:16:28 -0800[diff] [blame]50IF(XNNPACK_ENABLE_SPARSE)
51 ADD_DEFINITIONS(-DXNN_ENABLE_SPARSE=1)
52ELSE()
53 ADD_DEFINITIONS(-DXNN_ENABLE_SPARSE=0)
54ENDIF()
55
Marat Dukhan8a9be592020-05-09 21:49:19 -0700[diff] [blame]56IF(CMAKE_C_COMPILER_ID STREQUAL "MSVC")
Marat Dukhan1b555e02020-04-14 22:40:29 -0700[diff] [blame]57 # Disable "unary minus operator applied to unsigned type, result still unsigned" warning
58 ADD_COMPILE_OPTIONS("/wd4146")
59ENDIF()
60
Marat Dukhan8a9be592020-05-09 21:49:19 -0700[diff] [blame]61IF(CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
62 # Disable "note: parameter passing for argument of type ... changed/will change in ..."
63 ADD_COMPILE_OPTIONS("-Wno-psabi")
64ENDIF()
65
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]66# ---[ Build flags
67IF(NOT CMAKE_SYSTEM_PROCESSOR)
68 IF(IOS)
69 LIST(LENGTH IOS_ARCH IOS_ARCH_COUNT)
70 IF(IOS_ARCH_COUNT GREATER 1)
71 MESSAGE(FATAL_ERROR "Unsupported XNNPACK build with multiple iOS architectures (${IOS_ARCH}). "
72 "Specify a single architecture in IOS_ARCH and re-configure. ")
73 ENDIF()
Yasuhiro Matsumoto462be052020-02-29 13:41:14 +0900[diff] [blame]74 IF(NOT IOS_ARCH MATCHES "^(i386|x86_64|AMD64|armv7.*|arm64.*)$")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]75 MESSAGE(FATAL_ERROR "Unrecognized IOS_ARCH = ${IOS_ARCH}")
76 ENDIF()
77 ELSE()
78 MESSAGE(FATAL_ERROR "CMAKE_SYSTEM_PROCESSOR is not defined")
79 ENDIF()
Marat Dukhane3cb19b2021-05-07 03:38:49 -0700[diff] [blame]80ELSEIF(NOT XNNPACK_TARGET_PROCESSOR MATCHES "^(i[3-6]86|x86|x86_64|AMD64|armv[5-8].*|aarch64|arm64.*|riscv(32|64|128))$")
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]81 MESSAGE(FATAL_ERROR "Unrecognized XNNPACK_TARGET_PROCESSOR = ${XNNPACK_TARGET_PROCESSOR}")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]82ENDIF()
83
84IF(NOT CMAKE_SYSTEM_NAME)
85 MESSAGE(FATAL_ERROR "CMAKE_SYSTEM_NAME not defined")
Marat Dukhan78583c72020-04-26 22:00:43 -0700[diff] [blame]86ELSEIF(NOT CMAKE_SYSTEM_NAME MATCHES "^(Darwin|Linux|Android|Windows|CYGWIN|MSYS)$")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]87 MESSAGE(FATAL_ERROR "Unrecognized CMAKE_SYSTEM_NAME = ${CMAKE_SYSTEM_NAME}")
88ENDIF()
89
90# ---[ Download deps
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]91IF(NOT XNNPACK_USE_SYSTEM_LIBS)
92 IF(NOT DEFINED CLOG_SOURCE_DIR)
93 MESSAGE(STATUS "Downloading clog to ${CMAKE_BINARY_DIR}/clog-source (define CLOG_SOURCE_DIR to avoid it)")
94 CONFIGURE_FILE(cmake/DownloadCLog.cmake "${CMAKE_BINARY_DIR}/clog-download/CMakeLists.txt")
95 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
96 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/clog-download")
97 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
98 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/clog-download")
99 SET(CLOG_SOURCE_DIR "${CMAKE_BINARY_DIR}/clog-source" CACHE STRING "clog source directory")
100 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]101
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]102 IF(NOT DEFINED CPUINFO_SOURCE_DIR)
103 MESSAGE(STATUS "Downloading cpuinfo to ${CMAKE_BINARY_DIR}/cpuinfo-source (define CPUINFO_SOURCE_DIR to avoid it)")
104 CONFIGURE_FILE(cmake/DownloadCpuinfo.cmake "${CMAKE_BINARY_DIR}/cpuinfo-download/CMakeLists.txt")
105 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
106 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/cpuinfo-download")
107 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
108 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/cpuinfo-download")
109 SET(CPUINFO_SOURCE_DIR "${CMAKE_BINARY_DIR}/cpuinfo-source" CACHE STRING "cpuinfo source directory")
110 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]111
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]112 IF(NOT DEFINED FP16_SOURCE_DIR)
113 MESSAGE(STATUS "Downloading FP16 to ${CMAKE_BINARY_DIR}/FP16-source (define FP16_SOURCE_DIR to avoid it)")
114 CONFIGURE_FILE(cmake/DownloadFP16.cmake "${CMAKE_BINARY_DIR}/FP16-download/CMakeLists.txt")
115 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
116 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FP16-download")
117 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
118 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FP16-download")
119 SET(FP16_SOURCE_DIR "${CMAKE_BINARY_DIR}/FP16-source" CACHE STRING "FP16 source directory")
120 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]121
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]122 IF(NOT DEFINED FXDIV_SOURCE_DIR)
123 MESSAGE(STATUS "Downloading FXdiv to ${CMAKE_BINARY_DIR}/FXdiv-source (define FXDIV_SOURCE_DIR to avoid it)")
124 CONFIGURE_FILE(cmake/DownloadFXdiv.cmake "${CMAKE_BINARY_DIR}/FXdiv-download/CMakeLists.txt")
125 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
126 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FXdiv-download")
127 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
128 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/FXdiv-download")
129 SET(FXDIV_SOURCE_DIR "${CMAKE_BINARY_DIR}/FXdiv-source" CACHE STRING "FXdiv source directory")
130 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]131
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]132 IF(NOT DEFINED PTHREADPOOL_SOURCE_DIR)
133 MESSAGE(STATUS "Downloading pthreadpool to ${CMAKE_BINARY_DIR}/pthreadpool-source (define PTHREADPOOL_SOURCE_DIR to avoid it)")
134 CONFIGURE_FILE(cmake/DownloadPThreadPool.cmake "${CMAKE_BINARY_DIR}/pthreadpool-download/CMakeLists.txt")
135 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
136 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/pthreadpool-download")
137 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
138 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/pthreadpool-download")
139 SET(PTHREADPOOL_SOURCE_DIR "${CMAKE_BINARY_DIR}/pthreadpool-source" CACHE STRING "pthreadpool source directory")
140 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]141
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]142 IF(XNNPACK_BUILD_TESTS AND NOT DEFINED GOOGLETEST_SOURCE_DIR)
143 MESSAGE(STATUS "Downloading Google Test to ${CMAKE_BINARY_DIR}/googletest-source (define GOOGLETEST_SOURCE_DIR to avoid it)")
144 CONFIGURE_FILE(cmake/DownloadGoogleTest.cmake "${CMAKE_BINARY_DIR}/googletest-download/CMakeLists.txt")
145 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
146 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googletest-download")
147 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
148 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googletest-download")
149 SET(GOOGLETEST_SOURCE_DIR "${CMAKE_BINARY_DIR}/googletest-source" CACHE STRING "Google Test source directory")
150 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]151
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]152 IF(XNNPACK_BUILD_BENCHMARKS AND NOT DEFINED GOOGLEBENCHMARK_SOURCE_DIR)
153 MESSAGE(STATUS "Downloading Google Benchmark to ${CMAKE_BINARY_DIR}/googlebenchmark-source (define GOOGLEBENCHMARK_SOURCE_DIR to avoid it)")
154 CONFIGURE_FILE(cmake/DownloadGoogleBenchmark.cmake "${CMAKE_BINARY_DIR}/googlebenchmark-download/CMakeLists.txt")
155 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" -G "${CMAKE_GENERATOR}" .
156 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googlebenchmark-download")
157 EXECUTE_PROCESS(COMMAND "${CMAKE_COMMAND}" --build .
158 WORKING_DIRECTORY "${CMAKE_BINARY_DIR}/googlebenchmark-download")
159 SET(GOOGLEBENCHMARK_SOURCE_DIR "${CMAKE_BINARY_DIR}/googlebenchmark-source" CACHE STRING "Google Benchmark source directory")
160 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]161ENDIF()
162
163# ---[ XNNPACK library
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]164SET(OPERATOR_SRCS
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]165 src/operators/argmax-pooling-nhwc.c
166 src/operators/average-pooling-nhwc.c
167 src/operators/binary-elementwise-nd.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]168 src/operators/channel-shuffle-nc.c
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]169 src/operators/constant-pad-nd.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]170 src/operators/convolution-nchw.c
171 src/operators/convolution-nhwc.c
172 src/operators/deconvolution-nhwc.c
Marat Dukhan13b68f22020-11-12 11:55:19 -0800[diff] [blame]173 src/operators/depth-to-space-nchw2nhwc.c
Marat Dukhan0e521172020-11-25 13:10:04 -0800[diff] [blame]174 src/operators/depth-to-space-nhwc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]175 src/operators/fully-connected-nc.c
176 src/operators/global-average-pooling-ncw.c
177 src/operators/global-average-pooling-nwc.c
Marat Dukhanf6c991e2021-09-09 01:10:40 -0700[diff] [blame]178 src/operators/lut-elementwise-nc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]179 src/operators/max-pooling-nhwc.c
180 src/operators/prelu-nc.c
Artsiom Ablavatski97918102020-10-27 15:52:59 -0700[diff] [blame]181 src/operators/resize-bilinear-nchw.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]182 src/operators/resize-bilinear-nhwc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]183 src/operators/softmax-nc.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]184 src/operators/unary-elementwise-nc.c
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]185 src/operators/unpooling-nhwc.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]186
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]187SET(SUBGRAPH_SRCS
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]188 src/subgraph/abs.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]189 src/subgraph/add2.c
190 src/subgraph/argmax-pooling-2d.c
191 src/subgraph/average-pooling-2d.c
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]192 src/subgraph/bankers-rounding.c
Im Sunghoonea2088b2020-06-15 03:17:07 +0900[diff] [blame]193 src/subgraph/ceiling.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]194 src/subgraph/clamp.c
195 src/subgraph/convolution-2d.c
196 src/subgraph/deconvolution-2d.c
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -0800[diff] [blame]197 src/subgraph/depth-to-space.c
Frank Barchard9cef5ea2020-11-18 14:52:08 -0800[diff] [blame]198 src/subgraph/depthwise-convolution-2d.c
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]199 src/subgraph/divide.c
Marat Dukhana1600202020-12-01 22:17:16 -0800[diff] [blame]200 src/subgraph/elu.c
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]201 src/subgraph/floor.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]202 src/subgraph/fully-connected.c
Marat Dukhana059b7d2020-06-11 11:41:27 -0700[diff] [blame]203 src/subgraph/global-average-pooling-2d.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]204 src/subgraph/hardswish.c
Marat Dukhan5bbebac2020-06-10 19:42:15 -0700[diff] [blame]205 src/subgraph/leaky-relu.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]206 src/subgraph/max-pooling-2d.c
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]207 src/subgraph/maximum2.c
208 src/subgraph/minimum2.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]209 src/subgraph/multiply2.c
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]210 src/subgraph/negate.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]211 src/subgraph/prelu.c
212 src/subgraph/sigmoid.c
213 src/subgraph/softmax.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]214 src/subgraph/square-root.c
215 src/subgraph/square.c
216 src/subgraph/squared-difference.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]217 src/subgraph/static-constant-pad.c
Marat Dukhand27202d2020-07-09 23:43:40 -0700[diff] [blame]218 src/subgraph/static-reshape.c
Marat Dukhanaff24e22020-07-23 01:43:58 -0700[diff] [blame]219 src/subgraph/static-resize-bilinear-2d.c
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]220 src/subgraph/subtract.c
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]221 src/subgraph/unpooling-2d.c)
222
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]223SET(LOGGING_SRCS
Marat Dukhanccd3a1d2021-03-29 16:03:12 -0700[diff] [blame]224 src/datatype-strings.c
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]225 src/operator-strings.c
226 src/subgraph-strings.c)
227
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]228SET(COLD_SRCS ${OPERATOR_SRCS} ${SUBGRAPH_SRCS} ${LOGGING_SRCS})
229LIST(APPEND COLD_SRCS
Marat Dukhan496389f2021-04-07 15:47:12 -0700[diff] [blame]230 src/allocator.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]231 src/init.c
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]232 src/memory-planner.c
Marat Dukhan98ca6352020-02-03 12:53:02 -0800[diff] [blame]233 src/operator-delete.c
234 src/runtime.c
235 src/subgraph.c
236 src/tensor.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]237
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]238SET(HOT_SRCS
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]239 src/indirection.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]240 src/operator-run.c
241 src/packing.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]242
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]243SET(TABLE_SRCS
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]244 src/tables/exp2-k-over-64.c
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700[diff] [blame]245 src/tables/exp2-k-over-2048.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]246 src/tables/exp2minus-k-over-4.c
247 src/tables/exp2minus-k-over-8.c
Marat Dukhan79fd7302020-11-28 22:24:06 -0800[diff] [blame]248 src/tables/exp2minus-k-over-16.c
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700[diff] [blame]249 src/tables/exp2minus-k-over-64.c
250 src/tables/exp2minus-k-over-2048.c)
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]251
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]252SET(PROD_SCALAR_MICROKERNEL_SRCS
253 src/f32-argmaxpool/4x-scalar-c1.c
254 src/f32-argmaxpool/9p8x-scalar-c1.c
255 src/f32-argmaxpool/9x-scalar-c1.c
256 src/f32-avgpool/9p8x-minmax-scalar-c1.c
257 src/f32-avgpool/9x-minmax-scalar-c1.c
258 src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c
259 src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c
260 src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c
261 src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c
262 src/f32-dwconv/gen/up1x4-scalar-acc2.c
263 src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c
264 src/f32-dwconv/gen/up1x9-scalar-acc2.c
265 src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c
266 src/f32-dwconv/gen/up1x25-scalar-acc2.c
267 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c
268 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c
269 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c
270 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c
271 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c
272 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c
273 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c
274 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c
275 src/f32-gavgpool-cw/scalar-x1.c
276 src/f32-gavgpool/7p7x-minmax-scalar-c1.c
277 src/f32-gavgpool/7x-minmax-scalar-c1.c
278 src/f32-gemm/gen/1x4-minmax-scalar.c
279 src/f32-gemm/gen/1x4-relu-scalar.c
280 src/f32-gemm/gen/1x4-scalar.c
281 src/f32-gemm/gen/2x4-minmax-scalar.c
282 src/f32-gemm/gen/2x4-relu-scalar.c
283 src/f32-gemm/gen/2x4-scalar.c
284 src/f32-gemm/gen/4x2-minmax-scalar.c
285 src/f32-gemm/gen/4x2-relu-scalar.c
286 src/f32-gemm/gen/4x2-scalar.c
287 src/f32-gemm/gen/4x4-minmax-scalar.c
288 src/f32-gemm/gen/4x4-relu-scalar.c
289 src/f32-gemm/gen/4x4-scalar.c
290 src/f32-ibilinear-chw/gen/scalar-p4.c
291 src/f32-ibilinear/gen/scalar-c2.c
292 src/f32-igemm/gen/1x4-minmax-scalar.c
293 src/f32-igemm/gen/1x4-relu-scalar.c
294 src/f32-igemm/gen/1x4-scalar.c
295 src/f32-igemm/gen/2x4-minmax-scalar.c
296 src/f32-igemm/gen/2x4-relu-scalar.c
297 src/f32-igemm/gen/2x4-scalar.c
298 src/f32-igemm/gen/4x2-minmax-scalar.c
299 src/f32-igemm/gen/4x2-relu-scalar.c
300 src/f32-igemm/gen/4x2-scalar.c
301 src/f32-igemm/gen/4x4-minmax-scalar.c
302 src/f32-igemm/gen/4x4-relu-scalar.c
303 src/f32-igemm/gen/4x4-scalar.c
304 src/f32-maxpool/9p8x-minmax-scalar-c1.c
305 src/f32-pavgpool/9p8x-minmax-scalar-c1.c
306 src/f32-pavgpool/9x-minmax-scalar-c1.c
307 src/f32-prelu/gen/scalar-2x4.c
308 src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c
309 src/f32-rmax/scalar.c
310 src/f32-spmm/gen/8x1-minmax-scalar.c
311 src/f32-spmm/gen/8x2-minmax-scalar.c
312 src/f32-spmm/gen/8x4-minmax-scalar.c
313 src/f32-vbinary/gen/vadd-minmax-scalar-x8.c
314 src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c
315 src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c
316 src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c
317 src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c
318 src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c
319 src/f32-vbinary/gen/vmax-scalar-x8.c
320 src/f32-vbinary/gen/vmaxc-scalar-x8.c
321 src/f32-vbinary/gen/vmin-scalar-x8.c
322 src/f32-vbinary/gen/vminc-scalar-x8.c
323 src/f32-vbinary/gen/vmul-minmax-scalar-x8.c
324 src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c
325 src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c
326 src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c
327 src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c
328 src/f32-vbinary/gen/vsqrdiff-scalar-x8.c
329 src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c
330 src/f32-vbinary/gen/vsub-minmax-scalar-x8.c
331 src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c
332 src/f32-vclamp/gen/vclamp-scalar-x4.c
333 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c
334 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c
335 src/f32-vhswish/gen/vhswish-scalar-x4.c
336 src/f32-vlrelu/gen/vlrelu-scalar-x4.c
337 src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c
338 src/f32-vrelu/gen/vrelu-scalar-x8.c
339 src/f32-vrnd/gen/vrndd-scalar-libm-x1.c
340 src/f32-vrnd/gen/vrndd-scalar-libm-x4.c
341 src/f32-vrnd/gen/vrndne-scalar-libm-x1.c
342 src/f32-vrnd/gen/vrndne-scalar-libm-x4.c
343 src/f32-vrnd/gen/vrndu-scalar-libm-x1.c
344 src/f32-vrnd/gen/vrndu-scalar-libm-x4.c
345 src/f32-vrnd/gen/vrndz-scalar-libm-x1.c
346 src/f32-vrnd/gen/vrndz-scalar-libm-x4.c
347 src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c
348 src/f32-vsqrt/gen/scalar-sqrt-x1.c
349 src/f32-vunary/gen/vabs-scalar-x4.c
350 src/f32-vunary/gen/vneg-scalar-x4.c
351 src/f32-vunary/gen/vsqr-scalar-x4.c
352 src/params-init.c
353 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
354 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
355 src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
356 src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
357 src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
358 src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
359 src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
360 src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
361 src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
362 src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan66a3ca12021-08-06 18:24:19 -0700[diff] [blame]363 src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
364 src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]365 src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
366 src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
367 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c
368 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c
369 src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c
370 src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c
371 src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
372 src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
373 src/qs8-gemm/gen/1x4-minmax-rndnu-scalar.c
374 src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
375 src/qs8-gemm/gen/3x4-minmax-rndnu-scalar.c
376 src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
377 src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
378 src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
379 src/qs8-igemm/gen/1x4-minmax-rndnu-scalar.c
380 src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
381 src/qs8-igemm/gen/3x4-minmax-rndnu-scalar.c
382 src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan66a3ca12021-08-06 18:24:19 -0700[diff] [blame]383 src/qs8-vadd/gen/minmax-scalar-x1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]384 src/qs8-vadd/gen/minmax-scalar-x4.c
Marat Dukhan66a3ca12021-08-06 18:24:19 -0700[diff] [blame]385 src/qs8-vaddc/gen/minmax-scalar-x1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]386 src/qs8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]387 src/qs8-vmul/gen/minmax-fp32-scalar-x4.c
388 src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]389 src/qu8-avgpool/9p8x-minmax-scalar-c1.c
390 src/qu8-avgpool/9x-minmax-scalar-c1.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]391 src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]392 src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]393 src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]394 src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
395 src/qu8-gavgpool/7p7x-minmax-scalar-c1.c
396 src/qu8-gavgpool/7x-minmax-scalar-c1.c
397 src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
398 src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
399 src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
400 src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
401 src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
402 src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
403 src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
404 src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
405 src/qu8-vadd/gen/minmax-scalar-x1.c
406 src/qu8-vadd/gen/minmax-scalar-x4.c
407 src/qu8-vaddc/gen/minmax-scalar-x1.c
408 src/qu8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]409 src/qu8-vmul/gen/minmax-fp32-scalar-x4.c
410 src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]411 src/s8-maxpool/9p8x-minmax-scalar-c1.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]412 src/s8-vclamp/scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]413 src/u8-lut32norm/scalar.c
414 src/u8-maxpool/9p8x-minmax-scalar-c1.c
415 src/u8-rmax/scalar.c
416 src/u8-vclamp/scalar-x4.c
Marat Dukhan548542c2021-09-09 14:15:51 -0700[diff] [blame]417 src/x8-lut/gen/lut-scalar-x4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]418 src/x8-zip/x2-scalar.c
419 src/x8-zip/x3-scalar.c
420 src/x8-zip/x4-scalar.c
421 src/x8-zip/xm-scalar.c
422 src/x32-depthtospace2d-chw2hwc/scalar.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]423 src/x32-packx/x2-scalar.c
424 src/x32-packx/x3-scalar.c
425 src/x32-packx/x4-scalar.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]426 src/x32-unpool/scalar.c
427 src/x32-zip/x2-scalar.c
428 src/x32-zip/x3-scalar.c
429 src/x32-zip/x4-scalar.c
430 src/x32-zip/xm-scalar.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]431 src/xx-copy/memcpy.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]432 src/xx-fill/scalar-x16.c
433 src/xx-pad/scalar.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]434
435SET(ALL_SCALAR_MICROKERNEL_SRCS
Marat Dukhane2c00012021-10-17 22:02:35 -0700[diff] [blame]436 src/f16-f32-vcvt/gen/vcvt-scalar-float-x1.c
437 src/f16-f32-vcvt/gen/vcvt-scalar-float-x2.c
438 src/f16-f32-vcvt/gen/vcvt-scalar-float-x3.c
439 src/f16-f32-vcvt/gen/vcvt-scalar-float-x4.c
Ashkan Aliabadif866a452019-11-20 10:58:51 -0800[diff] [blame]440 src/f32-argmaxpool/4x-scalar-c1.c
441 src/f32-argmaxpool/9p8x-scalar-c1.c
442 src/f32-argmaxpool/9x-scalar-c1.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]443 src/f32-avgpool/9p8x-minmax-scalar-c1.c
444 src/f32-avgpool/9x-minmax-scalar-c1.c
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]445 src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]446 src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]447 src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]448 src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]449 src/f32-dwconv/gen/up1x4-minmax-scalar.c
450 src/f32-dwconv/gen/up1x4-scalar-acc2.c
451 src/f32-dwconv/gen/up1x4-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]452 src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]453 src/f32-dwconv/gen/up1x9-minmax-scalar.c
454 src/f32-dwconv/gen/up1x9-scalar-acc2.c
455 src/f32-dwconv/gen/up1x9-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]456 src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]457 src/f32-dwconv/gen/up1x25-minmax-scalar.c
458 src/f32-dwconv/gen/up1x25-scalar-acc2.c
459 src/f32-dwconv/gen/up1x25-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]460 src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]461 src/f32-dwconv/gen/up2x4-minmax-scalar.c
462 src/f32-dwconv/gen/up2x4-scalar-acc2.c
463 src/f32-dwconv/gen/up2x4-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]464 src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]465 src/f32-dwconv/gen/up2x9-minmax-scalar.c
466 src/f32-dwconv/gen/up2x9-scalar-acc2.c
467 src/f32-dwconv/gen/up2x9-scalar.c
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]468 src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]469 src/f32-dwconv/gen/up2x25-minmax-scalar.c
470 src/f32-dwconv/gen/up2x25-scalar-acc2.c
471 src/f32-dwconv/gen/up2x25-scalar.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]472 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c
473 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c
474 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c
Marat Dukhan91249d22020-10-24 12:02:51 -0700[diff] [blame]475 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]476 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c
Marat Dukhan91249d22020-10-24 12:02:51 -0700[diff] [blame]477 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c
478 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c
479 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c
480 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c
481 src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700[diff] [blame]482 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c
483 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c
484 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]485 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700[diff] [blame]486 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]487 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c
488 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c
489 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c
Marat Dukhanc4efb002020-10-25 23:14:47 -0700[diff] [blame]490 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c
491 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c
492 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c
493 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]494 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c
Marat Dukhanc4efb002020-10-25 23:14:47 -0700[diff] [blame]495 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c
496 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]497 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c
Marat Dukhanc4efb002020-10-25 23:14:47 -0700[diff] [blame]498 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]499 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c
Marat Dukhan29c0c332020-10-28 22:11:00 -0700[diff] [blame]500 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c
501 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c
502 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c
503 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c
504 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c
505 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c
506 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c
507 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c
508 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c
509 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]510 src/f32-gavgpool-cw/scalar-x1.c
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]511 src/f32-gavgpool/7p7x-minmax-scalar-c1.c
512 src/f32-gavgpool/7x-minmax-scalar-c1.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]513 src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c
514 src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c
515 src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]516 src/f32-gemm/gen/1x4-minmax-scalar.c
517 src/f32-gemm/gen/1x4-relu-scalar.c
518 src/f32-gemm/gen/1x4-scalar.c
519 src/f32-gemm/gen/2x4-minmax-scalar.c
520 src/f32-gemm/gen/2x4-relu-scalar.c
521 src/f32-gemm/gen/2x4-scalar.c
522 src/f32-gemm/gen/4x2-minmax-scalar.c
523 src/f32-gemm/gen/4x2-relu-scalar.c
524 src/f32-gemm/gen/4x2-scalar.c
525 src/f32-gemm/gen/4x4-minmax-scalar.c
526 src/f32-gemm/gen/4x4-relu-scalar.c
527 src/f32-gemm/gen/4x4-scalar.c
Marat Dukhan9f426b42020-10-21 11:18:35 -0700[diff] [blame]528 src/f32-ibilinear-chw/gen/scalar-p1.c
529 src/f32-ibilinear-chw/gen/scalar-p2.c
530 src/f32-ibilinear-chw/gen/scalar-p4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]531 src/f32-ibilinear/gen/scalar-c1.c
532 src/f32-ibilinear/gen/scalar-c2.c
533 src/f32-ibilinear/gen/scalar-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]534 src/f32-igemm/gen/1x4-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]535 src/f32-igemm/gen/1x4-relu-scalar.c
536 src/f32-igemm/gen/1x4-scalar.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]537 src/f32-igemm/gen/2x4-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]538 src/f32-igemm/gen/2x4-relu-scalar.c
539 src/f32-igemm/gen/2x4-scalar.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]540 src/f32-igemm/gen/4x2-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]541 src/f32-igemm/gen/4x2-relu-scalar.c
542 src/f32-igemm/gen/4x2-scalar.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]543 src/f32-igemm/gen/4x4-minmax-scalar.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]544 src/f32-igemm/gen/4x4-relu-scalar.c
545 src/f32-igemm/gen/4x4-scalar.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]546 src/f32-maxpool/9p8x-minmax-scalar-c1.c
547 src/f32-pavgpool/9p8x-minmax-scalar-c1.c
548 src/f32-pavgpool/9x-minmax-scalar-c1.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]549 src/f32-ppmm/gen/2x4-minmax-scalar.c
550 src/f32-ppmm/gen/3x3-minmax-scalar.c
551 src/f32-ppmm/gen/4x2-minmax-scalar.c
552 src/f32-ppmm/gen/4x4-minmax-scalar.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]553 src/f32-prelu/gen/scalar-2x1.c
554 src/f32-prelu/gen/scalar-2x4.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]555 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]556 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]557 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]558 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c
559 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]560 src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]561 src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]562 src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]563 src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]564 src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c
565 src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]566 src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]567 src/f32-rmax/scalar.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]568 src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c
569 src/f32-spmm/gen/1x1-minmax-scalar.c
570 src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c
571 src/f32-spmm/gen/2x1-minmax-scalar.c
572 src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c
573 src/f32-spmm/gen/4x1-minmax-scalar.c
574 src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c
575 src/f32-spmm/gen/8x1-minmax-scalar.c
576 src/f32-spmm/gen/8x2-minmax-scalar.c
577 src/f32-spmm/gen/8x4-minmax-scalar.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]578 src/f32-vbinary/gen/vadd-minmax-scalar-x1.c
579 src/f32-vbinary/gen/vadd-minmax-scalar-x2.c
580 src/f32-vbinary/gen/vadd-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]581 src/f32-vbinary/gen/vadd-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]582 src/f32-vbinary/gen/vadd-relu-scalar-x1.c
583 src/f32-vbinary/gen/vadd-relu-scalar-x2.c
584 src/f32-vbinary/gen/vadd-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]585 src/f32-vbinary/gen/vadd-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]586 src/f32-vbinary/gen/vadd-scalar-x1.c
587 src/f32-vbinary/gen/vadd-scalar-x2.c
588 src/f32-vbinary/gen/vadd-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]589 src/f32-vbinary/gen/vadd-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]590 src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c
591 src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c
592 src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]593 src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]594 src/f32-vbinary/gen/vaddc-relu-scalar-x1.c
595 src/f32-vbinary/gen/vaddc-relu-scalar-x2.c
596 src/f32-vbinary/gen/vaddc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]597 src/f32-vbinary/gen/vaddc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]598 src/f32-vbinary/gen/vaddc-scalar-x1.c
599 src/f32-vbinary/gen/vaddc-scalar-x2.c
600 src/f32-vbinary/gen/vaddc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]601 src/f32-vbinary/gen/vaddc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]602 src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c
603 src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c
604 src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]605 src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]606 src/f32-vbinary/gen/vdiv-relu-scalar-x1.c
607 src/f32-vbinary/gen/vdiv-relu-scalar-x2.c
608 src/f32-vbinary/gen/vdiv-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]609 src/f32-vbinary/gen/vdiv-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]610 src/f32-vbinary/gen/vdiv-scalar-x1.c
611 src/f32-vbinary/gen/vdiv-scalar-x2.c
612 src/f32-vbinary/gen/vdiv-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]613 src/f32-vbinary/gen/vdiv-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]614 src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c
615 src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c
616 src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]617 src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]618 src/f32-vbinary/gen/vdivc-relu-scalar-x1.c
619 src/f32-vbinary/gen/vdivc-relu-scalar-x2.c
620 src/f32-vbinary/gen/vdivc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]621 src/f32-vbinary/gen/vdivc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]622 src/f32-vbinary/gen/vdivc-scalar-x1.c
623 src/f32-vbinary/gen/vdivc-scalar-x2.c
624 src/f32-vbinary/gen/vdivc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]625 src/f32-vbinary/gen/vdivc-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]626 src/f32-vbinary/gen/vmax-scalar-x1.c
627 src/f32-vbinary/gen/vmax-scalar-x2.c
628 src/f32-vbinary/gen/vmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]629 src/f32-vbinary/gen/vmax-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]630 src/f32-vbinary/gen/vmaxc-scalar-x1.c
631 src/f32-vbinary/gen/vmaxc-scalar-x2.c
632 src/f32-vbinary/gen/vmaxc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]633 src/f32-vbinary/gen/vmaxc-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]634 src/f32-vbinary/gen/vmin-scalar-x1.c
635 src/f32-vbinary/gen/vmin-scalar-x2.c
636 src/f32-vbinary/gen/vmin-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]637 src/f32-vbinary/gen/vmin-scalar-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]638 src/f32-vbinary/gen/vminc-scalar-x1.c
639 src/f32-vbinary/gen/vminc-scalar-x2.c
640 src/f32-vbinary/gen/vminc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]641 src/f32-vbinary/gen/vminc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]642 src/f32-vbinary/gen/vmul-minmax-scalar-x1.c
643 src/f32-vbinary/gen/vmul-minmax-scalar-x2.c
644 src/f32-vbinary/gen/vmul-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]645 src/f32-vbinary/gen/vmul-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]646 src/f32-vbinary/gen/vmul-relu-scalar-x1.c
647 src/f32-vbinary/gen/vmul-relu-scalar-x2.c
648 src/f32-vbinary/gen/vmul-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]649 src/f32-vbinary/gen/vmul-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]650 src/f32-vbinary/gen/vmul-scalar-x1.c
651 src/f32-vbinary/gen/vmul-scalar-x2.c
652 src/f32-vbinary/gen/vmul-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]653 src/f32-vbinary/gen/vmul-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]654 src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c
655 src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c
656 src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]657 src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]658 src/f32-vbinary/gen/vmulc-relu-scalar-x1.c
659 src/f32-vbinary/gen/vmulc-relu-scalar-x2.c
660 src/f32-vbinary/gen/vmulc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]661 src/f32-vbinary/gen/vmulc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]662 src/f32-vbinary/gen/vmulc-scalar-x1.c
663 src/f32-vbinary/gen/vmulc-scalar-x2.c
664 src/f32-vbinary/gen/vmulc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]665 src/f32-vbinary/gen/vmulc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]666 src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c
667 src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c
668 src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]669 src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]670 src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c
671 src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c
672 src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]673 src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]674 src/f32-vbinary/gen/vrdivc-scalar-x1.c
675 src/f32-vbinary/gen/vrdivc-scalar-x2.c
676 src/f32-vbinary/gen/vrdivc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]677 src/f32-vbinary/gen/vrdivc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]678 src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c
679 src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c
680 src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]681 src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]682 src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c
683 src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c
684 src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]685 src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]686 src/f32-vbinary/gen/vrsubc-scalar-x1.c
687 src/f32-vbinary/gen/vrsubc-scalar-x2.c
688 src/f32-vbinary/gen/vrsubc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]689 src/f32-vbinary/gen/vrsubc-scalar-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]690 src/f32-vbinary/gen/vsqrdiff-scalar-x1.c
691 src/f32-vbinary/gen/vsqrdiff-scalar-x2.c
692 src/f32-vbinary/gen/vsqrdiff-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]693 src/f32-vbinary/gen/vsqrdiff-scalar-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]694 src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c
695 src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c
696 src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]697 src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]698 src/f32-vbinary/gen/vsub-minmax-scalar-x1.c
699 src/f32-vbinary/gen/vsub-minmax-scalar-x2.c
700 src/f32-vbinary/gen/vsub-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]701 src/f32-vbinary/gen/vsub-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]702 src/f32-vbinary/gen/vsub-relu-scalar-x1.c
703 src/f32-vbinary/gen/vsub-relu-scalar-x2.c
704 src/f32-vbinary/gen/vsub-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]705 src/f32-vbinary/gen/vsub-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]706 src/f32-vbinary/gen/vsub-scalar-x1.c
707 src/f32-vbinary/gen/vsub-scalar-x2.c
708 src/f32-vbinary/gen/vsub-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]709 src/f32-vbinary/gen/vsub-scalar-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]710 src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c
711 src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c
712 src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]713 src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]714 src/f32-vbinary/gen/vsubc-relu-scalar-x1.c
715 src/f32-vbinary/gen/vsubc-relu-scalar-x2.c
716 src/f32-vbinary/gen/vsubc-relu-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]717 src/f32-vbinary/gen/vsubc-relu-scalar-x8.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]718 src/f32-vbinary/gen/vsubc-scalar-x1.c
719 src/f32-vbinary/gen/vsubc-scalar-x2.c
720 src/f32-vbinary/gen/vsubc-scalar-x4.c
Frank Barchard9c7308f2020-08-31 17:03:01 -0700[diff] [blame]721 src/f32-vbinary/gen/vsubc-scalar-x8.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]722 src/f32-vclamp/gen/vclamp-scalar-x1.c
723 src/f32-vclamp/gen/vclamp-scalar-x2.c
724 src/f32-vclamp/gen/vclamp-scalar-x4.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]725 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c
726 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c
727 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c
728 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c
729 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c
730 src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c
731 src/f32-velu/gen/velu-scalar-rr2-p6-x1.c
732 src/f32-velu/gen/velu-scalar-rr2-p6-x2.c
733 src/f32-velu/gen/velu-scalar-rr2-p6-x3.c
734 src/f32-velu/gen/velu-scalar-rr2-p6-x4.c
735 src/f32-velu/gen/velu-scalar-rr2-p6-x5.c
736 src/f32-velu/gen/velu-scalar-rr2-p6-x6.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]737 src/f32-vhswish/gen/vhswish-scalar-x1.c
738 src/f32-vhswish/gen/vhswish-scalar-x2.c
739 src/f32-vhswish/gen/vhswish-scalar-x4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]740 src/f32-vlrelu/gen/vlrelu-scalar-x1.c
741 src/f32-vlrelu/gen/vlrelu-scalar-x2.c
742 src/f32-vlrelu/gen/vlrelu-scalar-x4.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]743 src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c
744 src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c
745 src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]746 src/f32-vrelu/gen/vrelu-scalar-x1.c
747 src/f32-vrelu/gen/vrelu-scalar-x2.c
748 src/f32-vrelu/gen/vrelu-scalar-x4.c
749 src/f32-vrelu/gen/vrelu-scalar-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]750 src/f32-vrnd/gen/vrndd-scalar-libm-x1.c
751 src/f32-vrnd/gen/vrndd-scalar-libm-x2.c
752 src/f32-vrnd/gen/vrndd-scalar-libm-x4.c
Frank Barchard8e229db2020-07-06 23:31:35 -0700[diff] [blame]753 src/f32-vrnd/gen/vrndne-scalar-libm-x1.c
754 src/f32-vrnd/gen/vrndne-scalar-libm-x2.c
755 src/f32-vrnd/gen/vrndne-scalar-libm-x4.c
756 src/f32-vrnd/gen/vrndu-scalar-libm-x1.c
757 src/f32-vrnd/gen/vrndu-scalar-libm-x2.c
758 src/f32-vrnd/gen/vrndu-scalar-libm-x4.c
759 src/f32-vrnd/gen/vrndz-scalar-libm-x1.c
760 src/f32-vrnd/gen/vrndz-scalar-libm-x2.c
761 src/f32-vrnd/gen/vrndz-scalar-libm-x4.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]762 src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c
763 src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c
764 src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c
765 src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c
766 src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c
767 src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c
768 src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c
769 src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c
770 src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]771 src/f32-vsqrt/gen/scalar-sqrt-x1.c
772 src/f32-vsqrt/gen/scalar-sqrt-x2.c
773 src/f32-vsqrt/gen/scalar-sqrt-x4.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]774 src/f32-vunary/gen/vabs-scalar-x1.c
775 src/f32-vunary/gen/vabs-scalar-x2.c
776 src/f32-vunary/gen/vabs-scalar-x4.c
777 src/f32-vunary/gen/vneg-scalar-x1.c
778 src/f32-vunary/gen/vneg-scalar-x2.c
779 src/f32-vunary/gen/vneg-scalar-x4.c
780 src/f32-vunary/gen/vsqr-scalar-x1.c
781 src/f32-vunary/gen/vsqr-scalar-x2.c
782 src/f32-vunary/gen/vsqr-scalar-x4.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]783 src/math/expm1minus-scalar-rr2-lut4-p4.c
784 src/math/expm1minus-scalar-rr2-lut8-p3.c
785 src/math/expm1minus-scalar-rr2-lut8-p4.c
Marat Dukhanc60742b2020-11-23 12:33:27 -0800[diff] [blame]786 src/math/expm1minus-scalar-rr2-lut16-p3.c
787 src/math/expm1minus-scalar-rr2-lut16-p4.c
788 src/math/expm1minus-scalar-rr2-p5.c
789 src/math/expm1minus-scalar-rr2-p6.c
Frank Barchard22136062020-11-24 18:44:46 -0800[diff] [blame]790 src/math/expminus-scalar-rr2-lut64-p2.c
791 src/math/expminus-scalar-rr2-lut2048-p1.c
792 src/math/expminus-scalar-rr2-p5.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]793 src/math/roundd-scalar-addsub.c
794 src/math/roundd-scalar-cvt.c
Marat Dukhancc55f812020-05-14 03:52:49 -0700[diff] [blame]795 src/math/roundd-scalar-floor.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]796 src/math/roundne-scalar-addsub.c
797 src/math/roundne-scalar-nearbyint.c
798 src/math/roundne-scalar-rint.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]799 src/math/roundu-scalar-addsub.c
Marat Dukhancc55f812020-05-14 03:52:49 -0700[diff] [blame]800 src/math/roundu-scalar-ceil.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]801 src/math/roundu-scalar-cvt.c
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]802 src/math/roundz-scalar-addsub.c
803 src/math/roundz-scalar-cvt.c
Marat Dukhancc55f812020-05-14 03:52:49 -0700[diff] [blame]804 src/math/roundz-scalar-trunc.c
Marat Dukhanf8475d62020-09-17 15:01:43 -0700[diff] [blame]805 src/math/sigmoid-scalar-rr2-lut64-p2-div.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]806 src/math/sigmoid-scalar-rr2-lut2048-p1-div.c
Marat Dukhanf8475d62020-09-17 15:01:43 -0700[diff] [blame]807 src/math/sigmoid-scalar-rr2-p5-div.c
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]808 src/params-init.c
Marat Dukhan57547062021-06-30 16:53:29 -0700[diff] [blame]809 src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c
810 src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
811 src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c
812 src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
813 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c
814 src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
815 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c
816 src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
817 src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c
818 src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c
819 src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c
820 src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c
Marat Dukhand6021542021-06-30 09:04:20 -0700[diff] [blame]821 src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c
822 src/qc8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
823 src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c
824 src/qc8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
825 src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c
826 src/qc8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
827 src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c
828 src/qc8-gemm/gen/2x4-minmax-fp32-scalar-magic.c
829 src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c
830 src/qc8-gemm/gen/3x2-minmax-fp32-scalar-magic.c
831 src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c
832 src/qc8-gemm/gen/3x4-minmax-fp32-scalar-magic.c
833 src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c
834 src/qc8-gemm/gen/4x2-minmax-fp32-scalar-magic.c
835 src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c
836 src/qc8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
837 src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c
838 src/qc8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
839 src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c
840 src/qc8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
841 src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c
842 src/qc8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
843 src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c
844 src/qc8-igemm/gen/2x4-minmax-fp32-scalar-magic.c
845 src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c
846 src/qc8-igemm/gen/3x2-minmax-fp32-scalar-magic.c
847 src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c
848 src/qc8-igemm/gen/3x4-minmax-fp32-scalar-magic.c
849 src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c
850 src/qc8-igemm/gen/4x2-minmax-fp32-scalar-magic.c
851 src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c
852 src/qc8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan85d772b2021-06-30 11:02:42 -0700[diff] [blame]853 src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c
854 src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
855 src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]856 src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c
857 src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
858 src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c
Marat Dukhan85d772b2021-06-30 11:02:42 -0700[diff] [blame]859 src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c
860 src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
861 src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]862 src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c
863 src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
864 src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c
Marat Dukhan85d772b2021-06-30 11:02:42 -0700[diff] [blame]865 src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c
866 src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c
867 src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]868 src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c
869 src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c
870 src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c
Marat Dukhan047b6202021-05-11 20:32:25 -0700[diff] [blame]871 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c
872 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c
873 src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c
874 src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c
875 src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c
876 src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]877 src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c
878 src/qs8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]879 src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]880 src/qs8-gemm/gen/1x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]881 src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c
882 src/qs8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]883 src/qs8-gemm/gen/1x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]884 src/qs8-gemm/gen/1x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]885 src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c
886 src/qs8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]887 src/qs8-gemm/gen/2x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]888 src/qs8-gemm/gen/2x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]889 src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c
890 src/qs8-gemm/gen/2x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]891 src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]892 src/qs8-gemm/gen/2x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]893 src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c
894 src/qs8-gemm/gen/3x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]895 src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]896 src/qs8-gemm/gen/3x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]897 src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c
898 src/qs8-gemm/gen/3x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]899 src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]900 src/qs8-gemm/gen/3x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]901 src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c
902 src/qs8-gemm/gen/4x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]903 src/qs8-gemm/gen/4x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]904 src/qs8-gemm/gen/4x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]905 src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c
906 src/qs8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]907 src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]908 src/qs8-gemm/gen/4x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]909 src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c
910 src/qs8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]911 src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]912 src/qs8-igemm/gen/1x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]913 src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c
914 src/qs8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]915 src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]916 src/qs8-igemm/gen/1x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]917 src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c
918 src/qs8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]919 src/qs8-igemm/gen/2x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]920 src/qs8-igemm/gen/2x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]921 src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c
922 src/qs8-igemm/gen/2x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]923 src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]924 src/qs8-igemm/gen/2x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]925 src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c
926 src/qs8-igemm/gen/3x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]927 src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]928 src/qs8-igemm/gen/3x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]929 src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c
930 src/qs8-igemm/gen/3x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]931 src/qs8-igemm/gen/3x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]932 src/qs8-igemm/gen/3x4-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]933 src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c
934 src/qs8-igemm/gen/4x2-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]935 src/qs8-igemm/gen/4x2-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]936 src/qs8-igemm/gen/4x2-minmax-rndnu-scalar.c
Marat Dukhan779b2532021-06-29 14:14:13 -0700[diff] [blame]937 src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c
938 src/qs8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]939 src/qs8-igemm/gen/4x4-minmax-gemmlowp-scalar.c
Frank Barchard1a2dbe12021-07-22 20:13:58 -0700[diff] [blame]940 src/qs8-igemm/gen/4x4-minmax-rndnu-scalar.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]941 src/qs8-requantization/fp32-scalar-lrintf.c
942 src/qs8-requantization/fp32-scalar-magic.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]943 src/qs8-requantization/gemmlowp-scalar.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]944 src/qs8-requantization/rndna-scalar-signed64.c
945 src/qs8-requantization/rndna-scalar-unsigned32.c
946 src/qs8-requantization/rndna-scalar-unsigned64.c
Marat Dukhan062bee32021-05-27 20:31:07 -0700[diff] [blame]947 src/qs8-requantization/rndnu-scalar.c
Marat Dukhand481c282021-05-11 23:48:31 -0700[diff] [blame]948 src/qs8-vadd/gen/minmax-scalar-x1.c
949 src/qs8-vadd/gen/minmax-scalar-x2.c
950 src/qs8-vadd/gen/minmax-scalar-x4.c
951 src/qs8-vaddc/gen/minmax-scalar-x1.c
952 src/qs8-vaddc/gen/minmax-scalar-x2.c
953 src/qs8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan79993412021-08-02 15:02:57 -0700[diff] [blame]954 src/qs8-vmul/gen/minmax-fp32-scalar-x1.c
955 src/qs8-vmul/gen/minmax-fp32-scalar-x2.c
956 src/qs8-vmul/gen/minmax-fp32-scalar-x4.c
957 src/qs8-vmulc/gen/minmax-fp32-scalar-x1.c
958 src/qs8-vmulc/gen/minmax-fp32-scalar-x2.c
959 src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]960 src/qu8-avgpool/9p8x-minmax-scalar-c1.c
961 src/qu8-avgpool/9x-minmax-scalar-c1.c
Marat Dukhan1f714282021-07-15 15:41:32 -0700[diff] [blame]962 src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrint.c
963 src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-magic.c
964 src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrint.c
965 src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-magic.c
966 src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrint.c
967 src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-magic.c
968 src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrint.c
969 src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-magic.c
970 src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrint.c
971 src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-magic.c
972 src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrint.c
973 src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-magic.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]974 src/qu8-gavgpool/7p7x-minmax-scalar-c1.c
975 src/qu8-gavgpool/7x-minmax-scalar-c1.c
Marat Dukhan927d4742021-07-15 13:42:49 -0700[diff] [blame]976 src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrint.c
977 src/qu8-gemm/gen/1x2-minmax-fp32-scalar-magic.c
978 src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrint.c
979 src/qu8-gemm/gen/1x4-minmax-fp32-scalar-magic.c
980 src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrint.c
981 src/qu8-gemm/gen/2x2-minmax-fp32-scalar-magic.c
982 src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrint.c
983 src/qu8-gemm/gen/2x4-minmax-fp32-scalar-magic.c
984 src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrint.c
985 src/qu8-gemm/gen/3x2-minmax-fp32-scalar-magic.c
986 src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrint.c
987 src/qu8-gemm/gen/3x4-minmax-fp32-scalar-magic.c
988 src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrint.c
989 src/qu8-gemm/gen/4x2-minmax-fp32-scalar-magic.c
990 src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrint.c
991 src/qu8-gemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan927d4742021-07-15 13:42:49 -0700[diff] [blame]992 src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrint.c
993 src/qu8-igemm/gen/1x2-minmax-fp32-scalar-magic.c
994 src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrint.c
995 src/qu8-igemm/gen/1x4-minmax-fp32-scalar-magic.c
996 src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrint.c
997 src/qu8-igemm/gen/2x2-minmax-fp32-scalar-magic.c
998 src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrint.c
999 src/qu8-igemm/gen/2x4-minmax-fp32-scalar-magic.c
1000 src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrint.c
1001 src/qu8-igemm/gen/3x2-minmax-fp32-scalar-magic.c
1002 src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrint.c
1003 src/qu8-igemm/gen/3x4-minmax-fp32-scalar-magic.c
1004 src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrint.c
1005 src/qu8-igemm/gen/4x2-minmax-fp32-scalar-magic.c
1006 src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrint.c
1007 src/qu8-igemm/gen/4x4-minmax-fp32-scalar-magic.c
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]1008 src/qu8-requantization/fp32-scalar-lrintf.c
1009 src/qu8-requantization/fp32-scalar-magic.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]1010 src/qu8-requantization/gemmlowp-scalar.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]1011 src/qu8-requantization/rndna-scalar-signed64.c
1012 src/qu8-requantization/rndna-scalar-unsigned32.c
1013 src/qu8-requantization/rndna-scalar-unsigned64.c
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]1014 src/qu8-vadd/gen/minmax-scalar-x1.c
1015 src/qu8-vadd/gen/minmax-scalar-x2.c
1016 src/qu8-vadd/gen/minmax-scalar-x4.c
1017 src/qu8-vaddc/gen/minmax-scalar-x1.c
1018 src/qu8-vaddc/gen/minmax-scalar-x2.c
1019 src/qu8-vaddc/gen/minmax-scalar-x4.c
Marat Dukhan79993412021-08-02 15:02:57 -0700[diff] [blame]1020 src/qu8-vmul/gen/minmax-fp32-scalar-x1.c
1021 src/qu8-vmul/gen/minmax-fp32-scalar-x2.c
1022 src/qu8-vmul/gen/minmax-fp32-scalar-x4.c
1023 src/qu8-vmulc/gen/minmax-fp32-scalar-x1.c
1024 src/qu8-vmulc/gen/minmax-fp32-scalar-x2.c
1025 src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]1026 src/s8-maxpool/9p8x-minmax-scalar-c1.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]1027 src/s8-vclamp/scalar-x4.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1028 src/u8-lut32norm/scalar.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1029 src/u8-maxpool/9p8x-minmax-scalar-c1.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1030 src/u8-rmax/scalar.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]1031 src/u8-vclamp/scalar-x4.c
Marat Dukhan548542c2021-09-09 14:15:51 -0700[diff] [blame]1032 src/x8-lut/gen/lut-scalar-x1.c
1033 src/x8-lut/gen/lut-scalar-x2.c
1034 src/x8-lut/gen/lut-scalar-x4.c
1035 src/x8-lut/gen/lut-scalar-x8.c
1036 src/x8-lut/gen/lut-scalar-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1037 src/x8-zip/x2-scalar.c
1038 src/x8-zip/x3-scalar.c
1039 src/x8-zip/x4-scalar.c
1040 src/x8-zip/xm-scalar.c
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800[diff] [blame]1041 src/x32-depthtospace2d-chw2hwc/scalar.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1042 src/x32-packx/x2-scalar.c
1043 src/x32-packx/x3-scalar.c
1044 src/x32-packx/x4-scalar.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1045 src/x32-unpool/scalar.c
1046 src/x32-zip/x2-scalar.c
1047 src/x32-zip/x3-scalar.c
1048 src/x32-zip/x4-scalar.c
Marat Dukhan048931b2020-11-24 20:53:54 -0800[diff] [blame]1049 src/x32-zip/xm-scalar.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]1050 src/xx-copy/memcpy.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]1051 src/xx-fill/scalar-x16.c
1052 src/xx-pad/scalar.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1053
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1054SET(PROD_NEON_MICROKERNEL_SRCS
1055 src/f32-argmaxpool/4x-neon-c4.c
1056 src/f32-argmaxpool/9p8x-neon-c4.c
1057 src/f32-argmaxpool/9x-neon-c4.c
1058 src/f32-avgpool/9p8x-minmax-neon-c4.c
1059 src/f32-avgpool/9x-minmax-neon-c4.c
1060 src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c
Frank Barcharddbe781b2021-10-18 10:29:52 -0700[diff] [blame]1061 src/f32-dwconv/gen/up8x4-minmax-neon.c
1062 src/f32-dwconv/gen/up8x9-minmax-neon.c
1063 src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1064 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c
1065 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c
1066 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c
1067 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c
1068 src/f32-gavgpool-cw/neon-x4.c
1069 src/f32-gavgpool/7p7x-minmax-neon-c4.c
1070 src/f32-gavgpool/7x-minmax-neon-c4.c
1071 src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c
1072 src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c
1073 src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c
1074 src/f32-ibilinear-chw/gen/neon-p8.c
1075 src/f32-ibilinear/gen/neon-c8.c
1076 src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c
1077 src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c
1078 src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c
1079 src/f32-maxpool/9p8x-minmax-neon-c4.c
1080 src/f32-pavgpool/9p8x-minmax-neon-c4.c
1081 src/f32-pavgpool/9x-minmax-neon-c4.c
1082 src/f32-prelu/gen/neon-2x8.c
1083 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c
1084 src/f32-rmax/neon.c
1085 src/f32-spmm/gen/32x1-minmax-neon.c
1086 src/f32-vbinary/gen/vadd-minmax-neon-x8.c
1087 src/f32-vbinary/gen/vaddc-minmax-neon-x8.c
1088 src/f32-vbinary/gen/vmax-neon-x8.c
1089 src/f32-vbinary/gen/vmaxc-neon-x8.c
1090 src/f32-vbinary/gen/vmin-neon-x8.c
1091 src/f32-vbinary/gen/vminc-neon-x8.c
1092 src/f32-vbinary/gen/vmul-minmax-neon-x8.c
1093 src/f32-vbinary/gen/vmulc-minmax-neon-x8.c
1094 src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c
1095 src/f32-vbinary/gen/vsqrdiff-neon-x8.c
1096 src/f32-vbinary/gen/vsqrdiffc-neon-x8.c
1097 src/f32-vbinary/gen/vsub-minmax-neon-x8.c
1098 src/f32-vbinary/gen/vsubc-minmax-neon-x8.c
1099 src/f32-vclamp/gen/vclamp-neon-x8.c
1100 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c
1101 src/f32-vhswish/gen/vhswish-neon-x16.c
1102 src/f32-vlrelu/gen/vlrelu-neon-x8.c
1103 src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c
1104 src/f32-vrnd/gen/vrndd-neon-x8.c
1105 src/f32-vrnd/gen/vrndne-neon-x8.c
1106 src/f32-vrnd/gen/vrndu-neon-x8.c
1107 src/f32-vrnd/gen/vrndz-neon-x8.c
1108 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c
1109 src/f32-vunary/gen/vabs-neon-x8.c
1110 src/f32-vunary/gen/vneg-neon-x8.c
1111 src/f32-vunary/gen/vsqr-neon-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1112 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c
Frank Barchard7da8b022021-08-31 09:49:10 -0700[diff] [blame]1113 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c
1114 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1115 src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c
1116 src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c
1117 src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c
1118 src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1119 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c
Frank Barchard7da8b022021-08-31 09:49:10 -0700[diff] [blame]1120 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c
1121 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1122 src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c
1123 src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c
1124 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c
1125 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1126 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c
1127 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c
1128 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1129 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c
Marat Dukhan01debd92021-07-29 18:14:21 -0700[diff] [blame]1130 src/qs8-vadd/gen/minmax-neon-ld64-x16.c
1131 src/qs8-vadd/gen/minmax-neon-ld64-x32.c
1132 src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
1133 src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]1134 src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c
1135 src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1136 src/qu8-avgpool/9p8x-minmax-neon-c8.c
1137 src/qu8-avgpool/9x-minmax-neon-c8.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1138 src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c
1139 src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1140 src/qu8-gavgpool/7p7x-minmax-neon-c8.c
1141 src/qu8-gavgpool/7x-minmax-neon-c8.c
1142 src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
1143 src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1144 src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
1145 src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
1146 src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
1147 src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1148 src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
1149 src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard0a3093c2021-08-31 09:58:11 -0700[diff] [blame]1150 src/qu8-vadd/gen/minmax-neon-ld64-x16.c
1151 src/qu8-vadd/gen/minmax-neon-ld64-x32.c
1152 src/qu8-vaddc/gen/minmax-neon-ld64-x16.c
1153 src/qu8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]1154 src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c
1155 src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]1156 src/s8-maxpool/9p8x-minmax-neon-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]1157 src/s8-vclamp/neon-x64.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1158 src/u8-maxpool/9p8x-minmax-neon-c16.c
1159 src/u8-rmax/neon.c
1160 src/u8-vclamp/neon-x64.c
1161 src/x8-zip/x2-neon.c
1162 src/x8-zip/x3-neon.c
1163 src/x8-zip/x4-neon.c
1164 src/x8-zip/xm-neon.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1165 src/x32-packx/x4-neon-st4.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1166 src/x32-unpool/neon.c
1167 src/x32-zip/x2-neon.c
1168 src/x32-zip/x3-neon.c
1169 src/x32-zip/x4-neon.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]1170 src/x32-zip/xm-neon.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]1171 src/xx-fill/neon-x64.c
1172 src/xx-pad/neon.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1173
1174SET(ALL_NEON_MICROKERNEL_SRCS
Marat Dukhan322ed6f2021-10-16 17:44:16 -0700[diff] [blame]1175 src/f16-f32-vcvt/gen/vcvt-neon-int16-x8.c
1176 src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c
1177 src/f16-f32-vcvt/gen/vcvt-neon-int16-x24.c
1178 src/f16-f32-vcvt/gen/vcvt-neon-int16-x32.c
1179 src/f16-f32-vcvt/gen/vcvt-neon-int32-x8.c
1180 src/f16-f32-vcvt/gen/vcvt-neon-int32-x16.c
1181 src/f16-f32-vcvt/gen/vcvt-neon-int32-x24.c
1182 src/f16-f32-vcvt/gen/vcvt-neon-int32-x32.c
Marat Dukhanef25c6d2020-07-24 00:59:40 -0700[diff] [blame]1183 src/f32-argmaxpool/4x-neon-c4.c
1184 src/f32-argmaxpool/9p8x-neon-c4.c
1185 src/f32-argmaxpool/9x-neon-c4.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1186 src/f32-avgpool/9p8x-minmax-neon-c4.c
1187 src/f32-avgpool/9x-minmax-neon-c4.c
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]1188 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1189 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1190 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1191 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]1192 src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1193 src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1194 src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1195 src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c
Marat Dukhanc7634882020-12-07 15:11:12 -0800[diff] [blame]1196 src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1197 src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1198 src/f32-dwconv/gen/up4x4-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1199 src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1200 src/f32-dwconv/gen/up4x9-minmax-neon.c
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1201 src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1202 src/f32-dwconv/gen/up4x25-minmax-neon.c
1203 src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c
1204 src/f32-dwconv/gen/up8x4-minmax-neon.c
1205 src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c
1206 src/f32-dwconv/gen/up8x9-minmax-neon.c
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1207 src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1208 src/f32-dwconv/gen/up8x25-minmax-neon.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1209 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c
1210 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c
1211 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c
Marat Dukhanc581e482020-10-24 01:28:11 -0700[diff] [blame]1212 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1213 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c
Marat Dukhanc581e482020-10-24 01:28:11 -0700[diff] [blame]1214 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c
1215 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c
1216 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c
1217 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c
1218 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]1219 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c
1220 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c
1221 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1222 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]1223 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1224 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c
1225 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c
1226 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1227 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c
1228 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c
1229 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c
1230 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1231 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1232 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c
1233 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1234 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1235 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1236 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]1237 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]1238 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c
1239 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]1240 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c
1241 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c
1242 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c
1243 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c
1244 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c
1245 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c
1246 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c
1247 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]1248 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]1249 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1250 src/f32-gavgpool-cw/neon-x4.c
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]1251 src/f32-gavgpool/7p7x-minmax-neon-c4.c
1252 src/f32-gavgpool/7x-minmax-neon-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1253 src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1254 src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c
1255 src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1256 src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1257 src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c
1258 src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c
1259 src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c
1260 src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c
1261 src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1262 src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c
1263 src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1264 src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c
1265 src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1266 src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c
1267 src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1268 src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c
1269 src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c
1270 src/f32-gemm/gen/1x8s4-minmax-neon.c
1271 src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c
1272 src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c
1273 src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c
1274 src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c
1275 src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c
1276 src/f32-gemm/gen/4x8s4-minmax-neon.c
1277 src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c
1278 src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c
1279 src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c
1280 src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c
1281 src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c
1282 src/f32-gemm/gen/6x8s4-minmax-neon.c
1283 src/f32-gemm/gen/8x8s4-minmax-neon.c
Artsiom Ablavatski2202c812021-01-22 14:16:43 -0800[diff] [blame]1284 src/f32-ibilinear-chw/gen/neon-p4.c
1285 src/f32-ibilinear-chw/gen/neon-p8.c
Frank Barchard8247e212021-02-03 18:12:33 -0800[diff] [blame]1286 src/f32-ibilinear/gen/neon-c4.c
1287 src/f32-ibilinear/gen/neon-c8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1288 src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1289 src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1290 src/f32-igemm/gen/1x8s4-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1291 src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c
1292 src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1293 src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1294 src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c
1295 src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c
1296 src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c
1297 src/f32-igemm/gen/4x8s4-minmax-neon.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1298 src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c
1299 src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1300 src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c
1301 src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1302 src/f32-igemm/gen/6x8s4-minmax-neon.c
1303 src/f32-igemm/gen/8x8s4-minmax-neon.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1304 src/f32-maxpool/9p8x-minmax-neon-c4.c
1305 src/f32-pavgpool/9p8x-minmax-neon-c4.c
1306 src/f32-pavgpool/9x-minmax-neon-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1307 src/f32-ppmm/gen/4x8-minmax-neon.c
1308 src/f32-ppmm/gen/8x8-minmax-neon.c
Frank Barcharda5316982020-07-23 13:19:28 -0700[diff] [blame]1309 src/f32-prelu/gen/neon-1x4.c
1310 src/f32-prelu/gen/neon-1x8.c
1311 src/f32-prelu/gen/neon-1x16.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1312 src/f32-prelu/gen/neon-2x4.c
1313 src/f32-prelu/gen/neon-2x8.c
Frank Barcharda5316982020-07-23 13:19:28 -0700[diff] [blame]1314 src/f32-prelu/gen/neon-2x16.c
1315 src/f32-prelu/gen/neon-4x4.c
1316 src/f32-prelu/gen/neon-4x8.c
1317 src/f32-prelu/gen/neon-4x16.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1318 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1319 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1320 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1321 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c
1322 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1323 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1324 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c
1325 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1326 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1327 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c
1328 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1329 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c
1330 src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c
1331 src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c
1332 src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c
1333 src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c
1334 src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c
1335 src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c
1336 src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c
1337 src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c
1338 src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c
1339 src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c
1340 src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c
1341 src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1342 src/f32-rmax/neon.c
Marat Dukhan5b86c432020-12-06 19:15:03 -0800[diff] [blame]1343 src/f32-spmm/gen/4x1-minmax-neon-pipelined.c
1344 src/f32-spmm/gen/4x1-minmax-neon-x2.c
1345 src/f32-spmm/gen/4x1-minmax-neon.c
1346 src/f32-spmm/gen/8x1-minmax-neon-pipelined.c
1347 src/f32-spmm/gen/8x1-minmax-neon-x2.c
1348 src/f32-spmm/gen/8x1-minmax-neon.c
1349 src/f32-spmm/gen/12x1-minmax-neon.c
1350 src/f32-spmm/gen/16x1-minmax-neon-pipelined.c
1351 src/f32-spmm/gen/16x1-minmax-neon-x2.c
1352 src/f32-spmm/gen/16x1-minmax-neon.c
1353 src/f32-spmm/gen/32x1-minmax-neon-pipelined.c
1354 src/f32-spmm/gen/32x1-minmax-neon-x2.c
1355 src/f32-spmm/gen/32x1-minmax-neon.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1356 src/f32-vbinary/gen/vadd-minmax-neon-x4.c
1357 src/f32-vbinary/gen/vadd-minmax-neon-x8.c
1358 src/f32-vbinary/gen/vaddc-minmax-neon-x4.c
1359 src/f32-vbinary/gen/vaddc-minmax-neon-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1360 src/f32-vbinary/gen/vmax-neon-x4.c
1361 src/f32-vbinary/gen/vmax-neon-x8.c
1362 src/f32-vbinary/gen/vmaxc-neon-x4.c
1363 src/f32-vbinary/gen/vmaxc-neon-x8.c
1364 src/f32-vbinary/gen/vmin-neon-x4.c
1365 src/f32-vbinary/gen/vmin-neon-x8.c
1366 src/f32-vbinary/gen/vminc-neon-x4.c
1367 src/f32-vbinary/gen/vminc-neon-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1368 src/f32-vbinary/gen/vmul-minmax-neon-x4.c
1369 src/f32-vbinary/gen/vmul-minmax-neon-x8.c
1370 src/f32-vbinary/gen/vmulc-minmax-neon-x4.c
1371 src/f32-vbinary/gen/vmulc-minmax-neon-x8.c
1372 src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c
1373 src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]1374 src/f32-vbinary/gen/vsqrdiff-neon-x4.c
1375 src/f32-vbinary/gen/vsqrdiff-neon-x8.c
1376 src/f32-vbinary/gen/vsqrdiffc-neon-x4.c
1377 src/f32-vbinary/gen/vsqrdiffc-neon-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1378 src/f32-vbinary/gen/vsub-minmax-neon-x4.c
1379 src/f32-vbinary/gen/vsub-minmax-neon-x8.c
1380 src/f32-vbinary/gen/vsubc-minmax-neon-x4.c
1381 src/f32-vbinary/gen/vsubc-minmax-neon-x8.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]1382 src/f32-vclamp/gen/vclamp-neon-x4.c
1383 src/f32-vclamp/gen/vclamp-neon-x8.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]1384 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c
1385 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c
1386 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c
1387 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c
1388 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c
1389 src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c
1390 src/f32-velu/gen/velu-neon-rr2-p6-x4.c
1391 src/f32-velu/gen/velu-neon-rr2-p6-x8.c
1392 src/f32-velu/gen/velu-neon-rr2-p6-x12.c
1393 src/f32-velu/gen/velu-neon-rr2-p6-x16.c
1394 src/f32-velu/gen/velu-neon-rr2-p6-x20.c
1395 src/f32-velu/gen/velu-neon-rr2-p6-x24.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]1396 src/f32-vhswish/gen/vhswish-neon-x4.c
1397 src/f32-vhswish/gen/vhswish-neon-x8.c
1398 src/f32-vhswish/gen/vhswish-neon-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1399 src/f32-vlrelu/gen/vlrelu-neon-x4.c
1400 src/f32-vlrelu/gen/vlrelu-neon-x8.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1401 src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c
1402 src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]1403 src/f32-vrelu/gen/vrelu-neon-x4.c
1404 src/f32-vrelu/gen/vrelu-neon-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1405 src/f32-vrnd/gen/vrndd-neon-x4.c
1406 src/f32-vrnd/gen/vrndd-neon-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1407 src/f32-vrnd/gen/vrndne-neon-x4.c
1408 src/f32-vrnd/gen/vrndne-neon-x8.c
1409 src/f32-vrnd/gen/vrndu-neon-x4.c
1410 src/f32-vrnd/gen/vrndu-neon-x8.c
1411 src/f32-vrnd/gen/vrndz-neon-x4.c
1412 src/f32-vrnd/gen/vrndz-neon-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]1413 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c
1414 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c
1415 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c
1416 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c
1417 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c
1418 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c
1419 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c
1420 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c
1421 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c
1422 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c
1423 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c
1424 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c
1425 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c
1426 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c
1427 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c
1428 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c
1429 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c
1430 src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]1431 src/f32-vunary/gen/vabs-neon-x4.c
1432 src/f32-vunary/gen/vabs-neon-x8.c
1433 src/f32-vunary/gen/vneg-neon-x4.c
1434 src/f32-vunary/gen/vneg-neon-x8.c
1435 src/f32-vunary/gen/vsqr-neon-x4.c
1436 src/f32-vunary/gen/vsqr-neon-x8.c
Marat Dukhan60f903b2021-09-30 09:43:13 -0700[diff] [blame]1437 src/math/cvt-f16-f32-neon-int16.c
1438 src/math/cvt-f16-f32-neon-int32.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]1439 src/math/expm1minus-neon-rr2-lut16-p3.c
1440 src/math/expm1minus-neon-rr2-p6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1441 src/math/roundd-neon-addsub.c
1442 src/math/roundd-neon-cvt.c
1443 src/math/roundne-neon-addsub.c
1444 src/math/roundu-neon-addsub.c
1445 src/math/roundu-neon-cvt.c
1446 src/math/roundz-neon-addsub.c
1447 src/math/roundz-neon-cvt.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1448 src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c
1449 src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c
1450 src/math/sigmoid-neon-rr2-p5-nr2recps.c
1451 src/math/sqrt-neon-nr1rsqrts.c
1452 src/math/sqrt-neon-nr2rsqrts.c
1453 src/math/sqrt-neon-nr3rsqrts.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1454 src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c
1455 src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1456 src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1457 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c
1458 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1459 src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1460 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c
1461 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c
1462 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c
1463 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1464 src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1465 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c
1466 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c
1467 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c
1468 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c
Marat Dukhan59af5812021-06-29 18:09:57 -0700[diff] [blame]1469 src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c
1470 src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c
1471 src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c
1472 src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c
1473 src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c
Marat Dukhan14f325e2021-06-30 18:46:25 -0700[diff] [blame]1474 src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1475 src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c
1476 src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan14f325e2021-06-30 18:46:25 -0700[diff] [blame]1477 src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1478 src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c
1479 src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan14f325e2021-06-30 18:46:25 -0700[diff] [blame]1480 src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1481 src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c
1482 src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan14f325e2021-06-30 18:46:25 -0700[diff] [blame]1483 src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]1484 src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c
1485 src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1486 src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1487 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1488 src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c
1489 src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1490 src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1491 src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1492 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1493 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c
1494 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1495 src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1496 src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1497 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1498 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c
1499 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c
1500 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c
1501 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1502 src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1503 src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1504 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700[diff] [blame]1505 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c
1506 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c
1507 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c
1508 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]1509 src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1510 src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1511 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1512 src/qs8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1513 src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1514 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1515 src/qs8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1516 src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1517 src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1518 src/qs8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c
Marat Dukhan6f905292021-06-25 11:12:05 -0700[diff] [blame]1519 src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1520 src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c
Frank Barchard2aa2e2a2021-09-16 14:59:13 -0700[diff] [blame]1521 src/qs8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1522 src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c
1523 src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c
1524 src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c
1525 src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c
1526 src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c
1527 src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c
1528 src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c
1529 src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1530 src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c
1531 src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1532 src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhan14f325e2021-06-30 18:46:25 -0700[diff] [blame]1533 src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1534 src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1535 src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1536 src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c
Marat Dukhan2d3c97c2021-06-25 18:00:28 -0700[diff] [blame]1537 src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1538 src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1539 src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1540 src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1541 src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1542 src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1543 src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]1544 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c
1545 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]1546 src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1547 src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1548 src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c
1549 src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c
1550 src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c
1551 src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1552 src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1553 src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhan14f325e2021-06-30 18:46:25 -0700[diff] [blame]1554 src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1555 src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1556 src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1557 src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c
Marat Dukhan2d3c97c2021-06-25 18:00:28 -0700[diff] [blame]1558 src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1559 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1560 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1561 src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1562 src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1563 src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1564 src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1565 src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1566 src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c
1567 src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c
1568 src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c
1569 src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1570 src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1571 src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1572 src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1573 src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c
1574 src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c
1575 src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c
1576 src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1577 src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1578 src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1579 src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1580 src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c
1581 src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c
1582 src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c
1583 src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1584 src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1585 src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1586 src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1587 src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c
1588 src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c
1589 src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c
1590 src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1591 src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1592 src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]1593 src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c
1594 src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]1595 src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1596 src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1597 src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c
1598 src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c
1599 src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c
1600 src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1601 src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1602 src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1603 src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c
1604 src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1605 src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhanac67ae82021-07-13 00:05:45 -0700[diff] [blame]1606 src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1607 src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1608 src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1609 src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-padal-dup.c
Marat Dukhancf055852021-06-26 09:05:09 -0700[diff] [blame]1610 src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1611 src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1612 src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1613 src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1614 src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1615 src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1616 src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]1617 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c
1618 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]1619 src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1620 src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1621 src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c
1622 src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c
1623 src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c
1624 src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1625 src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1626 src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhanac67ae82021-07-13 00:05:45 -0700[diff] [blame]1627 src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-padal-dup.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1628 src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1629 src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1630 src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-padal-dup.c
Marat Dukhanc8f0d852021-06-29 18:15:05 -0700[diff] [blame]1631 src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1632 src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c
1633 src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]1634 src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1635 src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1636 src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1637 src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1638 src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1639 src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c
1640 src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c
1641 src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c
1642 src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1643 src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1644 src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1645 src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1646 src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c
1647 src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c
1648 src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c
1649 src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1650 src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1651 src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1652 src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1653 src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c
1654 src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c
1655 src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c
1656 src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1657 src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard510b8e02021-07-26 17:25:18 -0700[diff] [blame]1658 src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1659 src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1660 src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c
1661 src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c
1662 src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c
1663 src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c
Frank Barcharda03020a2021-06-28 15:44:06 -0700[diff] [blame]1664 src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1665 src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c
Frank Barchard22fbe772021-07-20 15:56:32 -0700[diff] [blame]1666 src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c
1667 src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]1668 src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1669 src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c
1670 src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c
1671 src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c
1672 src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c
1673 src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1674 src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]1675 src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]1676 src/qs8-requantization/fp32-neon.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]1677 src/qs8-requantization/gemmlowp-neon.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]1678 src/qs8-requantization/rndna-neon.c
Marat Dukhand3d818c2021-07-16 17:56:54 -0700[diff] [blame]1679 src/qs8-requantization/rndnu-neon-mull.c
1680 src/qs8-requantization/rndnu-neon-qdmulh.c
Marat Dukhanba7b2792020-09-02 14:26:45 -0700[diff] [blame]1681 src/qs8-vadd/gen/minmax-neon-ld64-x8.c
1682 src/qs8-vadd/gen/minmax-neon-ld64-x16.c
1683 src/qs8-vadd/gen/minmax-neon-ld64-x24.c
1684 src/qs8-vadd/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]1685 src/qs8-vadd/gen/minmax-neon-ld128-x16.c
1686 src/qs8-vadd/gen/minmax-neon-ld128-x32.c
Marat Dukhanba7b2792020-09-02 14:26:45 -0700[diff] [blame]1687 src/qs8-vaddc/gen/minmax-neon-ld64-x8.c
1688 src/qs8-vaddc/gen/minmax-neon-ld64-x16.c
1689 src/qs8-vaddc/gen/minmax-neon-ld64-x24.c
1690 src/qs8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]1691 src/qs8-vaddc/gen/minmax-neon-ld128-x16.c
1692 src/qs8-vaddc/gen/minmax-neon-ld128-x32.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]1693 src/qs8-vmul/gen/minmax-fp32-neon-ld64-x8.c
1694 src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c
1695 src/qs8-vmul/gen/minmax-fp32-neon-ld128-x16.c
1696 src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x8.c
1697 src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
1698 src/qs8-vmulc/gen/minmax-fp32-neon-ld128-x16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]1699 src/qu8-avgpool/9p8x-minmax-neon-c8.c
1700 src/qu8-avgpool/9x-minmax-neon-c8.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1701 src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1702 src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]1703 src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1704 src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1705 src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]1706 src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1707 src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1708 src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]1709 src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1710 src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1711 src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8.c
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]1712 src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1713 src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1714 src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul8.c
1715 src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1716 src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1717 src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul8.c
1718 src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1719 src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1720 src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul8.c
1721 src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c
Marat Dukhan605696a2021-07-15 18:01:30 -0700[diff] [blame]1722 src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c
Frank Barchard354cbc62021-09-27 21:42:41 -0700[diff] [blame]1723 src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul8.c
1724 src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]1725 src/qu8-gavgpool/7p7x-minmax-neon-c8.c
1726 src/qu8-gavgpool/7x-minmax-neon-c8.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]1727 src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]1728 src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]1729 src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1730 src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]1731 src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]1732 src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
1733 src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]1734 src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]1735 src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c
1736 src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan69c8a292021-07-14 19:34:56 -0700[diff] [blame]1737 src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]1738 src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]1739 src/qu8-requantization/fp32-neon.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]1740 src/qu8-requantization/gemmlowp-neon.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]1741 src/qu8-requantization/rndna-neon.c
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]1742 src/qu8-vadd/gen/minmax-neon-ld64-x8.c
1743 src/qu8-vadd/gen/minmax-neon-ld64-x16.c
Frank Barchard0a3093c2021-08-31 09:58:11 -0700[diff] [blame]1744 src/qu8-vadd/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]1745 src/qu8-vadd/gen/minmax-neon-ld128-x16.c
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]1746 src/qu8-vaddc/gen/minmax-neon-ld64-x8.c
1747 src/qu8-vaddc/gen/minmax-neon-ld64-x16.c
Frank Barchard0a3093c2021-08-31 09:58:11 -0700[diff] [blame]1748 src/qu8-vaddc/gen/minmax-neon-ld64-x32.c
Marat Dukhaneb3cff32021-07-30 11:35:27 -0700[diff] [blame]1749 src/qu8-vaddc/gen/minmax-neon-ld128-x16.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]1750 src/qu8-vmul/gen/minmax-fp32-neon-ld64-x8.c
1751 src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c
1752 src/qu8-vmul/gen/minmax-fp32-neon-ld128-x16.c
1753 src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x8.c
1754 src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c
1755 src/qu8-vmulc/gen/minmax-fp32-neon-ld128-x16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]1756 src/s8-maxpool/9p8x-minmax-neon-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]1757 src/s8-vclamp/neon-x64.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1758 src/u8-maxpool/9p8x-minmax-neon-c16.c
Marat Dukhan36aecb52019-11-22 17:21:49 -0800[diff] [blame]1759 src/u8-rmax/neon.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]1760 src/u8-vclamp/neon-x64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1761 src/x8-zip/x2-neon.c
1762 src/x8-zip/x3-neon.c
1763 src/x8-zip/x4-neon.c
1764 src/x8-zip/xm-neon.c
Marat Dukhan36aecb52019-11-22 17:21:49 -0800[diff] [blame]1765 src/x32-packx/x4-neon-st4.c
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1766 src/x32-unpool/neon.c
Marat Dukhan36aecb52019-11-22 17:21:49 -0800[diff] [blame]1767 src/x32-zip/x2-neon.c
1768 src/x32-zip/x3-neon.c
1769 src/x32-zip/x4-neon.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]1770 src/x32-zip/xm-neon.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]1771 src/xx-fill/neon-x64.c
1772 src/xx-pad/neon.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]1773
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]1774SET(ALL_NEONFP16_MICROKERNEL_SRCS
1775 src/f16-f32-vcvt/gen/vcvt-neonfp16-x8.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]1776 src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c
1777 src/math/cvt-f16-f32-neonfp16.c)
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]1778
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1779SET(PROD_NEONFMA_MICROKERNEL_SRCS
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1780 src/f32-dwconv/gen/up8x4-minmax-neonfma.c
1781 src/f32-dwconv/gen/up8x9-minmax-neonfma.c
Frank Barcharddbe781b2021-10-18 10:29:52 -0700[diff] [blame]1782 src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]1783 src/f32-gemm/gen/1x8s4-minmax-neonfma.c
1784 src/f32-gemm/gen/6x8s4-minmax-neonfma.c
1785 src/f32-ibilinear-chw/gen/neonfma-p8.c
1786 src/f32-ibilinear/gen/neonfma-c8.c
1787 src/f32-igemm/gen/1x8s4-minmax-neonfma.c
1788 src/f32-igemm/gen/6x8s4-minmax-neonfma.c
1789 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c
1790 src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c
1791 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c
1792 src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c
1793 src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c
1794 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c)
1795
1796SET(ALL_NEONFMA_MICROKERNEL_SRCS
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1797 src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c
1798 src/f32-dwconv/gen/up4x4-minmax-neonfma.c
1799 src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c
1800 src/f32-dwconv/gen/up4x9-minmax-neonfma.c
1801 src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c
1802 src/f32-dwconv/gen/up4x25-minmax-neonfma.c
1803 src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c
1804 src/f32-dwconv/gen/up8x4-minmax-neonfma.c
1805 src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c
1806 src/f32-dwconv/gen/up8x9-minmax-neonfma.c
1807 src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c
1808 src/f32-dwconv/gen/up8x25-minmax-neonfma.c
Frank Barchardc9f9d672021-10-18 12:51:59 -0700[diff] [blame^]1809 src/f32-dwconv/gen/up16x4-minmax-neon-acc2.c
1810 src/f32-dwconv/gen/up16x4-minmax-neon.c
1811 src/f32-dwconv/gen/up16x4-minmax-neonfma-acc2.c
1812 src/f32-dwconv/gen/up16x4-minmax-neonfma.c
1813 src/f32-dwconv/gen/up16x9-minmax-neon-acc2.c
1814 src/f32-dwconv/gen/up16x9-minmax-neon.c
1815 src/f32-dwconv/gen/up16x9-minmax-neonfma-acc2.c
1816 src/f32-dwconv/gen/up16x9-minmax-neonfma.c
1817 src/f32-dwconv/gen/up16x25-minmax-neon-acc2.c
1818 src/f32-dwconv/gen/up16x25-minmax-neon.c
1819 src/f32-dwconv/gen/up16x25-minmax-neonfma-acc2.c
1820 src/f32-dwconv/gen/up16x25-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1821 src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c
1822 src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c
1823 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c
1824 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c
1825 src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c
1826 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c
1827 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c
1828 src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c
1829 src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c
1830 src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c
1831 src/f32-gemm/gen/1x8s4-minmax-neonfma.c
1832 src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c
1833 src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c
1834 src/f32-gemm/gen/4x8s4-minmax-neonfma.c
1835 src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c
1836 src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c
1837 src/f32-gemm/gen/6x8s4-minmax-neonfma.c
1838 src/f32-gemm/gen/8x8s4-minmax-neonfma.c
Artsiom Ablavatski2202c812021-01-22 14:16:43 -0800[diff] [blame]1839 src/f32-ibilinear-chw/gen/neonfma-p4.c
1840 src/f32-ibilinear-chw/gen/neonfma-p8.c
Frank Barchard8247e212021-02-03 18:12:33 -0800[diff] [blame]1841 src/f32-ibilinear/gen/neonfma-c4.c
1842 src/f32-ibilinear/gen/neonfma-c8.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1843 src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1844 src/f32-igemm/gen/1x8s4-minmax-neonfma.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1845 src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1846 src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c
1847 src/f32-igemm/gen/4x8s4-minmax-neonfma.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1848 src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c
1849 src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1850 src/f32-igemm/gen/6x8s4-minmax-neonfma.c
1851 src/f32-igemm/gen/8x8s4-minmax-neonfma.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1852 src/f32-ppmm/gen/4x8-minmax-neonfma.c
1853 src/f32-ppmm/gen/8x8-minmax-neonfma.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1854 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1855 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1856 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1857 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c
1858 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1859 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1860 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c
1861 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1862 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1863 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c
1864 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1865 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c
1866 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c
1867 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c
1868 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c
1869 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c
1870 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c
1871 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c
1872 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c
1873 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c
1874 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c
1875 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c
1876 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c
1877 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -0800[diff] [blame]1878 src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c
1879 src/f32-spmm/gen/4x1-minmax-neonfma-x2.c
1880 src/f32-spmm/gen/4x1-minmax-neonfma.c
1881 src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c
1882 src/f32-spmm/gen/8x1-minmax-neonfma-x2.c
1883 src/f32-spmm/gen/8x1-minmax-neonfma.c
1884 src/f32-spmm/gen/12x1-minmax-neonfma.c
1885 src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c
1886 src/f32-spmm/gen/16x1-minmax-neonfma-x2.c
1887 src/f32-spmm/gen/16x1-minmax-neonfma.c
1888 src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c
1889 src/f32-spmm/gen/32x1-minmax-neonfma-x2.c
1890 src/f32-spmm/gen/32x1-minmax-neonfma.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]1891 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c
1892 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c
1893 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c
1894 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c
1895 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c
1896 src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c
1897 src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c
1898 src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c
1899 src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c
1900 src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c
1901 src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c
1902 src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1903 src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c
1904 src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]1905 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c
1906 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c
1907 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c
1908 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c
1909 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c
1910 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c
1911 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c
1912 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c
1913 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c
1914 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c
1915 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c
1916 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c
1917 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c
1918 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c
1919 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c
1920 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c
1921 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c
1922 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c
1923 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c
1924 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c
1925 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c
1926 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c
1927 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c
1928 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c
1929 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c
1930 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c
1931 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c
1932 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c
1933 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c
1934 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c
1935 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c
1936 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c
1937 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c
1938 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c
1939 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c
1940 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c
1941 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c
1942 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c
1943 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c
1944 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c
1945 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c
1946 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c
1947 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c
1948 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c
1949 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c
1950 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c
1951 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c
1952 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c
1953 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c
1954 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c
1955 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c
1956 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c
1957 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c
1958 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]1959 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c
1960 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c
1961 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c
1962 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c
1963 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c
1964 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c
1965 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c
1966 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c
1967 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c
1968 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c
1969 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c
1970 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c
1971 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c
1972 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c
1973 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c
1974 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c
1975 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c
1976 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c
1977 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c
1978 src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]1979 src/math/exp-neonfma-rr2-lut64-p2.c
1980 src/math/exp-neonfma-rr2-p5.c
Frank Barcharde7223ee2020-12-04 19:04:01 -0800[diff] [blame]1981 src/math/expm1minus-neonfma-rr1-lut16-p3.c
1982 src/math/expm1minus-neonfma-rr1-p6.c
Marat Dukhan9dd119a2020-11-20 18:20:04 -0800[diff] [blame]1983 src/math/expminus-neonfma-rr2-lut64-p2.c
1984 src/math/expminus-neonfma-rr2-lut2048-p1.c
1985 src/math/expminus-neonfma-rr2-p5.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1986 src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c
1987 src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c
1988 src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1989 src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c
1990 src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c
1991 src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1992 src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c
1993 src/math/sigmoid-neonfma-rr1-p5-nr2fma.c
1994 src/math/sigmoid-neonfma-rr1-p5-nr2recps.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1995 src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c
1996 src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c
1997 src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]1998 src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c
1999 src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c
2000 src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2001 src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c
2002 src/math/sigmoid-neonfma-rr2-p5-nr2fma.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2003 src/math/sigmoid-neonfma-rr2-p5-nr2recps.c
2004 src/math/sqrt-neonfma-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2005 src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2006 src/math/sqrt-neonfma-nr2fma.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2007 src/math/sqrt-neonfma-nr2fma1adj.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2008 src/math/sqrt-neonfma-nr3fma.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2009
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]2010SET(PROD_AARCH64_NEON_MICROKERNEL_SRCS
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2011 src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c
2012 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c
2013 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c
2014 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c
2015 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c
2016 src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c
2017 src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c
2018 src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c
2019 src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c
2020 src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c
2021 src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c
2022 src/f32-spmm/gen/32x2-minmax-neonfma.c
2023 src/f32-spmm/gen/32x4-minmax-neonfma.c
2024 src/f32-vbinary/gen/vdiv-minmax-neon-x8.c
2025 src/f32-vbinary/gen/vdivc-minmax-neon-x8.c
2026 src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c
Marat Dukhane4118ef2021-09-14 17:41:00 -0700[diff] [blame]2027 src/f32-vsqrt/gen/neon-sqrt-x4.c
2028 src/x8-lut/gen/lut-neon-tbx128x4-x64.c)
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2029
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]2030SET(ALL_AARCH64_NEON_MICROKERNEL_SRCS
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]2031 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2032 src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2033 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2034 src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c
Marat Dukhanfdaf9ae2020-05-23 00:25:12 -0700[diff] [blame]2035 src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2036 src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2037 src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]2038 src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]2039 src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2040 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c
2041 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c
2042 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c
Marat Dukhan1268a242020-10-24 00:36:32 -0700[diff] [blame]2043 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2044 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c
Marat Dukhan1268a242020-10-24 00:36:32 -0700[diff] [blame]2045 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c
2046 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c
2047 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c
2048 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c
2049 src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]2050 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c
2051 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c
2052 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2053 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c
Marat Dukhan82f0c322020-10-25 19:17:35 -0700[diff] [blame]2054 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2055 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c
2056 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c
2057 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2058 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c
2059 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c
2060 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c
2061 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2062 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2063 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c
2064 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2065 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2066 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2067 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c
Marat Dukhan149f0ea2020-10-26 12:50:33 -0700[diff] [blame]2068 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2069 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c
2070 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]2071 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c
2072 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c
2073 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c
2074 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c
2075 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c
2076 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c
2077 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c
2078 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c
Marat Dukhan30d4b252020-10-29 16:33:22 -0700[diff] [blame]2079 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2080 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2081 src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c
2082 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c
2083 src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c
2084 src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c
2085 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c
2086 src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c
2087 src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c
2088 src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c
2089 src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c
2090 src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c
2091 src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c
2092 src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c
2093 src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c
2094 src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c
2095 src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c
2096 src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c
2097 src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c
2098 src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c
2099 src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c
2100 src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]2101 src/f32-spmm/gen/4x2-minmax-neonfma.c
2102 src/f32-spmm/gen/4x4-minmax-neonfma.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]2103 src/f32-spmm/gen/8x2-minmax-neonfma.c
2104 src/f32-spmm/gen/8x4-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2105 src/f32-spmm/gen/12x2-minmax-neonfma.c
2106 src/f32-spmm/gen/12x4-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2107 src/f32-spmm/gen/16x2-minmax-neonfma.c
2108 src/f32-spmm/gen/16x4-minmax-neonfma.c
Frank Barchard846c0c62020-10-26 15:01:39 -0700[diff] [blame]2109 src/f32-spmm/gen/32x2-minmax-neonfma.c
2110 src/f32-spmm/gen/32x4-minmax-neonfma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2111 src/f32-vbinary/gen/vdiv-minmax-neon-x4.c
2112 src/f32-vbinary/gen/vdiv-minmax-neon-x8.c
2113 src/f32-vbinary/gen/vdivc-minmax-neon-x4.c
2114 src/f32-vbinary/gen/vdivc-minmax-neon-x8.c
2115 src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c
2116 src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2117 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c
2118 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c
2119 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c
2120 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c
2121 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c
2122 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c
2123 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c
2124 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c
2125 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c
2126 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c
2127 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c
2128 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c
2129 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c
2130 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c
2131 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c
2132 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c
2133 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c
2134 src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]2135 src/f32-vsqrt/gen/neon-sqrt-x4.c
2136 src/f32-vsqrt/gen/neon-sqrt-x8.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2137 src/math/sigmoid-neonfma-rr1-lut64-p2-div.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2138 src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2139 src/math/sigmoid-neonfma-rr1-p5-div.c
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]2140 src/math/sigmoid-neonfma-rr2-lut64-p2-div.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2141 src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]2142 src/math/sigmoid-neonfma-rr2-p5-div.c
2143 src/x8-lut/gen/lut-neon-tbx128x4-x16.c
2144 src/x8-lut/gen/lut-neon-tbx128x4-x32.c
2145 src/x8-lut/gen/lut-neon-tbx128x4-x48.c
2146 src/x8-lut/gen/lut-neon-tbx128x4-x64.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2147
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2148SET(PROD_NEONV8_MICROKERNEL_SRCS
2149 src/f32-vrnd/gen/vrndd-neonv8-x8.c
2150 src/f32-vrnd/gen/vrndne-neonv8-x8.c
2151 src/f32-vrnd/gen/vrndu-neonv8-x8.c
2152 src/f32-vrnd/gen/vrndz-neonv8-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2153 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c
Frank Barchard7da8b022021-08-31 09:49:10 -0700[diff] [blame]2154 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c
2155 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2156 src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2157 src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c
2158 src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2159 src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2160 src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c
2161 src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2162 src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2163 src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c
2164 src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2165 src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2166 src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]2167 src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2168 src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2169 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c
2170 src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2171 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2172
2173SET(ALL_NEONV8_MICROKERNEL_SRCS
2174 src/f32-vrnd/gen/vrndd-neonv8-x4.c
2175 src/f32-vrnd/gen/vrndd-neonv8-x8.c
2176 src/f32-vrnd/gen/vrndne-neonv8-x4.c
2177 src/f32-vrnd/gen/vrndne-neonv8-x8.c
2178 src/f32-vrnd/gen/vrndu-neonv8-x4.c
2179 src/f32-vrnd/gen/vrndu-neonv8-x8.c
2180 src/f32-vrnd/gen/vrndz-neonv8-x4.c
2181 src/f32-vrnd/gen/vrndz-neonv8-x8.c
2182 src/math/roundd-neonv8.c
2183 src/math/roundne-neonv8.c
2184 src/math/roundu-neonv8.c
2185 src/math/roundz-neonv8.c
2186 src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c
2187 src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8-ld64.c
2188 src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c
2189 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c
2190 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8-ld64.c
2191 src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c
2192 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c
2193 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld128.c
2194 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld64.c
2195 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c
2196 src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c
2197 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c
2198 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c
2199 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld64.c
2200 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld128.c
2201 src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c
2202 src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c
2203 src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c
2204 src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c
2205 src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c
2206 src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2207 src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c
2208 src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2209 src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2210 src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c
2211 src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2212 src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2213 src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c
2214 src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2215 src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2216 src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c
2217 src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2218 src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c
2219 src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c
2220 src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c
2221 src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c
2222 src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c
2223 src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c
2224 src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c
2225 src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c
2226 src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2227 src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c
2228 src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2229 src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2230 src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c
2231 src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2232 src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2233 src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal-padal.c
2234 src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2235 src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-padal-dup.c
2236 src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal-padal.c
2237 src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]2238 src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c
2239 src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2240 src/qs8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c
2241 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c
2242 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c
2243 src/qs8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2244 src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c
2245 src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c
2246 src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c
2247 src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c
2248 src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c
2249 src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c
2250 src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c
2251 src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c
2252 src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
2253 src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2254 src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c
Marat Dukhan4a7b70f2021-08-02 18:18:10 -0700[diff] [blame]2255 src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c
2256 src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c
2257 src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c
2258 src/qu8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c
2259 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c
2260 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c
2261 src/qu8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2262
2263SET(PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS
2264 src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c
2265 src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c
2266 src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c
2267 src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c
2268 src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c
2269 src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c
2270 src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c
2271 src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c
2272 src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c
2273 src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c
2274 src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c
2275 src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c
2276 src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c
2277 src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c
2278 src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c)
2279
2280SET(ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]2281 src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c
2282 src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c
2283 src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c
2284 src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2285 src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c
2286 src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c
2287 src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c
2288 src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c
2289 src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c
2290 src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c
2291 src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c
2292 src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c
Frank Barchardc9f9d672021-10-18 12:51:59 -0700[diff] [blame^]2293 src/f16-dwconv/gen/up32x4-minmax-neonfp16arith-acc2.c
2294 src/f16-dwconv/gen/up32x4-minmax-neonfp16arith.c
2295 src/f16-dwconv/gen/up32x9-minmax-neonfp16arith-acc2.c
2296 src/f16-dwconv/gen/up32x9-minmax-neonfp16arith.c
2297 src/f16-dwconv/gen/up32x25-minmax-neonfp16arith-acc2.c
2298 src/f16-dwconv/gen/up32x25-minmax-neonfp16arith.c
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]2299 src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c
2300 src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]2301 src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2302 src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2303 src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2304 src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2305 src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2306 src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2307 src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2308 src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2309 src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c
2310 src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c
2311 src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c
2312 src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c
2313 src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c
2314 src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c
2315 src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c
2316 src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2317 src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2318 src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2319 src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2320 src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2321 src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2322 src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2323 src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]2324 src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2325 src/f16-prelu/gen/neonfp16arith-2x8.c
2326 src/f16-prelu/gen/neonfp16arith-2x16.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2327 src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2328 src/f16-spmm/gen/8x1-minmax-neonfp16arith.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2329 src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2330 src/f16-spmm/gen/16x1-minmax-neonfp16arith.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2331 src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2332 src/f16-spmm/gen/24x1-minmax-neonfp16arith.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]2333 src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]2334 src/f16-spmm/gen/32x1-minmax-neonfp16arith.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2335 src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c
2336 src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c
2337 src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c
2338 src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c
2339 src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c
2340 src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c
2341 src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c
2342 src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c
2343 src/f16-vbinary/gen/vmax-neonfp16arith-x8.c
2344 src/f16-vbinary/gen/vmax-neonfp16arith-x16.c
2345 src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c
2346 src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c
2347 src/f16-vbinary/gen/vmin-neonfp16arith-x8.c
2348 src/f16-vbinary/gen/vmin-neonfp16arith-x16.c
2349 src/f16-vbinary/gen/vminc-neonfp16arith-x8.c
2350 src/f16-vbinary/gen/vminc-neonfp16arith-x16.c
2351 src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c
2352 src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c
2353 src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c
2354 src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c
2355 src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c
2356 src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c
2357 src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c
2358 src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c
2359 src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c
2360 src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c
2361 src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c
2362 src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2363 src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c
2364 src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]2365 src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c
2366 src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2367 src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]2368 src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2369 src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c
2370 src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2371
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2372SET(PROD_NEONDOT_MICROKERNEL_SRCS
2373 src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c
2374 src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c
2375 src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c
2376 src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c
2377 src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c
2378 src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c
2379 src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c
2380 src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c
2381 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
2382 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
2383 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c
2384 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
2385 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
2386 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
2387 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c
Frank Barchard20255152021-08-11 14:01:45 -0700[diff] [blame]2388 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barchard8b698022021-08-26 11:17:32 -0700[diff] [blame]2389 src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
Frank Barchardde9c64a2021-08-17 18:32:50 -0700[diff] [blame]2390 src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
2391 src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c
2392 src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barchard8b698022021-08-26 11:17:32 -0700[diff] [blame]2393 src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
Frank Barchardde9c64a2021-08-17 18:32:50 -0700[diff] [blame]2394 src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
2395 src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c
2396 src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2397
2398SET(ALL_NEONDOT_MICROKERNEL_SRCS
Marat Dukhane76478b2021-06-28 16:35:40 -0700[diff] [blame]2399 src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c
2400 src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c
2401 src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c
2402 src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c
2403 src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c
2404 src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c
2405 src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c
2406 src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c
2407 src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c
2408 src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c
2409 src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c
2410 src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c
2411 src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c
2412 src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c
2413 src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c
2414 src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c
Marat Dukhan18630de2021-06-02 22:20:01 -0700[diff] [blame]2415 src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c
2416 src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2417 src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2418 src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2419 src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2420 src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
Marat Dukhan4486f872021-08-07 15:22:50 -0700[diff] [blame]2421 src/qs8-gemm/gen/6x8c4-minmax-rndnu-neondot.c
2422 src/qs8-gemm/gen/6x16c4-minmax-rndnu-neondot.c
2423 src/qs8-gemm/gen/8x8c4-minmax-rndnu-neondot.c
2424 src/qs8-gemm/gen/8x16c4-minmax-rndnu-neondot.c
Marat Dukhan18630de2021-06-02 22:20:01 -0700[diff] [blame]2425 src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c
2426 src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2427 src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2428 src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2429 src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]2430 src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c
Marat Dukhan4486f872021-08-07 15:22:50 -0700[diff] [blame]2431 src/qs8-igemm/gen/6x8c4-minmax-rndnu-neondot.c
2432 src/qs8-igemm/gen/6x16c4-minmax-rndnu-neondot.c
2433 src/qs8-igemm/gen/8x8c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2434 src/qs8-igemm/gen/8x16c4-minmax-rndnu-neondot.c
2435 src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c
2436 src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2437 src/qu8-gemm/gen/1x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2438 src/qu8-gemm/gen/2x8c4-minmax-rndnu-neondot.c
2439 src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2440 src/qu8-gemm/gen/2x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2441 src/qu8-gemm/gen/3x8c4-minmax-rndnu-neondot.c
2442 src/qu8-gemm/gen/3x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2443 src/qu8-gemm/gen/3x32c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2444 src/qu8-gemm/gen/4x8c4-minmax-rndnu-neondot.c
2445 src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2446 src/qu8-gemm/gen/5x8c4-minmax-rndnu-neondot.c
2447 src/qu8-gemm/gen/5x16c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2448 src/qu8-gemm/gen/6x8c4-minmax-rndnu-neondot.c
2449 src/qu8-gemm/gen/6x16c4-minmax-rndnu-neondot.c
2450 src/qu8-gemm/gen/8x8c4-minmax-rndnu-neondot.c
2451 src/qu8-gemm/gen/8x16c4-minmax-rndnu-neondot.c
2452 src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c
2453 src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2454 src/qu8-igemm/gen/1x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2455 src/qu8-igemm/gen/2x8c4-minmax-rndnu-neondot.c
2456 src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2457 src/qu8-igemm/gen/2x32c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2458 src/qu8-igemm/gen/3x8c4-minmax-rndnu-neondot.c
2459 src/qu8-igemm/gen/3x16c4-minmax-rndnu-neondot.c
Frank Barchardcdf59a52021-09-08 13:55:24 -0700[diff] [blame]2460 src/qu8-igemm/gen/3x32c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2461 src/qu8-igemm/gen/4x8c4-minmax-rndnu-neondot.c
2462 src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c
Frank Barcharde0331262021-08-11 23:18:59 -0700[diff] [blame]2463 src/qu8-igemm/gen/5x8c4-minmax-rndnu-neondot.c
2464 src/qu8-igemm/gen/5x16c4-minmax-rndnu-neondot.c
Frank Barchard88e839c2021-08-11 00:12:31 -0700[diff] [blame]2465 src/qu8-igemm/gen/6x8c4-minmax-rndnu-neondot.c
2466 src/qu8-igemm/gen/6x16c4-minmax-rndnu-neondot.c
2467 src/qu8-igemm/gen/8x8c4-minmax-rndnu-neondot.c
2468 src/qu8-igemm/gen/8x16c4-minmax-rndnu-neondot.c)
Benoit Jacoba9644732020-08-13 12:48:55 -0700[diff] [blame]2469
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2470SET(PROD_SSE_MICROKERNEL_SRCS
2471 src/f32-avgpool/9p8x-minmax-sse-c4.c
2472 src/f32-avgpool/9x-minmax-sse-c4.c
2473 src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c
2474 src/f32-dwconv/gen/up8x4-minmax-sse.c
2475 src/f32-dwconv/gen/up8x9-minmax-sse.c
2476 src/f32-dwconv/gen/up8x25-minmax-sse.c
2477 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c
2478 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c
2479 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c
2480 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c
2481 src/f32-gavgpool-cw/sse-x4.c
2482 src/f32-gavgpool/7p7x-minmax-sse-c4.c
2483 src/f32-gavgpool/7x-minmax-sse-c4.c
2484 src/f32-gemm/gen/1x8-minmax-sse-load1.c
2485 src/f32-gemm/gen/4x2c4-minmax-sse.c
2486 src/f32-gemm/gen/4x8-minmax-sse-load1.c
2487 src/f32-ibilinear-chw/gen/sse-p8.c
2488 src/f32-ibilinear/gen/sse-c8.c
2489 src/f32-igemm/gen/1x8-minmax-sse-load1.c
2490 src/f32-igemm/gen/4x2c4-minmax-sse.c
2491 src/f32-igemm/gen/4x8-minmax-sse-load1.c
2492 src/f32-maxpool/9p8x-minmax-sse-c4.c
2493 src/f32-pavgpool/9p8x-minmax-sse-c4.c
2494 src/f32-pavgpool/9x-minmax-sse-c4.c
2495 src/f32-rmax/sse.c
2496 src/f32-spmm/gen/32x1-minmax-sse.c
2497 src/f32-vbinary/gen/vadd-minmax-sse-x8.c
2498 src/f32-vbinary/gen/vaddc-minmax-sse-x8.c
2499 src/f32-vbinary/gen/vdiv-minmax-sse-x8.c
2500 src/f32-vbinary/gen/vdivc-minmax-sse-x8.c
2501 src/f32-vbinary/gen/vmax-sse-x8.c
2502 src/f32-vbinary/gen/vmaxc-sse-x8.c
2503 src/f32-vbinary/gen/vmin-sse-x8.c
2504 src/f32-vbinary/gen/vminc-sse-x8.c
2505 src/f32-vbinary/gen/vmul-minmax-sse-x8.c
2506 src/f32-vbinary/gen/vmulc-minmax-sse-x8.c
2507 src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c
2508 src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c
2509 src/f32-vbinary/gen/vsqrdiff-sse-x8.c
2510 src/f32-vbinary/gen/vsqrdiffc-sse-x8.c
2511 src/f32-vbinary/gen/vsub-minmax-sse-x8.c
2512 src/f32-vbinary/gen/vsubc-minmax-sse-x8.c
2513 src/f32-vclamp/gen/vclamp-sse-x8.c
2514 src/f32-vhswish/gen/vhswish-sse-x8.c
2515 src/f32-vlrelu/gen/vlrelu-sse-x8.c
2516 src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c
2517 src/f32-vsqrt/gen/sse-sqrt-x4.c
2518 src/f32-vunary/gen/vabs-sse-x8.c
2519 src/f32-vunary/gen/vneg-sse-x8.c
2520 src/f32-vunary/gen/vsqr-sse-x8.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]2521 src/x32-packx/x4-sse.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2522
2523SET(ALL_SSE_MICROKERNEL_SRCS
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]2524 src/f32-avgpool/9p8x-minmax-sse-c4.c
2525 src/f32-avgpool/9x-minmax-sse-c4.c
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]2526 src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c
2527 src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2528 src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c
2529 src/f32-dwconv/gen/up4x4-minmax-sse.c
2530 src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c
2531 src/f32-dwconv/gen/up4x9-minmax-sse.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2532 src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c
2533 src/f32-dwconv/gen/up4x25-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2534 src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c
2535 src/f32-dwconv/gen/up8x4-minmax-sse.c
2536 src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c
2537 src/f32-dwconv/gen/up8x9-minmax-sse.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2538 src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c
2539 src/f32-dwconv/gen/up8x25-minmax-sse.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2540 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c
2541 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c
2542 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c
Marat Dukhan470078a2020-10-23 22:36:52 -0700[diff] [blame]2543 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2544 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c
Marat Dukhan470078a2020-10-23 22:36:52 -0700[diff] [blame]2545 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c
2546 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c
2547 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c
2548 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c
2549 src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c
Marat Dukhan0ff97182020-10-25 19:14:03 -0700[diff] [blame]2550 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c
2551 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c
2552 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2553 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c
Marat Dukhan0ff97182020-10-25 19:14:03 -0700[diff] [blame]2554 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]2555 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c
2556 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c
2557 src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c
Marat Dukhand0503892020-10-30 08:22:04 -0700[diff] [blame]2558 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c
2559 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c
2560 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c
2561 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c
2562 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c
2563 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c
2564 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c
2565 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c
2566 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c
2567 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c
2568 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c
2569 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c
2570 src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c
Marat Dukhanccca2142020-10-30 17:32:45 -0700[diff] [blame]2571 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c
2572 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c
2573 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c
2574 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c
2575 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c
2576 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c
2577 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c
2578 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c
Marat Dukhanccca2142020-10-30 17:32:45 -0700[diff] [blame]2579 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c
Frank Barchard9cef5ea2020-11-18 14:52:08 -0800[diff] [blame]2580 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]2581 src/f32-gavgpool-cw/sse-x4.c
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]2582 src/f32-gavgpool/7p7x-minmax-sse-c4.c
2583 src/f32-gavgpool/7x-minmax-sse-c4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2584 src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c
2585 src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c
2586 src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2587 src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c
2588 src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c
2589 src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2590 src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c
2591 src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c
2592 src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2593 src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c
2594 src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c
2595 src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2596 src/f32-gemm/gen/1x8-minmax-sse-dup.c
2597 src/f32-gemm/gen/1x8-minmax-sse-load1.c
2598 src/f32-gemm/gen/1x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2599 src/f32-gemm/gen/3x8-minmax-sse-dup.c
2600 src/f32-gemm/gen/3x8-minmax-sse-load1.c
2601 src/f32-gemm/gen/3x8s4-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2602 src/f32-gemm/gen/4x2c4-minmax-sse.c
2603 src/f32-gemm/gen/4x8-minmax-sse-dup.c
2604 src/f32-gemm/gen/4x8-minmax-sse-load1.c
2605 src/f32-gemm/gen/4x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2606 src/f32-gemm/gen/5x8-minmax-sse-dup.c
2607 src/f32-gemm/gen/5x8-minmax-sse-load1.c
2608 src/f32-gemm/gen/5x8s4-minmax-sse.c
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -0700[diff] [blame]2609 src/f32-ibilinear-chw/gen/sse-p4.c
2610 src/f32-ibilinear-chw/gen/sse-p8.c
Frank Barchard4a352042021-04-13 15:52:08 -0700[diff] [blame]2611 src/f32-ibilinear/gen/sse-c4.c
2612 src/f32-ibilinear/gen/sse-c8.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2613 src/f32-igemm/gen/1x8-minmax-sse-dup.c
2614 src/f32-igemm/gen/1x8-minmax-sse-load1.c
2615 src/f32-igemm/gen/1x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2616 src/f32-igemm/gen/3x8-minmax-sse-dup.c
2617 src/f32-igemm/gen/3x8-minmax-sse-load1.c
2618 src/f32-igemm/gen/3x8s4-minmax-sse.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2619 src/f32-igemm/gen/4x2c4-minmax-sse.c
2620 src/f32-igemm/gen/4x8-minmax-sse-dup.c
2621 src/f32-igemm/gen/4x8-minmax-sse-load1.c
2622 src/f32-igemm/gen/4x8s4-minmax-sse.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2623 src/f32-igemm/gen/5x8-minmax-sse-dup.c
2624 src/f32-igemm/gen/5x8-minmax-sse-load1.c
2625 src/f32-igemm/gen/5x8s4-minmax-sse.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]2626 src/f32-maxpool/9p8x-minmax-sse-c4.c
2627 src/f32-pavgpool/9p8x-minmax-sse-c4.c
2628 src/f32-pavgpool/9x-minmax-sse-c4.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2629 src/f32-ppmm/gen/4x8-minmax-sse.c
Marat Dukhan39b5e942020-06-24 15:03:48 -0700[diff] [blame]2630 src/f32-prelu/gen/sse-2x4.c
2631 src/f32-prelu/gen/sse-2x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2632 src/f32-rmax/sse.c
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]2633 src/f32-spmm/gen/4x1-minmax-sse.c
2634 src/f32-spmm/gen/8x1-minmax-sse.c
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]2635 src/f32-spmm/gen/16x1-minmax-sse.c
Frank Barchard846c0c62020-10-26 15:01:39 -0700[diff] [blame]2636 src/f32-spmm/gen/32x1-minmax-sse.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]2637 src/f32-vbinary/gen/vadd-minmax-sse-x4.c
2638 src/f32-vbinary/gen/vadd-minmax-sse-x8.c
2639 src/f32-vbinary/gen/vaddc-minmax-sse-x4.c
2640 src/f32-vbinary/gen/vaddc-minmax-sse-x8.c
2641 src/f32-vbinary/gen/vdiv-minmax-sse-x4.c
2642 src/f32-vbinary/gen/vdiv-minmax-sse-x8.c
2643 src/f32-vbinary/gen/vdivc-minmax-sse-x4.c
2644 src/f32-vbinary/gen/vdivc-minmax-sse-x8.c
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]2645 src/f32-vbinary/gen/vmax-sse-x4.c
2646 src/f32-vbinary/gen/vmax-sse-x8.c
2647 src/f32-vbinary/gen/vmaxc-sse-x4.c
2648 src/f32-vbinary/gen/vmaxc-sse-x8.c
2649 src/f32-vbinary/gen/vmin-sse-x4.c
2650 src/f32-vbinary/gen/vmin-sse-x8.c
2651 src/f32-vbinary/gen/vminc-sse-x4.c
2652 src/f32-vbinary/gen/vminc-sse-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]2653 src/f32-vbinary/gen/vmul-minmax-sse-x4.c
2654 src/f32-vbinary/gen/vmul-minmax-sse-x8.c
2655 src/f32-vbinary/gen/vmulc-minmax-sse-x4.c
2656 src/f32-vbinary/gen/vmulc-minmax-sse-x8.c
2657 src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c
2658 src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c
2659 src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c
2660 src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]2661 src/f32-vbinary/gen/vsqrdiff-sse-x4.c
2662 src/f32-vbinary/gen/vsqrdiff-sse-x8.c
2663 src/f32-vbinary/gen/vsqrdiffc-sse-x4.c
2664 src/f32-vbinary/gen/vsqrdiffc-sse-x8.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]2665 src/f32-vbinary/gen/vsub-minmax-sse-x4.c
2666 src/f32-vbinary/gen/vsub-minmax-sse-x8.c
2667 src/f32-vbinary/gen/vsubc-minmax-sse-x4.c
2668 src/f32-vbinary/gen/vsubc-minmax-sse-x8.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]2669 src/f32-vclamp/gen/vclamp-sse-x4.c
2670 src/f32-vclamp/gen/vclamp-sse-x8.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]2671 src/f32-vhswish/gen/vhswish-sse-x4.c
2672 src/f32-vhswish/gen/vhswish-sse-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2673 src/f32-vlrelu/gen/vlrelu-sse-x4.c
2674 src/f32-vlrelu/gen/vlrelu-sse-x8.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]2675 src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c
2676 src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]2677 src/f32-vrelu/gen/vrelu-sse-x4.c
2678 src/f32-vrelu/gen/vrelu-sse-x8.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]2679 src/f32-vsqrt/gen/sse-sqrt-x4.c
2680 src/f32-vsqrt/gen/sse-sqrt-x8.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]2681 src/f32-vunary/gen/vabs-sse-x4.c
2682 src/f32-vunary/gen/vabs-sse-x8.c
2683 src/f32-vunary/gen/vneg-sse-x4.c
2684 src/f32-vunary/gen/vneg-sse-x8.c
2685 src/f32-vunary/gen/vsqr-sse-x4.c
2686 src/f32-vunary/gen/vsqr-sse-x8.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]2687 src/math/roundd-sse-addsub.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2688 src/math/roundne-sse-addsub.c
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]2689 src/math/roundu-sse-addsub.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2690 src/math/roundz-sse-addsub.c
2691 src/math/sqrt-sse-hh1mac.c
2692 src/math/sqrt-sse-nr1mac.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2693 src/math/sqrt-sse-nr2mac.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]2694 src/x32-packx/x4-sse.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]2695
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2696SET(PROD_SSE2_MICROKERNEL_SRCS
2697 src/f32-argmaxpool/4x-sse2-c4.c
2698 src/f32-argmaxpool/9p8x-sse2-c4.c
2699 src/f32-argmaxpool/9x-sse2-c4.c
2700 src/f32-prelu/gen/sse2-2x8.c
2701 src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c
2702 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c
2703 src/f32-vlrelu/gen/vlrelu-sse2-x8.c
2704 src/f32-vrnd/gen/vrndd-sse2-x8.c
2705 src/f32-vrnd/gen/vrndne-sse2-x8.c
2706 src/f32-vrnd/gen/vrndu-sse2-x8.c
2707 src/f32-vrnd/gen/vrndz-sse2-x8.c
2708 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c
2709 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
2710 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
2711 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2712 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2713 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2714 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2715 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c
2716 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c
2717 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c
2718 src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c
2719 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2720 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2721 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2722 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2723 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
2724 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]2725 src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
2726 src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2727 src/qu8-avgpool/9p8x-minmax-sse2-c8.c
2728 src/qu8-avgpool/9x-minmax-sse2-c8.c
2729 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
2730 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
2731 src/qu8-gavgpool/7p7x-minmax-sse2-c8.c
2732 src/qu8-gavgpool/7x-minmax-sse2-c8.c
2733 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2734 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2735 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2736 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2737 src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
2738 src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]2739 src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
2740 src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]2741 src/s8-maxpool/9p8x-minmax-sse2-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]2742 src/s8-vclamp/sse2-x64.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2743 src/u8-maxpool/9p8x-minmax-sse2-c16.c
2744 src/u8-rmax/sse2.c
2745 src/u8-vclamp/sse2-x64.c
2746 src/x8-zip/x2-sse2.c
2747 src/x8-zip/x3-sse2.c
2748 src/x8-zip/x4-sse2.c
2749 src/x8-zip/xm-sse2.c
2750 src/x32-unpool/sse2.c
2751 src/x32-zip/x2-sse2.c
2752 src/x32-zip/x3-sse2.c
2753 src/x32-zip/x4-sse2.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]2754 src/x32-zip/xm-sse2.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]2755 src/xx-fill/sse2-x64.c
2756 src/xx-pad/sse2.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]2757
2758SET(ALL_SSE2_MICROKERNEL_SRCS
Marat Dukhan1227adb2021-10-16 17:33:51 -0700[diff] [blame]2759 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x8.c
2760 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x16.c
2761 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x24.c
2762 src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c
2763 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x8.c
2764 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x16.c
2765 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x24.c
2766 src/f16-f32-vcvt/gen/vcvt-sse2-int32-x32.c
Ashkan Aliabadif866a452019-11-20 10:58:51 -0800[diff] [blame]2767 src/f32-argmaxpool/4x-sse2-c4.c
2768 src/f32-argmaxpool/9p8x-sse2-c4.c
2769 src/f32-argmaxpool/9x-sse2-c4.c
Marat Dukhan802fcae2020-12-11 14:37:25 -0800[diff] [blame]2770 src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c
2771 src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c
2772 src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c
2773 src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c
2774 src/f32-gemm/gen/1x8-minmax-sse2-dup.c
2775 src/f32-gemm/gen/3x8-minmax-sse2-dup.c
2776 src/f32-gemm/gen/4x8-minmax-sse2-dup.c
2777 src/f32-gemm/gen/5x8-minmax-sse2-dup.c
2778 src/f32-igemm/gen/1x8-minmax-sse2-dup.c
2779 src/f32-igemm/gen/3x8-minmax-sse2-dup.c
2780 src/f32-igemm/gen/4x8-minmax-sse2-dup.c
2781 src/f32-igemm/gen/5x8-minmax-sse2-dup.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]2782 src/f32-prelu/gen/sse2-2x4.c
2783 src/f32-prelu/gen/sse2-2x8.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]2784 src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]2785 src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2786 src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]2787 src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c
2788 src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2789 src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]2790 src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c
2791 src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2792 src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]2793 src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c
2794 src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2795 src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]2796 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c
2797 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c
2798 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c
2799 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c
2800 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c
2801 src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c
2802 src/f32-velu/gen/velu-sse2-rr2-p6-x4.c
2803 src/f32-velu/gen/velu-sse2-rr2-p6-x8.c
2804 src/f32-velu/gen/velu-sse2-rr2-p6-x12.c
2805 src/f32-velu/gen/velu-sse2-rr2-p6-x16.c
2806 src/f32-velu/gen/velu-sse2-rr2-p6-x20.c
2807 src/f32-velu/gen/velu-sse2-rr2-p6-x24.c
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700[diff] [blame]2808 src/f32-vlrelu/gen/vlrelu-sse2-x4.c
2809 src/f32-vlrelu/gen/vlrelu-sse2-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]2810 src/f32-vrnd/gen/vrndd-sse2-x4.c
2811 src/f32-vrnd/gen/vrndd-sse2-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2812 src/f32-vrnd/gen/vrndne-sse2-x4.c
2813 src/f32-vrnd/gen/vrndne-sse2-x8.c
2814 src/f32-vrnd/gen/vrndu-sse2-x4.c
2815 src/f32-vrnd/gen/vrndu-sse2-x8.c
2816 src/f32-vrnd/gen/vrndz-sse2-x4.c
2817 src/f32-vrnd/gen/vrndz-sse2-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]2818 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c
2819 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c
2820 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c
2821 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c
2822 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c
2823 src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c
2824 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c
2825 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c
2826 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c
2827 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c
2828 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c
2829 src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]2830 src/math/cvt-f16-f32-sse2-int16.c
2831 src/math/cvt-f16-f32-sse2-int32.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]2832 src/math/exp-sse2-rr2-lut64-p2.c
2833 src/math/exp-sse2-rr2-p5.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]2834 src/math/expm1minus-sse2-rr2-lut16-p3.c
Marat Dukhana438aca2020-11-20 15:45:01 -0800[diff] [blame]2835 src/math/expm1minus-sse2-rr2-p6.c
Frank Barchard22136062020-11-24 18:44:46 -0800[diff] [blame]2836 src/math/expminus-sse2-rr2-p5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]2837 src/math/roundd-sse2-cvt.c
2838 src/math/roundne-sse2-cvt.c
2839 src/math/roundu-sse2-cvt.c
2840 src/math/roundz-sse2-cvt.c
2841 src/math/sigmoid-sse2-rr2-lut64-p2-div.c
2842 src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c
2843 src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c
2844 src/math/sigmoid-sse2-rr2-p5-div.c
2845 src/math/sigmoid-sse2-rr2-p5-nr1.c
2846 src/math/sigmoid-sse2-rr2-p5-nr2.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2847 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2848 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2849 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2850 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2851 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2852 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2853 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2854 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]2855 src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c
2856 src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2857 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2858 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2859 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2860 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
2861 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
2862 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
2863 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
2864 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
2865 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
2866 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
2867 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2868 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
2869 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
2870 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2871 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2872 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2873 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2874 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2875 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2876 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2877 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2878 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2879 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2880 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2881 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2882 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]2883 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2884 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2885 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2886 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]2887 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2888 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2889 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2890 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2891 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2892 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2893 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]2894 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]2895 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2896 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c
2897 src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c
2898 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c
2899 src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c
2900 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c
Marat Dukhan453f4b82020-08-07 22:24:21 -0700[diff] [blame]2901 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c
2902 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c
2903 src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]2904 src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c
2905 src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c
2906 src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2907 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2908 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]2909 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2910 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2911 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]2912 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2913 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2914 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]2915 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2916 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2917 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2918 src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]2919 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2920 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2921 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]2922 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2923 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2924 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]2925 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2926 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2927 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2928 src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]2929 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2930 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2931 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2932 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2933 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2934 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2935 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2936 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2937 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2938 src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2939 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2940 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2941 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2942 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2943 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]2944 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]2945 src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]2946 src/qs8-requantization/fp32-sse2.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]2947 src/qs8-requantization/gemmlowp-sse2.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]2948 src/qs8-requantization/rndna-sse2.c
Marat Dukhand9f3ad42020-08-10 12:30:58 -0700[diff] [blame]2949 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
2950 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
2951 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c
2952 src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]2953 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
2954 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
2955 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c
2956 src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]2957 src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
2958 src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c
2959 src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
2960 src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]2961 src/qu8-avgpool/9p8x-minmax-sse2-c8.c
2962 src/qu8-avgpool/9x-minmax-sse2-c8.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]2963 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c
2964 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c
2965 src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c
2966 src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]2967 src/qu8-gavgpool/7p7x-minmax-sse2-c8.c
2968 src/qu8-gavgpool/7x-minmax-sse2-c8.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]2969 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
2970 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
2971 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2972 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
2973 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
2974 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
2975 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
2976 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]2977 src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]2978 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
2979 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
2980 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2981 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
2982 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
2983 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]2984 src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]2985 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c
2986 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c
2987 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c
2988 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c
2989 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c
2990 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c
2991 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c
2992 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]2993 src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]2994 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c
2995 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c
2996 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c
2997 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c
2998 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c
2999 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3000 src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]3001 src/qu8-requantization/fp32-sse2.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3002 src/qu8-requantization/gemmlowp-sse2.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3003 src/qu8-requantization/rndna-sse2.c
Marat Dukhan28c82b22021-07-21 13:48:45 -0700[diff] [blame]3004 src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c
3005 src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c
3006 src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c
3007 src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3008 src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3009 src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c
3010 src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c
3011 src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]3012 src/s8-maxpool/9p8x-minmax-sse2-c16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]3013 src/s8-vclamp/sse2-x64.c
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3014 src/u8-maxpool/9p8x-minmax-sse2-c16.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3015 src/u8-rmax/sse2.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]3016 src/u8-vclamp/sse2-x64.c
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3017 src/x8-zip/x2-sse2.c
3018 src/x8-zip/x3-sse2.c
3019 src/x8-zip/x4-sse2.c
Marat Dukhan9d501d52019-11-16 02:30:50 -0800[diff] [blame]3020 src/x8-zip/xm-sse2.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3021 src/x32-unpool/sse2.c
3022 src/x32-zip/x2-sse2.c
3023 src/x32-zip/x3-sse2.c
3024 src/x32-zip/x4-sse2.c
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]3025 src/x32-zip/xm-sse2.c
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]3026 src/xx-fill/sse2-x64.c
3027 src/xx-pad/sse2.c)
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3028
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3029SET(PROD_SSSE3_MICROKERNEL_SRCS
3030 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c
3031 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c
3032 src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c)
3033
3034SET(ALL_SSSE3_MICROKERNEL_SRCS
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3035 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c
3036 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c
3037 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c
Marat Dukhan98f2eeb2020-10-23 23:13:41 -0700[diff] [blame]3038 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c
Frank Barchard35db7d02020-10-26 13:37:34 -0700[diff] [blame]3039 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c
Marat Dukhan98f2eeb2020-10-23 23:13:41 -0700[diff] [blame]3040 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c
3041 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c
3042 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c
3043 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c
3044 src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]3045 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3046 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-ssse3-mul16.c
3047 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c
3048 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c
3049 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c
3050 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c
Marat Dukhan453f4b82020-08-07 22:24:21 -0700[diff] [blame]3051 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c
3052 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c
3053 src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]3054 src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c
3055 src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c
3056 src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3057 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3058 src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3059 src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3060 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3061 src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3062 src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3063 src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3064 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3065 src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3066 src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3067 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-ssse3.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3068 src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3069 src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3070 src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3071 src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3072 src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3073 src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3074 src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3075 src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3076 src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3077 src/qs8-requantization/gemmlowp-ssse3.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3078 src/qs8-requantization/rndna-ssse3.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3079 src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c
3080 src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c
3081 src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c
3082 src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3083 src/qu8-requantization/gemmlowp-ssse3.c
Marat Dukhan7c478e32021-09-10 09:48:13 -0700[diff] [blame]3084 src/qu8-requantization/rndna-ssse3.c
3085 src/x8-lut/gen/lut-ssse3-x16.c
3086 src/x8-lut/gen/lut-ssse3-x32.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3087
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3088SET(PROD_SSE41_MICROKERNEL_SRCS
3089 src/f32-prelu/gen/sse41-2x8.c
3090 src/f32-vlrelu/gen/vlrelu-sse41-x8.c
3091 src/f32-vrnd/gen/vrndd-sse41-x8.c
3092 src/f32-vrnd/gen/vrndne-sse41-x8.c
3093 src/f32-vrnd/gen/vrndu-sse41-x8.c
3094 src/f32-vrnd/gen/vrndz-sse41-x8.c
3095 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c
3096 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
3097 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
3098 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3099 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3100 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3101 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3102 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c
3103 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c
3104 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c
3105 src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c
3106 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3107 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3108 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3109 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3110 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
3111 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3112 src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
3113 src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3114 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
3115 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
3116 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3117 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3118 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3119 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3120 src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3121 src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
3122 src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]3123 src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]3124 src/s8-maxpool/9p8x-minmax-sse41-c16.c
3125 src/s8-vclamp/sse41-x64.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3126
3127SET(ALL_SSE41_MICROKERNEL_SRCS
Marat Dukhan1227adb2021-10-16 17:33:51 -0700[diff] [blame]3128 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x8.c
3129 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c
3130 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x24.c
3131 src/f16-f32-vcvt/gen/vcvt-sse41-int16-x32.c
3132 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x8.c
3133 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x16.c
3134 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x24.c
3135 src/f16-f32-vcvt/gen/vcvt-sse41-int32-x32.c
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]3136 src/f32-prelu/gen/sse41-2x4.c
3137 src/f32-prelu/gen/sse41-2x8.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]3138 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c
3139 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c
3140 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c
3141 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c
3142 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c
3143 src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c
3144 src/f32-velu/gen/velu-sse41-rr2-p6-x4.c
3145 src/f32-velu/gen/velu-sse41-rr2-p6-x8.c
3146 src/f32-velu/gen/velu-sse41-rr2-p6-x12.c
3147 src/f32-velu/gen/velu-sse41-rr2-p6-x16.c
3148 src/f32-velu/gen/velu-sse41-rr2-p6-x20.c
3149 src/f32-velu/gen/velu-sse41-rr2-p6-x24.c
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700[diff] [blame]3150 src/f32-vlrelu/gen/vlrelu-sse41-x4.c
3151 src/f32-vlrelu/gen/vlrelu-sse41-x8.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]3152 src/f32-vrnd/gen/vrndd-sse41-x4.c
3153 src/f32-vrnd/gen/vrndd-sse41-x8.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3154 src/f32-vrnd/gen/vrndne-sse41-x4.c
3155 src/f32-vrnd/gen/vrndne-sse41-x8.c
3156 src/f32-vrnd/gen/vrndu-sse41-x4.c
3157 src/f32-vrnd/gen/vrndu-sse41-x8.c
3158 src/f32-vrnd/gen/vrndz-sse41-x4.c
3159 src/f32-vrnd/gen/vrndz-sse41-x8.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]3160 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c
3161 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c
3162 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c
3163 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c
3164 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c
3165 src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c
3166 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c
3167 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c
3168 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c
3169 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c
3170 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c
3171 src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]3172 src/math/cvt-f16-f32-sse41-int16.c
3173 src/math/cvt-f16-f32-sse41-int32.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3174 src/math/roundd-sse41.c
3175 src/math/roundne-sse41.c
3176 src/math/roundu-sse41.c
3177 src/math/roundz-sse41.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3178 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3179 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3180 src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3181 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3182 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3183 src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3184 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3185 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3186 src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3187 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3188 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3189 src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c
3190 src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c
3191 src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c
3192 src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c
3193 src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3194 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3195 src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3196 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3197 src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3198 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3199 src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3200 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3201 src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3202 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3203 src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3204 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3205 src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3206 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3207 src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3208 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3209 src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3210 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3211 src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3212 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3213 src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3214 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3215 src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3216 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3217 src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3218 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3219 src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3220 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3221 src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3222 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3223 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]3224 src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c
3225 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c
3226 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3227 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3228 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3229 src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c
3230 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c
3231 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3232 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3233 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3234 src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c
3235 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c
3236 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3237 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3238 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3239 src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c
3240 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c
3241 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c
3242 src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c
3243 src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c
3244 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c
3245 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c
3246 src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c
3247 src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c
3248 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c
3249 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c
Marat Dukhan453f4b82020-08-07 22:24:21 -0700[diff] [blame]3250 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c
3251 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c
3252 src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]3253 src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c
3254 src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c
3255 src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3256 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3257 src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3258 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3259 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3260 src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3261 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3262 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3263 src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3264 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3265 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3266 src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3267 src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3268 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3269 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3270 src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3271 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3272 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3273 src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3274 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3275 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3276 src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3277 src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3278 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse41.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3279 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3280 src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3281 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3282 src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3283 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3284 src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3285 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3286 src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3287 src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3288 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3289 src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3290 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3291 src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3292 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3293 src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3294 src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700[diff] [blame]3295 src/qs8-requantization/fp32-sse4.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3296 src/qs8-requantization/gemmlowp-sse4.c
Marat Dukhan06716242021-05-26 15:56:39 -0700[diff] [blame]3297 src/qs8-requantization/rndna-sse4.c
Marat Dukhan0d979d52021-06-09 13:21:18 -0700[diff] [blame]3298 src/qs8-requantization/rndnu-sse4-sra.c
3299 src/qs8-requantization/rndnu-sse4-srl.c
Marat Dukhand9f3ad42020-08-10 12:30:58 -0700[diff] [blame]3300 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
3301 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
3302 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c
3303 src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c
Marat Dukhanbb9225e2020-09-06 22:40:56 -0700[diff] [blame]3304 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
3305 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
3306 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c
3307 src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]3308 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
3309 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
3310 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c
3311 src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c
Marat Dukhanbb9225e2020-09-06 22:40:56 -0700[diff] [blame]3312 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
3313 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
3314 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c
3315 src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3316 src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c
3317 src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
3318 src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c
3319 src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3320 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3321 src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3322 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3323 src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3324 src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3325 src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3326 src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3327 src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3328 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
3329 src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
3330 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3331 src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
3332 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
3333 src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
3334 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
3335 src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3336 src/qu8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3337 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
3338 src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
3339 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3340 src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
3341 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
3342 src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3343 src/qu8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3344 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c
3345 src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c
3346 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c
3347 src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c
3348 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c
3349 src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c
3350 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c
3351 src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3352 src/qu8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3353 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c
3354 src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c
3355 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c
3356 src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c
3357 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c
3358 src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c
Marat Dukhancdbe9a32021-07-01 23:52:04 -0700[diff] [blame]3359 src/qu8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c
Marat Dukhan9976cd82021-05-24 23:15:45 -0700[diff] [blame]3360 src/qu8-requantization/gemmlowp-sse4.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]3361 src/qu8-requantization/rndna-sse4.c
3362 src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c
3363 src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c
3364 src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c
3365 src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c
3366 src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c
3367 src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c
3368 src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3369 src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c
3370 src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c
3371 src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c
3372 src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]3373 src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]3374 src/s8-maxpool/9p8x-minmax-sse41-c16.c
3375 src/s8-vclamp/sse41-x64.c)
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]3376
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3377SET(PROD_AVX_MICROKERNEL_SRCS
3378 src/f32-dwconv/gen/up8x25-minmax-avx.c
3379 src/f32-dwconv/gen/up16x4-minmax-avx.c
3380 src/f32-dwconv/gen/up16x9-minmax-avx.c
3381 src/f32-gemm/gen/1x16-minmax-avx-broadcast.c
3382 src/f32-gemm/gen/5x16-minmax-avx-broadcast.c
3383 src/f32-igemm/gen/1x16-minmax-avx-broadcast.c
3384 src/f32-igemm/gen/5x16-minmax-avx-broadcast.c
3385 src/f32-prelu/gen/avx-2x16.c
3386 src/f32-vbinary/gen/vadd-minmax-avx-x16.c
3387 src/f32-vbinary/gen/vaddc-minmax-avx-x16.c
3388 src/f32-vbinary/gen/vdiv-minmax-avx-x16.c
3389 src/f32-vbinary/gen/vdivc-minmax-avx-x16.c
3390 src/f32-vbinary/gen/vmax-avx-x16.c
3391 src/f32-vbinary/gen/vmaxc-avx-x16.c
3392 src/f32-vbinary/gen/vmin-avx-x16.c
3393 src/f32-vbinary/gen/vminc-avx-x16.c
3394 src/f32-vbinary/gen/vmul-minmax-avx-x16.c
3395 src/f32-vbinary/gen/vmulc-minmax-avx-x16.c
3396 src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c
3397 src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c
3398 src/f32-vbinary/gen/vsqrdiff-avx-x16.c
3399 src/f32-vbinary/gen/vsqrdiffc-avx-x16.c
3400 src/f32-vbinary/gen/vsub-minmax-avx-x16.c
3401 src/f32-vbinary/gen/vsubc-minmax-avx-x16.c
3402 src/f32-vclamp/gen/vclamp-avx-x16.c
3403 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c
3404 src/f32-vhswish/gen/vhswish-avx-x16.c
3405 src/f32-vlrelu/gen/vlrelu-avx-x16.c
3406 src/f32-vrnd/gen/vrndd-avx-x16.c
3407 src/f32-vrnd/gen/vrndne-avx-x16.c
3408 src/f32-vrnd/gen/vrndu-avx-x16.c
3409 src/f32-vrnd/gen/vrndz-avx-x16.c
3410 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c
3411 src/f32-vsqrt/gen/avx-sqrt-x8.c
3412 src/f32-vunary/gen/vabs-avx-x16.c
3413 src/f32-vunary/gen/vneg-avx-x16.c
3414 src/f32-vunary/gen/vsqr-avx-x16.c
Marat Dukhan28480592021-07-27 23:52:27 -0700[diff] [blame]3415 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
3416 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3417 src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3418 src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3419 src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3420 src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3421 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
3422 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
3423 src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3424 src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3425 src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3426 src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3427 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c
3428 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3429 src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
3430 src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3431 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
3432 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
3433 src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3434 src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3435 src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3436 src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3437 src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700[diff] [blame]3438 src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
3439 src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
Marat Dukhan98e054b2021-09-13 09:43:50 -0700[diff] [blame]3440 src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
3441 src/x8-lut/gen/lut-avx-x64.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3442
3443SET(ALL_AVX_MICROKERNEL_SRCS
Marat Dukhan1227adb2021-10-16 17:33:51 -0700[diff] [blame]3444 src/f16-f32-vcvt/gen/vcvt-avx-int16-x8.c
3445 src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c
3446 src/f16-f32-vcvt/gen/vcvt-avx-int16-x24.c
3447 src/f16-f32-vcvt/gen/vcvt-avx-int16-x32.c
3448 src/f16-f32-vcvt/gen/vcvt-avx-int32-x8.c
3449 src/f16-f32-vcvt/gen/vcvt-avx-int32-x16.c
3450 src/f16-f32-vcvt/gen/vcvt-avx-int32-x24.c
3451 src/f16-f32-vcvt/gen/vcvt-avx-int32-x32.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3452 src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c
3453 src/f32-dwconv/gen/up8x4-minmax-avx.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3454 src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c
3455 src/f32-dwconv/gen/up8x9-minmax-avx.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3456 src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c
3457 src/f32-dwconv/gen/up8x25-minmax-avx.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3458 src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c
3459 src/f32-dwconv/gen/up16x4-minmax-avx.c
3460 src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c
3461 src/f32-dwconv/gen/up16x9-minmax-avx.c
3462 src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c
3463 src/f32-dwconv/gen/up16x25-minmax-avx.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3464 src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3465 src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c
3466 src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3467 src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3468 src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3469 src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3470 src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3471 src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c
3472 src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c
3473 src/f32-gemm/gen/1x8-minmax-avx-broadcast.c
3474 src/f32-gemm/gen/1x16-minmax-avx-broadcast.c
3475 src/f32-gemm/gen/3x16-minmax-avx-broadcast.c
3476 src/f32-gemm/gen/4x8-minmax-avx-broadcast.c
3477 src/f32-gemm/gen/4x16-minmax-avx-broadcast.c
3478 src/f32-gemm/gen/5x8-minmax-avx-broadcast.c
3479 src/f32-gemm/gen/5x16-minmax-avx-broadcast.c
3480 src/f32-gemm/gen/6x8-minmax-avx-broadcast.c
3481 src/f32-gemm/gen/7x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3482 src/f32-igemm/gen/1x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3483 src/f32-igemm/gen/1x16-minmax-avx-broadcast.c
3484 src/f32-igemm/gen/3x16-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3485 src/f32-igemm/gen/4x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3486 src/f32-igemm/gen/4x16-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3487 src/f32-igemm/gen/5x8-minmax-avx-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3488 src/f32-igemm/gen/5x16-minmax-avx-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3489 src/f32-igemm/gen/6x8-minmax-avx-broadcast.c
3490 src/f32-igemm/gen/7x8-minmax-avx-broadcast.c
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]3491 src/f32-prelu/gen/avx-2x8.c
3492 src/f32-prelu/gen/avx-2x16.c
Marat Dukhana5977df2019-10-30 22:02:15 -0700[diff] [blame]3493 src/f32-rmax/avx.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3494 src/f32-vbinary/gen/vadd-minmax-avx-x8.c
3495 src/f32-vbinary/gen/vadd-minmax-avx-x16.c
3496 src/f32-vbinary/gen/vaddc-minmax-avx-x8.c
3497 src/f32-vbinary/gen/vaddc-minmax-avx-x16.c
3498 src/f32-vbinary/gen/vdiv-minmax-avx-x8.c
3499 src/f32-vbinary/gen/vdiv-minmax-avx-x16.c
3500 src/f32-vbinary/gen/vdivc-minmax-avx-x8.c
3501 src/f32-vbinary/gen/vdivc-minmax-avx-x16.c
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]3502 src/f32-vbinary/gen/vmax-avx-x8.c
3503 src/f32-vbinary/gen/vmax-avx-x16.c
3504 src/f32-vbinary/gen/vmaxc-avx-x8.c
3505 src/f32-vbinary/gen/vmaxc-avx-x16.c
3506 src/f32-vbinary/gen/vmin-avx-x8.c
3507 src/f32-vbinary/gen/vmin-avx-x16.c
3508 src/f32-vbinary/gen/vminc-avx-x8.c
3509 src/f32-vbinary/gen/vminc-avx-x16.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3510 src/f32-vbinary/gen/vmul-minmax-avx-x8.c
3511 src/f32-vbinary/gen/vmul-minmax-avx-x16.c
3512 src/f32-vbinary/gen/vmulc-minmax-avx-x8.c
3513 src/f32-vbinary/gen/vmulc-minmax-avx-x16.c
3514 src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c
3515 src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c
3516 src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c
3517 src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]3518 src/f32-vbinary/gen/vsqrdiff-avx-x8.c
3519 src/f32-vbinary/gen/vsqrdiff-avx-x16.c
3520 src/f32-vbinary/gen/vsqrdiffc-avx-x8.c
3521 src/f32-vbinary/gen/vsqrdiffc-avx-x16.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3522 src/f32-vbinary/gen/vsub-minmax-avx-x8.c
3523 src/f32-vbinary/gen/vsub-minmax-avx-x16.c
3524 src/f32-vbinary/gen/vsubc-minmax-avx-x8.c
3525 src/f32-vbinary/gen/vsubc-minmax-avx-x16.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]3526 src/f32-vclamp/gen/vclamp-avx-x8.c
3527 src/f32-vclamp/gen/vclamp-avx-x16.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]3528 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c
3529 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c
3530 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c
3531 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c
3532 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c
3533 src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c
3534 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c
3535 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c
3536 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c
3537 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c
3538 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c
3539 src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c
3540 src/f32-velu/gen/velu-avx-rr2-p6-x8.c
3541 src/f32-velu/gen/velu-avx-rr2-p6-x16.c
3542 src/f32-velu/gen/velu-avx-rr2-p6-x24.c
3543 src/f32-velu/gen/velu-avx-rr2-p6-x32.c
3544 src/f32-velu/gen/velu-avx-rr2-p6-x40.c
3545 src/f32-velu/gen/velu-avx-rr2-p6-x48.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]3546 src/f32-vhswish/gen/vhswish-avx-x8.c
3547 src/f32-vhswish/gen/vhswish-avx-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3548 src/f32-vlrelu/gen/vlrelu-avx-x8.c
3549 src/f32-vlrelu/gen/vlrelu-avx-x16.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]3550 src/f32-vrnd/gen/vrndd-avx-x8.c
3551 src/f32-vrnd/gen/vrndd-avx-x16.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3552 src/f32-vrnd/gen/vrndne-avx-x8.c
3553 src/f32-vrnd/gen/vrndne-avx-x16.c
3554 src/f32-vrnd/gen/vrndu-avx-x8.c
3555 src/f32-vrnd/gen/vrndu-avx-x16.c
3556 src/f32-vrnd/gen/vrndz-avx-x8.c
3557 src/f32-vrnd/gen/vrndz-avx-x16.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]3558 src/f32-vscale/avx-x32.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]3559 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c
3560 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c
3561 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c
3562 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c
3563 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c
3564 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c
3565 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c
3566 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c
3567 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c
3568 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c
3569 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c
3570 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c
3571 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c
3572 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c
3573 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c
3574 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c
3575 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c
3576 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c
3577 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c
3578 src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]3579 src/f32-vsqrt/gen/avx-sqrt-x8.c
3580 src/f32-vsqrt/gen/avx-sqrt-x16.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]3581 src/f32-vunary/gen/vabs-avx-x8.c
3582 src/f32-vunary/gen/vabs-avx-x16.c
3583 src/f32-vunary/gen/vneg-avx-x8.c
3584 src/f32-vunary/gen/vneg-avx-x16.c
3585 src/f32-vunary/gen/vsqr-avx-x8.c
Marat Dukhand08abcb2020-09-21 00:26:25 -0700[diff] [blame]3586 src/f32-vunary/gen/vsqr-avx-x16.c
Frank Barchard4a352042021-04-13 15:52:08 -0700[diff] [blame]3587 src/math/exp-avx-rr2-p5.c
3588 src/math/expm1minus-avx-rr2-lut4-p4-perm.c
3589 src/math/expm1minus-avx-rr2-lut16-p3.c
3590 src/math/expm1minus-avx-rr2-p6.c
3591 src/math/sigmoid-avx-rr2-lut64-p2-div.c
3592 src/math/sigmoid-avx-rr2-p5-div.c
3593 src/math/sigmoid-avx-rr2-p5-nr1.c
3594 src/math/sigmoid-avx-rr2-p5-nr2.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3595 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3596 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3597 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3598 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3599 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3600 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3601 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3602 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3603 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3604 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3605 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3606 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c
3607 src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c
3608 src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c
3609 src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c
3610 src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3611 src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3612 src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3613 src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3614 src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3615 src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3616 src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3617 src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3618 src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3619 src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3620 src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3621 src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3622 src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3623 src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3624 src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3625 src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3626 src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3627 src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3628 src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3629 src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3630 src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3631 src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3632 src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3633 src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3634 src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3635 src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3636 src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3637 src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3638 src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3639 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3640 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]3641 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c
3642 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c
3643 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3644 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3645 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3646 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c
3647 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c
3648 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3649 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3650 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3651 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c
3652 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c
3653 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3654 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]3655 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3656 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c
3657 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c
3658 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c
3659 src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c
3660 src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c
3661 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c
3662 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c
3663 src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c
3664 src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c
3665 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c
3666 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3667 src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3668 src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3669 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3670 src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3671 src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3672 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3673 src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3674 src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3675 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3676 src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3677 src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3678 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3679 src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3680 src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3681 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3682 src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3683 src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3684 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3685 src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3686 src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3687 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-avx.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3688 src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3689 src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3690 src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3691 src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3692 src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3693 src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3694 src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3695 src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3696 src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3697 src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3698 src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3699 src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3700 src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3701 src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c
Marat Dukhane9c4b962021-04-02 16:56:55 -0700[diff] [blame]3702 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c
3703 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c
3704 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c
3705 src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c
3706 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c
3707 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c
3708 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c
3709 src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c
3710 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
3711 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
3712 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c
3713 src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c
3714 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
3715 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
3716 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3717 src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3718 src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c
3719 src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
3720 src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c
3721 src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3722 src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3723 src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3724 src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3725 src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3726 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3727 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c
Marat Dukhanf0f28812021-07-08 22:34:20 -0700[diff] [blame]3728 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3729 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3730 src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c
3731 src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c
3732 src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c
3733 src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3734 src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c
3735 src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c
3736 src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c
3737 src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3738 src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c
3739 src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c
3740 src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c
3741 src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c
3742 src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c
3743 src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c
3744 src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c
3745 src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c
3746 src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c
3747 src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c
3748 src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c
3749 src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c
3750 src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c
3751 src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c
3752 src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c
3753 src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c
3754 src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c
3755 src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c
3756 src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]3757 src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c
3758 src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c
3759 src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c
3760 src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c
3761 src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c
3762 src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c
3763 src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c
3764 src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]3765 src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c
3766 src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c
3767 src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c
3768 src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c
Marat Dukhan7c478e32021-09-10 09:48:13 -0700[diff] [blame]3769 src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c
3770 src/x8-lut/gen/lut-avx-x16.c
3771 src/x8-lut/gen/lut-avx-x32.c
3772 src/x8-lut/gen/lut-avx-x48.c
3773 src/x8-lut/gen/lut-avx-x64.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]3774
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]3775SET(ALL_F16C_MICROKERNEL_SRCS
3776 src/f16-f32-vcvt/gen/vcvt-f16c-x8.c
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]3777 src/f16-f32-vcvt/gen/vcvt-f16c-x16.c
3778 src/math/cvt-f16-f32-f16c.c)
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]3779
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3780SET(PROD_XOP_MICROKERNEL_SRCS
Marat Dukhan28480592021-07-27 23:52:27 -0700[diff] [blame]3781 src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
3782 src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3783 src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3784 src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3785 src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3786 src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3787 src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
3788 src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
3789 src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3790 src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3791 src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3792 src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3793 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c
3794 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
3795 src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
3796 src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
3797 src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3798 src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3799 src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3800 src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3801 src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c
3802 src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c)
3803
3804SET(ALL_XOP_MICROKERNEL_SRCS
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3805 src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3806 src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3807 src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3808 src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3809 src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3810 src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3811 src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]3812 src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
3813 src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c
3814 src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3815 src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3816 src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3817 src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3818 src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3819 src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3820 src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3821 src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3822 src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3823 src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3824 src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3825 src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3826 src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3827 src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3828 src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3829 src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3830 src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3831 src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3832 src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3833 src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3834 src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3835 src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3836 src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3837 src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3838 src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3839 src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3840 src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanfc188ed2021-06-03 12:21:22 -0700[diff] [blame]3841 src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3842 src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3843 src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c
Marat Dukhancaf48312021-06-01 20:20:58 -0700[diff] [blame]3844 src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c
3845 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3846 src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3847 src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c
3848 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3849 src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3850 src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
3851 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c
Marat Dukhan09668562021-07-26 16:52:20 -0700[diff] [blame]3852 src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3853 src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
3854 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c
3855 src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c
3856 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c
3857 src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c
3858 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3859 src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3860 src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3861 src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3862 src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3863 src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3864 src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3865 src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3866 src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3867 src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3868 src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3869 src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3870 src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3871 src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3872 src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3873 src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3874 src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3875 src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3876 src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3877 src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3878 src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhan0ff79892021-08-06 16:05:06 -0700[diff] [blame]3879 src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-xop.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3880 src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3881 src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3882 src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3883 src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3884 src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3885 src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3886 src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3887 src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3888 src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3889 src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3890 src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3891 src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c
Marat Dukhanc46e6712021-06-01 19:00:16 -0700[diff] [blame]3892 src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]3893 src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c
Marat Dukhanbb9225e2020-09-06 22:40:56 -0700[diff] [blame]3894 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c
3895 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c
3896 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c
3897 src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c
3898 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
3899 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c
3900 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3901 src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]3902 src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c
3903 src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c
3904 src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c
3905 src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]3906 src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c
3907 src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c
3908 src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3909 src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c
3910 src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c
3911 src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c
3912 src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3913 src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c
3914 src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c
3915 src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c
3916 src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c
3917 src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c
3918 src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c
3919 src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c
3920 src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c
3921 src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c
3922 src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c
3923 src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c
3924 src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c
3925 src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c
3926 src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c
3927 src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c
3928 src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c
3929 src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c
3930 src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c
3931 src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c
3932 src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]3933 src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c
3934 src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c
3935 src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c
3936 src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c
3937 src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c)
Marat Dukhan1566fee2020-08-02 21:55:41 -0700[diff] [blame]3938
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]3939SET(PROD_FMA3_MICROKERNEL_SRCS
3940 src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c
3941 src/f32-dwconv/gen/up8x4-minmax-fma3.c
3942 src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c
3943 src/f32-dwconv/gen/up8x9-minmax-fma3.c
3944 src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c
3945 src/f32-dwconv/gen/up8x25-minmax-fma3.c
3946 src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c
3947 src/f32-dwconv/gen/up16x4-minmax-fma3.c
3948 src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c
3949 src/f32-dwconv/gen/up16x9-minmax-fma3.c
3950 src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c
3951 src/f32-dwconv/gen/up16x25-minmax-fma3.c
3952 src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c
3953 src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c
3954 src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c
3955 src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c
3956 src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c
3957 src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c
3958 src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c
3959 src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c
3960 src/f32-vhswish/gen/vhswish-fma3-x16.c)
3961
3962SET(ALL_FMA3_MICROKERNEL_SRCS
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3963 src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c
3964 src/f32-dwconv/gen/up8x4-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3965 src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c
3966 src/f32-dwconv/gen/up8x9-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3967 src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c
3968 src/f32-dwconv/gen/up8x25-minmax-fma3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3969 src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c
3970 src/f32-dwconv/gen/up16x4-minmax-fma3.c
3971 src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c
3972 src/f32-dwconv/gen/up16x9-minmax-fma3.c
3973 src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c
3974 src/f32-dwconv/gen/up16x25-minmax-fma3.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3975 src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3976 src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c
3977 src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c
3978 src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c
3979 src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3980 src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3981 src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c
3982 src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3983 src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3984 src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c
3985 src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3986 src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c
3987 src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c
3988 src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]3989 src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c
3990 src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c
3991 src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c
3992 src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c
3993 src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c
3994 src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c
3995 src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c
3996 src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c
3997 src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c
3998 src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c
3999 src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c
4000 src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c
4001 src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c
4002 src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4003 src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4004 src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c
4005 src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c
4006 src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c
4007 src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4008 src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4009 src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c
4010 src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4011 src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4012 src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c
4013 src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4014 src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c
4015 src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c
4016 src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]4017 src/f32-vhswish/gen/vhswish-fma3-x8.c
4018 src/f32-vhswish/gen/vhswish-fma3-x16.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]4019 src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c
4020 src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c
4021 src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c
4022 src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c
4023 src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c
4024 src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c
4025 src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c
4026 src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]4027 src/math/sqrt-fma3-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4028 src/math/sqrt-fma3-nr1fma1adj.c
4029 src/math/sqrt-fma3-nr2fma.c)
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]4030
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4031SET(PROD_AVX2_MICROKERNEL_SRCS
4032 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c
4033 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c
4034 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4035 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4036 src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4037 src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4038 src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4039 src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4040 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4041 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4042 src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4043 src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4044 src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4045 src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4046 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
4047 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4048 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4049 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4050 src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4051 src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4052 src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4053 src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4054 src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
Marat Dukhan98e054b2021-09-13 09:43:50 -0700[diff] [blame]4055 src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4056 src/x8-lut/gen/lut-avx2-x128.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4057
4058SET(ALL_AVX2_MICROKERNEL_SRCS
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4059 src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c
4060 src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4061 src/f32-raddexpminusmax/gen/avx2-p5-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4062 src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4063 src/f32-raddexpminusmax/gen/avx2-p5-x72.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4064 src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c
4065 src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4066 src/f32-raddexpminusmax/gen/avx2-p5-x80.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4067 src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c
4068 src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c
4069 src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4070 src/f32-raddexpminusmax/gen/avx2-p5-x96.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4071 src/f32-raddextexp/gen/avx2-p5-x64-acc2.c
4072 src/f32-raddextexp/gen/avx2-p5-x64-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4073 src/f32-raddextexp/gen/avx2-p5-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4074 src/f32-raddextexp/gen/avx2-p5-x72-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4075 src/f32-raddextexp/gen/avx2-p5-x72.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4076 src/f32-raddextexp/gen/avx2-p5-x80-acc2.c
4077 src/f32-raddextexp/gen/avx2-p5-x80-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4078 src/f32-raddextexp/gen/avx2-p5-x80.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4079 src/f32-raddextexp/gen/avx2-p5-x96-acc2.c
4080 src/f32-raddextexp/gen/avx2-p5-x96-acc3.c
4081 src/f32-raddextexp/gen/avx2-p5-x96-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4082 src/f32-raddextexp/gen/avx2-p5-x96.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4083 src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c
4084 src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4085 src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4086 src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4087 src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4088 src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c
4089 src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4090 src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4091 src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c
4092 src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c
4093 src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4094 src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]4095 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c
4096 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c
4097 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c
4098 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c
4099 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c
4100 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c
4101 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c
4102 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c
4103 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c
4104 src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c
4105 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c
4106 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c
4107 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c
4108 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c
4109 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c
4110 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c
4111 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c
4112 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c
4113 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c
4114 src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c
4115 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c
4116 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c
4117 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c
4118 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c
4119 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c
4120 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c
4121 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c
4122 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c
4123 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c
4124 src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c
4125 src/f32-velu/gen/velu-avx2-rr1-p6-x8.c
4126 src/f32-velu/gen/velu-avx2-rr1-p6-x16.c
4127 src/f32-velu/gen/velu-avx2-rr1-p6-x24.c
4128 src/f32-velu/gen/velu-avx2-rr1-p6-x32.c
4129 src/f32-velu/gen/velu-avx2-rr1-p6-x40.c
4130 src/f32-velu/gen/velu-avx2-rr1-p6-x48.c
4131 src/f32-velu/gen/velu-avx2-rr1-p6-x56.c
4132 src/f32-velu/gen/velu-avx2-rr1-p6-x64.c
4133 src/f32-velu/gen/velu-avx2-rr1-p6-x72.c
4134 src/f32-velu/gen/velu-avx2-rr1-p6-x80.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]4135 src/f32-vrelu/gen/vrelu-avx-x8.c
4136 src/f32-vrelu/gen/vrelu-avx-x16.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4137 src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c
4138 src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c
4139 src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c
4140 src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c
4141 src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c
4142 src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c
4143 src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c
4144 src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c
4145 src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c
4146 src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c
4147 src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c
4148 src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c
4149 src/f32-vscaleextexp/gen/avx2-p5-x8.c
4150 src/f32-vscaleextexp/gen/avx2-p5-x16.c
4151 src/f32-vscaleextexp/gen/avx2-p5-x24.c
4152 src/f32-vscaleextexp/gen/avx2-p5-x32.c
4153 src/f32-vscaleextexp/gen/avx2-p5-x40.c
4154 src/f32-vscaleextexp/gen/avx2-p5-x48.c
4155 src/f32-vscaleextexp/gen/avx2-p5-x56.c
4156 src/f32-vscaleextexp/gen/avx2-p5-x64.c
4157 src/f32-vscaleextexp/gen/avx2-p5-x72.c
4158 src/f32-vscaleextexp/gen/avx2-p5-x80.c
4159 src/f32-vscaleextexp/gen/avx2-p5-x88.c
4160 src/f32-vscaleextexp/gen/avx2-p5-x96.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]4161 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c
4162 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c
4163 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c
4164 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c
4165 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c
4166 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c
4167 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c
4168 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c
4169 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c
4170 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c
4171 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c
4172 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c
4173 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c
4174 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c
4175 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c
4176 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c
4177 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c
4178 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c
4179 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c
4180 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c
4181 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c
4182 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c
4183 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c
4184 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c
4185 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c
4186 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c
4187 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c
4188 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c
4189 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c
4190 src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]4191 src/math/exp-avx2-rr2-lut8-p3-perm.c
4192 src/math/exp-avx2-rr2-lut8-p4-perm.c
4193 src/math/exp-avx2-rr2-p5.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]4194 src/math/expm1minus-avx2-rr1-lut4-p4-perm.c
4195 src/math/expm1minus-avx2-rr1-lut8-p4-perm.c
4196 src/math/expm1minus-avx2-rr1-lut16-p3-gather.c
4197 src/math/expm1minus-avx2-rr1-p6.c
Frank Barcharde7223ee2020-12-04 19:04:01 -0800[diff] [blame]4198 src/math/expminus-avx2-rr2-p5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4199 src/math/extexp-avx2-p5.c
4200 src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c
4201 src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c
4202 src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c
4203 src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c
4204 src/math/sigmoid-avx2-rr1-p5-div.c
4205 src/math/sigmoid-avx2-rr1-p5-nr1fma.c
4206 src/math/sigmoid-avx2-rr1-p5-nr2fma.c
4207 src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c
4208 src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c
4209 src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c
4210 src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c
4211 src/math/sigmoid-avx2-rr2-p5-div.c
4212 src/math/sigmoid-avx2-rr2-p5-nr1fma.c
4213 src/math/sigmoid-avx2-rr2-p5-nr2fma.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4214 src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c
4215 src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4216 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4217 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c
4218 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4219 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4220 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4221 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c
4222 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4223 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4224 src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c
4225 src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4226 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4227 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c
4228 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4229 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4230 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4231 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c
4232 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4233 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]4234 src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4235 src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c
4236 src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c
4237 src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c
4238 src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4239 src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]4240 src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4241 src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c
4242 src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4243 src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4244 src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4245 src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4246 src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4247 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4248 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c
4249 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4250 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4251 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16-vpmovsx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4252 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4253 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4254 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c
4255 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4256 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4257 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16-vpmovsx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4258 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4259 src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4260 src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4261 src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4262 src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4263 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4264 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c
4265 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4266 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4267 src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16-vpmovsx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4268 src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4269 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4270 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c
4271 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4272 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c
Marat Dukhan881ab022021-07-28 13:49:26 -0700[diff] [blame]4273 src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16-vpmovsx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4274 src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4275 src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]4276 src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4277 src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]4278 src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4279 src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4280 src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]4281 src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4282 src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4283 src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]4284 src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4285 src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c
Marat Dukhane6dc0b62020-09-08 23:57:14 -0700[diff] [blame]4286 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
4287 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
4288 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c
4289 src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c
4290 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
4291 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4292 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c
Marat Dukhan902ef7f2021-07-02 16:11:06 -0700[diff] [blame]4293 src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c
Marat Dukhan09c312b2021-07-09 00:45:04 -0700[diff] [blame]4294 src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c
4295 src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c
4296 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c
4297 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c
4298 src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c
4299 src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c
Marat Dukhan902ef7f2021-07-02 16:11:06 -0700[diff] [blame]4300 src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c
4301 src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c
4302 src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c
4303 src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c
4304 src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c
Marat Dukhan3eac69c2021-07-21 01:42:29 -0700[diff] [blame]4305 src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c
4306 src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c
4307 src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c
4308 src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c
Marat Dukhan7c478e32021-09-10 09:48:13 -0700[diff] [blame]4309 src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c
4310 src/x8-lut/gen/lut-avx2-x32.c
4311 src/x8-lut/gen/lut-avx2-x64.c
4312 src/x8-lut/gen/lut-avx2-x96.c
4313 src/x8-lut/gen/lut-avx2-x128.c)
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]4314
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4315SET(PROD_AVX512F_MICROKERNEL_SRCS
4316 src/f32-dwconv/gen/up16x4-minmax-avx512f.c
4317 src/f32-dwconv/gen/up16x9-minmax-avx512f.c
4318 src/f32-dwconv/gen/up16x25-minmax-avx512f.c
4319 src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c
4320 src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c
4321 src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c
4322 src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c
4323 src/f32-prelu/gen/avx512f-2x16.c
4324 src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c
4325 src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c
4326 src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c
4327 src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c
4328 src/f32-vbinary/gen/vmax-avx512f-x32.c
4329 src/f32-vbinary/gen/vmaxc-avx512f-x32.c
4330 src/f32-vbinary/gen/vmin-avx512f-x32.c
4331 src/f32-vbinary/gen/vminc-avx512f-x32.c
4332 src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c
4333 src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c
4334 src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c
4335 src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c
4336 src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c
4337 src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c
4338 src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c
4339 src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c
4340 src/f32-vclamp/gen/vclamp-avx512f-x16.c
4341 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c
4342 src/f32-vhswish/gen/vhswish-avx512f-x16.c
4343 src/f32-vlrelu/gen/vlrelu-avx512f-x16.c
4344 src/f32-vrnd/gen/vrndd-avx512f-x16.c
4345 src/f32-vrnd/gen/vrndne-avx512f-x16.c
4346 src/f32-vrnd/gen/vrndu-avx512f-x16.c
4347 src/f32-vrnd/gen/vrndz-avx512f-x16.c
4348 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c
4349 src/f32-vunary/gen/vabs-avx512f-x16.c
4350 src/f32-vunary/gen/vneg-avx512f-x16.c
4351 src/f32-vunary/gen/vsqr-avx512f-x16.c)
4352
4353SET(ALL_AVX512F_MICROKERNEL_SRCS
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4354 src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c
4355 src/f32-dwconv/gen/up16x4-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4356 src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c
4357 src/f32-dwconv/gen/up16x9-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4358 src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c
4359 src/f32-dwconv/gen/up16x25-minmax-avx512f.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4360 src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c
4361 src/f32-dwconv/gen/up32x4-minmax-avx512f.c
4362 src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c
4363 src/f32-dwconv/gen/up32x9-minmax-avx512f.c
4364 src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c
4365 src/f32-dwconv/gen/up32x25-minmax-avx512f.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4366 src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c
4367 src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c
4368 src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c
4369 src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c
4370 src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c
4371 src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4372 src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c
4373 src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c
4374 src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c
4375 src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c
4376 src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c
4377 src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4378 src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c
4379 src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c
4380 src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c
4381 src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c
4382 src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c
4383 src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]4384 src/f32-prelu/gen/avx512f-2x16.c
4385 src/f32-prelu/gen/avx512f-2x32.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4386 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c
4387 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4388 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4389 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4390 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4391 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c
4392 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4393 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4394 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c
4395 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c
4396 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4397 src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4398 src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c
4399 src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4400 src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4401 src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4402 src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4403 src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c
4404 src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4405 src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4406 src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c
4407 src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c
4408 src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4409 src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4410 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c
4411 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4412 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4413 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4414 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4415 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c
4416 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4417 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4418 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c
4419 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c
4420 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4421 src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4422 src/f32-rmax/avx512f.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4423 src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c
4424 src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c
4425 src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c
4426 src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c
4427 src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c
4428 src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c
4429 src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c
4430 src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]4431 src/f32-vbinary/gen/vmax-avx512f-x16.c
4432 src/f32-vbinary/gen/vmax-avx512f-x32.c
4433 src/f32-vbinary/gen/vmaxc-avx512f-x16.c
4434 src/f32-vbinary/gen/vmaxc-avx512f-x32.c
4435 src/f32-vbinary/gen/vmin-avx512f-x16.c
4436 src/f32-vbinary/gen/vmin-avx512f-x32.c
4437 src/f32-vbinary/gen/vminc-avx512f-x16.c
4438 src/f32-vbinary/gen/vminc-avx512f-x32.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4439 src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c
4440 src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c
4441 src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c
4442 src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c
4443 src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c
4444 src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c
4445 src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c
4446 src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]4447 src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c
4448 src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c
4449 src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c
4450 src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4451 src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c
4452 src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c
4453 src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c
4454 src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]4455 src/f32-vclamp/gen/vclamp-avx512f-x16.c
4456 src/f32-vclamp/gen/vclamp-avx512f-x32.c
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]4457 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c
4458 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c
4459 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c
4460 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c
4461 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c
4462 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c
4463 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c
4464 src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c
4465 src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c
4466 src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c
4467 src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c
4468 src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c
4469 src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c
4470 src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c
4471 src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c
4472 src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]4473 src/f32-vhswish/gen/vhswish-avx512f-x16.c
4474 src/f32-vhswish/gen/vhswish-avx512f-x32.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4475 src/f32-vlrelu/gen/vlrelu-avx512f-x16.c
4476 src/f32-vlrelu/gen/vlrelu-avx512f-x32.c
Marat Dukhanb9ebcad2021-05-06 21:02:33 -0700[diff] [blame]4477 src/f32-vrelu/gen/vrelu-avx512f-x16.c
4478 src/f32-vrelu/gen/vrelu-avx512f-x32.c
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4479 src/f32-vrnd/gen/vrndd-avx512f-x16.c
4480 src/f32-vrnd/gen/vrndd-avx512f-x32.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4481 src/f32-vrnd/gen/vrndne-avx512f-x16.c
4482 src/f32-vrnd/gen/vrndne-avx512f-x32.c
4483 src/f32-vrnd/gen/vrndu-avx512f-x16.c
4484 src/f32-vrnd/gen/vrndu-avx512f-x32.c
4485 src/f32-vrnd/gen/vrndz-avx512f-x16.c
4486 src/f32-vrnd/gen/vrndz-avx512f-x32.c
Frank Barchardbeca6522020-10-30 22:34:35 -0700[diff] [blame]4487 src/f32-vscale/avx512f-x64.c
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]4488 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c
4489 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c
4490 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c
4491 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c
4492 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c
4493 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c
4494 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c
4495 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c
4496 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c
4497 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c
4498 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c
4499 src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c
4500 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c
4501 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c
4502 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c
4503 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c
4504 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c
4505 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c
4506 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c
4507 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c
4508 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c
4509 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c
4510 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c
4511 src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c
Marat Dukhanb1eec082021-05-05 23:24:55 -0700[diff] [blame]4512 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c
4513 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c
4514 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c
4515 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c
4516 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c
4517 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c
4518 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c
4519 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c
4520 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c
4521 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c
4522 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c
4523 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c
4524 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c
4525 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c
4526 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c
4527 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c
4528 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c
4529 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c
4530 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c
4531 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c
4532 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c
4533 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c
4534 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c
4535 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c
4536 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c
4537 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c
4538 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c
4539 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c
4540 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c
4541 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c
4542 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c
4543 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c
4544 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c
4545 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c
4546 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c
4547 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c
4548 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c
4549 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c
4550 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c
4551 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c
4552 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c
4553 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c
4554 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c
4555 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c
4556 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c
4557 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c
4558 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c
4559 src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]4560 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c
4561 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c
4562 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c
4563 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c
4564 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c
4565 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c
4566 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c
4567 src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c
Marat Dukhan2b9efd82020-06-08 01:09:31 -0700[diff] [blame]4568 src/f32-vunary/gen/vabs-avx512f-x16.c
4569 src/f32-vunary/gen/vabs-avx512f-x32.c
4570 src/f32-vunary/gen/vneg-avx512f-x16.c
4571 src/f32-vunary/gen/vneg-avx512f-x32.c
4572 src/f32-vunary/gen/vsqr-avx512f-x16.c
4573 src/f32-vunary/gen/vsqr-avx512f-x32.c
Marat Dukhanb7633f22020-11-20 16:34:56 -0800[diff] [blame]4574 src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c
4575 src/math/exp-avx512f-rr2-lut16-p3-perm.c
4576 src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c
4577 src/math/exp-avx512f-rr2-lut32-p2-perm2.c
4578 src/math/exp-avx512f-rr2-p5-scalef.c
4579 src/math/exp-avx512f-rr2-p5.c
Marat Dukhande390d42020-11-29 19:32:18 -0800[diff] [blame]4580 src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c
4581 src/math/expm1minus-avx512f-rr1-p6.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]4582 src/math/extexp-avx512f-p5.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]4583 src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]4584 src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4585 src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]4586 src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c
Marat Dukhan6a34c5f2020-09-22 21:44:15 -0700[diff] [blame]4587 src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4588 src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]4589 src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]4590 src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4591 src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c
4592 src/math/sigmoid-avx512f-rr1-p5-scalef-div.c
4593 src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c
4594 src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c
4595 src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c
4596 src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c
4597 src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c
4598 src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c
4599 src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c
4600 src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]4601 src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c
Marat Dukhan36173d22020-10-15 17:14:26 -0700[diff] [blame]4602 src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4603 src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c
4604 src/math/sigmoid-avx512f-rr2-p5-scalef-div.c
4605 src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c
4606 src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]4607 src/math/sqrt-avx512f-nr1fma.c
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4608 src/math/sqrt-avx512f-nr1fma1adj.c
4609 src/math/sqrt-avx512f-nr2fma.c)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]4610
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4611SET(PROD_AVX512SKX_MICROKERNEL_SRCS
4612 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
4613 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
4614 src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
4615 src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
4616 src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
4617 src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
4618 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
4619 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
4620 src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
4621 src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
4622 src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
4623 src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
4624 src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
4625 src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
4626 src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
4627 src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
4628 src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
4629 src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
4630 src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
4631 src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
4632 src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
Marat Dukhan98e054b2021-09-13 09:43:50 -0700[diff] [blame]4633 src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
4634 src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4635
4636SET(ALL_AVX512SKX_MICROKERNEL_SRCS
Marat Dukhan79c76ab2021-09-26 20:26:39 -0700[diff] [blame]4637 src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c
4638 src/f16-f32-vcvt/gen/vcvt-avx512skx-x32.c
Marat Dukhan98042f22021-06-15 00:43:13 -0700[diff] [blame]4639 src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c
4640 src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c
4641 src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
4642 src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -0700[diff] [blame]4643 src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
4644 src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c
4645 src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c
4646 src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
4647 src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
4648 src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c
4649 src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c
4650 src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4651 src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4652 src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4653 src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4654 src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4655 src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4656 src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4657 src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4658 src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4659 src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4660 src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4661 src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4662 src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4663 src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4664 src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4665 src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c
Marat Dukhan71855ee2021-05-25 19:05:06 -0700[diff] [blame]4666 src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4667 src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
Marat Dukhan3cf2e222021-07-08 11:38:45 -0700[diff] [blame]4668 src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c
Marat Dukhane76049a2021-07-22 14:48:59 -0700[diff] [blame]4669 src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
4670 src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c
4671 src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
4672 src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c
Marat Dukhancfd606b2021-07-09 01:18:45 -0700[diff] [blame]4673 src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c
4674 src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c
4675 src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c
4676 src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c
Marat Dukhan3cf2e222021-07-08 11:38:45 -0700[diff] [blame]4677 src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c
4678 src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c
4679 src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c
4680 src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c
4681 src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c
4682 src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c
4683 src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c
Marat Dukhane76049a2021-07-22 14:48:59 -0700[diff] [blame]4684 src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c
4685 src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c
4686 src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c
4687 src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c
Marat Dukhan2b3c4102021-09-10 19:05:37 -0700[diff] [blame]4688 src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c
4689 src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c
4690 src/x8-lut/gen/lut-avx512skx-vpshufb-x128.c
4691 src/x8-lut/gen/lut-avx512skx-vpshufb-x192.c
4692 src/x8-lut/gen/lut-avx512skx-vpshufb-x256.c)
Marat Dukhanbb00b1d2020-08-10 11:37:23 -0700[diff] [blame]4693
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]4694SET(AARCH32_ASM_MICROKERNEL_SRCS
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]4695 src/f32-gemm/4x4-aarch32-vfp-ld64.S
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]4696 src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4697 src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S
4698 src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S
Frank Barchard490febe2020-07-16 18:42:17 -0700[diff] [blame]4699 src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4700 src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S
Frank Barchard569561d2020-06-17 13:11:12 -0700[diff] [blame]4701 src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S
Frank Barchard490febe2020-07-16 18:42:17 -0700[diff] [blame]4702 src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4703 src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S
Marat Dukhandc2e4372020-07-21 17:01:00 -0700[diff] [blame]4704 src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S
Frank Barchard490febe2020-07-16 18:42:17 -0700[diff] [blame]4705 src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S
4706 src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S
4707 src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S
Marat Dukhandc2e4372020-07-21 17:01:00 -0700[diff] [blame]4708 src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]4709
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]4710SET(AARCH64_ASM_MICROKERNEL_SRCS
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]4711 src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4712 src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]4713 src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4714 src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]4715 src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard80fc5f42021-06-07 10:43:16 -0700[diff] [blame]4716 src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S
Frank Barchard97374612021-06-07 11:51:07 -0700[diff] [blame]4717 src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4718 src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S
4719 src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4720 src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S
4721 src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S
4722 src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S
4723 src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S
4724 src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S
Frank Barchard80fc5f42021-06-07 10:43:16 -0700[diff] [blame]4725 src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S
Frank Barchard97374612021-06-07 11:51:07 -0700[diff] [blame]4726 src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S
Frank Barchard23eb4822021-06-08 15:03:41 -0700[diff] [blame]4727 src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S
4728 src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4729 src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S
4730 src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4731 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4732 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4733 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4734 src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4735 src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4736 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S
4737 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4738 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4739 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4740 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4741 src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4742 src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4743 src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4744 src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4745 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S
4746 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4747 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4748 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4749 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4750 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4751 src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4752 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4753 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S
4754 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4755 src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4756 src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S
4757 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S
4758 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4759 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S
4760 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S
4761 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4762 src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4763 src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4764 src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4765 src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4766 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S
4767 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4768 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S
4769 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S
4770 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S
4771 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4772 src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4773 src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4774 src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4775 src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S
4776 src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S
4777 src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4778 src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S
4779 src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S
4780 src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S
Frank Barchard04336c12020-10-22 16:48:55 -0700[diff] [blame]4781 src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4782 src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4783 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barcharde3491242021-06-11 14:04:57 -0700[diff] [blame]4784 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S
Frank Barchard79cd5f92021-06-21 17:34:59 -0700[diff] [blame]4785 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4786 src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
4787 src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S
4788 src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
4789 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S
Frank Barcharde3491242021-06-11 14:04:57 -0700[diff] [blame]4790 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S
Frank Barchard79cd5f92021-06-21 17:34:59 -0700[diff] [blame]4791 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S
Frank Barchard143a1102021-06-15 09:15:34 -0700[diff] [blame]4792 src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]4793 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4794 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4795 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4796 src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]4797 src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S
4798 src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]4799 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4800 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4801 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4802 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
4803 src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S
Frank Barchard1663c0c2021-07-01 11:20:06 -0700[diff] [blame]4804 src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]4805 src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
4806 src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
4807 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
4808 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S
4809 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
4810 src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]4811 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4812 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4813 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4814 src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
4815 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4816 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4817 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4818 src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
Frank Barchard1663c0c2021-07-01 11:20:06 -0700[diff] [blame]4819 src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]4820 src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
4821 src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
4822 src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
4823 src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
4824 src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]4825 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4826 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4827 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4828 src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]4829 src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S
4830 src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4831 src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S
4832 src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4833 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S
4834 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4835 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S
4836 src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S
Frank Barchard1a0b2762021-06-29 18:37:59 -0700[diff] [blame]4837 src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S
4838 src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4839 src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S
4840 src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4841 src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld32.S
4842 src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld64.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]4843 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4844 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4845 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4846 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
4847 src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull-padal.S
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]4848 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S
4849 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4850 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S
4851 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4852 src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4853 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S
4854 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4855 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S
4856 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S
4857 src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mull-padal.S
Frank Barchard1663c0c2021-07-01 11:20:06 -0700[diff] [blame]4858 src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4859 src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4860 src/qs8-gemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S
Frank Barchard98af05c2021-06-30 12:15:04 -0700[diff] [blame]4861 src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
4862 src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]4863 src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S
4864 src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4865 src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
4866 src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard1a0b2762021-06-29 18:37:59 -0700[diff] [blame]4867 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
4868 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S
4869 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
4870 src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4871 src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S
4872 src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S
4873 src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S
Frank Barchard0ae35f22021-06-15 17:34:24 -0700[diff] [blame]4874 src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4875 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
4876 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S
4877 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S
Frank Barchard60729d02021-07-20 12:25:09 -0700[diff] [blame]4878 src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]4879 src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4880 src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4881 src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4882 src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]4883 src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S
4884 src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4885 src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S
4886 src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4887 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S
4888 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4889 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S
4890 src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S
Frank Barchard960ae342021-07-01 11:31:11 -0700[diff] [blame]4891 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-cortex-a53.S
4892 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4893 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal-prfm.S
4894 src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-padal.S
Marat Dukhand65d20e2021-05-24 16:59:51 -0700[diff] [blame]4895 src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S
4896 src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4897 src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S
4898 src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4899 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-cortex-a53.S
4900 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm-cortex-a53.S
4901 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal-prfm.S
4902 src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-padal.S
Frank Barchard1663c0c2021-07-01 11:20:06 -0700[diff] [blame]4903 src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal-padal.S
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4904 src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4905 src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal-padal.S
Frank Barchard98af05c2021-06-30 12:15:04 -0700[diff] [blame]4906 src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S
4907 src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchardf10af6c2021-06-30 12:42:29 -0700[diff] [blame]4908 src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S
4909 src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4910 src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
4911 src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard1a0b2762021-06-29 18:37:59 -0700[diff] [blame]4912 src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S
4913 src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S
4914 src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S
Frank Barchardd208bec2021-05-28 11:36:39 -0700[diff] [blame]4915 src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S
Frank Barchard0ae35f22021-06-15 17:34:24 -0700[diff] [blame]4916 src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S
Frank Barchard60729d02021-07-20 12:25:09 -0700[diff] [blame]4917 src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S
Frank Barchard13db60f2021-07-20 14:34:35 -0700[diff] [blame]4918 src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
4919 src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4920 src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchardca4c68e2021-08-25 19:06:40 -0700[diff] [blame]4921 src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barcharddf8e6042021-09-03 13:56:29 -0700[diff] [blame]4922 src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4923 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchardfb3a94f2021-08-02 20:37:06 -0700[diff] [blame]4924 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4925 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchardfb3a94f2021-08-02 20:37:06 -0700[diff] [blame]4926 src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S
Frank Barcharda49e41f2021-08-31 20:30:24 -0700[diff] [blame]4927 src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barchard0c764222021-08-24 16:13:06 -0700[diff] [blame]4928 src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchardca4c68e2021-08-25 19:06:40 -0700[diff] [blame]4929 src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barcharddf8e6042021-09-03 13:56:29 -0700[diff] [blame]4930 src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S
Frank Barchard59ed1da2021-08-02 11:34:59 -0700[diff] [blame]4931 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S
Frank Barchardfb3a94f2021-08-02 20:37:06 -0700[diff] [blame]4932 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S
4933 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S
Frank Barchard0c764222021-08-24 16:13:06 -0700[diff] [blame]4934 src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S
Frank Barcharda49e41f2021-08-31 20:30:24 -0700[diff] [blame]4935 src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S
Frank Barchard0c764222021-08-24 16:13:06 -0700[diff] [blame]4936 src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]4937
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4938SET(PROD_MICROKERNEL_SRCS ${PROD_SCALAR_MICROKERNEL_SRCS})
4939SET(ALL_MICROKERNEL_SRCS ${ALL_SCALAR_MICROKERNEL_SRCS})
Chester Liu5c29c642020-12-30 09:55:57 +0800[diff] [blame]4940IF(CMAKE_SYSTEM_PROCESSOR MATCHES "^armv[5-8]" OR IOS_ARCH MATCHES "^armv7")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4941 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEON_MICROKERNEL_SRCS})
4942 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONFMA_MICROKERNEL_SRCS})
4943 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONV8_MICROKERNEL_SRCS})
4944 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEON_MICROKERNEL_SRCS})
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]4945 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFP16_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4946 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFMA_MICROKERNEL_SRCS})
4947 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONV8_MICROKERNEL_SRCS})
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -0700[diff] [blame]4948 IF(NOT IOS)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4949 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONDOT_MICROKERNEL_SRCS})
4950 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONDOT_MICROKERNEL_SRCS})
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -0700[diff] [blame]4951 ENDIF()
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]4952 IF(XNNPACK_ENABLE_ASSEMBLY)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4953 LIST(APPEND PROD_MICROKERNEL_SRCS ${AARCH32_ASM_MICROKERNEL_SRCS})
4954 LIST(APPEND ALL_MICROKERNEL_SRCS ${AARCH32_ASM_MICROKERNEL_SRCS})
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]4955 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]4956ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]4957IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(aarch64|arm64)$" OR IOS_ARCH MATCHES "^arm64.*")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4958 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEON_MICROKERNEL_SRCS})
4959 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONFMA_MICROKERNEL_SRCS})
4960 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONV8_MICROKERNEL_SRCS})
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]4961 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AARCH64_NEON_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4962 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS})
4963 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_NEONDOT_MICROKERNEL_SRCS})
4964 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEON_MICROKERNEL_SRCS})
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]4965 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFP16_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4966 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONFMA_MICROKERNEL_SRCS})
4967 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONV8_MICROKERNEL_SRCS})
Marat Dukhanf7182322021-09-09 18:53:46 -0700[diff] [blame]4968 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AARCH64_NEON_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4969 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS})
4970 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_NEONDOT_MICROKERNEL_SRCS})
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]4971 IF(XNNPACK_ENABLE_ASSEMBLY)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4972 LIST(APPEND PROD_MICROKERNEL_SRCS ${AARCH64_ASM_MICROKERNEL_SRCS})
4973 LIST(APPEND ALL_MICROKERNEL_SRCS ${AARCH64_ASM_MICROKERNEL_SRCS})
Chester Liu4510c4a2020-12-18 16:12:23 +0800[diff] [blame]4974 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]4975ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]4976IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(i[3-6]86|x86_64|AMD64)$" OR IOS_ARCH MATCHES "^(i386|x86_64|AMD64)$")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4977 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSE_MICROKERNEL_SRCS})
4978 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSE2_MICROKERNEL_SRCS})
4979 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSSE3_MICROKERNEL_SRCS})
4980 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_SSE41_MICROKERNEL_SRCS})
4981 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX_MICROKERNEL_SRCS})
4982 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_XOP_MICROKERNEL_SRCS})
4983 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_FMA3_MICROKERNEL_SRCS})
4984 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX2_MICROKERNEL_SRCS})
4985 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX512F_MICROKERNEL_SRCS})
4986 LIST(APPEND PROD_MICROKERNEL_SRCS ${PROD_AVX512SKX_MICROKERNEL_SRCS})
4987 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSE_MICROKERNEL_SRCS})
4988 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSE2_MICROKERNEL_SRCS})
4989 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSSE3_MICROKERNEL_SRCS})
4990 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_SSE41_MICROKERNEL_SRCS})
4991 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX_MICROKERNEL_SRCS})
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]4992 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_F16C_MICROKERNEL_SRCS})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]4993 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_XOP_MICROKERNEL_SRCS})
4994 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_FMA3_MICROKERNEL_SRCS})
4995 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX2_MICROKERNEL_SRCS})
4996 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX512F_MICROKERNEL_SRCS})
4997 LIST(APPEND ALL_MICROKERNEL_SRCS ${ALL_AVX512SKX_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]4998ENDIF()
4999
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5000ADD_LIBRARY(all_microkernels OBJECT ${ALL_MICROKERNEL_SRCS} ${TABLE_SRCS})
Marat Dukhan599d3db2021-08-03 10:50:53 -0700[diff] [blame]5001ADD_LIBRARY(indirection OBJECT src/indirection.c)
5002ADD_LIBRARY(packing OBJECT src/packing.c)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5003
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5004IF(XNNPACK_LIBRARY_TYPE STREQUAL "default")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5005 ADD_LIBRARY(XNNPACK ${COLD_SRCS} ${HOT_SRCS} ${TABLE_SRCS} ${PROD_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5006ELSEIF(XNNPACK_LIBRARY_TYPE STREQUAL "shared")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5007 ADD_LIBRARY(XNNPACK SHARED ${COLD_SRCS} ${HOT_SRCS} ${TABLE_SRCS} ${PROD_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5008ELSEIF(XNNPACK_LIBRARY_TYPE STREQUAL "static")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5009 ADD_LIBRARY(XNNPACK STATIC ${COLD_SRCS} ${HOT_SRCS} ${TABLE_SRCS} ${PROD_MICROKERNEL_SRCS})
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5010ELSE()
5011 MESSAGE(FATAL_ERROR "Unsupported XNNPACK library type \"${XNNPACK_LIBRARY_TYPE}\". Must be \"static\", \"shared\", or \"default\"")
5012ENDIF()
5013SET_TARGET_PROPERTIES(XNNPACK PROPERTIES
5014 C_STANDARD 99
5015 C_EXTENSIONS YES)
Chester Liu5c29c642020-12-30 09:55:57 +0800[diff] [blame]5016IF(CMAKE_SYSTEM_PROCESSOR MATCHES "^armv[5-8]" OR IOS_ARCH MATCHES "^armv7")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5017 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -marm ")
5018 SET_PROPERTY(SOURCE ${ALL_NEON_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv7-a -mfpu=neon ")
Marat Dukhan8ff372c2021-09-28 14:43:17 -0700[diff] [blame]5019 SET_PROPERTY(SOURCE ${ALL_NEONFP16_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv7-a -mfpu=neon-fp16 ")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5020 SET_PROPERTY(SOURCE ${ALL_NEONFMA_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv7-a -mfpu=neon-vfpv4 ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5021 IF(IOS)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5022 SET_PROPERTY(SOURCE ${ALL_NEONV8_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mcpu=cyclone -mtune=generic ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5023 SET_PROPERTY(SOURCE ${AARCH32_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -arch ${IOS_ARCH} ")
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -0700[diff] [blame]5024 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5025 SET_PROPERTY(SOURCE ${ALL_NEONV8_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8-a -mfpu=neon-fp-armv8 ")
5026 SET_PROPERTY(SOURCE ${ALL_NEONDOT_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+dotprod -mfpu=neon-fp-armv8 ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5027 ENDIF()
peterjc123ae2d0f62020-10-23 11:00:25 +0800[diff] [blame]5028 # Workground the neon detection bug in ARM v8
5029 # Related links:
5030 # https://github.com/android/ndk/issues/910
5031 # https://reviews.llvm.org/D58477
5032 IF(ANDROID_NDK_MAJOR AND ANDROID_NDK_MAJOR LESS 21)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5033 SET_PROPERTY(SOURCE ${ALL_NEONV8_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfloat-abi=softfp ")
5034 SET_PROPERTY(SOURCE ${ALL_NEONDOT_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfloat-abi=softfp ")
peterjc123ae2d0f62020-10-23 11:00:25 +0800[diff] [blame]5035 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5036ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5037IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(aarch64|arm64)$" OR IOS_ARCH MATCHES "^arm64.*")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5038 SET_PROPERTY(SOURCE ${ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+fp16 ")
5039 SET_PROPERTY(SOURCE ${ALL_NEONDOT_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+dotprod ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5040 SET_PROPERTY(SOURCE ${AARCH64_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -march=armv8.2-a+fp16+dotprod ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5041 IF(IOS)
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5042 SET_PROPERTY(SOURCE ${AARCH64_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -arch ${IOS_ARCH} ")
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5043 ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5044 IF(XNNPACK_TARGET_PROCESSOR STREQUAL "arm64" AND CMAKE_HOST_SYSTEM_PROCESSOR STREQUAL "x86_64")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5045 SET_PROPERTY(SOURCE ${AARCH64_ASM_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -arch arm64 ")
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5046 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5047ENDIF()
Nikita Shulga30dbea62020-12-21 13:36:03 -0800[diff] [blame]5048IF(XNNPACK_TARGET_PROCESSOR MATCHES "^(i[3-6]86|x86|x86_64|AMD64)$" OR IOS_ARCH MATCHES "^(i386|x86_64|AMD64)$")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5049 IF(MSVC)
5050 IF(CMAKE_SYSTEM_PROCESSOR STREQUAL "x86" OR CMAKE_SIZEOF_VOID_P EQUAL 4)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5051 SET_PROPERTY(SOURCE ${ALL_SSE_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE ")
5052 SET_PROPERTY(SOURCE ${ALL_SSE2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE2 ")
5053 SET_PROPERTY(SOURCE ${ALL_SSSE3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE2 ")
5054 SET_PROPERTY(SOURCE ${ALL_SSE41_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:SSE2 ")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5055 ENDIF()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5056 SET_PROPERTY(SOURCE ${ALL_AVX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5057 SET_PROPERTY(SOURCE ${ALL_F16C_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5058 SET_PROPERTY(SOURCE ${ALL_XOP_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
5059 SET_PROPERTY(SOURCE ${ALL_FMA3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX ")
5060 SET_PROPERTY(SOURCE ${ALL_AVX2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX2 ")
5061 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX512 ")
5062 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /arch:AVX512 ")
peter65692c72021-08-17 23:41:05 +0800[diff] [blame]5063 IF(CMAKE_CXX_COMPILER_ID STREQUAL "Clang")
5064 SET_PROPERTY(SOURCE ${ALL_SSE_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-msse ")
5065 SET_PROPERTY(SOURCE ${ALL_SSE2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-msse2 ")
5066 SET_PROPERTY(SOURCE ${ALL_SSSE3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mssse3 ")
5067 SET_PROPERTY(SOURCE ${ALL_SSE41_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-msse4.1 ")
5068 SET_PROPERTY(SOURCE ${ALL_AVX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mavx ")
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5069 SET_PROPERTY(SOURCE ${ALL_F16C_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mf16c ")
peter65692c72021-08-17 23:41:05 +0800[diff] [blame]5070 SET_PROPERTY(SOURCE ${ALL_XOP_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mxop ")
5071 SET_PROPERTY(SOURCE ${ALL_FMA3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mfma ")
5072 SET_PROPERTY(SOURCE ${ALL_AVX2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mfma -clang:-mavx2 ")
5073 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -clang:-mavx512f ")
5074 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRIDE PROPERTY COMPILE_FLAGS " -clang:-mavx512f -clang:-mavx512cd -clang:-mavx512bw -clang:-mavx512dq -clang:-mavx512vl ")
5075 ENDIF()
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5076 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5077 SET_PROPERTY(SOURCE ${ALL_SSE_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -msse ")
5078 SET_PROPERTY(SOURCE ${ALL_SSE2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -msse2 ")
5079 SET_PROPERTY(SOURCE ${ALL_SSSE3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mssse3 ")
5080 SET_PROPERTY(SOURCE ${ALL_SSE41_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -msse4.1 ")
5081 SET_PROPERTY(SOURCE ${ALL_AVX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mavx ")
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5082 SET_PROPERTY(SOURCE ${ALL_F16C_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mf16c ")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5083 SET_PROPERTY(SOURCE ${ALL_XOP_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mxop ")
5084 SET_PROPERTY(SOURCE ${ALL_FMA3_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfma ")
5085 SET_PROPERTY(SOURCE ${ALL_AVX2_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mfma -mavx2 ")
5086 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -mavx512f ")
5087 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRIDE PROPERTY COMPILE_FLAGS " -mavx512f -mavx512cd -mavx512bw -mavx512dq -mavx512vl ")
Marat Dukhan78583c72020-04-26 22:00:43 -0700[diff] [blame]5088 IF(MINGW OR CMAKE_SYSTEM_NAME MATCHES "^(CYGWIN|MSYS)$")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5089 # Work-around for https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65782
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5090 SET_PROPERTY(SOURCE ${ALL_AVX512F_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -fno-asynchronous-unwind-tables ")
5091 SET_PROPERTY(SOURCE ${ALL_AVX512SKX_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -fno-asynchronous-unwind-tables ")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5092 ENDIF()
Yasuhiro Matsumoto081b77c2020-03-02 10:20:53 +0900[diff] [blame]5093 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5094ENDIF()
Marat Dukhan5fd403b2020-06-23 17:43:48 -0700[diff] [blame]5095TARGET_COMPILE_DEFINITIONS(XNNPACK PRIVATE "XNN_LOG_LEVEL=$<$<CONFIG:Debug>:5>$<$<NOT:$<CONFIG:Debug>>:0>")
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5096IF(MSVC)
Marat Dukhanf196d012020-04-15 11:50:03 -0700[diff] [blame]5097 # Even though MSVC has __restrict, it can't be used in all the same contexts as the C99 restrict keyword
5098 TARGET_COMPILE_DEFINITIONS(XNNPACK PRIVATE "restrict=")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5099 TARGET_COMPILE_DEFINITIONS(all_microkernels PRIVATE "restrict=")
5100 TARGET_COMPILE_DEFINITIONS(packing PRIVATE "restrict=")
5101 TARGET_COMPILE_DEFINITIONS(indirection PRIVATE "restrict=")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5102 IF(${CMAKE_VERSION} VERSION_LESS "3.8.0")
peterjc12360a3b192020-10-22 12:01:20 +0800[diff] [blame]5103 IF(NOT CMAKE_BUILD_TYPE STREQUAL "Debug")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5104 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /O2 ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5105 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /O2 ")
5106 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " /O1 ")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5107 ENDIF()
5108 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5109 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: /O2 >")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5110 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: /O2 >")
5111 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: /O1 >")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5112 ENDIF()
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5113ELSE()
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5114 IF(${CMAKE_VERSION} VERSION_LESS "3.8.0")
5115 IF(NOT CMAKE_BUILD_TYPE STREQUAL "Debug")
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5116 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -O2 ")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5117 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -O2 ")
5118 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS " -Os ")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5119 ENDIF()
5120 ELSE()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5121 SET_PROPERTY(SOURCE ${ALL_MICROKERNEL_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: -O2 >")
Marat Dukhandb3b0a72021-07-27 08:58:01 -0700[diff] [blame]5122 SET_PROPERTY(SOURCE ${HOT_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: -O2 >")
5123 SET_PROPERTY(SOURCE ${COLD_SRCS} APPEND_STRING PROPERTY COMPILE_FLAGS "$<$<NOT:$<CONFIG:Debug>>: -Os >")
peterjc123c371be12020-10-22 11:59:18 +0800[diff] [blame]5124 ENDIF()
Marat Dukhan7795c3a2020-04-14 20:45:36 -0700[diff] [blame]5125ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5126
5127TARGET_INCLUDE_DIRECTORIES(XNNPACK PUBLIC include)
5128TARGET_INCLUDE_DIRECTORIES(XNNPACK PRIVATE src)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5129TARGET_INCLUDE_DIRECTORIES(all_microkernels PRIVATE include src)
5130TARGET_INCLUDE_DIRECTORIES(packing PRIVATE include src)
5131TARGET_INCLUDE_DIRECTORIES(indirection PRIVATE include src)
Marat Dukhan6ae741a2020-04-13 02:33:53 -0700[diff] [blame]5132IF(WIN32)
5133 # Target Windows 7+ API
5134 TARGET_COMPILE_DEFINITIONS(XNNPACK PRIVATE _WIN32_WINNT=0x0601)
5135ENDIF()
Ashkan Aliabadid255a312019-12-03 12:44:34 -0800[diff] [blame]5136SET_TARGET_PROPERTIES(XNNPACK PROPERTIES PUBLIC_HEADER include/xnnpack.h)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5137
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5138# ---[ Find libm
5139FIND_LIBRARY(LIBM m)
5140IF(LIBM)
5141 TARGET_LINK_LIBRARIES(XNNPACK PRIVATE ${LIBM})
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5142 TARGET_LINK_LIBRARIES(all_microkernels PRIVATE ${LIBM})
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5143ENDIF()
5144
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5145# ---[ Configure clog
5146IF(NOT TARGET clog)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5147 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5148 SET(CLOG_BUILD_TESTS OFF CACHE BOOL "")
5149 SET(CLOG_RUNTIME_TYPE "${CPUINFO_RUNTIME_TYPE}" CACHE STRING "")
5150 ADD_SUBDIRECTORY(
5151 "${CLOG_SOURCE_DIR}/deps/clog"
5152 "${CMAKE_BINARY_DIR}/clog")
5153 # We build static version of clog but a dynamic library may indirectly depend on it
5154 SET_PROPERTY(TARGET clog PROPERTY POSITION_INDEPENDENT_CODE ON)
5155 ELSE()
5156 ADD_LIBRARY(clog STATIC IMPORTED)
5157 FIND_LIBRARY(CLOG_LIBRARY clog)
5158 IF(NOT CLOG_LIBRARY)
5159 MESSAGE(FATAL_ERROR "Cannot find clog")
5160 ENDIF()
5161 SET_PROPERTY(TARGET clog PROPERTY IMPORTED_LOCATION "${CLOG_LIBRARY}")
5162 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5163ENDIF()
5164TARGET_LINK_LIBRARIES(XNNPACK PRIVATE clog)
5165
5166# ---[ Configure cpuinfo
5167IF(NOT TARGET cpuinfo)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5168 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5169 SET(CPUINFO_BUILD_TOOLS OFF CACHE BOOL "")
5170 SET(CPUINFO_BUILD_UNIT_TESTS OFF CACHE BOOL "")
5171 SET(CPUINFO_BUILD_MOCK_TESTS OFF CACHE BOOL "")
5172 SET(CPUINFO_BUILD_BENCHMARKS OFF CACHE BOOL "")
5173 ADD_SUBDIRECTORY(
5174 "${CPUINFO_SOURCE_DIR}"
5175 "${CMAKE_BINARY_DIR}/cpuinfo")
5176 ELSE()
5177 ADD_LIBRARY(cpuinfo SHARED IMPORTED)
5178 FIND_LIBRARY(CPUINFO_LIBRARY cpuinfo)
5179 IF(NOT CPUINFO_LIBRARY)
5180 MESSAGE(FATAL_ERROR "Cannot find cpuinfo")
5181 ENDIF()
5182 SET_PROPERTY(TARGET cpuinfo PROPERTY IMPORTED_LOCATION "${CPUINFO_LIBRARY}")
5183 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5184ENDIF()
5185TARGET_LINK_LIBRARIES(XNNPACK PRIVATE cpuinfo)
5186
5187# ---[ Configure pthreadpool
5188IF(NOT TARGET pthreadpool)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5189 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5190 SET(PTHREADPOOL_BUILD_TESTS OFF CACHE BOOL "")
5191 SET(PTHREADPOOL_BUILD_BENCHMARKS OFF CACHE BOOL "")
5192 SET(PTHREADPOOL_ALLOW_DEPRECATED_API OFF CACHE BOOL "")
5193 ADD_SUBDIRECTORY(
5194 "${PTHREADPOOL_SOURCE_DIR}"
5195 "${CMAKE_BINARY_DIR}/pthreadpool")
5196 ELSE()
5197 ADD_LIBRARY(pthreadpool SHARED IMPORTED)
5198 FIND_LIBRARY(PTHREADPOOL_LIBRARY pthreadpool)
5199 IF(NOT PTHREADPOOL_LIBRARY)
5200 MESSAGE(FATAL_ERROR "Cannot find pthreadpool")
5201 ENDIF()
5202 SET_PROPERTY(TARGET pthreadpool PROPERTY IMPORTED_LOCATION "${PTHREADPOOL_LIBRARY}")
5203 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5204ENDIF()
5205TARGET_LINK_LIBRARIES(XNNPACK PUBLIC pthreadpool)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5206TARGET_LINK_LIBRARIES(all_microkernels PRIVATE pthreadpool)
5207TARGET_LINK_LIBRARIES(packing PRIVATE pthreadpool)
5208TARGET_LINK_LIBRARIES(indirection PRIVATE pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5209
5210# ---[ Configure FXdiv
5211IF(NOT TARGET fxdiv)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5212 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5213 SET(FXDIV_BUILD_TESTS OFF CACHE BOOL "")
5214 SET(FXDIV_BUILD_BENCHMARKS OFF CACHE BOOL "")
5215 ADD_SUBDIRECTORY(
5216 "${FXDIV_SOURCE_DIR}"
5217 "${CMAKE_BINARY_DIR}/FXdiv")
5218 ELSE()
5219 FIND_FILE(FXDIV_HDR fxdiv.h PATH_SUFFIXES include)
5220 IF(NOT FXDIV_HDR)
5221 MESSAGE(FATAL_ERROR "Cannot find fxdiv")
5222 ENDIF()
5223 ADD_LIBRARY(fxdiv STATIC "${FXDIV_HDR}")
5224 SET_PROPERTY(TARGET fxdiv PROPERTY LINKER_LANGUAGE C)
5225 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5226ENDIF()
5227TARGET_LINK_LIBRARIES(XNNPACK PRIVATE fxdiv)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5228TARGET_LINK_LIBRARIES(all_microkernels PRIVATE fxdiv)
5229TARGET_LINK_LIBRARIES(indirection PRIVATE fxdiv)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5230
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5231# ---[ Configure FP16
5232IF(NOT TARGET fp16)
Mo Zhou6cafcdb2020-04-26 10:41:41 +0800[diff] [blame]5233 IF(NOT XNNPACK_USE_SYSTEM_LIBS)
5234 SET(FP16_BUILD_TESTS OFF CACHE BOOL "")
5235 SET(FP16_BUILD_BENCHMARKS OFF CACHE BOOL "")
5236 ADD_SUBDIRECTORY(
5237 "${FP16_SOURCE_DIR}"
5238 "${CMAKE_BINARY_DIR}/FP16")
5239 ELSE()
5240 FIND_FILE(FP16_HDR fp16.h PATH_SUFFIXES include)
5241 IF(NOT FP16_HDR)
5242 MESSAGE(FATAL_ERROR "Cannot find fp16")
5243 ENDIF()
5244 ADD_LIBRARY(fp16 STATIC "${FP16_HDR}")
5245 SET_PROPERTY(TARGET fp16 PROPERTY LINKER_LANGUAGE C)
5246 ENDIF()
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5247ENDIF()
5248TARGET_LINK_LIBRARIES(XNNPACK PRIVATE fp16)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5249TARGET_LINK_LIBRARIES(all_microkernels PRIVATE fp16)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5250
5251INSTALL(TARGETS XNNPACK
5252 LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR}
5253 ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR}
5254 PUBLIC_HEADER DESTINATION ${CMAKE_INSTALL_INCLUDEDIR})
5255
5256# ---[ XNNPACK unit tests
5257IF(XNNPACK_BUILD_TESTS)
5258 # ---[ Build google test
5259 IF(NOT TARGET gtest)
5260 SET(gtest_force_shared_crt ON CACHE BOOL "" FORCE)
5261 ADD_SUBDIRECTORY(
5262 "${GOOGLETEST_SOURCE_DIR}"
5263 "${CMAKE_BINARY_DIR}/googletest")
5264 ENDIF()
5265
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]5266 # ---[ Build size tests
5267
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5268 ADD_EXECUTABLE(operator-size-test test/operator-size.c)
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]5269 SET_TARGET_PROPERTIES(operator-size-test PROPERTIES
5270 C_STANDARD 99
5271 C_EXTENSIONS NO)
5272 TARGET_LINK_LIBRARIES(operator-size-test PRIVATE XNNPACK)
5273
Marat Dukhan43130882020-03-12 22:33:07 -0700[diff] [blame]5274 ADD_EXECUTABLE(subgraph-size-test test/subgraph-size.c)
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]5275 SET_TARGET_PROPERTIES(subgraph-size-test PROPERTIES
5276 C_STANDARD 99
5277 C_EXTENSIONS NO)
5278 TARGET_LINK_LIBRARIES(subgraph-size-test PRIVATE XNNPACK)
5279
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5280 # ---[ Build operator-level unit tests
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5281 ADD_EXECUTABLE(abs-nc-test test/abs-nc.cc)
5282 SET_TARGET_PROPERTIES(abs-nc-test PROPERTIES
5283 CXX_STANDARD 11
5284 CXX_STANDARD_REQUIRED YES
5285 CXX_EXTENSIONS NO)
5286 TARGET_INCLUDE_DIRECTORIES(abs-nc-test PRIVATE src test)
5287 TARGET_LINK_LIBRARIES(abs-nc-test PRIVATE XNNPACK gtest gtest_main)
5288 ADD_TEST(abs-nc-test abs-nc-test)
5289
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]5290 ADD_EXECUTABLE(add-nd-test test/add-nd.cc)
5291 SET_TARGET_PROPERTIES(add-nd-test PROPERTIES
5292 CXX_STANDARD 11
5293 CXX_STANDARD_REQUIRED YES
5294 CXX_EXTENSIONS NO)
5295 TARGET_INCLUDE_DIRECTORIES(add-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5296 TARGET_LINK_LIBRARIES(add-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]5297 ADD_TEST(add-nd-test add-nd-test)
5298
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5299 ADD_EXECUTABLE(argmax-pooling-nhwc-test test/argmax-pooling-nhwc.cc)
5300 SET_TARGET_PROPERTIES(argmax-pooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5301 CXX_STANDARD 11
5302 CXX_STANDARD_REQUIRED YES
5303 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5304 TARGET_INCLUDE_DIRECTORIES(argmax-pooling-nhwc-test PRIVATE src test)
5305 TARGET_LINK_LIBRARIES(argmax-pooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5306 ADD_TEST(argmax-pooling-nhwc-test argmax-pooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5307
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5308 ADD_EXECUTABLE(average-pooling-nhwc-test test/average-pooling-nhwc.cc)
5309 SET_TARGET_PROPERTIES(average-pooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5310 CXX_STANDARD 11
5311 CXX_STANDARD_REQUIRED YES
5312 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5313 TARGET_INCLUDE_DIRECTORIES(average-pooling-nhwc-test PRIVATE src test)
5314 TARGET_LINK_LIBRARIES(average-pooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5315 ADD_TEST(average-pooling-nhwc-test average-pooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5316
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5317 ADD_EXECUTABLE(bankers-rounding-nc-test test/bankers-rounding-nc.cc)
5318 SET_TARGET_PROPERTIES(bankers-rounding-nc-test PROPERTIES
5319 CXX_STANDARD 11
5320 CXX_STANDARD_REQUIRED YES
5321 CXX_EXTENSIONS NO)
5322 TARGET_INCLUDE_DIRECTORIES(bankers-rounding-nc-test PRIVATE src test)
5323 TARGET_LINK_LIBRARIES(bankers-rounding-nc-test PRIVATE XNNPACK gtest gtest_main)
5324 ADD_TEST(bankers-rounding-nc-test bankers-rounding-nc-test)
5325
5326 ADD_EXECUTABLE(ceiling-nc-test test/ceiling-nc.cc)
5327 SET_TARGET_PROPERTIES(ceiling-nc-test PROPERTIES
5328 CXX_STANDARD 11
5329 CXX_STANDARD_REQUIRED YES
5330 CXX_EXTENSIONS NO)
5331 TARGET_INCLUDE_DIRECTORIES(ceiling-nc-test PRIVATE src test)
5332 TARGET_LINK_LIBRARIES(ceiling-nc-test PRIVATE XNNPACK gtest gtest_main)
5333 ADD_TEST(ceiling-nc-test ceiling-nc-test)
5334
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5335 ADD_EXECUTABLE(channel-shuffle-nc-test test/channel-shuffle-nc.cc)
5336 SET_TARGET_PROPERTIES(channel-shuffle-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5337 CXX_STANDARD 11
5338 CXX_STANDARD_REQUIRED YES
5339 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5340 TARGET_INCLUDE_DIRECTORIES(channel-shuffle-nc-test PRIVATE src test)
5341 TARGET_LINK_LIBRARIES(channel-shuffle-nc-test PRIVATE XNNPACK gtest gtest_main)
5342 ADD_TEST(channel-shuffle-nc-test channel-shuffle-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5343
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5344 ADD_EXECUTABLE(clamp-nc-test test/clamp-nc.cc)
5345 SET_TARGET_PROPERTIES(clamp-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5346 CXX_STANDARD 11
5347 CXX_STANDARD_REQUIRED YES
5348 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5349 TARGET_INCLUDE_DIRECTORIES(clamp-nc-test PRIVATE src test)
5350 TARGET_LINK_LIBRARIES(clamp-nc-test PRIVATE XNNPACK gtest gtest_main)
5351 ADD_TEST(clamp-nc-test clamp-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5352
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]5353 ADD_EXECUTABLE(constant-pad-nd-test test/constant-pad-nd.cc)
5354 SET_TARGET_PROPERTIES(constant-pad-nd-test PROPERTIES
5355 CXX_STANDARD 11
5356 CXX_STANDARD_REQUIRED YES
5357 CXX_EXTENSIONS NO)
5358 TARGET_INCLUDE_DIRECTORIES(constant-pad-nd-test PRIVATE src test)
5359 TARGET_LINK_LIBRARIES(constant-pad-nd-test PRIVATE XNNPACK gtest gtest_main)
5360 ADD_TEST(constant-pad-nd-test constant-pad-nd-test)
5361
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5362 ADD_EXECUTABLE(convolution-nhwc-test test/convolution-nhwc.cc)
5363 SET_TARGET_PROPERTIES(convolution-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5364 CXX_STANDARD 11
5365 CXX_STANDARD_REQUIRED YES
Marat Dukhan258b6392021-06-29 19:18:09 -0700[diff] [blame]5366 CXX_EXTENSIONS YES)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5367 TARGET_INCLUDE_DIRECTORIES(convolution-nhwc-test PRIVATE src test)
Frank Barchard49b4dcc2020-06-26 14:07:19 -0700[diff] [blame]5368 TARGET_LINK_LIBRARIES(convolution-nhwc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5369 ADD_TEST(convolution-nhwc-test convolution-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5370
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5371 ADD_EXECUTABLE(convolution-nchw-test test/convolution-nchw.cc)
5372 SET_TARGET_PROPERTIES(convolution-nchw-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5373 CXX_STANDARD 11
5374 CXX_STANDARD_REQUIRED YES
Marat Dukhan258b6392021-06-29 19:18:09 -0700[diff] [blame]5375 CXX_EXTENSIONS YES)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5376 TARGET_INCLUDE_DIRECTORIES(convolution-nchw-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5377 TARGET_LINK_LIBRARIES(convolution-nchw-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5378 ADD_TEST(convolution-nchw-test convolution-nchw-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5379
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]5380 ADD_EXECUTABLE(copy-nc-test test/copy-nc.cc)
5381 SET_TARGET_PROPERTIES(copy-nc-test PROPERTIES
5382 CXX_STANDARD 11
5383 CXX_STANDARD_REQUIRED YES
5384 CXX_EXTENSIONS NO)
5385 TARGET_INCLUDE_DIRECTORIES(copy-nc-test PRIVATE src test)
5386 TARGET_LINK_LIBRARIES(copy-nc-test PRIVATE XNNPACK gtest gtest_main)
5387 ADD_TEST(copy-nc-test copy-nc-test)
5388
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5389 ADD_EXECUTABLE(deconvolution-nhwc-test test/deconvolution-nhwc.cc)
5390 SET_TARGET_PROPERTIES(deconvolution-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5391 CXX_STANDARD 11
5392 CXX_STANDARD_REQUIRED YES
5393 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5394 TARGET_INCLUDE_DIRECTORIES(deconvolution-nhwc-test PRIVATE src test)
5395 TARGET_LINK_LIBRARIES(deconvolution-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5396 ADD_TEST(deconvolution-nhwc-test deconvolution-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5397
Marat Dukhan188d1042020-11-24 23:39:40 -0800[diff] [blame]5398 ADD_EXECUTABLE(depth-to-space-nchw2nhwc-test test/depth-to-space-nchw2nhwc.cc)
5399 SET_TARGET_PROPERTIES(depth-to-space-nchw2nhwc-test PROPERTIES
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -0800[diff] [blame]5400 CXX_STANDARD 11
5401 CXX_STANDARD_REQUIRED YES
5402 CXX_EXTENSIONS NO)
Marat Dukhan188d1042020-11-24 23:39:40 -0800[diff] [blame]5403 TARGET_INCLUDE_DIRECTORIES(depth-to-space-nchw2nhwc-test PRIVATE src test)
5404 TARGET_LINK_LIBRARIES(depth-to-space-nchw2nhwc-test PRIVATE XNNPACK gtest gtest_main)
5405 ADD_TEST(depth-to-space-nchw2nhwc-test depth-to-space-nchw2nhwc-test)
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -0800[diff] [blame]5406
Marat Dukhan0e521172020-11-25 13:10:04 -0800[diff] [blame]5407 ADD_EXECUTABLE(depth-to-space-nhwc-test test/depth-to-space-nhwc.cc)
5408 SET_TARGET_PROPERTIES(depth-to-space-nhwc-test PROPERTIES
5409 CXX_STANDARD 11
5410 CXX_STANDARD_REQUIRED YES
5411 CXX_EXTENSIONS NO)
5412 TARGET_INCLUDE_DIRECTORIES(depth-to-space-nhwc-test PRIVATE src test)
5413 TARGET_LINK_LIBRARIES(depth-to-space-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5414 ADD_TEST(depth-to-space-nhwc-test depth-to-space-nhwc-test)
5415
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]5416 ADD_EXECUTABLE(divide-nd-test test/divide-nd.cc)
5417 SET_TARGET_PROPERTIES(divide-nd-test PROPERTIES
5418 CXX_STANDARD 11
5419 CXX_STANDARD_REQUIRED YES
5420 CXX_EXTENSIONS NO)
5421 TARGET_INCLUDE_DIRECTORIES(divide-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5422 TARGET_LINK_LIBRARIES(divide-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]5423 ADD_TEST(divide-nd-test divide-nd-test)
5424
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -0800[diff] [blame]5425 ADD_EXECUTABLE(elu-nc-test test/elu-nc.cc)
5426 SET_TARGET_PROPERTIES(elu-nc-test PROPERTIES
5427 CXX_STANDARD 11
5428 CXX_STANDARD_REQUIRED YES
5429 CXX_EXTENSIONS NO)
5430 TARGET_INCLUDE_DIRECTORIES(elu-nc-test PRIVATE src test)
5431 TARGET_LINK_LIBRARIES(elu-nc-test PRIVATE XNNPACK gtest gtest_main)
5432 ADD_TEST(elu-nc-test elu-nc-test)
5433
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5434 ADD_EXECUTABLE(fully-connected-nc-test test/fully-connected-nc.cc)
5435 SET_TARGET_PROPERTIES(fully-connected-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5436 CXX_STANDARD 11
5437 CXX_STANDARD_REQUIRED YES
5438 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5439 TARGET_INCLUDE_DIRECTORIES(fully-connected-nc-test PRIVATE src test)
5440 TARGET_LINK_LIBRARIES(fully-connected-nc-test PRIVATE XNNPACK gtest gtest_main)
5441 ADD_TEST(fully-connected-nc-test fully-connected-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5442
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5443 ADD_EXECUTABLE(floor-nc-test test/floor-nc.cc)
5444 SET_TARGET_PROPERTIES(floor-nc-test PROPERTIES
5445 CXX_STANDARD 11
5446 CXX_STANDARD_REQUIRED YES
5447 CXX_EXTENSIONS NO)
5448 TARGET_INCLUDE_DIRECTORIES(floor-nc-test PRIVATE src test)
5449 TARGET_LINK_LIBRARIES(floor-nc-test PRIVATE XNNPACK gtest gtest_main)
5450 ADD_TEST(floor-nc-test floor-nc-test)
5451
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5452 ADD_EXECUTABLE(global-average-pooling-nwc-test test/global-average-pooling-nwc.cc)
5453 SET_TARGET_PROPERTIES(global-average-pooling-nwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5454 CXX_STANDARD 11
5455 CXX_STANDARD_REQUIRED YES
5456 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5457 TARGET_INCLUDE_DIRECTORIES(global-average-pooling-nwc-test PRIVATE src test)
Marat Dukhanef61d022020-06-19 13:54:49 -0700[diff] [blame]5458 TARGET_LINK_LIBRARIES(global-average-pooling-nwc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5459 ADD_TEST(global-average-pooling-nwc-test global-average-pooling-nwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5460
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5461 ADD_EXECUTABLE(global-average-pooling-ncw-test test/global-average-pooling-ncw.cc)
5462 SET_TARGET_PROPERTIES(global-average-pooling-ncw-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5463 CXX_STANDARD 11
5464 CXX_STANDARD_REQUIRED YES
5465 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5466 TARGET_INCLUDE_DIRECTORIES(global-average-pooling-ncw-test PRIVATE src test)
Marat Dukhan5fd403b2020-06-23 17:43:48 -0700[diff] [blame]5467 TARGET_LINK_LIBRARIES(global-average-pooling-ncw-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5468 ADD_TEST(global-average-pooling-ncw-test global-average-pooling-ncw-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5469
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5470 ADD_EXECUTABLE(hardswish-nc-test test/hardswish-nc.cc)
5471 SET_TARGET_PROPERTIES(hardswish-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5472 CXX_STANDARD 11
5473 CXX_STANDARD_REQUIRED YES
5474 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5475 TARGET_INCLUDE_DIRECTORIES(hardswish-nc-test PRIVATE src test)
Marat Dukhanae24dfc2020-09-23 17:12:45 -0700[diff] [blame]5476 TARGET_LINK_LIBRARIES(hardswish-nc-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5477 ADD_TEST(hardswish-nc-test hardswish-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5478
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5479 ADD_EXECUTABLE(leaky-relu-nc-test test/leaky-relu-nc.cc)
5480 SET_TARGET_PROPERTIES(leaky-relu-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5481 CXX_STANDARD 11
5482 CXX_STANDARD_REQUIRED YES
5483 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5484 TARGET_INCLUDE_DIRECTORIES(leaky-relu-nc-test PRIVATE src test)
5485 TARGET_LINK_LIBRARIES(leaky-relu-nc-test PRIVATE XNNPACK gtest gtest_main)
5486 ADD_TEST(leaky-relu-nc-test leaky-relu-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5487
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5488 ADD_EXECUTABLE(max-pooling-nhwc-test test/max-pooling-nhwc.cc)
5489 SET_TARGET_PROPERTIES(max-pooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5490 CXX_STANDARD 11
5491 CXX_STANDARD_REQUIRED YES
5492 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5493 TARGET_INCLUDE_DIRECTORIES(max-pooling-nhwc-test PRIVATE src test)
5494 TARGET_LINK_LIBRARIES(max-pooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5495 ADD_TEST(max-pooling-nhwc-test max-pooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5496
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5497 ADD_EXECUTABLE(maximum-nd-test test/maximum-nd.cc)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5498 SET_TARGET_PROPERTIES(maximum-nd-test PROPERTIES
5499 CXX_STANDARD 11
5500 CXX_STANDARD_REQUIRED YES
5501 CXX_EXTENSIONS NO)
5502 TARGET_INCLUDE_DIRECTORIES(maximum-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5503 TARGET_LINK_LIBRARIES(maximum-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5504 ADD_TEST(maximum-nd-test maximum-nd-test)
5505
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5506 ADD_EXECUTABLE(minimum-nd-test test/minimum-nd.cc)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5507 SET_TARGET_PROPERTIES(minimum-nd-test PROPERTIES
5508 CXX_STANDARD 11
5509 CXX_STANDARD_REQUIRED YES
5510 CXX_EXTENSIONS NO)
5511 TARGET_INCLUDE_DIRECTORIES(minimum-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5512 TARGET_LINK_LIBRARIES(minimum-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5513 ADD_TEST(minimum-nd-test minimum-nd-test)
5514
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5515 ADD_EXECUTABLE(multiply-nd-test test/multiply-nd.cc)
5516 SET_TARGET_PROPERTIES(multiply-nd-test PROPERTIES
Marat Dukhan9d501d52019-11-16 02:30:50 -0800[diff] [blame]5517 CXX_STANDARD 11
5518 CXX_STANDARD_REQUIRED YES
5519 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5520 TARGET_INCLUDE_DIRECTORIES(multiply-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5521 TARGET_LINK_LIBRARIES(multiply-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5522 ADD_TEST(multiply-nd-test multiply-nd-test)
Marat Dukhan9d501d52019-11-16 02:30:50 -0800[diff] [blame]5523
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5524 ADD_EXECUTABLE(negate-nc-test test/negate-nc.cc)
5525 SET_TARGET_PROPERTIES(negate-nc-test PROPERTIES
5526 CXX_STANDARD 11
5527 CXX_STANDARD_REQUIRED YES
5528 CXX_EXTENSIONS NO)
5529 TARGET_INCLUDE_DIRECTORIES(negate-nc-test PRIVATE src test)
5530 TARGET_LINK_LIBRARIES(negate-nc-test PRIVATE XNNPACK gtest gtest_main)
5531 ADD_TEST(negate-nc-test negate-nc-test)
5532
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5533 ADD_EXECUTABLE(prelu-nc-test test/prelu-nc.cc)
5534 SET_TARGET_PROPERTIES(prelu-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5535 CXX_STANDARD 11
5536 CXX_STANDARD_REQUIRED YES
5537 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5538 TARGET_INCLUDE_DIRECTORIES(prelu-nc-test PRIVATE src test)
5539 TARGET_LINK_LIBRARIES(prelu-nc-test PRIVATE XNNPACK gtest gtest_main)
5540 ADD_TEST(prelu-nc-test prelu-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5541
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5542 ADD_EXECUTABLE(resize-bilinear-nhwc-test test/resize-bilinear-nhwc.cc)
5543 SET_TARGET_PROPERTIES(resize-bilinear-nhwc-test PROPERTIES
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5544 CXX_STANDARD 11
5545 CXX_STANDARD_REQUIRED YES
5546 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5547 TARGET_INCLUDE_DIRECTORIES(resize-bilinear-nhwc-test PRIVATE src test)
5548 TARGET_LINK_LIBRARIES(resize-bilinear-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5549 ADD_TEST(resize-bilinear-nhwc-test resize-bilinear-nhwc-test)
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5550
Artsiom Ablavatski97918102020-10-27 15:52:59 -0700[diff] [blame]5551 ADD_EXECUTABLE(resize-bilinear-nchw-test test/resize-bilinear-nchw.cc)
5552 SET_TARGET_PROPERTIES(resize-bilinear-nchw-test PROPERTIES
5553 CXX_STANDARD 11
5554 CXX_STANDARD_REQUIRED YES
5555 CXX_EXTENSIONS NO)
5556 TARGET_INCLUDE_DIRECTORIES(resize-bilinear-nchw-test PRIVATE src test)
5557 TARGET_LINK_LIBRARIES(resize-bilinear-nchw-test PRIVATE XNNPACK gtest gtest_main)
5558 ADD_TEST(resize-bilinear-nchw-test resize-bilinear-nchw-test)
5559
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5560 ADD_EXECUTABLE(sigmoid-nc-test test/sigmoid-nc.cc)
5561 SET_TARGET_PROPERTIES(sigmoid-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5562 CXX_STANDARD 11
5563 CXX_STANDARD_REQUIRED YES
5564 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5565 TARGET_INCLUDE_DIRECTORIES(sigmoid-nc-test PRIVATE src test)
5566 TARGET_LINK_LIBRARIES(sigmoid-nc-test PRIVATE XNNPACK gtest gtest_main)
5567 ADD_TEST(sigmoid-nc-test sigmoid-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5568
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5569 ADD_EXECUTABLE(softmax-nc-test test/softmax-nc.cc)
5570 SET_TARGET_PROPERTIES(softmax-nc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5571 CXX_STANDARD 11
5572 CXX_STANDARD_REQUIRED YES
5573 CXX_EXTENSIONS NO)
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5574 TARGET_INCLUDE_DIRECTORIES(softmax-nc-test PRIVATE src test)
5575 TARGET_LINK_LIBRARIES(softmax-nc-test PRIVATE XNNPACK gtest gtest_main)
5576 ADD_TEST(softmax-nc-test softmax-nc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5577
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5578 ADD_EXECUTABLE(square-nc-test test/square-nc.cc)
5579 SET_TARGET_PROPERTIES(square-nc-test PROPERTIES
5580 CXX_STANDARD 11
5581 CXX_STANDARD_REQUIRED YES
5582 CXX_EXTENSIONS NO)
5583 TARGET_INCLUDE_DIRECTORIES(square-nc-test PRIVATE src test)
5584 TARGET_LINK_LIBRARIES(square-nc-test PRIVATE XNNPACK gtest gtest_main)
5585 ADD_TEST(square-nc-test square-nc-test)
5586
Marat Dukhan6804bbd2020-06-30 19:26:11 -0700[diff] [blame]5587 ADD_EXECUTABLE(square-root-nc-test test/square-root-nc.cc)
5588 SET_TARGET_PROPERTIES(square-root-nc-test PROPERTIES
5589 CXX_STANDARD 11
5590 CXX_STANDARD_REQUIRED YES
5591 CXX_EXTENSIONS NO)
5592 TARGET_INCLUDE_DIRECTORIES(square-root-nc-test PRIVATE src test)
5593 TARGET_LINK_LIBRARIES(square-root-nc-test PRIVATE XNNPACK gtest gtest_main)
5594 ADD_TEST(square-root-nc-test square-root-nc-test)
5595
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]5596 ADD_EXECUTABLE(squared-difference-nd-test test/squared-difference-nd.cc)
5597 SET_TARGET_PROPERTIES(squared-difference-nd-test PROPERTIES
5598 CXX_STANDARD 11
5599 CXX_STANDARD_REQUIRED YES
5600 CXX_EXTENSIONS NO)
5601 TARGET_INCLUDE_DIRECTORIES(squared-difference-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5602 TARGET_LINK_LIBRARIES(squared-difference-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]5603 ADD_TEST(squared-difference-nd-test squared-difference-nd-test)
5604
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5605 ADD_EXECUTABLE(subtract-nd-test test/subtract-nd.cc)
5606 SET_TARGET_PROPERTIES(subtract-nd-test PROPERTIES
5607 CXX_STANDARD 11
5608 CXX_STANDARD_REQUIRED YES
5609 CXX_EXTENSIONS NO)
5610 TARGET_INCLUDE_DIRECTORIES(subtract-nd-test PRIVATE src test)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]5611 TARGET_LINK_LIBRARIES(subtract-nd-test PRIVATE XNNPACK fp16 gtest gtest_main)
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5612 ADD_TEST(subtract-nd-test subtract-nd-test)
5613
Marat Dukhan5de7bc02021-09-09 19:04:01 -0700[diff] [blame]5614 ADD_EXECUTABLE(tanh-nc-test test/tanh-nc.cc)
5615 SET_TARGET_PROPERTIES(tanh-nc-test PROPERTIES
5616 CXX_STANDARD 11
5617 CXX_STANDARD_REQUIRED YES
5618 CXX_EXTENSIONS NO)
5619 TARGET_INCLUDE_DIRECTORIES(tanh-nc-test PRIVATE src test)
5620 TARGET_LINK_LIBRARIES(tanh-nc-test PRIVATE XNNPACK gtest gtest_main)
5621 ADD_TEST(tanh-nc-test tanh-nc-test)
5622
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5623 ADD_EXECUTABLE(truncation-nc-test test/truncation-nc.cc)
5624 SET_TARGET_PROPERTIES(truncation-nc-test PROPERTIES
5625 CXX_STANDARD 11
5626 CXX_STANDARD_REQUIRED YES
5627 CXX_EXTENSIONS NO)
5628 TARGET_INCLUDE_DIRECTORIES(truncation-nc-test PRIVATE src test)
5629 TARGET_LINK_LIBRARIES(truncation-nc-test PRIVATE XNNPACK gtest gtest_main)
5630 ADD_TEST(truncation-nc-test truncation-nc-test)
5631
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5632 ADD_EXECUTABLE(unpooling-nhwc-test test/unpooling-nhwc.cc)
5633 SET_TARGET_PROPERTIES(unpooling-nhwc-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5634 CXX_STANDARD 11
5635 CXX_STANDARD_REQUIRED YES
5636 CXX_EXTENSIONS NO)
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5637 TARGET_INCLUDE_DIRECTORIES(unpooling-nhwc-test PRIVATE src test)
5638 TARGET_LINK_LIBRARIES(unpooling-nhwc-test PRIVATE XNNPACK gtest gtest_main)
5639 ADD_TEST(unpooling-nhwc-test unpooling-nhwc-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5640
XNNPACK Teamab8c4c82020-10-09 08:05:51 -0700[diff] [blame]5641 ADD_EXECUTABLE(memory-planner-test test/memory-planner-test.cc)
5642 SET_TARGET_PROPERTIES(memory-planner-test PROPERTIES
5643 C_STANDARD 11
5644 CXX_STANDARD_REQUIRED YES
5645 C_EXTENSIONS NO)
5646 TARGET_INCLUDE_DIRECTORIES(memory-planner-test PRIVATE src test)
5647 TARGET_LINK_LIBRARIES(memory-planner-test PRIVATE XNNPACK gtest gtest_main)
5648 ADD_TEST(memory-planner-test memory-planner-test)
5649
5650 ADD_EXECUTABLE(subgraph-nchw-test test/subgraph-nchw.cc)
5651 SET_TARGET_PROPERTIES(subgraph-nchw-test PROPERTIES
5652 C_STANDARD 11
5653 CXX_STANDARD_REQUIRED YES
5654 C_EXTENSIONS NO)
5655 TARGET_INCLUDE_DIRECTORIES(subgraph-nchw-test PRIVATE src test)
5656 TARGET_LINK_LIBRARIES(subgraph-nchw-test PRIVATE XNNPACK gtest gtest_main)
5657 ADD_TEST(subgraph-nchw-test subgraph-nchw-test)
5658
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5659 # ---[ Build microkernel-level unit tests
Marat Dukhanf1a6ed32021-09-26 13:40:19 -0700[diff] [blame]5660 ADD_EXECUTABLE(f16-f32-vcvt-test test/f16-f32-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
5661 SET_TARGET_PROPERTIES(f16-f32-vcvt-test PROPERTIES
5662 CXX_STANDARD 11
5663 CXX_STANDARD_REQUIRED YES
5664 CXX_EXTENSIONS YES)
5665 TARGET_INCLUDE_DIRECTORIES(f16-f32-vcvt-test PRIVATE include src test)
5666 TARGET_LINK_LIBRARIES(f16-f32-vcvt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
5667 ADD_TEST(f16-f32-vcvt-test f16-f32-vcvt-test)
5668
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5669 ADD_EXECUTABLE(f16-dwconv-minmax-test test/f16-dwconv-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]5670 SET_TARGET_PROPERTIES(f16-dwconv-minmax-test PROPERTIES
5671 CXX_STANDARD 11
5672 CXX_STANDARD_REQUIRED YES
5673 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5674 TARGET_INCLUDE_DIRECTORIES(f16-dwconv-minmax-test PRIVATE include src test)
5675 TARGET_LINK_LIBRARIES(f16-dwconv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]5676 ADD_TEST(f16-dwconv-minmax-test f16-dwconv-minmax-test)
5677
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5678 ADD_EXECUTABLE(f16-gavgpool-minmax-test test/f16-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]5679 SET_TARGET_PROPERTIES(f16-gavgpool-minmax-test PROPERTIES
5680 CXX_STANDARD 11
5681 CXX_STANDARD_REQUIRED YES
5682 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5683 TARGET_INCLUDE_DIRECTORIES(f16-gavgpool-minmax-test PRIVATE include src test)
5684 TARGET_LINK_LIBRARIES(f16-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]5685 ADD_TEST(f16-gavgpool-minmax-test f16-gavgpool-minmax-test)
5686
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5687 ADD_EXECUTABLE(f16-gemm-minmax-test test/f16-gemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5688 SET_TARGET_PROPERTIES(f16-gemm-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5689 CXX_STANDARD 11
5690 CXX_STANDARD_REQUIRED YES
5691 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5692 TARGET_INCLUDE_DIRECTORIES(f16-gemm-minmax-test PRIVATE include src test)
5693 TARGET_LINK_LIBRARIES(f16-gemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5694 ADD_TEST(f16-gemm-minmax-test f16-gemm-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5695
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5696 ADD_EXECUTABLE(f16-igemm-minmax-test test/f16-igemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]5697 SET_TARGET_PROPERTIES(f16-igemm-minmax-test PROPERTIES
5698 CXX_STANDARD 11
5699 CXX_STANDARD_REQUIRED YES
5700 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5701 TARGET_INCLUDE_DIRECTORIES(f16-igemm-minmax-test PRIVATE include src test)
5702 TARGET_LINK_LIBRARIES(f16-igemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]5703 ADD_TEST(f16-igemm-minmax-test f16-igemm-minmax-test)
5704
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5705 ADD_EXECUTABLE(f16-spmm-minmax-test test/f16-spmm-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5706 SET_TARGET_PROPERTIES(f16-spmm-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5707 CXX_STANDARD 11
5708 CXX_STANDARD_REQUIRED YES
5709 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5710 TARGET_INCLUDE_DIRECTORIES(f16-spmm-minmax-test PRIVATE include src test)
5711 TARGET_LINK_LIBRARIES(f16-spmm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5712 ADD_TEST(f16-spmm-minmax-test f16-spmm-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]5713
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5714 ADD_EXECUTABLE(f16-vadd-minmax-test test/f16-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5715 SET_TARGET_PROPERTIES(f16-vadd-minmax-test PROPERTIES
5716 CXX_STANDARD 11
5717 CXX_STANDARD_REQUIRED YES
5718 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5719 TARGET_INCLUDE_DIRECTORIES(f16-vadd-minmax-test PRIVATE include src test)
5720 TARGET_LINK_LIBRARIES(f16-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5721 ADD_TEST(f16-vadd-minmax-test f16-vadd-minmax-test)
5722
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5723 ADD_EXECUTABLE(f16-vaddc-minmax-test test/f16-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5724 SET_TARGET_PROPERTIES(f16-vaddc-minmax-test PROPERTIES
5725 CXX_STANDARD 11
5726 CXX_STANDARD_REQUIRED YES
5727 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5728 TARGET_INCLUDE_DIRECTORIES(f16-vaddc-minmax-test PRIVATE include src test)
5729 TARGET_LINK_LIBRARIES(f16-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5730 ADD_TEST(f16-vaddc-minmax-test f16-vaddc-minmax-test)
5731
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5732 ADD_EXECUTABLE(f16-vclamp-test test/f16-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5733 SET_TARGET_PROPERTIES(f16-vclamp-test PROPERTIES
5734 CXX_STANDARD 11
5735 CXX_STANDARD_REQUIRED YES
5736 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5737 TARGET_INCLUDE_DIRECTORIES(f16-vclamp-test PRIVATE include src test)
5738 TARGET_LINK_LIBRARIES(f16-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5739 ADD_TEST(f16-vclamp-test f16-vclamp-test)
5740
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5741 ADD_EXECUTABLE(f16-vdiv-minmax-test test/f16-vdiv-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5742 SET_TARGET_PROPERTIES(f16-vdiv-minmax-test PROPERTIES
5743 CXX_STANDARD 11
5744 CXX_STANDARD_REQUIRED YES
5745 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5746 TARGET_INCLUDE_DIRECTORIES(f16-vdiv-minmax-test PRIVATE include src test)
5747 TARGET_LINK_LIBRARIES(f16-vdiv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5748 ADD_TEST(f16-vdiv-minmax-test f16-vdiv-minmax-test)
5749
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5750 ADD_EXECUTABLE(f16-vdivc-minmax-test test/f16-vdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5751 SET_TARGET_PROPERTIES(f16-vdivc-minmax-test PROPERTIES
5752 CXX_STANDARD 11
5753 CXX_STANDARD_REQUIRED YES
5754 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5755 TARGET_INCLUDE_DIRECTORIES(f16-vdivc-minmax-test PRIVATE include src test)
5756 TARGET_LINK_LIBRARIES(f16-vdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5757 ADD_TEST(f16-vdivc-minmax-test f16-vdivc-minmax-test)
5758
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5759 ADD_EXECUTABLE(f16-vrdivc-minmax-test test/f16-vrdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5760 SET_TARGET_PROPERTIES(f16-vrdivc-minmax-test PROPERTIES
5761 CXX_STANDARD 11
5762 CXX_STANDARD_REQUIRED YES
5763 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5764 TARGET_INCLUDE_DIRECTORIES(f16-vrdivc-minmax-test PRIVATE include src test)
5765 TARGET_LINK_LIBRARIES(f16-vrdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5766 ADD_TEST(f16-vrdivc-minmax-test f16-vrdivc-minmax-test)
5767
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5768 ADD_EXECUTABLE(f16-vhswish-test test/f16-vhswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5769 SET_TARGET_PROPERTIES(f16-vhswish-test PROPERTIES
5770 CXX_STANDARD 11
5771 CXX_STANDARD_REQUIRED YES
5772 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5773 TARGET_INCLUDE_DIRECTORIES(f16-vhswish-test PRIVATE include src test)
5774 TARGET_LINK_LIBRARIES(f16-vhswish-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5775 ADD_TEST(f16-vhswish-test f16-vhswish-test)
5776
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5777 ADD_EXECUTABLE(f16-vmax-test test/f16-vmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5778 SET_TARGET_PROPERTIES(f16-vmax-test PROPERTIES
5779 CXX_STANDARD 11
5780 CXX_STANDARD_REQUIRED YES
5781 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5782 TARGET_INCLUDE_DIRECTORIES(f16-vmax-test PRIVATE include src test)
5783 TARGET_LINK_LIBRARIES(f16-vmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5784 ADD_TEST(f16-vmax-test f16-vmax-test)
5785
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5786 ADD_EXECUTABLE(f16-vmaxc-test test/f16-vmaxc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5787 SET_TARGET_PROPERTIES(f16-vmaxc-test PROPERTIES
5788 CXX_STANDARD 11
5789 CXX_STANDARD_REQUIRED YES
5790 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5791 TARGET_INCLUDE_DIRECTORIES(f16-vmaxc-test PRIVATE include src test)
5792 TARGET_LINK_LIBRARIES(f16-vmaxc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5793 ADD_TEST(f16-vmaxc-test f16-vmaxc-test)
5794
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5795 ADD_EXECUTABLE(f16-vmin-test test/f16-vmin.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5796 SET_TARGET_PROPERTIES(f16-vmin-test PROPERTIES
5797 CXX_STANDARD 11
5798 CXX_STANDARD_REQUIRED YES
5799 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5800 TARGET_INCLUDE_DIRECTORIES(f16-vmin-test PRIVATE include src test)
5801 TARGET_LINK_LIBRARIES(f16-vmin-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5802 ADD_TEST(f16-vmin-test f16-vmin-test)
5803
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5804 ADD_EXECUTABLE(f16-vminc-test test/f16-vminc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5805 SET_TARGET_PROPERTIES(f16-vminc-test PROPERTIES
5806 CXX_STANDARD 11
5807 CXX_STANDARD_REQUIRED YES
5808 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5809 TARGET_INCLUDE_DIRECTORIES(f16-vminc-test PRIVATE include src test)
5810 TARGET_LINK_LIBRARIES(f16-vminc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5811 ADD_TEST(f16-vminc-test f16-vminc-test)
5812
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5813 ADD_EXECUTABLE(f16-vmul-minmax-test test/f16-vmul-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5814 SET_TARGET_PROPERTIES(f16-vmul-minmax-test PROPERTIES
5815 CXX_STANDARD 11
5816 CXX_STANDARD_REQUIRED YES
5817 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5818 TARGET_INCLUDE_DIRECTORIES(f16-vmul-minmax-test PRIVATE include src test)
5819 TARGET_LINK_LIBRARIES(f16-vmul-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5820 ADD_TEST(f16-vmul-minmax-test f16-vmul-minmax-test)
5821
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5822 ADD_EXECUTABLE(f16-vmulc-minmax-test test/f16-vmulc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5823 SET_TARGET_PROPERTIES(f16-vmulc-minmax-test PROPERTIES
5824 CXX_STANDARD 11
5825 CXX_STANDARD_REQUIRED YES
5826 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5827 TARGET_INCLUDE_DIRECTORIES(f16-vmulc-minmax-test PRIVATE include src test)
5828 TARGET_LINK_LIBRARIES(f16-vmulc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5829 ADD_TEST(f16-vmulc-minmax-test f16-vmulc-minmax-test)
5830
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5831 ADD_EXECUTABLE(f16-vmulcaddc-minmax-test test/f16-vmulcaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5832 SET_TARGET_PROPERTIES(f16-vmulcaddc-minmax-test PROPERTIES
5833 CXX_STANDARD 11
5834 CXX_STANDARD_REQUIRED YES
5835 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5836 TARGET_INCLUDE_DIRECTORIES(f16-vmulcaddc-minmax-test PRIVATE include src test)
5837 TARGET_LINK_LIBRARIES(f16-vmulcaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5838 ADD_TEST(f16-vmulcaddc-minmax-test f16-vmulcaddc-minmax-test)
5839
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5840 ADD_EXECUTABLE(f16-prelu-test test/f16-prelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5841 SET_TARGET_PROPERTIES(f16-prelu-test PROPERTIES
5842 CXX_STANDARD 11
5843 CXX_STANDARD_REQUIRED YES
5844 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5845 TARGET_INCLUDE_DIRECTORIES(f16-prelu-test PRIVATE include src test)
5846 TARGET_LINK_LIBRARIES(f16-prelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5847 ADD_TEST(f16-prelu-test f16-prelu-test)
5848
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5849 ADD_EXECUTABLE(f16-vsub-minmax-test test/f16-vsub-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5850 SET_TARGET_PROPERTIES(f16-vsub-minmax-test PROPERTIES
5851 CXX_STANDARD 11
5852 CXX_STANDARD_REQUIRED YES
5853 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5854 TARGET_INCLUDE_DIRECTORIES(f16-vsub-minmax-test PRIVATE include src test)
5855 TARGET_LINK_LIBRARIES(f16-vsub-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5856 ADD_TEST(f16-vsub-minmax-test f16-vsub-minmax-test)
5857
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5858 ADD_EXECUTABLE(f16-vsubc-minmax-test test/f16-vsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5859 SET_TARGET_PROPERTIES(f16-vsubc-minmax-test PROPERTIES
5860 CXX_STANDARD 11
5861 CXX_STANDARD_REQUIRED YES
5862 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5863 TARGET_INCLUDE_DIRECTORIES(f16-vsubc-minmax-test PRIVATE include src test)
5864 TARGET_LINK_LIBRARIES(f16-vsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5865 ADD_TEST(f16-vsubc-minmax-test f16-vsubc-minmax-test)
5866
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5867 ADD_EXECUTABLE(f16-vrsubc-minmax-test test/f16-vrsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5868 SET_TARGET_PROPERTIES(f16-vrsubc-minmax-test PROPERTIES
5869 CXX_STANDARD 11
5870 CXX_STANDARD_REQUIRED YES
5871 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5872 TARGET_INCLUDE_DIRECTORIES(f16-vrsubc-minmax-test PRIVATE include src test)
5873 TARGET_LINK_LIBRARIES(f16-vrsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]5874 ADD_TEST(f16-vrsubc-minmax-test f16-vrsubc-minmax-test)
5875
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5876 ADD_EXECUTABLE(f32-argmaxpool-test test/f32-argmaxpool.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5877 SET_TARGET_PROPERTIES(f32-argmaxpool-test PROPERTIES
5878 CXX_STANDARD 11
5879 CXX_STANDARD_REQUIRED YES
5880 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5881 TARGET_INCLUDE_DIRECTORIES(f32-argmaxpool-test PRIVATE include src test)
5882 TARGET_LINK_LIBRARIES(f32-argmaxpool-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5883 ADD_TEST(f32-argmaxpool-test f32-argmaxpool-test)
5884
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5885 ADD_EXECUTABLE(f32-avgpool-minmax-test test/f32-avgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5886 SET_TARGET_PROPERTIES(f32-avgpool-minmax-test PROPERTIES
5887 CXX_STANDARD 11
5888 CXX_STANDARD_REQUIRED YES
5889 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5890 TARGET_INCLUDE_DIRECTORIES(f32-avgpool-minmax-test PRIVATE include src test)
5891 TARGET_LINK_LIBRARIES(f32-avgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5892 ADD_TEST(f32-avgpool-minmax-test f32-avgpool-minmax-test)
5893
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5894 ADD_EXECUTABLE(f32-conv-hwc-test test/f32-conv-hwc.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5895 SET_TARGET_PROPERTIES(f32-conv-hwc-test PROPERTIES
5896 CXX_STANDARD 11
5897 CXX_STANDARD_REQUIRED YES
5898 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5899 TARGET_INCLUDE_DIRECTORIES(f32-conv-hwc-test PRIVATE include src test)
5900 TARGET_LINK_LIBRARIES(f32-conv-hwc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5901 ADD_TEST(f32-conv-hwc-test f32-conv-hwc-test)
5902
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5903 ADD_EXECUTABLE(f32-conv-hwc2chw-test test/f32-conv-hwc2chw.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5904 SET_TARGET_PROPERTIES(f32-conv-hwc2chw-test PROPERTIES
5905 CXX_STANDARD 11
5906 CXX_STANDARD_REQUIRED YES
5907 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5908 TARGET_INCLUDE_DIRECTORIES(f32-conv-hwc2chw-test PRIVATE include src test)
5909 TARGET_LINK_LIBRARIES(f32-conv-hwc2chw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5910 ADD_TEST(f32-conv-hwc2chw-test f32-conv-hwc2chw-test)
5911
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5912 ADD_EXECUTABLE(f32-dwconv-test test/f32-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5913 SET_TARGET_PROPERTIES(f32-dwconv-test PROPERTIES
5914 CXX_STANDARD 11
5915 CXX_STANDARD_REQUIRED YES
5916 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5917 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-test PRIVATE include src test)
5918 TARGET_LINK_LIBRARIES(f32-dwconv-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5919 ADD_TEST(f32-dwconv-test f32-dwconv-test)
5920
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5921 ADD_EXECUTABLE(f32-dwconv2d-chw-test test/f32-dwconv2d-chw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5922 SET_TARGET_PROPERTIES(f32-dwconv2d-chw-test PROPERTIES
5923 CXX_STANDARD 11
5924 CXX_STANDARD_REQUIRED YES
5925 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5926 TARGET_INCLUDE_DIRECTORIES(f32-dwconv2d-chw-test PRIVATE include src test)
5927 TARGET_LINK_LIBRARIES(f32-dwconv2d-chw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5928 ADD_TEST(f32-dwconv2d-chw-test f32-dwconv2d-chw-test)
5929
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5930 ADD_EXECUTABLE(f32-dwconv-minmax-test test/f32-dwconv-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5931 SET_TARGET_PROPERTIES(f32-dwconv-minmax-test PROPERTIES
5932 CXX_STANDARD 11
5933 CXX_STANDARD_REQUIRED YES
5934 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5935 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-minmax-test PRIVATE include src test)
5936 TARGET_LINK_LIBRARIES(f32-dwconv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5937 ADD_TEST(f32-dwconv-minmax-test f32-dwconv-minmax-test)
5938
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5939 ADD_EXECUTABLE(f32-gavgpool-cw-test test/f32-gavgpool-cw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5940 SET_TARGET_PROPERTIES(f32-gavgpool-cw-test PROPERTIES
5941 CXX_STANDARD 11
5942 CXX_STANDARD_REQUIRED YES
5943 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5944 TARGET_INCLUDE_DIRECTORIES(f32-gavgpool-cw-test PRIVATE include src test)
5945 TARGET_LINK_LIBRARIES(f32-gavgpool-cw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5946 ADD_TEST(f32-gavgpool-cw-test f32-gavgpool-cw-test)
5947
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5948 ADD_EXECUTABLE(f32-gavgpool-minmax-test test/f32-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5949 SET_TARGET_PROPERTIES(f32-gavgpool-minmax-test PROPERTIES
5950 CXX_STANDARD 11
5951 CXX_STANDARD_REQUIRED YES
5952 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5953 TARGET_INCLUDE_DIRECTORIES(f32-gavgpool-minmax-test PRIVATE include src test)
5954 TARGET_LINK_LIBRARIES(f32-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5955 ADD_TEST(f32-gavgpool-minmax-test f32-gavgpool-minmax-test)
5956
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5957 ADD_EXECUTABLE(f32-gemm-test test/f32-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5958 SET_TARGET_PROPERTIES(f32-gemm-test PROPERTIES
5959 CXX_STANDARD 11
5960 CXX_STANDARD_REQUIRED YES
5961 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5962 TARGET_INCLUDE_DIRECTORIES(f32-gemm-test PRIVATE include src test)
5963 TARGET_LINK_LIBRARIES(f32-gemm-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5964 ADD_TEST(f32-gemm-test f32-gemm-test)
5965
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5966 ADD_EXECUTABLE(f32-gemm-relu-test test/f32-gemm-relu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5967 SET_TARGET_PROPERTIES(f32-gemm-relu-test PROPERTIES
5968 CXX_STANDARD 11
5969 CXX_STANDARD_REQUIRED YES
5970 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5971 TARGET_INCLUDE_DIRECTORIES(f32-gemm-relu-test PRIVATE include src test)
5972 TARGET_LINK_LIBRARIES(f32-gemm-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5973 ADD_TEST(f32-gemm-relu-test f32-gemm-relu-test)
5974
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5975 ADD_EXECUTABLE(f32-gemm-minmax-test test/f32-gemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5976 SET_TARGET_PROPERTIES(f32-gemm-minmax-test PROPERTIES
5977 CXX_STANDARD 11
5978 CXX_STANDARD_REQUIRED YES
5979 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5980 TARGET_INCLUDE_DIRECTORIES(f32-gemm-minmax-test PRIVATE include src test)
5981 TARGET_LINK_LIBRARIES(f32-gemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5982 ADD_TEST(f32-gemm-minmax-test f32-gemm-minmax-test)
5983
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5984 ADD_EXECUTABLE(f32-gemminc-minmax-test test/f32-gemminc-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5985 SET_TARGET_PROPERTIES(f32-gemminc-minmax-test PROPERTIES
5986 CXX_STANDARD 11
5987 CXX_STANDARD_REQUIRED YES
5988 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5989 TARGET_INCLUDE_DIRECTORIES(f32-gemminc-minmax-test PRIVATE include src test)
5990 TARGET_LINK_LIBRARIES(f32-gemminc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5991 ADD_TEST(f32-gemminc-minmax-test f32-gemminc-minmax-test)
5992
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5993 ADD_EXECUTABLE(f32-ibilinear-test test/f32-ibilinear.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]5994 SET_TARGET_PROPERTIES(f32-ibilinear-test PROPERTIES
5995 CXX_STANDARD 11
5996 CXX_STANDARD_REQUIRED YES
5997 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]5998 TARGET_INCLUDE_DIRECTORIES(f32-ibilinear-test PRIVATE include src test)
5999 TARGET_LINK_LIBRARIES(f32-ibilinear-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6000 ADD_TEST(f32-ibilinear-test f32-ibilinear-test)
6001
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6002 ADD_EXECUTABLE(f32-ibilinear-chw-test test/f32-ibilinear-chw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6003 SET_TARGET_PROPERTIES(f32-ibilinear-chw-test PROPERTIES
6004 CXX_STANDARD 11
6005 CXX_STANDARD_REQUIRED YES
6006 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6007 TARGET_INCLUDE_DIRECTORIES(f32-ibilinear-chw-test PRIVATE include src test)
6008 TARGET_LINK_LIBRARIES(f32-ibilinear-chw-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6009 ADD_TEST(f32-ibilinear-chw-test f32-ibilinear-chw-test)
6010
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6011 ADD_EXECUTABLE(f32-igemm-test test/f32-igemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6012 SET_TARGET_PROPERTIES(f32-igemm-test PROPERTIES
6013 CXX_STANDARD 11
6014 CXX_STANDARD_REQUIRED YES
6015 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6016 TARGET_INCLUDE_DIRECTORIES(f32-igemm-test PRIVATE include src test)
6017 TARGET_LINK_LIBRARIES(f32-igemm-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6018 ADD_TEST(f32-igemm-test f32-igemm-test)
6019
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6020 ADD_EXECUTABLE(f32-igemm-relu-test test/f32-igemm-relu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6021 SET_TARGET_PROPERTIES(f32-igemm-relu-test PROPERTIES
6022 CXX_STANDARD 11
6023 CXX_STANDARD_REQUIRED YES
6024 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6025 TARGET_INCLUDE_DIRECTORIES(f32-igemm-relu-test PRIVATE include src test)
6026 TARGET_LINK_LIBRARIES(f32-igemm-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6027 ADD_TEST(f32-igemm-relu-test f32-igemm-relu-test)
6028
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6029 ADD_EXECUTABLE(f32-igemm-minmax-test test/f32-igemm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6030 SET_TARGET_PROPERTIES(f32-igemm-minmax-test PROPERTIES
6031 CXX_STANDARD 11
6032 CXX_STANDARD_REQUIRED YES
6033 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6034 TARGET_INCLUDE_DIRECTORIES(f32-igemm-minmax-test PRIVATE include src test)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6035 IF(MINGW)
6036 # Work-around for "too many sections" error
6037 TARGET_COMPILE_OPTIONS(f32-igemm-minmax-test PRIVATE "$<$<NOT:$<OR:$<CONFIG:Release>,$<CONFIG:MinSizeRel>>>:-Wa,-mbig-obj>")
6038 ENDIF()
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6039 TARGET_LINK_LIBRARIES(f32-igemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6040 ADD_TEST(f32-igemm-minmax-test f32-igemm-minmax-test)
6041
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6042 ADD_EXECUTABLE(f32-maxpool-minmax-test test/f32-maxpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6043 SET_TARGET_PROPERTIES(f32-maxpool-minmax-test PROPERTIES
6044 CXX_STANDARD 11
6045 CXX_STANDARD_REQUIRED YES
6046 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6047 TARGET_INCLUDE_DIRECTORIES(f32-maxpool-minmax-test PRIVATE include src test)
6048 TARGET_LINK_LIBRARIES(f32-maxpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6049 ADD_TEST(f32-maxpool-minmax-test f32-maxpool-minmax-test)
6050
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6051 ADD_EXECUTABLE(f32-pavgpool-minmax-test test/f32-pavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6052 SET_TARGET_PROPERTIES(f32-pavgpool-minmax-test PROPERTIES
6053 CXX_STANDARD 11
6054 CXX_STANDARD_REQUIRED YES
6055 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6056 TARGET_INCLUDE_DIRECTORIES(f32-pavgpool-minmax-test PRIVATE include src test)
6057 TARGET_LINK_LIBRARIES(f32-pavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6058 ADD_TEST(f32-pavgpool-minmax-test f32-pavgpool-minmax-test)
6059
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6060 ADD_EXECUTABLE(f32-ppmm-minmax-test test/f32-ppmm-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6061 SET_TARGET_PROPERTIES(f32-ppmm-minmax-test PROPERTIES
6062 CXX_STANDARD 11
6063 CXX_STANDARD_REQUIRED YES
6064 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6065 TARGET_INCLUDE_DIRECTORIES(f32-ppmm-minmax-test PRIVATE include src test)
6066 TARGET_LINK_LIBRARIES(f32-ppmm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6067 ADD_TEST(f32-ppmm-minmax-test f32-ppmm-minmax-test)
6068
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6069 ADD_EXECUTABLE(f32-prelu-test test/f32-prelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6070 SET_TARGET_PROPERTIES(f32-prelu-test PROPERTIES
6071 CXX_STANDARD 11
6072 CXX_STANDARD_REQUIRED YES
6073 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6074 TARGET_INCLUDE_DIRECTORIES(f32-prelu-test PRIVATE include src test)
6075 TARGET_LINK_LIBRARIES(f32-prelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6076 ADD_TEST(f32-prelu-test f32-prelu-test)
6077
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6078 ADD_EXECUTABLE(f32-raddexpminusmax-test test/f32-raddexpminusmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6079 SET_TARGET_PROPERTIES(f32-raddexpminusmax-test PROPERTIES
6080 CXX_STANDARD 11
6081 CXX_STANDARD_REQUIRED YES
6082 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6083 TARGET_INCLUDE_DIRECTORIES(f32-raddexpminusmax-test PRIVATE include src test)
6084 TARGET_LINK_LIBRARIES(f32-raddexpminusmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6085 ADD_TEST(f32-raddexpminusmax-test f32-raddexpminusmax-test)
6086
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6087 ADD_EXECUTABLE(f32-raddextexp-test test/f32-raddextexp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6088 SET_TARGET_PROPERTIES(f32-raddextexp-test PROPERTIES
6089 CXX_STANDARD 11
6090 CXX_STANDARD_REQUIRED YES
6091 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6092 TARGET_INCLUDE_DIRECTORIES(f32-raddextexp-test PRIVATE include src test)
6093 TARGET_LINK_LIBRARIES(f32-raddextexp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6094 ADD_TEST(f32-raddextexp-test f32-raddextexp-test)
6095
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6096 ADD_EXECUTABLE(f32-raddstoreexpminusmax-test test/f32-raddstoreexpminusmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6097 SET_TARGET_PROPERTIES(f32-raddstoreexpminusmax-test PROPERTIES
6098 CXX_STANDARD 11
6099 CXX_STANDARD_REQUIRED YES
6100 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6101 TARGET_INCLUDE_DIRECTORIES(f32-raddstoreexpminusmax-test PRIVATE include src test)
6102 TARGET_LINK_LIBRARIES(f32-raddstoreexpminusmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6103 ADD_TEST(f32-raddstoreexpminusmax-test f32-raddstoreexpminusmax-test)
6104
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6105 ADD_EXECUTABLE(f32-rmax-test test/f32-rmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6106 SET_TARGET_PROPERTIES(f32-rmax-test PROPERTIES
6107 CXX_STANDARD 11
6108 CXX_STANDARD_REQUIRED YES
6109 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6110 TARGET_INCLUDE_DIRECTORIES(f32-rmax-test PRIVATE include src test)
6111 TARGET_LINK_LIBRARIES(f32-rmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6112 ADD_TEST(f32-rmax-test f32-rmax-test)
6113
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6114 ADD_EXECUTABLE(f32-spmm-minmax-test test/f32-spmm-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6115 SET_TARGET_PROPERTIES(f32-spmm-minmax-test PROPERTIES
6116 CXX_STANDARD 11
6117 CXX_STANDARD_REQUIRED YES
6118 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6119 TARGET_INCLUDE_DIRECTORIES(f32-spmm-minmax-test PRIVATE include src test)
6120 TARGET_LINK_LIBRARIES(f32-spmm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6121 ADD_TEST(f32-spmm-minmax-test f32-spmm-minmax-test)
6122
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6123 ADD_EXECUTABLE(f32-vabs-test test/f32-vabs.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6124 SET_TARGET_PROPERTIES(f32-vabs-test PROPERTIES
6125 CXX_STANDARD 11
6126 CXX_STANDARD_REQUIRED YES
6127 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6128 TARGET_INCLUDE_DIRECTORIES(f32-vabs-test PRIVATE include src test)
6129 TARGET_LINK_LIBRARIES(f32-vabs-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6130 ADD_TEST(f32-vabs-test f32-vabs-test)
6131
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6132 ADD_EXECUTABLE(f32-vadd-test test/f32-vadd.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6133 SET_TARGET_PROPERTIES(f32-vadd-test PROPERTIES
6134 CXX_STANDARD 11
6135 CXX_STANDARD_REQUIRED YES
6136 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6137 TARGET_INCLUDE_DIRECTORIES(f32-vadd-test PRIVATE include src test)
6138 TARGET_LINK_LIBRARIES(f32-vadd-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6139 ADD_TEST(f32-vadd-test f32-vadd-test)
6140
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6141 ADD_EXECUTABLE(f32-vadd-minmax-test test/f32-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6142 SET_TARGET_PROPERTIES(f32-vadd-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6143 CXX_STANDARD 11
6144 CXX_STANDARD_REQUIRED YES
6145 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6146 TARGET_INCLUDE_DIRECTORIES(f32-vadd-minmax-test PRIVATE include src test)
6147 TARGET_LINK_LIBRARIES(f32-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6148 ADD_TEST(f32-vadd-minmax-test f32-vadd-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6149
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6150 ADD_EXECUTABLE(f32-vadd-relu-test test/f32-vadd-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6151 SET_TARGET_PROPERTIES(f32-vadd-relu-test PROPERTIES
6152 CXX_STANDARD 11
6153 CXX_STANDARD_REQUIRED YES
6154 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6155 TARGET_INCLUDE_DIRECTORIES(f32-vadd-relu-test PRIVATE include src test)
6156 TARGET_LINK_LIBRARIES(f32-vadd-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6157 ADD_TEST(f32-vadd-relu-test f32-vadd-relu-test)
6158
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6159 ADD_EXECUTABLE(f32-vaddc-test test/f32-vaddc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6160 SET_TARGET_PROPERTIES(f32-vaddc-test PROPERTIES
6161 CXX_STANDARD 11
6162 CXX_STANDARD_REQUIRED YES
6163 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6164 TARGET_INCLUDE_DIRECTORIES(f32-vaddc-test PRIVATE include src test)
6165 TARGET_LINK_LIBRARIES(f32-vaddc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6166 ADD_TEST(f32-vaddc-test f32-vaddc-test)
6167
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6168 ADD_EXECUTABLE(f32-vaddc-minmax-test test/f32-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6169 SET_TARGET_PROPERTIES(f32-vaddc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6170 CXX_STANDARD 11
6171 CXX_STANDARD_REQUIRED YES
6172 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6173 TARGET_INCLUDE_DIRECTORIES(f32-vaddc-minmax-test PRIVATE include src test)
6174 TARGET_LINK_LIBRARIES(f32-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6175 ADD_TEST(f32-vaddc-minmax-test f32-vaddc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6176
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6177 ADD_EXECUTABLE(f32-vaddc-relu-test test/f32-vaddc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6178 SET_TARGET_PROPERTIES(f32-vaddc-relu-test PROPERTIES
6179 CXX_STANDARD 11
6180 CXX_STANDARD_REQUIRED YES
6181 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6182 TARGET_INCLUDE_DIRECTORIES(f32-vaddc-relu-test PRIVATE include src test)
6183 TARGET_LINK_LIBRARIES(f32-vaddc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6184 ADD_TEST(f32-vaddc-relu-test f32-vaddc-relu-test)
6185
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6186 ADD_EXECUTABLE(f32-vclamp-test test/f32-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6187 SET_TARGET_PROPERTIES(f32-vclamp-test PROPERTIES
6188 CXX_STANDARD 11
6189 CXX_STANDARD_REQUIRED YES
6190 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6191 TARGET_INCLUDE_DIRECTORIES(f32-vclamp-test PRIVATE include src test)
6192 TARGET_LINK_LIBRARIES(f32-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6193 ADD_TEST(f32-vclamp-test f32-vclamp-test)
6194
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6195 ADD_EXECUTABLE(f32-vhswish-test test/f32-vhswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6196 SET_TARGET_PROPERTIES(f32-vhswish-test PROPERTIES
6197 CXX_STANDARD 11
6198 CXX_STANDARD_REQUIRED YES
6199 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6200 TARGET_INCLUDE_DIRECTORIES(f32-vhswish-test PRIVATE include src test)
6201 TARGET_LINK_LIBRARIES(f32-vhswish-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6202 ADD_TEST(f32-vhswish-test f32-vhswish-test)
6203
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6204 ADD_EXECUTABLE(f32-vdiv-test test/f32-vdiv.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6205 SET_TARGET_PROPERTIES(f32-vdiv-test PROPERTIES
6206 CXX_STANDARD 11
6207 CXX_STANDARD_REQUIRED YES
6208 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6209 TARGET_INCLUDE_DIRECTORIES(f32-vdiv-test PRIVATE include src test)
6210 TARGET_LINK_LIBRARIES(f32-vdiv-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6211 ADD_TEST(f32-vdiv-test f32-vdiv-test)
6212
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6213 ADD_EXECUTABLE(f32-vdiv-minmax-test test/f32-vdiv-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6214 SET_TARGET_PROPERTIES(f32-vdiv-minmax-test PROPERTIES
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6215 CXX_STANDARD 11
6216 CXX_STANDARD_REQUIRED YES
6217 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6218 TARGET_INCLUDE_DIRECTORIES(f32-vdiv-minmax-test PRIVATE include src test)
6219 TARGET_LINK_LIBRARIES(f32-vdiv-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6220 ADD_TEST(f32-vdiv-minmax-test f32-vdiv-minmax-test)
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6221
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6222 ADD_EXECUTABLE(f32-vdiv-relu-test test/f32-vdiv-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6223 SET_TARGET_PROPERTIES(f32-vdiv-relu-test PROPERTIES
6224 CXX_STANDARD 11
6225 CXX_STANDARD_REQUIRED YES
6226 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6227 TARGET_INCLUDE_DIRECTORIES(f32-vdiv-relu-test PRIVATE include src test)
6228 TARGET_LINK_LIBRARIES(f32-vdiv-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6229 ADD_TEST(f32-vdiv-relu-test f32-vdiv-relu-test)
6230
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6231 ADD_EXECUTABLE(f32-vdivc-test test/f32-vdivc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6232 SET_TARGET_PROPERTIES(f32-vdivc-test PROPERTIES
6233 CXX_STANDARD 11
6234 CXX_STANDARD_REQUIRED YES
6235 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6236 TARGET_INCLUDE_DIRECTORIES(f32-vdivc-test PRIVATE include src test)
6237 TARGET_LINK_LIBRARIES(f32-vdivc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6238 ADD_TEST(f32-vdivc-test f32-vdivc-test)
6239
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6240 ADD_EXECUTABLE(f32-vdivc-minmax-test test/f32-vdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6241 SET_TARGET_PROPERTIES(f32-vdivc-minmax-test PROPERTIES
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6242 CXX_STANDARD 11
6243 CXX_STANDARD_REQUIRED YES
6244 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6245 TARGET_INCLUDE_DIRECTORIES(f32-vdivc-minmax-test PRIVATE include src test)
6246 TARGET_LINK_LIBRARIES(f32-vdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6247 ADD_TEST(f32-vdivc-minmax-test f32-vdivc-minmax-test)
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6248
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6249 ADD_EXECUTABLE(f32-vdivc-relu-test test/f32-vdivc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6250 SET_TARGET_PROPERTIES(f32-vdivc-relu-test PROPERTIES
6251 CXX_STANDARD 11
6252 CXX_STANDARD_REQUIRED YES
6253 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6254 TARGET_INCLUDE_DIRECTORIES(f32-vdivc-relu-test PRIVATE include src test)
6255 TARGET_LINK_LIBRARIES(f32-vdivc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6256 ADD_TEST(f32-vdivc-relu-test f32-vdivc-relu-test)
6257
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6258 ADD_EXECUTABLE(f32-vrdivc-test test/f32-vrdivc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6259 SET_TARGET_PROPERTIES(f32-vrdivc-test PROPERTIES
6260 CXX_STANDARD 11
6261 CXX_STANDARD_REQUIRED YES
6262 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6263 TARGET_INCLUDE_DIRECTORIES(f32-vrdivc-test PRIVATE include src test)
6264 TARGET_LINK_LIBRARIES(f32-vrdivc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6265 ADD_TEST(f32-vrdivc-test f32-vrdivc-test)
6266
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6267 ADD_EXECUTABLE(f32-vrdivc-minmax-test test/f32-vrdivc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6268 SET_TARGET_PROPERTIES(f32-vrdivc-minmax-test PROPERTIES
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6269 CXX_STANDARD 11
6270 CXX_STANDARD_REQUIRED YES
6271 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6272 TARGET_INCLUDE_DIRECTORIES(f32-vrdivc-minmax-test PRIVATE include src test)
6273 TARGET_LINK_LIBRARIES(f32-vrdivc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6274 ADD_TEST(f32-vrdivc-minmax-test f32-vrdivc-minmax-test)
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]6275
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6276 ADD_EXECUTABLE(f32-vrdivc-relu-test test/f32-vrdivc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6277 SET_TARGET_PROPERTIES(f32-vrdivc-relu-test PROPERTIES
6278 CXX_STANDARD 11
6279 CXX_STANDARD_REQUIRED YES
6280 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6281 TARGET_INCLUDE_DIRECTORIES(f32-vrdivc-relu-test PRIVATE include src test)
6282 TARGET_LINK_LIBRARIES(f32-vrdivc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6283 ADD_TEST(f32-vrdivc-relu-test f32-vrdivc-relu-test)
6284
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6285 ADD_EXECUTABLE(f32-velu-test test/f32-velu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]6286 SET_TARGET_PROPERTIES(f32-velu-test PROPERTIES
6287 CXX_STANDARD 11
6288 CXX_STANDARD_REQUIRED YES
6289 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6290 TARGET_INCLUDE_DIRECTORIES(f32-velu-test PRIVATE include src test)
6291 TARGET_LINK_LIBRARIES(f32-velu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]6292 ADD_TEST(f32-velu-test f32-velu-test)
6293
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6294 ADD_EXECUTABLE(f32-vlrelu-test test/f32-vlrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]6295 SET_TARGET_PROPERTIES(f32-vlrelu-test PROPERTIES
6296 CXX_STANDARD 11
6297 CXX_STANDARD_REQUIRED YES
6298 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6299 TARGET_INCLUDE_DIRECTORIES(f32-vlrelu-test PRIVATE include src test)
6300 TARGET_LINK_LIBRARIES(f32-vlrelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]6301 ADD_TEST(f32-vlrelu-test f32-vlrelu-test)
6302
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6303 ADD_EXECUTABLE(f32-vmax-test test/f32-vmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6304 SET_TARGET_PROPERTIES(f32-vmax-test PROPERTIES
6305 CXX_STANDARD 11
6306 CXX_STANDARD_REQUIRED YES
6307 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6308 TARGET_INCLUDE_DIRECTORIES(f32-vmax-test PRIVATE include src test)
6309 TARGET_LINK_LIBRARIES(f32-vmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6310 ADD_TEST(f32-vmax-test f32-vmax-test)
6311
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6312 ADD_EXECUTABLE(f32-vmaxc-test test/f32-vmaxc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6313 SET_TARGET_PROPERTIES(f32-vmaxc-test PROPERTIES
6314 CXX_STANDARD 11
6315 CXX_STANDARD_REQUIRED YES
6316 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6317 TARGET_INCLUDE_DIRECTORIES(f32-vmaxc-test PRIVATE include src test)
6318 TARGET_LINK_LIBRARIES(f32-vmaxc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6319 ADD_TEST(f32-vmaxc-test f32-vmaxc-test)
6320
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6321 ADD_EXECUTABLE(f32-vmin-test test/f32-vmin.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6322 SET_TARGET_PROPERTIES(f32-vmin-test PROPERTIES
6323 CXX_STANDARD 11
6324 CXX_STANDARD_REQUIRED YES
6325 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6326 TARGET_INCLUDE_DIRECTORIES(f32-vmin-test PRIVATE include src test)
6327 TARGET_LINK_LIBRARIES(f32-vmin-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6328 ADD_TEST(f32-vmin-test f32-vmin-test)
6329
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6330 ADD_EXECUTABLE(f32-vminc-test test/f32-vminc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6331 SET_TARGET_PROPERTIES(f32-vminc-test PROPERTIES
6332 CXX_STANDARD 11
6333 CXX_STANDARD_REQUIRED YES
6334 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6335 TARGET_INCLUDE_DIRECTORIES(f32-vminc-test PRIVATE include src test)
6336 TARGET_LINK_LIBRARIES(f32-vminc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]6337 ADD_TEST(f32-vminc-test f32-vminc-test)
6338
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6339 ADD_EXECUTABLE(f32-vmul-test test/f32-vmul.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6340 SET_TARGET_PROPERTIES(f32-vmul-test PROPERTIES
6341 CXX_STANDARD 11
6342 CXX_STANDARD_REQUIRED YES
6343 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6344 TARGET_INCLUDE_DIRECTORIES(f32-vmul-test PRIVATE include src test)
6345 TARGET_LINK_LIBRARIES(f32-vmul-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6346 ADD_TEST(f32-vmul-test f32-vmul-test)
6347
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6348 ADD_EXECUTABLE(f32-vmul-minmax-test test/f32-vmul-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6349 SET_TARGET_PROPERTIES(f32-vmul-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6350 CXX_STANDARD 11
6351 CXX_STANDARD_REQUIRED YES
6352 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6353 TARGET_INCLUDE_DIRECTORIES(f32-vmul-minmax-test PRIVATE include src test)
6354 TARGET_LINK_LIBRARIES(f32-vmul-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6355 ADD_TEST(f32-vmul-minmax-test f32-vmul-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6356
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6357 ADD_EXECUTABLE(f32-vmul-relu-test test/f32-vmul-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6358 SET_TARGET_PROPERTIES(f32-vmul-relu-test PROPERTIES
6359 CXX_STANDARD 11
6360 CXX_STANDARD_REQUIRED YES
6361 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6362 TARGET_INCLUDE_DIRECTORIES(f32-vmul-relu-test PRIVATE include src test)
6363 TARGET_LINK_LIBRARIES(f32-vmul-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6364 ADD_TEST(f32-vmul-relu-test f32-vmul-relu-test)
6365
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6366 ADD_EXECUTABLE(f32-vmulc-test test/f32-vmulc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6367 SET_TARGET_PROPERTIES(f32-vmulc-test PROPERTIES
6368 CXX_STANDARD 11
6369 CXX_STANDARD_REQUIRED YES
6370 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6371 TARGET_INCLUDE_DIRECTORIES(f32-vmulc-test PRIVATE include src test)
6372 TARGET_LINK_LIBRARIES(f32-vmulc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6373 ADD_TEST(f32-vmulc-test f32-vmulc-test)
6374
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6375 ADD_EXECUTABLE(f32-vmulc-minmax-test test/f32-vmulc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6376 SET_TARGET_PROPERTIES(f32-vmulc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6377 CXX_STANDARD 11
6378 CXX_STANDARD_REQUIRED YES
6379 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6380 TARGET_INCLUDE_DIRECTORIES(f32-vmulc-minmax-test PRIVATE include src test)
6381 TARGET_LINK_LIBRARIES(f32-vmulc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6382 ADD_TEST(f32-vmulc-minmax-test f32-vmulc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6383
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6384 ADD_EXECUTABLE(f32-vmulc-relu-test test/f32-vmulc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6385 SET_TARGET_PROPERTIES(f32-vmulc-relu-test PROPERTIES
6386 CXX_STANDARD 11
6387 CXX_STANDARD_REQUIRED YES
6388 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6389 TARGET_INCLUDE_DIRECTORIES(f32-vmulc-relu-test PRIVATE include src test)
6390 TARGET_LINK_LIBRARIES(f32-vmulc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6391 ADD_TEST(f32-vmulc-relu-test f32-vmulc-relu-test)
6392
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6393 ADD_EXECUTABLE(f32-vmulcaddc-minmax-test test/f32-vmulcaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]6394 SET_TARGET_PROPERTIES(f32-vmulcaddc-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6395 CXX_STANDARD 11
6396 CXX_STANDARD_REQUIRED YES
6397 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6398 TARGET_INCLUDE_DIRECTORIES(f32-vmulcaddc-minmax-test PRIVATE include src test)
6399 TARGET_LINK_LIBRARIES(f32-vmulcaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanb9d07cf2020-04-11 20:25:31 -0700[diff] [blame]6400 ADD_TEST(f32-vmulcaddc-minmax-test f32-vmulcaddc-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6401
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6402 ADD_EXECUTABLE(f32-vneg-test test/f32-vneg.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6403 SET_TARGET_PROPERTIES(f32-vneg-test PROPERTIES
6404 CXX_STANDARD 11
6405 CXX_STANDARD_REQUIRED YES
6406 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6407 TARGET_INCLUDE_DIRECTORIES(f32-vneg-test PRIVATE include src test)
6408 TARGET_LINK_LIBRARIES(f32-vneg-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6409 ADD_TEST(f32-vneg-test f32-vneg-test)
6410
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6411 ADD_EXECUTABLE(f32-vrelu-test test/f32-vrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6412 SET_TARGET_PROPERTIES(f32-vrelu-test PROPERTIES
6413 CXX_STANDARD 11
6414 CXX_STANDARD_REQUIRED YES
6415 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6416 TARGET_INCLUDE_DIRECTORIES(f32-vrelu-test PRIVATE include src test)
6417 TARGET_LINK_LIBRARIES(f32-vrelu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6418 ADD_TEST(f32-vrelu-test f32-vrelu-test)
6419
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6420 ADD_EXECUTABLE(f32-vrndne-test test/f32-vrndne.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6421 SET_TARGET_PROPERTIES(f32-vrndne-test PROPERTIES
6422 CXX_STANDARD 11
6423 CXX_STANDARD_REQUIRED YES
6424 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6425 TARGET_INCLUDE_DIRECTORIES(f32-vrndne-test PRIVATE include src test)
6426 TARGET_LINK_LIBRARIES(f32-vrndne-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6427 ADD_TEST(f32-vrndne-test f32-vrndne-test)
6428
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6429 ADD_EXECUTABLE(f32-vrndz-test test/f32-vrndz.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6430 SET_TARGET_PROPERTIES(f32-vrndz-test PROPERTIES
6431 CXX_STANDARD 11
6432 CXX_STANDARD_REQUIRED YES
6433 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6434 TARGET_INCLUDE_DIRECTORIES(f32-vrndz-test PRIVATE include src test)
6435 TARGET_LINK_LIBRARIES(f32-vrndz-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6436 ADD_TEST(f32-vrndz-test f32-vrndz-test)
6437
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6438 ADD_EXECUTABLE(f32-vrndu-test test/f32-vrndu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6439 SET_TARGET_PROPERTIES(f32-vrndu-test PROPERTIES
6440 CXX_STANDARD 11
6441 CXX_STANDARD_REQUIRED YES
6442 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6443 TARGET_INCLUDE_DIRECTORIES(f32-vrndu-test PRIVATE include src test)
6444 TARGET_LINK_LIBRARIES(f32-vrndu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6445 ADD_TEST(f32-vrndu-test f32-vrndu-test)
6446
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6447 ADD_EXECUTABLE(f32-vrndd-test test/f32-vrndd.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6448 SET_TARGET_PROPERTIES(f32-vrndd-test PROPERTIES
6449 CXX_STANDARD 11
6450 CXX_STANDARD_REQUIRED YES
6451 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6452 TARGET_INCLUDE_DIRECTORIES(f32-vrndd-test PRIVATE include src test)
6453 TARGET_LINK_LIBRARIES(f32-vrndd-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6454 ADD_TEST(f32-vrndd-test f32-vrndd-test)
6455
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6456 ADD_EXECUTABLE(f32-vscaleexpminusmax-test test/f32-vscaleexpminusmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]6457 SET_TARGET_PROPERTIES(f32-vscaleexpminusmax-test PROPERTIES
6458 CXX_STANDARD 11
6459 CXX_STANDARD_REQUIRED YES
6460 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6461 TARGET_INCLUDE_DIRECTORIES(f32-vscaleexpminusmax-test PRIVATE include src test)
6462 TARGET_LINK_LIBRARIES(f32-vscaleexpminusmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]6463 ADD_TEST(f32-vscaleexpminusmax-test f32-vscaleexpminusmax-test)
6464
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6465 ADD_EXECUTABLE(f32-vscaleextexp-test test/f32-vscaleextexp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan9f240d12020-04-13 10:42:30 -0700[diff] [blame]6466 SET_TARGET_PROPERTIES(f32-vscaleextexp-test PROPERTIES
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]6467 CXX_STANDARD 11
6468 CXX_STANDARD_REQUIRED YES
6469 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6470 TARGET_INCLUDE_DIRECTORIES(f32-vscaleextexp-test PRIVATE include src test)
6471 TARGET_LINK_LIBRARIES(f32-vscaleextexp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]6472 ADD_TEST(f32-vscaleextexp-test f32-vscaleextexp-test)
6473
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6474 ADD_EXECUTABLE(f32-vsigmoid-test test/f32-vsigmoid.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6475 SET_TARGET_PROPERTIES(f32-vsigmoid-test PROPERTIES
6476 CXX_STANDARD 11
6477 CXX_STANDARD_REQUIRED YES
6478 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6479 TARGET_INCLUDE_DIRECTORIES(f32-vsigmoid-test PRIVATE include src test)
6480 TARGET_LINK_LIBRARIES(f32-vsigmoid-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6481 ADD_TEST(f32-vsigmoid-test f32-vsigmoid-test)
6482
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6483 ADD_EXECUTABLE(f32-vsqr-test test/f32-vsqr.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6484 SET_TARGET_PROPERTIES(f32-vsqr-test PROPERTIES
6485 CXX_STANDARD 11
6486 CXX_STANDARD_REQUIRED YES
6487 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6488 TARGET_INCLUDE_DIRECTORIES(f32-vsqr-test PRIVATE include src test)
6489 TARGET_LINK_LIBRARIES(f32-vsqr-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]6490 ADD_TEST(f32-vsqr-test f32-vsqr-test)
6491
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6492 ADD_EXECUTABLE(f32-vsqrdiff-test test/f32-vsqrdiff.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]6493 SET_TARGET_PROPERTIES(f32-vsqrdiff-test PROPERTIES
6494 CXX_STANDARD 11
6495 CXX_STANDARD_REQUIRED YES
6496 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6497 TARGET_INCLUDE_DIRECTORIES(f32-vsqrdiff-test PRIVATE include src test)
6498 TARGET_LINK_LIBRARIES(f32-vsqrdiff-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]6499 ADD_TEST(f32-vsqrdiff-test f32-vsqrdiff-test)
6500
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6501 ADD_EXECUTABLE(f32-vsqrdiffc-test test/f32-vsqrdiffc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]6502 SET_TARGET_PROPERTIES(f32-vsqrdiffc-test PROPERTIES
6503 CXX_STANDARD 11
6504 CXX_STANDARD_REQUIRED YES
6505 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6506 TARGET_INCLUDE_DIRECTORIES(f32-vsqrdiffc-test PRIVATE include src test)
6507 TARGET_LINK_LIBRARIES(f32-vsqrdiffc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhand46e12a2020-06-05 09:26:26 -0700[diff] [blame]6508 ADD_TEST(f32-vsqrdiffc-test f32-vsqrdiffc-test)
6509
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6510 ADD_EXECUTABLE(f32-vsqrt-test test/f32-vsqrt.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]6511 SET_TARGET_PROPERTIES(f32-vsqrt-test PROPERTIES
6512 CXX_STANDARD 11
6513 CXX_STANDARD_REQUIRED YES
6514 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6515 TARGET_INCLUDE_DIRECTORIES(f32-vsqrt-test PRIVATE include src test)
6516 TARGET_LINK_LIBRARIES(f32-vsqrt-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]6517 ADD_TEST(f32-vsqrt-test f32-vsqrt-test)
6518
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6519 ADD_EXECUTABLE(f32-vsub-test test/f32-vsub.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6520 SET_TARGET_PROPERTIES(f32-vsub-test PROPERTIES
6521 CXX_STANDARD 11
6522 CXX_STANDARD_REQUIRED YES
6523 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6524 TARGET_INCLUDE_DIRECTORIES(f32-vsub-test PRIVATE include src test)
6525 TARGET_LINK_LIBRARIES(f32-vsub-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6526 ADD_TEST(f32-vsub-test f32-vsub-test)
6527
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6528 ADD_EXECUTABLE(f32-vsub-minmax-test test/f32-vsub-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6529 SET_TARGET_PROPERTIES(f32-vsub-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6530 CXX_STANDARD 11
6531 CXX_STANDARD_REQUIRED YES
6532 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6533 TARGET_INCLUDE_DIRECTORIES(f32-vsub-minmax-test PRIVATE include src test)
6534 TARGET_LINK_LIBRARIES(f32-vsub-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6535 ADD_TEST(f32-vsub-minmax-test f32-vsub-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6536
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6537 ADD_EXECUTABLE(f32-vsub-relu-test test/f32-vsub-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6538 SET_TARGET_PROPERTIES(f32-vsub-relu-test PROPERTIES
6539 CXX_STANDARD 11
6540 CXX_STANDARD_REQUIRED YES
6541 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6542 TARGET_INCLUDE_DIRECTORIES(f32-vsub-relu-test PRIVATE include src test)
6543 TARGET_LINK_LIBRARIES(f32-vsub-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6544 ADD_TEST(f32-vsub-relu-test f32-vsub-relu-test)
6545
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6546 ADD_EXECUTABLE(f32-vsubc-test test/f32-vsubc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6547 SET_TARGET_PROPERTIES(f32-vsubc-test PROPERTIES
6548 CXX_STANDARD 11
6549 CXX_STANDARD_REQUIRED YES
6550 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6551 TARGET_INCLUDE_DIRECTORIES(f32-vsubc-test PRIVATE include src test)
6552 TARGET_LINK_LIBRARIES(f32-vsubc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6553 ADD_TEST(f32-vsubc-test f32-vsubc-test)
6554
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6555 ADD_EXECUTABLE(f32-vsubc-minmax-test test/f32-vsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6556 SET_TARGET_PROPERTIES(f32-vsubc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6557 CXX_STANDARD 11
6558 CXX_STANDARD_REQUIRED YES
6559 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6560 TARGET_INCLUDE_DIRECTORIES(f32-vsubc-minmax-test PRIVATE include src test)
6561 TARGET_LINK_LIBRARIES(f32-vsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6562 ADD_TEST(f32-vsubc-minmax-test f32-vsubc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6563
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6564 ADD_EXECUTABLE(f32-vsubc-relu-test test/f32-vsubc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6565 SET_TARGET_PROPERTIES(f32-vsubc-relu-test PROPERTIES
6566 CXX_STANDARD 11
6567 CXX_STANDARD_REQUIRED YES
6568 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6569 TARGET_INCLUDE_DIRECTORIES(f32-vsubc-relu-test PRIVATE include src test)
6570 TARGET_LINK_LIBRARIES(f32-vsubc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6571 ADD_TEST(f32-vsubc-relu-test f32-vsubc-relu-test)
6572
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6573 ADD_EXECUTABLE(f32-vrsubc-test test/f32-vrsubc.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6574 SET_TARGET_PROPERTIES(f32-vrsubc-test PROPERTIES
6575 CXX_STANDARD 11
6576 CXX_STANDARD_REQUIRED YES
6577 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6578 TARGET_INCLUDE_DIRECTORIES(f32-vrsubc-test PRIVATE include src test)
6579 TARGET_LINK_LIBRARIES(f32-vrsubc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchardd5b9f1c2020-07-01 15:00:19 -0700[diff] [blame]6580 ADD_TEST(f32-vrsubc-test f32-vrsubc-test)
6581
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6582 ADD_EXECUTABLE(f32-vrsubc-minmax-test test/f32-vrsubc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6583 SET_TARGET_PROPERTIES(f32-vrsubc-minmax-test PROPERTIES
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6584 CXX_STANDARD 11
6585 CXX_STANDARD_REQUIRED YES
6586 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6587 TARGET_INCLUDE_DIRECTORIES(f32-vrsubc-minmax-test PRIVATE include src test)
6588 TARGET_LINK_LIBRARIES(f32-vrsubc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]6589 ADD_TEST(f32-vrsubc-minmax-test f32-vrsubc-minmax-test)
Marat Dukhanc76065f2019-11-14 18:13:33 -0800[diff] [blame]6590
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6591 ADD_EXECUTABLE(f32-vrsubc-relu-test test/f32-vrsubc-relu.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6592 SET_TARGET_PROPERTIES(f32-vrsubc-relu-test PROPERTIES
6593 CXX_STANDARD 11
6594 CXX_STANDARD_REQUIRED YES
6595 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6596 TARGET_INCLUDE_DIRECTORIES(f32-vrsubc-relu-test PRIVATE include src test)
6597 TARGET_LINK_LIBRARIES(f32-vrsubc-relu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Frank Barchard674778d2020-08-08 10:17:25 -0700[diff] [blame]6598 ADD_TEST(f32-vrsubc-relu-test f32-vrsubc-relu-test)
6599
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6600 ADD_EXECUTABLE(qc8-dwconv-minmax-fp32-test test/qc8-dwconv-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]6601 SET_TARGET_PROPERTIES(qc8-dwconv-minmax-fp32-test PROPERTIES
6602 CXX_STANDARD 11
6603 CXX_STANDARD_REQUIRED YES
6604 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6605 TARGET_INCLUDE_DIRECTORIES(qc8-dwconv-minmax-fp32-test PRIVATE include src test)
6606 TARGET_LINK_LIBRARIES(qc8-dwconv-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan82286892021-06-04 17:27:27 -0700[diff] [blame]6607 ADD_TEST(qc8-dwconv-minmax-fp32-test qc8-dwconv-minmax-fp32-test)
6608
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6609 ADD_EXECUTABLE(qc8-gemm-minmax-fp32-test test/qc8-gemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]6610 SET_TARGET_PROPERTIES(qc8-gemm-minmax-fp32-test PROPERTIES
6611 CXX_STANDARD 11
6612 CXX_STANDARD_REQUIRED YES
6613 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6614 TARGET_INCLUDE_DIRECTORIES(qc8-gemm-minmax-fp32-test PRIVATE include src test)
6615 TARGET_LINK_LIBRARIES(qc8-gemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0b043742021-06-02 18:29:11 -0700[diff] [blame]6616 ADD_TEST(qc8-gemm-minmax-fp32-test qc8-gemm-minmax-fp32-test)
6617
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6618 ADD_EXECUTABLE(qc8-igemm-minmax-fp32-test test/qc8-igemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane06c8132021-06-03 08:59:11 -0700[diff] [blame]6619 SET_TARGET_PROPERTIES(qc8-igemm-minmax-fp32-test PROPERTIES
6620 CXX_STANDARD 11
6621 CXX_STANDARD_REQUIRED YES
6622 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6623 TARGET_INCLUDE_DIRECTORIES(qc8-igemm-minmax-fp32-test PRIVATE include src test)
6624 TARGET_LINK_LIBRARIES(qc8-igemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane06c8132021-06-03 08:59:11 -0700[diff] [blame]6625 ADD_TEST(qc8-igemm-minmax-fp32-test qc8-igemm-minmax-fp32-test)
6626
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6627 ADD_EXECUTABLE(qs8-dwconv-minmax-fp32-test test/qs8-dwconv-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]6628 SET_TARGET_PROPERTIES(qs8-dwconv-minmax-fp32-test PROPERTIES
6629 CXX_STANDARD 11
6630 CXX_STANDARD_REQUIRED YES
6631 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6632 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-minmax-fp32-test PRIVATE include src test)
6633 TARGET_LINK_LIBRARIES(qs8-dwconv-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]6634 ADD_TEST(qs8-dwconv-minmax-fp32-test qs8-dwconv-minmax-fp32-test)
6635
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6636 ADD_EXECUTABLE(qs8-dwconv-minmax-gemmlowp-test test/qs8-dwconv-minmax-gemmlowp.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan0a5d7b42021-05-25 15:34:29 -0700[diff] [blame]6637 SET_TARGET_PROPERTIES(qs8-dwconv-minmax-gemmlowp-test PROPERTIES
Marat Dukhanf62bbdc2020-08-04 13:59:04 -0700[diff] [blame]6638 CXX_STANDARD 11
6639 CXX_STANDARD_REQUIRED YES
6640 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6641 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-minmax-gemmlowp-test PRIVATE include src test)
6642 TARGET_LINK_LIBRARIES(qs8-dwconv-minmax-gemmlowp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0a5d7b42021-05-25 15:34:29 -0700[diff] [blame]6643 ADD_TEST(qs8-dwconv-minmax-gemmlowp-test qs8-dwconv-minmax-gemmlowp-test)
Marat Dukhanf62bbdc2020-08-04 13:59:04 -0700[diff] [blame]6644
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6645 ADD_EXECUTABLE(qs8-dwconv-minmax-rndnu-test test/qs8-dwconv-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]6646 SET_TARGET_PROPERTIES(qs8-dwconv-minmax-rndnu-test PROPERTIES
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]6647 CXX_STANDARD 11
6648 CXX_STANDARD_REQUIRED YES
6649 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6650 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-minmax-rndnu-test PRIVATE include src test)
6651 TARGET_LINK_LIBRARIES(qs8-dwconv-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanbe18f5c2021-07-16 18:46:39 -0700[diff] [blame]6652 ADD_TEST(qs8-dwconv-minmax-rndnu-test qs8-dwconv-minmax-rndnu-test)
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]6653
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6654 ADD_EXECUTABLE(qs8-gavgpool-minmax-test test/qs8-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]6655 SET_TARGET_PROPERTIES(qs8-gavgpool-minmax-test PROPERTIES
6656 CXX_STANDARD 11
6657 CXX_STANDARD_REQUIRED YES
6658 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6659 TARGET_INCLUDE_DIRECTORIES(qs8-gavgpool-minmax-test PRIVATE include src test)
6660 TARGET_LINK_LIBRARIES(qs8-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan4ed53f42020-08-06 01:12:55 -0700[diff] [blame]6661 ADD_TEST(qs8-gavgpool-test qs8-gavgpool-minmax-test)
6662
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6663 ADD_EXECUTABLE(qs8-gemm-minmax-fp32-test test/qs8-gemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6664 SET_TARGET_PROPERTIES(qs8-gemm-minmax-fp32-test PROPERTIES
6665 CXX_STANDARD 11
6666 CXX_STANDARD_REQUIRED YES
6667 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6668 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-minmax-fp32-test PRIVATE include src test)
6669 TARGET_LINK_LIBRARIES(qs8-gemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6670 ADD_TEST(qs8-gemm-minmax-fp32-test qs8-gemm-minmax-fp32-test)
6671
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6672 ADD_EXECUTABLE(qs8-gemm-minmax-gemmlowp-test test/qs8-gemm-minmax-gemmlowp.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanb07c26a2021-05-24 19:44:51 -0700[diff] [blame]6673 SET_TARGET_PROPERTIES(qs8-gemm-minmax-gemmlowp-test PROPERTIES
Marat Dukhan595e1702020-07-31 10:12:52 -0700[diff] [blame]6674 CXX_STANDARD 11
6675 CXX_STANDARD_REQUIRED YES
6676 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6677 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-minmax-gemmlowp-test PRIVATE include src test)
6678 TARGET_LINK_LIBRARIES(qs8-gemm-minmax-gemmlowp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanb07c26a2021-05-24 19:44:51 -0700[diff] [blame]6679 ADD_TEST(qs8-gemm-minmax-gemmlowp-test qs8-gemm-minmax-gemmlowp-test)
Marat Dukhan595e1702020-07-31 10:12:52 -0700[diff] [blame]6680
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6681 ADD_EXECUTABLE(qs8-gemm-minmax-rndnu-test test/qs8-gemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6682 SET_TARGET_PROPERTIES(qs8-gemm-minmax-rndnu-test PROPERTIES
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]6683 CXX_STANDARD 11
6684 CXX_STANDARD_REQUIRED YES
6685 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6686 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-minmax-rndnu-test PRIVATE include src test)
6687 TARGET_LINK_LIBRARIES(qs8-gemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6688 ADD_TEST(qs8-gemm-minmax-rndnu-test qs8-gemm-minmax-rndnu-test)
6689
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6690 ADD_EXECUTABLE(qs8-igemm-minmax-fp32-test test/qs8-igemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6691 SET_TARGET_PROPERTIES(qs8-igemm-minmax-fp32-test PROPERTIES
6692 CXX_STANDARD 11
6693 CXX_STANDARD_REQUIRED YES
6694 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6695 TARGET_INCLUDE_DIRECTORIES(qs8-igemm-minmax-fp32-test PRIVATE include src test)
6696 TARGET_LINK_LIBRARIES(qs8-igemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6697 ADD_TEST(qs8-igemm-minmax-fp32-test qs8-igemm-minmax-fp32-test)
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]6698
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6699 ADD_EXECUTABLE(qs8-igemm-minmax-gemmlowp-test test/qs8-igemm-minmax-gemmlowp.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanb07c26a2021-05-24 19:44:51 -0700[diff] [blame]6700 SET_TARGET_PROPERTIES(qs8-igemm-minmax-gemmlowp-test PROPERTIES
Marat Dukhanf9480682020-07-31 14:50:24 -0700[diff] [blame]6701 CXX_STANDARD 11
6702 CXX_STANDARD_REQUIRED YES
6703 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6704 TARGET_INCLUDE_DIRECTORIES(qs8-igemm-minmax-gemmlowp-test PRIVATE include src test)
6705 TARGET_LINK_LIBRARIES(qs8-igemm-minmax-gemmlowp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanb07c26a2021-05-24 19:44:51 -0700[diff] [blame]6706 ADD_TEST(qs8-igemm-minmax-gemmlowp-test qs8-igemm-minmax-gemmlowp-test)
Marat Dukhanf9480682020-07-31 14:50:24 -0700[diff] [blame]6707
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6708 ADD_EXECUTABLE(qs8-igemm-minmax-rndnu-test test/qs8-igemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6709 SET_TARGET_PROPERTIES(qs8-igemm-minmax-rndnu-test PROPERTIES
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]6710 CXX_STANDARD 11
6711 CXX_STANDARD_REQUIRED YES
6712 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6713 TARGET_INCLUDE_DIRECTORIES(qs8-igemm-minmax-rndnu-test PRIVATE include src test)
6714 TARGET_LINK_LIBRARIES(qs8-igemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhane903dff2021-07-16 19:43:41 -0700[diff] [blame]6715 ADD_TEST(qs8-igemm-minmax-rndnu-test qs8-igemm-minmax-rndnu-test)
Marat Dukhan9b474cf2021-05-25 16:37:48 -0700[diff] [blame]6716
Marat Dukhanf879d9e2021-08-06 01:09:30 -0700[diff] [blame]6717 ADD_EXECUTABLE(qs8-requantization-test test/qs8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
6718 SET_TARGET_PROPERTIES(qs8-requantization-test PROPERTIES
6719 CXX_STANDARD 11
6720 CXX_STANDARD_REQUIRED YES
6721 CXX_EXTENSIONS YES)
6722 TARGET_INCLUDE_DIRECTORIES(qs8-requantization-test PRIVATE include src test)
6723 TARGET_LINK_LIBRARIES(qs8-requantization-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6724 ADD_TEST(qs8-requantization-test qs8-requantization-test)
6725
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6726 ADD_EXECUTABLE(qs8-vadd-minmax-test test/qs8-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]6727 SET_TARGET_PROPERTIES(qs8-vadd-minmax-test PROPERTIES
6728 CXX_STANDARD 11
6729 CXX_STANDARD_REQUIRED YES
6730 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6731 TARGET_INCLUDE_DIRECTORIES(qs8-vadd-minmax-test PRIVATE include src test)
6732 TARGET_LINK_LIBRARIES(qs8-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]6733 ADD_TEST(qs8-vadd-minmax-test qs8-vadd-minmax-test)
6734
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6735 ADD_EXECUTABLE(qs8-vaddc-minmax-test test/qs8-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]6736 SET_TARGET_PROPERTIES(qs8-vaddc-minmax-test PROPERTIES
6737 CXX_STANDARD 11
6738 CXX_STANDARD_REQUIRED YES
6739 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6740 TARGET_INCLUDE_DIRECTORIES(qs8-vaddc-minmax-test PRIVATE include src test)
6741 TARGET_LINK_LIBRARIES(qs8-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan0270d9f2020-08-11 00:56:46 -0700[diff] [blame]6742 ADD_TEST(qs8-vaddc-minmax-test qs8-vaddc-minmax-test)
6743
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]6744 ADD_EXECUTABLE(qs8-vmul-minmax-fp32-test test/qs8-vmul-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
6745 SET_TARGET_PROPERTIES(qs8-vmul-minmax-fp32-test PROPERTIES
6746 CXX_STANDARD 11
6747 CXX_STANDARD_REQUIRED YES
6748 CXX_EXTENSIONS YES)
6749 TARGET_INCLUDE_DIRECTORIES(qs8-vmul-minmax-fp32-test PRIVATE include src test)
6750 TARGET_LINK_LIBRARIES(qs8-vmul-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6751 ADD_TEST(qs8-vmul-minmax-fp32-test qs8-vmul-minmax-fp32-test)
6752
6753 ADD_EXECUTABLE(qs8-vmulc-minmax-fp32-test test/qs8-vmulc-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
6754 SET_TARGET_PROPERTIES(qs8-vmulc-minmax-fp32-test PROPERTIES
6755 CXX_STANDARD 11
6756 CXX_STANDARD_REQUIRED YES
6757 CXX_EXTENSIONS YES)
6758 TARGET_INCLUDE_DIRECTORIES(qs8-vmulc-minmax-fp32-test PRIVATE include src test)
6759 TARGET_LINK_LIBRARIES(qs8-vmulc-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6760 ADD_TEST(qs8-vmulc-minmax-fp32-test qs8-vmulc-minmax-fp32-test)
6761
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6762 ADD_EXECUTABLE(qu8-avgpool-minmax-test test/qu8-avgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]6763 SET_TARGET_PROPERTIES(qu8-avgpool-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6764 CXX_STANDARD 11
6765 CXX_STANDARD_REQUIRED YES
6766 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6767 TARGET_INCLUDE_DIRECTORIES(qu8-avgpool-minmax-test PRIVATE include src test)
6768 TARGET_LINK_LIBRARIES(qu8-avgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]6769 ADD_TEST(qu8-avgpool-minmax-test qu8-avgpool-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6770
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6771 ADD_EXECUTABLE(qu8-dwconv-minmax-fp32-test test/qu8-dwconv-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]6772 SET_TARGET_PROPERTIES(qu8-dwconv-minmax-fp32-test PROPERTIES
6773 CXX_STANDARD 11
6774 CXX_STANDARD_REQUIRED YES
6775 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6776 TARGET_INCLUDE_DIRECTORIES(qu8-dwconv-minmax-fp32-test PRIVATE include src test)
6777 TARGET_LINK_LIBRARIES(qu8-dwconv-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan3c35f7a2021-07-08 18:55:42 -0700[diff] [blame]6778 ADD_TEST(qu8-dwconv-minmax-fp32-test qu8-dwconv-minmax-fp32-test)
6779
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6780 ADD_EXECUTABLE(qu8-dwconv-minmax-rndnu-test test/qu8-dwconv-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]6781 SET_TARGET_PROPERTIES(qu8-dwconv-minmax-rndnu-test PROPERTIES
6782 CXX_STANDARD 11
6783 CXX_STANDARD_REQUIRED YES
6784 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6785 TARGET_INCLUDE_DIRECTORIES(qu8-dwconv-minmax-rndnu-test PRIVATE include src test)
6786 TARGET_LINK_LIBRARIES(qu8-dwconv-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan73a899a2021-07-27 00:10:38 -0700[diff] [blame]6787 ADD_TEST(qu8-dwconv-minmax-rndnu-test qu8-dwconv-minmax-rndnu-test)
6788
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6789 ADD_EXECUTABLE(qu8-gavgpool-minmax-test test/qu8-gavgpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]6790 SET_TARGET_PROPERTIES(qu8-gavgpool-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6791 CXX_STANDARD 11
6792 CXX_STANDARD_REQUIRED YES
6793 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6794 TARGET_INCLUDE_DIRECTORIES(qu8-gavgpool-minmax-test PRIVATE include src test)
6795 TARGET_LINK_LIBRARIES(qu8-gavgpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]6796 ADD_TEST(qu8-gavgpool-test qu8-gavgpool-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6797
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6798 ADD_EXECUTABLE(qu8-gemm-minmax-fp32-test test/qu8-gemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]6799 SET_TARGET_PROPERTIES(qu8-gemm-minmax-fp32-test PROPERTIES
6800 CXX_STANDARD 11
6801 CXX_STANDARD_REQUIRED YES
6802 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6803 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-minmax-fp32-test PRIVATE include src test)
6804 TARGET_LINK_LIBRARIES(qu8-gemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]6805 ADD_TEST(qu8-gemm-minmax-fp32-test qu8-gemm-minmax-fp32-test)
6806
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6807 ADD_EXECUTABLE(qu8-gemm-minmax-gemmlowp-test test/qu8-gemm-minmax-gemmlowp.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700[diff] [blame]6808 SET_TARGET_PROPERTIES(qu8-gemm-minmax-gemmlowp-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6809 CXX_STANDARD 11
6810 CXX_STANDARD_REQUIRED YES
6811 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6812 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-minmax-gemmlowp-test PRIVATE include src test)
6813 TARGET_LINK_LIBRARIES(qu8-gemm-minmax-gemmlowp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700[diff] [blame]6814 ADD_TEST(qu8-gemm-minmax-gemmlowp-test qu8-gemm-minmax-gemmlowp-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6815
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6816 ADD_EXECUTABLE(qu8-gemm-minmax-rndnu-test test/qu8-gemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]6817 SET_TARGET_PROPERTIES(qu8-gemm-minmax-rndnu-test PROPERTIES
6818 CXX_STANDARD 11
6819 CXX_STANDARD_REQUIRED YES
6820 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6821 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-minmax-rndnu-test PRIVATE include src test)
6822 TARGET_LINK_LIBRARIES(qu8-gemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]6823 ADD_TEST(qu8-gemm-minmax-rndnu-test qu8-gemm-minmax-rndnu-test)
6824
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6825 ADD_EXECUTABLE(qu8-igemm-minmax-fp32-test test/qu8-igemm-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]6826 SET_TARGET_PROPERTIES(qu8-igemm-minmax-fp32-test PROPERTIES
6827 CXX_STANDARD 11
6828 CXX_STANDARD_REQUIRED YES
6829 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6830 TARGET_INCLUDE_DIRECTORIES(qu8-igemm-minmax-fp32-test PRIVATE include src test)
6831 TARGET_LINK_LIBRARIES(qu8-igemm-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanef47f8d2021-07-02 15:08:32 -0700[diff] [blame]6832 ADD_TEST(qu8-igemm-minmax-fp32-test qu8-igemm-minmax-fp32-test)
6833
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6834 ADD_EXECUTABLE(qu8-igemm-minmax-gemmlowp-test test/qu8-igemm-minmax-gemmlowp.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700[diff] [blame]6835 SET_TARGET_PROPERTIES(qu8-igemm-minmax-gemmlowp-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6836 CXX_STANDARD 11
6837 CXX_STANDARD_REQUIRED YES
6838 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6839 TARGET_INCLUDE_DIRECTORIES(qu8-igemm-minmax-gemmlowp-test PRIVATE include src test)
6840 TARGET_LINK_LIBRARIES(qu8-igemm-minmax-gemmlowp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanc2e8f662021-07-01 17:06:34 -0700[diff] [blame]6841 ADD_TEST(qu8-igemm-minmax-gemmlowp-test qu8-igemm-minmax-gemmlowp-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6842
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6843 ADD_EXECUTABLE(qu8-igemm-minmax-rndnu-test test/qu8-igemm-minmax-rndnu.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]6844 SET_TARGET_PROPERTIES(qu8-igemm-minmax-rndnu-test PROPERTIES
6845 CXX_STANDARD 11
6846 CXX_STANDARD_REQUIRED YES
6847 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6848 TARGET_INCLUDE_DIRECTORIES(qu8-igemm-minmax-rndnu-test PRIVATE include src test)
6849 TARGET_LINK_LIBRARIES(qu8-igemm-minmax-rndnu-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan173661d2021-07-26 23:47:08 -0700[diff] [blame]6850 ADD_TEST(qu8-igemm-minmax-rndnu-test qu8-igemm-minmax-rndnu-test)
6851
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6852 ADD_EXECUTABLE(qu8-requantization-test test/qu8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]6853 SET_TARGET_PROPERTIES(qu8-requantization-test PROPERTIES
6854 CXX_STANDARD 11
6855 CXX_STANDARD_REQUIRED YES
6856 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6857 TARGET_INCLUDE_DIRECTORIES(qu8-requantization-test PRIVATE include src test)
6858 TARGET_LINK_LIBRARIES(qu8-requantization-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]6859 ADD_TEST(qu8-requantization-test qu8-requantization-test)
6860
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6861 ADD_EXECUTABLE(qu8-vadd-minmax-test test/qu8-vadd-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]6862 SET_TARGET_PROPERTIES(qu8-vadd-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6863 CXX_STANDARD 11
6864 CXX_STANDARD_REQUIRED YES
6865 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6866 TARGET_INCLUDE_DIRECTORIES(qu8-vadd-minmax-test PRIVATE include src test)
6867 TARGET_LINK_LIBRARIES(qu8-vadd-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]6868 ADD_TEST(qu8-vadd-minmax-test qu8-vadd-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6869
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6870 ADD_EXECUTABLE(qu8-vaddc-minmax-test test/qu8-vaddc-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]6871 SET_TARGET_PROPERTIES(qu8-vaddc-minmax-test PROPERTIES
6872 CXX_STANDARD 11
6873 CXX_STANDARD_REQUIRED YES
6874 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6875 TARGET_INCLUDE_DIRECTORIES(qu8-vaddc-minmax-test PRIVATE include src test)
6876 TARGET_LINK_LIBRARIES(qu8-vaddc-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan76e78c82021-07-20 21:11:23 -0700[diff] [blame]6877 ADD_TEST(qu8-vaddc-minmax-test qu8-vaddc-minmax-test)
6878
Marat Dukhana212eac2021-08-02 09:58:04 -0700[diff] [blame]6879 ADD_EXECUTABLE(qu8-vmul-minmax-fp32-test test/qu8-vmul-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
6880 SET_TARGET_PROPERTIES(qu8-vmul-minmax-fp32-test PROPERTIES
6881 CXX_STANDARD 11
6882 CXX_STANDARD_REQUIRED YES
6883 CXX_EXTENSIONS YES)
6884 TARGET_INCLUDE_DIRECTORIES(qu8-vmul-minmax-fp32-test PRIVATE include src test)
6885 TARGET_LINK_LIBRARIES(qu8-vmul-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6886 ADD_TEST(qu8-vmul-minmax-fp32-test qu8-vmul-minmax-fp32-test)
6887
6888 ADD_EXECUTABLE(qu8-vmulc-minmax-fp32-test test/qu8-vmulc-minmax-fp32.cc $<TARGET_OBJECTS:all_microkernels>)
6889 SET_TARGET_PROPERTIES(qu8-vmulc-minmax-fp32-test PROPERTIES
6890 CXX_STANDARD 11
6891 CXX_STANDARD_REQUIRED YES
6892 CXX_EXTENSIONS YES)
6893 TARGET_INCLUDE_DIRECTORIES(qu8-vmulc-minmax-fp32-test PRIVATE include src test)
6894 TARGET_LINK_LIBRARIES(qu8-vmulc-minmax-fp32-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6895 ADD_TEST(qu8-vmulc-minmax-fp32-test qu8-vmulc-minmax-fp32-test)
6896
Marat Dukhan23147532021-08-16 07:26:56 -0700[diff] [blame]6897 ADD_EXECUTABLE(s8-maxpool-minmax-test test/s8-maxpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
6898 SET_TARGET_PROPERTIES(s8-maxpool-minmax-test PROPERTIES
6899 CXX_STANDARD 11
6900 CXX_STANDARD_REQUIRED YES
6901 CXX_EXTENSIONS YES)
6902 TARGET_INCLUDE_DIRECTORIES(s8-maxpool-minmax-test PRIVATE include src test)
6903 TARGET_LINK_LIBRARIES(s8-maxpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6904 ADD_TEST(s8-maxpool-minmax-test s8-maxpool-minmax-test)
6905
Marat Dukhane79acb72021-08-16 19:03:53 -0700[diff] [blame]6906 ADD_EXECUTABLE(s8-vclamp-test test/s8-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
6907 SET_TARGET_PROPERTIES(s8-vclamp-test PROPERTIES
6908 CXX_STANDARD 11
6909 CXX_STANDARD_REQUIRED YES
6910 CXX_EXTENSIONS YES)
6911 TARGET_INCLUDE_DIRECTORIES(s8-vclamp-test PRIVATE include src test)
6912 TARGET_LINK_LIBRARIES(s8-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
6913 ADD_TEST(s8-vclamp-test s8-vclamp-test)
6914
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6915 ADD_EXECUTABLE(u8-lut32norm-test test/u8-lut32norm.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6916 SET_TARGET_PROPERTIES(u8-lut32norm-test PROPERTIES
6917 CXX_STANDARD 11
6918 CXX_STANDARD_REQUIRED YES
6919 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6920 TARGET_INCLUDE_DIRECTORIES(u8-lut32norm-test PRIVATE include src test)
6921 TARGET_LINK_LIBRARIES(u8-lut32norm-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6922 ADD_TEST(u8-lut32norm-test u8-lut32norm-test)
6923
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6924 ADD_EXECUTABLE(u8-maxpool-minmax-test test/u8-maxpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]6925 SET_TARGET_PROPERTIES(u8-maxpool-minmax-test PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6926 CXX_STANDARD 11
6927 CXX_STANDARD_REQUIRED YES
6928 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6929 TARGET_INCLUDE_DIRECTORIES(u8-maxpool-minmax-test PRIVATE include src test)
6930 TARGET_LINK_LIBRARIES(u8-maxpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]6931 ADD_TEST(u8-maxpool-minmax-test u8-maxpool-minmax-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6932
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6933 ADD_EXECUTABLE(u8-rmax-test test/u8-rmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6934 SET_TARGET_PROPERTIES(u8-rmax-test PROPERTIES
6935 CXX_STANDARD 11
6936 CXX_STANDARD_REQUIRED YES
6937 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6938 TARGET_INCLUDE_DIRECTORIES(u8-rmax-test PRIVATE include src test)
6939 TARGET_LINK_LIBRARIES(u8-rmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6940 ADD_TEST(u8-rmax-test u8-rmax-test)
6941
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6942 ADD_EXECUTABLE(u8-vclamp-test test/u8-vclamp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6943 SET_TARGET_PROPERTIES(u8-vclamp-test PROPERTIES
6944 CXX_STANDARD 11
6945 CXX_STANDARD_REQUIRED YES
6946 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6947 TARGET_INCLUDE_DIRECTORIES(u8-vclamp-test PRIVATE include src test)
6948 TARGET_LINK_LIBRARIES(u8-vclamp-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]6949 ADD_TEST(u8-vclamp-test u8-vclamp-test)
6950
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6951 ADD_EXECUTABLE(x32-packx-test test/x32-packx.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6952 SET_TARGET_PROPERTIES(x32-packx-test PROPERTIES
6953 CXX_STANDARD 11
6954 CXX_STANDARD_REQUIRED YES
6955 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6956 TARGET_INCLUDE_DIRECTORIES(x32-packx-test PRIVATE include src test)
6957 TARGET_LINK_LIBRARIES(x32-packx-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6958 ADD_TEST(x32-packx-test x32-packx-test)
6959
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6960 ADD_EXECUTABLE(x32-unpool-test test/x32-unpool.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6961 SET_TARGET_PROPERTIES(x32-unpool-test PROPERTIES
6962 CXX_STANDARD 11
6963 CXX_STANDARD_REQUIRED YES
6964 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6965 TARGET_INCLUDE_DIRECTORIES(x32-unpool-test PRIVATE include src test)
6966 TARGET_LINK_LIBRARIES(x32-unpool-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6967 ADD_TEST(x32-unpool-test x32-unpool-test)
6968
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6969 ADD_EXECUTABLE(x32-depthtospace2d-chw2hwc-test test/x32-depthtospace2d-chw2hwc.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan79fd7302020-11-28 22:24:06 -0800[diff] [blame]6970 SET_TARGET_PROPERTIES(x32-depthtospace2d-chw2hwc-test PROPERTIES
Yury Kartynnike7841862020-11-04 18:22:18 -0800[diff] [blame]6971 CXX_STANDARD 11
6972 CXX_STANDARD_REQUIRED YES
6973 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6974 TARGET_INCLUDE_DIRECTORIES(x32-depthtospace2d-chw2hwc-test PRIVATE include src test)
6975 TARGET_LINK_LIBRARIES(x32-depthtospace2d-chw2hwc-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan79fd7302020-11-28 22:24:06 -0800[diff] [blame]6976 ADD_TEST(x32-depthtospace2d-chw2hwc-test x32-depthtospace2d-chw2hwc-test)
Yury Kartynnike7841862020-11-04 18:22:18 -0800[diff] [blame]6977
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6978 ADD_EXECUTABLE(x32-zip-test test/x32-zip.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6979 SET_TARGET_PROPERTIES(x32-zip-test PROPERTIES
6980 CXX_STANDARD 11
6981 CXX_STANDARD_REQUIRED YES
6982 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6983 TARGET_INCLUDE_DIRECTORIES(x32-zip-test PRIVATE include src test)
6984 TARGET_LINK_LIBRARIES(x32-zip-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6985 ADD_TEST(x32-zip-test x32-zip-test)
6986
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6987 ADD_EXECUTABLE(x8-lut-test test/x8-lut.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6988 SET_TARGET_PROPERTIES(x8-lut-test PROPERTIES
6989 CXX_STANDARD 11
6990 CXX_STANDARD_REQUIRED YES
6991 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6992 TARGET_INCLUDE_DIRECTORIES(x8-lut-test PRIVATE include src test)
6993 TARGET_LINK_LIBRARIES(x8-lut-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6994 ADD_TEST(x8-lut-test x8-lut-test)
6995
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]6996 ADD_EXECUTABLE(x8-zip-test test/x8-zip.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]6997 SET_TARGET_PROPERTIES(x8-zip-test PROPERTIES
6998 CXX_STANDARD 11
6999 CXX_STANDARD_REQUIRED YES
7000 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7001 TARGET_INCLUDE_DIRECTORIES(x8-zip-test PRIVATE include src test)
7002 TARGET_LINK_LIBRARIES(x8-zip-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7003 ADD_TEST(x8-zip-test x8-zip-test)
Marat Dukhan933051b2021-08-07 16:26:15 -0700[diff] [blame]7004
7005 ADD_EXECUTABLE(xx-fill-test test/xx-fill.cc $<TARGET_OBJECTS:all_microkernels>)
7006 SET_TARGET_PROPERTIES(xx-fill-test PROPERTIES
7007 CXX_STANDARD 11
7008 CXX_STANDARD_REQUIRED YES
7009 CXX_EXTENSIONS YES)
7010 TARGET_INCLUDE_DIRECTORIES(xx-fill-test PRIVATE include src test)
7011 TARGET_LINK_LIBRARIES(xx-fill-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7012 ADD_TEST(xx-fill-test xx-fill-test)
Marat Dukhan0461f2d2021-08-08 12:36:29 -0700[diff] [blame]7013
7014 ADD_EXECUTABLE(xx-pad-test test/xx-pad.cc $<TARGET_OBJECTS:all_microkernels>)
7015 SET_TARGET_PROPERTIES(xx-pad-test PROPERTIES
7016 CXX_STANDARD 11
7017 CXX_STANDARD_REQUIRED YES
7018 CXX_EXTENSIONS YES)
7019 TARGET_INCLUDE_DIRECTORIES(xx-pad-test PRIVATE include src test)
7020 TARGET_LINK_LIBRARIES(xx-pad-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7021 ADD_TEST(xx-pad-test xx-pad-test)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7022ENDIF()
7023
7024# ---[ XNNPACK microbenchmarks
7025IF(XNNPACK_BUILD_BENCHMARKS)
7026 # ---[ Build google benchmark
7027 IF(NOT TARGET benchmark)
7028 SET(BENCHMARK_ENABLE_TESTING OFF CACHE BOOL "")
7029 ADD_SUBDIRECTORY(
7030 "${GOOGLEBENCHMARK_SOURCE_DIR}"
7031 "${CONFU_DEPENDENCIES_BINARY_DIR}/googlebenchmark")
7032 ENDIF()
7033
7034 ADD_LIBRARY(bench-utils bench/utils.cc)
7035 SET_TARGET_PROPERTIES(bench-utils PROPERTIES
7036 CXX_STANDARD 11
7037 CXX_STANDARD_REQUIRED YES
7038 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7039 TARGET_INCLUDE_DIRECTORIES(bench-utils PRIVATE .)
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]7040 TARGET_LINK_LIBRARIES(bench-utils PRIVATE benchmark cpuinfo)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7041
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7042 # ---[ Build accuracy microbenchmarks
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7043 ADD_EXECUTABLE(f32-exp-ulp-eval eval/f32-exp-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7044 SET_TARGET_PROPERTIES(f32-exp-ulp-eval PROPERTIES
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7045 CXX_STANDARD 11
7046 CXX_STANDARD_REQUIRED YES
7047 CXX_EXTENSIONS NO)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7048 TARGET_INCLUDE_DIRECTORIES(f32-exp-ulp-eval PRIVATE . src)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7049 TARGET_LINK_LIBRARIES(f32-exp-ulp-eval PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7050
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7051 ADD_EXECUTABLE(f32-expminus-ulp-eval eval/f32-expminus-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7052 SET_TARGET_PROPERTIES(f32-expminus-ulp-eval PROPERTIES
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7053 CXX_STANDARD 11
7054 CXX_STANDARD_REQUIRED YES
7055 CXX_EXTENSIONS NO)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7056 TARGET_INCLUDE_DIRECTORIES(f32-expminus-ulp-eval PRIVATE . src)
7057 TARGET_LINK_LIBRARIES(f32-expminus-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7058
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7059 ADD_EXECUTABLE(f32-expm1minus-ulp-eval eval/f32-expm1minus-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7060 SET_TARGET_PROPERTIES(f32-expm1minus-ulp-eval PROPERTIES
Marat Dukhana438aca2020-11-20 15:45:01 -0800[diff] [blame]7061 CXX_STANDARD 11
7062 CXX_STANDARD_REQUIRED YES
7063 CXX_EXTENSIONS NO)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7064 TARGET_INCLUDE_DIRECTORIES(f32-expm1minus-ulp-eval PRIVATE . src)
7065 TARGET_LINK_LIBRARIES(f32-expm1minus-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhana438aca2020-11-20 15:45:01 -0800[diff] [blame]7066
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7067 ADD_EXECUTABLE(f32-extexp-ulp-eval eval/f32-extexp-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7068 SET_TARGET_PROPERTIES(f32-extexp-ulp-eval PROPERTIES
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7069 CXX_STANDARD 11
7070 CXX_STANDARD_REQUIRED YES
7071 CXX_EXTENSIONS YES)
Marat Dukhancf67ec62020-12-14 09:56:37 -0800[diff] [blame]7072 TARGET_INCLUDE_DIRECTORIES(f32-extexp-ulp-eval PRIVATE . src)
7073 TARGET_LINK_LIBRARIES(f32-extexp-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhancb10f262019-11-16 15:52:37 -0800[diff] [blame]7074
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7075 ADD_EXECUTABLE(f32-sigmoid-ulp-eval eval/f32-sigmoid-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7076 SET_TARGET_PROPERTIES(f32-sigmoid-ulp-eval PROPERTIES
7077 CXX_STANDARD 11
7078 CXX_STANDARD_REQUIRED YES
7079 CXX_EXTENSIONS NO)
7080 TARGET_INCLUDE_DIRECTORIES(f32-sigmoid-ulp-eval PRIVATE . src)
7081 TARGET_LINK_LIBRARIES(f32-sigmoid-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
7082
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7083 ADD_EXECUTABLE(f32-sqrt-ulp-eval eval/f32-sqrt-ulp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7084 SET_TARGET_PROPERTIES(f32-sqrt-ulp-eval PROPERTIES
7085 CXX_STANDARD 11
7086 CXX_STANDARD_REQUIRED YES
7087 CXX_EXTENSIONS NO)
7088 TARGET_INCLUDE_DIRECTORIES(f32-sqrt-ulp-eval PRIVATE . src)
7089 TARGET_LINK_LIBRARIES(f32-sqrt-ulp-eval PRIVATE XNNPACK benchmark bench-utils cpuinfo fp16 pthreadpool)
7090
7091 # ---[ Build accuracy tests
Marat Dukhan3ed866b2021-09-29 08:23:33 -0700[diff] [blame]7092 ADD_EXECUTABLE(f16-f32-cvt-eval eval/f16-f32-cvt.cc $<TARGET_OBJECTS:all_microkernels>)
7093 SET_TARGET_PROPERTIES(f16-f32-cvt-eval PROPERTIES
7094 CXX_STANDARD 11
7095 CXX_STANDARD_REQUIRED YES
7096 CXX_EXTENSIONS NO)
7097 TARGET_INCLUDE_DIRECTORIES(f16-f32-cvt-eval PRIVATE include src)
7098 TARGET_LINK_LIBRARIES(f16-f32-cvt-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
7099
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7100 ADD_EXECUTABLE(f32-exp-eval eval/f32-exp.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf7291fc2020-12-15 11:02:50 -0800[diff] [blame]7101 SET_TARGET_PROPERTIES(f32-exp-eval PROPERTIES
7102 CXX_STANDARD 11
7103 CXX_STANDARD_REQUIRED YES
7104 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7105 TARGET_INCLUDE_DIRECTORIES(f32-exp-eval PRIVATE include src)
7106 TARGET_LINK_LIBRARIES(f32-exp-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf7291fc2020-12-15 11:02:50 -0800[diff] [blame]7107
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7108 ADD_EXECUTABLE(f32-expm1minus-eval eval/f32-expm1minus.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7109 SET_TARGET_PROPERTIES(f32-expm1minus-eval PROPERTIES
7110 CXX_STANDARD 11
7111 CXX_STANDARD_REQUIRED YES
7112 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7113 TARGET_INCLUDE_DIRECTORIES(f32-expm1minus-eval PRIVATE include src)
7114 TARGET_LINK_LIBRARIES(f32-expm1minus-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf44f0222020-12-14 11:53:27 -0800[diff] [blame]7115
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7116 ADD_EXECUTABLE(f32-expminus-eval eval/f32-expminus.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhand28a5a22020-12-14 15:27:22 -0800[diff] [blame]7117 SET_TARGET_PROPERTIES(f32-expminus-eval PROPERTIES
7118 CXX_STANDARD 11
7119 CXX_STANDARD_REQUIRED YES
7120 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7121 TARGET_INCLUDE_DIRECTORIES(f32-expminus-eval PRIVATE include src)
7122 TARGET_LINK_LIBRARIES(f32-expminus-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhand28a5a22020-12-14 15:27:22 -0800[diff] [blame]7123
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7124 ADD_EXECUTABLE(f32-roundne-eval eval/f32-roundne.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf35d73b2020-05-11 19:15:04 -0700[diff] [blame]7125 SET_TARGET_PROPERTIES(f32-roundne-eval PROPERTIES
7126 CXX_STANDARD 11
7127 CXX_STANDARD_REQUIRED YES
7128 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7129 TARGET_INCLUDE_DIRECTORIES(f32-roundne-eval PRIVATE include src)
7130 TARGET_LINK_LIBRARIES(f32-roundne-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanf35d73b2020-05-11 19:15:04 -0700[diff] [blame]7131
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7132 ADD_EXECUTABLE(f32-roundd-eval eval/f32-roundd.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]7133 SET_TARGET_PROPERTIES(f32-roundd-eval PROPERTIES
7134 CXX_STANDARD 11
7135 CXX_STANDARD_REQUIRED YES
7136 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7137 TARGET_INCLUDE_DIRECTORIES(f32-roundd-eval PRIVATE include src)
7138 TARGET_LINK_LIBRARIES(f32-roundd-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]7139
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7140 ADD_EXECUTABLE(f32-roundu-eval eval/f32-roundu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]7141 SET_TARGET_PROPERTIES(f32-roundu-eval PROPERTIES
7142 CXX_STANDARD 11
7143 CXX_STANDARD_REQUIRED YES
7144 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7145 TARGET_INCLUDE_DIRECTORIES(f32-roundu-eval PRIVATE include src)
7146 TARGET_LINK_LIBRARIES(f32-roundu-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]7147
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7148 ADD_EXECUTABLE(f32-roundz-eval eval/f32-roundz.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]7149 SET_TARGET_PROPERTIES(f32-roundz-eval PROPERTIES
7150 CXX_STANDARD 11
7151 CXX_STANDARD_REQUIRED YES
7152 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7153 TARGET_INCLUDE_DIRECTORIES(f32-roundz-eval PRIVATE include src)
7154 TARGET_LINK_LIBRARIES(f32-roundz-eval PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]7155
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]7156 # ---[ Build end-to-end microbenchmarks
Marat Dukhan17e16282019-12-10 12:09:35 -0800[diff] [blame]7157 ADD_LIBRARY(bench-models STATIC
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]7158 models/fp16-mobilenet-v1.cc
7159 models/fp32-mobilenet-v1.cc
Marat Dukhane252f922021-08-31 08:57:41 -0700[diff] [blame]7160 models/qc8-mobilenet-v1.cc
7161 models/qc8-mobilenet-v2.cc
Marat Dukhan0743cdf2020-08-04 18:52:07 -0700[diff] [blame]7162 models/qs8-mobilenet-v1.cc
Marat Dukhan70a96182020-09-03 17:13:58 -0700[diff] [blame]7163 models/qs8-mobilenet-v2.cc
Marat Dukhan12a23bb2021-03-08 08:13:21 -0800[diff] [blame]7164 models/qu8-mobilenet-v1.cc
Marat Dukhan036b2b12021-07-21 01:12:58 -0700[diff] [blame]7165 models/qu8-mobilenet-v2.cc
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]7166 models/fp16-mobilenet-v2.cc
7167 models/fp32-mobilenet-v2.cc
Marat Dukhan66f3ccd2020-09-14 16:09:38 -0700[diff] [blame]7168 models/fp16-mobilenet-v3-large.cc
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]7169 models/fp32-mobilenet-v3-large.cc
Marat Dukhan66f3ccd2020-09-14 16:09:38 -0700[diff] [blame]7170 models/fp16-mobilenet-v3-small.cc
Marat Dukhan4cea2322021-03-09 09:35:36 -0800[diff] [blame]7171 models/fp32-mobilenet-v3-small.cc
7172 models/fp32-sparse-mobilenet-v1.cc
7173 models/fp32-sparse-mobilenet-v2.cc
7174 models/fp32-sparse-mobilenet-v3-large.cc
7175 models/fp32-sparse-mobilenet-v3-small.cc)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]7176 SET_TARGET_PROPERTIES(bench-models PROPERTIES
7177 CXX_STANDARD 11
7178 CXX_STANDARD_REQUIRED YES
7179 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7180 TARGET_INCLUDE_DIRECTORIES(bench-models PRIVATE .)
Marat Dukhan676d5822020-06-30 16:27:47 -0700[diff] [blame]7181 TARGET_LINK_LIBRARIES(bench-models PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]7182
7183 ADD_EXECUTABLE(end2end-bench bench/end2end.cc)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7184 SET_TARGET_PROPERTIES(end2end-bench PROPERTIES
7185 CXX_STANDARD 11
7186 CXX_STANDARD_REQUIRED YES
7187 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7188 TARGET_INCLUDE_DIRECTORIES(end2end-bench PRIVATE .)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]7189 TARGET_LINK_LIBRARIES(end2end-bench PRIVATE XNNPACK benchmark bench-models bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7190
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7191 ADD_EXECUTABLE(f32-dwconv-e2e-bench bench/f32-dwconv-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]7192 SET_TARGET_PROPERTIES(f32-dwconv-e2e-bench PROPERTIES
7193 CXX_STANDARD 11
7194 CXX_STANDARD_REQUIRED YES
7195 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7196 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-e2e-bench PRIVATE . src)
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]7197 TARGET_LINK_LIBRARIES(f32-dwconv-e2e-bench PRIVATE XNNPACK benchmark bench-models bench-utils)
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]7198
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7199 ADD_EXECUTABLE(f32-gemm-e2e-bench bench/f32-gemm-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan0a5a53f2019-10-31 10:58:31 -0700[diff] [blame]7200 SET_TARGET_PROPERTIES(f32-gemm-e2e-bench PROPERTIES
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]7201 CXX_STANDARD 11
7202 CXX_STANDARD_REQUIRED YES
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]7203 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7204 TARGET_INCLUDE_DIRECTORIES(f32-gemm-e2e-bench PRIVATE . src)
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]7205 TARGET_LINK_LIBRARIES(f32-gemm-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]7206
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7207 ADD_EXECUTABLE(qs8-dwconv-e2e-bench bench/qs8-dwconv-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanbbfc6d32021-07-26 18:31:02 -0700[diff] [blame]7208 SET_TARGET_PROPERTIES(qs8-dwconv-e2e-bench PROPERTIES
7209 CXX_STANDARD 11
7210 CXX_STANDARD_REQUIRED YES
7211 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7212 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-e2e-bench PRIVATE . src)
Marat Dukhanbbfc6d32021-07-26 18:31:02 -0700[diff] [blame]7213 TARGET_LINK_LIBRARIES(qs8-dwconv-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
7214
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7215 ADD_EXECUTABLE(qs8-gemm-e2e-bench bench/qs8-gemm-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Frank Barcharddc909cb2021-02-08 13:59:31 -0800[diff] [blame]7216 SET_TARGET_PROPERTIES(qs8-gemm-e2e-bench PROPERTIES
7217 CXX_STANDARD 11
7218 CXX_STANDARD_REQUIRED YES
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]7219 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7220 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-e2e-bench PRIVATE . src)
Marat Dukhanbb8b7942021-05-31 21:31:53 -0700[diff] [blame]7221 TARGET_LINK_LIBRARIES(qs8-gemm-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
Frank Barcharddc909cb2021-02-08 13:59:31 -0800[diff] [blame]7222
Frank Barchard9098aba2021-08-12 12:20:03 -0700[diff] [blame]7223 ADD_EXECUTABLE(qu8-gemm-e2e-bench bench/qu8-gemm-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
7224 SET_TARGET_PROPERTIES(qu8-gemm-e2e-bench PROPERTIES
7225 CXX_STANDARD 11
7226 CXX_STANDARD_REQUIRED YES
7227 CXX_EXTENSIONS YES)
7228 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-e2e-bench PRIVATE . src)
7229 TARGET_LINK_LIBRARIES(qu8-gemm-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
7230
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7231 ADD_EXECUTABLE(qu8-dwconv-e2e-bench bench/qu8-dwconv-e2e.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6084fb82021-07-27 07:45:02 -0700[diff] [blame]7232 SET_TARGET_PROPERTIES(qu8-dwconv-e2e-bench PROPERTIES
7233 CXX_STANDARD 11
7234 CXX_STANDARD_REQUIRED YES
7235 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7236 TARGET_INCLUDE_DIRECTORIES(qu8-dwconv-e2e-bench PRIVATE . src)
Marat Dukhan6084fb82021-07-27 07:45:02 -0700[diff] [blame]7237 TARGET_LINK_LIBRARIES(qu8-dwconv-e2e-bench PRIVATE XNNPACK fp16 benchmark bench-models bench-utils)
7238
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7239 # ---[ Build operator-level microbenchmarks
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7240 ADD_EXECUTABLE(average-pooling-bench bench/average-pooling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7241 SET_TARGET_PROPERTIES(average-pooling-bench PROPERTIES
7242 CXX_STANDARD 11
7243 CXX_STANDARD_REQUIRED YES
7244 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7245 TARGET_INCLUDE_DIRECTORIES(average-pooling-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7246 TARGET_LINK_LIBRARIES(average-pooling-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7247
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7248 ADD_EXECUTABLE(bankers-rounding-bench bench/bankers-rounding.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7249 SET_TARGET_PROPERTIES(bankers-rounding-bench PROPERTIES
7250 CXX_STANDARD 11
7251 CXX_STANDARD_REQUIRED YES
7252 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7253 TARGET_INCLUDE_DIRECTORIES(bankers-rounding-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7254 TARGET_LINK_LIBRARIES(bankers-rounding-bench PRIVATE XNNPACK benchmark bench-utils)
7255
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7256 ADD_EXECUTABLE(ceiling-bench bench/ceiling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7257 SET_TARGET_PROPERTIES(ceiling-bench PROPERTIES
7258 CXX_STANDARD 11
7259 CXX_STANDARD_REQUIRED YES
7260 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7261 TARGET_INCLUDE_DIRECTORIES(ceiling-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7262 TARGET_LINK_LIBRARIES(ceiling-bench PRIVATE XNNPACK benchmark bench-utils)
7263
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7264 ADD_EXECUTABLE(channel-shuffle-bench bench/channel-shuffle.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7265 SET_TARGET_PROPERTIES(channel-shuffle-bench PROPERTIES
7266 CXX_STANDARD 11
7267 CXX_STANDARD_REQUIRED YES
7268 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7269 TARGET_INCLUDE_DIRECTORIES(channel-shuffle-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7270 TARGET_LINK_LIBRARIES(channel-shuffle-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7271
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7272 ADD_EXECUTABLE(convolution-bench bench/convolution.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7273 SET_TARGET_PROPERTIES(convolution-bench PROPERTIES
7274 CXX_STANDARD 11
7275 CXX_STANDARD_REQUIRED YES
7276 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7277 TARGET_INCLUDE_DIRECTORIES(convolution-bench PRIVATE .)
Frank Barchard49b4dcc2020-06-26 14:07:19 -0700[diff] [blame]7278 TARGET_LINK_LIBRARIES(convolution-bench PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7279
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7280 ADD_EXECUTABLE(deconvolution-bench bench/deconvolution.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7281 SET_TARGET_PROPERTIES(deconvolution-bench PROPERTIES
7282 CXX_STANDARD 11
7283 CXX_STANDARD_REQUIRED YES
7284 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7285 TARGET_INCLUDE_DIRECTORIES(deconvolution-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7286 TARGET_LINK_LIBRARIES(deconvolution-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7287
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7288 ADD_EXECUTABLE(elu-bench bench/elu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -0800[diff] [blame]7289 SET_TARGET_PROPERTIES(elu-bench PROPERTIES
7290 CXX_STANDARD 11
7291 CXX_STANDARD_REQUIRED YES
7292 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7293 TARGET_INCLUDE_DIRECTORIES(elu-bench PRIVATE .)
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -0800[diff] [blame]7294 TARGET_LINK_LIBRARIES(elu-bench PRIVATE XNNPACK benchmark bench-utils)
7295
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7296 ADD_EXECUTABLE(floor-bench bench/floor.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7297 SET_TARGET_PROPERTIES(floor-bench PROPERTIES
7298 CXX_STANDARD 11
7299 CXX_STANDARD_REQUIRED YES
7300 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7301 TARGET_INCLUDE_DIRECTORIES(floor-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7302 TARGET_LINK_LIBRARIES(floor-bench PRIVATE XNNPACK benchmark bench-utils)
7303
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7304 ADD_EXECUTABLE(global-average-pooling-bench bench/global-average-pooling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7305 SET_TARGET_PROPERTIES(global-average-pooling-bench PROPERTIES
7306 CXX_STANDARD 11
7307 CXX_STANDARD_REQUIRED YES
7308 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7309 TARGET_INCLUDE_DIRECTORIES(global-average-pooling-bench PRIVATE .)
Frank Barchard0c849732020-06-12 13:31:32 -0700[diff] [blame]7310 TARGET_LINK_LIBRARIES(global-average-pooling-bench PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7311
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7312 ADD_EXECUTABLE(hardswish-bench bench/hardswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanad352602020-06-25 21:50:54 -0700[diff] [blame]7313 SET_TARGET_PROPERTIES(hardswish-bench PROPERTIES
7314 CXX_STANDARD 11
7315 CXX_STANDARD_REQUIRED YES
7316 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7317 TARGET_INCLUDE_DIRECTORIES(hardswish-bench PRIVATE .)
Marat Dukhanae24dfc2020-09-23 17:12:45 -0700[diff] [blame]7318 TARGET_LINK_LIBRARIES(hardswish-bench PRIVATE XNNPACK fp16 benchmark bench-utils)
Marat Dukhanad352602020-06-25 21:50:54 -0700[diff] [blame]7319
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7320 ADD_EXECUTABLE(max-pooling-bench bench/max-pooling.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7321 SET_TARGET_PROPERTIES(max-pooling-bench PROPERTIES
7322 CXX_STANDARD 11
7323 CXX_STANDARD_REQUIRED YES
7324 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7325 TARGET_INCLUDE_DIRECTORIES(max-pooling-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7326 TARGET_LINK_LIBRARIES(max-pooling-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7327
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7328 ADD_EXECUTABLE(prelu-bench bench/prelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]7329 SET_TARGET_PROPERTIES(prelu-bench PROPERTIES
7330 CXX_STANDARD 11
7331 CXX_STANDARD_REQUIRED YES
7332 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7333 TARGET_INCLUDE_DIRECTORIES(prelu-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7334 TARGET_LINK_LIBRARIES(prelu-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]7335
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7336 ADD_EXECUTABLE(sigmoid-bench bench/sigmoid.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7337 SET_TARGET_PROPERTIES(sigmoid-bench PROPERTIES
7338 CXX_STANDARD 11
7339 CXX_STANDARD_REQUIRED YES
7340 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7341 TARGET_INCLUDE_DIRECTORIES(sigmoid-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7342 TARGET_LINK_LIBRARIES(sigmoid-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7343
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7344 ADD_EXECUTABLE(softmax-bench bench/softmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]7345 SET_TARGET_PROPERTIES(softmax-bench PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7346 CXX_STANDARD 11
7347 CXX_STANDARD_REQUIRED YES
7348 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7349 TARGET_INCLUDE_DIRECTORIES(softmax-bench PRIVATE .)
Frank Barchardd9860042020-06-15 14:00:52 -0700[diff] [blame]7350 TARGET_LINK_LIBRARIES(softmax-bench PRIVATE XNNPACK benchmark bench-utils)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7351
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7352 ADD_EXECUTABLE(square-root-bench bench/square-root.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6804bbd2020-06-30 19:26:11 -0700[diff] [blame]7353 SET_TARGET_PROPERTIES(square-root-bench PROPERTIES
7354 CXX_STANDARD 11
7355 CXX_STANDARD_REQUIRED YES
7356 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7357 TARGET_INCLUDE_DIRECTORIES(square-root-bench PRIVATE .)
Marat Dukhan6804bbd2020-06-30 19:26:11 -0700[diff] [blame]7358 TARGET_LINK_LIBRARIES(square-root-bench PRIVATE XNNPACK benchmark bench-utils)
7359
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7360 ADD_EXECUTABLE(truncation-bench bench/truncation.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7361 SET_TARGET_PROPERTIES(truncation-bench PROPERTIES
7362 CXX_STANDARD 11
7363 CXX_STANDARD_REQUIRED YES
7364 CXX_EXTENSIONS NO)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7365 TARGET_INCLUDE_DIRECTORIES(truncation-bench PRIVATE .)
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]7366 TARGET_LINK_LIBRARIES(truncation-bench PRIVATE XNNPACK benchmark bench-utils)
7367
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7368 # ---[ Build microkernel-level microbenchmarks
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7369 ADD_EXECUTABLE(f16-dwconv-bench bench/f16-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7370 SET_TARGET_PROPERTIES(f16-dwconv-bench PROPERTIES
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]7371 CXX_STANDARD 11
7372 CXX_STANDARD_REQUIRED YES
7373 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7374 TARGET_INCLUDE_DIRECTORIES(f16-dwconv-bench PRIVATE . include src)
7375 TARGET_LINK_LIBRARIES(f16-dwconv-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]7376
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7377 ADD_EXECUTABLE(f16-gemm-bench bench/f16-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7378 SET_TARGET_PROPERTIES(f16-gemm-bench PROPERTIES
7379 CXX_STANDARD 11
7380 CXX_STANDARD_REQUIRED YES
7381 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7382 TARGET_INCLUDE_DIRECTORIES(f16-gemm-bench PRIVATE . include src)
7383 TARGET_LINK_LIBRARIES(f16-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7384
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7385 ADD_EXECUTABLE(f16-igemm-bench bench/f16-igemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7386 SET_TARGET_PROPERTIES(f16-igemm-bench PROPERTIES
Frank Barchardc2010062020-07-19 10:04:12 -0700[diff] [blame]7387 CXX_STANDARD 11
7388 CXX_STANDARD_REQUIRED YES
7389 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7390 TARGET_INCLUDE_DIRECTORIES(f16-igemm-bench PRIVATE . include src)
7391 TARGET_LINK_LIBRARIES(f16-igemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7392
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7393 ADD_EXECUTABLE(f16-vrelu-bench bench/f16-vrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7394 SET_TARGET_PROPERTIES(f16-vrelu-bench PROPERTIES
7395 CXX_STANDARD 11
7396 CXX_STANDARD_REQUIRED YES
7397 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7398 TARGET_INCLUDE_DIRECTORIES(f16-vrelu-bench PRIVATE . include src)
7399 TARGET_LINK_LIBRARIES(f16-vrelu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Frank Barchardc2010062020-07-19 10:04:12 -0700[diff] [blame]7400
Marat Dukhan434352f2021-10-16 18:28:55 -0700[diff] [blame]7401 ADD_EXECUTABLE(f16-f32-vcvt-bench bench/f16-f32-vcvt.cc $<TARGET_OBJECTS:all_microkernels>)
7402 SET_TARGET_PROPERTIES(f16-f32-vcvt-bench PROPERTIES
7403 CXX_STANDARD 11
7404 CXX_STANDARD_REQUIRED YES
7405 CXX_EXTENSIONS YES)
7406 TARGET_INCLUDE_DIRECTORIES(f16-f32-vcvt-bench PRIVATE . include src)
7407 TARGET_LINK_LIBRARIES(f16-f32-vcvt-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7408
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7409 ADD_EXECUTABLE(f32-conv-hwc-bench bench/f32-conv-hwc.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7410 SET_TARGET_PROPERTIES(f32-conv-hwc-bench PROPERTIES
7411 CXX_STANDARD 11
7412 CXX_STANDARD_REQUIRED YES
7413 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7414 TARGET_INCLUDE_DIRECTORIES(f32-conv-hwc-bench PRIVATE . include src)
7415 TARGET_LINK_LIBRARIES(f32-conv-hwc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7416
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7417 ADD_EXECUTABLE(f32-dwconv-bench bench/f32-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7418 SET_TARGET_PROPERTIES(f32-dwconv-bench PROPERTIES
7419 CXX_STANDARD 11
7420 CXX_STANDARD_REQUIRED YES
7421 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7422 TARGET_INCLUDE_DIRECTORIES(f32-dwconv-bench PRIVATE . include src)
7423 TARGET_LINK_LIBRARIES(f32-dwconv-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7424
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7425 ADD_EXECUTABLE(f32-dwconv2d-chw-bench bench/f32-dwconv2d-chw.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanbf715f92020-10-23 20:17:00 -0700[diff] [blame]7426 SET_TARGET_PROPERTIES(f32-dwconv2d-chw-bench PROPERTIES
7427 CXX_STANDARD 11
7428 CXX_STANDARD_REQUIRED YES
7429 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7430 TARGET_INCLUDE_DIRECTORIES(f32-dwconv2d-chw-bench PRIVATE . include src)
7431 TARGET_LINK_LIBRARIES(f32-dwconv2d-chw-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhanbf715f92020-10-23 20:17:00 -0700[diff] [blame]7432
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7433 ADD_EXECUTABLE(f32-gemm-bench bench/f32-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7434 SET_TARGET_PROPERTIES(f32-gemm-bench PROPERTIES
7435 CXX_STANDARD 11
7436 CXX_STANDARD_REQUIRED YES
7437 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7438 TARGET_INCLUDE_DIRECTORIES(f32-gemm-bench PRIVATE . include src)
7439 TARGET_LINK_LIBRARIES(f32-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7440
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7441 ADD_EXECUTABLE(f32-igemm-bench bench/f32-igemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7442 SET_TARGET_PROPERTIES(f32-igemm-bench PROPERTIES
7443 CXX_STANDARD 11
7444 CXX_STANDARD_REQUIRED YES
7445 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7446 TARGET_INCLUDE_DIRECTORIES(f32-igemm-bench PRIVATE . include src)
7447 TARGET_LINK_LIBRARIES(f32-igemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7448
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7449 ADD_EXECUTABLE(f32-im2col-gemm-bench bench/f32-im2col-gemm.cc src/im2col.c $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7450 SET_TARGET_PROPERTIES(f32-im2col-gemm-bench PROPERTIES
7451 C_STANDARD 99
7452 C_STANDARD_REQUIRED YES
7453 C_EXTENSIONS NO
7454 CXX_STANDARD 11
7455 CXX_STANDARD_REQUIRED YES
7456 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7457 TARGET_INCLUDE_DIRECTORIES(f32-im2col-gemm-bench PRIVATE . include src)
7458 TARGET_LINK_LIBRARIES(f32-im2col-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7459
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7460 ADD_EXECUTABLE(f32-rmax-bench bench/f32-rmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7461 SET_TARGET_PROPERTIES(f32-rmax-bench PROPERTIES
7462 CXX_STANDARD 11
7463 CXX_STANDARD_REQUIRED YES
7464 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7465 TARGET_INCLUDE_DIRECTORIES(f32-rmax-bench PRIVATE . include src)
7466 TARGET_LINK_LIBRARIES(f32-rmax-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7467
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7468 ADD_EXECUTABLE(f32-spmm-bench bench/f32-spmm.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7469 SET_TARGET_PROPERTIES(f32-spmm-bench PROPERTIES
7470 CXX_STANDARD 11
7471 CXX_STANDARD_REQUIRED YES
7472 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7473 TARGET_INCLUDE_DIRECTORIES(f32-spmm-bench PRIVATE . include src)
7474 TARGET_LINK_LIBRARIES(f32-spmm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7475
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7476 ADD_EXECUTABLE(f32-softmax-bench bench/f32-softmax.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]7477 SET_TARGET_PROPERTIES(f32-softmax-bench PROPERTIES
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]7478 CXX_STANDARD 11
7479 CXX_STANDARD_REQUIRED YES
7480 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7481 TARGET_INCLUDE_DIRECTORIES(f32-softmax-bench PRIVATE . include src)
7482 TARGET_LINK_LIBRARIES(f32-softmax-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]7483
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7484 ADD_EXECUTABLE(f32-velu-bench bench/f32-velu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]7485 SET_TARGET_PROPERTIES(f32-velu-bench PROPERTIES
7486 CXX_STANDARD 11
7487 CXX_STANDARD_REQUIRED YES
7488 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7489 TARGET_INCLUDE_DIRECTORIES(f32-velu-bench PRIVATE . include src)
7490 TARGET_LINK_LIBRARIES(f32-velu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800[diff] [blame]7491
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7492 ADD_EXECUTABLE(f32-vhswish-bench bench/f32-vhswish.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7493 SET_TARGET_PROPERTIES(f32-vhswish-bench PROPERTIES
7494 CXX_STANDARD 11
7495 CXX_STANDARD_REQUIRED YES
7496 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7497 TARGET_INCLUDE_DIRECTORIES(f32-vhswish-bench PRIVATE . include src)
7498 TARGET_LINK_LIBRARIES(f32-vhswish-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7499
Marat Dukhan7c74aff2021-08-07 15:44:27 -0700[diff] [blame]7500 ADD_EXECUTABLE(f32-vlrelu-bench bench/f32-vlrelu.cc $<TARGET_OBJECTS:all_microkernels>)
7501 SET_TARGET_PROPERTIES(f32-vlrelu-bench PROPERTIES
7502 CXX_STANDARD 11
7503 CXX_STANDARD_REQUIRED YES
7504 CXX_EXTENSIONS YES)
7505 TARGET_INCLUDE_DIRECTORIES(f32-vlrelu-bench PRIVATE . include src)
7506 TARGET_LINK_LIBRARIES(f32-vlrelu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7507
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7508 ADD_EXECUTABLE(f32-vrelu-bench bench/f32-vrelu.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7509 SET_TARGET_PROPERTIES(f32-vrelu-bench PROPERTIES
7510 CXX_STANDARD 11
7511 CXX_STANDARD_REQUIRED YES
7512 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7513 TARGET_INCLUDE_DIRECTORIES(f32-vrelu-bench PRIVATE . include src)
7514 TARGET_LINK_LIBRARIES(f32-vrelu-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7515
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7516 ADD_EXECUTABLE(f32-vsigmoid-bench bench/f32-vsigmoid.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7517 SET_TARGET_PROPERTIES(f32-vsigmoid-bench PROPERTIES
7518 CXX_STANDARD 11
7519 CXX_STANDARD_REQUIRED YES
7520 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7521 TARGET_INCLUDE_DIRECTORIES(f32-vsigmoid-bench PRIVATE . include src)
7522 TARGET_LINK_LIBRARIES(f32-vsigmoid-bench PRIVATE benchmark bench-utils fp16 pthreadpool)
Marat Dukhan6674d692021-05-05 22:27:00 -0700[diff] [blame]7523
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7524 ADD_EXECUTABLE(f32-vsqrt-bench bench/f32-vsqrt.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]7525 SET_TARGET_PROPERTIES(f32-vsqrt-bench PROPERTIES
7526 CXX_STANDARD 11
7527 CXX_STANDARD_REQUIRED YES
7528 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7529 TARGET_INCLUDE_DIRECTORIES(f32-vsqrt-bench PRIVATE . include src)
7530 TARGET_LINK_LIBRARIES(f32-vsqrt-bench PRIVATE benchmark bench-utils fp16 pthreadpool)
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame]7531
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7532 ADD_EXECUTABLE(qs8-dwconv-bench bench/qs8-dwconv.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:indirection> $<TARGET_OBJECTS:packing>)
Marat Dukhan0744fa02021-07-26 22:56:27 -0700[diff] [blame]7533 SET_TARGET_PROPERTIES(qs8-dwconv-bench PROPERTIES
7534 CXX_STANDARD 11
7535 CXX_STANDARD_REQUIRED YES
7536 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7537 TARGET_INCLUDE_DIRECTORIES(qs8-dwconv-bench PRIVATE . include src)
7538 TARGET_LINK_LIBRARIES(qs8-dwconv-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan0744fa02021-07-26 22:56:27 -0700[diff] [blame]7539
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7540 ADD_EXECUTABLE(qs8-gemm-bench bench/qs8-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan595e1702020-07-31 10:12:52 -0700[diff] [blame]7541 SET_TARGET_PROPERTIES(qs8-gemm-bench PROPERTIES
7542 CXX_STANDARD 11
7543 CXX_STANDARD_REQUIRED YES
7544 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7545 TARGET_INCLUDE_DIRECTORIES(qs8-gemm-bench PRIVATE . include src)
7546 TARGET_LINK_LIBRARIES(qs8-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan595e1702020-07-31 10:12:52 -0700[diff] [blame]7547
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7548 ADD_EXECUTABLE(qs8-requantization-bench bench/qs8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan56bdd4a2020-08-03 19:47:04 -0700[diff] [blame]7549 SET_TARGET_PROPERTIES(qs8-requantization-bench PROPERTIES
7550 CXX_STANDARD 11
7551 CXX_STANDARD_REQUIRED YES
7552 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7553 TARGET_INCLUDE_DIRECTORIES(qs8-requantization-bench PRIVATE . include src)
7554 TARGET_LINK_LIBRARIES(qs8-requantization-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan56bdd4a2020-08-03 19:47:04 -0700[diff] [blame]7555
Marat Dukhan83a8d2f2021-07-29 16:41:19 -0700[diff] [blame]7556 ADD_EXECUTABLE(qs8-vadd-bench bench/qs8-vadd.cc $<TARGET_OBJECTS:all_microkernels>)
7557 SET_TARGET_PROPERTIES(qs8-vadd-bench PROPERTIES
7558 CXX_STANDARD 11
7559 CXX_STANDARD_REQUIRED YES
7560 CXX_EXTENSIONS YES)
7561 TARGET_INCLUDE_DIRECTORIES(qs8-vadd-bench PRIVATE . include src)
7562 TARGET_LINK_LIBRARIES(qs8-vadd-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7563
7564 ADD_EXECUTABLE(qs8-vaddc-bench bench/qs8-vaddc.cc $<TARGET_OBJECTS:all_microkernels>)
7565 SET_TARGET_PROPERTIES(qs8-vaddc-bench PROPERTIES
7566 CXX_STANDARD 11
7567 CXX_STANDARD_REQUIRED YES
7568 CXX_EXTENSIONS YES)
7569 TARGET_INCLUDE_DIRECTORIES(qs8-vaddc-bench PRIVATE . include src)
7570 TARGET_LINK_LIBRARIES(qs8-vaddc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7571
Marat Dukhan795e5ab2021-08-02 19:07:52 -0700[diff] [blame]7572 ADD_EXECUTABLE(qs8-vmul-bench bench/qs8-vmul.cc $<TARGET_OBJECTS:all_microkernels>)
7573 SET_TARGET_PROPERTIES(qs8-vmul-bench PROPERTIES
7574 CXX_STANDARD 11
7575 CXX_STANDARD_REQUIRED YES
7576 CXX_EXTENSIONS YES)
7577 TARGET_INCLUDE_DIRECTORIES(qs8-vmul-bench PRIVATE . include src)
7578 TARGET_LINK_LIBRARIES(qs8-vmul-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7579
Marat Dukhan8b024c92021-08-03 00:05:14 -0700[diff] [blame]7580 ADD_EXECUTABLE(qs8-vmulc-bench bench/qs8-vmulc.cc $<TARGET_OBJECTS:all_microkernels>)
7581 SET_TARGET_PROPERTIES(qs8-vmulc-bench PROPERTIES
7582 CXX_STANDARD 11
7583 CXX_STANDARD_REQUIRED YES
7584 CXX_EXTENSIONS YES)
7585 TARGET_INCLUDE_DIRECTORIES(qs8-vmulc-bench PRIVATE . include src)
7586 TARGET_LINK_LIBRARIES(qs8-vmulc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7587
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7588 ADD_EXECUTABLE(qu8-gemm-bench bench/qu8-gemm.cc $<TARGET_OBJECTS:all_microkernels> $<TARGET_OBJECTS:packing>)
Marat Dukhan08b7a972020-07-14 18:17:29 -0700[diff] [blame]7589 SET_TARGET_PROPERTIES(qu8-gemm-bench PROPERTIES
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7590 CXX_STANDARD 11
7591 CXX_STANDARD_REQUIRED YES
7592 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7593 TARGET_INCLUDE_DIRECTORIES(qu8-gemm-bench PRIVATE . include src)
7594 TARGET_LINK_LIBRARIES(qu8-gemm-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]7595
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7596 ADD_EXECUTABLE(qu8-requantization-bench bench/qu8-requantization.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700[diff] [blame]7597 SET_TARGET_PROPERTIES(qu8-requantization-bench PROPERTIES
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]7598 CXX_STANDARD 11
7599 CXX_STANDARD_REQUIRED YES
7600 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7601 TARGET_INCLUDE_DIRECTORIES(qu8-requantization-bench PRIVATE . include src)
7602 TARGET_LINK_LIBRARIES(qu8-requantization-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]7603
Marat Dukhan1ef9de82021-07-29 17:15:33 -0700[diff] [blame]7604 ADD_EXECUTABLE(qu8-vadd-bench bench/qu8-vadd.cc $<TARGET_OBJECTS:all_microkernels>)
7605 SET_TARGET_PROPERTIES(qu8-vadd-bench PROPERTIES
7606 CXX_STANDARD 11
7607 CXX_STANDARD_REQUIRED YES
7608 CXX_EXTENSIONS YES)
7609 TARGET_INCLUDE_DIRECTORIES(qu8-vadd-bench PRIVATE . include src)
7610 TARGET_LINK_LIBRARIES(qu8-vadd-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7611
7612 ADD_EXECUTABLE(qu8-vaddc-bench bench/qu8-vaddc.cc $<TARGET_OBJECTS:all_microkernels>)
7613 SET_TARGET_PROPERTIES(qu8-vaddc-bench PROPERTIES
7614 CXX_STANDARD 11
7615 CXX_STANDARD_REQUIRED YES
7616 CXX_EXTENSIONS YES)
7617 TARGET_INCLUDE_DIRECTORIES(qu8-vaddc-bench PRIVATE . include src)
7618 TARGET_LINK_LIBRARIES(qu8-vaddc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7619
Marat Dukhan795e5ab2021-08-02 19:07:52 -0700[diff] [blame]7620 ADD_EXECUTABLE(qu8-vmul-bench bench/qu8-vmul.cc $<TARGET_OBJECTS:all_microkernels>)
7621 SET_TARGET_PROPERTIES(qu8-vmul-bench PROPERTIES
7622 CXX_STANDARD 11
7623 CXX_STANDARD_REQUIRED YES
7624 CXX_EXTENSIONS YES)
7625 TARGET_INCLUDE_DIRECTORIES(qu8-vmul-bench PRIVATE . include src)
7626 TARGET_LINK_LIBRARIES(qu8-vmul-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7627
Marat Dukhan8b024c92021-08-03 00:05:14 -0700[diff] [blame]7628 ADD_EXECUTABLE(qu8-vmulc-bench bench/qu8-vmulc.cc $<TARGET_OBJECTS:all_microkernels>)
7629 SET_TARGET_PROPERTIES(qu8-vmulc-bench PROPERTIES
7630 CXX_STANDARD 11
7631 CXX_STANDARD_REQUIRED YES
7632 CXX_EXTENSIONS YES)
7633 TARGET_INCLUDE_DIRECTORIES(qu8-vmulc-bench PRIVATE . include src)
7634 TARGET_LINK_LIBRARIES(qu8-vmulc-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
7635
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7636 ADD_EXECUTABLE(rounding-bench bench/rounding.cc $<TARGET_OBJECTS:all_microkernels>)
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]7637 SET_TARGET_PROPERTIES(rounding-bench PROPERTIES
7638 CXX_STANDARD 11
7639 CXX_STANDARD_REQUIRED YES
7640 CXX_EXTENSIONS YES)
Marat Dukhan195b72f2021-07-27 22:03:30 -0700[diff] [blame]7641 TARGET_INCLUDE_DIRECTORIES(rounding-bench PRIVATE . include src)
7642 TARGET_LINK_LIBRARIES(rounding-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan54074372021-09-08 23:28:46 -0700[diff] [blame]7643
7644 ADD_EXECUTABLE(x8-lut-bench bench/x8-lut.cc $<TARGET_OBJECTS:all_microkernels>)
7645 SET_TARGET_PROPERTIES(x8-lut-bench PROPERTIES
7646 CXX_STANDARD 11
7647 CXX_STANDARD_REQUIRED YES
7648 CXX_EXTENSIONS YES)
7649 TARGET_INCLUDE_DIRECTORIES(x8-lut-bench PRIVATE . include src)
7650 TARGET_LINK_LIBRARIES(x8-lut-bench PRIVATE benchmark bench-utils cpuinfo fp16 pthreadpool)
Marat Dukhan2dbdc2f2019-10-08 16:36:23 -0700[diff] [blame]7651ENDIF()