Gitiles
Code Review Sign In
gerrit-public.fairphone.software / platform / external / XNNPACK / eecf8fd1d20c4ee9734a1669aaf20e50f9b71325 / . / BUILD.bazel
blob: 4675784a84e43c96bab0b6ef7e2173012dfb8c8e [file] [log] [blame]
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1# Copyright 2019 Google LLC
2#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]9load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]10
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]11licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]15OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
19 "@pthreadpool",
20]
21
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]22MICROKERNEL_BENCHMARK_DEPS = [
23 ":ukernels",
24 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]25 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]26 "@cpuinfo",
27 "@FP16",
28 "@pthreadpool",
29]
30
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]31ACCURACY_EVAL_DEPS = [
32 ":XNNPACK",
33 ":ukernels",
34 "@FP16",
35 "@pthreadpool",
36]
37
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]38MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]39 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]40 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]41 "@cpuinfo",
42 "@FP16",
43 "@pthreadpool",
44]
45
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]46OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]47 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]48 "@pthreadpool",
49 "@FP16",
50]
51
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]52OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]53 "src/operators/argmax-pooling-nhwc.c",
54 "src/operators/average-pooling-nhwc.c",
55 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]56 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]57 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]58 "src/operators/convolution-nchw.c",
59 "src/operators/convolution-nhwc.c",
60 "src/operators/deconvolution-nhwc.c",
61 "src/operators/fully-connected-nc.c",
62 "src/operators/global-average-pooling-ncw.c",
63 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]64 "src/operators/leaky-relu-nc.c",
65 "src/operators/max-pooling-nhwc.c",
66 "src/operators/prelu-nc.c",
67 "src/operators/resize-bilinear-nhwc.c",
68 "src/operators/sigmoid-nc.c",
69 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -0700[diff] [blame]70 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]71 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]72]
73
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]74SUBGRAPH_SRCS = [
75 "src/subgraph/add2.c",
76 "src/subgraph/argmax-pooling-2d.c",
77 "src/subgraph/average-pooling-2d.c",
78 "src/subgraph/clamp.c",
79 "src/subgraph/convolution-2d.c",
80 "src/subgraph/deconvolution-2d.c",
81 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]82 "src/subgraph/divide.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]83 "src/subgraph/fully-connected.c",
84 "src/subgraph/hardswish.c",
85 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]86 "src/subgraph/maximum2.c",
87 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]88 "src/subgraph/multiply2.c",
89 "src/subgraph/prelu.c",
90 "src/subgraph/sigmoid.c",
91 "src/subgraph/softmax.c",
92 "src/subgraph/static-constant-pad.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]93 "src/subgraph/squared-difference.c",
94 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]95 "src/subgraph/unpooling-2d.c",
96]
97
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]98TABLE_SRCS = [
99 "src/tables/exp2-k-over-64.c",
100 "src/tables/exp2-k-over-2048.c",
101]
102
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]103SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]104 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]105 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]106 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]107 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
108 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]109 "src/f32-clamp/gen/scalar-x1.c",
110 "src/f32-clamp/gen/scalar-x2.c",
111 "src/f32-clamp/gen/scalar-x4.c",
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]112 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Marat Dukhan6b7dfae2019-12-04 16:00:52 -0800[diff] [blame]113 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]114 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
115 "src/f32-dwconv-chw/3x3p1-scalar.c",
116 "src/f32-dwconv-chw/3x3s2p1-scalar.c",
117 "src/f32-dwconv-chw/5x5p2-scalar.c",
118 "src/f32-dwconv-chw/5x5s2p2-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]119 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
120 "src/f32-dwconv/gen/up1x4-scalar.c",
121 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
122 "src/f32-dwconv/gen/up1x9-scalar.c",
123 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
124 "src/f32-dwconv/gen/up1x25-scalar.c",
125 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
126 "src/f32-dwconv/gen/up2x4-scalar.c",
127 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
128 "src/f32-dwconv/gen/up2x9-scalar.c",
129 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
130 "src/f32-dwconv/gen/up2x25-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]131 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
132 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
133 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
134 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]135 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
136 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]137 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
138 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
139 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
140 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]141 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
142 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]143 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]144 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
145 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]146 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
147 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
148 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]149 "src/f32-gemm/gen/1x4-scalar.c",
150 "src/f32-gemm/gen/2x4-scalar.c",
151 "src/f32-gemm/gen/4x2-scalar.c",
152 "src/f32-gemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]153 "src/f32-gemm/gen/1x4-relu-scalar.c",
154 "src/f32-gemm/gen/2x4-relu-scalar.c",
155 "src/f32-gemm/gen/4x2-relu-scalar.c",
156 "src/f32-gemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]157 "src/f32-gemm/gen/1x4-minmax-scalar.c",
158 "src/f32-gemm/gen/2x4-minmax-scalar.c",
159 "src/f32-gemm/gen/4x2-minmax-scalar.c",
160 "src/f32-gemm/gen/4x4-minmax-scalar.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]161 "src/f32-hswish/gen/scalar-x1.c",
162 "src/f32-hswish/gen/scalar-x2.c",
163 "src/f32-hswish/gen/scalar-x4.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]164 "src/f32-ibilinear/gen/scalar-c1.c",
165 "src/f32-ibilinear/gen/scalar-c2.c",
166 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]167 "src/f32-igemm/gen/1x4-scalar.c",
168 "src/f32-igemm/gen/2x4-scalar.c",
169 "src/f32-igemm/gen/4x2-scalar.c",
170 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]171 "src/f32-igemm/gen/1x4-relu-scalar.c",
172 "src/f32-igemm/gen/2x4-relu-scalar.c",
173 "src/f32-igemm/gen/4x2-relu-scalar.c",
174 "src/f32-igemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]175 "src/f32-igemm/gen/1x4-minmax-scalar.c",
176 "src/f32-igemm/gen/2x4-minmax-scalar.c",
177 "src/f32-igemm/gen/4x2-minmax-scalar.c",
178 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]179 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
180 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
181 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]182 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
183 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
184 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
185 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]186 "src/f32-prelu/gen/scalar-2x1.c",
187 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]188 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
189 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
190 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
191 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
192 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
193 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
194 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
195 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
196 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
197 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
198 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
199 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]200 "src/f32-rmax/scalar.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]201 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x1.c",
202 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x2.c",
203 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x4.c",
204 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x1.c",
205 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x2.c",
206 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x4.c",
207 "src/f32-sigmoid/gen/scalar-p5-div-x1.c",
208 "src/f32-sigmoid/gen/scalar-p5-div-x2.c",
209 "src/f32-sigmoid/gen/scalar-p5-div-x4.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]210 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
211 "src/f32-spmm/gen/1x1-minmax-scalar.c",
212 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
213 "src/f32-spmm/gen/2x1-minmax-scalar.c",
214 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
215 "src/f32-spmm/gen/4x1-minmax-scalar.c",
216 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
217 "src/f32-spmm/gen/8x1-minmax-scalar.c",
218 "src/f32-spmm/gen/8x2-minmax-scalar.c",
219 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]220 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
221 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
222 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
223 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
224 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
225 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
226 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
227 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
228 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
229 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
230 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
231 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]232 "src/f32-vbinary/gen/vmax-scalar-x1.c",
233 "src/f32-vbinary/gen/vmax-scalar-x2.c",
234 "src/f32-vbinary/gen/vmax-scalar-x4.c",
235 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
236 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
237 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
238 "src/f32-vbinary/gen/vmin-scalar-x1.c",
239 "src/f32-vbinary/gen/vmin-scalar-x2.c",
240 "src/f32-vbinary/gen/vmin-scalar-x4.c",
241 "src/f32-vbinary/gen/vminc-scalar-x1.c",
242 "src/f32-vbinary/gen/vminc-scalar-x2.c",
243 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]244 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
245 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
246 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
247 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
248 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
249 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
250 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
251 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
252 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]253 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x1.c",
254 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x2.c",
255 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]256 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
257 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
258 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]259 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
260 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
261 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
262 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
263 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
264 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]265 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
266 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
267 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
268 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
269 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
270 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]271 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
272 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
273 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame^]274 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
275 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
276 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
277 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
278 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
279 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
280 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
281 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
282 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
283 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
284 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
285 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]286 "src/f32-vunary/gen/vabs-scalar-x1.c",
287 "src/f32-vunary/gen/vabs-scalar-x2.c",
288 "src/f32-vunary/gen/vabs-scalar-x4.c",
289 "src/f32-vunary/gen/vneg-scalar-x1.c",
290 "src/f32-vunary/gen/vneg-scalar-x2.c",
291 "src/f32-vunary/gen/vneg-scalar-x4.c",
292 "src/f32-vunary/gen/vsqr-scalar-x1.c",
293 "src/f32-vunary/gen/vsqr-scalar-x2.c",
294 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]295 "src/math/expminus-scalar-lut2048-p1.c",
296 "src/math/expminus-scalar-lut64-p2.c",
297 "src/math/expminus-scalar-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]298 "src/math/roundne-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]299 "src/math/roundne-scalar-nearbyint.c",
300 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]301 "src/math/roundd-scalar-addsub.c",
302 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]303 "src/math/roundd-scalar-floor.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]304 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]305 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]306 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]307 "src/math/roundz-scalar-addsub.c",
308 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]309 "src/math/roundz-scalar-trunc.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]310 "src/math/sigmoid-scalar-lut2048-p1-div.c",
311 "src/math/sigmoid-scalar-lut64-p2-div.c",
312 "src/math/sigmoid-scalar-p5-div.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]313 "src/q8-avgpool/9p8x-minmax-scalar-c1.c",
314 "src/q8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]315 "src/q8-dwconv/up1x9-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]316 "src/q8-gavgpool/7p7x-minmax-scalar-c1.c",
317 "src/q8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]318 "src/q8-gemm/2x2-minmax-scalar.c",
319 "src/q8-igemm/2x2-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]320 "src/q8-vadd/minmax-scalar.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]321 "src/u8-clamp/scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]322 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]323 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]324 "src/u8-rmax/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]325 "src/x32-fill/scalar-float.c",
326 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]327 "src/x32-packx/x2-scalar.c",
328 "src/x32-packx/x3-scalar.c",
329 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]330 "src/x32-pad/scalar-int.c",
331 "src/x32-pad/scalar-float.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]332 "src/x32-unpool/scalar.c",
333 "src/x32-zip/x2-scalar.c",
334 "src/x32-zip/x3-scalar.c",
335 "src/x32-zip/x4-scalar.c",
336 "src/x32-zip/xm-scalar.c",
337 "src/x8-lut/scalar.c",
338 "src/x8-zip/x2-scalar.c",
339 "src/x8-zip/x3-scalar.c",
340 "src/x8-zip/x4-scalar.c",
341 "src/x8-zip/xm-scalar.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]342 "src/requantization/precise-scalar.c",
343 "src/requantization/fp32-scalar.c",
344 "src/requantization/q31-scalar.c",
345 "src/requantization/gemmlowp-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]346]
347
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]348WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]349 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
350 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]351 "src/f32-clamp/gen/wasm-x1.c",
352 "src/f32-clamp/gen/wasm-x2.c",
353 "src/f32-clamp/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]354 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
355 "src/f32-dwconv/gen/up1x4-wasm.c",
356 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
357 "src/f32-dwconv/gen/up1x9-wasm.c",
358 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
359 "src/f32-dwconv/gen/up1x25-wasm.c",
360 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
361 "src/f32-dwconv/gen/up2x4-wasm.c",
362 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
363 "src/f32-dwconv/gen/up2x9-wasm.c",
364 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
365 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]366 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
367 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
368 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
369 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]370 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
371 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]372 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
373 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
374 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
375 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]376 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
377 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]378 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
379 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]380 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
381 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
382 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]383 "src/f32-gemm/gen/1x4-wasm.c",
384 "src/f32-gemm/gen/2x4-wasm.c",
385 "src/f32-gemm/gen/4x2-wasm.c",
386 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]387 "src/f32-gemm/gen/1x4-relu-wasm.c",
388 "src/f32-gemm/gen/2x4-relu-wasm.c",
389 "src/f32-gemm/gen/4x2-relu-wasm.c",
390 "src/f32-gemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]391 "src/f32-gemm/gen/1x4-minmax-wasm.c",
392 "src/f32-gemm/gen/2x4-minmax-wasm.c",
393 "src/f32-gemm/gen/4x2-minmax-wasm.c",
394 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]395 "src/f32-hswish/gen/wasm-x1.c",
396 "src/f32-hswish/gen/wasm-x2.c",
397 "src/f32-hswish/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]398 "src/f32-igemm/gen/1x4-wasm.c",
399 "src/f32-igemm/gen/2x4-wasm.c",
400 "src/f32-igemm/gen/4x2-wasm.c",
401 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]402 "src/f32-igemm/gen/1x4-relu-wasm.c",
403 "src/f32-igemm/gen/2x4-relu-wasm.c",
404 "src/f32-igemm/gen/4x2-relu-wasm.c",
405 "src/f32-igemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]406 "src/f32-igemm/gen/1x4-minmax-wasm.c",
407 "src/f32-igemm/gen/2x4-minmax-wasm.c",
408 "src/f32-igemm/gen/4x2-minmax-wasm.c",
409 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]410 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
411 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
412 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]413 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
414 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
415 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
416 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
417 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
418 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
419 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
420 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
421 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
422 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
423 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
424 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]425 "src/f32-vbinary/gen/vmax-wasm-x1.c",
426 "src/f32-vbinary/gen/vmax-wasm-x2.c",
427 "src/f32-vbinary/gen/vmax-wasm-x4.c",
428 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
429 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
430 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
431 "src/f32-vbinary/gen/vmin-wasm-x1.c",
432 "src/f32-vbinary/gen/vmin-wasm-x2.c",
433 "src/f32-vbinary/gen/vmin-wasm-x4.c",
434 "src/f32-vbinary/gen/vminc-wasm-x1.c",
435 "src/f32-vbinary/gen/vminc-wasm-x2.c",
436 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]437 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
438 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
439 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
440 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
441 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
442 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
443 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
444 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
445 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
446 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
447 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
448 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
449 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
450 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
451 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
452 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
453 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
454 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]455 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
456 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
457 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]458]
459
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]460PSIMD_FASTMATH_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]461 "src/f32-argmaxpool/4x-psimd-c4.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]462 "src/f32-argmaxpool/9p8x-psimd-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]463 "src/f32-argmaxpool/9x-psimd-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]464 "src/f32-avgpool/9p8x-minmax-psimd-c4.c",
465 "src/f32-avgpool/9x-minmax-psimd-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]466 "src/f32-clamp/gen/psimd-x4.c",
467 "src/f32-clamp/gen/psimd-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]468 "src/f32-dwconv/gen/up4x25-minmax-psimd-acc2.c",
469 "src/f32-dwconv/gen/up4x25-minmax-psimd.c",
470 "src/f32-dwconv/gen/up4x4-minmax-psimd-acc2.c",
471 "src/f32-dwconv/gen/up4x4-minmax-psimd.c",
472 "src/f32-dwconv/gen/up4x9-minmax-psimd-acc2.c",
473 "src/f32-dwconv/gen/up4x9-minmax-psimd.c",
474 "src/f32-dwconv/gen/up8x25-minmax-psimd-acc2.c",
475 "src/f32-dwconv/gen/up8x25-minmax-psimd.c",
476 "src/f32-dwconv/gen/up8x4-minmax-psimd-acc2.c",
477 "src/f32-dwconv/gen/up8x4-minmax-psimd.c",
478 "src/f32-dwconv/gen/up8x9-minmax-psimd-acc2.c",
479 "src/f32-dwconv/gen/up8x9-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]480 "src/f32-gavgpool/7p7x-minmax-psimd-c4.c",
481 "src/f32-gavgpool/7x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]482 "src/f32-gemm/gen/1x8-minmax-psimd-loadsplat.c",
483 "src/f32-gemm/gen/1x8-minmax-psimd-splat.c",
484 "src/f32-gemm/gen/1x8s4-minmax-psimd.c",
485 "src/f32-gemm/gen/4x2c4-minmax-psimd.c",
486 "src/f32-gemm/gen/4x8-minmax-psimd-loadsplat.c",
487 "src/f32-gemm/gen/4x8-minmax-psimd-splat.c",
488 "src/f32-gemm/gen/4x8s4-minmax-psimd.c",
489 "src/f32-gemm/gen/6x8-minmax-psimd-loadsplat.c",
490 "src/f32-gemm/gen/6x8-minmax-psimd-splat.c",
491 "src/f32-gemm/gen/6x8s4-minmax-psimd.c",
492 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-loadsplat.c",
493 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-splat.c",
494 "src/f32-gemm/gen-inc/1x8s4inc-minmax-psimd.c",
495 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-loadsplat.c",
496 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-splat.c",
497 "src/f32-gemm/gen-inc/4x8s4inc-minmax-psimd.c",
498 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-loadsplat.c",
499 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-splat.c",
500 "src/f32-gemm/gen-inc/6x8s4inc-minmax-psimd.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]501 "src/f32-hswish/gen/psimd-x4.c",
502 "src/f32-hswish/gen/psimd-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]503 "src/f32-ibilinear/gen/psimd-c4.c",
504 "src/f32-ibilinear/gen/psimd-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]505 "src/f32-igemm/gen/1x8-minmax-psimd-loadsplat.c",
506 "src/f32-igemm/gen/1x8-minmax-psimd-splat.c",
507 "src/f32-igemm/gen/1x8s4-minmax-psimd.c",
508 "src/f32-igemm/gen/4x2c4-minmax-psimd.c",
509 "src/f32-igemm/gen/4x8-minmax-psimd-loadsplat.c",
510 "src/f32-igemm/gen/4x8-minmax-psimd-splat.c",
511 "src/f32-igemm/gen/4x8s4-minmax-psimd.c",
512 "src/f32-igemm/gen/6x8-minmax-psimd-loadsplat.c",
513 "src/f32-igemm/gen/6x8-minmax-psimd-splat.c",
514 "src/f32-igemm/gen/6x8s4-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]515 "src/f32-maxpool/9p8x-minmax-psimd-c4.c",
516 "src/f32-pavgpool/9p8x-minmax-psimd-c4.c",
517 "src/f32-pavgpool/9x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]518 "src/f32-ppmm/gen/4x8-minmax-psimd.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]519 "src/f32-prelu/gen/psimd-2x4.c",
520 "src/f32-prelu/gen/psimd-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]521 "src/f32-rmax/psimd.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]522 "src/f32-vbinary/gen/vadd-minmax-psimd-x4.c",
523 "src/f32-vbinary/gen/vadd-minmax-psimd-x8.c",
524 "src/f32-vbinary/gen/vaddc-minmax-psimd-x4.c",
525 "src/f32-vbinary/gen/vaddc-minmax-psimd-x8.c",
526 "src/f32-vbinary/gen/vdiv-minmax-psimd-x4.c",
527 "src/f32-vbinary/gen/vdiv-minmax-psimd-x8.c",
528 "src/f32-vbinary/gen/vdivc-minmax-psimd-x4.c",
529 "src/f32-vbinary/gen/vdivc-minmax-psimd-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]530 "src/f32-vbinary/gen/vmax-psimd-x4.c",
531 "src/f32-vbinary/gen/vmax-psimd-x8.c",
532 "src/f32-vbinary/gen/vmaxc-psimd-x4.c",
533 "src/f32-vbinary/gen/vmaxc-psimd-x8.c",
534 "src/f32-vbinary/gen/vmin-psimd-x4.c",
535 "src/f32-vbinary/gen/vmin-psimd-x8.c",
536 "src/f32-vbinary/gen/vminc-psimd-x4.c",
537 "src/f32-vbinary/gen/vminc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]538 "src/f32-vbinary/gen/vmul-minmax-psimd-x4.c",
539 "src/f32-vbinary/gen/vmul-minmax-psimd-x8.c",
540 "src/f32-vbinary/gen/vmulc-minmax-psimd-x4.c",
541 "src/f32-vbinary/gen/vmulc-minmax-psimd-x8.c",
542 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x4.c",
543 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]544 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x4.c",
545 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]546 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x4.c",
547 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]548 "src/f32-vbinary/gen/vsqrdiff-psimd-x4.c",
549 "src/f32-vbinary/gen/vsqrdiff-psimd-x8.c",
550 "src/f32-vbinary/gen/vsqrdiffc-psimd-x4.c",
551 "src/f32-vbinary/gen/vsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]552 "src/f32-vbinary/gen/vsub-minmax-psimd-x4.c",
553 "src/f32-vbinary/gen/vsub-minmax-psimd-x8.c",
554 "src/f32-vbinary/gen/vsubc-minmax-psimd-x4.c",
555 "src/f32-vbinary/gen/vsubc-minmax-psimd-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]556 "src/f32-vmulcaddc/gen/c4-minmax-psimd-2x.c",
557 "src/f32-vmulcaddc/gen/c8-minmax-psimd-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]558 "src/f32-vunary/gen/vabs-psimd-x4.c",
559 "src/f32-vunary/gen/vabs-psimd-x8.c",
560 "src/f32-vunary/gen/vneg-psimd-x4.c",
561 "src/f32-vunary/gen/vneg-psimd-x8.c",
562 "src/f32-vunary/gen/vsqr-psimd-x4.c",
563 "src/f32-vunary/gen/vsqr-psimd-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]564 "src/x32-fill/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]565 "src/x32-packx/x4-psimd.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]566 "src/x32-pad/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]567 "src/x32-unpool/psimd.c",
568 "src/x32-zip/x2-psimd.c",
569 "src/x32-zip/x3-psimd.c",
570 "src/x32-zip/x4-psimd.c",
571 "src/x32-zip/xm-psimd.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]572 "src/requantization/precise-psimd.c",
573 "src/requantization/fp32-psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]574]
575
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]576PSIMD_ACCMATH_UKERNELS = [
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]577 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x4.c",
578 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8.c",
579 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8-acc2.c",
580 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12.c",
581 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc2.c",
582 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc3.c",
583 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16.c",
584 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc2.c",
585 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc4.c",
586 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20.c",
587 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc2.c",
588 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]589 "src/f32-sigmoid/gen/psimd-p5-div-x4.c",
590 "src/f32-sigmoid/gen/psimd-p5-div-x8.c",
591 "src/f32-sigmoid/gen/psimd-p5-div-x12.c",
592 "src/f32-sigmoid/gen/psimd-p5-div-x16.c",
593 "src/f32-sigmoid/gen/psimd-p5-div-x20.c",
594 "src/f32-sigmoid/gen/psimd-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame^]595 "src/f32-vrnd/gen/vrndne-psimd-x4.c",
596 "src/f32-vrnd/gen/vrndne-psimd-x8.c",
597 "src/f32-vrnd/gen/vrndz-psimd-x4.c",
598 "src/f32-vrnd/gen/vrndz-psimd-x8.c",
599 "src/f32-vrnd/gen/vrndu-psimd-x4.c",
600 "src/f32-vrnd/gen/vrndu-psimd-x8.c",
601 "src/f32-vrnd/gen/vrndd-psimd-x4.c",
602 "src/f32-vrnd/gen/vrndd-psimd-x8.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]603 "src/math/roundne-psimd-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]604 "src/math/roundd-psimd-addsub.c",
605 "src/math/roundu-psimd-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]606 "src/math/roundz-psimd-addsub.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]607 "src/math/sigmoid-psimd-p5-div.c",
608]
609
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]610# ISA-specific micro-kernels
611NEON_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]612 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
613 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]614 "src/f32-clamp/gen/neon-x4.c",
615 "src/f32-clamp/gen/neon-x8.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]616 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
617 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]618 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
619 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]620 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
621 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]622 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
623 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]624 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
625 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
626 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
627 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]628 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
629 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
630 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
631 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]632 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
633 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
634 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
635 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]636 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]637 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
638 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]639 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
640 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
641 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
642 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
643 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
644 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
645 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
646 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
647 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
648 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
649 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
650 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
651 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
652 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
653 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
654 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
655 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
656 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
657 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
658 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
659 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
660 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
661 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
662 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
663 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
664 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
665 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
666 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
667 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
668 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
669 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]670 "src/f32-hswish/gen/neon-x4.c",
671 "src/f32-hswish/gen/neon-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]672 "src/f32-ibilinear/gen/neon-c4.c",
673 "src/f32-ibilinear/gen/neon-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]674 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
675 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
676 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
677 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
678 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
679 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
680 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
681 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
682 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
683 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
684 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
685 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
686 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
687 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
688 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
689 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]690 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
691 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
692 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]693 "src/f32-ppmm/gen/4x8-minmax-neon.c",
694 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]695 "src/f32-prelu/gen/neon-2x4.c",
696 "src/f32-prelu/gen/neon-2x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]697 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
698 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
699 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
700 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
701 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
702 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
703 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
704 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
705 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
706 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
707 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
708 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
709 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
710 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
711 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
712 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
713 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
714 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
715 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
716 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
717 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
718 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
719 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
720 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]721 "src/f32-rmax/neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]722 "src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]723 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c",
724 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x8.c",
725 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x12.c",
726 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x16.c",
727 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x20.c",
728 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x24.c",
729 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x4.c",
730 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x8.c",
731 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x12.c",
732 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x16.c",
733 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x20.c",
734 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x24.c",
735 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x4.c",
736 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x8.c",
737 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x12.c",
738 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x16.c",
739 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x20.c",
740 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x24.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]741 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
742 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
743 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
744 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]745 "src/f32-vbinary/gen/vmax-neon-x4.c",
746 "src/f32-vbinary/gen/vmax-neon-x8.c",
747 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
748 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
749 "src/f32-vbinary/gen/vmin-neon-x4.c",
750 "src/f32-vbinary/gen/vmin-neon-x8.c",
751 "src/f32-vbinary/gen/vminc-neon-x4.c",
752 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]753 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
754 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
755 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
756 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]757 "src/f32-vbinary/gen/vrsqrdiffc-neon-x4.c",
758 "src/f32-vbinary/gen/vrsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]759 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
760 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]761 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
762 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
763 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
764 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]765 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
766 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
767 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
768 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]769 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
770 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame^]771 "src/f32-vrnd/gen/vrndne-neon-x4.c",
772 "src/f32-vrnd/gen/vrndne-neon-x8.c",
773 "src/f32-vrnd/gen/vrndz-neon-x4.c",
774 "src/f32-vrnd/gen/vrndz-neon-x8.c",
775 "src/f32-vrnd/gen/vrndu-neon-x4.c",
776 "src/f32-vrnd/gen/vrndu-neon-x8.c",
777 "src/f32-vrnd/gen/vrndd-neon-x4.c",
778 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]779 "src/f32-vunary/gen/vabs-neon-x4.c",
780 "src/f32-vunary/gen/vabs-neon-x8.c",
781 "src/f32-vunary/gen/vneg-neon-x4.c",
782 "src/f32-vunary/gen/vneg-neon-x8.c",
783 "src/f32-vunary/gen/vsqr-neon-x4.c",
784 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]785 "src/q8-avgpool/9p8x-minmax-neon-c8.c",
786 "src/q8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]787 "src/q8-dwconv/up8x9-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]788 "src/q8-gavgpool/7p7x-minmax-neon-c8.c",
789 "src/q8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]790 "src/q8-gemm/4x8-minmax-neon.c",
791 "src/q8-gemm/8x8-minmax-neon.c",
792 "src/q8-igemm/4x8-minmax-neon.c",
793 "src/q8-igemm/8x8-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]794 "src/q8-vadd/minmax-neon.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]795 "src/u8-clamp/neon-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]796 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]797 "src/u8-rmax/neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]798 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]799 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]800 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]801 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]802 "src/x32-zip/x2-neon.c",
803 "src/x32-zip/x3-neon.c",
804 "src/x32-zip/x4-neon.c",
805 "src/x32-zip/xm-neon.c",
806 "src/x8-zip/x2-neon.c",
807 "src/x8-zip/x3-neon.c",
808 "src/x8-zip/x4-neon.c",
809 "src/x8-zip/xm-neon.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]810 "src/math/roundne-neon-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]811 "src/math/roundd-neon-addsub.c",
812 "src/math/roundd-neon-cvt.c",
813 "src/math/roundu-neon-addsub.c",
814 "src/math/roundu-neon-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]815 "src/math/roundz-neon-addsub.c",
816 "src/math/roundz-neon-cvt.c",
Marat Dukhan68b3b452020-01-02 10:11:15 -0800[diff] [blame]817 "src/math/sigmoid-neon-frac-p9-p10-nr1recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]818 "src/math/sigmoid-neon-rr1-lut2048-p1-nr2recps.c",
819 "src/math/sigmoid-neon-rr1-lut64-p2-nr2recps.c",
820 "src/math/sigmoid-neon-rr1-p5-nr2recps.c",
821 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
822 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
823 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]824 "src/requantization/precise-neon.c",
825 "src/requantization/fp32-neon.c",
826 "src/requantization/q31-neon.c",
827 "src/requantization/gemmlowp-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]828]
829
830NEONFMA_UKERNELS = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]831 "src/f32-ibilinear/gen/neonfma-c4.c",
832 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]833 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
834 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
835 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
836 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
837 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
838 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
839 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
840 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
841 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]842 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
843 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
844 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
845 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]846 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
847 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
848 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
849 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]850 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
851 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
852 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
853 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]854 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
855 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
856 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
857 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
858 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
859 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
860 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
861 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
862 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
863 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
864 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
865 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
866 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
867 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
868 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
869 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
870 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
871 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]872 "src/f32-hswish/gen/neonfma-x4.c",
873 "src/f32-hswish/gen/neonfma-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]874 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
875 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]876 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
877 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
878 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
879 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
880 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
881 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
882 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
883 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
884 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
885 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
886 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
887 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
888 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
889 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
890 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
891 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
892 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
893 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
894 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
895 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
896 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
897 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
898 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
899 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]900 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c",
901 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c",
902 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c",
903 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x16.c",
904 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x20.c",
905 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x24.c",
906 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x4.c",
907 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x8.c",
908 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x12.c",
909 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x16.c",
910 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x20.c",
911 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x24.c",
912 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x4.c",
913 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x8.c",
914 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x12.c",
915 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x16.c",
916 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x20.c",
917 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x24.c",
918 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x4.c",
919 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x8.c",
920 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x12.c",
921 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x16.c",
922 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x20.c",
923 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x24.c",
924 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
925 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
926 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
927 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
928 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
929 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
930 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x4.c",
931 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x8.c",
932 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x12.c",
933 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x16.c",
934 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x20.c",
935 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x24.c",
936 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x4.c",
937 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x8.c",
938 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x12.c",
939 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x16.c",
940 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x20.c",
941 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x24.c",
942 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
943 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
944 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
945 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
946 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
947 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
948 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x4.c",
949 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x8.c",
950 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x12.c",
951 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x16.c",
952 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x20.c",
953 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]954 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
955 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhan797a8fe2019-11-14 20:21:57 -0800[diff] [blame]956 "src/math/exp-neonfma-lut64-p2.c",
957 "src/math/exp-neonfma-p5.c",
Marat Dukhan189ae802019-11-26 11:28:44 -0800[diff] [blame]958 "src/math/expminus-neonfma-lut2048-p1.c",
959 "src/math/expminus-neonfma-lut64-p2.c",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]960 "src/math/expminus-neonfma-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]961 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
962 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
963 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
964 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
965 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
966 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
967 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
968 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
969 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
970 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
971 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
972 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
973 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
974 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
975 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
976 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
977 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
978 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]979]
980
981AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]982 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
983 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
984 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
985 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
986 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
987 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]988 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
989 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
990 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
991 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
992 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
993 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
994 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
995 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
996 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
997 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
998 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
999 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
1000 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
1001 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1002 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1003 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
1004 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1005 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1006 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1007 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1008 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
1009 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1010 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
1011 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1012 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
1013 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1014 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
1015 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1016 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
1017 "src/f32-dwconv-chw/3x3p1-neonfma.c",
1018 "src/f32-dwconv-chw/5x5p2-neonfma.c",
1019 "src/f32-dwconv-chw/3x3s2p1-neonfma.c",
1020 "src/f32-dwconv-chw/5x5s2p2-neonfma.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1021 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x4.c",
1022 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x8.c",
1023 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x12.c",
1024 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x16.c",
1025 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x20.c",
1026 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x24.c",
1027 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x4.c",
1028 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x8.c",
1029 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x12.c",
1030 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x16.c",
1031 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x20.c",
1032 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x24.c",
1033 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x4.c",
1034 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x8.c",
1035 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x12.c",
1036 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x16.c",
1037 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x20.c",
1038 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x24.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1039 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1040 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
1041 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
1042 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1043 "src/f32-spmm/gen/16x1-minmax-neonfma-unroll2.c",
1044 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1045 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
1046 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
1047 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1048 "src/f32-spmm/gen/4x1-minmax-neonfma-unroll2.c",
1049 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1050 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
1051 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
1052 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1053 "src/f32-spmm/gen/8x1-minmax-neonfma-unroll2.c",
1054 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1055 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
1056 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1057 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
1058 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
1059 "src/math/sigmoid-neonfma-rr1-p5-div.c",
1060 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
1061 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
1062 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1063]
1064
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1065NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame^]1066 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
1067 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
1068 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
1069 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
1070 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
1071 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
1072 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
1073 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1074 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1075 "src/math/roundd-neonv8.c",
1076 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1077 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1078]
1079
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1080AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1081 "src/f16-clamp/gen/neonfp16arith-x16.c",
1082 "src/f16-clamp/gen/neonfp16arith-x8.c",
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]1083 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
1084 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
1085 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
1086 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
1087 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
1088 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
1089 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
1090 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
1091 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
1092 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
1093 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
1094 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]1095 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
1096 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1097 "src/f16-hswish/gen/neonfp16arith-x16.c",
1098 "src/f16-hswish/gen/neonfp16arith-x8.c",
1099 "src/f16-prelu/gen/neonfp16arith-2x16.c",
1100 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]1101 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
1102 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
1103 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
1104 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
1105 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
1106 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
1107 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
1108 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
1109 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
1110 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
1111 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
1112 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
1113 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
1114 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
1115 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
1116 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
1117 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
1118 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
1119 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
1120 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
1121 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
1122 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
1123 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
1124 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
1125 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
1126 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
1127 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
1128 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]1129 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
1130 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]1131 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1132 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1133 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1134 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
1135 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
1136 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
1137 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
1138 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]1139 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1140 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1141 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1142 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]1143 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1144 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1145 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1146 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
1147 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
1148 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
1149 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
1150 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
1151 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1152 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1153 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1154 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1155 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
1156 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-unroll2.c",
1157 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
1158 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-unroll2.c",
1159 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
1160 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-unroll2.c",
1161 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
1162 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-unroll2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1163]
1164
1165SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1166 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
1167 "src/f32-avgpool/9x-minmax-sse-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1168 "src/f32-clamp/gen/sse-x4.c",
1169 "src/f32-clamp/gen/sse-x8.c",
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]1170 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
1171 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1172 "src/f32-dwconv-chw/3x3p1-sse.c",
1173 "src/f32-dwconv-chw/3x3s2p1-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1174 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
1175 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
1176 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
1177 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
1178 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
1179 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
1180 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
1181 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
1182 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
1183 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
1184 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
1185 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1186 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1187 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
1188 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1189 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
1190 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
1191 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
1192 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
1193 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
1194 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
1195 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
1196 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
1197 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
1198 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
1199 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
1200 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
1201 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1202 "src/f32-hswish/gen/sse-x4.c",
1203 "src/f32-hswish/gen/sse-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1204 "src/f32-ibilinear/gen/sse-c4.c",
1205 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1206 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
1207 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
1208 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
1209 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
1210 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
1211 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
1212 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1213 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
1214 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
1215 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1216 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1217 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1218 "src/f32-spmm/gen/4x1-minmax-sse.c",
1219 "src/f32-spmm/gen/8x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1220 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
1221 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
1222 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
1223 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
1224 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
1225 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
1226 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
1227 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1228 "src/f32-vbinary/gen/vmax-sse-x4.c",
1229 "src/f32-vbinary/gen/vmax-sse-x8.c",
1230 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
1231 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
1232 "src/f32-vbinary/gen/vmin-sse-x4.c",
1233 "src/f32-vbinary/gen/vmin-sse-x8.c",
1234 "src/f32-vbinary/gen/vminc-sse-x4.c",
1235 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1236 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
1237 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
1238 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
1239 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
1240 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
1241 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1242 "src/f32-vbinary/gen/vrsqrdiffc-sse-x4.c",
1243 "src/f32-vbinary/gen/vrsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1244 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
1245 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1246 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
1247 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
1248 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
1249 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1250 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
1251 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
1252 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
1253 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1254 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
1255 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1256 "src/f32-vunary/gen/vabs-sse-x4.c",
1257 "src/f32-vunary/gen/vabs-sse-x8.c",
1258 "src/f32-vunary/gen/vneg-sse-x4.c",
1259 "src/f32-vunary/gen/vneg-sse-x8.c",
1260 "src/f32-vunary/gen/vsqr-sse-x4.c",
1261 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1262 "src/x32-fill/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1263 "src/x32-packx/x4-sse.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1264 "src/x32-pad/sse.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1265 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1266 "src/math/roundd-sse-addsub.c",
1267 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1268 "src/math/roundz-sse-addsub.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1269]
1270
1271SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]1272 "src/f32-argmaxpool/9p8x-sse2-c4.c",
1273 "src/f32-argmaxpool/4x-sse2-c4.c",
1274 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1275 "src/f32-prelu/gen/sse2-2x4.c",
1276 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]1277 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
1278 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
1279 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
1280 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
1281 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
1282 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
1283 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
1284 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
1285 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
1286 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
1287 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
1288 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1289 "src/f32-sigmoid/gen/sse2-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1290 "src/f32-sigmoid/gen/sse2-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1291 "src/f32-sigmoid/gen/sse2-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1292 "src/f32-sigmoid/gen/sse2-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1293 "src/f32-sigmoid/gen/sse2-p5-div-x20.c",
1294 "src/f32-sigmoid/gen/sse2-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame^]1295 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
1296 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
1297 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
1298 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
1299 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
1300 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
1301 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
1302 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1303 "src/q8-avgpool/9p8x-minmax-sse2-c8.c",
1304 "src/q8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1305 "src/q8-igemm/4x4c2-minmax-sse2.c",
1306 "src/q8-dwconv/up8x9-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1307 "src/q8-gavgpool/7p7x-minmax-sse2-c8.c",
1308 "src/q8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1309 "src/q8-gemm/2x4c8-minmax-sse2.c",
1310 "src/q8-gemm/4x4c2-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1311 "src/q8-vadd/minmax-sse2.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1312 "src/u8-clamp/sse2-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1313 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1314 "src/u8-rmax/sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1315 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1316 "src/x32-zip/x2-sse2.c",
1317 "src/x32-zip/x3-sse2.c",
1318 "src/x32-zip/x4-sse2.c",
1319 "src/x32-zip/xm-sse2.c",
1320 "src/x8-zip/x2-sse2.c",
1321 "src/x8-zip/x3-sse2.c",
1322 "src/x8-zip/x4-sse2.c",
1323 "src/x8-zip/xm-sse2.c",
Marat Dukhanffd68402019-11-15 15:19:11 -0800[diff] [blame]1324 "src/math/exp-sse2-p5.c",
1325 "src/math/expminus-sse2-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1326 "src/math/roundne-sse2-cvt.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1327 "src/math/roundd-sse2-cvt.c",
1328 "src/math/roundu-sse2-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1329 "src/math/roundz-sse2-cvt.c",
Marat Dukhan80bafd22019-11-18 10:16:01 -0800[diff] [blame]1330 "src/math/sigmoid-sse2-p5-div.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1331 "src/requantization/precise-sse2.c",
1332 "src/requantization/fp32-sse2.c",
1333 "src/requantization/q31-sse2.c",
1334 "src/requantization/gemmlowp-sse2.c",
1335]
1336
1337SSSE3_UKERNELS = [
1338 "src/requantization/precise-ssse3.c",
1339 "src/requantization/q31-ssse3.c",
1340 "src/requantization/gemmlowp-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1341]
1342
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1343SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1344 "src/f32-prelu/gen/sse41-2x4.c",
1345 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1346 "src/f32-sigmoid/gen/sse41-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1347 "src/f32-sigmoid/gen/sse41-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1348 "src/f32-sigmoid/gen/sse41-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1349 "src/f32-sigmoid/gen/sse41-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1350 "src/f32-sigmoid/gen/sse41-p5-div-x20.c",
1351 "src/f32-sigmoid/gen/sse41-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame^]1352 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
1353 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
1354 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
1355 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
1356 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
1357 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
1358 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
1359 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1360 "src/math/roundne-sse41.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1361 "src/math/roundd-sse41.c",
1362 "src/math/roundu-sse41.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1363 "src/math/roundz-sse41.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1364 "src/requantization/precise-sse4.c",
1365 "src/requantization/q31-sse4.c",
1366 "src/requantization/gemmlowp-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1367]
1368
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1369AVX_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1370 "src/f32-clamp/gen/avx-x8.c",
1371 "src/f32-clamp/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1372 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
1373 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
1374 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
1375 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
1376 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
1377 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
1378 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
1379 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
1380 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
1381 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
1382 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
1383 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
1384 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
1385 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
1386 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
1387 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
1388 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
1389 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
1390 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
1391 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
1392 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
1393 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
1394 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
1395 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
1396 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
1397 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
1398 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
1399 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
1400 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
1401 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1402 "src/f32-hswish/gen/avx-x8.c",
1403 "src/f32-hswish/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1404 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
1405 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
1406 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
1407 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
1408 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
1409 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
1410 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
1411 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
1412 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1413 "src/f32-prelu/gen/avx-2x8.c",
1414 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1415 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1416 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
1417 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
1418 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
1419 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
1420 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
1421 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
1422 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
1423 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1424 "src/f32-vbinary/gen/vmax-avx-x8.c",
1425 "src/f32-vbinary/gen/vmax-avx-x16.c",
1426 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
1427 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
1428 "src/f32-vbinary/gen/vmin-avx-x8.c",
1429 "src/f32-vbinary/gen/vmin-avx-x16.c",
1430 "src/f32-vbinary/gen/vminc-avx-x8.c",
1431 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1432 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
1433 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
1434 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
1435 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
1436 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
1437 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1438 "src/f32-vbinary/gen/vrsqrdiffc-avx-x8.c",
1439 "src/f32-vbinary/gen/vrsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1440 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
1441 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1442 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
1443 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
1444 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
1445 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1446 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
1447 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
1448 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
1449 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1450 "src/f32-vscale/avx-unroll32.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame^]1451 "src/f32-vrnd/gen/vrndne-avx-x8.c",
1452 "src/f32-vrnd/gen/vrndne-avx-x16.c",
1453 "src/f32-vrnd/gen/vrndz-avx-x8.c",
1454 "src/f32-vrnd/gen/vrndz-avx-x16.c",
1455 "src/f32-vrnd/gen/vrndu-avx-x8.c",
1456 "src/f32-vrnd/gen/vrndu-avx-x16.c",
1457 "src/f32-vrnd/gen/vrndd-avx-x8.c",
1458 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1459 "src/f32-vunary/gen/vabs-avx-x8.c",
1460 "src/f32-vunary/gen/vabs-avx-x16.c",
1461 "src/f32-vunary/gen/vneg-avx-x8.c",
1462 "src/f32-vunary/gen/vneg-avx-x16.c",
1463 "src/f32-vunary/gen/vsqr-avx-x8.c",
1464 "src/f32-vunary/gen/vsqr-avx-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1465]
1466
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1467FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1468 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
1469 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
1470 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
1471 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
1472 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
1473 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
1474 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
1475 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
1476 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
1477 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
1478 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
1479 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
1480 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
1481 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
1482 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
1483 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
1484 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
1485 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
1486 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
1487 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
1488 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
1489 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
1490 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
1491 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
1492 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
1493 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
1494 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
1495 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
1496 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
1497 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
1498 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
1499 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
1500 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
1501 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
1502 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
1503 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
1504 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
1505 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
1506 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
1507 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1508 "src/f32-hswish/gen/fma3-x8.c",
1509 "src/f32-hswish/gen/fma3-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1510 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
1511 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
1512 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
1513 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
1514 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
1515 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
1516 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
1517 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
1518 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
1519 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
1520 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
1521 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
1522 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
1523 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1524]
1525
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1526AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1527 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
1528 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
1529 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
1530 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
1531 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
1532 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
1533 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
1534 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
1535 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
1536 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
1537 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
1538 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
1539 "src/f32-raddextexp/gen/avx2-p5-x64.c",
1540 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
1541 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
1542 "src/f32-raddextexp/gen/avx2-p5-x72.c",
1543 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
1544 "src/f32-raddextexp/gen/avx2-p5-x80.c",
1545 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
1546 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
1547 "src/f32-raddextexp/gen/avx2-p5-x96.c",
1548 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
1549 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
1550 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
1551 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
1552 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
1553 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
1554 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
1555 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
1556 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
1557 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
1558 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
1559 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
1560 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
1561 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
1562 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Marat Dukhanfa0a4322020-01-06 16:14:29 -0800[diff] [blame]1563 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x8.c",
1564 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x16.c",
1565 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x24.c",
1566 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x32.c",
1567 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x40.c",
1568 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x48.c",
1569 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x56.c",
1570 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x64.c",
1571 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x72.c",
1572 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x80.c",
1573 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x8.c",
1574 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x16.c",
1575 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x24.c",
1576 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x32.c",
1577 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x40.c",
1578 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x48.c",
1579 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x56.c",
1580 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x64.c",
1581 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x72.c",
1582 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x80.c",
1583 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x8.c",
1584 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x16.c",
1585 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x24.c",
1586 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x32.c",
1587 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x40.c",
1588 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x48.c",
1589 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x56.c",
1590 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x64.c",
1591 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x72.c",
1592 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1593 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
1594 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
1595 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
1596 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
1597 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
1598 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
1599 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
1600 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
1601 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
1602 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
1603 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
1604 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
1605 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
1606 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
1607 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
1608 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
1609 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
1610 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
1611 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
1612 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
1613 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
1614 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
1615 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
1616 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1617 "src/math/exp-avx2-p5.c",
1618 "src/math/exp-avx2-perm-p3.c",
1619 "src/math/exp-avx2-perm-p4.c",
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]1620 "src/math/expminus-avx2-p5.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1621 "src/math/extexp-avx2-p5.c",
Marat Dukhan72416002020-01-05 21:53:19 -0800[diff] [blame]1622 "src/math/sigmoid-avx2-rr2-p5-div.c",
1623 "src/math/sigmoid-avx2-rr1-p5-div.c",
1624 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
1625 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
1626 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
1627 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1628]
1629
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1630AVX512F_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1631 "src/f32-clamp/gen/avx512f-x16.c",
1632 "src/f32-clamp/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1633 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
1634 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
1635 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
1636 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
1637 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
1638 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
1639 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
1640 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
1641 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
1642 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
1643 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
1644 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
1645 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
1646 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
1647 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
1648 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
1649 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
1650 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
1651 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
1652 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
1653 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
1654 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
1655 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
1656 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1657 "src/f32-hswish/gen/avx512f-x16.c",
1658 "src/f32-hswish/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1659 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
1660 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
1661 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
1662 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
1663 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
1664 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1665 "src/f32-prelu/gen/avx512f-2x16.c",
1666 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1667 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
1668 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1669 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1670 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
1671 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1672 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
1673 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1674 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1675 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
1676 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1677 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1678 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
1679 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
1680 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
1681 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
1682 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
1683 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
1684 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
1685 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
1686 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
1687 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
1688 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
1689 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
1690 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
1691 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
1692 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1693 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1694 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
1695 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1696 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
1697 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1698 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1699 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
1700 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1701 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1702 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1703 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1704 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
1705 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
1706 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
1707 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
1708 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
1709 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
1710 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
1711 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1712 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
1713 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
1714 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
1715 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
1716 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
1717 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
1718 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
1719 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1720 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
1721 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
1722 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
1723 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
1724 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
1725 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1726 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x16.c",
1727 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1728 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
1729 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1730 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
1731 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
1732 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
1733 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1734 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
1735 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
1736 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
1737 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1738 "src/f32-vscale/avx512f-unroll64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1739 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
1740 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
1741 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
1742 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
1743 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
1744 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
1745 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
1746 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
1747 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
1748 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
1749 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
1750 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
1751 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
1752 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
1753 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
1754 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
1755 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
1756 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
1757 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
1758 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
1759 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
1760 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
1761 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
1762 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame^]1763 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
1764 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
1765 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
1766 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
1767 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
1768 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
1769 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
1770 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1771 "src/f32-vunary/gen/vabs-avx512f-x16.c",
1772 "src/f32-vunary/gen/vabs-avx512f-x32.c",
1773 "src/f32-vunary/gen/vneg-avx512f-x16.c",
1774 "src/f32-vunary/gen/vneg-avx512f-x32.c",
1775 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
1776 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1777 "src/math/exp-avx512f-p5-scalef.c",
1778 "src/math/exp-avx512f-p5.c",
1779 "src/math/exp-avx512f-perm-p3.c",
Marat Dukhanfeb49232019-10-28 11:03:31 -0700[diff] [blame]1780 "src/math/exp-avx512f-perm2-p2.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1781 "src/math/extexp-avx512f-p5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1782]
1783
1784AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]1785 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]1786 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1787 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1788 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
1789 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1790 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1791 "src/f32-gemm/4x8-minmax-aarch32-neon-ld64.S",
1792 "src/f32-igemm/4x8-minmax-aarch32-neon-ld64.S",
1793 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1794 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1795 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1796 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1797]
1798
1799AARCH64_ASM_UKERNELS = [
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1800 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1801 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
1802 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1803 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1804 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
1805 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1806 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
1807 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
1808 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1809 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1810 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1811 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1812 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1813 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1814 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
1815 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]1816 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1817 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
1818 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
1819 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
1820 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
1821 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
1822 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
1823 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
1824 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
1825 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
1826 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
1827 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
1828 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
1829 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
1830 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
1831 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
1832 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
1833 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
1834 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
1835 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ios.S",
1836 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
1837 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]1838 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1839 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
1840 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1841 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1842 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1843 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
1844 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1845 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
1846 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1847 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1848 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
1849 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
1850 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1851 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1852 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1853 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
1854 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
1855 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1856 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1857 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ios.S",
1858 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
1859 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
1860 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
1861 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
1862 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
1863 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
1864 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
1865 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
1866 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
1867 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
1868 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
1869 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
1870 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
1871 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
1872 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
1873 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
1874 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
1875 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
1876 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ios.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1877]
1878
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1879INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1880 "src/requantization/gemmlowp-requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1881 "src/xnnpack/argmaxpool.h",
1882 "src/xnnpack/avgpool.h",
1883 "src/xnnpack/clamp.h",
1884 "src/xnnpack/common.h",
1885 "src/xnnpack/conv.h",
1886 "src/xnnpack/dwconv.h",
1887 "src/xnnpack/gavgpool.h",
1888 "src/xnnpack/gemm.h",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1889 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1890 "src/xnnpack/hswish.h",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1891 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1892 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -0800[diff] [blame]1893 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1894 "src/xnnpack/lut.h",
1895 "src/xnnpack/math.h",
1896 "src/xnnpack/maxpool.h",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]1897 "src/xnnpack/memory.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1898 "src/xnnpack/packx.h",
1899 "src/xnnpack/pad.h",
1900 "src/xnnpack/params.h",
1901 "src/xnnpack/pavgpool.h",
1902 "src/xnnpack/ppmm.h",
1903 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]1904 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]1905 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]1906 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1907 "src/xnnpack/rmax.h",
1908 "src/xnnpack/scalar-utils.h",
1909 "src/xnnpack/spmm.h",
1910 "src/xnnpack/unpool.h",
1911 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]1912 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1913 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1914 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]1915 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]1916 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]1917 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1918 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1919]
1920
1921INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1922 "include/xnnpack.h",
1923 "src/xnnpack/allocator.h",
1924 "src/xnnpack/compute.h",
1925 "src/xnnpack/im2col.h",
1926 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1927 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]1928 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1929 "src/xnnpack/operator.h",
1930 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]1931 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1932 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1933 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -0800[diff] [blame]1934 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1935]
1936
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1937ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1938 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1939]
1940
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1941MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]1942 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1943 "include/xnnpack.h",
1944]
1945
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1946MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1947 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]1948 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1949 "src/xnnpack/requantization.h",
1950 "include/xnnpack.h",
1951]
1952
1953OPERATOR_TEST_PARAMS_HDRS = [
1954 "src/xnnpack/params.h",
1955 "src/xnnpack/common.h",
1956]
1957
1958WEIGHTS_PACK_HDRS = [
1959 "src/xnnpack/pack.h",
1960 "src/xnnpack/operator.h",
1961 "src/xnnpack/compute.h",
1962]
1963
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]1964LOGGING_COPTS = select({
1965 # No logging in optimized mode
1966 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
1967 # Full logging in debug mode
1968 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
1969 # Error-only logging in default (fastbuild) mode
1970 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
1971})
1972
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]1973LOGGING_SRCS = select({
1974 # No logging in optimized mode
1975 ":optimized_build": [],
1976 "//conditions:default": [
1977 "src/operator-strings.c",
1978 "src/subgraph-strings.c",
1979 ],
1980})
1981
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]1982LOGGING_HDRS = [
1983 "src/xnnpack/log.h",
1984]
1985
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1986xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]1987 name = "tables",
1988 srcs = TABLE_SRCS,
1989 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]1990 gcc_copts = xnnpack_gcc_std_copts(),
1991 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]1992)
1993
1994xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1995 name = "scalar_ukernels",
1996 srcs = SCALAR_UKERNELS,
1997 hdrs = INTERNAL_HDRS,
1998 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]1999 gcc_copts = xnnpack_gcc_std_copts(),
2000 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2001 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2002 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2003 "@FP16",
2004 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2005 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2006 ],
2007)
2008
2009xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2010 name = "scalar_ukernels_test_mode",
2011 srcs = SCALAR_UKERNELS,
2012 hdrs = INTERNAL_HDRS,
2013 aarch32_copts = ["-marm"],
2014 copts = [
2015 "-UNDEBUG",
2016 "-DXNN_TEST_MODE=1",
2017 ],
2018 gcc_copts = xnnpack_gcc_std_copts(),
2019 msvc_copts = xnnpack_msvc_std_copts(),
2020 deps = [
2021 ":tables",
2022 "@FP16",
2023 "@FXdiv",
2024 "@pthreadpool",
2025 ],
2026)
2027
2028xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2029 name = "wasm_ukernels",
2030 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2031 gcc_copts = xnnpack_gcc_std_copts(),
2032 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2033 wasm_srcs = WASM_UKERNELS,
2034 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2035 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2036 "@FP16",
2037 "@FXdiv",
2038 "@pthreadpool",
2039 ],
2040)
2041
2042xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2043 name = "wasm_ukernels_test_mode",
2044 hdrs = INTERNAL_HDRS,
2045 copts = [
2046 "-UNDEBUG",
2047 "-DXNN_TEST_MODE=1",
2048 ],
2049 gcc_copts = xnnpack_gcc_std_copts(),
2050 msvc_copts = xnnpack_msvc_std_copts(),
2051 wasm_srcs = WASM_UKERNELS,
2052 deps = [
2053 ":tables",
2054 "@FP16",
2055 "@FXdiv",
2056 "@pthreadpool",
2057 ],
2058)
2059
2060xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2061 name = "psimd_fastmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2062 hdrs = INTERNAL_HDRS,
2063 aarch32_copts = [
2064 "-marm",
2065 "-mfpu=neon",
2066 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2067 gcc_copts = xnnpack_gcc_std_copts(),
2068 gcc_x86_copts = ["-msse2"],
2069 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2070 optimized_copts = [
2071 "-O3",
2072 "-ffast-math",
2073 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2074 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2075 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2076 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2077 "@FP16",
2078 "@psimd",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2079 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2080 ],
2081)
2082
2083xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2084 name = "psimd_fastmath_ukernels_test_mode",
2085 hdrs = INTERNAL_HDRS,
2086 aarch32_copts = [
2087 "-marm",
2088 "-mfpu=neon",
2089 ],
2090 copts = [
2091 "-UNDEBUG",
2092 "-DXNN_TEST_MODE=1",
2093 ],
2094 gcc_copts = xnnpack_gcc_std_copts(),
2095 gcc_x86_copts = ["-msse2"],
2096 msvc_copts = xnnpack_msvc_std_copts(),
2097 optimized_copts = [
2098 "-O3",
2099 "-ffast-math",
2100 ],
2101 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
2102 deps = [
2103 ":tables",
2104 "@FP16",
2105 "@psimd",
2106 "@pthreadpool",
2107 ],
2108)
2109
2110xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2111 name = "psimd_accmath_ukernels",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2112 hdrs = INTERNAL_HDRS,
2113 aarch32_copts = [
2114 "-marm",
2115 "-mfpu=neon",
2116 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2117 gcc_copts = xnnpack_gcc_std_copts(),
2118 gcc_x86_copts = ["-msse2"],
2119 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2120 optimized_copts = [
2121 "-O3",
2122 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2123 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2124 deps = [
2125 ":tables",
2126 "@FP16",
2127 "@psimd",
2128 "@pthreadpool",
2129 ],
2130)
2131
2132xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2133 name = "psimd_accmath_ukernels_test_mode",
2134 hdrs = INTERNAL_HDRS,
2135 aarch32_copts = [
2136 "-marm",
2137 "-mfpu=neon",
2138 ],
2139 copts = [
2140 "-UNDEBUG",
2141 "-DXNN_TEST_MODE=1",
2142 ],
2143 gcc_copts = xnnpack_gcc_std_copts(),
2144 gcc_x86_copts = ["-msse2"],
2145 msvc_copts = xnnpack_msvc_std_copts(),
2146 optimized_copts = [
2147 "-O3",
2148 ],
2149 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
2150 deps = [
2151 ":tables",
2152 "@FP16",
2153 "@psimd",
2154 "@pthreadpool",
2155 ],
2156)
2157
2158xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2159 name = "neon_ukernels",
2160 hdrs = INTERNAL_HDRS,
2161 aarch32_copts = [
2162 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2163 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2164 "-mfpu=neon",
2165 ],
2166 aarch32_srcs = NEON_UKERNELS,
2167 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2168 gcc_copts = xnnpack_gcc_std_copts(),
2169 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2170 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2171 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2172 "@FP16",
2173 "@pthreadpool",
2174 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2175)
2176
2177xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2178 name = "neon_ukernels_test_mode",
2179 hdrs = INTERNAL_HDRS,
2180 aarch32_copts = [
2181 "-marm",
2182 "-march=armv7-a",
2183 "-mfpu=neon",
2184 ],
2185 aarch32_srcs = NEON_UKERNELS,
2186 aarch64_srcs = NEON_UKERNELS,
2187 copts = [
2188 "-UNDEBUG",
2189 "-DXNN_TEST_MODE=1",
2190 ],
2191 gcc_copts = xnnpack_gcc_std_copts(),
2192 msvc_copts = xnnpack_msvc_std_copts(),
2193 deps = [
2194 ":tables",
2195 "@FP16",
2196 "@pthreadpool",
2197 ],
2198)
2199
2200xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2201 name = "neonfma_ukernels",
2202 hdrs = INTERNAL_HDRS,
2203 aarch32_copts = [
2204 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2205 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2206 "-mfpu=neon-vfpv4",
2207 ],
2208 aarch32_srcs = NEONFMA_UKERNELS,
2209 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2210 gcc_copts = xnnpack_gcc_std_copts(),
2211 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2212 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2213 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2214 "@FP16",
2215 "@pthreadpool",
2216 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2217)
2218
2219xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2220 name = "neonfma_ukernels_test_mode",
2221 hdrs = INTERNAL_HDRS,
2222 aarch32_copts = [
2223 "-marm",
2224 "-march=armv7-a",
2225 "-mfpu=neon-vfpv4",
2226 ],
2227 aarch32_srcs = NEONFMA_UKERNELS,
2228 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
2229 copts = [
2230 "-UNDEBUG",
2231 "-DXNN_TEST_MODE=1",
2232 ],
2233 gcc_copts = xnnpack_gcc_std_copts(),
2234 msvc_copts = xnnpack_msvc_std_copts(),
2235 deps = [
2236 ":tables",
2237 "@FP16",
2238 "@pthreadpool",
2239 ],
2240)
2241
2242xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2243 name = "neonv8_ukernels",
2244 hdrs = INTERNAL_HDRS,
2245 aarch32_copts = [
2246 "-marm",
2247 "-march=armv8-a",
2248 "-mfpu=neon-fp-armv8",
2249 ],
2250 aarch32_srcs = NEONV8_UKERNELS,
2251 aarch64_srcs = NEONV8_UKERNELS,
2252 gcc_copts = xnnpack_gcc_std_copts(),
2253 msvc_copts = xnnpack_msvc_std_copts(),
2254 deps = [
2255 ":tables",
2256 "@FP16",
2257 "@pthreadpool",
2258 ],
2259)
2260
2261xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2262 name = "neonv8_ukernels_test_mode",
2263 hdrs = INTERNAL_HDRS,
2264 aarch32_copts = [
2265 "-marm",
2266 "-march=armv8-a",
2267 "-mfpu=neon-fp-armv8",
2268 ],
2269 aarch32_srcs = NEONV8_UKERNELS,
2270 aarch64_srcs = NEONV8_UKERNELS,
2271 copts = [
2272 "-UNDEBUG",
2273 "-DXNN_TEST_MODE=1",
2274 ],
2275 gcc_copts = xnnpack_gcc_std_copts(),
2276 msvc_copts = xnnpack_msvc_std_copts(),
2277 deps = [
2278 ":tables",
2279 "@FP16",
2280 "@pthreadpool",
2281 ],
2282)
2283
2284xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2285 name = "neonfp16arith_ukernels",
2286 hdrs = INTERNAL_HDRS,
2287 aarch64_copts = ["-march=armv8.2-a+fp16"],
2288 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2289 gcc_copts = xnnpack_gcc_std_copts(),
2290 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2291 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2292 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2293 "@FP16",
2294 "@pthreadpool",
2295 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2296)
2297
2298xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2299 name = "neonfp16arith_ukernels_test_mode",
2300 hdrs = INTERNAL_HDRS,
2301 aarch64_copts = ["-march=armv8.2-a+fp16"],
2302 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
2303 copts = [
2304 "-UNDEBUG",
2305 "-DXNN_TEST_MODE=1",
2306 ],
2307 gcc_copts = xnnpack_gcc_std_copts(),
2308 msvc_copts = xnnpack_msvc_std_copts(),
2309 deps = [
2310 ":tables",
2311 "@FP16",
2312 "@pthreadpool",
2313 ],
2314)
2315
2316xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2317 name = "sse2_ukernels",
2318 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2319 gcc_copts = xnnpack_gcc_std_copts(),
2320 gcc_x86_copts = ["-msse2"],
2321 msvc_copts = xnnpack_msvc_std_copts(),
2322 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2323 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2324 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2325 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2326 "@FP16",
2327 "@pthreadpool",
2328 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2329)
2330
2331xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2332 name = "sse2_ukernels_test_mode",
2333 hdrs = INTERNAL_HDRS,
2334 copts = [
2335 "-UNDEBUG",
2336 "-DXNN_TEST_MODE=1",
2337 ],
2338 gcc_copts = xnnpack_gcc_std_copts(),
2339 gcc_x86_copts = ["-msse2"],
2340 msvc_copts = xnnpack_msvc_std_copts(),
2341 msvc_x86_32_copts = ["/arch:SSE2"],
2342 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
2343 deps = [
2344 ":tables",
2345 "@FP16",
2346 "@pthreadpool",
2347 ],
2348)
2349
2350xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2351 name = "ssse3_ukernels",
2352 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2353 gcc_copts = xnnpack_gcc_std_copts(),
2354 gcc_x86_copts = ["-mssse3"],
2355 msvc_copts = xnnpack_msvc_std_copts(),
2356 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2357 x86_srcs = SSSE3_UKERNELS,
2358 deps = [
2359 ":tables",
2360 "@FP16",
2361 "@pthreadpool",
2362 ],
2363)
2364
2365xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2366 name = "ssse3_ukernels_test_mode",
2367 hdrs = INTERNAL_HDRS,
2368 copts = [
2369 "-UNDEBUG",
2370 "-DXNN_TEST_MODE=1",
2371 ],
2372 gcc_copts = xnnpack_gcc_std_copts(),
2373 gcc_x86_copts = ["-mssse3"],
2374 msvc_copts = xnnpack_msvc_std_copts(),
2375 msvc_x86_32_copts = ["/arch:SSE2"],
2376 x86_srcs = SSSE3_UKERNELS,
2377 deps = [
2378 ":tables",
2379 "@FP16",
2380 "@pthreadpool",
2381 ],
2382)
2383
2384xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2385 name = "sse41_ukernels",
2386 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2387 gcc_copts = xnnpack_gcc_std_copts(),
2388 gcc_x86_copts = ["-msse4.1"],
2389 msvc_copts = xnnpack_msvc_std_copts(),
2390 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2391 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2392 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2393 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2394 "@FP16",
2395 "@pthreadpool",
2396 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2397)
2398
2399xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2400 name = "sse41_ukernels_test_mode",
2401 hdrs = INTERNAL_HDRS,
2402 copts = [
2403 "-UNDEBUG",
2404 "-DXNN_TEST_MODE=1",
2405 ],
2406 gcc_copts = xnnpack_gcc_std_copts(),
2407 gcc_x86_copts = ["-msse4.1"],
2408 msvc_copts = xnnpack_msvc_std_copts(),
2409 msvc_x86_32_copts = ["/arch:SSE2"],
2410 x86_srcs = SSE41_UKERNELS,
2411 deps = [
2412 ":tables",
2413 "@FP16",
2414 "@pthreadpool",
2415 ],
2416)
2417
2418xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2419 name = "avx_ukernels",
2420 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2421 gcc_copts = xnnpack_gcc_std_copts(),
2422 gcc_x86_copts = ["-mavx"],
2423 msvc_copts = xnnpack_msvc_std_copts(),
2424 msvc_x86_32_copts = ["/arch:AVX"],
2425 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2426 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2427 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2428 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2429 "@FP16",
2430 "@pthreadpool",
2431 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2432)
2433
2434xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2435 name = "avx_ukernels_test_mode",
2436 hdrs = INTERNAL_HDRS,
2437 copts = [
2438 "-UNDEBUG",
2439 "-DXNN_TEST_MODE=1",
2440 ],
2441 gcc_copts = xnnpack_gcc_std_copts(),
2442 gcc_x86_copts = ["-mavx"],
2443 msvc_copts = xnnpack_msvc_std_copts(),
2444 msvc_x86_32_copts = ["/arch:AVX"],
2445 msvc_x86_64_copts = ["/arch:AVX"],
2446 x86_srcs = AVX_UKERNELS,
2447 deps = [
2448 ":tables",
2449 "@FP16",
2450 "@pthreadpool",
2451 ],
2452)
2453
2454xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2455 name = "fma3_ukernels",
2456 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2457 gcc_copts = xnnpack_gcc_std_copts(),
2458 gcc_x86_copts = ["-mfma"],
2459 msvc_copts = xnnpack_msvc_std_copts(),
2460 msvc_x86_32_copts = ["/arch:AVX"],
2461 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2462 x86_srcs = FMA3_UKERNELS,
2463 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2464 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2465 "@FP16",
2466 "@pthreadpool",
2467 ],
2468)
2469
2470xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2471 name = "fma3_ukernels_test_mode",
2472 hdrs = INTERNAL_HDRS,
2473 copts = [
2474 "-UNDEBUG",
2475 "-DXNN_TEST_MODE=1",
2476 ],
2477 gcc_copts = xnnpack_gcc_std_copts(),
2478 gcc_x86_copts = ["-mfma"],
2479 msvc_copts = xnnpack_msvc_std_copts(),
2480 msvc_x86_32_copts = ["/arch:AVX"],
2481 msvc_x86_64_copts = ["/arch:AVX"],
2482 x86_srcs = FMA3_UKERNELS,
2483 deps = [
2484 ":tables",
2485 "@FP16",
2486 "@pthreadpool",
2487 ],
2488)
2489
2490xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2491 name = "avx2_ukernels",
2492 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2493 gcc_copts = xnnpack_gcc_std_copts(),
2494 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2495 "-mfma",
2496 "-mavx2",
2497 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2498 msvc_copts = xnnpack_msvc_std_copts(),
2499 msvc_x86_32_copts = ["/arch:AVX2"],
2500 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2501 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2502 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2503 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2504 "@FP16",
2505 "@pthreadpool",
2506 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2507)
2508
2509xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2510 name = "avx2_ukernels_test_mode",
2511 hdrs = INTERNAL_HDRS,
2512 copts = [
2513 "-UNDEBUG",
2514 "-DXNN_TEST_MODE=1",
2515 ],
2516 gcc_copts = xnnpack_gcc_std_copts(),
2517 gcc_x86_copts = [
2518 "-mfma",
2519 "-mavx2",
2520 ],
2521 msvc_copts = xnnpack_msvc_std_copts(),
2522 msvc_x86_32_copts = ["/arch:AVX2"],
2523 msvc_x86_64_copts = ["/arch:AVX2"],
2524 x86_srcs = AVX2_UKERNELS,
2525 deps = [
2526 ":tables",
2527 "@FP16",
2528 "@pthreadpool",
2529 ],
2530)
2531
2532xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2533 name = "avx512f_ukernels",
2534 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2535 gcc_copts = xnnpack_gcc_std_copts(),
2536 gcc_x86_copts = ["-mavx512f"],
2537 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2538 msvc_copts = xnnpack_msvc_std_copts(),
2539 msvc_x86_32_copts = ["/arch:AVX512"],
2540 msvc_x86_64_copts = ["/arch:AVX512"],
2541 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2542 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2543 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2544 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2545 "@FP16",
2546 "@pthreadpool",
2547 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2548)
2549
2550xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2551 name = "avx512f_ukernels_test_mode",
2552 hdrs = INTERNAL_HDRS,
2553 copts = [
2554 "-UNDEBUG",
2555 "-DXNN_TEST_MODE=1",
2556 ],
2557 gcc_copts = xnnpack_gcc_std_copts(),
2558 gcc_x86_copts = ["-mavx512f"],
2559 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2560 msvc_copts = xnnpack_msvc_std_copts(),
2561 msvc_x86_32_copts = ["/arch:AVX512"],
2562 msvc_x86_64_copts = ["/arch:AVX512"],
2563 msys_copts = ["-fno-asynchronous-unwind-tables"],
2564 x86_srcs = AVX512F_UKERNELS,
2565 deps = [
2566 ":tables",
2567 "@FP16",
2568 "@pthreadpool",
2569 ],
2570)
2571
2572xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2573 name = "asm_ukernels",
2574 hdrs = ["src/xnnpack/assembly.h"],
2575 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2576 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2577 aarch64_srcs = AARCH64_ASM_UKERNELS,
2578)
2579
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2580xnnpack_cc_library(
2581 name = "logging_utils",
2582 srcs = LOGGING_SRCS,
2583 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2584 copts = LOGGING_COPTS + [
2585 "-Isrc",
2586 "-Iinclude",
2587 ] + select({
2588 ":debug_build": [],
2589 "//conditions:default": xnnpack_min_size_copts(),
2590 }),
2591 gcc_copts = xnnpack_gcc_std_copts(),
2592 msvc_copts = xnnpack_msvc_std_copts(),
2593 visibility = xnnpack_visibility(),
2594 deps = [
2595 "@FP16",
2596 "@clog",
2597 "@pthreadpool",
2598 ],
2599)
2600
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2601xnnpack_aggregate_library(
2602 name = "ukernels",
2603 aarch32_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2604 ":neon_ukernels",
2605 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2606 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2607 ":asm_ukernels",
2608 ],
2609 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2610 ":neon_ukernels",
2611 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2612 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2613 ":neonfp16arith_ukernels",
2614 ":asm_ukernels",
2615 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2616 generic_deps = [
2617 ":scalar_ukernels",
2618 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2619 psimd_deps = [
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2620 ":psimd_fastmath_ukernels",
2621 ":psimd_accmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2622 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2623 wasm_deps = [
2624 ":wasm_ukernels",
2625 ],
2626 wasmsimd_deps = [
2627 ":wasm_ukernels",
2628 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2629 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2630 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2631 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2632 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2633 ":avx_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2634 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2635 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2636 ":avx512f_ukernels",
2637 ],
2638)
2639
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2640xnnpack_aggregate_library(
2641 name = "ukernels_test_mode",
2642 aarch32_deps = [
2643 ":neon_ukernels_test_mode",
2644 ":neonfma_ukernels_test_mode",
2645 ":neonv8_ukernels_test_mode",
2646 ":asm_ukernels",
2647 ],
2648 aarch64_deps = [
2649 ":neon_ukernels_test_mode",
2650 ":neonfma_ukernels_test_mode",
2651 ":neonv8_ukernels_test_mode",
2652 ":neonfp16arith_ukernels_test_mode",
2653 ":asm_ukernels",
2654 ],
2655 generic_deps = [
2656 ":scalar_ukernels_test_mode",
2657 ],
2658 psimd_deps = [
2659 ":psimd_fastmath_ukernels_test_mode",
2660 ":psimd_accmath_ukernels_test_mode",
2661 ],
2662 wasm_deps = [
2663 ":wasm_ukernels_test_mode",
2664 ],
2665 wasmsimd_deps = [
2666 ":wasm_ukernels_test_mode",
2667 ],
2668 x86_deps = [
2669 ":sse2_ukernels_test_mode",
2670 ":ssse3_ukernels_test_mode",
2671 ":sse41_ukernels_test_mode",
2672 ":avx_ukernels_test_mode",
2673 ":fma3_ukernels_test_mode",
2674 ":avx2_ukernels_test_mode",
2675 ":avx512f_ukernels_test_mode",
2676 ],
2677)
2678
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2679xnnpack_cc_library(
2680 name = "im2col",
2681 srcs = ["src/im2col.c"],
2682 hdrs = [
2683 "src/xnnpack/common.h",
2684 "src/xnnpack/im2col.h",
2685 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2686 gcc_copts = xnnpack_gcc_std_copts(),
2687 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2688)
2689
2690xnnpack_cc_library(
2691 name = "indirection",
2692 srcs = ["src/indirection.c"],
2693 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2694 gcc_copts = xnnpack_gcc_std_copts(),
2695 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2696 deps = [
2697 "@FP16",
2698 "@FXdiv",
2699 "@pthreadpool",
2700 ],
2701)
2702
2703xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2704 name = "indirection_test_mode",
2705 srcs = ["src/indirection.c"],
2706 hdrs = INTERNAL_HDRS,
2707 copts = [
2708 "-UNDEBUG",
2709 "-DXNN_TEST_MODE=1",
2710 ],
2711 gcc_copts = xnnpack_gcc_std_copts(),
2712 msvc_copts = xnnpack_msvc_std_copts(),
2713 deps = [
2714 "@FP16",
2715 "@FXdiv",
2716 "@pthreadpool",
2717 ],
2718)
2719
2720xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2721 name = "operator_run",
2722 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2723 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2724 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2725 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2726 "//conditions:default": [],
2727 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2728 gcc_copts = xnnpack_gcc_std_copts(),
2729 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2730 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2731 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2732 "@FP16",
2733 "@FXdiv",
2734 "@clog",
2735 "@pthreadpool",
2736 ],
2737)
2738
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2739xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2740 name = "operator_run_test_mode",
2741 srcs = ["src/operator-run.c"],
2742 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2743 copts = LOGGING_COPTS + [
2744 "-UNDEBUG",
2745 "-DXNN_TEST_MODE=1",
2746 ] + select({
2747 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2748 "//conditions:default": [],
2749 }),
2750 gcc_copts = xnnpack_gcc_std_copts(),
2751 msvc_copts = xnnpack_msvc_std_copts(),
2752 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2753 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2754 "@FP16",
2755 "@FXdiv",
2756 "@clog",
2757 "@pthreadpool",
2758 ],
2759)
2760
2761xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2762 name = "memory_planner",
2763 srcs = ["src/memory-planner.c"],
2764 hdrs = INTERNAL_HDRS,
2765 defines = select({
2766 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
2767 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
2768 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
2769 }),
2770 gcc_copts = xnnpack_gcc_std_copts(),
2771 msvc_copts = xnnpack_msvc_std_copts(),
2772 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2773 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2774 "@pthreadpool",
2775 ],
2776)
2777
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2778xnnpack_cc_library(
2779 name = "memory_planner_test_mode",
2780 srcs = ["src/memory-planner.c"],
2781 hdrs = INTERNAL_HDRS,
2782 copts = [
2783 "-UNDEBUG",
2784 "-DXNN_TEST_MODE=1",
2785 ],
2786 defines = select({
2787 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
2788 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
2789 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
2790 }),
2791 gcc_copts = xnnpack_gcc_std_copts(),
2792 msvc_copts = xnnpack_msvc_std_copts(),
2793 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2794 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2795 "@pthreadpool",
2796 ],
2797)
2798
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2799cc_library(
2800 name = "enable_assembly",
2801 defines = select({
2802 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
2803 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -0700[diff] [blame]2804 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2805 }),
2806)
2807
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]2808xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2809 name = "operators",
2810 srcs = OPERATOR_SRCS + [
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2811 "src/memory.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2812 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]2813 ],
2814 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2815 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2816 "-Isrc",
2817 "-Iinclude",
2818 ] + select({
2819 ":debug_build": [],
2820 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2821 }) + select({
2822 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2823 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2824 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2825 gcc_copts = xnnpack_gcc_std_copts(),
2826 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2827 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2828 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2829 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2830 "@FP16",
2831 "@FXdiv",
2832 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2833 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2834 ],
2835)
2836
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2837xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2838 name = "operators_test_mode",
2839 srcs = OPERATOR_SRCS + [
2840 "src/memory.c",
2841 "src/operator-delete.c",
2842 ],
2843 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2844 copts = LOGGING_COPTS + [
2845 "-Isrc",
2846 "-Iinclude",
2847 "-UNDEBUG",
2848 "-DXNN_TEST_MODE=1",
2849 ] + select({
2850 ":debug_build": [],
2851 "//conditions:default": xnnpack_min_size_copts(),
2852 }) + select({
2853 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2854 "//conditions:default": [],
2855 }),
2856 gcc_copts = xnnpack_gcc_std_copts(),
2857 msvc_copts = xnnpack_msvc_std_copts(),
2858 deps = [
2859 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2860 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2861 "@FP16",
2862 "@FXdiv",
2863 "@clog",
2864 "@pthreadpool",
2865 ],
2866)
2867
2868xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2869 name = "XNNPACK",
2870 srcs = [
2871 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -0800[diff] [blame]2872 "src/runtime.c",
2873 "src/subgraph.c",
2874 "src/tensor.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2875 ] + SUBGRAPH_SRCS + LOGGING_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2876 hdrs = ["include/xnnpack.h"],
2877 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2878 "-Isrc",
2879 "-Iinclude",
2880 ] + select({
2881 ":debug_build": [],
2882 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2883 }) + select({
2884 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2885 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2886 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2887 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2888 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2889 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2890 visibility = xnnpack_visibility(),
2891 deps = [
2892 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2893 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2894 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2895 ":operator_run",
2896 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2897 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2898 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -0700[diff] [blame]2899 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2900 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -0700[diff] [blame]2901 ] + select({
2902 ":emscripten": [],
2903 "//conditions:default": ["@cpuinfo"],
2904 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2905)
2906
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2907xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2908 name = "XNNPACK_test_mode",
2909 srcs = [
2910 "src/init.c",
2911 "src/runtime.c",
2912 "src/subgraph.c",
2913 "src/tensor.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2914 ] + SUBGRAPH_SRCS + LOGGING_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2915 hdrs = ["include/xnnpack.h"],
2916 copts = LOGGING_COPTS + [
2917 "-Isrc",
2918 "-Iinclude",
2919 "-UNDEBUG",
2920 "-DXNN_TEST_MODE=1",
2921 ] + select({
2922 ":debug_build": [],
2923 "//conditions:default": xnnpack_min_size_copts(),
2924 }) + select({
2925 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2926 "//conditions:default": [],
2927 }),
2928 gcc_copts = xnnpack_gcc_std_copts(),
2929 includes = ["include"],
2930 msvc_copts = xnnpack_msvc_std_copts(),
2931 visibility = xnnpack_visibility(),
2932 deps = [
2933 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2934 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2935 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2936 ":operator_run_test_mode",
2937 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2938 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2939 "@clog",
2940 "@FP16",
2941 "@pthreadpool",
2942 ] + select({
2943 ":emscripten": [],
2944 "//conditions:default": ["@cpuinfo"],
2945 }),
2946)
2947
2948xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2949 name = "xnnpack_operators_nhwc_f32",
2950 srcs = [
2951 "src/init.c",
2952 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2953 hdrs = ["include/xnnpack.h"],
2954 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2955 "-Isrc",
2956 "-Iinclude",
2957 ] + select({
2958 ":debug_build": [],
2959 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2960 }) + select({
2961 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2962 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2963 }),
2964 defines = [
2965 "XNN_NO_Q8_OPERATORS",
2966 "XNN_NO_U8_OPERATORS",
2967 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]2968 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2969 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2970 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2971 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2972 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2973 visibility = xnnpack_visibility(),
2974 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2975 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2976 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2977 ":operator_run",
2978 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2979 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2980 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2981 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2982 ] + select({
2983 ":emscripten": [],
2984 "//conditions:default": ["@cpuinfo"],
2985 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2986)
2987
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]2988xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2989 name = "bench_utils",
2990 srcs = ["bench/utils.cc"],
2991 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]2992 deps = [
2993 "@com_google_benchmark//:benchmark",
2994 "@cpuinfo",
2995 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2996)
2997
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]2998######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2999
3000xnnpack_benchmark(
3001 name = "q8_gemm_bench",
3002 srcs = [
3003 "bench/gemm.h",
3004 "bench/q8-gemm.cc",
3005 "src/xnnpack/AlignedAllocator.h",
3006 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3007 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3008 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
3009)
3010
3011xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]3012 name = "f16_igemm_bench",
3013 srcs = [
3014 "bench/f16-igemm.cc",
3015 "bench/conv.h",
3016 "bench/google/conv.h",
3017 "src/xnnpack/AlignedAllocator.h",
3018 ] + MICROKERNEL_BENCHMARK_HDRS,
3019 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3020)
3021
3022xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3023 name = "f16_gemm_bench",
3024 srcs = [
3025 "bench/f16-gemm.cc",
3026 "bench/gemm.h",
3027 "src/xnnpack/AlignedAllocator.h",
3028 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3029 deps = MICROKERNEL_BENCHMARK_DEPS,
3030)
3031
3032xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3033 name = "f16_spmm_bench",
3034 srcs = [
3035 "bench/f16-spmm.cc",
3036 "bench/gemm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3037 "src/xnnpack/AlignedAllocator.h",
3038 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3039 deps = MICROKERNEL_BENCHMARK_DEPS,
3040)
3041
3042xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3043 name = "f32_igemm_bench",
3044 srcs = [
3045 "bench/f32-igemm.cc",
3046 "bench/conv.h",
3047 "src/xnnpack/AlignedAllocator.h",
3048 ] + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3049 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3050)
3051
3052xnnpack_benchmark(
3053 name = "f32_conv_hwc_bench",
3054 srcs = [
3055 "bench/f32-conv-hwc.cc",
3056 "bench/dconv.h",
3057 "src/xnnpack/AlignedAllocator.h",
3058 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3059 deps = MICROKERNEL_BENCHMARK_DEPS,
3060)
3061
3062xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3063 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3064 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3065 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3066 "bench/dconv.h",
3067 "src/xnnpack/AlignedAllocator.h",
3068 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3069 deps = MICROKERNEL_BENCHMARK_DEPS,
3070)
3071
3072xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3073 name = "f16_dwconv_bench",
3074 srcs = [
3075 "bench/f16-dwconv.cc",
3076 "bench/dwconv.h",
3077 "bench/google/dwconv.h",
3078 "src/xnnpack/AlignedAllocator.h",
3079 ] + MICROKERNEL_BENCHMARK_HDRS,
3080 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3081)
3082
3083xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3084 name = "f32_dwconv_bench",
3085 srcs = [
3086 "bench/f32-dwconv.cc",
3087 "bench/dwconv.h",
3088 "src/xnnpack/AlignedAllocator.h",
3089 ] + MICROKERNEL_BENCHMARK_HDRS,
3090 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3091)
3092
3093xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3094 name = "f32_dwconv_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3095 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3096 "bench/f32-dwconv-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3097 "bench/dwconv.h",
3098 "src/xnnpack/AlignedAllocator.h",
3099 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3100 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3101)
3102
3103xnnpack_benchmark(
3104 name = "f32_gemm_bench",
3105 srcs = [
3106 "bench/f32-gemm.cc",
3107 "bench/gemm.h",
3108 "src/xnnpack/AlignedAllocator.h",
3109 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3110 copts = xnnpack_optional_ruy_copts(),
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3111 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3112)
3113
3114xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3115 name = "f32_raddexpminusmax_bench",
3116 srcs = [
3117 "bench/f32-raddexpminusmax.cc",
3118 "src/xnnpack/AlignedAllocator.h",
3119 ] + MICROKERNEL_BENCHMARK_HDRS,
3120 deps = MICROKERNEL_BENCHMARK_DEPS,
3121)
3122
3123xnnpack_benchmark(
3124 name = "f32_raddextexp_bench",
3125 srcs = [
3126 "bench/f32-raddextexp.cc",
3127 "src/xnnpack/AlignedAllocator.h",
3128 ] + MICROKERNEL_BENCHMARK_HDRS,
3129 deps = MICROKERNEL_BENCHMARK_DEPS,
3130)
3131
3132xnnpack_benchmark(
3133 name = "f32_raddstoreexpminusmax_bench",
3134 srcs = [
3135 "bench/f32-raddstoreexpminusmax.cc",
3136 "src/xnnpack/AlignedAllocator.h",
3137 ] + MICROKERNEL_BENCHMARK_HDRS,
3138 deps = MICROKERNEL_BENCHMARK_DEPS,
3139)
3140
3141xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3142 name = "f32_rmax_bench",
3143 srcs = [
3144 "bench/f32-rmax.cc",
3145 "src/xnnpack/AlignedAllocator.h",
3146 ] + MICROKERNEL_BENCHMARK_HDRS,
3147 deps = MICROKERNEL_BENCHMARK_DEPS,
3148)
3149
3150xnnpack_benchmark(
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3151 name = "f32_sigmoid_bench",
3152 srcs = [
3153 "bench/f32-sigmoid.cc",
3154 "src/xnnpack/AlignedAllocator.h",
3155 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3156 deps = MICROKERNEL_BENCHMARK_DEPS,
3157)
3158
3159xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3160 name = "f32_spmm_bench",
3161 srcs = [
3162 "bench/f32-spmm.cc",
3163 "bench/gemm.h",
3164 "src/xnnpack/AlignedAllocator.h",
3165 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3166 deps = MICROKERNEL_BENCHMARK_DEPS,
3167)
3168
3169xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3170 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3171 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3172 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3173 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3174 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -0800[diff] [blame]3175 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3176)
3177
3178xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3179 name = "f32_vscaleexpminusmax_bench",
3180 srcs = [
3181 "bench/f32-vscaleexpminusmax.cc",
3182 "src/xnnpack/AlignedAllocator.h",
3183 ] + MICROKERNEL_BENCHMARK_HDRS,
3184 deps = MICROKERNEL_BENCHMARK_DEPS,
3185)
3186
3187xnnpack_benchmark(
3188 name = "f32_vscaleextexp_bench",
3189 srcs = [
3190 "bench/f32-vscaleextexp.cc",
3191 "src/xnnpack/AlignedAllocator.h",
3192 ] + MICROKERNEL_BENCHMARK_HDRS,
3193 deps = MICROKERNEL_BENCHMARK_DEPS,
3194)
3195
3196xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3197 name = "f32_im2col_gemm_bench",
3198 srcs = [
3199 "bench/f32-im2col-gemm.cc",
3200 "bench/conv.h",
3201 "src/xnnpack/AlignedAllocator.h",
3202 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3203 deps = MICROKERNEL_BENCHMARK_DEPS + [":im2col"],
3204)
3205
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3206xnnpack_benchmark(
3207 name = "requantization_bench",
3208 srcs = [
3209 "bench/requantization.cc",
3210 "src/xnnpack/requantization-stubs.h",
3211 "src/xnnpack/AlignedAllocator.h",
3212 ] + MICROKERNEL_BENCHMARK_HDRS,
3213 deps = MICROKERNEL_BENCHMARK_DEPS,
3214)
3215
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]3216xnnpack_benchmark(
3217 name = "rounding_bench",
3218 srcs = [
3219 "bench/rounding.cc",
3220 "src/xnnpack/math-stubs.h",
3221 "src/xnnpack/AlignedAllocator.h",
3222 ] + MICROKERNEL_BENCHMARK_HDRS,
3223 deps = MICROKERNEL_BENCHMARK_DEPS,
3224)
3225
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3226########################### Benchmarks for operators ###########################
3227
3228xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3229 name = "average_pooling_bench",
3230 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -0700[diff] [blame]3231 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3232 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3233 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3234)
3235
3236xnnpack_benchmark(
3237 name = "channel_shuffle_bench",
3238 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3239 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3240)
3241
3242xnnpack_benchmark(
3243 name = "convolution_bench",
3244 srcs = ["bench/convolution.cc"],
3245 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3246 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3247 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3248)
3249
3250xnnpack_benchmark(
3251 name = "deconvolution_bench",
3252 srcs = ["bench/deconvolution.cc"],
3253 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3254 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3255 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3256)
3257
3258xnnpack_benchmark(
3259 name = "global_average_pooling_bench",
3260 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3261 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3262)
3263
3264xnnpack_benchmark(
3265 name = "max_pooling_bench",
3266 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3267 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3268)
3269
3270xnnpack_benchmark(
3271 name = "sigmoid_bench",
3272 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -0800[diff] [blame]3273 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3274 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3275 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3276)
3277
3278xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3279 name = "prelu_bench",
3280 srcs = ["bench/prelu.cc"],
3281 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3282 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3283 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3284)
3285
3286xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3287 name = "softmax_bench",
3288 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -0800[diff] [blame]3289 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3290 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3291 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3292)
3293
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3294############################# End-to-end benchmarks ############################
3295
3296cc_library(
3297 name = "mobilenet_v1",
3298 srcs = ["models/mobilenet-v1.cc"],
3299 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3300 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3301 linkstatic = True,
3302 deps = [
3303 ":XNNPACK",
3304 "@pthreadpool",
3305 ],
3306)
3307
3308cc_library(
3309 name = "mobilenet_v2",
3310 srcs = ["models/mobilenet-v2.cc"],
3311 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3312 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3313 linkstatic = True,
3314 deps = [
3315 ":XNNPACK",
3316 "@pthreadpool",
3317 ],
3318)
3319
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3320cc_library(
3321 name = "mobilenet_v3_large",
3322 srcs = ["models/mobilenet-v3-large.cc"],
3323 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3324 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3325 linkstatic = True,
3326 deps = [
3327 ":XNNPACK",
3328 "@pthreadpool",
3329 ],
3330)
3331
3332cc_library(
3333 name = "mobilenet_v3_small",
3334 srcs = ["models/mobilenet-v3-small.cc"],
3335 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3336 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3337 linkstatic = True,
3338 deps = [
3339 ":XNNPACK",
3340 "@pthreadpool",
3341 ],
3342)
3343
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3344xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3345 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3346 srcs = [
3347 "bench/f32-dwconv-e2e.cc",
3348 "bench/end2end.h",
3349 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3350 deps = MICROKERNEL_BENCHMARK_DEPS + [
3351 ":XNNPACK",
3352 ":mobilenet_v1",
3353 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3354 ":mobilenet_v3_large",
3355 ":mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3356 ],
3357)
3358
3359xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3360 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3361 srcs = [
3362 "bench/f32-gemm-e2e.cc",
3363 "bench/end2end.h",
3364 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3365 deps = MICROKERNEL_BENCHMARK_DEPS + [
3366 ":XNNPACK",
3367 ":mobilenet_v1",
3368 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3369 ":mobilenet_v3_large",
3370 ":mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3371 ],
3372)
3373
3374xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3375 name = "end2end_bench",
3376 srcs = ["bench/end2end.cc"],
3377 deps = [
3378 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -0700[diff] [blame]3379 ":bench_utils",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3380 ":mobilenet_v1",
3381 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3382 ":mobilenet_v3_large",
3383 ":mobilenet_v3_small",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3384 "@pthreadpool",
3385 ],
3386)
3387
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]3388#################### Accuracy evaluation for math functions ####################
3389
3390xnnpack_benchmark(
3391 name = "f32_exp_eval",
3392 srcs = [
3393 "eval/f32-exp.cc",
3394 "src/xnnpack/AlignedAllocator.h",
3395 ] + ACCURACY_EVAL_HDRS,
3396 deps = ACCURACY_EVAL_DEPS,
3397)
3398
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]3399xnnpack_benchmark(
3400 name = "f32_expminus_eval",
3401 srcs = [
3402 "eval/f32-expminus.cc",
3403 "src/xnnpack/AlignedAllocator.h",
3404 ] + ACCURACY_EVAL_HDRS,
3405 deps = ACCURACY_EVAL_DEPS,
3406)
3407
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]3408xnnpack_benchmark(
3409 name = "f32_extexp_eval",
3410 srcs = [
3411 "eval/f32-extexp.cc",
3412 "src/xnnpack/AlignedAllocator.h",
3413 ] + ACCURACY_EVAL_HDRS,
3414 deps = ACCURACY_EVAL_DEPS,
3415)
3416
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3417xnnpack_unit_test(
3418 name = "f32_roundne_eval",
3419 srcs = [
3420 "eval/f32-roundne.cc",
3421 "src/xnnpack/AlignedAllocator.h",
3422 "src/xnnpack/math-stubs.h",
3423 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -0700[diff] [blame]3424 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3425 deps = MICROKERNEL_TEST_DEPS,
3426)
3427
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3428xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3429 name = "f32_roundd_eval",
3430 srcs = [
3431 "eval/f32-roundd.cc",
3432 "src/xnnpack/AlignedAllocator.h",
3433 "src/xnnpack/math-stubs.h",
3434 ] + MICROKERNEL_TEST_HDRS,
3435 automatic = False,
3436 deps = MICROKERNEL_TEST_DEPS,
3437)
3438
3439xnnpack_unit_test(
3440 name = "f32_roundu_eval",
3441 srcs = [
3442 "eval/f32-roundu.cc",
3443 "src/xnnpack/AlignedAllocator.h",
3444 "src/xnnpack/math-stubs.h",
3445 ] + MICROKERNEL_TEST_HDRS,
3446 automatic = False,
3447 deps = MICROKERNEL_TEST_DEPS,
3448)
3449
3450xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3451 name = "f32_roundz_eval",
3452 srcs = [
3453 "eval/f32-roundz.cc",
3454 "src/xnnpack/AlignedAllocator.h",
3455 "src/xnnpack/math-stubs.h",
3456 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3457 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3458 deps = MICROKERNEL_TEST_DEPS,
3459)
3460
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3461xnnpack_benchmark(
3462 name = "f32_sigmoid_eval",
3463 srcs = [
3464 "eval/f32-sigmoid.cc",
3465 "src/xnnpack/AlignedAllocator.h",
3466 ] + ACCURACY_EVAL_HDRS,
3467 deps = ACCURACY_EVAL_DEPS,
3468)
3469
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3470######################### Unit tests for micro-kernels #########################
3471
3472xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3473 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3474 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3475 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3476 "test/gemm-microkernel-tester.h",
3477 "src/xnnpack/AlignedAllocator.h",
3478 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3479 deps = MICROKERNEL_TEST_DEPS,
3480)
3481
3482xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3483 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3484 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3485 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3486 "test/spmm-microkernel-tester.h",
3487 "src/xnnpack/AlignedAllocator.h",
3488 ] + MICROKERNEL_TEST_HDRS,
3489 deps = MICROKERNEL_TEST_DEPS,
3490)
3491
3492xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3493 name = "f32_argmaxpool_test",
3494 srcs = [
3495 "test/f32-argmaxpool.cc",
3496 "test/argmaxpool-microkernel-tester.h",
3497 "src/xnnpack/AlignedAllocator.h",
3498 ] + MICROKERNEL_TEST_HDRS,
3499 deps = MICROKERNEL_TEST_DEPS,
3500)
3501
3502xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3503 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3504 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3505 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3506 "test/avgpool-microkernel-tester.h",
3507 "src/xnnpack/AlignedAllocator.h",
3508 ] + MICROKERNEL_TEST_HDRS,
3509 deps = MICROKERNEL_TEST_DEPS,
3510)
3511
3512xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3513 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3514 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3515 "test/f32-ibilinear.cc",
3516 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3517 "src/xnnpack/AlignedAllocator.h",
3518 ] + MICROKERNEL_TEST_HDRS,
3519 deps = MICROKERNEL_TEST_DEPS,
3520)
3521
3522xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3523 name = "f16_clamp_test",
3524 srcs = [
3525 "test/f16-clamp.cc",
3526 "test/clamp-microkernel-tester.h",
3527 ] + MICROKERNEL_TEST_HDRS,
3528 deps = MICROKERNEL_TEST_DEPS,
3529)
3530
3531xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3532 name = "f32_clamp_test",
3533 srcs = [
3534 "test/f32-clamp.cc",
3535 "test/clamp-microkernel-tester.h",
3536 ] + MICROKERNEL_TEST_HDRS,
3537 deps = MICROKERNEL_TEST_DEPS,
3538)
3539
3540xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3541 name = "f32_igemm_test",
3542 srcs = [
3543 "test/f32-igemm.cc",
3544 "test/gemm-microkernel-tester.h",
3545 "src/xnnpack/AlignedAllocator.h",
3546 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3547 deps = MICROKERNEL_TEST_DEPS,
3548)
3549
3550xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3551 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3552 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3553 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3554 "test/gemm-microkernel-tester.h",
3555 "src/xnnpack/AlignedAllocator.h",
3556 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3557 deps = MICROKERNEL_TEST_DEPS,
3558)
3559
3560xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -0700[diff] [blame]3561 name = "f32_igemm_minmax_test",
3562 srcs = [
3563 "test/f32-igemm-minmax.cc",
3564 "test/gemm-microkernel-tester.h",
3565 "src/xnnpack/AlignedAllocator.h",
3566 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3567 deps = MICROKERNEL_TEST_DEPS,
3568)
3569
3570xnnpack_unit_test(
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]3571 name = "f16_igemm_minmax_test",
3572 srcs = [
3573 "test/f16-igemm-minmax.cc",
3574 "test/gemm-microkernel-tester.h",
3575 "src/xnnpack/AlignedAllocator.h",
3576 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3577 deps = MICROKERNEL_TEST_DEPS,
3578)
3579
3580xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3581 name = "f32_conv_hwc_test",
3582 srcs = [
3583 "test/f32-conv-hwc.cc",
3584 "test/conv-hwc-microkernel-tester.h",
3585 "src/xnnpack/AlignedAllocator.h",
3586 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3587 deps = MICROKERNEL_TEST_DEPS,
3588)
3589
3590xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3591 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3592 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3593 "test/f32-conv-hwc2chw.cc",
3594 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3595 "src/xnnpack/AlignedAllocator.h",
3596 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3597 deps = MICROKERNEL_TEST_DEPS,
3598)
3599
3600xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3601 name = "f32_dwconv_test",
3602 srcs = [
3603 "test/f32-dwconv.cc",
3604 "test/dwconv-microkernel-tester.h",
3605 "src/xnnpack/AlignedAllocator.h",
3606 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3607 deps = MICROKERNEL_TEST_DEPS,
3608)
3609
3610xnnpack_unit_test(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3611 name = "f16_dwconv_minmax_test",
3612 srcs = [
3613 "test/f16-dwconv-minmax.cc",
3614 "test/dwconv-microkernel-tester.h",
3615 "src/xnnpack/AlignedAllocator.h",
3616 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3617 deps = MICROKERNEL_TEST_DEPS,
3618)
3619
3620xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3621 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3622 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3623 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3624 "test/dwconv-microkernel-tester.h",
3625 "src/xnnpack/AlignedAllocator.h",
3626 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3627 deps = MICROKERNEL_TEST_DEPS,
3628)
3629
3630xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3631 name = "f32_dwconv_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3632 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3633 "test/f32-dwconv-chw.cc",
3634 "test/dwconv-chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3635 "src/xnnpack/AlignedAllocator.h",
3636 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3637 deps = MICROKERNEL_TEST_DEPS,
3638)
3639
3640xnnpack_unit_test(
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]3641 name = "f16_gavgpool_minmax_test",
3642 srcs = [
3643 "test/f16-gavgpool-minmax.cc",
3644 "test/gavgpool-microkernel-tester.h",
3645 "src/xnnpack/AlignedAllocator.h",
3646 ] + MICROKERNEL_TEST_HDRS,
3647 deps = MICROKERNEL_TEST_DEPS,
3648)
3649
3650xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3651 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3652 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3653 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3654 "test/gavgpool-microkernel-tester.h",
3655 "src/xnnpack/AlignedAllocator.h",
3656 ] + MICROKERNEL_TEST_HDRS,
3657 deps = MICROKERNEL_TEST_DEPS,
3658)
3659
3660xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3661 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3662 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3663 "test/f32-gavgpool-cw.cc",
3664 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3665 "src/xnnpack/AlignedAllocator.h",
3666 ] + MICROKERNEL_TEST_HDRS,
3667 deps = MICROKERNEL_TEST_DEPS,
3668)
3669
3670xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3671 name = "f32_gemm_test",
3672 srcs = [
3673 "test/f32-gemm.cc",
3674 "test/gemm-microkernel-tester.h",
3675 "src/xnnpack/AlignedAllocator.h",
3676 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3677 deps = MICROKERNEL_TEST_DEPS,
3678)
3679
3680xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3681 name = "f32_gemm_relu_test",
3682 srcs = [
3683 "test/f32-gemm-relu.cc",
3684 "test/gemm-microkernel-tester.h",
3685 "src/xnnpack/AlignedAllocator.h",
3686 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3687 deps = MICROKERNEL_TEST_DEPS,
3688)
3689
3690xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3691 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3692 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3693 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3694 "test/gemm-microkernel-tester.h",
3695 "src/xnnpack/AlignedAllocator.h",
3696 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3697 deps = MICROKERNEL_TEST_DEPS,
3698)
3699
3700xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3701 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3702 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3703 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3704 "test/gemm-microkernel-tester.h",
3705 "src/xnnpack/AlignedAllocator.h",
3706 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3707 deps = MICROKERNEL_TEST_DEPS,
3708)
3709
3710xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3711 name = "f16_hswish_test",
3712 srcs = [
3713 "test/f16-hswish.cc",
3714 "test/hswish-microkernel-tester.h",
3715 ] + MICROKERNEL_TEST_HDRS,
3716 deps = MICROKERNEL_TEST_DEPS,
3717)
3718
3719xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3720 name = "f32_hswish_test",
3721 srcs = [
3722 "test/f32-hswish.cc",
3723 "test/hswish-microkernel-tester.h",
3724 ] + MICROKERNEL_TEST_HDRS,
3725 deps = MICROKERNEL_TEST_DEPS,
3726)
3727
3728xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3729 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3730 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3731 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3732 "test/maxpool-microkernel-tester.h",
3733 ] + MICROKERNEL_TEST_HDRS,
3734 deps = MICROKERNEL_TEST_DEPS,
3735)
3736
3737xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3738 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3739 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3740 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3741 "test/avgpool-microkernel-tester.h",
3742 "src/xnnpack/AlignedAllocator.h",
3743 ] + MICROKERNEL_TEST_HDRS,
3744 deps = MICROKERNEL_TEST_DEPS,
3745)
3746
3747xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3748 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3749 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3750 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3751 "test/gemm-microkernel-tester.h",
3752 "src/xnnpack/AlignedAllocator.h",
3753 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3754 deps = MICROKERNEL_TEST_DEPS,
3755)
3756
3757xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3758 name = "f16_prelu_test",
3759 srcs = [
3760 "test/f16-prelu.cc",
3761 "test/prelu-microkernel-tester.h",
3762 "src/xnnpack/AlignedAllocator.h",
3763 ] + MICROKERNEL_TEST_HDRS,
3764 deps = MICROKERNEL_TEST_DEPS,
3765)
3766
3767xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3768 name = "f32_prelu_test",
3769 srcs = [
3770 "test/f32-prelu.cc",
3771 "test/prelu-microkernel-tester.h",
3772 "src/xnnpack/AlignedAllocator.h",
3773 ] + MICROKERNEL_TEST_HDRS,
3774 deps = MICROKERNEL_TEST_DEPS,
3775)
3776
3777xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]3778 name = "f32_raddexpminusmax_test",
3779 srcs = [
3780 "test/f32-raddexpminusmax.cc",
3781 "test/raddexpminusmax-microkernel-tester.h",
3782 ] + MICROKERNEL_TEST_HDRS,
3783 deps = MICROKERNEL_TEST_DEPS,
3784)
3785
3786xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]3787 name = "f32_raddextexp_test",
3788 srcs = [
3789 "test/f32-raddextexp.cc",
3790 "test/raddextexp-microkernel-tester.h",
3791 ] + MICROKERNEL_TEST_HDRS,
3792 deps = MICROKERNEL_TEST_DEPS,
3793)
3794
3795xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]3796 name = "f32_raddstoreexpminusmax_test",
3797 srcs = [
3798 "test/f32-raddstoreexpminusmax.cc",
3799 "test/raddstoreexpminusmax-microkernel-tester.h",
3800 ] + MICROKERNEL_TEST_HDRS,
3801 deps = MICROKERNEL_TEST_DEPS,
3802)
3803
3804xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3805 name = "f32_rmax_test",
3806 srcs = [
3807 "test/f32-rmax.cc",
3808 "test/rmax-microkernel-tester.h",
3809 ] + MICROKERNEL_TEST_HDRS,
3810 deps = MICROKERNEL_TEST_DEPS,
3811)
3812
3813xnnpack_unit_test(
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3814 name = "f32_sigmoid_test",
3815 srcs = [
3816 "test/f32-sigmoid.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]3817 "test/vunary-microkernel-tester.h",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3818 ] + MICROKERNEL_TEST_HDRS,
3819 deps = MICROKERNEL_TEST_DEPS,
3820)
3821
3822xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3823 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3824 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3825 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3826 "test/spmm-microkernel-tester.h",
3827 "src/xnnpack/AlignedAllocator.h",
3828 ] + MICROKERNEL_TEST_HDRS,
3829 deps = MICROKERNEL_TEST_DEPS,
3830)
3831
3832xnnpack_unit_test(
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]3833 name = "f16_vadd_minmax_test",
3834 srcs = [
3835 "test/f16-vadd-minmax.cc",
3836 "test/vbinary-microkernel-tester.h",
3837 ] + MICROKERNEL_TEST_HDRS,
3838 deps = MICROKERNEL_TEST_DEPS,
3839)
3840
3841xnnpack_unit_test(
3842 name = "f16_vaddc_minmax_test",
3843 srcs = [
3844 "test/f16-vaddc-minmax.cc",
3845 "test/vbinaryc-microkernel-tester.h",
3846 ] + MICROKERNEL_TEST_HDRS,
3847 deps = MICROKERNEL_TEST_DEPS,
3848)
3849
3850xnnpack_unit_test(
3851 name = "f16_vdiv_minmax_test",
3852 srcs = [
3853 "test/f16-vdiv-minmax.cc",
3854 "test/vbinary-microkernel-tester.h",
3855 ] + MICROKERNEL_TEST_HDRS,
3856 deps = MICROKERNEL_TEST_DEPS,
3857)
3858
3859xnnpack_unit_test(
3860 name = "f16_vdivc_minmax_test",
3861 srcs = [
3862 "test/f16-vdivc-minmax.cc",
3863 "test/vbinaryc-microkernel-tester.h",
3864 ] + MICROKERNEL_TEST_HDRS,
3865 deps = MICROKERNEL_TEST_DEPS,
3866)
3867
3868xnnpack_unit_test(
3869 name = "f16_vrdivc_minmax_test",
3870 srcs = [
3871 "test/f16-vrdivc-minmax.cc",
3872 "test/vbinaryc-microkernel-tester.h",
3873 ] + MICROKERNEL_TEST_HDRS,
3874 deps = MICROKERNEL_TEST_DEPS,
3875)
3876
3877xnnpack_unit_test(
3878 name = "f16_vmax_test",
3879 srcs = [
3880 "test/f16-vmax.cc",
3881 "test/vbinary-microkernel-tester.h",
3882 ] + MICROKERNEL_TEST_HDRS,
3883 deps = MICROKERNEL_TEST_DEPS,
3884)
3885
3886xnnpack_unit_test(
3887 name = "f16_vmaxc_test",
3888 srcs = [
3889 "test/f16-vmaxc.cc",
3890 "test/vbinaryc-microkernel-tester.h",
3891 ] + MICROKERNEL_TEST_HDRS,
3892 deps = MICROKERNEL_TEST_DEPS,
3893)
3894
3895xnnpack_unit_test(
3896 name = "f16_vmin_test",
3897 srcs = [
3898 "test/f16-vmin.cc",
3899 "test/vbinary-microkernel-tester.h",
3900 ] + MICROKERNEL_TEST_HDRS,
3901 deps = MICROKERNEL_TEST_DEPS,
3902)
3903
3904xnnpack_unit_test(
3905 name = "f16_vminc_test",
3906 srcs = [
3907 "test/f16-vminc.cc",
3908 "test/vbinaryc-microkernel-tester.h",
3909 ] + MICROKERNEL_TEST_HDRS,
3910 deps = MICROKERNEL_TEST_DEPS,
3911)
3912
3913xnnpack_unit_test(
3914 name = "f16_vmul_minmax_test",
3915 srcs = [
3916 "test/f16-vmul-minmax.cc",
3917 "test/vbinary-microkernel-tester.h",
3918 ] + MICROKERNEL_TEST_HDRS,
3919 deps = MICROKERNEL_TEST_DEPS,
3920)
3921
3922xnnpack_unit_test(
3923 name = "f16_vmulc_minmax_test",
3924 srcs = [
3925 "test/f16-vmulc-minmax.cc",
3926 "test/vbinaryc-microkernel-tester.h",
3927 ] + MICROKERNEL_TEST_HDRS,
3928 deps = MICROKERNEL_TEST_DEPS,
3929)
3930
3931xnnpack_unit_test(
3932 name = "f16_vsub_minmax_test",
3933 srcs = [
3934 "test/f16-vsub-minmax.cc",
3935 "test/vbinary-microkernel-tester.h",
3936 ] + MICROKERNEL_TEST_HDRS,
3937 deps = MICROKERNEL_TEST_DEPS,
3938)
3939
3940xnnpack_unit_test(
3941 name = "f16_vsubc_minmax_test",
3942 srcs = [
3943 "test/f16-vsubc-minmax.cc",
3944 "test/vbinaryc-microkernel-tester.h",
3945 ] + MICROKERNEL_TEST_HDRS,
3946 deps = MICROKERNEL_TEST_DEPS,
3947)
3948
3949xnnpack_unit_test(
3950 name = "f16_vrsubc_minmax_test",
3951 srcs = [
3952 "test/f16-vrsubc-minmax.cc",
3953 "test/vbinaryc-microkernel-tester.h",
3954 ] + MICROKERNEL_TEST_HDRS,
3955 deps = MICROKERNEL_TEST_DEPS,
3956)
3957
3958xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]3959 name = "f32_vabs_test",
3960 srcs = [
3961 "test/f32-vabs.cc",
3962 "test/vunary-microkernel-tester.h",
3963 ] + MICROKERNEL_TEST_HDRS,
3964 deps = MICROKERNEL_TEST_DEPS,
3965)
3966
3967xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3968 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3969 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3970 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]3971 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]3972 ] + MICROKERNEL_TEST_HDRS,
3973 deps = MICROKERNEL_TEST_DEPS,
3974)
3975
3976xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3977 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]3978 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3979 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]3980 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3981 ] + MICROKERNEL_TEST_HDRS,
3982 deps = MICROKERNEL_TEST_DEPS,
3983)
3984
3985xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3986 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]3987 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3988 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]3989 "test/vbinary-microkernel-tester.h",
3990 ] + MICROKERNEL_TEST_HDRS,
3991 deps = MICROKERNEL_TEST_DEPS,
3992)
3993
3994xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3995 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]3996 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]3997 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]3998 "test/vbinaryc-microkernel-tester.h",
3999 ] + MICROKERNEL_TEST_HDRS,
4000 deps = MICROKERNEL_TEST_DEPS,
4001)
4002
4003xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4004 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4005 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4006 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4007 "test/vbinaryc-microkernel-tester.h",
4008 ] + MICROKERNEL_TEST_HDRS,
4009 deps = MICROKERNEL_TEST_DEPS,
4010)
4011
4012xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]4013 name = "f32_vmax_test",
4014 srcs = [
4015 "test/f32-vmax.cc",
4016 "test/vbinary-microkernel-tester.h",
4017 ] + MICROKERNEL_TEST_HDRS,
4018 deps = MICROKERNEL_TEST_DEPS,
4019)
4020
4021xnnpack_unit_test(
4022 name = "f32_vmaxc_test",
4023 srcs = [
4024 "test/f32-vmaxc.cc",
4025 "test/vbinaryc-microkernel-tester.h",
4026 ] + MICROKERNEL_TEST_HDRS,
4027 deps = MICROKERNEL_TEST_DEPS,
4028)
4029
4030xnnpack_unit_test(
4031 name = "f32_vmin_test",
4032 srcs = [
4033 "test/f32-vmin.cc",
4034 "test/vbinary-microkernel-tester.h",
4035 ] + MICROKERNEL_TEST_HDRS,
4036 deps = MICROKERNEL_TEST_DEPS,
4037)
4038
4039xnnpack_unit_test(
4040 name = "f32_vminc_test",
4041 srcs = [
4042 "test/f32-vminc.cc",
4043 "test/vbinaryc-microkernel-tester.h",
4044 ] + MICROKERNEL_TEST_HDRS,
4045 deps = MICROKERNEL_TEST_DEPS,
4046)
4047
4048xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4049 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4050 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4051 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4052 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4053 ] + MICROKERNEL_TEST_HDRS,
4054 deps = MICROKERNEL_TEST_DEPS,
4055)
4056
4057xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4058 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4059 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4060 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4061 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4062 ] + MICROKERNEL_TEST_HDRS,
4063 deps = MICROKERNEL_TEST_DEPS,
4064)
4065
4066xnnpack_unit_test(
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]4067 name = "f16_vmulcaddc_minmax_test",
4068 srcs = [
4069 "test/f16-vmulcaddc-minmax.cc",
4070 "test/vmulcaddc-microkernel-tester.h",
4071 "src/xnnpack/AlignedAllocator.h",
4072 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4073 deps = MICROKERNEL_TEST_DEPS,
4074)
4075
4076xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4077 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4078 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4079 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4080 "test/vmulcaddc-microkernel-tester.h",
4081 "src/xnnpack/AlignedAllocator.h",
4082 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4083 deps = MICROKERNEL_TEST_DEPS,
4084)
4085
4086xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4087 name = "f32_vneg_test",
4088 srcs = [
4089 "test/f32-vneg.cc",
4090 "test/vunary-microkernel-tester.h",
4091 ] + MICROKERNEL_TEST_HDRS,
4092 deps = MICROKERNEL_TEST_DEPS,
4093)
4094
4095xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame^]4096 name = "f32_vrndne_test",
4097 srcs = [
4098 "test/f32-vrndne.cc",
4099 "test/vunary-microkernel-tester.h",
4100 ] + MICROKERNEL_TEST_HDRS,
4101 deps = MICROKERNEL_TEST_DEPS,
4102)
4103
4104xnnpack_unit_test(
4105 name = "f32_vrndz_test",
4106 srcs = [
4107 "test/f32-vrndz.cc",
4108 "test/vunary-microkernel-tester.h",
4109 ] + MICROKERNEL_TEST_HDRS,
4110 deps = MICROKERNEL_TEST_DEPS,
4111)
4112
4113xnnpack_unit_test(
4114 name = "f32_vrndu_test",
4115 srcs = [
4116 "test/f32-vrndu.cc",
4117 "test/vunary-microkernel-tester.h",
4118 ] + MICROKERNEL_TEST_HDRS,
4119 deps = MICROKERNEL_TEST_DEPS,
4120)
4121
4122xnnpack_unit_test(
4123 name = "f32_vrndd_test",
4124 srcs = [
4125 "test/f32-vrndd.cc",
4126 "test/vunary-microkernel-tester.h",
4127 ] + MICROKERNEL_TEST_HDRS,
4128 deps = MICROKERNEL_TEST_DEPS,
4129)
4130
4131xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]4132 name = "f32_vscale_test",
4133 srcs = [
4134 "test/f32-vscale.cc",
4135 "test/vscale-microkernel-tester.h",
4136 ] + MICROKERNEL_TEST_HDRS,
4137 deps = MICROKERNEL_TEST_DEPS,
4138)
4139
4140xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4141 name = "f32_vscaleexpminusmax_test",
4142 srcs = [
4143 "test/f32-vscaleexpminusmax.cc",
4144 "test/vscaleexpminusmax-microkernel-tester.h",
4145 ] + MICROKERNEL_TEST_HDRS,
4146 deps = MICROKERNEL_TEST_DEPS,
4147)
4148
4149xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4150 name = "f32_vscaleextexp_test",
4151 srcs = [
4152 "test/f32-vscaleextexp.cc",
4153 "test/vscaleextexp-microkernel-tester.h",
4154 ] + MICROKERNEL_TEST_HDRS,
4155 deps = MICROKERNEL_TEST_DEPS,
4156)
4157
4158xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4159 name = "f32_vsqr_test",
4160 srcs = [
4161 "test/f32-vsqr.cc",
4162 "test/vunary-microkernel-tester.h",
4163 ] + MICROKERNEL_TEST_HDRS,
4164 deps = MICROKERNEL_TEST_DEPS,
4165)
4166
4167xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]4168 name = "f32_vsqrdiff_test",
4169 srcs = [
4170 "test/f32-vsqrdiff.cc",
4171 "test/vbinary-microkernel-tester.h",
4172 ] + MICROKERNEL_TEST_HDRS,
4173 deps = MICROKERNEL_TEST_DEPS,
4174)
4175
4176xnnpack_unit_test(
4177 name = "f32_vsqrdiffc_test",
4178 srcs = [
4179 "test/f32-vsqrdiffc.cc",
4180 "test/vbinaryc-microkernel-tester.h",
4181 ] + MICROKERNEL_TEST_HDRS,
4182 deps = MICROKERNEL_TEST_DEPS,
4183)
4184
4185xnnpack_unit_test(
4186 name = "f32_vrsqrdiffc_test",
4187 srcs = [
4188 "test/f32-vrsqrdiffc.cc",
4189 "test/vbinaryc-microkernel-tester.h",
4190 ] + MICROKERNEL_TEST_HDRS,
4191 deps = MICROKERNEL_TEST_DEPS,
4192)
4193
4194xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4195 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4196 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4197 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4198 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4199 ] + MICROKERNEL_TEST_HDRS,
4200 deps = MICROKERNEL_TEST_DEPS,
4201)
4202
4203xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4204 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4205 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4206 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4207 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4208 ] + MICROKERNEL_TEST_HDRS,
4209 deps = MICROKERNEL_TEST_DEPS,
4210)
4211
4212xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4213 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4214 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4215 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4216 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4217 ] + MICROKERNEL_TEST_HDRS,
4218 deps = MICROKERNEL_TEST_DEPS,
4219)
4220
4221xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4222 name = "q8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4223 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4224 "test/q8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4225 "test/avgpool-microkernel-tester.h",
4226 "src/xnnpack/AlignedAllocator.h",
4227 ] + MICROKERNEL_TEST_HDRS,
4228 deps = MICROKERNEL_TEST_DEPS,
4229)
4230
4231xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4232 name = "q8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4233 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4234 "test/q8-igemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4235 "test/gemm-microkernel-tester.h",
4236 "src/xnnpack/AlignedAllocator.h",
4237 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4238 deps = MICROKERNEL_TEST_DEPS,
4239)
4240
4241xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4242 name = "q8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4243 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4244 "test/q8-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4245 "test/dwconv-microkernel-tester.h",
4246 "src/xnnpack/AlignedAllocator.h",
4247 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4248 deps = MICROKERNEL_TEST_DEPS,
4249)
4250
4251xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4252 name = "q8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4253 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4254 "test/q8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4255 "test/gavgpool-microkernel-tester.h",
4256 "src/xnnpack/AlignedAllocator.h",
4257 ] + MICROKERNEL_TEST_HDRS,
4258 deps = MICROKERNEL_TEST_DEPS,
4259)
4260
4261xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4262 name = "q8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4263 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4264 "test/q8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4265 "test/gemm-microkernel-tester.h",
4266 "src/xnnpack/AlignedAllocator.h",
4267 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4268 deps = MICROKERNEL_TEST_DEPS,
4269)
4270
4271xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4272 name = "q8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4273 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4274 "test/q8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4275 "test/vadd-microkernel-tester.h",
4276 ] + MICROKERNEL_TEST_HDRS,
4277 deps = MICROKERNEL_TEST_DEPS,
4278)
4279
4280xnnpack_unit_test(
4281 name = "u8_clamp_test",
4282 srcs = [
4283 "test/u8-clamp.cc",
4284 "test/clamp-microkernel-tester.h",
4285 ] + MICROKERNEL_TEST_HDRS,
4286 deps = MICROKERNEL_TEST_DEPS,
4287)
4288
4289xnnpack_unit_test(
4290 name = "u8_lut32norm_test",
4291 srcs = [
4292 "test/u8-lut32norm.cc",
4293 "test/lut-norm-microkernel-tester.h",
4294 ] + MICROKERNEL_TEST_HDRS,
4295 deps = MICROKERNEL_TEST_DEPS,
4296)
4297
4298xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4299 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4300 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4301 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4302 "test/maxpool-microkernel-tester.h",
4303 ] + MICROKERNEL_TEST_HDRS,
4304 deps = MICROKERNEL_TEST_DEPS,
4305)
4306
4307xnnpack_unit_test(
4308 name = "u8_rmax_test",
4309 srcs = [
4310 "test/u8-rmax.cc",
4311 "test/rmax-microkernel-tester.h",
4312 ] + MICROKERNEL_TEST_HDRS,
4313 deps = MICROKERNEL_TEST_DEPS,
4314)
4315
4316xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]4317 name = "x32_fill_test",
4318 srcs = [
4319 "test/x32-fill.cc",
4320 "test/fill-microkernel-tester.h",
4321 ] + MICROKERNEL_TEST_HDRS,
4322 deps = MICROKERNEL_TEST_DEPS,
4323)
4324
4325xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4326 name = "x32_packx_test",
4327 srcs = [
4328 "test/x32-packx.cc",
4329 "test/pack-microkernel-tester.h",
4330 "src/xnnpack/AlignedAllocator.h",
4331 ] + MICROKERNEL_TEST_HDRS,
4332 deps = MICROKERNEL_TEST_DEPS,
4333)
4334
4335xnnpack_unit_test(
4336 name = "x32_pad_test",
4337 srcs = [
4338 "test/x32-pad.cc",
4339 "test/pad-microkernel-tester.h",
4340 ] + MICROKERNEL_TEST_HDRS,
4341 deps = MICROKERNEL_TEST_DEPS,
4342)
4343
4344xnnpack_unit_test(
4345 name = "x32_unpool_test",
4346 srcs = [
4347 "test/x32-unpool.cc",
4348 "test/unpool-microkernel-tester.h",
4349 ] + MICROKERNEL_TEST_HDRS,
4350 deps = MICROKERNEL_TEST_DEPS,
4351)
4352
4353xnnpack_unit_test(
4354 name = "x32_zip_test",
4355 srcs = [
4356 "test/x32-zip.cc",
4357 "test/zip-microkernel-tester.h",
4358 ] + MICROKERNEL_TEST_HDRS,
4359 deps = MICROKERNEL_TEST_DEPS,
4360)
4361
4362xnnpack_unit_test(
4363 name = "x8_lut_test",
4364 srcs = [
4365 "test/x8-lut.cc",
4366 "test/lut-microkernel-tester.h",
4367 ] + MICROKERNEL_TEST_HDRS,
4368 deps = MICROKERNEL_TEST_DEPS,
4369)
4370
4371xnnpack_unit_test(
4372 name = "x8_zip_test",
4373 srcs = [
4374 "test/x8-zip.cc",
4375 "test/zip-microkernel-tester.h",
4376 ] + MICROKERNEL_TEST_HDRS,
4377 deps = MICROKERNEL_TEST_DEPS,
4378)
4379
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]4380xnnpack_unit_test(
4381 name = "requantization_test",
4382 srcs = [
4383 "src/xnnpack/requantization-stubs.h",
4384 "test/requantization.cc",
4385 "test/requantization-tester.h",
4386 ] + MICROKERNEL_TEST_HDRS,
4387 deps = MICROKERNEL_TEST_DEPS,
4388)
4389
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4390########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4391
4392xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4393 name = "operator_size_test",
4394 srcs = ["test/operator-size.c"],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]4395 deps = [":xnnpack_operators_nhwc_f32"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4396)
4397
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4398xnnpack_binary(
4399 name = "subgraph_size_test",
4400 srcs = ["test/subgraph-size.c"],
4401 deps = [":XNNPACK"],
4402)
4403
4404########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4405
4406xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4407 name = "abs_nc_test",
4408 srcs = [
4409 "test/abs-nc.cc",
4410 "test/abs-operator-tester.h",
4411 ],
4412 deps = OPERATOR_TEST_DEPS,
4413)
4414
4415xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4416 name = "add_nd_test",
4417 srcs = [
4418 "test/add-nd.cc",
4419 "test/binary-elementwise-operator-tester.h",
4420 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4421 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4422)
4423
4424xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4425 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4426 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4427 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4428 "test/argmax-pooling-operator-tester.h",
4429 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4430 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4431)
4432
4433xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4434 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4435 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4436 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4437 "test/average-pooling-operator-tester.h",
4438 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4439 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4440)
4441
4442xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4443 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4444 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4445 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4446 "test/channel-shuffle-operator-tester.h",
4447 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4448 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4449)
4450
4451xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4452 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4453 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4454 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4455 "test/clamp-operator-tester.h",
4456 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4457 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4458)
4459
4460xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]4461 name = "constant_pad_nd_test",
4462 srcs = [
4463 "test/constant-pad-nd.cc",
4464 "test/constant-pad-operator-tester.h",
4465 ],
4466 deps = OPERATOR_TEST_DEPS,
4467)
4468
4469xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4470 name = "convolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4471 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4472 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4473 "test/convolution-operator-tester.h",
4474 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4475 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4476)
4477
4478xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4479 name = "convolution_nchw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4480 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4481 "test/convolution-nchw.cc",
4482 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4483 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4484 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4485)
4486
4487xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]4488 name = "copy_nc_test",
4489 srcs = [
4490 "test/copy-nc.cc",
4491 "test/copy-operator-tester.h",
4492 ],
4493 deps = OPERATOR_TEST_DEPS,
4494)
4495
4496xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4497 name = "deconvolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4498 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4499 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4500 "test/deconvolution-operator-tester.h",
4501 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4502 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4503)
4504
4505xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4506 name = "divide_nd_test",
4507 srcs = [
4508 "test/binary-elementwise-operator-tester.h",
4509 "test/divide-nd.cc",
4510 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4511 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4512)
4513
4514xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4515 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4516 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4517 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4518 "test/fully-connected-operator-tester.h",
4519 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4520 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4521)
4522
4523xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4524 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4525 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4526 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4527 "test/global-average-pooling-operator-tester.h",
4528 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4529 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4530)
4531
4532xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4533 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4534 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4535 "test/global-average-pooling-ncw.cc",
4536 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4537 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4538 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4539)
4540
4541xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4542 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4543 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4544 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4545 "test/hardswish-operator-tester.h",
4546 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4547 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4548)
4549
4550xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4551 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4552 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4553 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4554 "test/leaky-relu-operator-tester.h",
4555 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4556 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4557)
4558
4559xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4560 name = "max_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4561 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4562 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4563 "test/max-pooling-operator-tester.h",
4564 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4565 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4566)
4567
4568xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4569 name = "maximum_nd_test",
4570 srcs = [
4571 "test/binary-elementwise-operator-tester.h",
4572 "test/maximum-nd.cc",
4573 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4574 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4575)
4576
4577xnnpack_unit_test(
4578 name = "minimum_nd_test",
4579 srcs = [
4580 "test/binary-elementwise-operator-tester.h",
4581 "test/minimum-nd.cc",
4582 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4583 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4584)
4585
4586xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4587 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4588 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4589 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4590 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4591 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4592 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4593)
4594
4595xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4596 name = "negate_nc_test",
4597 srcs = [
4598 "test/negate-nc.cc",
4599 "test/negate-operator-tester.h",
4600 ],
4601 deps = OPERATOR_TEST_DEPS,
4602)
4603
4604xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4605 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4606 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4607 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4608 "test/prelu-operator-tester.h",
4609 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4610 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4611)
4612
4613xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4614 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4615 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4616 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4617 "test/resize-bilinear-operator-tester.h",
4618 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4619 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4620)
4621
4622xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4623 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4624 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4625 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4626 "test/sigmoid-operator-tester.h",
4627 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4628 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4629)
4630
4631xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4632 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4633 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4634 "test/softmax-nc.cc",
4635 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4636 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4637 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4638)
4639
4640xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4641 name = "square_nc_test",
4642 srcs = [
4643 "test/square-nc.cc",
4644 "test/square-operator-tester.h",
4645 ],
4646 deps = OPERATOR_TEST_DEPS,
4647)
4648
4649xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]4650 name = "squared_difference_nd_test",
4651 srcs = [
4652 "test/binary-elementwise-operator-tester.h",
4653 "test/squared-difference-nd.cc",
4654 ],
4655 deps = OPERATOR_TEST_DEPS,
4656)
4657
4658xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]4659 name = "subtract_nd_test",
4660 srcs = [
4661 "test/binary-elementwise-operator-tester.h",
4662 "test/subtract-nd.cc",
4663 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4664 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]4665)
4666
4667xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4668 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4669 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4670 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4671 "test/unpooling-operator-tester.h",
4672 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4673 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4674)
4675
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]4676############################### Misc unit tests ###############################
4677
4678xnnpack_unit_test(
4679 name = "memory_planner_test",
4680 srcs = [
4681 "test/memory-planner-test.cc",
4682 ],
4683 deps = [
4684 ":XNNPACK",
4685 ":memory_planner",
4686 ],
4687)
4688
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4689############################# Build configurations #############################
4690
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4691# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4692config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4693 name = "xnn_enable_assembly_explicit_true",
4694 define_values = {"xnn_enable_assembly": "true"},
4695)
4696
4697# Disables usage of assembly kernels.
4698config_setting(
4699 name = "xnn_enable_assembly_explicit_false",
4700 define_values = {"xnn_enable_assembly": "false"},
4701)
4702
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]4703# Disables usage of HMP-aware optimizations.
4704config_setting(
4705 name = "xnn_enable_hmp_explicit_false",
4706 define_values = {"xnn_enable_hmp": "false"},
4707)
4708
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]4709# Enable usage of optimized memory allocation
4710config_setting(
4711 name = "xnn_enable_memopt_explicit_true",
4712 define_values = {"xnnpack_enable_memopt": "true"},
4713)
4714
4715# Disable usage of optimized memory allocation
4716config_setting(
4717 name = "xnn_enable_memopt_explicit_false",
4718 define_values = {"xnnpack_enable_memopt": "false"},
4719)
4720
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4721# Builds with -c dbg
4722config_setting(
4723 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4724 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4725 "compilation_mode": "dbg",
4726 },
4727)
4728
4729# Builds with -c opt
4730config_setting(
4731 name = "optimized_build",
4732 values = {
4733 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4734 },
4735)
4736
4737config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4738 name = "linux_k8",
4739 values = {"cpu": "k8"},
4740)
4741
4742config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]4743 name = "linux_arm",
4744 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -0700[diff] [blame]4745)
4746
4747config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -0700[diff] [blame]4748 name = "linux_armhf",
4749 values = {"cpu": "armhf"},
4750)
4751
4752config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]4753 name = "linux_aarch64",
4754 values = {"cpu": "aarch64"},
4755)
4756
4757config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4758 name = "android",
4759 values = {"crosstool_top": "//external:android/crosstool"},
4760)
4761
4762config_setting(
4763 name = "android_armv7",
4764 values = {
4765 "crosstool_top": "//external:android/crosstool",
4766 "cpu": "armeabi-v7a",
4767 },
4768)
4769
4770config_setting(
4771 name = "android_arm64",
4772 values = {
4773 "crosstool_top": "//external:android/crosstool",
4774 "cpu": "arm64-v8a",
4775 },
4776)
4777
4778config_setting(
4779 name = "android_x86",
4780 values = {
4781 "crosstool_top": "//external:android/crosstool",
4782 "cpu": "x86",
4783 },
4784)
4785
4786config_setting(
4787 name = "android_x86_64",
4788 values = {
4789 "crosstool_top": "//external:android/crosstool",
4790 "cpu": "x86_64",
4791 },
4792)
4793
4794config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]4795 name = "windows_x86_64",
4796 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]4797)
4798
4799config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]4800 name = "windows_x86_64_clang",
4801 values = {
4802 "compiler": "clang-cl",
4803 "cpu": "x64_windows",
4804 },
4805)
4806
4807config_setting(
4808 name = "windows_x86_64_mingw",
4809 values = {
4810 "compiler": "mingw-gcc",
4811 "cpu": "x64_windows",
4812 },
4813)
4814
4815config_setting(
4816 name = "windows_x86_64_msys",
4817 values = {
4818 "compiler": "msys-gcc",
4819 "cpu": "x64_windows",
4820 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]4821)
4822
4823config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -0700[diff] [blame]4824 name = "macos_x86_64",
4825 values = {
4826 "apple_platform_type": "macos",
4827 "cpu": "darwin",
4828 },
4829)
4830
4831config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4832 name = "emscripten",
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]4833 values = {"crosstool_top": "//toolchain:emscripten"},
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4834)
4835
4836config_setting(
4837 name = "emscripten_wasm",
4838 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]4839 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4840 "cpu": "wasm",
4841 },
4842)
4843
4844config_setting(
4845 name = "emscripten_wasmsimd",
4846 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]4847 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4848 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -0700[diff] [blame]4849 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4850 },
4851)
4852
4853config_setting(
4854 name = "emscripten_asmjs",
4855 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]4856 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4857 "cpu": "asmjs",
4858 },
4859)
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4860
4861config_setting(
4862 name = "ios_armv7",
4863 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4864 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4865 "cpu": "ios_armv7",
4866 },
4867)
4868
4869config_setting(
4870 name = "ios_arm64",
4871 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4872 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4873 "cpu": "ios_arm64",
4874 },
4875)
4876
4877config_setting(
4878 name = "ios_arm64e",
4879 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4880 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4881 "cpu": "ios_arm64e",
4882 },
4883)
4884
4885config_setting(
4886 name = "ios_x86",
4887 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4888 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4889 "cpu": "ios_i386",
4890 },
4891)
4892
4893config_setting(
4894 name = "ios_x86_64",
4895 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4896 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4897 "cpu": "ios_x86_64",
4898 },
4899)
4900
4901config_setting(
4902 name = "watchos_armv7k",
4903 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4904 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4905 "cpu": "watchos_armv7k",
4906 },
4907)
4908
4909config_setting(
4910 name = "watchos_arm64_32",
4911 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4912 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4913 "cpu": "watchos_arm64_32",
4914 },
4915)
4916
4917config_setting(
4918 name = "watchos_x86",
4919 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4920 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4921 "cpu": "watchos_i386",
4922 },
4923)
4924
4925config_setting(
4926 name = "watchos_x86_64",
4927 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4928 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4929 "cpu": "watchos_x86_64",
4930 },
4931)
4932
4933config_setting(
4934 name = "tvos_arm64",
4935 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4936 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4937 "cpu": "tvos_arm64",
4938 },
4939)
4940
4941config_setting(
4942 name = "tvos_x86_64",
4943 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]4944 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]4945 "cpu": "tvos_x86_64",
4946 },
4947)