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gerrit-public.fairphone.software / platform / external / XNNPACK / f4db2f3184f0c4a21a512e5b5e3c59eae1de9802 / . / BUILD.bazel
blob: 4f20594313e5acc33691f26973bbe82d0f06c13f [file] [log] [blame]
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1# Copyright 2019 Google LLC
2#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]9load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]10
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]11licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]15OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -0700[diff] [blame]19 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]20 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]23MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]26 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]27 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]32ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]39MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]40 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]41 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]42 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]47OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]48 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]49 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]53OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]54 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]57 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]58 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]59 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
62 "src/operators/fully-connected-nc.c",
63 "src/operators/global-average-pooling-ncw.c",
64 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]65 "src/operators/leaky-relu-nc.c",
66 "src/operators/max-pooling-nhwc.c",
67 "src/operators/prelu-nc.c",
68 "src/operators/resize-bilinear-nhwc.c",
69 "src/operators/sigmoid-nc.c",
70 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -0700[diff] [blame]71 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]72 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]73]
74
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]75SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]76 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]77 "src/subgraph/add2.c",
78 "src/subgraph/argmax-pooling-2d.c",
79 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]80 "src/subgraph/bankers-rounding.c",
81 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]82 "src/subgraph/clamp.c",
83 "src/subgraph/convolution-2d.c",
84 "src/subgraph/deconvolution-2d.c",
85 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]86 "src/subgraph/divide.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]87 "src/subgraph/fully-connected.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]88 "src/subgraph/floor.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -0700[diff] [blame]89 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]90 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -0700[diff] [blame]91 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]92 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]93 "src/subgraph/maximum2.c",
94 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]95 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]96 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]97 "src/subgraph/prelu.c",
98 "src/subgraph/sigmoid.c",
99 "src/subgraph/softmax.c",
100 "src/subgraph/static-constant-pad.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]101 "src/subgraph/square.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]102 "src/subgraph/squared-difference.c",
103 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]104 "src/subgraph/unpooling-2d.c",
105]
106
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]107TABLE_SRCS = [
108 "src/tables/exp2-k-over-64.c",
109 "src/tables/exp2-k-over-2048.c",
110]
111
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]112SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]113 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]114 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]115 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]116 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
117 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]118 "src/f32-clamp/gen/scalar-x1.c",
119 "src/f32-clamp/gen/scalar-x2.c",
120 "src/f32-clamp/gen/scalar-x4.c",
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]121 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Marat Dukhan6b7dfae2019-12-04 16:00:52 -0800[diff] [blame]122 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]123 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
124 "src/f32-dwconv-chw/3x3p1-scalar.c",
125 "src/f32-dwconv-chw/3x3s2p1-scalar.c",
126 "src/f32-dwconv-chw/5x5p2-scalar.c",
127 "src/f32-dwconv-chw/5x5s2p2-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]128 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
129 "src/f32-dwconv/gen/up1x4-scalar.c",
130 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
131 "src/f32-dwconv/gen/up1x9-scalar.c",
132 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
133 "src/f32-dwconv/gen/up1x25-scalar.c",
134 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
135 "src/f32-dwconv/gen/up2x4-scalar.c",
136 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
137 "src/f32-dwconv/gen/up2x9-scalar.c",
138 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
139 "src/f32-dwconv/gen/up2x25-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]140 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
142 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
143 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]144 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]150 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
151 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]152 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]153 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
154 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]155 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
156 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
157 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]158 "src/f32-gemm/gen/1x4-scalar.c",
159 "src/f32-gemm/gen/2x4-scalar.c",
160 "src/f32-gemm/gen/4x2-scalar.c",
161 "src/f32-gemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]162 "src/f32-gemm/gen/1x4-relu-scalar.c",
163 "src/f32-gemm/gen/2x4-relu-scalar.c",
164 "src/f32-gemm/gen/4x2-relu-scalar.c",
165 "src/f32-gemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]166 "src/f32-gemm/gen/1x4-minmax-scalar.c",
167 "src/f32-gemm/gen/2x4-minmax-scalar.c",
168 "src/f32-gemm/gen/4x2-minmax-scalar.c",
169 "src/f32-gemm/gen/4x4-minmax-scalar.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]170 "src/f32-hswish/gen/scalar-x1.c",
171 "src/f32-hswish/gen/scalar-x2.c",
172 "src/f32-hswish/gen/scalar-x4.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]173 "src/f32-ibilinear/gen/scalar-c1.c",
174 "src/f32-ibilinear/gen/scalar-c2.c",
175 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]176 "src/f32-igemm/gen/1x4-scalar.c",
177 "src/f32-igemm/gen/2x4-scalar.c",
178 "src/f32-igemm/gen/4x2-scalar.c",
179 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]180 "src/f32-igemm/gen/1x4-relu-scalar.c",
181 "src/f32-igemm/gen/2x4-relu-scalar.c",
182 "src/f32-igemm/gen/4x2-relu-scalar.c",
183 "src/f32-igemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]184 "src/f32-igemm/gen/1x4-minmax-scalar.c",
185 "src/f32-igemm/gen/2x4-minmax-scalar.c",
186 "src/f32-igemm/gen/4x2-minmax-scalar.c",
187 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]188 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
189 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
190 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]191 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
192 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
193 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
194 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]195 "src/f32-prelu/gen/scalar-2x1.c",
196 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]197 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
198 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
199 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
200 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
201 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
202 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
203 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
204 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
205 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
206 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
207 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
208 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]209 "src/f32-rmax/scalar.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]210 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x1.c",
211 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x2.c",
212 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x4.c",
213 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x1.c",
214 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x2.c",
215 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x4.c",
216 "src/f32-sigmoid/gen/scalar-p5-div-x1.c",
217 "src/f32-sigmoid/gen/scalar-p5-div-x2.c",
218 "src/f32-sigmoid/gen/scalar-p5-div-x4.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]219 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
220 "src/f32-spmm/gen/1x1-minmax-scalar.c",
221 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
222 "src/f32-spmm/gen/2x1-minmax-scalar.c",
223 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
224 "src/f32-spmm/gen/4x1-minmax-scalar.c",
225 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
226 "src/f32-spmm/gen/8x1-minmax-scalar.c",
227 "src/f32-spmm/gen/8x2-minmax-scalar.c",
228 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]229 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
230 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
231 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
232 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
233 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
234 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
235 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
236 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
237 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
238 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
239 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
240 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]241 "src/f32-vbinary/gen/vmax-scalar-x1.c",
242 "src/f32-vbinary/gen/vmax-scalar-x2.c",
243 "src/f32-vbinary/gen/vmax-scalar-x4.c",
244 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
245 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
246 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
247 "src/f32-vbinary/gen/vmin-scalar-x1.c",
248 "src/f32-vbinary/gen/vmin-scalar-x2.c",
249 "src/f32-vbinary/gen/vmin-scalar-x4.c",
250 "src/f32-vbinary/gen/vminc-scalar-x1.c",
251 "src/f32-vbinary/gen/vminc-scalar-x2.c",
252 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]253 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
254 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
255 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
256 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
257 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
258 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
259 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
260 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
261 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
262 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
263 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
264 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]265 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
266 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
267 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
268 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
269 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
270 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]271 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
272 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
273 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
274 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
275 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
276 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]277 "src/f32-vlrelu/gen/scalar-x1.c",
278 "src/f32-vlrelu/gen/scalar-x2.c",
279 "src/f32-vlrelu/gen/scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]280 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
281 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
282 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]283 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
284 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
285 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
286 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
287 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
288 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
289 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
290 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
291 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
292 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
293 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
294 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame^]295 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
296 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
297 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]298 "src/f32-vunary/gen/vabs-scalar-x1.c",
299 "src/f32-vunary/gen/vabs-scalar-x2.c",
300 "src/f32-vunary/gen/vabs-scalar-x4.c",
301 "src/f32-vunary/gen/vneg-scalar-x1.c",
302 "src/f32-vunary/gen/vneg-scalar-x2.c",
303 "src/f32-vunary/gen/vneg-scalar-x4.c",
304 "src/f32-vunary/gen/vsqr-scalar-x1.c",
305 "src/f32-vunary/gen/vsqr-scalar-x2.c",
306 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]307 "src/math/expminus-scalar-lut2048-p1.c",
308 "src/math/expminus-scalar-lut64-p2.c",
309 "src/math/expminus-scalar-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]310 "src/math/roundne-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]311 "src/math/roundne-scalar-nearbyint.c",
312 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]313 "src/math/roundd-scalar-addsub.c",
314 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]315 "src/math/roundd-scalar-floor.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]316 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]317 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]318 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]319 "src/math/roundz-scalar-addsub.c",
320 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]321 "src/math/roundz-scalar-trunc.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]322 "src/math/sigmoid-scalar-lut2048-p1-div.c",
323 "src/math/sigmoid-scalar-lut64-p2-div.c",
324 "src/math/sigmoid-scalar-p5-div.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]325 "src/q8-avgpool/9p8x-minmax-scalar-c1.c",
326 "src/q8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]327 "src/q8-dwconv/up1x9-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]328 "src/q8-gavgpool/7p7x-minmax-scalar-c1.c",
329 "src/q8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]330 "src/q8-gemm/2x2-minmax-scalar.c",
331 "src/q8-igemm/2x2-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]332 "src/q8-vadd/minmax-scalar.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]333 "src/u8-clamp/scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]334 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]335 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]336 "src/u8-rmax/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]337 "src/x32-fill/scalar-float.c",
338 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]339 "src/x32-packx/x2-scalar.c",
340 "src/x32-packx/x3-scalar.c",
341 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]342 "src/x32-pad/scalar-int.c",
343 "src/x32-pad/scalar-float.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]344 "src/x32-unpool/scalar.c",
345 "src/x32-zip/x2-scalar.c",
346 "src/x32-zip/x3-scalar.c",
347 "src/x32-zip/x4-scalar.c",
348 "src/x32-zip/xm-scalar.c",
349 "src/x8-lut/scalar.c",
350 "src/x8-zip/x2-scalar.c",
351 "src/x8-zip/x3-scalar.c",
352 "src/x8-zip/x4-scalar.c",
353 "src/x8-zip/xm-scalar.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]354 "src/requantization/precise-scalar.c",
355 "src/requantization/fp32-scalar.c",
356 "src/requantization/q31-scalar.c",
357 "src/requantization/gemmlowp-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]358]
359
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]360WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]361 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
362 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]363 "src/f32-clamp/gen/wasm-x1.c",
364 "src/f32-clamp/gen/wasm-x2.c",
365 "src/f32-clamp/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]366 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
367 "src/f32-dwconv/gen/up1x4-wasm.c",
368 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
369 "src/f32-dwconv/gen/up1x9-wasm.c",
370 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
371 "src/f32-dwconv/gen/up1x25-wasm.c",
372 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
373 "src/f32-dwconv/gen/up2x4-wasm.c",
374 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
375 "src/f32-dwconv/gen/up2x9-wasm.c",
376 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
377 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]378 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
379 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
380 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
381 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]382 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
383 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]384 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
385 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
386 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
387 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]388 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
389 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]390 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
391 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]392 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
393 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
394 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]395 "src/f32-gemm/gen/1x4-wasm.c",
396 "src/f32-gemm/gen/2x4-wasm.c",
397 "src/f32-gemm/gen/4x2-wasm.c",
398 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]399 "src/f32-gemm/gen/1x4-relu-wasm.c",
400 "src/f32-gemm/gen/2x4-relu-wasm.c",
401 "src/f32-gemm/gen/4x2-relu-wasm.c",
402 "src/f32-gemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]403 "src/f32-gemm/gen/1x4-minmax-wasm.c",
404 "src/f32-gemm/gen/2x4-minmax-wasm.c",
405 "src/f32-gemm/gen/4x2-minmax-wasm.c",
406 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]407 "src/f32-hswish/gen/wasm-x1.c",
408 "src/f32-hswish/gen/wasm-x2.c",
409 "src/f32-hswish/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]410 "src/f32-igemm/gen/1x4-wasm.c",
411 "src/f32-igemm/gen/2x4-wasm.c",
412 "src/f32-igemm/gen/4x2-wasm.c",
413 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]414 "src/f32-igemm/gen/1x4-relu-wasm.c",
415 "src/f32-igemm/gen/2x4-relu-wasm.c",
416 "src/f32-igemm/gen/4x2-relu-wasm.c",
417 "src/f32-igemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]418 "src/f32-igemm/gen/1x4-minmax-wasm.c",
419 "src/f32-igemm/gen/2x4-minmax-wasm.c",
420 "src/f32-igemm/gen/4x2-minmax-wasm.c",
421 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]422 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
423 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
424 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan7c1f8082020-06-25 13:26:20 -0700[diff] [blame]425 "src/f32-prelu/gen/wasm-2x1.c",
426 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]427 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
428 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
429 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
430 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
431 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
432 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
433 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
434 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
435 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
436 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
437 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
438 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]439 "src/f32-vbinary/gen/vmax-wasm-x1.c",
440 "src/f32-vbinary/gen/vmax-wasm-x2.c",
441 "src/f32-vbinary/gen/vmax-wasm-x4.c",
442 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
443 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
444 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
445 "src/f32-vbinary/gen/vmin-wasm-x1.c",
446 "src/f32-vbinary/gen/vmin-wasm-x2.c",
447 "src/f32-vbinary/gen/vmin-wasm-x4.c",
448 "src/f32-vbinary/gen/vminc-wasm-x1.c",
449 "src/f32-vbinary/gen/vminc-wasm-x2.c",
450 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]451 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
452 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
453 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
454 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
455 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
456 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
457 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
458 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
459 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
460 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
461 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
462 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
463 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
464 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
465 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
466 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
467 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
468 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]469 "src/f32-vlrelu/gen/wasm-x1.c",
470 "src/f32-vlrelu/gen/wasm-x2.c",
471 "src/f32-vlrelu/gen/wasm-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]472 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
473 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
474 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]475]
476
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]477WASMSIMD_UKERNELS = [
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]478 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
479 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
480 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
481 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
482 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
483 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700[diff] [blame]484 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-arm.c",
485 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
486 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-arm.c",
487 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
488 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-arm.c",
489 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
490 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-arm.c",
491 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
492 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-arm.c",
493 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
494 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-arm.c",
495 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
496 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-x86.c",
497 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
498 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-x86.c",
499 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
500 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-x86.c",
501 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
502 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-x86.c",
503 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
504 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-x86.c",
505 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
506 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-x86.c",
507 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]508 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
509 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
510 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
511 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-arm.c",
512 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat-arm.c",
513 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-x86.c",
514 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]515 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
516 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
517 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
518 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
519 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
520 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
521 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
522 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
523 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
524 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
525 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
526 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
527 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
528 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
529 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
530 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
531 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
532 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
533 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
534 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
535 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
536 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
537 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
538 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
539 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
540 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
541 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
542 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
543 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
544 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
545 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-arm.c",
546 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-arm.c",
547 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
548 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-arm.c",
549 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-arm.c",
550 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
551 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-arm.c",
552 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-arm.c",
553 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
554 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-arm.c",
555 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-arm.c",
556 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
557 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-arm.c",
558 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-arm.c",
559 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
560 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-x86.c",
561 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-x86.c",
562 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
563 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-x86.c",
564 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-x86.c",
565 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
566 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-x86.c",
567 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-x86.c",
568 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
569 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-x86.c",
570 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-x86.c",
571 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
572 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-x86.c",
573 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-x86.c",
574 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]575 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
576 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
577 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
578 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-arm.c",
579 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat-arm.c",
580 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-x86.c",
581 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]582 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
583 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
584 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
585 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
586 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
587 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
588 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
589 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
590 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
591 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
592 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
593 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
594 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
595 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
596 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
597 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
598 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
599 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
600 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
601 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
602 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
603 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
604 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
605 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
606 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
607 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
608 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
609 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
610 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
611 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhan9baec802020-06-25 21:34:35 -0700[diff] [blame]612 "src/f32-hswish/gen/wasmsimd-arm-x4.c",
613 "src/f32-hswish/gen/wasmsimd-arm-x8.c",
Marat Dukhanc303fe62020-06-26 10:09:25 -0700[diff] [blame]614 "src/f32-hswish/gen/wasmsimd-arm-x16.c",
Marat Dukhan9baec802020-06-25 21:34:35 -0700[diff] [blame]615 "src/f32-hswish/gen/wasmsimd-x86-x4.c",
616 "src/f32-hswish/gen/wasmsimd-x86-x8.c",
Marat Dukhanc303fe62020-06-26 10:09:25 -0700[diff] [blame]617 "src/f32-hswish/gen/wasmsimd-x86-x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -0700[diff] [blame]618 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
619 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
620 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
621 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]622 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c",
623 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c",
624 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c",
625 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]626 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c",
627 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c",
628 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c",
629 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]630 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c",
631 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c",
632 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c",
633 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]634 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c",
635 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c",
636 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c",
637 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]638 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c",
639 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c",
640 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c",
641 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]642 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c",
643 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c",
644 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c",
645 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]646 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c",
647 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c",
648 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c",
649 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]650 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c",
651 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c",
652 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c",
653 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]654 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c",
655 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c",
656 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c",
657 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]658 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c",
659 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c",
660 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c",
661 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c",
662 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c",
663 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c",
664 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c",
665 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]666 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c",
667 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c",
668 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c",
669 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]670 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c",
671 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]672 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c",
673 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame]674 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c",
675 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c",
676 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c",
677 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]678 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c",
679 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c",
680 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c",
681 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c",
Marat Dukhan72b399a2020-06-28 22:41:38 -0700[diff] [blame]682 "src/f32-vrnd/gen/vrndne-wasmsimd-x4.c",
683 "src/f32-vrnd/gen/vrndne-wasmsimd-x8.c",
684 "src/f32-vrnd/gen/vrndz-wasmsimd-x4.c",
685 "src/f32-vrnd/gen/vrndz-wasmsimd-x8.c",
686 "src/f32-vrnd/gen/vrndu-wasmsimd-x4.c",
687 "src/f32-vrnd/gen/vrndu-wasmsimd-x8.c",
688 "src/f32-vrnd/gen/vrndd-wasmsimd-x4.c",
689 "src/f32-vrnd/gen/vrndd-wasmsimd-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame^]690 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
691 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
Marat Dukhan37c83512020-06-29 13:25:53 -0700[diff] [blame]692 "src/f32-vunary/gen/vabs-wasmsimd-x4.c",
693 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
694 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
695 "src/f32-vunary/gen/vneg-wasmsimd-x8.c",
696 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
697 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhand3f3d872020-06-24 13:08:25 -0700[diff] [blame]698 "src/math/roundne-wasmsimd-addsub.c",
699 "src/math/roundd-wasmsimd-addsub.c",
700 "src/math/roundu-wasmsimd-addsub.c",
701 "src/math/roundz-wasmsimd-addsub.c",
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]702 "src/requantization/fp32-wasmsimd.c",
703]
704
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]705PSIMD_FASTMATH_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]706 "src/f32-argmaxpool/4x-psimd-c4.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]707 "src/f32-argmaxpool/9p8x-psimd-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]708 "src/f32-argmaxpool/9x-psimd-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]709 "src/f32-avgpool/9p8x-minmax-psimd-c4.c",
710 "src/f32-avgpool/9x-minmax-psimd-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]711 "src/f32-clamp/gen/psimd-x4.c",
712 "src/f32-clamp/gen/psimd-x8.c",
Erich Elsen0a1970e2020-06-10 09:24:59 -0700[diff] [blame]713 "src/f32-conv-hwc2chw/3x3s2p1c3x4-psimd-2x2.c",
Erich Elsene6214af2020-06-10 22:17:22 -0700[diff] [blame]714 "src/f32-dwconv-chw/3x3p1-psimd.c",
Erich Elsenfd7a6e32020-06-11 12:04:44 -0700[diff] [blame]715 "src/f32-dwconv-chw/3x3s2p1-psimd.c",
Erich Elsen28928892020-06-12 08:08:19 -0700[diff] [blame]716 "src/f32-dwconv-chw/5x5p2-psimd.c",
Erich Elsen7465a892020-06-13 14:02:04 -0700[diff] [blame]717 "src/f32-dwconv-chw/5x5s2p2-psimd.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]718 "src/f32-dwconv/gen/up4x25-minmax-psimd-acc2.c",
719 "src/f32-dwconv/gen/up4x25-minmax-psimd.c",
720 "src/f32-dwconv/gen/up4x4-minmax-psimd-acc2.c",
721 "src/f32-dwconv/gen/up4x4-minmax-psimd.c",
722 "src/f32-dwconv/gen/up4x9-minmax-psimd-acc2.c",
723 "src/f32-dwconv/gen/up4x9-minmax-psimd.c",
724 "src/f32-dwconv/gen/up8x25-minmax-psimd-acc2.c",
725 "src/f32-dwconv/gen/up8x25-minmax-psimd.c",
726 "src/f32-dwconv/gen/up8x4-minmax-psimd-acc2.c",
727 "src/f32-dwconv/gen/up8x4-minmax-psimd.c",
728 "src/f32-dwconv/gen/up8x9-minmax-psimd-acc2.c",
729 "src/f32-dwconv/gen/up8x9-minmax-psimd.c",
Erich Elsen6f278b52020-06-10 16:13:11 -0700[diff] [blame]730 "src/f32-gavgpool-cw/psimd-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]731 "src/f32-gavgpool/7p7x-minmax-psimd-c4.c",
732 "src/f32-gavgpool/7x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]733 "src/f32-gemm/gen/1x8-minmax-psimd-loadsplat.c",
734 "src/f32-gemm/gen/1x8-minmax-psimd-splat.c",
735 "src/f32-gemm/gen/1x8s4-minmax-psimd.c",
736 "src/f32-gemm/gen/4x2c4-minmax-psimd.c",
737 "src/f32-gemm/gen/4x8-minmax-psimd-loadsplat.c",
738 "src/f32-gemm/gen/4x8-minmax-psimd-splat.c",
739 "src/f32-gemm/gen/4x8s4-minmax-psimd.c",
740 "src/f32-gemm/gen/6x8-minmax-psimd-loadsplat.c",
741 "src/f32-gemm/gen/6x8-minmax-psimd-splat.c",
742 "src/f32-gemm/gen/6x8s4-minmax-psimd.c",
743 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-loadsplat.c",
744 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-splat.c",
745 "src/f32-gemm/gen-inc/1x8s4inc-minmax-psimd.c",
746 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-loadsplat.c",
747 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-splat.c",
748 "src/f32-gemm/gen-inc/4x8s4inc-minmax-psimd.c",
749 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-loadsplat.c",
750 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-splat.c",
751 "src/f32-gemm/gen-inc/6x8s4inc-minmax-psimd.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]752 "src/f32-hswish/gen/psimd-x4.c",
753 "src/f32-hswish/gen/psimd-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]754 "src/f32-ibilinear/gen/psimd-c4.c",
755 "src/f32-ibilinear/gen/psimd-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]756 "src/f32-igemm/gen/1x8-minmax-psimd-loadsplat.c",
757 "src/f32-igemm/gen/1x8-minmax-psimd-splat.c",
758 "src/f32-igemm/gen/1x8s4-minmax-psimd.c",
759 "src/f32-igemm/gen/4x2c4-minmax-psimd.c",
760 "src/f32-igemm/gen/4x8-minmax-psimd-loadsplat.c",
761 "src/f32-igemm/gen/4x8-minmax-psimd-splat.c",
762 "src/f32-igemm/gen/4x8s4-minmax-psimd.c",
763 "src/f32-igemm/gen/6x8-minmax-psimd-loadsplat.c",
764 "src/f32-igemm/gen/6x8-minmax-psimd-splat.c",
765 "src/f32-igemm/gen/6x8s4-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]766 "src/f32-maxpool/9p8x-minmax-psimd-c4.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]767 "src/f32-spmm/gen/4x1-minmax-psimd.c",
768 "src/f32-spmm/gen/8x1-minmax-psimd.c",
769 "src/f32-spmm/gen/16x1-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]770 "src/f32-pavgpool/9p8x-minmax-psimd-c4.c",
771 "src/f32-pavgpool/9x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]772 "src/f32-ppmm/gen/4x8-minmax-psimd.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]773 "src/f32-prelu/gen/psimd-2x4.c",
774 "src/f32-prelu/gen/psimd-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]775 "src/f32-rmax/psimd.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]776 "src/f32-vbinary/gen/vadd-minmax-psimd-x4.c",
777 "src/f32-vbinary/gen/vadd-minmax-psimd-x8.c",
778 "src/f32-vbinary/gen/vaddc-minmax-psimd-x4.c",
779 "src/f32-vbinary/gen/vaddc-minmax-psimd-x8.c",
780 "src/f32-vbinary/gen/vdiv-minmax-psimd-x4.c",
781 "src/f32-vbinary/gen/vdiv-minmax-psimd-x8.c",
782 "src/f32-vbinary/gen/vdivc-minmax-psimd-x4.c",
783 "src/f32-vbinary/gen/vdivc-minmax-psimd-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]784 "src/f32-vbinary/gen/vmax-psimd-x4.c",
785 "src/f32-vbinary/gen/vmax-psimd-x8.c",
786 "src/f32-vbinary/gen/vmaxc-psimd-x4.c",
787 "src/f32-vbinary/gen/vmaxc-psimd-x8.c",
788 "src/f32-vbinary/gen/vmin-psimd-x4.c",
789 "src/f32-vbinary/gen/vmin-psimd-x8.c",
790 "src/f32-vbinary/gen/vminc-psimd-x4.c",
791 "src/f32-vbinary/gen/vminc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]792 "src/f32-vbinary/gen/vmul-minmax-psimd-x4.c",
793 "src/f32-vbinary/gen/vmul-minmax-psimd-x8.c",
794 "src/f32-vbinary/gen/vmulc-minmax-psimd-x4.c",
795 "src/f32-vbinary/gen/vmulc-minmax-psimd-x8.c",
796 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x4.c",
797 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x8.c",
798 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x4.c",
799 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]800 "src/f32-vbinary/gen/vsqrdiff-psimd-x4.c",
801 "src/f32-vbinary/gen/vsqrdiff-psimd-x8.c",
802 "src/f32-vbinary/gen/vsqrdiffc-psimd-x4.c",
803 "src/f32-vbinary/gen/vsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]804 "src/f32-vbinary/gen/vsub-minmax-psimd-x4.c",
805 "src/f32-vbinary/gen/vsub-minmax-psimd-x8.c",
806 "src/f32-vbinary/gen/vsubc-minmax-psimd-x4.c",
807 "src/f32-vbinary/gen/vsubc-minmax-psimd-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]808 "src/f32-vlrelu/gen/psimd-x4.c",
809 "src/f32-vlrelu/gen/psimd-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]810 "src/f32-vmulcaddc/gen/c4-minmax-psimd-2x.c",
811 "src/f32-vmulcaddc/gen/c8-minmax-psimd-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]812 "src/f32-vunary/gen/vabs-psimd-x4.c",
813 "src/f32-vunary/gen/vabs-psimd-x8.c",
814 "src/f32-vunary/gen/vneg-psimd-x4.c",
815 "src/f32-vunary/gen/vneg-psimd-x8.c",
816 "src/f32-vunary/gen/vsqr-psimd-x4.c",
817 "src/f32-vunary/gen/vsqr-psimd-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]818 "src/x32-fill/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]819 "src/x32-packx/x4-psimd.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]820 "src/x32-pad/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]821 "src/x32-unpool/psimd.c",
822 "src/x32-zip/x2-psimd.c",
823 "src/x32-zip/x3-psimd.c",
824 "src/x32-zip/x4-psimd.c",
825 "src/x32-zip/xm-psimd.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]826 "src/requantization/precise-psimd.c",
827 "src/requantization/fp32-psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]828]
829
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]830PSIMD_ACCMATH_UKERNELS = [
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]831 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x4.c",
832 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8.c",
833 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8-acc2.c",
834 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12.c",
835 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc2.c",
836 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc3.c",
837 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16.c",
838 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc2.c",
839 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc4.c",
840 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20.c",
841 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc2.c",
842 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]843 "src/f32-sigmoid/gen/psimd-p5-div-x4.c",
844 "src/f32-sigmoid/gen/psimd-p5-div-x8.c",
845 "src/f32-sigmoid/gen/psimd-p5-div-x12.c",
846 "src/f32-sigmoid/gen/psimd-p5-div-x16.c",
847 "src/f32-sigmoid/gen/psimd-p5-div-x20.c",
848 "src/f32-sigmoid/gen/psimd-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]849 "src/f32-vrnd/gen/vrndne-psimd-x4.c",
850 "src/f32-vrnd/gen/vrndne-psimd-x8.c",
851 "src/f32-vrnd/gen/vrndz-psimd-x4.c",
852 "src/f32-vrnd/gen/vrndz-psimd-x8.c",
853 "src/f32-vrnd/gen/vrndu-psimd-x4.c",
854 "src/f32-vrnd/gen/vrndu-psimd-x8.c",
855 "src/f32-vrnd/gen/vrndd-psimd-x4.c",
856 "src/f32-vrnd/gen/vrndd-psimd-x8.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]857 "src/math/roundne-psimd-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]858 "src/math/roundd-psimd-addsub.c",
859 "src/math/roundu-psimd-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]860 "src/math/roundz-psimd-addsub.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]861 "src/math/sigmoid-psimd-p5-div.c",
862]
863
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]864# ISA-specific micro-kernels
865NEON_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]866 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
867 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]868 "src/f32-clamp/gen/neon-x4.c",
869 "src/f32-clamp/gen/neon-x8.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]870 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
871 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]872 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
873 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]874 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
875 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]876 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
877 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]878 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
879 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
880 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
881 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]882 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
883 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
884 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
885 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]886 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
887 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
888 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
889 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]890 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]891 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
892 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]893 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
894 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
895 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
896 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
897 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
898 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
899 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
900 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
901 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
902 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
903 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
904 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
905 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
906 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
907 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
908 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
909 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
910 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
911 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
912 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
913 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
914 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
915 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
916 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
917 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
918 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
919 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
920 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
921 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
922 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
923 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]924 "src/f32-hswish/gen/neon-x4.c",
925 "src/f32-hswish/gen/neon-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]926 "src/f32-ibilinear/gen/neon-c4.c",
927 "src/f32-ibilinear/gen/neon-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]928 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
929 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
930 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
931 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
932 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
933 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
934 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
935 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
936 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
937 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
938 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
939 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
940 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
941 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
942 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
943 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]944 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
945 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
946 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]947 "src/f32-ppmm/gen/4x8-minmax-neon.c",
948 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]949 "src/f32-prelu/gen/neon-2x4.c",
950 "src/f32-prelu/gen/neon-2x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]951 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
952 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
953 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
954 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
955 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
956 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
957 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
958 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
959 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
960 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
961 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
962 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
963 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
964 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
965 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
966 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
967 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
968 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
969 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
970 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
971 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
972 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
973 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
974 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]975 "src/f32-rmax/neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]976 "src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]977 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c",
978 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x8.c",
979 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x12.c",
980 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x16.c",
981 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x20.c",
982 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x24.c",
983 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x4.c",
984 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x8.c",
985 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x12.c",
986 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x16.c",
987 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x20.c",
988 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x24.c",
989 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x4.c",
990 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x8.c",
991 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x12.c",
992 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x16.c",
993 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x20.c",
994 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x24.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]995 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
996 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
997 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
998 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]999 "src/f32-vbinary/gen/vmax-neon-x4.c",
1000 "src/f32-vbinary/gen/vmax-neon-x8.c",
1001 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1002 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1003 "src/f32-vbinary/gen/vmin-neon-x4.c",
1004 "src/f32-vbinary/gen/vmin-neon-x8.c",
1005 "src/f32-vbinary/gen/vminc-neon-x4.c",
1006 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1007 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1008 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1009 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1010 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1011 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1012 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1013 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1014 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1015 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1016 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1017 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1018 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1019 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1020 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1021 "src/f32-vlrelu/gen/neon-x4.c",
1022 "src/f32-vlrelu/gen/neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1023 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1024 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1025 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1026 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1027 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1028 "src/f32-vrnd/gen/vrndz-neon-x8.c",
1029 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1030 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1031 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1032 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1033 "src/f32-vunary/gen/vabs-neon-x4.c",
1034 "src/f32-vunary/gen/vabs-neon-x8.c",
1035 "src/f32-vunary/gen/vneg-neon-x4.c",
1036 "src/f32-vunary/gen/vneg-neon-x8.c",
1037 "src/f32-vunary/gen/vsqr-neon-x4.c",
1038 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1039 "src/q8-avgpool/9p8x-minmax-neon-c8.c",
1040 "src/q8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1041 "src/q8-dwconv/up8x9-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1042 "src/q8-gavgpool/7p7x-minmax-neon-c8.c",
1043 "src/q8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1044 "src/q8-gemm/4x8-minmax-neon.c",
1045 "src/q8-gemm/8x8-minmax-neon.c",
1046 "src/q8-igemm/4x8-minmax-neon.c",
1047 "src/q8-igemm/8x8-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1048 "src/q8-vadd/minmax-neon.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1049 "src/u8-clamp/neon-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1050 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1051 "src/u8-rmax/neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1052 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1053 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1054 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1055 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1056 "src/x32-zip/x2-neon.c",
1057 "src/x32-zip/x3-neon.c",
1058 "src/x32-zip/x4-neon.c",
1059 "src/x32-zip/xm-neon.c",
1060 "src/x8-zip/x2-neon.c",
1061 "src/x8-zip/x3-neon.c",
1062 "src/x8-zip/x4-neon.c",
1063 "src/x8-zip/xm-neon.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1064 "src/math/roundne-neon-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1065 "src/math/roundd-neon-addsub.c",
1066 "src/math/roundd-neon-cvt.c",
1067 "src/math/roundu-neon-addsub.c",
1068 "src/math/roundu-neon-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1069 "src/math/roundz-neon-addsub.c",
1070 "src/math/roundz-neon-cvt.c",
Marat Dukhan68b3b452020-01-02 10:11:15 -0800[diff] [blame]1071 "src/math/sigmoid-neon-frac-p9-p10-nr1recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1072 "src/math/sigmoid-neon-rr1-lut2048-p1-nr2recps.c",
1073 "src/math/sigmoid-neon-rr1-lut64-p2-nr2recps.c",
1074 "src/math/sigmoid-neon-rr1-p5-nr2recps.c",
1075 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1076 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1077 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]1078 "src/math/sqrt-neon-nr1rsqrts.c",
1079 "src/math/sqrt-neon-nr2rsqrts.c",
1080 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1081 "src/requantization/precise-neon.c",
1082 "src/requantization/fp32-neon.c",
1083 "src/requantization/q31-neon.c",
1084 "src/requantization/gemmlowp-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1085]
1086
1087NEONFMA_UKERNELS = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1088 "src/f32-ibilinear/gen/neonfma-c4.c",
1089 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1090 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1091 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1092 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1093 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1094 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1095 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
1096 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
1097 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1098 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1099 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1100 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1101 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1102 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1103 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1104 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1105 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1106 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1107 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1108 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1109 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1110 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1111 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1112 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1113 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1114 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1115 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1116 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1117 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1118 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1119 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
1120 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1121 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1122 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1123 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1124 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1125 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1126 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1127 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1128 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1129 "src/f32-hswish/gen/neonfma-x4.c",
1130 "src/f32-hswish/gen/neonfma-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1131 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1132 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1133 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1134 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1135 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1136 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1137 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1138 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1139 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1140 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1141 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1142 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
1143 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1144 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1145 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
1146 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
1147 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
1148 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
1149 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1150 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
1151 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
1152 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1153 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
1154 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1155 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1156 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1157 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c",
1158 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c",
1159 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c",
1160 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x16.c",
1161 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x20.c",
1162 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x24.c",
1163 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x4.c",
1164 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x8.c",
1165 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x12.c",
1166 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x16.c",
1167 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x20.c",
1168 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x24.c",
1169 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x4.c",
1170 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x8.c",
1171 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x12.c",
1172 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x16.c",
1173 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x20.c",
1174 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x24.c",
1175 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x4.c",
1176 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x8.c",
1177 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x12.c",
1178 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x16.c",
1179 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x20.c",
1180 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x24.c",
1181 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
1182 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
1183 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
1184 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
1185 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
1186 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
1187 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x4.c",
1188 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x8.c",
1189 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x12.c",
1190 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x16.c",
1191 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x20.c",
1192 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x24.c",
1193 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x4.c",
1194 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x8.c",
1195 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x12.c",
1196 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x16.c",
1197 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x20.c",
1198 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x24.c",
1199 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
1200 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
1201 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
1202 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
1203 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
1204 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
1205 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x4.c",
1206 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x8.c",
1207 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x12.c",
1208 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x16.c",
1209 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x20.c",
1210 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1211 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
1212 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame^]1213 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
1214 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
1215 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
1216 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
1217 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
1218 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
1219 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
1220 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
1221 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
1222 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
1223 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
1224 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
1225 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
1226 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
1227 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
1228 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
1229 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
1230 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
1231 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
1232 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhan797a8fe2019-11-14 20:21:57 -0800[diff] [blame]1233 "src/math/exp-neonfma-lut64-p2.c",
1234 "src/math/exp-neonfma-p5.c",
Marat Dukhan189ae802019-11-26 11:28:44 -0800[diff] [blame]1235 "src/math/expminus-neonfma-lut2048-p1.c",
1236 "src/math/expminus-neonfma-lut64-p2.c",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]1237 "src/math/expminus-neonfma-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1238 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
1239 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
1240 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
1241 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
1242 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
1243 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
1244 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
1245 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
1246 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
1247 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
1248 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
1249 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
1250 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
1251 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
1252 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
1253 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
1254 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
1255 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]1256 "src/math/sqrt-neonfma-nr1fma.c",
1257 "src/math/sqrt-neonfma-nr2fma.c",
1258 "src/math/sqrt-neonfma-nr3fma.c",
1259 "src/math/sqrt-neonfma-nr2fma1adj.c",
1260 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1261]
1262
1263AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1264 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
1265 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
1266 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
1267 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
1268 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
1269 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1270 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1271 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1272 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1273 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1274 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
1275 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1276 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
1277 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
1278 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
1279 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
1280 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
1281 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
1282 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
1283 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1284 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1285 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
1286 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1287 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1288 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1289 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1290 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
1291 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1292 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
1293 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1294 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
1295 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1296 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
1297 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1298 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
1299 "src/f32-dwconv-chw/3x3p1-neonfma.c",
1300 "src/f32-dwconv-chw/5x5p2-neonfma.c",
1301 "src/f32-dwconv-chw/3x3s2p1-neonfma.c",
1302 "src/f32-dwconv-chw/5x5s2p2-neonfma.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1303 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x4.c",
1304 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x8.c",
1305 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x12.c",
1306 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x16.c",
1307 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x20.c",
1308 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x24.c",
1309 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x4.c",
1310 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x8.c",
1311 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x12.c",
1312 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x16.c",
1313 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x20.c",
1314 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x24.c",
1315 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x4.c",
1316 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x8.c",
1317 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x12.c",
1318 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x16.c",
1319 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x20.c",
1320 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x24.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1321 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1322 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
1323 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
1324 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1325 "src/f32-spmm/gen/16x1-minmax-neonfma-unroll2.c",
1326 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1327 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
1328 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
1329 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1330 "src/f32-spmm/gen/4x1-minmax-neonfma-unroll2.c",
1331 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1332 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
1333 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
1334 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1335 "src/f32-spmm/gen/8x1-minmax-neonfma-unroll2.c",
1336 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1337 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
1338 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame^]1339 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
1340 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1341 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
1342 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
1343 "src/math/sigmoid-neonfma-rr1-p5-div.c",
1344 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
1345 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
1346 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1347]
1348
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1349NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1350 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
1351 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
1352 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
1353 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
1354 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
1355 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
1356 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
1357 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1358 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1359 "src/math/roundd-neonv8.c",
1360 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1361 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1362]
1363
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1364AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1365 "src/f16-clamp/gen/neonfp16arith-x16.c",
1366 "src/f16-clamp/gen/neonfp16arith-x8.c",
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]1367 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
1368 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
1369 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
1370 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
1371 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
1372 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
1373 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
1374 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
1375 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
1376 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
1377 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
1378 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]1379 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
1380 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1381 "src/f16-hswish/gen/neonfp16arith-x16.c",
1382 "src/f16-hswish/gen/neonfp16arith-x8.c",
1383 "src/f16-prelu/gen/neonfp16arith-2x16.c",
1384 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]1385 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
1386 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
1387 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
1388 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
1389 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
1390 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
1391 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
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1395 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
1396 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
1397 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
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1399 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
1400 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
1401 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
1402 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
1403 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
1404 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
1405 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
1406 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
1407 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
1408 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
1409 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
1410 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
1411 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
1412 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]1413 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
1414 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]1415 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1416 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1417 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1418 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
1419 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
1420 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
1421 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
1422 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]1423 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1424 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1425 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1426 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]1427 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1428 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1429 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1430 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
1431 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
1432 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
1433 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
1434 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
1435 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1436 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1437 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1438 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1439 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
1440 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-unroll2.c",
1441 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
1442 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-unroll2.c",
1443 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
1444 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-unroll2.c",
1445 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
1446 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-unroll2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1447]
1448
1449SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1450 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
1451 "src/f32-avgpool/9x-minmax-sse-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1452 "src/f32-clamp/gen/sse-x4.c",
1453 "src/f32-clamp/gen/sse-x8.c",
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]1454 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
1455 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1456 "src/f32-dwconv-chw/3x3p1-sse.c",
1457 "src/f32-dwconv-chw/3x3s2p1-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1458 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
1459 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
1460 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
1461 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
1462 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
1463 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
1464 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
1465 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
1466 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
1467 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
1468 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
1469 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1470 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1471 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
1472 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1473 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
1474 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
1475 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
1476 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
1477 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
1478 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
1479 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
1480 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
1481 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
1482 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
1483 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
1484 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
1485 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1486 "src/f32-hswish/gen/sse-x4.c",
1487 "src/f32-hswish/gen/sse-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1488 "src/f32-ibilinear/gen/sse-c4.c",
1489 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1490 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
1491 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
1492 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
1493 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
1494 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
1495 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
1496 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1497 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
1498 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
1499 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1500 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -0700[diff] [blame]1501 "src/f32-prelu/gen/sse-2x4.c",
1502 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1503 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1504 "src/f32-spmm/gen/4x1-minmax-sse.c",
1505 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]1506 "src/f32-spmm/gen/16x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1507 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
1508 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
1509 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
1510 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
1511 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
1512 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
1513 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
1514 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1515 "src/f32-vbinary/gen/vmax-sse-x4.c",
1516 "src/f32-vbinary/gen/vmax-sse-x8.c",
1517 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
1518 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
1519 "src/f32-vbinary/gen/vmin-sse-x4.c",
1520 "src/f32-vbinary/gen/vmin-sse-x8.c",
1521 "src/f32-vbinary/gen/vminc-sse-x4.c",
1522 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1523 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
1524 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
1525 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
1526 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
1527 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
1528 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
1529 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
1530 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1531 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
1532 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
1533 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
1534 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1535 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
1536 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
1537 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
1538 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1539 "src/f32-vlrelu/gen/sse-x4.c",
1540 "src/f32-vlrelu/gen/sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1541 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
1542 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame^]1543 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
1544 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1545 "src/f32-vunary/gen/vabs-sse-x4.c",
1546 "src/f32-vunary/gen/vabs-sse-x8.c",
1547 "src/f32-vunary/gen/vneg-sse-x4.c",
1548 "src/f32-vunary/gen/vneg-sse-x8.c",
1549 "src/f32-vunary/gen/vsqr-sse-x4.c",
1550 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1551 "src/x32-fill/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1552 "src/x32-packx/x4-sse.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1553 "src/x32-pad/sse.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1554 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1555 "src/math/roundd-sse-addsub.c",
1556 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1557 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]1558 "src/math/sqrt-sse-hh1mac.c",
1559 "src/math/sqrt-sse-nr1mac.c",
1560 "src/math/sqrt-sse-nr2mac.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1561]
1562
1563SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]1564 "src/f32-argmaxpool/9p8x-sse2-c4.c",
1565 "src/f32-argmaxpool/4x-sse2-c4.c",
1566 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1567 "src/f32-prelu/gen/sse2-2x4.c",
1568 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]1569 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
1570 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
1571 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
1572 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
1573 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
1574 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
1575 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
1576 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
1577 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
1578 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
1579 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
1580 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1581 "src/f32-sigmoid/gen/sse2-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1582 "src/f32-sigmoid/gen/sse2-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1583 "src/f32-sigmoid/gen/sse2-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1584 "src/f32-sigmoid/gen/sse2-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1585 "src/f32-sigmoid/gen/sse2-p5-div-x20.c",
1586 "src/f32-sigmoid/gen/sse2-p5-div-x24.c",
Marat Dukhan0d3f4672020-06-25 16:42:58 -0700[diff] [blame]1587 "src/f32-vlrelu/gen/sse2-x4.c",
1588 "src/f32-vlrelu/gen/sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1589 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
1590 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
1591 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
1592 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
1593 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
1594 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
1595 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
1596 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1597 "src/q8-avgpool/9p8x-minmax-sse2-c8.c",
1598 "src/q8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1599 "src/q8-igemm/4x4c2-minmax-sse2.c",
1600 "src/q8-dwconv/up8x9-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1601 "src/q8-gavgpool/7p7x-minmax-sse2-c8.c",
1602 "src/q8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1603 "src/q8-gemm/2x4c8-minmax-sse2.c",
1604 "src/q8-gemm/4x4c2-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1605 "src/q8-vadd/minmax-sse2.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1606 "src/u8-clamp/sse2-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1607 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1608 "src/u8-rmax/sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1609 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1610 "src/x32-zip/x2-sse2.c",
1611 "src/x32-zip/x3-sse2.c",
1612 "src/x32-zip/x4-sse2.c",
1613 "src/x32-zip/xm-sse2.c",
1614 "src/x8-zip/x2-sse2.c",
1615 "src/x8-zip/x3-sse2.c",
1616 "src/x8-zip/x4-sse2.c",
1617 "src/x8-zip/xm-sse2.c",
Marat Dukhanffd68402019-11-15 15:19:11 -0800[diff] [blame]1618 "src/math/exp-sse2-p5.c",
1619 "src/math/expminus-sse2-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1620 "src/math/roundne-sse2-cvt.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1621 "src/math/roundd-sse2-cvt.c",
1622 "src/math/roundu-sse2-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1623 "src/math/roundz-sse2-cvt.c",
Marat Dukhan80bafd22019-11-18 10:16:01 -0800[diff] [blame]1624 "src/math/sigmoid-sse2-p5-div.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1625 "src/requantization/precise-sse2.c",
1626 "src/requantization/fp32-sse2.c",
1627 "src/requantization/q31-sse2.c",
1628 "src/requantization/gemmlowp-sse2.c",
1629]
1630
1631SSSE3_UKERNELS = [
1632 "src/requantization/precise-ssse3.c",
1633 "src/requantization/q31-ssse3.c",
1634 "src/requantization/gemmlowp-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1635]
1636
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1637SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1638 "src/f32-prelu/gen/sse41-2x4.c",
1639 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1640 "src/f32-sigmoid/gen/sse41-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1641 "src/f32-sigmoid/gen/sse41-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1642 "src/f32-sigmoid/gen/sse41-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1643 "src/f32-sigmoid/gen/sse41-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1644 "src/f32-sigmoid/gen/sse41-p5-div-x20.c",
1645 "src/f32-sigmoid/gen/sse41-p5-div-x24.c",
Marat Dukhan0d3f4672020-06-25 16:42:58 -0700[diff] [blame]1646 "src/f32-vlrelu/gen/sse41-x4.c",
1647 "src/f32-vlrelu/gen/sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1648 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
1649 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
1650 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
1651 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
1652 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
1653 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
1654 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
1655 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1656 "src/math/roundne-sse41.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1657 "src/math/roundd-sse41.c",
1658 "src/math/roundu-sse41.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1659 "src/math/roundz-sse41.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1660 "src/requantization/precise-sse4.c",
1661 "src/requantization/q31-sse4.c",
1662 "src/requantization/gemmlowp-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1663]
1664
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1665AVX_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1666 "src/f32-clamp/gen/avx-x8.c",
1667 "src/f32-clamp/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1668 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
1669 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
1670 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
1671 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
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1673 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
1674 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
1675 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
1676 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
1677 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
1678 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
1679 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
1680 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
1681 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
1682 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
1683 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
1684 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
1685 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
1686 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
1687 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
1688 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
1689 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
1690 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
1691 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
1692 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
1693 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
1694 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
1695 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
1696 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
1697 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1698 "src/f32-hswish/gen/avx-x8.c",
1699 "src/f32-hswish/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1700 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
1701 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
1702 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
1703 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
1704 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
1705 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
1706 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
1707 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
1708 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1709 "src/f32-prelu/gen/avx-2x8.c",
1710 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1711 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1712 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
1713 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
1714 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
1715 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
1716 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
1717 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
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Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1720 "src/f32-vbinary/gen/vmax-avx-x8.c",
1721 "src/f32-vbinary/gen/vmax-avx-x16.c",
1722 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
1723 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
1724 "src/f32-vbinary/gen/vmin-avx-x8.c",
1725 "src/f32-vbinary/gen/vmin-avx-x16.c",
1726 "src/f32-vbinary/gen/vminc-avx-x8.c",
1727 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1728 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
1729 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
1730 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
1731 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
1732 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
1733 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
1734 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
1735 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1736 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
1737 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
1738 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
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Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1740 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
1741 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
1742 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
1743 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1744 "src/f32-vlrelu/gen/avx-x8.c",
1745 "src/f32-vlrelu/gen/avx-x16.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1746 "src/f32-vscale/avx-unroll32.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1747 "src/f32-vrnd/gen/vrndne-avx-x8.c",
1748 "src/f32-vrnd/gen/vrndne-avx-x16.c",
1749 "src/f32-vrnd/gen/vrndz-avx-x8.c",
1750 "src/f32-vrnd/gen/vrndz-avx-x16.c",
1751 "src/f32-vrnd/gen/vrndu-avx-x8.c",
1752 "src/f32-vrnd/gen/vrndu-avx-x16.c",
1753 "src/f32-vrnd/gen/vrndd-avx-x8.c",
1754 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame^]1755 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
1756 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1757 "src/f32-vunary/gen/vabs-avx-x8.c",
1758 "src/f32-vunary/gen/vabs-avx-x16.c",
1759 "src/f32-vunary/gen/vneg-avx-x8.c",
1760 "src/f32-vunary/gen/vneg-avx-x16.c",
1761 "src/f32-vunary/gen/vsqr-avx-x8.c",
1762 "src/f32-vunary/gen/vsqr-avx-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1763]
1764
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1765FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1766 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
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1778 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
1779 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
1780 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
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1799 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
1800 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
1801 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
1802 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
1803 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
1804 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
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Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1806 "src/f32-hswish/gen/fma3-x8.c",
1807 "src/f32-hswish/gen/fma3-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1808 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
1809 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
1810 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
1811 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
1812 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
1813 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
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1815 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
1816 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
1817 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
1818 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
1819 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
1820 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
1821 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame^]1822 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
1823 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
1824 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
1825 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
1826 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
1827 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
1828 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
1829 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]1830 "src/math/sqrt-fma3-nr1fma.c",
1831 "src/math/sqrt-fma3-nr2fma.c",
1832 "src/math/sqrt-fma3-nr1fma1adj.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1833]
1834
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1835AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1836 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
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1861 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
1862 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
1863 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
1864 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
1865 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
1866 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
1867 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
1868 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
1869 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
1870 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
1871 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Marat Dukhanfa0a4322020-01-06 16:14:29 -0800[diff] [blame]1872 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x8.c",
1873 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x16.c",
1874 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x24.c",
1875 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x32.c",
1876 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x40.c",
1877 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x48.c",
1878 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x56.c",
1879 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x64.c",
1880 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x72.c",
1881 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x80.c",
1882 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x8.c",
1883 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x16.c",
1884 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x24.c",
1885 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x32.c",
1886 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x40.c",
1887 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x48.c",
1888 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x56.c",
1889 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x64.c",
1890 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x72.c",
1891 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x80.c",
1892 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x8.c",
1893 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x16.c",
1894 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x24.c",
1895 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x32.c",
1896 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x40.c",
1897 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x48.c",
1898 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x56.c",
1899 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x64.c",
1900 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x72.c",
1901 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1902 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
1903 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
1904 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
1905 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
1906 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
1907 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
1908 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
1909 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
1910 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
1911 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
1912 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
1913 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
1914 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
1915 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
1916 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
1917 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
1918 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
1919 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
1920 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
1921 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
1922 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
1923 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
1924 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
1925 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1926 "src/math/exp-avx2-p5.c",
1927 "src/math/exp-avx2-perm-p3.c",
1928 "src/math/exp-avx2-perm-p4.c",
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]1929 "src/math/expminus-avx2-p5.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1930 "src/math/extexp-avx2-p5.c",
Marat Dukhan72416002020-01-05 21:53:19 -0800[diff] [blame]1931 "src/math/sigmoid-avx2-rr2-p5-div.c",
1932 "src/math/sigmoid-avx2-rr1-p5-div.c",
1933 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
1934 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
1935 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
1936 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1937]
1938
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1939AVX512F_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1940 "src/f32-clamp/gen/avx512f-x16.c",
1941 "src/f32-clamp/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1942 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
1943 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
1944 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
1945 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
1946 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
1947 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
1948 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
1949 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
1950 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
1951 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
1952 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
1953 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
1954 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
1955 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
1956 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
1957 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
1958 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
1959 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
1960 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
1961 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
1962 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
1963 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
1964 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
1965 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1966 "src/f32-hswish/gen/avx512f-x16.c",
1967 "src/f32-hswish/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1968 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
1969 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
1970 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
1971 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
1972 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
1973 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1974 "src/f32-prelu/gen/avx512f-2x16.c",
1975 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1976 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
1977 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1978 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1979 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
1980 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1981 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
1982 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1983 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1984 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
1985 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1986 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1987 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
1988 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
1989 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
1990 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
1991 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
1992 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
1993 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
1994 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
1995 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
1996 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
1997 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
1998 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
1999 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
2000 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
2001 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
2002 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
2003 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
2004 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
2005 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
2006 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
2007 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
2008 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
2009 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
2010 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
2011 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2012 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]2013 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
2014 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
2015 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
2016 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
2017 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
2018 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
2019 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
2020 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]2021 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
2022 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
2023 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
2024 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
2025 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
2026 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
2027 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
2028 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]2029 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
2030 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
2031 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
2032 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
2033 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
2034 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
2035 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
2036 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]2037 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
2038 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
2039 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
2040 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]2041 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
2042 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
2043 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
2044 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]2045 "src/f32-vlrelu/gen/avx512f-x16.c",
2046 "src/f32-vlrelu/gen/avx512f-x32.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]2047 "src/f32-vscale/avx512f-unroll64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]2048 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
2049 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
2050 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
2051 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
2052 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
2053 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
2054 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
2055 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
2056 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
2057 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
2058 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
2059 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
2060 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
2061 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
2062 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
2063 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
2064 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
2065 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
2066 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
2067 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
2068 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
2069 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
2070 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
2071 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]2072 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
2073 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
2074 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
2075 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
2076 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
2077 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
2078 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
2079 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame^]2080 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
2081 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
2082 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
2083 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
2084 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
2085 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
2086 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
2087 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]2088 "src/f32-vunary/gen/vabs-avx512f-x16.c",
2089 "src/f32-vunary/gen/vabs-avx512f-x32.c",
2090 "src/f32-vunary/gen/vneg-avx512f-x16.c",
2091 "src/f32-vunary/gen/vneg-avx512f-x32.c",
2092 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
2093 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2094 "src/math/exp-avx512f-p5-scalef.c",
2095 "src/math/exp-avx512f-p5.c",
2096 "src/math/exp-avx512f-perm-p3.c",
Marat Dukhanfeb49232019-10-28 11:03:31 -0700[diff] [blame]2097 "src/math/exp-avx512f-perm2-p2.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]2098 "src/math/extexp-avx512f-p5.c",
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]2099 "src/math/sqrt-avx512f-nr1fma.c",
2100 "src/math/sqrt-avx512f-nr2fma.c",
2101 "src/math/sqrt-avx512f-nr1fma1adj.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2102]
2103
2104AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]2105 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]2106 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2107 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
2108 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
2109 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
2110 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -0700[diff] [blame]2111 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
2112 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-ld64.S",
2113 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
2114 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2115 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
2116 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
2117 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
2118 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2119]
2120
2121AARCH64_ASM_UKERNELS = [
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]2122 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2123 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
2124 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]2125 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2126 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
2127 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]2128 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
2129 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
2130 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]2131 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]2132 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
2133 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
2134 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]2135 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2136 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
2137 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]2138 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2139 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
2140 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
2141 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
2142 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
2143 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
2144 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
2145 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
2146 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2147 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2148 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
2149 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
2150 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2151 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2152 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2153 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2154 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2155 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2156 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2157 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
2158 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]2159 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2160 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
2161 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2162 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2163 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2164 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
2165 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2166 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2167 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2168 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2169 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
2170 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
2171 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2172 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2173 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2174 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2175 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
2176 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2177 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2178 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
2179 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
2180 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
2181 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
2182 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
2183 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
2184 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
2185 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
2186 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
2187 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2188 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2189 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2190 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2191 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2192 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2193 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2194 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2195 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2196]
2197
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2198INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2199 "src/requantization/gemmlowp-requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2200 "src/xnnpack/argmaxpool.h",
2201 "src/xnnpack/avgpool.h",
2202 "src/xnnpack/clamp.h",
2203 "src/xnnpack/common.h",
2204 "src/xnnpack/conv.h",
2205 "src/xnnpack/dwconv.h",
2206 "src/xnnpack/gavgpool.h",
2207 "src/xnnpack/gemm.h",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]2208 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2209 "src/xnnpack/hswish.h",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]2210 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2211 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -0800[diff] [blame]2212 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2213 "src/xnnpack/lut.h",
2214 "src/xnnpack/math.h",
2215 "src/xnnpack/maxpool.h",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2216 "src/xnnpack/memory.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2217 "src/xnnpack/packx.h",
2218 "src/xnnpack/pad.h",
2219 "src/xnnpack/params.h",
2220 "src/xnnpack/pavgpool.h",
2221 "src/xnnpack/ppmm.h",
2222 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2223 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2224 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2225 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2226 "src/xnnpack/rmax.h",
2227 "src/xnnpack/scalar-utils.h",
2228 "src/xnnpack/spmm.h",
2229 "src/xnnpack/unpool.h",
2230 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2231 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2232 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]2233 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2234 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2235 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2236 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2237 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2238]
2239
2240INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2241 "include/xnnpack.h",
2242 "src/xnnpack/allocator.h",
2243 "src/xnnpack/compute.h",
2244 "src/xnnpack/im2col.h",
2245 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2246 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2247 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2248 "src/xnnpack/operator.h",
2249 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2250 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2251 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2252 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -0800[diff] [blame]2253 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2254]
2255
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2256ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2257 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2258]
2259
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2260MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2261 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2262 "include/xnnpack.h",
2263]
2264
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2265MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2266 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2267 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2268 "src/xnnpack/requantization.h",
2269 "include/xnnpack.h",
2270]
2271
2272OPERATOR_TEST_PARAMS_HDRS = [
2273 "src/xnnpack/params.h",
2274 "src/xnnpack/common.h",
2275]
2276
2277WEIGHTS_PACK_HDRS = [
2278 "src/xnnpack/pack.h",
2279 "src/xnnpack/operator.h",
2280 "src/xnnpack/compute.h",
2281]
2282
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2283LOGGING_COPTS = select({
2284 # No logging in optimized mode
2285 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
2286 # Full logging in debug mode
2287 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
2288 # Error-only logging in default (fastbuild) mode
2289 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
2290})
2291
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2292LOGGING_SRCS = select({
2293 # No logging in optimized mode
2294 ":optimized_build": [],
2295 "//conditions:default": [
2296 "src/operator-strings.c",
2297 "src/subgraph-strings.c",
2298 ],
2299})
2300
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2301LOGGING_HDRS = [
2302 "src/xnnpack/log.h",
2303]
2304
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2305xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2306 name = "tables",
2307 srcs = TABLE_SRCS,
2308 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2309 gcc_copts = xnnpack_gcc_std_copts(),
2310 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2311)
2312
2313xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2314 name = "scalar_ukernels",
2315 srcs = SCALAR_UKERNELS,
2316 hdrs = INTERNAL_HDRS,
2317 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2318 gcc_copts = xnnpack_gcc_std_copts(),
2319 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2320 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2321 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2322 "@FP16",
2323 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2324 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2325 ],
2326)
2327
2328xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2329 name = "scalar_ukernels_test_mode",
2330 srcs = SCALAR_UKERNELS,
2331 hdrs = INTERNAL_HDRS,
2332 aarch32_copts = ["-marm"],
2333 copts = [
2334 "-UNDEBUG",
2335 "-DXNN_TEST_MODE=1",
2336 ],
2337 gcc_copts = xnnpack_gcc_std_copts(),
2338 msvc_copts = xnnpack_msvc_std_copts(),
2339 deps = [
2340 ":tables",
2341 "@FP16",
2342 "@FXdiv",
2343 "@pthreadpool",
2344 ],
2345)
2346
2347xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2348 name = "wasm_ukernels",
2349 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2350 gcc_copts = xnnpack_gcc_std_copts(),
2351 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2352 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -0700[diff] [blame]2353 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2354 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2355 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2356 "@FP16",
2357 "@FXdiv",
2358 "@pthreadpool",
2359 ],
2360)
2361
2362xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2363 name = "wasm_ukernels_test_mode",
2364 hdrs = INTERNAL_HDRS,
2365 copts = [
2366 "-UNDEBUG",
2367 "-DXNN_TEST_MODE=1",
2368 ],
2369 gcc_copts = xnnpack_gcc_std_copts(),
2370 msvc_copts = xnnpack_msvc_std_copts(),
2371 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -0700[diff] [blame]2372 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2373 deps = [
2374 ":tables",
2375 "@FP16",
2376 "@FXdiv",
2377 "@pthreadpool",
2378 ],
2379)
2380
2381xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2382 name = "psimd_fastmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2383 hdrs = INTERNAL_HDRS,
2384 aarch32_copts = [
2385 "-marm",
2386 "-mfpu=neon",
2387 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2388 gcc_copts = xnnpack_gcc_std_copts(),
2389 gcc_x86_copts = ["-msse2"],
2390 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2391 optimized_copts = [
2392 "-O3",
2393 "-ffast-math",
2394 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2395 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2396 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2397 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2398 "@FP16",
2399 "@psimd",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2400 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2401 ],
2402)
2403
2404xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2405 name = "psimd_fastmath_ukernels_test_mode",
2406 hdrs = INTERNAL_HDRS,
2407 aarch32_copts = [
2408 "-marm",
2409 "-mfpu=neon",
2410 ],
2411 copts = [
2412 "-UNDEBUG",
2413 "-DXNN_TEST_MODE=1",
2414 ],
2415 gcc_copts = xnnpack_gcc_std_copts(),
2416 gcc_x86_copts = ["-msse2"],
2417 msvc_copts = xnnpack_msvc_std_copts(),
2418 optimized_copts = [
2419 "-O3",
2420 "-ffast-math",
2421 ],
2422 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
2423 deps = [
2424 ":tables",
2425 "@FP16",
2426 "@psimd",
2427 "@pthreadpool",
2428 ],
2429)
2430
2431xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2432 name = "psimd_accmath_ukernels",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2433 hdrs = INTERNAL_HDRS,
2434 aarch32_copts = [
2435 "-marm",
2436 "-mfpu=neon",
2437 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2438 gcc_copts = xnnpack_gcc_std_copts(),
2439 gcc_x86_copts = ["-msse2"],
2440 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2441 optimized_copts = [
2442 "-O3",
2443 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2444 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2445 deps = [
2446 ":tables",
2447 "@FP16",
2448 "@psimd",
2449 "@pthreadpool",
2450 ],
2451)
2452
2453xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2454 name = "psimd_accmath_ukernels_test_mode",
2455 hdrs = INTERNAL_HDRS,
2456 aarch32_copts = [
2457 "-marm",
2458 "-mfpu=neon",
2459 ],
2460 copts = [
2461 "-UNDEBUG",
2462 "-DXNN_TEST_MODE=1",
2463 ],
2464 gcc_copts = xnnpack_gcc_std_copts(),
2465 gcc_x86_copts = ["-msse2"],
2466 msvc_copts = xnnpack_msvc_std_copts(),
2467 optimized_copts = [
2468 "-O3",
2469 ],
2470 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
2471 deps = [
2472 ":tables",
2473 "@FP16",
2474 "@psimd",
2475 "@pthreadpool",
2476 ],
2477)
2478
2479xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2480 name = "neon_ukernels",
2481 hdrs = INTERNAL_HDRS,
2482 aarch32_copts = [
2483 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2484 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2485 "-mfpu=neon",
2486 ],
2487 aarch32_srcs = NEON_UKERNELS,
2488 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2489 gcc_copts = xnnpack_gcc_std_copts(),
2490 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2491 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2492 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2493 "@FP16",
2494 "@pthreadpool",
2495 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2496)
2497
2498xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2499 name = "neon_ukernels_test_mode",
2500 hdrs = INTERNAL_HDRS,
2501 aarch32_copts = [
2502 "-marm",
2503 "-march=armv7-a",
2504 "-mfpu=neon",
2505 ],
2506 aarch32_srcs = NEON_UKERNELS,
2507 aarch64_srcs = NEON_UKERNELS,
2508 copts = [
2509 "-UNDEBUG",
2510 "-DXNN_TEST_MODE=1",
2511 ],
2512 gcc_copts = xnnpack_gcc_std_copts(),
2513 msvc_copts = xnnpack_msvc_std_copts(),
2514 deps = [
2515 ":tables",
2516 "@FP16",
2517 "@pthreadpool",
2518 ],
2519)
2520
2521xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2522 name = "neonfma_ukernels",
2523 hdrs = INTERNAL_HDRS,
2524 aarch32_copts = [
2525 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2526 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2527 "-mfpu=neon-vfpv4",
2528 ],
2529 aarch32_srcs = NEONFMA_UKERNELS,
2530 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2531 apple_aarch32_copts = [
2532 "-mcpu=swift",
2533 "-mtune=generic",
2534 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2535 gcc_copts = xnnpack_gcc_std_copts(),
2536 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2537 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2538 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2539 "@FP16",
2540 "@pthreadpool",
2541 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2542)
2543
2544xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2545 name = "neonfma_ukernels_test_mode",
2546 hdrs = INTERNAL_HDRS,
2547 aarch32_copts = [
2548 "-marm",
2549 "-march=armv7-a",
2550 "-mfpu=neon-vfpv4",
2551 ],
2552 aarch32_srcs = NEONFMA_UKERNELS,
2553 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2554 apple_aarch32_copts = [
2555 "-mcpu=swift",
2556 "-mtune=generic",
2557 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2558 copts = [
2559 "-UNDEBUG",
2560 "-DXNN_TEST_MODE=1",
2561 ],
2562 gcc_copts = xnnpack_gcc_std_copts(),
2563 msvc_copts = xnnpack_msvc_std_copts(),
2564 deps = [
2565 ":tables",
2566 "@FP16",
2567 "@pthreadpool",
2568 ],
2569)
2570
2571xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2572 name = "neonv8_ukernels",
2573 hdrs = INTERNAL_HDRS,
2574 aarch32_copts = [
2575 "-marm",
2576 "-march=armv8-a",
2577 "-mfpu=neon-fp-armv8",
2578 ],
2579 aarch32_srcs = NEONV8_UKERNELS,
2580 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2581 apple_aarch32_copts = [
2582 "-mcpu=cyclone",
2583 "-mtune=generic",
2584 ],
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2585 gcc_copts = xnnpack_gcc_std_copts(),
2586 msvc_copts = xnnpack_msvc_std_copts(),
2587 deps = [
2588 ":tables",
2589 "@FP16",
2590 "@pthreadpool",
2591 ],
2592)
2593
2594xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2595 name = "neonv8_ukernels_test_mode",
2596 hdrs = INTERNAL_HDRS,
2597 aarch32_copts = [
2598 "-marm",
2599 "-march=armv8-a",
2600 "-mfpu=neon-fp-armv8",
2601 ],
2602 aarch32_srcs = NEONV8_UKERNELS,
2603 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2604 apple_aarch32_copts = [
2605 "-mcpu=cyclone",
2606 "-mtune=generic",
2607 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2608 copts = [
2609 "-UNDEBUG",
2610 "-DXNN_TEST_MODE=1",
2611 ],
2612 gcc_copts = xnnpack_gcc_std_copts(),
2613 msvc_copts = xnnpack_msvc_std_copts(),
2614 deps = [
2615 ":tables",
2616 "@FP16",
2617 "@pthreadpool",
2618 ],
2619)
2620
2621xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2622 name = "neonfp16arith_ukernels",
2623 hdrs = INTERNAL_HDRS,
2624 aarch64_copts = ["-march=armv8.2-a+fp16"],
2625 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2626 gcc_copts = xnnpack_gcc_std_copts(),
2627 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2628 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2629 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2630 "@FP16",
2631 "@pthreadpool",
2632 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2633)
2634
2635xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2636 name = "neonfp16arith_ukernels_test_mode",
2637 hdrs = INTERNAL_HDRS,
2638 aarch64_copts = ["-march=armv8.2-a+fp16"],
2639 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
2640 copts = [
2641 "-UNDEBUG",
2642 "-DXNN_TEST_MODE=1",
2643 ],
2644 gcc_copts = xnnpack_gcc_std_copts(),
2645 msvc_copts = xnnpack_msvc_std_copts(),
2646 deps = [
2647 ":tables",
2648 "@FP16",
2649 "@pthreadpool",
2650 ],
2651)
2652
2653xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2654 name = "sse2_ukernels",
2655 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2656 gcc_copts = xnnpack_gcc_std_copts(),
2657 gcc_x86_copts = ["-msse2"],
2658 msvc_copts = xnnpack_msvc_std_copts(),
2659 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2660 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2661 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2662 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2663 "@FP16",
2664 "@pthreadpool",
2665 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2666)
2667
2668xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2669 name = "sse2_ukernels_test_mode",
2670 hdrs = INTERNAL_HDRS,
2671 copts = [
2672 "-UNDEBUG",
2673 "-DXNN_TEST_MODE=1",
2674 ],
2675 gcc_copts = xnnpack_gcc_std_copts(),
2676 gcc_x86_copts = ["-msse2"],
2677 msvc_copts = xnnpack_msvc_std_copts(),
2678 msvc_x86_32_copts = ["/arch:SSE2"],
2679 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
2680 deps = [
2681 ":tables",
2682 "@FP16",
2683 "@pthreadpool",
2684 ],
2685)
2686
2687xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2688 name = "ssse3_ukernels",
2689 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2690 gcc_copts = xnnpack_gcc_std_copts(),
2691 gcc_x86_copts = ["-mssse3"],
2692 msvc_copts = xnnpack_msvc_std_copts(),
2693 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2694 x86_srcs = SSSE3_UKERNELS,
2695 deps = [
2696 ":tables",
2697 "@FP16",
2698 "@pthreadpool",
2699 ],
2700)
2701
2702xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2703 name = "ssse3_ukernels_test_mode",
2704 hdrs = INTERNAL_HDRS,
2705 copts = [
2706 "-UNDEBUG",
2707 "-DXNN_TEST_MODE=1",
2708 ],
2709 gcc_copts = xnnpack_gcc_std_copts(),
2710 gcc_x86_copts = ["-mssse3"],
2711 msvc_copts = xnnpack_msvc_std_copts(),
2712 msvc_x86_32_copts = ["/arch:SSE2"],
2713 x86_srcs = SSSE3_UKERNELS,
2714 deps = [
2715 ":tables",
2716 "@FP16",
2717 "@pthreadpool",
2718 ],
2719)
2720
2721xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2722 name = "sse41_ukernels",
2723 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2724 gcc_copts = xnnpack_gcc_std_copts(),
2725 gcc_x86_copts = ["-msse4.1"],
2726 msvc_copts = xnnpack_msvc_std_copts(),
2727 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2728 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2729 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2730 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2731 "@FP16",
2732 "@pthreadpool",
2733 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2734)
2735
2736xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2737 name = "sse41_ukernels_test_mode",
2738 hdrs = INTERNAL_HDRS,
2739 copts = [
2740 "-UNDEBUG",
2741 "-DXNN_TEST_MODE=1",
2742 ],
2743 gcc_copts = xnnpack_gcc_std_copts(),
2744 gcc_x86_copts = ["-msse4.1"],
2745 msvc_copts = xnnpack_msvc_std_copts(),
2746 msvc_x86_32_copts = ["/arch:SSE2"],
2747 x86_srcs = SSE41_UKERNELS,
2748 deps = [
2749 ":tables",
2750 "@FP16",
2751 "@pthreadpool",
2752 ],
2753)
2754
2755xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2756 name = "avx_ukernels",
2757 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2758 gcc_copts = xnnpack_gcc_std_copts(),
2759 gcc_x86_copts = ["-mavx"],
2760 msvc_copts = xnnpack_msvc_std_copts(),
2761 msvc_x86_32_copts = ["/arch:AVX"],
2762 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2763 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2764 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2765 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2766 "@FP16",
2767 "@pthreadpool",
2768 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2769)
2770
2771xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2772 name = "avx_ukernels_test_mode",
2773 hdrs = INTERNAL_HDRS,
2774 copts = [
2775 "-UNDEBUG",
2776 "-DXNN_TEST_MODE=1",
2777 ],
2778 gcc_copts = xnnpack_gcc_std_copts(),
2779 gcc_x86_copts = ["-mavx"],
2780 msvc_copts = xnnpack_msvc_std_copts(),
2781 msvc_x86_32_copts = ["/arch:AVX"],
2782 msvc_x86_64_copts = ["/arch:AVX"],
2783 x86_srcs = AVX_UKERNELS,
2784 deps = [
2785 ":tables",
2786 "@FP16",
2787 "@pthreadpool",
2788 ],
2789)
2790
2791xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2792 name = "fma3_ukernels",
2793 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2794 gcc_copts = xnnpack_gcc_std_copts(),
2795 gcc_x86_copts = ["-mfma"],
2796 msvc_copts = xnnpack_msvc_std_copts(),
2797 msvc_x86_32_copts = ["/arch:AVX"],
2798 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2799 x86_srcs = FMA3_UKERNELS,
2800 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2801 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2802 "@FP16",
2803 "@pthreadpool",
2804 ],
2805)
2806
2807xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2808 name = "fma3_ukernels_test_mode",
2809 hdrs = INTERNAL_HDRS,
2810 copts = [
2811 "-UNDEBUG",
2812 "-DXNN_TEST_MODE=1",
2813 ],
2814 gcc_copts = xnnpack_gcc_std_copts(),
2815 gcc_x86_copts = ["-mfma"],
2816 msvc_copts = xnnpack_msvc_std_copts(),
2817 msvc_x86_32_copts = ["/arch:AVX"],
2818 msvc_x86_64_copts = ["/arch:AVX"],
2819 x86_srcs = FMA3_UKERNELS,
2820 deps = [
2821 ":tables",
2822 "@FP16",
2823 "@pthreadpool",
2824 ],
2825)
2826
2827xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2828 name = "avx2_ukernels",
2829 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2830 gcc_copts = xnnpack_gcc_std_copts(),
2831 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2832 "-mfma",
2833 "-mavx2",
2834 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2835 msvc_copts = xnnpack_msvc_std_copts(),
2836 msvc_x86_32_copts = ["/arch:AVX2"],
2837 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2838 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2839 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2840 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2841 "@FP16",
2842 "@pthreadpool",
2843 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2844)
2845
2846xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2847 name = "avx2_ukernels_test_mode",
2848 hdrs = INTERNAL_HDRS,
2849 copts = [
2850 "-UNDEBUG",
2851 "-DXNN_TEST_MODE=1",
2852 ],
2853 gcc_copts = xnnpack_gcc_std_copts(),
2854 gcc_x86_copts = [
2855 "-mfma",
2856 "-mavx2",
2857 ],
2858 msvc_copts = xnnpack_msvc_std_copts(),
2859 msvc_x86_32_copts = ["/arch:AVX2"],
2860 msvc_x86_64_copts = ["/arch:AVX2"],
2861 x86_srcs = AVX2_UKERNELS,
2862 deps = [
2863 ":tables",
2864 "@FP16",
2865 "@pthreadpool",
2866 ],
2867)
2868
2869xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2870 name = "avx512f_ukernels",
2871 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2872 gcc_copts = xnnpack_gcc_std_copts(),
2873 gcc_x86_copts = ["-mavx512f"],
2874 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2875 msvc_copts = xnnpack_msvc_std_copts(),
2876 msvc_x86_32_copts = ["/arch:AVX512"],
2877 msvc_x86_64_copts = ["/arch:AVX512"],
2878 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2879 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2880 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2881 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2882 "@FP16",
2883 "@pthreadpool",
2884 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2885)
2886
2887xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2888 name = "avx512f_ukernels_test_mode",
2889 hdrs = INTERNAL_HDRS,
2890 copts = [
2891 "-UNDEBUG",
2892 "-DXNN_TEST_MODE=1",
2893 ],
2894 gcc_copts = xnnpack_gcc_std_copts(),
2895 gcc_x86_copts = ["-mavx512f"],
2896 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2897 msvc_copts = xnnpack_msvc_std_copts(),
2898 msvc_x86_32_copts = ["/arch:AVX512"],
2899 msvc_x86_64_copts = ["/arch:AVX512"],
2900 msys_copts = ["-fno-asynchronous-unwind-tables"],
2901 x86_srcs = AVX512F_UKERNELS,
2902 deps = [
2903 ":tables",
2904 "@FP16",
2905 "@pthreadpool",
2906 ],
2907)
2908
2909xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2910 name = "asm_ukernels",
2911 hdrs = ["src/xnnpack/assembly.h"],
2912 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2913 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2914 aarch64_srcs = AARCH64_ASM_UKERNELS,
2915)
2916
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2917xnnpack_cc_library(
2918 name = "logging_utils",
2919 srcs = LOGGING_SRCS,
2920 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2921 copts = LOGGING_COPTS + [
2922 "-Isrc",
2923 "-Iinclude",
2924 ] + select({
2925 ":debug_build": [],
2926 "//conditions:default": xnnpack_min_size_copts(),
2927 }),
2928 gcc_copts = xnnpack_gcc_std_copts(),
2929 msvc_copts = xnnpack_msvc_std_copts(),
2930 visibility = xnnpack_visibility(),
2931 deps = [
2932 "@FP16",
2933 "@clog",
2934 "@pthreadpool",
2935 ],
2936)
2937
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2938xnnpack_aggregate_library(
2939 name = "ukernels",
2940 aarch32_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2941 ":neon_ukernels",
2942 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2943 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2944 ":asm_ukernels",
2945 ],
2946 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2947 ":neon_ukernels",
2948 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2949 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2950 ":neonfp16arith_ukernels",
2951 ":asm_ukernels",
2952 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2953 generic_deps = [
2954 ":scalar_ukernels",
2955 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2956 psimd_deps = [
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2957 ":psimd_fastmath_ukernels",
2958 ":psimd_accmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2959 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2960 wasm_deps = [
2961 ":wasm_ukernels",
2962 ],
2963 wasmsimd_deps = [
2964 ":wasm_ukernels",
2965 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2966 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2967 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2968 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2969 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2970 ":avx_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2971 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2972 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2973 ":avx512f_ukernels",
2974 ],
2975)
2976
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2977xnnpack_aggregate_library(
2978 name = "ukernels_test_mode",
2979 aarch32_deps = [
2980 ":neon_ukernels_test_mode",
2981 ":neonfma_ukernels_test_mode",
2982 ":neonv8_ukernels_test_mode",
2983 ":asm_ukernels",
2984 ],
2985 aarch64_deps = [
2986 ":neon_ukernels_test_mode",
2987 ":neonfma_ukernels_test_mode",
2988 ":neonv8_ukernels_test_mode",
2989 ":neonfp16arith_ukernels_test_mode",
2990 ":asm_ukernels",
2991 ],
2992 generic_deps = [
2993 ":scalar_ukernels_test_mode",
2994 ],
2995 psimd_deps = [
2996 ":psimd_fastmath_ukernels_test_mode",
2997 ":psimd_accmath_ukernels_test_mode",
2998 ],
2999 wasm_deps = [
3000 ":wasm_ukernels_test_mode",
3001 ],
3002 wasmsimd_deps = [
3003 ":wasm_ukernels_test_mode",
3004 ],
3005 x86_deps = [
3006 ":sse2_ukernels_test_mode",
3007 ":ssse3_ukernels_test_mode",
3008 ":sse41_ukernels_test_mode",
3009 ":avx_ukernels_test_mode",
3010 ":fma3_ukernels_test_mode",
3011 ":avx2_ukernels_test_mode",
3012 ":avx512f_ukernels_test_mode",
3013 ],
3014)
3015
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]3016# This target must be compatible with Android NDK r17 and compile with Clang 6.
3017# It is similar to :ukernels target, but excludes microkernels which require
3018# NEON FP16 arithmetics, NEON Dot Product, and newer intrinsics.
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3019xnnpack_aggregate_library(
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]3020 name = "ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3021 aarch32_deps = [
3022 ":neon_ukernels",
3023 ":neonfma_ukernels",
3024 ":neonv8_ukernels",
3025 ":asm_ukernels",
3026 ],
3027 aarch64_deps = [
3028 ":neon_ukernels",
3029 ":neonfma_ukernels",
3030 ":neonv8_ukernels",
3031 ":asm_ukernels",
3032 ],
3033 generic_deps = [
3034 ":scalar_ukernels",
3035 ],
3036 psimd_deps = [
3037 ":psimd_fastmath_ukernels",
3038 ":psimd_accmath_ukernels",
3039 ],
3040 wasm_deps = [
3041 ":wasm_ukernels",
3042 ],
3043 wasmsimd_deps = [
3044 ":wasm_ukernels",
3045 ],
3046 x86_deps = [
3047 ":sse2_ukernels",
3048 ":ssse3_ukernels",
3049 ":sse41_ukernels",
3050 ":avx_ukernels",
3051 ":fma3_ukernels",
3052 ":avx2_ukernels",
3053 ":avx512f_ukernels",
3054 ],
3055)
3056
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3057xnnpack_cc_library(
3058 name = "im2col",
3059 srcs = ["src/im2col.c"],
3060 hdrs = [
3061 "src/xnnpack/common.h",
3062 "src/xnnpack/im2col.h",
3063 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3064 gcc_copts = xnnpack_gcc_std_copts(),
3065 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3066)
3067
3068xnnpack_cc_library(
3069 name = "indirection",
3070 srcs = ["src/indirection.c"],
3071 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3072 gcc_copts = xnnpack_gcc_std_copts(),
3073 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3074 deps = [
3075 "@FP16",
3076 "@FXdiv",
3077 "@pthreadpool",
3078 ],
3079)
3080
3081xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3082 name = "indirection_test_mode",
3083 srcs = ["src/indirection.c"],
3084 hdrs = INTERNAL_HDRS,
3085 copts = [
3086 "-UNDEBUG",
3087 "-DXNN_TEST_MODE=1",
3088 ],
3089 gcc_copts = xnnpack_gcc_std_copts(),
3090 msvc_copts = xnnpack_msvc_std_copts(),
3091 deps = [
3092 "@FP16",
3093 "@FXdiv",
3094 "@pthreadpool",
3095 ],
3096)
3097
3098xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3099 name = "operator_run",
3100 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]3101 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3102 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3103 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3104 "//conditions:default": [],
3105 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3106 gcc_copts = xnnpack_gcc_std_copts(),
3107 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3108 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3109 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3110 "@FP16",
3111 "@FXdiv",
3112 "@clog",
3113 "@pthreadpool",
3114 ],
3115)
3116
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3117xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3118 name = "operator_run_test_mode",
3119 srcs = ["src/operator-run.c"],
3120 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
3121 copts = LOGGING_COPTS + [
3122 "-UNDEBUG",
3123 "-DXNN_TEST_MODE=1",
3124 ] + select({
3125 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3126 "//conditions:default": [],
3127 }),
3128 gcc_copts = xnnpack_gcc_std_copts(),
3129 msvc_copts = xnnpack_msvc_std_copts(),
3130 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3131 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3132 "@FP16",
3133 "@FXdiv",
3134 "@clog",
3135 "@pthreadpool",
3136 ],
3137)
3138
3139xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3140 name = "memory_planner",
3141 srcs = ["src/memory-planner.c"],
3142 hdrs = INTERNAL_HDRS,
3143 defines = select({
3144 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3145 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3146 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3147 }),
3148 gcc_copts = xnnpack_gcc_std_copts(),
3149 msvc_copts = xnnpack_msvc_std_copts(),
3150 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3151 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3152 "@pthreadpool",
3153 ],
3154)
3155
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3156xnnpack_cc_library(
3157 name = "memory_planner_test_mode",
3158 srcs = ["src/memory-planner.c"],
3159 hdrs = INTERNAL_HDRS,
3160 copts = [
3161 "-UNDEBUG",
3162 "-DXNN_TEST_MODE=1",
3163 ],
3164 defines = select({
3165 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3166 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3167 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3168 }),
3169 gcc_copts = xnnpack_gcc_std_copts(),
3170 msvc_copts = xnnpack_msvc_std_copts(),
3171 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3172 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3173 "@pthreadpool",
3174 ],
3175)
3176
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3177cc_library(
3178 name = "enable_assembly",
3179 defines = select({
3180 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
3181 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -0700[diff] [blame]3182 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3183 }),
3184)
3185
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3186cc_library(
3187 name = "enable_sparse",
3188 defines = select({
3189 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
3190 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan8b283aa2020-06-18 16:48:57 -0700[diff] [blame]3191 "//conditions:default": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3192 }),
3193)
3194
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3195xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3196 name = "operators",
3197 srcs = OPERATOR_SRCS + [
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]3198 "src/memory.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3199 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3200 ],
3201 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3202 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3203 "-Isrc",
3204 "-Iinclude",
3205 ] + select({
3206 ":debug_build": [],
3207 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3208 }) + select({
3209 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3210 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3211 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3212 gcc_copts = xnnpack_gcc_std_copts(),
3213 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3214 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3215 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3216 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3217 "@FP16",
3218 "@FXdiv",
3219 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3220 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3221 ],
3222)
3223
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3224xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3225 name = "operators_test_mode",
3226 srcs = OPERATOR_SRCS + [
3227 "src/memory.c",
3228 "src/operator-delete.c",
3229 ],
3230 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
3231 copts = LOGGING_COPTS + [
3232 "-Isrc",
3233 "-Iinclude",
3234 "-UNDEBUG",
3235 "-DXNN_TEST_MODE=1",
3236 ] + select({
3237 ":debug_build": [],
3238 "//conditions:default": xnnpack_min_size_copts(),
3239 }) + select({
3240 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3241 "//conditions:default": [],
3242 }),
3243 gcc_copts = xnnpack_gcc_std_copts(),
3244 msvc_copts = xnnpack_msvc_std_copts(),
3245 deps = [
3246 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3247 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3248 "@FP16",
3249 "@FXdiv",
3250 "@clog",
3251 "@pthreadpool",
3252 ],
3253)
3254
3255xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3256 name = "XNNPACK",
3257 srcs = [
3258 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -0800[diff] [blame]3259 "src/runtime.c",
3260 "src/subgraph.c",
3261 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3262 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3263 hdrs = ["include/xnnpack.h"],
3264 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3265 "-Isrc",
3266 "-Iinclude",
3267 ] + select({
3268 ":debug_build": [],
3269 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3270 }) + select({
3271 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3272 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3273 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3274 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3275 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3276 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3277 visibility = xnnpack_visibility(),
3278 deps = [
3279 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3280 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3281 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3282 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3283 ":operator_run",
3284 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3285 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3286 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -0700[diff] [blame]3287 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3288 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -0700[diff] [blame]3289 ] + select({
3290 ":emscripten": [],
3291 "//conditions:default": ["@cpuinfo"],
3292 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3293)
3294
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3295xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3296 name = "XNNPACK_test_mode",
3297 srcs = [
3298 "src/init.c",
3299 "src/runtime.c",
3300 "src/subgraph.c",
3301 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3302 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3303 hdrs = ["include/xnnpack.h"],
3304 copts = LOGGING_COPTS + [
3305 "-Isrc",
3306 "-Iinclude",
3307 "-UNDEBUG",
3308 "-DXNN_TEST_MODE=1",
3309 ] + select({
3310 ":debug_build": [],
3311 "//conditions:default": xnnpack_min_size_copts(),
3312 }) + select({
3313 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3314 "//conditions:default": [],
3315 }),
3316 gcc_copts = xnnpack_gcc_std_copts(),
3317 includes = ["include"],
3318 msvc_copts = xnnpack_msvc_std_copts(),
3319 visibility = xnnpack_visibility(),
3320 deps = [
3321 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3322 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3323 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3324 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3325 ":operator_run_test_mode",
3326 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3327 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3328 "@clog",
3329 "@FP16",
3330 "@pthreadpool",
3331 ] + select({
3332 ":emscripten": [],
3333 "//conditions:default": ["@cpuinfo"],
3334 }),
3335)
3336
3337xnnpack_cc_library(
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3338 name = "xnnpack_f32",
3339 srcs = [
3340 "src/init.c",
3341 "src/runtime.c",
3342 "src/subgraph.c",
3343 "src/tensor.c",
3344 ] + SUBGRAPH_SRCS,
3345 hdrs = ["include/xnnpack.h"],
3346 copts = LOGGING_COPTS + [
3347 "-Isrc",
3348 "-Iinclude",
3349 ] + select({
3350 ":debug_build": [],
3351 "//conditions:default": xnnpack_min_size_copts(),
3352 }) + select({
3353 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3354 "//conditions:default": [],
3355 }),
3356 defines = [
3357 "XNN_NO_Q8_OPERATORS",
3358 "XNN_NO_U8_OPERATORS",
3359 "XNN_NO_X8_OPERATORS",
3360 "XNN_NO_F16_OPERATORS",
3361 "XNN_NO_X16_OPERATORS",
3362 ],
3363 gcc_copts = xnnpack_gcc_std_copts(),
3364 includes = ["include"],
3365 msvc_copts = xnnpack_msvc_std_copts(),
3366 visibility = xnnpack_visibility(),
3367 deps = [
3368 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3369 ":enable_sparse",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3370 ":logging_utils",
3371 ":memory_planner",
3372 ":operator_run",
3373 ":operators",
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]3374 ":ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3375 "@clog",
3376 "@FP16",
3377 "@pthreadpool",
3378 ] + select({
3379 ":emscripten": [],
3380 "//conditions:default": ["@cpuinfo"],
3381 }),
3382)
3383
3384xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3385 name = "xnnpack_operators_nhwc_f32",
3386 srcs = [
3387 "src/init.c",
3388 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3389 hdrs = ["include/xnnpack.h"],
3390 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3391 "-Isrc",
3392 "-Iinclude",
3393 ] + select({
3394 ":debug_build": [],
3395 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3396 }) + select({
3397 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3398 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3399 }),
3400 defines = [
3401 "XNN_NO_Q8_OPERATORS",
3402 "XNN_NO_U8_OPERATORS",
3403 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]3404 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3405 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3406 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3407 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3408 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3409 visibility = xnnpack_visibility(),
3410 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3411 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3412 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3413 ":operator_run",
3414 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3415 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3416 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3417 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3418 ] + select({
3419 ":emscripten": [],
3420 "//conditions:default": ["@cpuinfo"],
3421 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3422)
3423
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3424xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3425 name = "bench_utils",
3426 srcs = ["bench/utils.cc"],
3427 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]3428 deps = [
3429 "@com_google_benchmark//:benchmark",
3430 "@cpuinfo",
3431 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3432)
3433
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3434######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3435
3436xnnpack_benchmark(
3437 name = "q8_gemm_bench",
3438 srcs = [
3439 "bench/gemm.h",
3440 "bench/q8-gemm.cc",
3441 "src/xnnpack/AlignedAllocator.h",
3442 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3443 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3444 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
3445)
3446
3447xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]3448 name = "f16_igemm_bench",
3449 srcs = [
3450 "bench/f16-igemm.cc",
3451 "bench/conv.h",
3452 "bench/google/conv.h",
3453 "src/xnnpack/AlignedAllocator.h",
3454 ] + MICROKERNEL_BENCHMARK_HDRS,
3455 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3456)
3457
3458xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3459 name = "f16_gemm_bench",
3460 srcs = [
3461 "bench/f16-gemm.cc",
3462 "bench/gemm.h",
3463 "src/xnnpack/AlignedAllocator.h",
3464 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3465 deps = MICROKERNEL_BENCHMARK_DEPS,
3466)
3467
3468xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3469 name = "f16_spmm_bench",
3470 srcs = [
3471 "bench/f16-spmm.cc",
3472 "bench/gemm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3473 "src/xnnpack/AlignedAllocator.h",
3474 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3475 deps = MICROKERNEL_BENCHMARK_DEPS,
3476)
3477
3478xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3479 name = "f32_igemm_bench",
3480 srcs = [
3481 "bench/f32-igemm.cc",
3482 "bench/conv.h",
3483 "src/xnnpack/AlignedAllocator.h",
3484 ] + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3485 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3486)
3487
3488xnnpack_benchmark(
3489 name = "f32_conv_hwc_bench",
3490 srcs = [
3491 "bench/f32-conv-hwc.cc",
3492 "bench/dconv.h",
3493 "src/xnnpack/AlignedAllocator.h",
3494 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3495 deps = MICROKERNEL_BENCHMARK_DEPS,
3496)
3497
3498xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3499 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3500 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3501 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3502 "bench/dconv.h",
3503 "src/xnnpack/AlignedAllocator.h",
3504 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3505 deps = MICROKERNEL_BENCHMARK_DEPS,
3506)
3507
3508xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3509 name = "f16_dwconv_bench",
3510 srcs = [
3511 "bench/f16-dwconv.cc",
3512 "bench/dwconv.h",
3513 "bench/google/dwconv.h",
3514 "src/xnnpack/AlignedAllocator.h",
3515 ] + MICROKERNEL_BENCHMARK_HDRS,
3516 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3517)
3518
3519xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3520 name = "f32_dwconv_bench",
3521 srcs = [
3522 "bench/f32-dwconv.cc",
3523 "bench/dwconv.h",
3524 "src/xnnpack/AlignedAllocator.h",
3525 ] + MICROKERNEL_BENCHMARK_HDRS,
3526 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3527)
3528
3529xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3530 name = "f32_dwconv_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3531 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3532 "bench/f32-dwconv-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3533 "bench/dwconv.h",
3534 "src/xnnpack/AlignedAllocator.h",
3535 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3536 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3537)
3538
3539xnnpack_benchmark(
3540 name = "f32_gemm_bench",
3541 srcs = [
3542 "bench/f32-gemm.cc",
3543 "bench/gemm.h",
3544 "src/xnnpack/AlignedAllocator.h",
3545 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3546 copts = xnnpack_optional_ruy_copts(),
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3547 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3548)
3549
3550xnnpack_benchmark(
Marat Dukhana11ca342020-06-25 23:45:07 -0700[diff] [blame]3551 name = "f32_hswish_bench",
3552 srcs = [
3553 "bench/f32-hswish.cc",
3554 "src/xnnpack/AlignedAllocator.h",
3555 ] + MICROKERNEL_BENCHMARK_HDRS,
3556 deps = MICROKERNEL_BENCHMARK_DEPS,
3557)
3558
3559xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3560 name = "f32_raddexpminusmax_bench",
3561 srcs = [
3562 "bench/f32-raddexpminusmax.cc",
3563 "src/xnnpack/AlignedAllocator.h",
3564 ] + MICROKERNEL_BENCHMARK_HDRS,
3565 deps = MICROKERNEL_BENCHMARK_DEPS,
3566)
3567
3568xnnpack_benchmark(
3569 name = "f32_raddextexp_bench",
3570 srcs = [
3571 "bench/f32-raddextexp.cc",
3572 "src/xnnpack/AlignedAllocator.h",
3573 ] + MICROKERNEL_BENCHMARK_HDRS,
3574 deps = MICROKERNEL_BENCHMARK_DEPS,
3575)
3576
3577xnnpack_benchmark(
3578 name = "f32_raddstoreexpminusmax_bench",
3579 srcs = [
3580 "bench/f32-raddstoreexpminusmax.cc",
3581 "src/xnnpack/AlignedAllocator.h",
3582 ] + MICROKERNEL_BENCHMARK_HDRS,
3583 deps = MICROKERNEL_BENCHMARK_DEPS,
3584)
3585
3586xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3587 name = "f32_rmax_bench",
3588 srcs = [
3589 "bench/f32-rmax.cc",
3590 "src/xnnpack/AlignedAllocator.h",
3591 ] + MICROKERNEL_BENCHMARK_HDRS,
3592 deps = MICROKERNEL_BENCHMARK_DEPS,
3593)
3594
3595xnnpack_benchmark(
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3596 name = "f32_sigmoid_bench",
3597 srcs = [
3598 "bench/f32-sigmoid.cc",
3599 "src/xnnpack/AlignedAllocator.h",
3600 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3601 deps = MICROKERNEL_BENCHMARK_DEPS,
3602)
3603
3604xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3605 name = "f32_spmm_bench",
3606 srcs = [
3607 "bench/f32-spmm.cc",
3608 "bench/gemm.h",
3609 "src/xnnpack/AlignedAllocator.h",
3610 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3611 deps = MICROKERNEL_BENCHMARK_DEPS,
3612)
3613
3614xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3615 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3616 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3617 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3618 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3619 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -0800[diff] [blame]3620 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3621)
3622
3623xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3624 name = "f32_vscaleexpminusmax_bench",
3625 srcs = [
3626 "bench/f32-vscaleexpminusmax.cc",
3627 "src/xnnpack/AlignedAllocator.h",
3628 ] + MICROKERNEL_BENCHMARK_HDRS,
3629 deps = MICROKERNEL_BENCHMARK_DEPS,
3630)
3631
3632xnnpack_benchmark(
3633 name = "f32_vscaleextexp_bench",
3634 srcs = [
3635 "bench/f32-vscaleextexp.cc",
3636 "src/xnnpack/AlignedAllocator.h",
3637 ] + MICROKERNEL_BENCHMARK_HDRS,
3638 deps = MICROKERNEL_BENCHMARK_DEPS,
3639)
3640
3641xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame^]3642 name = "f32_vsqrt_bench",
3643 srcs = [
3644 "bench/f32-vsqrt.cc",
3645 "src/xnnpack/AlignedAllocator.h",
3646 ] + MICROKERNEL_BENCHMARK_HDRS,
3647 deps = MICROKERNEL_BENCHMARK_DEPS,
3648)
3649
3650xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3651 name = "f32_im2col_gemm_bench",
3652 srcs = [
3653 "bench/f32-im2col-gemm.cc",
3654 "bench/conv.h",
3655 "src/xnnpack/AlignedAllocator.h",
3656 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3657 deps = MICROKERNEL_BENCHMARK_DEPS + [":im2col"],
3658)
3659
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3660xnnpack_benchmark(
3661 name = "requantization_bench",
3662 srcs = [
3663 "bench/requantization.cc",
3664 "src/xnnpack/requantization-stubs.h",
3665 "src/xnnpack/AlignedAllocator.h",
3666 ] + MICROKERNEL_BENCHMARK_HDRS,
3667 deps = MICROKERNEL_BENCHMARK_DEPS,
3668)
3669
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]3670xnnpack_benchmark(
3671 name = "rounding_bench",
3672 srcs = [
3673 "bench/rounding.cc",
3674 "src/xnnpack/math-stubs.h",
3675 "src/xnnpack/AlignedAllocator.h",
3676 ] + MICROKERNEL_BENCHMARK_HDRS,
3677 deps = MICROKERNEL_BENCHMARK_DEPS,
3678)
3679
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3680########################### Benchmarks for operators ###########################
3681
3682xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3683 name = "average_pooling_bench",
3684 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -0700[diff] [blame]3685 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3686 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3687 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3688)
3689
3690xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3691 name = "bankers_rounding_bench",
3692 srcs = ["bench/bankers-rounding.cc"],
3693 copts = xnnpack_optional_tflite_copts(),
3694 tags = ["nowin32"],
3695 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3696)
3697
3698xnnpack_benchmark(
3699 name = "ceiling_bench",
3700 srcs = ["bench/ceiling.cc"],
3701 copts = xnnpack_optional_tflite_copts(),
3702 tags = ["nowin32"],
3703 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3704)
3705
3706xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3707 name = "channel_shuffle_bench",
3708 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3709 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3710)
3711
3712xnnpack_benchmark(
3713 name = "convolution_bench",
3714 srcs = ["bench/convolution.cc"],
3715 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3716 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3717 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3718)
3719
3720xnnpack_benchmark(
3721 name = "deconvolution_bench",
3722 srcs = ["bench/deconvolution.cc"],
3723 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3724 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3725 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3726)
3727
3728xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3729 name = "floor_bench",
3730 srcs = ["bench/floor.cc"],
3731 copts = xnnpack_optional_tflite_copts(),
3732 tags = ["nowin32"],
3733 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3734)
3735
3736xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3737 name = "global_average_pooling_bench",
3738 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3739 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3740)
3741
3742xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -0700[diff] [blame]3743 name = "hardswish_bench",
3744 srcs = ["bench/hardswish.cc"],
3745 copts = xnnpack_optional_tflite_copts(),
3746 tags = ["nowin32"],
3747 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3748)
3749
3750xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3751 name = "max_pooling_bench",
3752 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3753 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3754)
3755
3756xnnpack_benchmark(
3757 name = "sigmoid_bench",
3758 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -0800[diff] [blame]3759 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3760 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3761 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3762)
3763
3764xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3765 name = "prelu_bench",
3766 srcs = ["bench/prelu.cc"],
3767 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3768 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3769 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3770)
3771
3772xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3773 name = "softmax_bench",
3774 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -0800[diff] [blame]3775 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3776 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3777 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3778)
3779
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3780xnnpack_benchmark(
3781 name = "truncation_bench",
3782 srcs = ["bench/truncation.cc"],
3783 deps = OPERATOR_BENCHMARK_DEPS,
3784)
3785
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3786############################# End-to-end benchmarks ############################
3787
3788cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3789 name = "fp32_mobilenet_v1",
3790 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3791 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3792 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3793 linkstatic = True,
3794 deps = [
3795 ":XNNPACK",
3796 "@pthreadpool",
3797 ],
3798)
3799
3800cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3801 name = "fp16_mobilenet_v1",
3802 srcs = ["models/fp16-mobilenet-v1.cc"],
3803 hdrs = ["models/models.h"],
3804 copts = xnnpack_std_cxxopts(),
3805 linkstatic = True,
3806 deps = [
3807 ":XNNPACK",
3808 "@FP16",
3809 "@pthreadpool",
3810 ],
3811)
3812
3813cc_library(
3814 name = "fp32_mobilenet_v2",
3815 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3816 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3817 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3818 linkstatic = True,
3819 deps = [
3820 ":XNNPACK",
3821 "@pthreadpool",
3822 ],
3823)
3824
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3825cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3826 name = "fp16_mobilenet_v2",
3827 srcs = ["models/fp16-mobilenet-v2.cc"],
3828 hdrs = ["models/models.h"],
3829 copts = xnnpack_std_cxxopts(),
3830 linkstatic = True,
3831 deps = [
3832 ":XNNPACK",
3833 "@FP16",
3834 "@pthreadpool",
3835 ],
3836)
3837
3838cc_library(
3839 name = "fp32_mobilenet_v3_large",
3840 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3841 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3842 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3843 linkstatic = True,
3844 deps = [
3845 ":XNNPACK",
3846 "@pthreadpool",
3847 ],
3848)
3849
3850cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3851 name = "fp32_mobilenet_v3_small",
3852 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3853 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3854 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3855 linkstatic = True,
3856 deps = [
3857 ":XNNPACK",
3858 "@pthreadpool",
3859 ],
3860)
3861
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3862xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3863 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3864 srcs = [
3865 "bench/f32-dwconv-e2e.cc",
3866 "bench/end2end.h",
3867 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3868 deps = MICROKERNEL_BENCHMARK_DEPS + [
3869 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3870 ":fp32_mobilenet_v1",
3871 ":fp32_mobilenet_v2",
3872 ":fp32_mobilenet_v3_large",
3873 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3874 ],
3875)
3876
3877xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3878 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3879 srcs = [
3880 "bench/f32-gemm-e2e.cc",
3881 "bench/end2end.h",
3882 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3883 deps = MICROKERNEL_BENCHMARK_DEPS + [
3884 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3885 ":fp32_mobilenet_v1",
3886 ":fp32_mobilenet_v2",
3887 ":fp32_mobilenet_v3_large",
3888 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3889 ],
3890)
3891
3892xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3893 name = "end2end_bench",
3894 srcs = ["bench/end2end.cc"],
3895 deps = [
3896 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -0700[diff] [blame]3897 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -0700[diff] [blame]3898 ":fp16_mobilenet_v1",
3899 ":fp16_mobilenet_v2",
3900 ":fp32_mobilenet_v1",
3901 ":fp32_mobilenet_v2",
3902 ":fp32_mobilenet_v3_large",
3903 ":fp32_mobilenet_v3_small",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3904 "@pthreadpool",
3905 ],
3906)
3907
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]3908#################### Accuracy evaluation for math functions ####################
3909
3910xnnpack_benchmark(
3911 name = "f32_exp_eval",
3912 srcs = [
3913 "eval/f32-exp.cc",
3914 "src/xnnpack/AlignedAllocator.h",
3915 ] + ACCURACY_EVAL_HDRS,
3916 deps = ACCURACY_EVAL_DEPS,
3917)
3918
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]3919xnnpack_benchmark(
3920 name = "f32_expminus_eval",
3921 srcs = [
3922 "eval/f32-expminus.cc",
3923 "src/xnnpack/AlignedAllocator.h",
3924 ] + ACCURACY_EVAL_HDRS,
3925 deps = ACCURACY_EVAL_DEPS,
3926)
3927
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]3928xnnpack_benchmark(
3929 name = "f32_extexp_eval",
3930 srcs = [
3931 "eval/f32-extexp.cc",
3932 "src/xnnpack/AlignedAllocator.h",
3933 ] + ACCURACY_EVAL_HDRS,
3934 deps = ACCURACY_EVAL_DEPS,
3935)
3936
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3937xnnpack_unit_test(
3938 name = "f32_roundne_eval",
3939 srcs = [
3940 "eval/f32-roundne.cc",
3941 "src/xnnpack/AlignedAllocator.h",
3942 "src/xnnpack/math-stubs.h",
3943 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -0700[diff] [blame]3944 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3945 deps = MICROKERNEL_TEST_DEPS,
3946)
3947
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3948xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3949 name = "f32_roundd_eval",
3950 srcs = [
3951 "eval/f32-roundd.cc",
3952 "src/xnnpack/AlignedAllocator.h",
3953 "src/xnnpack/math-stubs.h",
3954 ] + MICROKERNEL_TEST_HDRS,
3955 automatic = False,
3956 deps = MICROKERNEL_TEST_DEPS,
3957)
3958
3959xnnpack_unit_test(
3960 name = "f32_roundu_eval",
3961 srcs = [
3962 "eval/f32-roundu.cc",
3963 "src/xnnpack/AlignedAllocator.h",
3964 "src/xnnpack/math-stubs.h",
3965 ] + MICROKERNEL_TEST_HDRS,
3966 automatic = False,
3967 deps = MICROKERNEL_TEST_DEPS,
3968)
3969
3970xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3971 name = "f32_roundz_eval",
3972 srcs = [
3973 "eval/f32-roundz.cc",
3974 "src/xnnpack/AlignedAllocator.h",
3975 "src/xnnpack/math-stubs.h",
3976 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3977 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3978 deps = MICROKERNEL_TEST_DEPS,
3979)
3980
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3981xnnpack_benchmark(
3982 name = "f32_sigmoid_eval",
3983 srcs = [
3984 "eval/f32-sigmoid.cc",
3985 "src/xnnpack/AlignedAllocator.h",
3986 ] + ACCURACY_EVAL_HDRS,
3987 deps = ACCURACY_EVAL_DEPS,
3988)
3989
Marat Dukhan84000762020-06-29 18:38:43 -0700[diff] [blame]3990xnnpack_benchmark(
3991 name = "f32_sqrt_eval",
3992 srcs = [
3993 "eval/f32-sqrt.cc",
3994 "src/xnnpack/AlignedAllocator.h",
3995 ] + ACCURACY_EVAL_HDRS,
3996 deps = ACCURACY_EVAL_DEPS + [
3997 ":bench_utils",
3998 ],
3999)
4000
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4001######################### Unit tests for micro-kernels #########################
4002
4003xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4004 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4005 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4006 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4007 "test/gemm-microkernel-tester.h",
4008 "src/xnnpack/AlignedAllocator.h",
4009 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4010 deps = MICROKERNEL_TEST_DEPS,
4011)
4012
4013xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4014 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]4015 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4016 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]4017 "test/spmm-microkernel-tester.h",
4018 "src/xnnpack/AlignedAllocator.h",
4019 ] + MICROKERNEL_TEST_HDRS,
4020 deps = MICROKERNEL_TEST_DEPS,
4021)
4022
4023xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4024 name = "f32_argmaxpool_test",
4025 srcs = [
4026 "test/f32-argmaxpool.cc",
4027 "test/argmaxpool-microkernel-tester.h",
4028 "src/xnnpack/AlignedAllocator.h",
4029 ] + MICROKERNEL_TEST_HDRS,
4030 deps = MICROKERNEL_TEST_DEPS,
4031)
4032
4033xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4034 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4035 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4036 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4037 "test/avgpool-microkernel-tester.h",
4038 "src/xnnpack/AlignedAllocator.h",
4039 ] + MICROKERNEL_TEST_HDRS,
4040 deps = MICROKERNEL_TEST_DEPS,
4041)
4042
4043xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]4044 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]4045 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]4046 "test/f32-ibilinear.cc",
4047 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]4048 "src/xnnpack/AlignedAllocator.h",
4049 ] + MICROKERNEL_TEST_HDRS,
4050 deps = MICROKERNEL_TEST_DEPS,
4051)
4052
4053xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4054 name = "f16_clamp_test",
4055 srcs = [
4056 "test/f16-clamp.cc",
4057 "test/clamp-microkernel-tester.h",
4058 ] + MICROKERNEL_TEST_HDRS,
4059 deps = MICROKERNEL_TEST_DEPS,
4060)
4061
4062xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4063 name = "f32_clamp_test",
4064 srcs = [
4065 "test/f32-clamp.cc",
4066 "test/clamp-microkernel-tester.h",
4067 ] + MICROKERNEL_TEST_HDRS,
4068 deps = MICROKERNEL_TEST_DEPS,
4069)
4070
4071xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]4072 name = "f32_igemm_test",
4073 srcs = [
4074 "test/f32-igemm.cc",
4075 "test/gemm-microkernel-tester.h",
4076 "src/xnnpack/AlignedAllocator.h",
4077 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4078 deps = MICROKERNEL_TEST_DEPS,
4079)
4080
4081xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]4082 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4083 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]4084 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4085 "test/gemm-microkernel-tester.h",
4086 "src/xnnpack/AlignedAllocator.h",
4087 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4088 deps = MICROKERNEL_TEST_DEPS,
4089)
4090
4091xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -0700[diff] [blame]4092 name = "f32_igemm_minmax_test",
4093 srcs = [
4094 "test/f32-igemm-minmax.cc",
4095 "test/gemm-microkernel-tester.h",
4096 "src/xnnpack/AlignedAllocator.h",
4097 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4098 deps = MICROKERNEL_TEST_DEPS,
4099)
4100
4101xnnpack_unit_test(
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]4102 name = "f16_igemm_minmax_test",
4103 srcs = [
4104 "test/f16-igemm-minmax.cc",
4105 "test/gemm-microkernel-tester.h",
4106 "src/xnnpack/AlignedAllocator.h",
4107 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4108 deps = MICROKERNEL_TEST_DEPS,
4109)
4110
4111xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4112 name = "f32_conv_hwc_test",
4113 srcs = [
4114 "test/f32-conv-hwc.cc",
4115 "test/conv-hwc-microkernel-tester.h",
4116 "src/xnnpack/AlignedAllocator.h",
4117 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4118 deps = MICROKERNEL_TEST_DEPS,
4119)
4120
4121xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4122 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4123 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4124 "test/f32-conv-hwc2chw.cc",
4125 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4126 "src/xnnpack/AlignedAllocator.h",
4127 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4128 deps = MICROKERNEL_TEST_DEPS,
4129)
4130
4131xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]4132 name = "f32_dwconv_test",
4133 srcs = [
4134 "test/f32-dwconv.cc",
4135 "test/dwconv-microkernel-tester.h",
4136 "src/xnnpack/AlignedAllocator.h",
4137 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4138 deps = MICROKERNEL_TEST_DEPS,
4139)
4140
4141xnnpack_unit_test(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]4142 name = "f16_dwconv_minmax_test",
4143 srcs = [
4144 "test/f16-dwconv-minmax.cc",
4145 "test/dwconv-microkernel-tester.h",
4146 "src/xnnpack/AlignedAllocator.h",
4147 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4148 deps = MICROKERNEL_TEST_DEPS,
4149)
4150
4151xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4152 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4153 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4154 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4155 "test/dwconv-microkernel-tester.h",
4156 "src/xnnpack/AlignedAllocator.h",
4157 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4158 deps = MICROKERNEL_TEST_DEPS,
4159)
4160
4161xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4162 name = "f32_dwconv_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4163 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4164 "test/f32-dwconv-chw.cc",
4165 "test/dwconv-chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4166 "src/xnnpack/AlignedAllocator.h",
4167 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4168 deps = MICROKERNEL_TEST_DEPS,
4169)
4170
4171xnnpack_unit_test(
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]4172 name = "f16_gavgpool_minmax_test",
4173 srcs = [
4174 "test/f16-gavgpool-minmax.cc",
4175 "test/gavgpool-microkernel-tester.h",
4176 "src/xnnpack/AlignedAllocator.h",
4177 ] + MICROKERNEL_TEST_HDRS,
4178 deps = MICROKERNEL_TEST_DEPS,
4179)
4180
4181xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4182 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4183 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4184 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4185 "test/gavgpool-microkernel-tester.h",
4186 "src/xnnpack/AlignedAllocator.h",
4187 ] + MICROKERNEL_TEST_HDRS,
4188 deps = MICROKERNEL_TEST_DEPS,
4189)
4190
4191xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4192 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4193 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4194 "test/f32-gavgpool-cw.cc",
4195 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4196 "src/xnnpack/AlignedAllocator.h",
4197 ] + MICROKERNEL_TEST_HDRS,
4198 deps = MICROKERNEL_TEST_DEPS,
4199)
4200
4201xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]4202 name = "f32_gemm_test",
4203 srcs = [
4204 "test/f32-gemm.cc",
4205 "test/gemm-microkernel-tester.h",
4206 "src/xnnpack/AlignedAllocator.h",
4207 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4208 deps = MICROKERNEL_TEST_DEPS,
4209)
4210
4211xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]4212 name = "f32_gemm_relu_test",
4213 srcs = [
4214 "test/f32-gemm-relu.cc",
4215 "test/gemm-microkernel-tester.h",
4216 "src/xnnpack/AlignedAllocator.h",
4217 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4218 deps = MICROKERNEL_TEST_DEPS,
4219)
4220
4221xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4222 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4223 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4224 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4225 "test/gemm-microkernel-tester.h",
4226 "src/xnnpack/AlignedAllocator.h",
4227 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4228 deps = MICROKERNEL_TEST_DEPS,
4229)
4230
4231xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4232 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4233 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4234 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4235 "test/gemm-microkernel-tester.h",
4236 "src/xnnpack/AlignedAllocator.h",
4237 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4238 deps = MICROKERNEL_TEST_DEPS,
4239)
4240
4241xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4242 name = "f16_hswish_test",
4243 srcs = [
4244 "test/f16-hswish.cc",
4245 "test/hswish-microkernel-tester.h",
4246 ] + MICROKERNEL_TEST_HDRS,
4247 deps = MICROKERNEL_TEST_DEPS,
4248)
4249
4250xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4251 name = "f32_hswish_test",
4252 srcs = [
4253 "test/f32-hswish.cc",
4254 "test/hswish-microkernel-tester.h",
4255 ] + MICROKERNEL_TEST_HDRS,
4256 deps = MICROKERNEL_TEST_DEPS,
4257)
4258
4259xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4260 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4261 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4262 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4263 "test/maxpool-microkernel-tester.h",
4264 ] + MICROKERNEL_TEST_HDRS,
4265 deps = MICROKERNEL_TEST_DEPS,
4266)
4267
4268xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4269 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4270 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4271 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4272 "test/avgpool-microkernel-tester.h",
4273 "src/xnnpack/AlignedAllocator.h",
4274 ] + MICROKERNEL_TEST_HDRS,
4275 deps = MICROKERNEL_TEST_DEPS,
4276)
4277
4278xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4279 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4280 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4281 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4282 "test/gemm-microkernel-tester.h",
4283 "src/xnnpack/AlignedAllocator.h",
4284 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4285 deps = MICROKERNEL_TEST_DEPS,
4286)
4287
4288xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4289 name = "f16_prelu_test",
4290 srcs = [
4291 "test/f16-prelu.cc",
4292 "test/prelu-microkernel-tester.h",
4293 "src/xnnpack/AlignedAllocator.h",
4294 ] + MICROKERNEL_TEST_HDRS,
4295 deps = MICROKERNEL_TEST_DEPS,
4296)
4297
4298xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4299 name = "f32_prelu_test",
4300 srcs = [
4301 "test/f32-prelu.cc",
4302 "test/prelu-microkernel-tester.h",
4303 "src/xnnpack/AlignedAllocator.h",
4304 ] + MICROKERNEL_TEST_HDRS,
4305 deps = MICROKERNEL_TEST_DEPS,
4306)
4307
4308xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4309 name = "f32_raddexpminusmax_test",
4310 srcs = [
4311 "test/f32-raddexpminusmax.cc",
4312 "test/raddexpminusmax-microkernel-tester.h",
4313 ] + MICROKERNEL_TEST_HDRS,
4314 deps = MICROKERNEL_TEST_DEPS,
4315)
4316
4317xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4318 name = "f32_raddextexp_test",
4319 srcs = [
4320 "test/f32-raddextexp.cc",
4321 "test/raddextexp-microkernel-tester.h",
4322 ] + MICROKERNEL_TEST_HDRS,
4323 deps = MICROKERNEL_TEST_DEPS,
4324)
4325
4326xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4327 name = "f32_raddstoreexpminusmax_test",
4328 srcs = [
4329 "test/f32-raddstoreexpminusmax.cc",
4330 "test/raddstoreexpminusmax-microkernel-tester.h",
4331 ] + MICROKERNEL_TEST_HDRS,
4332 deps = MICROKERNEL_TEST_DEPS,
4333)
4334
4335xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4336 name = "f32_rmax_test",
4337 srcs = [
4338 "test/f32-rmax.cc",
4339 "test/rmax-microkernel-tester.h",
4340 ] + MICROKERNEL_TEST_HDRS,
4341 deps = MICROKERNEL_TEST_DEPS,
4342)
4343
4344xnnpack_unit_test(
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4345 name = "f32_sigmoid_test",
4346 srcs = [
4347 "test/f32-sigmoid.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4348 "test/vunary-microkernel-tester.h",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4349 ] + MICROKERNEL_TEST_HDRS,
4350 deps = MICROKERNEL_TEST_DEPS,
4351)
4352
4353xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4354 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4355 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4356 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4357 "test/spmm-microkernel-tester.h",
4358 "src/xnnpack/AlignedAllocator.h",
4359 ] + MICROKERNEL_TEST_HDRS,
4360 deps = MICROKERNEL_TEST_DEPS,
4361)
4362
4363xnnpack_unit_test(
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]4364 name = "f16_vadd_minmax_test",
4365 srcs = [
4366 "test/f16-vadd-minmax.cc",
4367 "test/vbinary-microkernel-tester.h",
4368 ] + MICROKERNEL_TEST_HDRS,
4369 deps = MICROKERNEL_TEST_DEPS,
4370)
4371
4372xnnpack_unit_test(
4373 name = "f16_vaddc_minmax_test",
4374 srcs = [
4375 "test/f16-vaddc-minmax.cc",
4376 "test/vbinaryc-microkernel-tester.h",
4377 ] + MICROKERNEL_TEST_HDRS,
4378 deps = MICROKERNEL_TEST_DEPS,
4379)
4380
4381xnnpack_unit_test(
4382 name = "f16_vdiv_minmax_test",
4383 srcs = [
4384 "test/f16-vdiv-minmax.cc",
4385 "test/vbinary-microkernel-tester.h",
4386 ] + MICROKERNEL_TEST_HDRS,
4387 deps = MICROKERNEL_TEST_DEPS,
4388)
4389
4390xnnpack_unit_test(
4391 name = "f16_vdivc_minmax_test",
4392 srcs = [
4393 "test/f16-vdivc-minmax.cc",
4394 "test/vbinaryc-microkernel-tester.h",
4395 ] + MICROKERNEL_TEST_HDRS,
4396 deps = MICROKERNEL_TEST_DEPS,
4397)
4398
4399xnnpack_unit_test(
4400 name = "f16_vrdivc_minmax_test",
4401 srcs = [
4402 "test/f16-vrdivc-minmax.cc",
4403 "test/vbinaryc-microkernel-tester.h",
4404 ] + MICROKERNEL_TEST_HDRS,
4405 deps = MICROKERNEL_TEST_DEPS,
4406)
4407
4408xnnpack_unit_test(
4409 name = "f16_vmax_test",
4410 srcs = [
4411 "test/f16-vmax.cc",
4412 "test/vbinary-microkernel-tester.h",
4413 ] + MICROKERNEL_TEST_HDRS,
4414 deps = MICROKERNEL_TEST_DEPS,
4415)
4416
4417xnnpack_unit_test(
4418 name = "f16_vmaxc_test",
4419 srcs = [
4420 "test/f16-vmaxc.cc",
4421 "test/vbinaryc-microkernel-tester.h",
4422 ] + MICROKERNEL_TEST_HDRS,
4423 deps = MICROKERNEL_TEST_DEPS,
4424)
4425
4426xnnpack_unit_test(
4427 name = "f16_vmin_test",
4428 srcs = [
4429 "test/f16-vmin.cc",
4430 "test/vbinary-microkernel-tester.h",
4431 ] + MICROKERNEL_TEST_HDRS,
4432 deps = MICROKERNEL_TEST_DEPS,
4433)
4434
4435xnnpack_unit_test(
4436 name = "f16_vminc_test",
4437 srcs = [
4438 "test/f16-vminc.cc",
4439 "test/vbinaryc-microkernel-tester.h",
4440 ] + MICROKERNEL_TEST_HDRS,
4441 deps = MICROKERNEL_TEST_DEPS,
4442)
4443
4444xnnpack_unit_test(
4445 name = "f16_vmul_minmax_test",
4446 srcs = [
4447 "test/f16-vmul-minmax.cc",
4448 "test/vbinary-microkernel-tester.h",
4449 ] + MICROKERNEL_TEST_HDRS,
4450 deps = MICROKERNEL_TEST_DEPS,
4451)
4452
4453xnnpack_unit_test(
4454 name = "f16_vmulc_minmax_test",
4455 srcs = [
4456 "test/f16-vmulc-minmax.cc",
4457 "test/vbinaryc-microkernel-tester.h",
4458 ] + MICROKERNEL_TEST_HDRS,
4459 deps = MICROKERNEL_TEST_DEPS,
4460)
4461
4462xnnpack_unit_test(
4463 name = "f16_vsub_minmax_test",
4464 srcs = [
4465 "test/f16-vsub-minmax.cc",
4466 "test/vbinary-microkernel-tester.h",
4467 ] + MICROKERNEL_TEST_HDRS,
4468 deps = MICROKERNEL_TEST_DEPS,
4469)
4470
4471xnnpack_unit_test(
4472 name = "f16_vsubc_minmax_test",
4473 srcs = [
4474 "test/f16-vsubc-minmax.cc",
4475 "test/vbinaryc-microkernel-tester.h",
4476 ] + MICROKERNEL_TEST_HDRS,
4477 deps = MICROKERNEL_TEST_DEPS,
4478)
4479
4480xnnpack_unit_test(
4481 name = "f16_vrsubc_minmax_test",
4482 srcs = [
4483 "test/f16-vrsubc-minmax.cc",
4484 "test/vbinaryc-microkernel-tester.h",
4485 ] + MICROKERNEL_TEST_HDRS,
4486 deps = MICROKERNEL_TEST_DEPS,
4487)
4488
4489xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4490 name = "f32_vabs_test",
4491 srcs = [
4492 "test/f32-vabs.cc",
4493 "test/vunary-microkernel-tester.h",
4494 ] + MICROKERNEL_TEST_HDRS,
4495 deps = MICROKERNEL_TEST_DEPS,
4496)
4497
4498xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4499 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4500 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4501 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4502 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4503 ] + MICROKERNEL_TEST_HDRS,
4504 deps = MICROKERNEL_TEST_DEPS,
4505)
4506
4507xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4508 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4509 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4510 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4511 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4512 ] + MICROKERNEL_TEST_HDRS,
4513 deps = MICROKERNEL_TEST_DEPS,
4514)
4515
4516xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4517 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4518 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4519 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4520 "test/vbinary-microkernel-tester.h",
4521 ] + MICROKERNEL_TEST_HDRS,
4522 deps = MICROKERNEL_TEST_DEPS,
4523)
4524
4525xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4526 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4527 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4528 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4529 "test/vbinaryc-microkernel-tester.h",
4530 ] + MICROKERNEL_TEST_HDRS,
4531 deps = MICROKERNEL_TEST_DEPS,
4532)
4533
4534xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4535 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4536 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4537 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4538 "test/vbinaryc-microkernel-tester.h",
4539 ] + MICROKERNEL_TEST_HDRS,
4540 deps = MICROKERNEL_TEST_DEPS,
4541)
4542
4543xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]4544 name = "f32_vmax_test",
4545 srcs = [
4546 "test/f32-vmax.cc",
4547 "test/vbinary-microkernel-tester.h",
4548 ] + MICROKERNEL_TEST_HDRS,
4549 deps = MICROKERNEL_TEST_DEPS,
4550)
4551
4552xnnpack_unit_test(
4553 name = "f32_vmaxc_test",
4554 srcs = [
4555 "test/f32-vmaxc.cc",
4556 "test/vbinaryc-microkernel-tester.h",
4557 ] + MICROKERNEL_TEST_HDRS,
4558 deps = MICROKERNEL_TEST_DEPS,
4559)
4560
4561xnnpack_unit_test(
4562 name = "f32_vmin_test",
4563 srcs = [
4564 "test/f32-vmin.cc",
4565 "test/vbinary-microkernel-tester.h",
4566 ] + MICROKERNEL_TEST_HDRS,
4567 deps = MICROKERNEL_TEST_DEPS,
4568)
4569
4570xnnpack_unit_test(
4571 name = "f32_vminc_test",
4572 srcs = [
4573 "test/f32-vminc.cc",
4574 "test/vbinaryc-microkernel-tester.h",
4575 ] + MICROKERNEL_TEST_HDRS,
4576 deps = MICROKERNEL_TEST_DEPS,
4577)
4578
4579xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4580 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4581 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4582 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4583 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4584 ] + MICROKERNEL_TEST_HDRS,
4585 deps = MICROKERNEL_TEST_DEPS,
4586)
4587
4588xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4589 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4590 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4591 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4592 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4593 ] + MICROKERNEL_TEST_HDRS,
4594 deps = MICROKERNEL_TEST_DEPS,
4595)
4596
4597xnnpack_unit_test(
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]4598 name = "f16_vmulcaddc_minmax_test",
4599 srcs = [
4600 "test/f16-vmulcaddc-minmax.cc",
4601 "test/vmulcaddc-microkernel-tester.h",
4602 "src/xnnpack/AlignedAllocator.h",
4603 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4604 deps = MICROKERNEL_TEST_DEPS,
4605)
4606
4607xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4608 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4609 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4610 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4611 "test/vmulcaddc-microkernel-tester.h",
4612 "src/xnnpack/AlignedAllocator.h",
4613 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4614 deps = MICROKERNEL_TEST_DEPS,
4615)
4616
4617xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]4618 name = "f32_vlrelu_test",
4619 srcs = [
4620 "test/f32-vlrelu.cc",
4621 "test/vunary-microkernel-tester.h",
4622 ] + MICROKERNEL_TEST_HDRS,
4623 deps = MICROKERNEL_TEST_DEPS,
4624)
4625
4626xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4627 name = "f32_vneg_test",
4628 srcs = [
4629 "test/f32-vneg.cc",
4630 "test/vunary-microkernel-tester.h",
4631 ] + MICROKERNEL_TEST_HDRS,
4632 deps = MICROKERNEL_TEST_DEPS,
4633)
4634
4635xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4636 name = "f32_vrndne_test",
4637 srcs = [
4638 "test/f32-vrndne.cc",
4639 "test/vunary-microkernel-tester.h",
4640 ] + MICROKERNEL_TEST_HDRS,
4641 deps = MICROKERNEL_TEST_DEPS,
4642)
4643
4644xnnpack_unit_test(
4645 name = "f32_vrndz_test",
4646 srcs = [
4647 "test/f32-vrndz.cc",
4648 "test/vunary-microkernel-tester.h",
4649 ] + MICROKERNEL_TEST_HDRS,
4650 deps = MICROKERNEL_TEST_DEPS,
4651)
4652
4653xnnpack_unit_test(
4654 name = "f32_vrndu_test",
4655 srcs = [
4656 "test/f32-vrndu.cc",
4657 "test/vunary-microkernel-tester.h",
4658 ] + MICROKERNEL_TEST_HDRS,
4659 deps = MICROKERNEL_TEST_DEPS,
4660)
4661
4662xnnpack_unit_test(
4663 name = "f32_vrndd_test",
4664 srcs = [
4665 "test/f32-vrndd.cc",
4666 "test/vunary-microkernel-tester.h",
4667 ] + MICROKERNEL_TEST_HDRS,
4668 deps = MICROKERNEL_TEST_DEPS,
4669)
4670
4671xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]4672 name = "f32_vscale_test",
4673 srcs = [
4674 "test/f32-vscale.cc",
4675 "test/vscale-microkernel-tester.h",
4676 ] + MICROKERNEL_TEST_HDRS,
4677 deps = MICROKERNEL_TEST_DEPS,
4678)
4679
4680xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4681 name = "f32_vscaleexpminusmax_test",
4682 srcs = [
4683 "test/f32-vscaleexpminusmax.cc",
4684 "test/vscaleexpminusmax-microkernel-tester.h",
4685 ] + MICROKERNEL_TEST_HDRS,
4686 deps = MICROKERNEL_TEST_DEPS,
4687)
4688
4689xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4690 name = "f32_vscaleextexp_test",
4691 srcs = [
4692 "test/f32-vscaleextexp.cc",
4693 "test/vscaleextexp-microkernel-tester.h",
4694 ] + MICROKERNEL_TEST_HDRS,
4695 deps = MICROKERNEL_TEST_DEPS,
4696)
4697
4698xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4699 name = "f32_vsqr_test",
4700 srcs = [
4701 "test/f32-vsqr.cc",
4702 "test/vunary-microkernel-tester.h",
4703 ] + MICROKERNEL_TEST_HDRS,
4704 deps = MICROKERNEL_TEST_DEPS,
4705)
4706
4707xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]4708 name = "f32_vsqrdiff_test",
4709 srcs = [
4710 "test/f32-vsqrdiff.cc",
4711 "test/vbinary-microkernel-tester.h",
4712 ] + MICROKERNEL_TEST_HDRS,
4713 deps = MICROKERNEL_TEST_DEPS,
4714)
4715
4716xnnpack_unit_test(
4717 name = "f32_vsqrdiffc_test",
4718 srcs = [
4719 "test/f32-vsqrdiffc.cc",
4720 "test/vbinaryc-microkernel-tester.h",
4721 ] + MICROKERNEL_TEST_HDRS,
4722 deps = MICROKERNEL_TEST_DEPS,
4723)
4724
4725xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700[diff] [blame^]4726 name = "f32_vsqrt_test",
4727 srcs = [
4728 "test/f32-vsqrt.cc",
4729 "test/vunary-microkernel-tester.h",
4730 ] + MICROKERNEL_TEST_HDRS,
4731 deps = MICROKERNEL_TEST_DEPS,
4732)
4733
4734xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4735 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4736 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4737 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4738 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4739 ] + MICROKERNEL_TEST_HDRS,
4740 deps = MICROKERNEL_TEST_DEPS,
4741)
4742
4743xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4744 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4745 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4746 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4747 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4748 ] + MICROKERNEL_TEST_HDRS,
4749 deps = MICROKERNEL_TEST_DEPS,
4750)
4751
4752xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4753 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4754 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4755 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4756 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4757 ] + MICROKERNEL_TEST_HDRS,
4758 deps = MICROKERNEL_TEST_DEPS,
4759)
4760
4761xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4762 name = "q8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4763 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4764 "test/q8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4765 "test/avgpool-microkernel-tester.h",
4766 "src/xnnpack/AlignedAllocator.h",
4767 ] + MICROKERNEL_TEST_HDRS,
4768 deps = MICROKERNEL_TEST_DEPS,
4769)
4770
4771xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4772 name = "q8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4773 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4774 "test/q8-igemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4775 "test/gemm-microkernel-tester.h",
4776 "src/xnnpack/AlignedAllocator.h",
4777 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4778 deps = MICROKERNEL_TEST_DEPS,
4779)
4780
4781xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4782 name = "q8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4783 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4784 "test/q8-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4785 "test/dwconv-microkernel-tester.h",
4786 "src/xnnpack/AlignedAllocator.h",
4787 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4788 deps = MICROKERNEL_TEST_DEPS,
4789)
4790
4791xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4792 name = "q8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4793 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4794 "test/q8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4795 "test/gavgpool-microkernel-tester.h",
4796 "src/xnnpack/AlignedAllocator.h",
4797 ] + MICROKERNEL_TEST_HDRS,
4798 deps = MICROKERNEL_TEST_DEPS,
4799)
4800
4801xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4802 name = "q8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4803 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4804 "test/q8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4805 "test/gemm-microkernel-tester.h",
4806 "src/xnnpack/AlignedAllocator.h",
4807 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4808 deps = MICROKERNEL_TEST_DEPS,
4809)
4810
4811xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4812 name = "q8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4813 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4814 "test/q8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4815 "test/vadd-microkernel-tester.h",
4816 ] + MICROKERNEL_TEST_HDRS,
4817 deps = MICROKERNEL_TEST_DEPS,
4818)
4819
4820xnnpack_unit_test(
4821 name = "u8_clamp_test",
4822 srcs = [
4823 "test/u8-clamp.cc",
4824 "test/clamp-microkernel-tester.h",
4825 ] + MICROKERNEL_TEST_HDRS,
4826 deps = MICROKERNEL_TEST_DEPS,
4827)
4828
4829xnnpack_unit_test(
4830 name = "u8_lut32norm_test",
4831 srcs = [
4832 "test/u8-lut32norm.cc",
4833 "test/lut-norm-microkernel-tester.h",
4834 ] + MICROKERNEL_TEST_HDRS,
4835 deps = MICROKERNEL_TEST_DEPS,
4836)
4837
4838xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4839 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4840 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4841 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4842 "test/maxpool-microkernel-tester.h",
4843 ] + MICROKERNEL_TEST_HDRS,
4844 deps = MICROKERNEL_TEST_DEPS,
4845)
4846
4847xnnpack_unit_test(
4848 name = "u8_rmax_test",
4849 srcs = [
4850 "test/u8-rmax.cc",
4851 "test/rmax-microkernel-tester.h",
4852 ] + MICROKERNEL_TEST_HDRS,
4853 deps = MICROKERNEL_TEST_DEPS,
4854)
4855
4856xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]4857 name = "x32_fill_test",
4858 srcs = [
4859 "test/x32-fill.cc",
4860 "test/fill-microkernel-tester.h",
4861 ] + MICROKERNEL_TEST_HDRS,
4862 deps = MICROKERNEL_TEST_DEPS,
4863)
4864
4865xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4866 name = "x32_packx_test",
4867 srcs = [
4868 "test/x32-packx.cc",
4869 "test/pack-microkernel-tester.h",
4870 "src/xnnpack/AlignedAllocator.h",
4871 ] + MICROKERNEL_TEST_HDRS,
4872 deps = MICROKERNEL_TEST_DEPS,
4873)
4874
4875xnnpack_unit_test(
4876 name = "x32_pad_test",
4877 srcs = [
4878 "test/x32-pad.cc",
4879 "test/pad-microkernel-tester.h",
4880 ] + MICROKERNEL_TEST_HDRS,
4881 deps = MICROKERNEL_TEST_DEPS,
4882)
4883
4884xnnpack_unit_test(
4885 name = "x32_unpool_test",
4886 srcs = [
4887 "test/x32-unpool.cc",
4888 "test/unpool-microkernel-tester.h",
4889 ] + MICROKERNEL_TEST_HDRS,
4890 deps = MICROKERNEL_TEST_DEPS,
4891)
4892
4893xnnpack_unit_test(
4894 name = "x32_zip_test",
4895 srcs = [
4896 "test/x32-zip.cc",
4897 "test/zip-microkernel-tester.h",
4898 ] + MICROKERNEL_TEST_HDRS,
4899 deps = MICROKERNEL_TEST_DEPS,
4900)
4901
4902xnnpack_unit_test(
4903 name = "x8_lut_test",
4904 srcs = [
4905 "test/x8-lut.cc",
4906 "test/lut-microkernel-tester.h",
4907 ] + MICROKERNEL_TEST_HDRS,
4908 deps = MICROKERNEL_TEST_DEPS,
4909)
4910
4911xnnpack_unit_test(
4912 name = "x8_zip_test",
4913 srcs = [
4914 "test/x8-zip.cc",
4915 "test/zip-microkernel-tester.h",
4916 ] + MICROKERNEL_TEST_HDRS,
4917 deps = MICROKERNEL_TEST_DEPS,
4918)
4919
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]4920xnnpack_unit_test(
4921 name = "requantization_test",
4922 srcs = [
4923 "src/xnnpack/requantization-stubs.h",
4924 "test/requantization.cc",
4925 "test/requantization-tester.h",
4926 ] + MICROKERNEL_TEST_HDRS,
4927 deps = MICROKERNEL_TEST_DEPS,
4928)
4929
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4930########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4931
4932xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4933 name = "operator_size_test",
4934 srcs = ["test/operator-size.c"],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]4935 deps = [":xnnpack_operators_nhwc_f32"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4936)
4937
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4938xnnpack_binary(
4939 name = "subgraph_size_test",
4940 srcs = ["test/subgraph-size.c"],
4941 deps = [":XNNPACK"],
4942)
4943
4944########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4945
4946xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4947 name = "abs_nc_test",
4948 srcs = [
4949 "test/abs-nc.cc",
4950 "test/abs-operator-tester.h",
4951 ],
4952 deps = OPERATOR_TEST_DEPS,
4953)
4954
4955xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4956 name = "add_nd_test",
4957 srcs = [
4958 "test/add-nd.cc",
4959 "test/binary-elementwise-operator-tester.h",
4960 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4961 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4962)
4963
4964xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4965 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4966 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4967 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4968 "test/argmax-pooling-operator-tester.h",
4969 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4970 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4971)
4972
4973xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4974 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4975 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4976 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4977 "test/average-pooling-operator-tester.h",
4978 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4979 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4980)
4981
4982xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4983 name = "bankers_rounding_nc_test",
4984 srcs = [
4985 "test/bankers-rounding-nc.cc",
4986 "test/bankers-rounding-operator-tester.h",
4987 ],
4988 deps = OPERATOR_TEST_DEPS,
4989)
4990
4991xnnpack_unit_test(
4992 name = "ceiling_nc_test",
4993 srcs = [
4994 "test/ceiling-nc.cc",
4995 "test/ceiling-operator-tester.h",
4996 ],
4997 deps = OPERATOR_TEST_DEPS,
4998)
4999
5000xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5001 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5002 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5003 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5004 "test/channel-shuffle-operator-tester.h",
5005 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5006 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5007)
5008
5009xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5010 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5011 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5012 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5013 "test/clamp-operator-tester.h",
5014 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5015 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5016)
5017
5018xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]5019 name = "constant_pad_nd_test",
5020 srcs = [
5021 "test/constant-pad-nd.cc",
5022 "test/constant-pad-operator-tester.h",
5023 ],
5024 deps = OPERATOR_TEST_DEPS,
5025)
5026
5027xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5028 name = "convolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5029 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5030 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5031 "test/convolution-operator-tester.h",
5032 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5033 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5034)
5035
5036xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5037 name = "convolution_nchw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5038 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5039 "test/convolution-nchw.cc",
5040 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5041 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5042 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5043)
5044
5045xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]5046 name = "copy_nc_test",
5047 srcs = [
5048 "test/copy-nc.cc",
5049 "test/copy-operator-tester.h",
5050 ],
5051 deps = OPERATOR_TEST_DEPS,
5052)
5053
5054xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5055 name = "deconvolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5056 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5057 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5058 "test/deconvolution-operator-tester.h",
5059 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5060 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5061)
5062
5063xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]5064 name = "divide_nd_test",
5065 srcs = [
5066 "test/binary-elementwise-operator-tester.h",
5067 "test/divide-nd.cc",
5068 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5069 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]5070)
5071
5072xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5073 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5074 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5075 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5076 "test/fully-connected-operator-tester.h",
5077 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5078 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5079)
5080
5081xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5082 name = "floor_nc_test",
5083 srcs = [
5084 "test/floor-nc.cc",
5085 "test/floor-operator-tester.h",
5086 ],
5087 deps = OPERATOR_TEST_DEPS,
5088)
5089
5090xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5091 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5092 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5093 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5094 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -0700[diff] [blame]5095 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5096 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5097)
5098
5099xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5100 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5101 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5102 "test/global-average-pooling-ncw.cc",
5103 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5104 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5105 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5106)
5107
5108xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5109 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5110 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5111 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5112 "test/hardswish-operator-tester.h",
5113 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5114 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5115)
5116
5117xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5118 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5119 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5120 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5121 "test/leaky-relu-operator-tester.h",
5122 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5123 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5124)
5125
5126xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5127 name = "max_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5128 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5129 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5130 "test/max-pooling-operator-tester.h",
5131 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5132 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5133)
5134
5135xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5136 name = "maximum_nd_test",
5137 srcs = [
5138 "test/binary-elementwise-operator-tester.h",
5139 "test/maximum-nd.cc",
5140 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5141 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5142)
5143
5144xnnpack_unit_test(
5145 name = "minimum_nd_test",
5146 srcs = [
5147 "test/binary-elementwise-operator-tester.h",
5148 "test/minimum-nd.cc",
5149 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5150 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5151)
5152
5153xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5154 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]5155 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]5156 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5157 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]5158 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5159 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]5160)
5161
5162xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]5163 name = "negate_nc_test",
5164 srcs = [
5165 "test/negate-nc.cc",
5166 "test/negate-operator-tester.h",
5167 ],
5168 deps = OPERATOR_TEST_DEPS,
5169)
5170
5171xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5172 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5173 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5174 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5175 "test/prelu-operator-tester.h",
5176 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5177 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5178)
5179
5180xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5181 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5182 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5183 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5184 "test/resize-bilinear-operator-tester.h",
5185 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5186 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5187)
5188
5189xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5190 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5191 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5192 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5193 "test/sigmoid-operator-tester.h",
5194 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5195 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5196)
5197
5198xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5199 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5200 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5201 "test/softmax-nc.cc",
5202 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5203 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5204 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5205)
5206
5207xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]5208 name = "square_nc_test",
5209 srcs = [
5210 "test/square-nc.cc",
5211 "test/square-operator-tester.h",
5212 ],
5213 deps = OPERATOR_TEST_DEPS,
5214)
5215
5216xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]5217 name = "squared_difference_nd_test",
5218 srcs = [
5219 "test/binary-elementwise-operator-tester.h",
5220 "test/squared-difference-nd.cc",
5221 ],
5222 deps = OPERATOR_TEST_DEPS,
5223)
5224
5225xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5226 name = "subtract_nd_test",
5227 srcs = [
5228 "test/binary-elementwise-operator-tester.h",
5229 "test/subtract-nd.cc",
5230 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5231 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5232)
5233
5234xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5235 name = "truncation_nc_test",
5236 srcs = [
5237 "test/truncation-nc.cc",
5238 "test/truncation-operator-tester.h",
5239 ],
5240 deps = OPERATOR_TEST_DEPS,
5241)
5242
5243xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5244 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5245 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5246 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5247 "test/unpooling-operator-tester.h",
5248 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5249 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5250)
5251
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5252############################### Misc unit tests ###############################
5253
5254xnnpack_unit_test(
5255 name = "memory_planner_test",
5256 srcs = [
5257 "test/memory-planner-test.cc",
5258 ],
5259 deps = [
5260 ":XNNPACK",
5261 ":memory_planner",
5262 ],
5263)
5264
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5265############################# Build configurations #############################
5266
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5267# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5268config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5269 name = "xnn_enable_assembly_explicit_true",
5270 define_values = {"xnn_enable_assembly": "true"},
5271)
5272
5273# Disables usage of assembly kernels.
5274config_setting(
5275 name = "xnn_enable_assembly_explicit_false",
5276 define_values = {"xnn_enable_assembly": "false"},
5277)
5278
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]5279# Enables usage of sparse inference.
5280config_setting(
5281 name = "xnn_enable_sparse_explicit_true",
5282 define_values = {"xnn_enable_sparse": "true"},
5283)
5284
5285# Disables usage of sparse inference.
5286config_setting(
5287 name = "xnn_enable_sparse_explicit_false",
5288 define_values = {"xnn_enable_sparse": "false"},
5289)
5290
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]5291# Disables usage of HMP-aware optimizations.
5292config_setting(
5293 name = "xnn_enable_hmp_explicit_false",
5294 define_values = {"xnn_enable_hmp": "false"},
5295)
5296
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5297# Enable usage of optimized memory allocation
5298config_setting(
5299 name = "xnn_enable_memopt_explicit_true",
5300 define_values = {"xnnpack_enable_memopt": "true"},
5301)
5302
5303# Disable usage of optimized memory allocation
5304config_setting(
5305 name = "xnn_enable_memopt_explicit_false",
5306 define_values = {"xnnpack_enable_memopt": "false"},
5307)
5308
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5309# Builds with -c dbg
5310config_setting(
5311 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5312 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5313 "compilation_mode": "dbg",
5314 },
5315)
5316
5317# Builds with -c opt
5318config_setting(
5319 name = "optimized_build",
5320 values = {
5321 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5322 },
5323)
5324
5325config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5326 name = "linux_k8",
5327 values = {"cpu": "k8"},
5328)
5329
5330config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5331 name = "linux_arm",
5332 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -0700[diff] [blame]5333)
5334
5335config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -0700[diff] [blame]5336 name = "linux_armeabi",
5337 values = {"cpu": "armeabi"},
5338)
5339
5340config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -0700[diff] [blame]5341 name = "linux_armhf",
5342 values = {"cpu": "armhf"},
5343)
5344
5345config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -0700[diff] [blame]5346 name = "linux_armv7a",
5347 values = {"cpu": "armv7a"},
5348)
5349
5350config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5351 name = "linux_aarch64",
5352 values = {"cpu": "aarch64"},
5353)
5354
5355config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5356 name = "android",
5357 values = {"crosstool_top": "//external:android/crosstool"},
5358)
5359
5360config_setting(
5361 name = "android_armv7",
5362 values = {
5363 "crosstool_top": "//external:android/crosstool",
5364 "cpu": "armeabi-v7a",
5365 },
5366)
5367
5368config_setting(
5369 name = "android_arm64",
5370 values = {
5371 "crosstool_top": "//external:android/crosstool",
5372 "cpu": "arm64-v8a",
5373 },
5374)
5375
5376config_setting(
5377 name = "android_x86",
5378 values = {
5379 "crosstool_top": "//external:android/crosstool",
5380 "cpu": "x86",
5381 },
5382)
5383
5384config_setting(
5385 name = "android_x86_64",
5386 values = {
5387 "crosstool_top": "//external:android/crosstool",
5388 "cpu": "x86_64",
5389 },
5390)
5391
5392config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5393 name = "windows_x86_64",
5394 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5395)
5396
5397config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5398 name = "windows_x86_64_clang",
5399 values = {
5400 "compiler": "clang-cl",
5401 "cpu": "x64_windows",
5402 },
5403)
5404
5405config_setting(
5406 name = "windows_x86_64_mingw",
5407 values = {
5408 "compiler": "mingw-gcc",
5409 "cpu": "x64_windows",
5410 },
5411)
5412
5413config_setting(
5414 name = "windows_x86_64_msys",
5415 values = {
5416 "compiler": "msys-gcc",
5417 "cpu": "x64_windows",
5418 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5419)
5420
5421config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -0700[diff] [blame]5422 name = "macos_x86_64",
5423 values = {
5424 "apple_platform_type": "macos",
5425 "cpu": "darwin",
5426 },
5427)
5428
5429config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5430 name = "emscripten",
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5431 values = {"crosstool_top": "//toolchain:emscripten"},
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5432)
5433
5434config_setting(
5435 name = "emscripten_wasm",
5436 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5437 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5438 "cpu": "wasm",
5439 },
5440)
5441
5442config_setting(
5443 name = "emscripten_wasmsimd",
5444 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5445 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5446 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -0700[diff] [blame]5447 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5448 },
5449)
5450
5451config_setting(
5452 name = "emscripten_asmjs",
5453 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5454 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5455 "cpu": "asmjs",
5456 },
5457)
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5458
5459config_setting(
5460 name = "ios_armv7",
5461 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5462 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5463 "cpu": "ios_armv7",
5464 },
5465)
5466
5467config_setting(
5468 name = "ios_arm64",
5469 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5470 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5471 "cpu": "ios_arm64",
5472 },
5473)
5474
5475config_setting(
5476 name = "ios_arm64e",
5477 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5478 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5479 "cpu": "ios_arm64e",
5480 },
5481)
5482
5483config_setting(
5484 name = "ios_x86",
5485 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5486 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5487 "cpu": "ios_i386",
5488 },
5489)
5490
5491config_setting(
5492 name = "ios_x86_64",
5493 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5494 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5495 "cpu": "ios_x86_64",
5496 },
5497)
5498
5499config_setting(
5500 name = "watchos_armv7k",
5501 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5502 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5503 "cpu": "watchos_armv7k",
5504 },
5505)
5506
5507config_setting(
5508 name = "watchos_arm64_32",
5509 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5510 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5511 "cpu": "watchos_arm64_32",
5512 },
5513)
5514
5515config_setting(
5516 name = "watchos_x86",
5517 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5518 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5519 "cpu": "watchos_i386",
5520 },
5521)
5522
5523config_setting(
5524 name = "watchos_x86_64",
5525 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5526 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5527 "cpu": "watchos_x86_64",
5528 },
5529)
5530
5531config_setting(
5532 name = "tvos_arm64",
5533 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5534 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5535 "cpu": "tvos_arm64",
5536 },
5537)
5538
5539config_setting(
5540 name = "tvos_x86_64",
5541 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5542 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5543 "cpu": "tvos_x86_64",
5544 },
5545)