XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1 | // Copyright (c) Facebook, Inc. and its affiliates. |
| 2 | // All rights reserved. |
| 3 | // |
| 4 | // Copyright 2019 Google LLC |
| 5 | // |
| 6 | // This source code is licensed under the BSD-style license found in the |
| 7 | // LICENSE file in the root directory of this source tree. |
| 8 | |
| 9 | #include <stdbool.h> |
| 10 | #include <stddef.h> |
| 11 | #include <stdint.h> |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 12 | #include <string.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 13 | |
| 14 | #include <pthread.h> |
| 15 | |
Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 16 | #ifndef __EMSCRIPTEN__ |
| 17 | #include <cpuinfo.h> |
| 18 | #endif |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 19 | |
| 20 | #include <xnnpack.h> |
| 21 | #include <xnnpack/argmaxpool.h> |
| 22 | #include <xnnpack/avgpool.h> |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 23 | #include <xnnpack/bilinear.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 24 | #include <xnnpack/clamp.h> |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 25 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 26 | #include <xnnpack/conv.h> |
| 27 | #include <xnnpack/dwconv.h> |
| 28 | #include <xnnpack/gavgpool.h> |
| 29 | #include <xnnpack/gemm.h> |
| 30 | #include <xnnpack/hswish.h> |
| 31 | #include <xnnpack/igemm.h> |
| 32 | #include <xnnpack/log.h> |
| 33 | #include <xnnpack/lut.h> |
| 34 | #include <xnnpack/maxpool.h> |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 35 | #include <xnnpack/memory.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 36 | #include <xnnpack/pad.h> |
| 37 | #include <xnnpack/params.h> |
| 38 | #include <xnnpack/pavgpool.h> |
| 39 | #include <xnnpack/prelu.h> |
| 40 | #include <xnnpack/rmax.h> |
| 41 | #include <xnnpack/spmm.h> |
| 42 | #include <xnnpack/unpool.h> |
| 43 | #include <xnnpack/vadd.h> |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 44 | #include <xnnpack/vbinary.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 45 | #include <xnnpack/vmulcaddc.h> |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 46 | #include <xnnpack/vunary.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 47 | #include <xnnpack/zip.h> |
| 48 | |
| 49 | #ifndef XNN_ENABLE_ASSEMBLY |
| 50 | #define XNN_ENABLE_ASSEMBLY 1 |
| 51 | #endif |
| 52 | |
| 53 | static pthread_once_t init_guard = PTHREAD_ONCE_INIT; |
| 54 | |
| 55 | struct xnn_parameters xnn_params = { |
| 56 | .initialized = false |
| 57 | }; |
| 58 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 59 | #if XNN_ARCH_PNACL || XNN_ARCH_ASMJS || XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 60 | extern uint32_t xnn_stub_wasm_f32_sub(uint32_t a, uint32_t b); |
| 61 | #endif |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 62 | #if XNN_ARCH_PNACL || XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 63 | extern uint32_t xnn_stub_wasm_f32_min(uint32_t a, uint32_t b); |
| 64 | #endif |
| 65 | |
| 66 | static void init(void) { |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 67 | #if XNN_ARCH_ARM |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 68 | if (!cpuinfo_has_arm_neon()) { |
| 69 | xnn_log_error("XNNPACK initialization failed: NEON is not supported"); |
| 70 | return; |
| 71 | } |
| 72 | |
| 73 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 74 | #ifndef XNN_NO_Q8_OPERATORS |
| 75 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 76 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_4x8__neon, |
| 77 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_4x8__neon, |
| 78 | .mr = 4, |
| 79 | .nr = 8, |
| 80 | }; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 81 | |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 82 | #if XNN_ENABLE_ASSEMBLY |
| 83 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 84 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__aarch32_neon, |
| 85 | .cr = 8, |
| 86 | .mr = 9, |
| 87 | }; |
| 88 | #else |
| 89 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 90 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__neon, |
| 91 | .cr = 8, |
| 92 | .mr = 9, |
| 93 | }; |
| 94 | #endif |
| 95 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 96 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__neon, |
| 97 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__neon, |
| 98 | .mr = 9, |
| 99 | .qr = 8, |
| 100 | }; |
| 101 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 102 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__neon, |
| 103 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__neon, |
| 104 | .mr = 7, |
| 105 | }; |
| 106 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__neon; |
| 107 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 108 | |
| 109 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 110 | #ifndef XNN_NO_U8_OPERATORS |
| 111 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 112 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__neon_c16, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 113 | .mr = 9, |
| 114 | .qr = 8, |
| 115 | }; |
| 116 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__neon; |
| 117 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__neon; |
| 118 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 119 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 120 | |
| 121 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 122 | #ifndef XNN_NO_X8_OPERATORS |
| 123 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 124 | xnn_params.x8.zip = (struct zip_parameters) { |
| 125 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__neon, |
| 126 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__neon, |
| 127 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__neon, |
| 128 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__neon, |
| 129 | }; |
| 130 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 131 | |
| 132 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 133 | #ifndef XNN_NO_F32_OPERATORS |
Frank Barchard | 3267092 | 2019-11-30 21:58:51 -0800 | [diff] [blame] | 134 | #if XNN_ENABLE_ASSEMBLY |
Frank Barchard | f9a3484 | 2019-12-12 11:17:50 -0800 | [diff] [blame^] | 135 | switch (cpuinfo_get_core(0)->uarch) { |
| 136 | case cpuinfo_uarch_cortex_a53: |
| 137 | case cpuinfo_uarch_cortex_a55: |
| 138 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 139 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch32_neon_cortex_a53, |
| 140 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__neon_lane_ld128, |
| 141 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 142 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 143 | .mr = 4, |
| 144 | .nr = 8, |
| 145 | }; |
| 146 | break; |
| 147 | default: |
| 148 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 149 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch32_neon_cortex_a75, |
| 150 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__neon_lane_ld128, |
| 151 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 152 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 153 | .mr = 4, |
| 154 | .nr = 8, |
| 155 | }; |
| 156 | break; |
| 157 | } |
Frank Barchard | 3267092 | 2019-11-30 21:58:51 -0800 | [diff] [blame] | 158 | #else // XNN_ENABLE_ASSEMBLY |
| 159 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 160 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__neon_lane_ld128, |
| 161 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__neon_lane_ld128, |
| 162 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 163 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 164 | .mr = 4, |
| 165 | .nr = 8, |
| 166 | }; |
| 167 | #endif // XNN_ENABLE_ASSEMBLY |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 168 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 169 | .gemm = NULL, |
Frank Barchard | 91317c5 | 2019-11-22 10:54:35 -0800 | [diff] [blame] | 170 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2__neon_lane_ld64, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 171 | .mr = 4, |
| 172 | .nr = 2, |
| 173 | }; |
| 174 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 175 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x4__psimd, |
| 176 | .cr = 4, |
| 177 | .mr = 4, |
| 178 | }; |
| 179 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 180 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__neon, |
| 181 | .cr = 4, |
| 182 | .mr = 9, |
| 183 | }; |
| 184 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 185 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x25__psimd, |
| 186 | .cr = 4, |
| 187 | .mr = 25, |
| 188 | }; |
| 189 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
| 190 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__neon, |
| 191 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__neon, |
| 192 | .mr = 9, |
| 193 | .qr = 8, |
| 194 | }; |
| 195 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
| 196 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__neon, |
| 197 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__neon, |
| 198 | .mr = 9, |
| 199 | .qr = 8, |
| 200 | }; |
| 201 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
| 202 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__neon, |
| 203 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__neon, |
| 204 | .mr = 7, |
| 205 | }; |
| 206 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 207 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 208 | .mr = 9, |
| 209 | .qr = 8, |
| 210 | }; |
| 211 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 212 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 213 | .mr = 4, |
| 214 | }; |
| 215 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 216 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 217 | .mr = 9, |
| 218 | }; |
| 219 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 220 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 221 | .mr = 9, |
| 222 | .qr = 8, |
| 223 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 224 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 225 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__neon_c8, |
| 226 | .pixel_tile = 1, |
| 227 | .channel_tile = 8, |
| 228 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 229 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__neon; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 230 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__neon_x8; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 231 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 232 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__neon_2x8, |
| 233 | .row_tile = 2, |
| 234 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 235 | }; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 236 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 237 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__neon_x8, |
| 238 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 239 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 240 | .element_tile = 8, |
| 241 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 242 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 243 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__scalar_x2, |
| 244 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__scalar_x2, |
| 245 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__scalar_x2, |
| 246 | .element_tile = 2, |
| 247 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 248 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 249 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__neon_x8, |
| 250 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 251 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 252 | .element_tile = 8, |
| 253 | }; |
| 254 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 255 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__neon_x8, |
| 256 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 257 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 258 | .element_tile = 8, |
| 259 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 260 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 261 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__neon_x8, |
| 262 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
| 263 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 264 | .element_tile = 8, |
| 265 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 266 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 267 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__neon_x8, |
| 268 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__neon_x8, |
| 269 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__neon_x8, |
| 270 | .element_tile = 8, |
| 271 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 272 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 273 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__neon_2x, |
| 274 | .channel_tile = 4, |
| 275 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 276 | }; |
| 277 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 278 | |
| 279 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 280 | #ifndef XNN_NO_X32_OPERATORS |
| 281 | xnn_params.x32.pad = (struct pad_parameters) { |
| 282 | .ukernel = xnn_x32_pad_x2__neon, |
| 283 | .mr = 2, |
| 284 | }; |
| 285 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 286 | xnn_params.x32.zip = (struct zip_parameters) { |
| 287 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__neon, |
| 288 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__neon, |
| 289 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__neon, |
| 290 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__neon, |
| 291 | }; |
| 292 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 293 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 294 | #elif XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 295 | |
| 296 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 297 | #ifndef XNN_NO_Q8_OPERATORS |
| 298 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 299 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_8x8__neon, |
| 300 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_8x8__neon, |
| 301 | .mr = 8, |
| 302 | .nr = 8, |
| 303 | }; |
| 304 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 305 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__neon, |
| 306 | .cr = 8, |
| 307 | .mr = 9, |
| 308 | }; |
| 309 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 310 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__neon, |
| 311 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__neon, |
| 312 | .mr = 9, |
| 313 | .qr = 8, |
| 314 | }; |
| 315 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 316 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__neon, |
| 317 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__neon, |
| 318 | .mr = 7, |
| 319 | }; |
| 320 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__neon; |
| 321 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 322 | |
| 323 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 324 | #ifndef XNN_NO_U8_OPERATORS |
| 325 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 326 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__neon_c16, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 327 | .mr = 9, |
| 328 | .qr = 8, |
| 329 | }; |
| 330 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__neon; |
| 331 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 332 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__neon; |
| 333 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 334 | |
| 335 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 336 | #ifndef XNN_NO_X8_OPERATORS |
| 337 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 338 | xnn_params.x8.zip = (struct zip_parameters) { |
| 339 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__neon, |
| 340 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__neon, |
| 341 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__neon, |
| 342 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__neon, |
| 343 | }; |
| 344 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 345 | |
| 346 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 347 | #ifndef XNN_NO_F32_OPERATORS |
| 348 | #if XNN_ENABLE_ASSEMBLY |
| 349 | switch (cpuinfo_get_core(0)->uarch) { |
| 350 | case cpuinfo_uarch_kryo: |
| 351 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 352 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch64_neonfma_cortex_a57, |
| 353 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch64_neonfma_cortex_a75, |
| 354 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 355 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 356 | .mr = 4, |
| 357 | .nr = 8, |
| 358 | }; |
| 359 | break; |
| 360 | case cpuinfo_uarch_cortex_a57: |
| 361 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 362 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a57, |
| 363 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a57, |
| 364 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a57, |
| 365 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a57, |
| 366 | .mr = 6, |
| 367 | .nr = 8, |
| 368 | }; |
| 369 | break; |
| 370 | case cpuinfo_uarch_cortex_a72: |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 371 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 372 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch64_neonfma_cortex_a75, |
| 373 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch64_neonfma_cortex_a75, |
| 374 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 375 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 376 | .mr = 4, |
| 377 | .nr = 8, |
| 378 | }; |
| 379 | break; |
| 380 | case cpuinfo_uarch_cortex_a75: |
Frank Barchard | 263bb09 | 2019-10-28 15:28:46 -0700 | [diff] [blame] | 381 | case cpuinfo_uarch_cortex_a76: |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 382 | case cpuinfo_uarch_meerkat_m3: |
| 383 | case (cpuinfo_uarch_meerkat_m3 + 1): |
| 384 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 385 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a75, |
| 386 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a75, |
| 387 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 388 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 389 | .mr = 6, |
| 390 | .nr = 8, |
| 391 | }; |
| 392 | break; |
Frank Barchard | df06d80 | 2019-11-20 15:53:46 -0800 | [diff] [blame] | 393 | |
| 394 | case cpuinfo_uarch_mongoose_m1: |
| 395 | case cpuinfo_uarch_mongoose_m2: |
| 396 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 397 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8s4__neonfma, |
| 398 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8s4__neonfma, |
| 399 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8s4__neonfma, |
| 400 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8s4__neonfma, |
| 401 | .mr = 6, |
| 402 | .nr = 8, |
| 403 | .log2_sr = 2, |
| 404 | }; |
| 405 | break; |
| 406 | |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 407 | case cpuinfo_uarch_cortex_a53: |
| 408 | case cpuinfo_uarch_cortex_a55: |
| 409 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Frank Barchard | bd1d5d9 | 2019-10-30 15:53:30 -0700 | [diff] [blame] | 410 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a53, |
| 411 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a53, |
| 412 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a53, |
| 413 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a53, |
| 414 | .mr = 6, |
| 415 | .nr = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 416 | }; |
| 417 | break; |
| 418 | case cpuinfo_uarch_cortex_a73: |
| 419 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 420 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a73, |
| 421 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a73, |
| 422 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 423 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 424 | .mr = 6, |
| 425 | .nr = 8, |
| 426 | }; |
| 427 | break; |
| 428 | default: |
| 429 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Frank Barchard | 91317c5 | 2019-11-22 10:54:35 -0800 | [diff] [blame] | 430 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__neonfma_lane_ld64, |
| 431 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__neonfma_lane_ld64, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 432 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 433 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
Frank Barchard | 2af471b | 2019-10-16 19:10:32 -0700 | [diff] [blame] | 434 | .mr = 6, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 435 | .nr = 8, |
| 436 | }; |
| 437 | break; |
| 438 | } |
| 439 | #else // XNN_ENABLE_ASSEMBLY |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 440 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Frank Barchard | 91317c5 | 2019-11-22 10:54:35 -0800 | [diff] [blame] | 441 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__neonfma_lane_ld64, |
| 442 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__neonfma_lane_ld64, |
| 443 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neonfma_lane_ld64, |
| 444 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neonfma_lane_ld64, |
Frank Barchard | 2af471b | 2019-10-16 19:10:32 -0700 | [diff] [blame] | 445 | .mr = 6, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 446 | .nr = 8, |
| 447 | }; |
Frank Barchard | 3267092 | 2019-11-30 21:58:51 -0800 | [diff] [blame] | 448 | #endif // XNN_ENABLE_ASSEMBLY |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 449 | |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 450 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 451 | .gemm = NULL, |
Frank Barchard | 91317c5 | 2019-11-22 10:54:35 -0800 | [diff] [blame] | 452 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2__neonfma_lane_ld64, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 453 | .mr = 4, |
| 454 | .nr = 2, |
| 455 | }; |
| 456 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 457 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x4__psimd, |
| 458 | .cr = 4, |
| 459 | .mr = 4, |
| 460 | }; |
| 461 | switch (cpuinfo_get_core(0)->uarch) { |
| 462 | case cpuinfo_uarch_kryo: |
| 463 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 464 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__neonfma, |
| 465 | .cr = 4, |
| 466 | .mr = 9, |
| 467 | }; |
| 468 | break; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 469 | #if XNN_ENABLE_ASSEMBLY |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 470 | case cpuinfo_uarch_cortex_a53: |
| 471 | case cpuinfo_uarch_cortex_a55: |
| 472 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 473 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__aarch64_neonfma_cortex_a55, |
| 474 | .cr = 4, |
| 475 | .mr = 9, |
| 476 | }; |
| 477 | break; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 478 | #endif |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 479 | default: |
| 480 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 481 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x9__neonfma, |
| 482 | .cr = 8, |
| 483 | .mr = 9, |
| 484 | }; |
| 485 | break; |
| 486 | } |
| 487 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 488 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x25__psimd, |
| 489 | .cr = 4, |
| 490 | .mr = 25, |
| 491 | }; |
| 492 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
| 493 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__neon, |
| 494 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__neon, |
| 495 | .mr = 9, |
| 496 | .qr = 8, |
| 497 | }; |
| 498 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
| 499 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__neon, |
| 500 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__neon, |
| 501 | .mr = 9, |
| 502 | .qr = 8, |
| 503 | }; |
| 504 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
| 505 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__neon, |
| 506 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__neon, |
| 507 | .mr = 7, |
| 508 | }; |
| 509 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 510 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 511 | .mr = 9, |
| 512 | .qr = 8, |
| 513 | }; |
| 514 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 515 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 516 | .mr = 4, |
| 517 | }; |
| 518 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 519 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 520 | .mr = 9, |
| 521 | }; |
| 522 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 523 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 524 | .mr = 9, |
| 525 | .qr = 8, |
| 526 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 527 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 528 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__neonfma_c8, |
| 529 | .pixel_tile = 1, |
| 530 | .channel_tile = 8, |
| 531 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 532 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__neon; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 533 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__neonfma_x8; |
Marat Dukhan | 14bec50 | 2019-11-18 11:35:31 -0800 | [diff] [blame] | 534 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__neon_frac_p9_p10_nr1recps_x16; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 535 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 536 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__neon_2x8, |
| 537 | .row_tile = 2, |
| 538 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 539 | }; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 540 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 541 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__neon_x8, |
| 542 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 543 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 544 | .element_tile = 8, |
| 545 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 546 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 547 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__neon_x8, |
| 548 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__neon_x8, |
| 549 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__neon_x8, |
| 550 | .element_tile = 8, |
| 551 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 552 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 553 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__neon_x8, |
| 554 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 555 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 556 | .element_tile = 8, |
| 557 | }; |
| 558 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 559 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__neon_x8, |
| 560 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 561 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 562 | .element_tile = 8, |
| 563 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 564 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 565 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__neon_x8, |
| 566 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
| 567 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 568 | .element_tile = 8, |
| 569 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 570 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 571 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__neon_x8, |
| 572 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__neon_x8, |
| 573 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__neon_x8, |
| 574 | .element_tile = 8, |
| 575 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 576 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 577 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__neonfma_2x, |
| 578 | .channel_tile = 4, |
| 579 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 580 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 581 | #ifndef XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 582 | xnn_params.f32.spmm = (struct spmm_parameters) { |
Erich Elsen | 9cdade3 | 2019-10-16 05:26:59 -0700 | [diff] [blame] | 583 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_16x1__neonfma_pipelined, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 584 | .mr = 16, |
| 585 | .nr = 1, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 586 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 587 | xnn_params.f32.spmm2 = (struct spmm_parameters) { |
| 588 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_16x2__neonfma, |
| 589 | .mr = 16, |
| 590 | .nr = 2, |
| 591 | }; |
| 592 | xnn_params.f32.spmm4 = (struct spmm_parameters) { |
| 593 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_16x4__neonfma, |
| 594 | .mr = 16, |
| 595 | .nr = 4, |
| 596 | }; |
| 597 | xnn_params.f32.hwc2spchw_dconv3x3c3s2 = (struct hwc2spchw_dconv_parameters) { |
| 598 | .ukernel_with_symm_padding = |
| 599 | (xnn_conv_hwc2spchw_ukernel_function) xnn_f32_conv_hwc2spchw_ukernel_3x3s2p1c3x4__neonfma_2x2, |
| 600 | .output_channel_tile = 4, |
| 601 | .output_height_tile = 2, |
| 602 | .output_width_tile = 2, |
| 603 | }; |
| 604 | xnn_params.f32.spchw_dwconv3x3 = (struct spchw_dwconv_parameters) { |
| 605 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma, |
| 606 | .input_width_tile = 4, |
| 607 | .output_width_tile = 4, |
| 608 | .output_height_tile = 3, |
| 609 | }; |
| 610 | xnn_params.f32.spchw_dwconv3x3s2 = (struct spchw_dwconv_parameters) { |
| 611 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma, |
| 612 | .input_width_tile = 4, |
| 613 | .output_width_tile = 4, |
| 614 | .output_height_tile = 1, |
| 615 | }; |
Marat Dukhan | a99918a | 2019-11-15 14:40:12 -0800 | [diff] [blame] | 616 | xnn_params.f32.spchw_dwconv5x5 = (struct spchw_dwconv_parameters) { |
| 617 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma, |
| 618 | .input_width_tile = 4, |
| 619 | .output_width_tile = 4, |
Erich Elsen | 4ad5115 | 2019-11-19 13:11:53 -0800 | [diff] [blame] | 620 | .output_height_tile = 3, |
Marat Dukhan | a99918a | 2019-11-15 14:40:12 -0800 | [diff] [blame] | 621 | }; |
| 622 | xnn_params.f32.spchw_dwconv5x5s2 = (struct spchw_dwconv_parameters) { |
| 623 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma, |
| 624 | .input_width_tile = 4, |
| 625 | .output_width_tile = 4, |
| 626 | .output_height_tile = 1, |
| 627 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 628 | xnn_params.f32.spchw_gavgpool = (struct spchw_gavgpool_parameters) { |
| 629 | .ukernel = (xnn_gavgpool_spchw_ukernel_function) xnn_f32_gavgpool_spchw_ukernel__neon_x4, |
| 630 | .channel_tile = 4, |
| 631 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 632 | #endif // XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 633 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 634 | |
| 635 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 636 | #ifndef XNN_NO_X32_OPERATORS |
| 637 | xnn_params.x32.pad = (struct pad_parameters) { |
| 638 | .ukernel = xnn_x32_pad_x2__neon, |
| 639 | .mr = 2, |
| 640 | }; |
| 641 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 642 | xnn_params.x32.zip = (struct zip_parameters) { |
| 643 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__neon, |
| 644 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__neon, |
| 645 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__neon, |
| 646 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__neon, |
| 647 | }; |
| 648 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 649 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 650 | #elif XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 651 | if (!cpuinfo_has_x86_sse2()) { |
| 652 | xnn_log_error("XNNPACK initialization failed: SSE2 is not supported"); |
| 653 | return; |
| 654 | } |
| 655 | |
| 656 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 657 | #ifndef XNN_NO_Q8_OPERATORS |
| 658 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 659 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_4x4c2__sse2, |
| 660 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_4x4c2__sse2, |
| 661 | .mr = 4, |
| 662 | .nr = 4, |
| 663 | .log2_kr = 1, |
| 664 | }; |
| 665 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 666 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__sse2, |
| 667 | .cr = 8, |
| 668 | .mr = 9, |
| 669 | }; |
| 670 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 671 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__sse2, |
| 672 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__sse2, |
| 673 | .mr = 9, |
| 674 | .qr = 8, |
| 675 | }; |
| 676 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 677 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__sse2, |
| 678 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__sse2, |
| 679 | .mr = 7, |
| 680 | }; |
| 681 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__sse2; |
| 682 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 683 | |
| 684 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 685 | #ifndef XNN_NO_U8_OPERATORS |
| 686 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 687 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__sse2_c16, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 688 | .mr = 9, |
| 689 | .qr = 8, |
| 690 | }; |
| 691 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__sse2; |
| 692 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 693 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__sse2; |
| 694 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 695 | |
| 696 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 697 | #ifndef XNN_NO_X8_OPERATORS |
| 698 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 699 | xnn_params.x8.zip = (struct zip_parameters) { |
| 700 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__sse2, |
| 701 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__sse2, |
| 702 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__sse2, |
| 703 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__sse2, |
| 704 | }; |
| 705 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 706 | |
| 707 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 708 | #ifndef XNN_NO_F32_OPERATORS |
Marat Dukhan | 0f349c4 | 2019-11-27 11:58:54 -0800 | [diff] [blame] | 709 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 710 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 711 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_7x16__avx512f_broadcast, |
| 712 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_7x16__avx512f_broadcast, |
| 713 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16__avx512f_broadcast, |
| 714 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16__avx512f_broadcast, |
| 715 | .mr = 7, |
| 716 | .nr = 16, |
| 717 | }; |
| 718 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) { |
Marat Dukhan | 2712132 | 2019-12-09 14:57:40 -0800 | [diff] [blame] | 719 | switch (cpuinfo_get_core(0)->uarch) { |
| 720 | case cpuinfo_uarch_zen: |
| 721 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 722 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x16s4__fma3_broadcast, |
| 723 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x16s4__fma3_broadcast, |
| 724 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16s4__fma3_broadcast, |
| 725 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16s4__fma3_broadcast, |
| 726 | .mr = 4, |
| 727 | .nr = 16, |
| 728 | .log2_sr = 2, |
| 729 | }; |
| 730 | break; |
| 731 | default: |
| 732 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 733 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_5x16__fma3_broadcast, |
| 734 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_5x16__fma3_broadcast, |
| 735 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16__fma3_broadcast, |
| 736 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16__fma3_broadcast, |
| 737 | .mr = 5, |
| 738 | .nr = 16, |
| 739 | }; |
| 740 | break; |
| 741 | } |
Marat Dukhan | 1025ea3 | 2019-11-21 16:01:08 -0800 | [diff] [blame] | 742 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 743 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | eccfd71 | 2019-12-08 16:49:27 -0800 | [diff] [blame] | 744 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_5x16__avx_broadcast, |
| 745 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_5x16__avx_broadcast, |
| 746 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16__avx_broadcast, |
| 747 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16__avx_broadcast, |
| 748 | .mr = 5, |
| 749 | .nr = 16, |
Marat Dukhan | 1025ea3 | 2019-11-21 16:01:08 -0800 | [diff] [blame] | 750 | }; |
| 751 | } else { |
| 752 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 753 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__sse_load1, |
| 754 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__sse_load1, |
| 755 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__sse_load1, |
| 756 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__sse_load1, |
| 757 | .mr = 4, |
| 758 | .nr = 8, |
| 759 | }; |
| 760 | } |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 761 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 762 | .gemm = NULL, |
| 763 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2c4__sse, |
| 764 | .mr = 4, |
| 765 | .nr = 2, |
| 766 | .log2_kr = 2, |
| 767 | }; |
Marat Dukhan | 479f87e | 2019-11-27 15:17:06 -0800 | [diff] [blame] | 768 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 769 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 770 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__avx512f, |
| 771 | .cr = 16, |
| 772 | .mr = 4, |
| 773 | }; |
| 774 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 775 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x9__avx512f, |
| 776 | .cr = 16, |
| 777 | .mr = 9, |
| 778 | }; |
| 779 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 780 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x25__avx512f, |
| 781 | .cr = 16, |
| 782 | .mr = 25, |
| 783 | }; |
| 784 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) { |
Marat Dukhan | 17ec5f3 | 2019-11-22 13:34:16 -0800 | [diff] [blame] | 785 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 786 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__fma3, |
| 787 | .cr = 16, |
| 788 | .mr = 4, |
| 789 | }; |
| 790 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 791 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x9__fma3, |
| 792 | .cr = 16, |
| 793 | .mr = 9, |
| 794 | }; |
| 795 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 796 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x25__fma3, |
| 797 | .cr = 8, |
| 798 | .mr = 25, |
| 799 | }; |
| 800 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 801 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 802 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__avx, |
| 803 | .cr = 16, |
| 804 | .mr = 4, |
| 805 | }; |
| 806 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 807 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x9__avx, |
| 808 | .cr = 16, |
| 809 | .mr = 9, |
| 810 | }; |
| 811 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 812 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x25__avx, |
| 813 | .cr = 8, |
| 814 | .mr = 25, |
| 815 | }; |
| 816 | } else { |
| 817 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 818 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x4__sse, |
| 819 | .cr = 8, |
| 820 | .mr = 4, |
| 821 | }; |
| 822 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 823 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x9__sse, |
| 824 | .cr = 8, |
| 825 | .mr = 9, |
| 826 | }; |
| 827 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 828 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x25__sse, |
| 829 | .cr = 8, |
| 830 | .mr = 25, |
| 831 | }; |
| 832 | } |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 833 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
| 834 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__sse, |
| 835 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__sse, |
| 836 | .mr = 9, |
| 837 | .qr = 8, |
| 838 | }; |
| 839 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
| 840 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__sse, |
| 841 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__sse, |
| 842 | .mr = 9, |
| 843 | .qr = 8, |
| 844 | }; |
| 845 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
| 846 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__sse, |
| 847 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__sse, |
| 848 | .mr = 7, |
| 849 | }; |
| 850 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 851 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__sse_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 852 | .mr = 9, |
| 853 | .qr = 8, |
| 854 | }; |
| 855 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 856 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__sse2_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 857 | .mr = 4, |
| 858 | }; |
| 859 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 860 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__sse2_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 861 | .mr = 9, |
| 862 | }; |
| 863 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 864 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__sse2_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 865 | .mr = 9, |
| 866 | .qr = 8, |
| 867 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 868 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 869 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__sse_c8, |
| 870 | .pixel_tile = 1, |
| 871 | .channel_tile = 8, |
| 872 | }; |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 873 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 874 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__avx512f; |
| 875 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 876 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__avx; |
| 877 | } else { |
| 878 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__sse; |
| 879 | } |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 880 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 881 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__avx512f_x32; |
| 882 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) { |
| 883 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__fma3_x16; |
| 884 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 885 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__avx_x16; |
| 886 | } else { |
| 887 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__sse_x8; |
| 888 | } |
Marat Dukhan | 7bee751 | 2019-11-18 15:15:48 -0800 | [diff] [blame] | 889 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__sse2_p5_div_x16; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 890 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 891 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__sse2_2x8, |
| 892 | .row_tile = 2, |
| 893 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 894 | }; |
Marat Dukhan | 9a88efe | 2019-12-10 15:54:24 -0800 | [diff] [blame] | 895 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 896 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 897 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__avx512f_x32, |
| 898 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx512f_x32, |
| 899 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx512f_x32, |
| 900 | .element_tile = 32, |
| 901 | }; |
| 902 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 903 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__avx512f_x32, |
| 904 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__avx512f_x32, |
| 905 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__avx512f_x32, |
| 906 | .element_tile = 32, |
| 907 | }; |
| 908 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 909 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__avx512f_x32, |
| 910 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx512f_x32, |
| 911 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx512f_x32, |
| 912 | .element_tile = 32, |
| 913 | }; |
| 914 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 915 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__avx512f_x32, |
| 916 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx512f_x32, |
| 917 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx512f_x32, |
| 918 | .element_tile = 32, |
| 919 | }; |
| 920 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 921 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__avx512f_x32, |
| 922 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx512f_x32, |
| 923 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx512f_x32, |
| 924 | .element_tile = 32, |
| 925 | }; |
| 926 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 927 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__avx512f_x32, |
| 928 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__avx512f_x32, |
| 929 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__avx512f_x32, |
| 930 | .element_tile = 32, |
| 931 | }; |
| 932 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 933 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 934 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__avx_x16, |
| 935 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx_x16, |
| 936 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx_x16, |
| 937 | .element_tile = 16, |
| 938 | }; |
| 939 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 940 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__avx_x16, |
| 941 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__avx_x16, |
| 942 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__avx_x16, |
| 943 | .element_tile = 16, |
| 944 | }; |
| 945 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 946 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__avx_x16, |
| 947 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx_x16, |
| 948 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx_x16, |
| 949 | .element_tile = 16, |
| 950 | }; |
| 951 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 952 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__avx_x16, |
| 953 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx_x16, |
| 954 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx_x16, |
| 955 | .element_tile = 16, |
| 956 | }; |
| 957 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 958 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__avx_x16, |
| 959 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx_x16, |
| 960 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx_x16, |
| 961 | .element_tile = 16, |
| 962 | }; |
| 963 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 964 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__avx_x16, |
| 965 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__avx_x16, |
| 966 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__avx_x16, |
| 967 | .element_tile = 16, |
| 968 | }; |
| 969 | } else { |
| 970 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 971 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__sse_x8, |
| 972 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__sse_x8, |
| 973 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__sse_x8, |
| 974 | .element_tile = 8, |
| 975 | }; |
| 976 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 977 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__sse_x8, |
| 978 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__sse_x8, |
| 979 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__sse_x8, |
| 980 | .element_tile = 8, |
| 981 | }; |
| 982 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 983 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__sse_x8, |
| 984 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__sse_x8, |
| 985 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__sse_x8, |
| 986 | .element_tile = 8, |
| 987 | }; |
| 988 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 989 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__sse_x8, |
| 990 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__sse_x8, |
| 991 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__sse_x8, |
| 992 | .element_tile = 8, |
| 993 | }; |
| 994 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 995 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__sse_x8, |
| 996 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__sse_x8, |
| 997 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__sse_x8, |
| 998 | .element_tile = 8, |
| 999 | }; |
| 1000 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 1001 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__sse_x8, |
| 1002 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__sse_x8, |
| 1003 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__sse_x8, |
| 1004 | .element_tile = 8, |
| 1005 | }; |
| 1006 | } |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1007 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 1008 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__sse_2x, |
| 1009 | .channel_tile = 4, |
| 1010 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1011 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1012 | #ifndef XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1013 | xnn_params.f32.spmm = (struct spmm_parameters) { |
| 1014 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_4x1__sse, |
| 1015 | .mr = 4, |
| 1016 | .nr = 1, |
| 1017 | }; |
| 1018 | xnn_params.f32.spchw_dwconv3x3 = (struct spchw_dwconv_parameters) { |
| 1019 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3p1__sse, |
| 1020 | .input_width_tile = 4, |
| 1021 | .output_width_tile = 4, |
| 1022 | .output_height_tile = 1, |
| 1023 | }; |
| 1024 | xnn_params.f32.spchw_dwconv3x3s2 = (struct spchw_dwconv_parameters) { |
| 1025 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse, |
| 1026 | .input_width_tile = 4, |
| 1027 | .output_width_tile = 4, |
| 1028 | .output_height_tile = 1, |
| 1029 | }; |
| 1030 | xnn_params.f32.spchw_gavgpool = (struct spchw_gavgpool_parameters) { |
| 1031 | .ukernel = (xnn_gavgpool_spchw_ukernel_function) xnn_f32_gavgpool_spchw_ukernel__sse_x4, |
| 1032 | .channel_tile = 4, |
| 1033 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1034 | #endif // XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1035 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1036 | |
| 1037 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1038 | #ifndef XNN_NO_X32_OPERATORS |
| 1039 | xnn_params.x32.pad = (struct pad_parameters) { |
| 1040 | .ukernel = xnn_x32_pad_x2__sse2, |
| 1041 | .mr = 2, |
| 1042 | }; |
| 1043 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 1044 | xnn_params.x32.zip = (struct zip_parameters) { |
| 1045 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__sse2, |
| 1046 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__sse2, |
| 1047 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__sse2, |
| 1048 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__sse2, |
| 1049 | }; |
| 1050 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1051 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 1052 | #elif XNN_ARCH_PNACL || XNN_ARCH_WASMSIMD |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1053 | // Unlike most other architectures, on x86/x86-64 when floating-point instructions |
| 1054 | // have no NaN arguments, but produce NaN output, the output NaN has sign bit set. |
| 1055 | // We use it to distinguish x86/x86-64 from other architectures, by doing subtraction |
| 1056 | // of two infinities (must produce NaN per IEEE 754 standard). |
| 1057 | static volatile uint32_t minus_inf = UINT32_C(0xFF800000); |
| 1058 | const bool is_wasm_x86 = (int32_t) xnn_stub_wasm_f32_sub(minus_inf, minus_inf) < 0; |
| 1059 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1060 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1061 | #ifndef XNN_NO_Q8_OPERATORS |
| 1062 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 1063 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_2x2__scalar, |
| 1064 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_2x2__scalar, |
| 1065 | .mr = 2, |
| 1066 | .nr = 2, |
| 1067 | }; |
| 1068 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 1069 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up1x9__scalar, |
| 1070 | .cr = 1, |
| 1071 | .mr = 9, |
| 1072 | }; |
| 1073 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 1074 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__scalar, |
| 1075 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__scalar, |
| 1076 | .mr = 9, |
| 1077 | .qr = 8, |
| 1078 | }; |
| 1079 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 1080 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__scalar, |
| 1081 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__scalar, |
| 1082 | .mr = 7, |
| 1083 | }; |
| 1084 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__scalar; |
| 1085 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1086 | |
| 1087 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1088 | #ifndef XNN_NO_U8_OPERATORS |
| 1089 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1090 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1091 | .mr = 9, |
| 1092 | .qr = 8, |
| 1093 | }; |
| 1094 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__scalar; |
| 1095 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 1096 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__scalar; |
| 1097 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1098 | |
| 1099 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1100 | #ifndef XNN_NO_X8_OPERATORS |
| 1101 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 1102 | xnn_params.x8.zip = (struct zip_parameters) { |
| 1103 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__scalar, |
| 1104 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__scalar, |
| 1105 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__scalar, |
| 1106 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__scalar, |
| 1107 | }; |
| 1108 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1109 | |
| 1110 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1111 | #ifndef XNN_NO_F32_OPERATORS |
| 1112 | if (is_wasm_x86) { |
| 1113 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | cb80197 | 2019-10-23 02:10:33 -0700 | [diff] [blame] | 1114 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__psimd_splat, |
| 1115 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__psimd_splat, |
| 1116 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__psimd_splat, |
| 1117 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__psimd_splat, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1118 | .mr = 4, |
| 1119 | .nr = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1120 | }; |
| 1121 | } else { |
| 1122 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | cd945c6 | 2019-10-25 11:59:50 -0700 | [diff] [blame] | 1123 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8s4__psimd, |
| 1124 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8s4__psimd, |
| 1125 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_igemm_ukernel_1x8s4__psimd, |
| 1126 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8s4__psimd, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1127 | .mr = 6, |
| 1128 | .nr = 8, |
Marat Dukhan | cd945c6 | 2019-10-25 11:59:50 -0700 | [diff] [blame] | 1129 | .log2_sr = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1130 | }; |
| 1131 | } |
| 1132 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 1133 | .gemm = NULL, |
| 1134 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2c4__psimd, |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1135 | .mr = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1136 | .nr = 2, |
| 1137 | .log2_kr = 2, |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1138 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1139 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
Marat Dukhan | 5098c3e | 2019-11-07 12:01:19 -0800 | [diff] [blame] | 1140 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x4__psimd_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1141 | .cr = 4, |
| 1142 | .mr = 4, |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1143 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1144 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
Marat Dukhan | 5098c3e | 2019-11-07 12:01:19 -0800 | [diff] [blame] | 1145 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__psimd_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1146 | .cr = 4, |
| 1147 | .mr = 9, |
| 1148 | }; |
| 1149 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
Marat Dukhan | 5098c3e | 2019-11-07 12:01:19 -0800 | [diff] [blame] | 1150 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x25__psimd_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1151 | .cr = 4, |
| 1152 | .mr = 25, |
| 1153 | }; |
| 1154 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
| 1155 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__psimd, |
| 1156 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__psimd, |
| 1157 | .mr = 9, |
| 1158 | .qr = 8, |
| 1159 | }; |
| 1160 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
| 1161 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__psimd, |
| 1162 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__psimd, |
| 1163 | .mr = 9, |
| 1164 | .qr = 8, |
| 1165 | }; |
| 1166 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
| 1167 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__psimd, |
| 1168 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__psimd, |
| 1169 | .mr = 7, |
| 1170 | }; |
| 1171 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1172 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1173 | .mr = 9, |
| 1174 | .qr = 8, |
| 1175 | }; |
| 1176 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1177 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1178 | .mr = 4, |
| 1179 | }; |
| 1180 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1181 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1182 | .mr = 9, |
| 1183 | }; |
| 1184 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1185 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1186 | .mr = 9, |
| 1187 | .qr = 8, |
| 1188 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 1189 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 1190 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__psimd_c8, |
| 1191 | .pixel_tile = 1, |
| 1192 | .channel_tile = 8, |
| 1193 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1194 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__psimd; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 1195 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__psimd_x8; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1196 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 1197 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__psimd_2x8, |
| 1198 | .row_tile = 2, |
| 1199 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1200 | }; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 1201 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 1202 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__psimd_x8, |
| 1203 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__psimd_x8, |
| 1204 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__psimd_x8, |
| 1205 | .element_tile = 8, |
| 1206 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 1207 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 1208 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__psimd_x4, |
| 1209 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__psimd_x4, |
| 1210 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__psimd_x4, |
| 1211 | .element_tile = 4, |
| 1212 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 1213 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 1214 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__psimd_x8, |
| 1215 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__psimd_x8, |
| 1216 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__psimd_x8, |
| 1217 | .element_tile = 8, |
| 1218 | }; |
| 1219 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 1220 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__psimd_x8, |
| 1221 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__psimd_x8, |
| 1222 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__psimd_x8, |
| 1223 | .element_tile = 8, |
| 1224 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 1225 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 1226 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__psimd_x8, |
| 1227 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__psimd_x8, |
| 1228 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__psimd_x8, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 1229 | .element_tile = 8, |
| 1230 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 1231 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 1232 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__psimd_x8, |
| 1233 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__psimd_x8, |
| 1234 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__psimd_x8, |
| 1235 | .element_tile = 8, |
| 1236 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1237 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 1238 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__psimd_2x, |
| 1239 | .channel_tile = 4, |
| 1240 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1241 | }; |
| 1242 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1243 | |
| 1244 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1245 | #ifndef XNN_NO_X32_OPERATORS |
| 1246 | xnn_params.x32.pad = (struct pad_parameters) { |
| 1247 | .ukernel = xnn_x32_pad_x2__psimd, |
| 1248 | .mr = 2, |
| 1249 | }; |
| 1250 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 1251 | xnn_params.x32.zip = (struct zip_parameters) { |
| 1252 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__psimd, |
| 1253 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__psimd, |
| 1254 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__psimd, |
| 1255 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__psimd, |
| 1256 | }; |
| 1257 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1258 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 1259 | #elif XNN_ARCH_WASM || XNN_ARCH_ASMJS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1260 | // Unlike most other architectures, on x86/x86-64 when floating-point instructions |
| 1261 | // have no NaN arguments, but produce NaN output, the output NaN has sign bit set. |
| 1262 | // We use it to distinguish x86/x86-64 from other architectures, by doing subtraction |
| 1263 | // of two infinities (must produce NaN per IEEE 754 standard). |
| 1264 | static volatile uint32_t minus_inf = UINT32_C(0xFF800000); |
| 1265 | const bool is_wasm_x86 = (int32_t) xnn_stub_wasm_f32_sub(minus_inf, minus_inf) < 0; |
| 1266 | |
| 1267 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1268 | #ifndef XNN_NO_Q8_OPERATORS |
| 1269 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 1270 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_2x2__scalar, |
| 1271 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_2x2__scalar, |
| 1272 | .mr = 2, |
| 1273 | .nr = 2, |
| 1274 | }; |
| 1275 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 1276 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up1x9__scalar, |
| 1277 | .cr = 1, |
| 1278 | .mr = 9, |
| 1279 | }; |
| 1280 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 1281 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__scalar, |
| 1282 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__scalar, |
| 1283 | .mr = 9, |
| 1284 | .qr = 8, |
| 1285 | }; |
| 1286 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 1287 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__scalar, |
| 1288 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__scalar, |
| 1289 | .mr = 7, |
| 1290 | }; |
| 1291 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__scalar; |
| 1292 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1293 | |
| 1294 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1295 | #ifndef XNN_NO_U8_OPERATORS |
| 1296 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1297 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1298 | .mr = 9, |
| 1299 | .qr = 8, |
| 1300 | }; |
| 1301 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__scalar; |
| 1302 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 1303 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__scalar; |
| 1304 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1305 | |
| 1306 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1307 | #ifndef XNN_NO_X8_OPERATORS |
| 1308 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 1309 | xnn_params.x8.zip = (struct zip_parameters) { |
| 1310 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__scalar, |
| 1311 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__scalar, |
| 1312 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__scalar, |
| 1313 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__scalar, |
| 1314 | }; |
| 1315 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1316 | |
| 1317 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1318 | #ifndef XNN_NO_F32_OPERATORS |
| 1319 | if (is_wasm_x86) { |
| 1320 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 1321 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_2x4__scalar, |
| 1322 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_2x4__scalar, |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1323 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x4__wasm, |
| 1324 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x4__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1325 | .mr = 2, |
| 1326 | .nr = 4, |
| 1327 | }; |
| 1328 | } else { |
| 1329 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1330 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x4__wasm, |
| 1331 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x4__wasm, |
| 1332 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x4__wasm, |
| 1333 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x4__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1334 | .mr = 4, |
| 1335 | .nr = 4, |
| 1336 | }; |
| 1337 | } |
| 1338 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 1339 | .gemm = NULL, |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1340 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2__wasm, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1341 | .mr = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1342 | .nr = 2, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1343 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1344 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1345 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up1x4__wasm_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1346 | .cr = 1, |
| 1347 | .mr = 4, |
| 1348 | }; |
| 1349 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1350 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up1x9__wasm_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1351 | .cr = 1, |
| 1352 | .mr = 9, |
| 1353 | }; |
| 1354 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1355 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up1x25__wasm_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1356 | .cr = 1, |
| 1357 | .mr = 25, |
| 1358 | }; |
| 1359 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1360 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__wasm, |
| 1361 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1362 | .mr = 9, |
| 1363 | .qr = 8, |
| 1364 | }; |
| 1365 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1366 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__wasm, |
| 1367 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1368 | .mr = 9, |
| 1369 | .qr = 8, |
| 1370 | }; |
| 1371 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1372 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__wasm, |
| 1373 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1374 | .mr = 7, |
| 1375 | }; |
| 1376 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1377 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__wasm_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1378 | .mr = 9, |
| 1379 | .qr = 8, |
| 1380 | }; |
| 1381 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1382 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1383 | .mr = 4, |
| 1384 | }; |
| 1385 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1386 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1387 | .mr = 9, |
| 1388 | }; |
| 1389 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1390 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1391 | .mr = 9, |
| 1392 | .qr = 8, |
| 1393 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 1394 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 1395 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__scalar_c2, |
| 1396 | .pixel_tile = 1, |
| 1397 | .channel_tile = 2, |
| 1398 | }; |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1399 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__wasm; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 1400 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__wasm_x4; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1401 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1402 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__wasm_2x4, |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 1403 | .row_tile = 4, |
| 1404 | .channel_tile = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1405 | }; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 1406 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1407 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__wasm_x4, |
| 1408 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__wasm_x4, |
| 1409 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__wasm_x4, |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 1410 | .element_tile = 8, |
| 1411 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 1412 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 1413 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__wasm_x2, |
| 1414 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__wasm_x2, |
| 1415 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__wasm_x2, |
| 1416 | .element_tile = 2, |
| 1417 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 1418 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 1419 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__wasm_x4, |
| 1420 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__wasm_x4, |
| 1421 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__wasm_x4, |
| 1422 | .element_tile = 8, |
| 1423 | }; |
| 1424 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 1425 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__wasm_x4, |
| 1426 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__wasm_x4, |
| 1427 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__wasm_x4, |
| 1428 | .element_tile = 8, |
| 1429 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 1430 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1431 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__wasm_x4, |
| 1432 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__wasm_x4, |
| 1433 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__wasm_x4, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 1434 | .element_tile = 8, |
| 1435 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 1436 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1437 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__wasm_x4, |
| 1438 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__wasm_x4, |
| 1439 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__wasm_x4, |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 1440 | .element_tile = 8, |
| 1441 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1442 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1443 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c1__wasm_2x, |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 1444 | .channel_tile = 1, |
| 1445 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1446 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1447 | #ifndef XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1448 | xnn_params.f32.spmm = (struct spmm_parameters) { |
Marat Dukhan | bff791e | 2019-10-24 11:05:37 -0700 | [diff] [blame] | 1449 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_8x1__scalar, |
| 1450 | .mr = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1451 | .nr = 1, |
| 1452 | }; |
Erich Elsen | c6afd9b | 2019-10-24 16:10:53 -0700 | [diff] [blame] | 1453 | xnn_params.f32.spmm2 = (struct spmm_parameters) { |
| 1454 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_8x2__scalar, |
| 1455 | .mr = 8, |
| 1456 | .nr = 2, |
| 1457 | }; |
| 1458 | xnn_params.f32.spmm4 = (struct spmm_parameters) { |
| 1459 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_8x4__scalar, |
| 1460 | .mr = 8, |
| 1461 | .nr = 4, |
| 1462 | }; |
Marat Dukhan | 14fe0b2 | 2019-10-23 21:20:07 -0700 | [diff] [blame] | 1463 | xnn_params.f32.hwc2spchw_dconv3x3c3s2 = (struct hwc2spchw_dconv_parameters) { |
| 1464 | .ukernel_with_symm_padding = |
| 1465 | (xnn_conv_hwc2spchw_ukernel_function) xnn_f32_conv_hwc2spchw_ukernel_3x3s2p1c3x4__scalar_1x1, |
| 1466 | .output_channel_tile = 4, |
| 1467 | .output_height_tile = 1, |
| 1468 | .output_width_tile = 1, |
| 1469 | }; |
| 1470 | xnn_params.f32.spchw_dwconv3x3 = (struct spchw_dwconv_parameters) { |
| 1471 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3p1__scalar, |
| 1472 | .input_width_tile = 1, |
| 1473 | .output_width_tile = 1, |
| 1474 | .output_height_tile = 1, |
| 1475 | }; |
| 1476 | xnn_params.f32.spchw_dwconv3x3s2 = (struct spchw_dwconv_parameters) { |
| 1477 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3s2p1__scalar, |
| 1478 | .input_width_tile = 1, |
| 1479 | .output_width_tile = 1, |
| 1480 | .output_height_tile = 1, |
| 1481 | }; |
Marat Dukhan | a99918a | 2019-11-15 14:40:12 -0800 | [diff] [blame] | 1482 | xnn_params.f32.spchw_dwconv5x5 = (struct spchw_dwconv_parameters) { |
| 1483 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5p2__scalar, |
| 1484 | .input_width_tile = 1, |
| 1485 | .output_width_tile = 1, |
| 1486 | .output_height_tile = 1, |
| 1487 | }; |
| 1488 | xnn_params.f32.spchw_dwconv5x5s2 = (struct spchw_dwconv_parameters) { |
| 1489 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5s2p2__scalar, |
| 1490 | .input_width_tile = 1, |
| 1491 | .output_width_tile = 1, |
| 1492 | .output_height_tile = 1, |
| 1493 | }; |
Marat Dukhan | 14fe0b2 | 2019-10-23 21:20:07 -0700 | [diff] [blame] | 1494 | xnn_params.f32.spchw_gavgpool = (struct spchw_gavgpool_parameters) { |
| 1495 | .ukernel = (xnn_gavgpool_spchw_ukernel_function) xnn_f32_gavgpool_spchw_ukernel__scalar_x1, |
| 1496 | .channel_tile = 1, |
| 1497 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1498 | #endif // XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1499 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1500 | |
| 1501 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1502 | #ifndef XNN_NO_X32_OPERATORS |
| 1503 | xnn_params.x32.pad = (struct pad_parameters) { |
| 1504 | .ukernel = xnn_x32_pad_x2__scalar, |
| 1505 | .mr = 2, |
| 1506 | }; |
| 1507 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__scalar; |
| 1508 | xnn_params.x32.zip = (struct zip_parameters) { |
| 1509 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__scalar, |
| 1510 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__scalar, |
| 1511 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__scalar, |
| 1512 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__scalar, |
| 1513 | }; |
| 1514 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1515 | |
| 1516 | #else |
| 1517 | #error "Unsupported architecture" |
| 1518 | #endif |
| 1519 | xnn_params.initialized = true; |
| 1520 | } |
| 1521 | |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 1522 | enum xnn_status xnn_initialize(const struct xnn_allocator* allocator) { |
Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 1523 | #ifndef __EMSCRIPTEN__ |
| 1524 | if (!cpuinfo_initialize()) { |
| 1525 | return xnn_status_out_of_memory; |
| 1526 | } |
| 1527 | #endif |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1528 | pthread_once(&init_guard, &init); |
| 1529 | if (xnn_params.initialized) { |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 1530 | if (allocator != NULL) { |
| 1531 | memcpy(&xnn_params.allocator, allocator, sizeof(struct xnn_allocator)); |
| 1532 | } else { |
| 1533 | xnn_params.allocator.allocate = &xnn_allocate; |
| 1534 | xnn_params.allocator.reallocate = &xnn_reallocate; |
| 1535 | xnn_params.allocator.deallocate = &xnn_deallocate; |
| 1536 | xnn_params.allocator.aligned_allocate = &xnn_aligned_allocate; |
| 1537 | xnn_params.allocator.aligned_deallocate = &xnn_aligned_deallocate; |
| 1538 | } |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1539 | return xnn_status_success; |
| 1540 | } else { |
| 1541 | return xnn_status_unsupported_hardware; |
| 1542 | } |
| 1543 | } |
| 1544 | |
| 1545 | enum xnn_status xnn_deinitialize(void) { |
Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 1546 | #ifndef __EMSCRIPTEN__ |
| 1547 | cpuinfo_deinitialize(); |
| 1548 | #endif |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1549 | return xnn_status_success; |
| 1550 | } |