XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1 | // Copyright (c) Facebook, Inc. and its affiliates. |
| 2 | // All rights reserved. |
| 3 | // |
| 4 | // Copyright 2019 Google LLC |
| 5 | // |
| 6 | // This source code is licensed under the BSD-style license found in the |
| 7 | // LICENSE file in the root directory of this source tree. |
| 8 | |
| 9 | #include <stdbool.h> |
| 10 | #include <stddef.h> |
| 11 | #include <stdint.h> |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 12 | #include <string.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 13 | |
| 14 | #include <pthread.h> |
| 15 | |
Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 16 | #ifndef __EMSCRIPTEN__ |
| 17 | #include <cpuinfo.h> |
| 18 | #endif |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 19 | |
| 20 | #include <xnnpack.h> |
| 21 | #include <xnnpack/argmaxpool.h> |
| 22 | #include <xnnpack/avgpool.h> |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 23 | #include <xnnpack/bilinear.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 24 | #include <xnnpack/clamp.h> |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 25 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 26 | #include <xnnpack/conv.h> |
| 27 | #include <xnnpack/dwconv.h> |
| 28 | #include <xnnpack/gavgpool.h> |
| 29 | #include <xnnpack/gemm.h> |
| 30 | #include <xnnpack/hswish.h> |
| 31 | #include <xnnpack/igemm.h> |
| 32 | #include <xnnpack/log.h> |
| 33 | #include <xnnpack/lut.h> |
| 34 | #include <xnnpack/maxpool.h> |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 35 | #include <xnnpack/memory.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 36 | #include <xnnpack/pad.h> |
| 37 | #include <xnnpack/params.h> |
| 38 | #include <xnnpack/pavgpool.h> |
| 39 | #include <xnnpack/prelu.h> |
Marat Dukhan | 1edc454 | 2020-01-27 12:40:13 -0800 | [diff] [blame] | 40 | #include <xnnpack/raddstoreexpminusmax.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 41 | #include <xnnpack/rmax.h> |
| 42 | #include <xnnpack/spmm.h> |
| 43 | #include <xnnpack/unpool.h> |
| 44 | #include <xnnpack/vadd.h> |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 45 | #include <xnnpack/vbinary.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 46 | #include <xnnpack/vmulcaddc.h> |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 47 | #include <xnnpack/vunary.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 48 | #include <xnnpack/zip.h> |
| 49 | |
| 50 | #ifndef XNN_ENABLE_ASSEMBLY |
| 51 | #define XNN_ENABLE_ASSEMBLY 1 |
| 52 | #endif |
| 53 | |
| 54 | static pthread_once_t init_guard = PTHREAD_ONCE_INIT; |
| 55 | |
| 56 | struct xnn_parameters xnn_params = { |
| 57 | .initialized = false |
| 58 | }; |
| 59 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 60 | #if XNN_ARCH_PNACL || XNN_ARCH_ASMJS || XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 61 | extern uint32_t xnn_stub_wasm_f32_sub(uint32_t a, uint32_t b); |
| 62 | #endif |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 63 | #if XNN_ARCH_PNACL || XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 64 | extern uint32_t xnn_stub_wasm_f32_min(uint32_t a, uint32_t b); |
| 65 | #endif |
| 66 | |
| 67 | static void init(void) { |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 68 | #if XNN_ARCH_ARM |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 69 | if (!cpuinfo_has_arm_neon()) { |
| 70 | xnn_log_error("XNNPACK initialization failed: NEON is not supported"); |
| 71 | return; |
| 72 | } |
| 73 | |
| 74 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 75 | #ifndef XNN_NO_Q8_OPERATORS |
| 76 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 77 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_4x8__neon, |
| 78 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_4x8__neon, |
| 79 | .mr = 4, |
| 80 | .nr = 8, |
| 81 | }; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 82 | |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 83 | #if XNN_ENABLE_ASSEMBLY |
| 84 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 85 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__aarch32_neon, |
| 86 | .cr = 8, |
| 87 | .mr = 9, |
| 88 | }; |
| 89 | #else |
| 90 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 91 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__neon, |
| 92 | .cr = 8, |
| 93 | .mr = 9, |
| 94 | }; |
| 95 | #endif |
| 96 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 97 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__neon, |
| 98 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__neon, |
| 99 | .mr = 9, |
| 100 | .qr = 8, |
| 101 | }; |
| 102 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 103 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__neon, |
| 104 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__neon, |
| 105 | .mr = 7, |
| 106 | }; |
| 107 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__neon; |
| 108 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 109 | |
| 110 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 111 | #ifndef XNN_NO_U8_OPERATORS |
| 112 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 113 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__neon_c16, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 114 | .mr = 9, |
| 115 | .qr = 8, |
| 116 | }; |
| 117 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__neon; |
| 118 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__neon; |
| 119 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 120 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 121 | |
| 122 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 123 | #ifndef XNN_NO_X8_OPERATORS |
| 124 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 125 | xnn_params.x8.zip = (struct zip_parameters) { |
| 126 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__neon, |
| 127 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__neon, |
| 128 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__neon, |
| 129 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__neon, |
| 130 | }; |
| 131 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 132 | |
| 133 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 134 | #ifndef XNN_NO_F32_OPERATORS |
Frank Barchard | 3267092 | 2019-11-30 21:58:51 -0800 | [diff] [blame] | 135 | #if XNN_ENABLE_ASSEMBLY |
Frank Barchard | f9a3484 | 2019-12-12 11:17:50 -0800 | [diff] [blame] | 136 | switch (cpuinfo_get_core(0)->uarch) { |
| 137 | case cpuinfo_uarch_cortex_a53: |
| 138 | case cpuinfo_uarch_cortex_a55: |
| 139 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 140 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch32_neon_cortex_a53, |
| 141 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__neon_lane_ld128, |
| 142 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 143 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 144 | .mr = 4, |
| 145 | .nr = 8, |
| 146 | }; |
| 147 | break; |
Frank Barchard | 4d281a5 | 2019-12-12 15:49:41 -0800 | [diff] [blame] | 148 | |
| 149 | case cpuinfo_uarch_cortex_a57: |
| 150 | case cpuinfo_uarch_cortex_a72: |
| 151 | case cpuinfo_uarch_cortex_a73: |
| 152 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 153 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch32_neon_pld_cortex_a75, |
| 154 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__neon_lane_ld128, |
| 155 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 156 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 157 | .mr = 4, |
| 158 | .nr = 8, |
| 159 | }; |
| 160 | break; |
| 161 | |
Frank Barchard | f9a3484 | 2019-12-12 11:17:50 -0800 | [diff] [blame] | 162 | default: |
| 163 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 164 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch32_neon_cortex_a75, |
| 165 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__neon_lane_ld128, |
| 166 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 167 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 168 | .mr = 4, |
| 169 | .nr = 8, |
| 170 | }; |
| 171 | break; |
| 172 | } |
Frank Barchard | 3267092 | 2019-11-30 21:58:51 -0800 | [diff] [blame] | 173 | #else // XNN_ENABLE_ASSEMBLY |
| 174 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 175 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__neon_lane_ld128, |
| 176 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__neon_lane_ld128, |
| 177 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 178 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 179 | .mr = 4, |
| 180 | .nr = 8, |
| 181 | }; |
| 182 | #endif // XNN_ENABLE_ASSEMBLY |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 183 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 184 | .gemm = NULL, |
Frank Barchard | 91317c5 | 2019-11-22 10:54:35 -0800 | [diff] [blame] | 185 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2__neon_lane_ld64, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 186 | .mr = 4, |
| 187 | .nr = 2, |
| 188 | }; |
| 189 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 190 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x4__psimd, |
| 191 | .cr = 4, |
| 192 | .mr = 4, |
| 193 | }; |
| 194 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 195 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__neon, |
| 196 | .cr = 4, |
| 197 | .mr = 9, |
| 198 | }; |
| 199 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 200 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x25__psimd, |
| 201 | .cr = 4, |
| 202 | .mr = 25, |
| 203 | }; |
| 204 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
| 205 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__neon, |
| 206 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__neon, |
| 207 | .mr = 9, |
| 208 | .qr = 8, |
| 209 | }; |
| 210 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
| 211 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__neon, |
| 212 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__neon, |
| 213 | .mr = 9, |
| 214 | .qr = 8, |
| 215 | }; |
| 216 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
| 217 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__neon, |
| 218 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__neon, |
| 219 | .mr = 7, |
| 220 | }; |
| 221 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 222 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 223 | .mr = 9, |
| 224 | .qr = 8, |
| 225 | }; |
| 226 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 227 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 228 | .mr = 4, |
| 229 | }; |
| 230 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 231 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 232 | .mr = 9, |
| 233 | }; |
| 234 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 235 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 236 | .mr = 9, |
| 237 | .qr = 8, |
| 238 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 239 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 240 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__neon_c8, |
| 241 | .pixel_tile = 1, |
| 242 | .channel_tile = 8, |
| 243 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 244 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__neon; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 245 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__neon_x8; |
Marat Dukhan | 4a24a58 | 2020-01-06 13:30:00 -0800 | [diff] [blame] | 246 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x8; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 247 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 248 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__neon_2x8, |
| 249 | .row_tile = 2, |
| 250 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 251 | }; |
Marat Dukhan | 1edc454 | 2020-01-27 12:40:13 -0800 | [diff] [blame] | 252 | xnn_params.f32.raddstoreexpminusmax = xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8; |
| 253 | xnn_params.f32.rmax = xnn_f32_rmax_ukernel__neon; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 254 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 255 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__neon_x8, |
| 256 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 257 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 258 | .element_tile = 8, |
| 259 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 260 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 261 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__scalar_x2, |
| 262 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__scalar_x2, |
| 263 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__scalar_x2, |
| 264 | .element_tile = 2, |
| 265 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 266 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 267 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__neon_x8, |
| 268 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 269 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 270 | .element_tile = 8, |
| 271 | }; |
| 272 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 273 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__neon_x8, |
| 274 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 275 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 276 | .element_tile = 8, |
| 277 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 278 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 279 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__neon_x8, |
| 280 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
| 281 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 282 | .element_tile = 8, |
| 283 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 284 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 285 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__neon_x8, |
| 286 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__neon_x8, |
| 287 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__neon_x8, |
| 288 | .element_tile = 8, |
| 289 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 290 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 291 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__neon_2x, |
| 292 | .channel_tile = 4, |
| 293 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 294 | }; |
| 295 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 296 | |
| 297 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 298 | #ifndef XNN_NO_X32_OPERATORS |
| 299 | xnn_params.x32.pad = (struct pad_parameters) { |
| 300 | .ukernel = xnn_x32_pad_x2__neon, |
| 301 | .mr = 2, |
| 302 | }; |
| 303 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 304 | xnn_params.x32.zip = (struct zip_parameters) { |
| 305 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__neon, |
| 306 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__neon, |
| 307 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__neon, |
| 308 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__neon, |
| 309 | }; |
| 310 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 311 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 312 | #elif XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 313 | |
| 314 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 315 | #ifndef XNN_NO_Q8_OPERATORS |
| 316 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 317 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_8x8__neon, |
| 318 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_8x8__neon, |
| 319 | .mr = 8, |
| 320 | .nr = 8, |
| 321 | }; |
| 322 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 323 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__neon, |
| 324 | .cr = 8, |
| 325 | .mr = 9, |
| 326 | }; |
| 327 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 328 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__neon, |
| 329 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__neon, |
| 330 | .mr = 9, |
| 331 | .qr = 8, |
| 332 | }; |
| 333 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 334 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__neon, |
| 335 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__neon, |
| 336 | .mr = 7, |
| 337 | }; |
| 338 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__neon; |
| 339 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 340 | |
| 341 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 342 | #ifndef XNN_NO_U8_OPERATORS |
| 343 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 344 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__neon_c16, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 345 | .mr = 9, |
| 346 | .qr = 8, |
| 347 | }; |
| 348 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__neon; |
| 349 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 350 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__neon; |
| 351 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 352 | |
| 353 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 354 | #ifndef XNN_NO_X8_OPERATORS |
| 355 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 356 | xnn_params.x8.zip = (struct zip_parameters) { |
| 357 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__neon, |
| 358 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__neon, |
| 359 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__neon, |
| 360 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__neon, |
| 361 | }; |
| 362 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 363 | |
| 364 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 365 | #ifndef XNN_NO_F32_OPERATORS |
| 366 | #if XNN_ENABLE_ASSEMBLY |
| 367 | switch (cpuinfo_get_core(0)->uarch) { |
| 368 | case cpuinfo_uarch_kryo: |
| 369 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 370 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch64_neonfma_cortex_a57, |
| 371 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch64_neonfma_cortex_a75, |
| 372 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 373 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 374 | .mr = 4, |
| 375 | .nr = 8, |
| 376 | }; |
| 377 | break; |
| 378 | case cpuinfo_uarch_cortex_a57: |
| 379 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 380 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a57, |
| 381 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a57, |
| 382 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a57, |
| 383 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a57, |
| 384 | .mr = 6, |
| 385 | .nr = 8, |
| 386 | }; |
| 387 | break; |
| 388 | case cpuinfo_uarch_cortex_a72: |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 389 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 390 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch64_neonfma_cortex_a75, |
| 391 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch64_neonfma_cortex_a75, |
| 392 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 393 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 394 | .mr = 4, |
| 395 | .nr = 8, |
| 396 | }; |
| 397 | break; |
| 398 | case cpuinfo_uarch_cortex_a75: |
Frank Barchard | 263bb09 | 2019-10-28 15:28:46 -0700 | [diff] [blame] | 399 | case cpuinfo_uarch_cortex_a76: |
Marat Dukhan | 1f5d9bc | 2020-01-02 09:11:16 -0800 | [diff] [blame] | 400 | case cpuinfo_uarch_exynos_m3: |
| 401 | case cpuinfo_uarch_exynos_m4: |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 402 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 403 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a75, |
| 404 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a75, |
| 405 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 406 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 407 | .mr = 6, |
| 408 | .nr = 8, |
| 409 | }; |
| 410 | break; |
Frank Barchard | df06d80 | 2019-11-20 15:53:46 -0800 | [diff] [blame] | 411 | |
Marat Dukhan | 1f5d9bc | 2020-01-02 09:11:16 -0800 | [diff] [blame] | 412 | case cpuinfo_uarch_exynos_m1: |
| 413 | case cpuinfo_uarch_exynos_m2: |
Frank Barchard | df06d80 | 2019-11-20 15:53:46 -0800 | [diff] [blame] | 414 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 415 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8s4__neonfma, |
| 416 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8s4__neonfma, |
| 417 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8s4__neonfma, |
| 418 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8s4__neonfma, |
| 419 | .mr = 6, |
| 420 | .nr = 8, |
| 421 | .log2_sr = 2, |
| 422 | }; |
| 423 | break; |
| 424 | |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 425 | case cpuinfo_uarch_cortex_a53: |
| 426 | case cpuinfo_uarch_cortex_a55: |
| 427 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Frank Barchard | bd1d5d9 | 2019-10-30 15:53:30 -0700 | [diff] [blame] | 428 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a53, |
| 429 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a53, |
| 430 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a53, |
| 431 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a53, |
| 432 | .mr = 6, |
| 433 | .nr = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 434 | }; |
| 435 | break; |
| 436 | case cpuinfo_uarch_cortex_a73: |
| 437 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 438 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a73, |
| 439 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a73, |
| 440 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 441 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 442 | .mr = 6, |
| 443 | .nr = 8, |
| 444 | }; |
| 445 | break; |
| 446 | default: |
| 447 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Frank Barchard | 5cc1cc2 | 2019-12-16 15:36:12 -0800 | [diff] [blame] | 448 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch64_neonfma_cortex_a57, |
| 449 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch64_neonfma_cortex_a75, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 450 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 451 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
Frank Barchard | 5cc1cc2 | 2019-12-16 15:36:12 -0800 | [diff] [blame] | 452 | .mr = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 453 | .nr = 8, |
| 454 | }; |
| 455 | break; |
| 456 | } |
| 457 | #else // XNN_ENABLE_ASSEMBLY |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 458 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Frank Barchard | 91317c5 | 2019-11-22 10:54:35 -0800 | [diff] [blame] | 459 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__neonfma_lane_ld64, |
| 460 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__neonfma_lane_ld64, |
| 461 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neonfma_lane_ld64, |
| 462 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neonfma_lane_ld64, |
Frank Barchard | 2af471b | 2019-10-16 19:10:32 -0700 | [diff] [blame] | 463 | .mr = 6, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 464 | .nr = 8, |
| 465 | }; |
Frank Barchard | 3267092 | 2019-11-30 21:58:51 -0800 | [diff] [blame] | 466 | #endif // XNN_ENABLE_ASSEMBLY |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 467 | |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 468 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 469 | .gemm = NULL, |
Frank Barchard | 91317c5 | 2019-11-22 10:54:35 -0800 | [diff] [blame] | 470 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2__neonfma_lane_ld64, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 471 | .mr = 4, |
| 472 | .nr = 2, |
| 473 | }; |
| 474 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 475 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x4__psimd, |
| 476 | .cr = 4, |
| 477 | .mr = 4, |
| 478 | }; |
| 479 | switch (cpuinfo_get_core(0)->uarch) { |
| 480 | case cpuinfo_uarch_kryo: |
| 481 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 482 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__neonfma, |
| 483 | .cr = 4, |
| 484 | .mr = 9, |
| 485 | }; |
| 486 | break; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 487 | #if XNN_ENABLE_ASSEMBLY |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 488 | case cpuinfo_uarch_cortex_a53: |
| 489 | case cpuinfo_uarch_cortex_a55: |
| 490 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 491 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__aarch64_neonfma_cortex_a55, |
| 492 | .cr = 4, |
| 493 | .mr = 9, |
| 494 | }; |
| 495 | break; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 496 | #endif |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 497 | default: |
| 498 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 499 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x9__neonfma, |
| 500 | .cr = 8, |
| 501 | .mr = 9, |
| 502 | }; |
| 503 | break; |
| 504 | } |
| 505 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 506 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x25__psimd, |
| 507 | .cr = 4, |
| 508 | .mr = 25, |
| 509 | }; |
| 510 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
| 511 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__neon, |
| 512 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__neon, |
| 513 | .mr = 9, |
| 514 | .qr = 8, |
| 515 | }; |
| 516 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
| 517 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__neon, |
| 518 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__neon, |
| 519 | .mr = 9, |
| 520 | .qr = 8, |
| 521 | }; |
| 522 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
| 523 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__neon, |
| 524 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__neon, |
| 525 | .mr = 7, |
| 526 | }; |
| 527 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 528 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 529 | .mr = 9, |
| 530 | .qr = 8, |
| 531 | }; |
| 532 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 533 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 534 | .mr = 4, |
| 535 | }; |
| 536 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 537 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 538 | .mr = 9, |
| 539 | }; |
| 540 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 541 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 542 | .mr = 9, |
| 543 | .qr = 8, |
| 544 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 545 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 546 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__neonfma_c8, |
| 547 | .pixel_tile = 1, |
| 548 | .channel_tile = 8, |
| 549 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 550 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__neon; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 551 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__neonfma_x8; |
Marat Dukhan | 4a24a58 | 2020-01-06 13:30:00 -0800 | [diff] [blame] | 552 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x16; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 553 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 554 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__neon_2x8, |
| 555 | .row_tile = 2, |
| 556 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 557 | }; |
Marat Dukhan | 1edc454 | 2020-01-27 12:40:13 -0800 | [diff] [blame] | 558 | xnn_params.f32.raddstoreexpminusmax = xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16; |
| 559 | xnn_params.f32.rmax = xnn_f32_rmax_ukernel__neon; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 560 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 561 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__neon_x8, |
| 562 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 563 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 564 | .element_tile = 8, |
| 565 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 566 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 567 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__neon_x8, |
| 568 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__neon_x8, |
| 569 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__neon_x8, |
| 570 | .element_tile = 8, |
| 571 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 572 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 573 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__neon_x8, |
| 574 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 575 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 576 | .element_tile = 8, |
| 577 | }; |
| 578 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 579 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__neon_x8, |
| 580 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 581 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 582 | .element_tile = 8, |
| 583 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 584 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 585 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__neon_x8, |
| 586 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
| 587 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 588 | .element_tile = 8, |
| 589 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 590 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 591 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__neon_x8, |
| 592 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__neon_x8, |
| 593 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__neon_x8, |
| 594 | .element_tile = 8, |
| 595 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 596 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 597 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__neonfma_2x, |
| 598 | .channel_tile = 4, |
| 599 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 600 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 601 | #ifndef XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 602 | xnn_params.f32.spmm = (struct spmm_parameters) { |
Erich Elsen | 9cdade3 | 2019-10-16 05:26:59 -0700 | [diff] [blame] | 603 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_16x1__neonfma_pipelined, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 604 | .mr = 16, |
| 605 | .nr = 1, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 606 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 607 | xnn_params.f32.spmm2 = (struct spmm_parameters) { |
| 608 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_16x2__neonfma, |
| 609 | .mr = 16, |
| 610 | .nr = 2, |
| 611 | }; |
| 612 | xnn_params.f32.spmm4 = (struct spmm_parameters) { |
| 613 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_16x4__neonfma, |
| 614 | .mr = 16, |
| 615 | .nr = 4, |
| 616 | }; |
| 617 | xnn_params.f32.hwc2spchw_dconv3x3c3s2 = (struct hwc2spchw_dconv_parameters) { |
| 618 | .ukernel_with_symm_padding = |
| 619 | (xnn_conv_hwc2spchw_ukernel_function) xnn_f32_conv_hwc2spchw_ukernel_3x3s2p1c3x4__neonfma_2x2, |
| 620 | .output_channel_tile = 4, |
| 621 | .output_height_tile = 2, |
| 622 | .output_width_tile = 2, |
| 623 | }; |
| 624 | xnn_params.f32.spchw_dwconv3x3 = (struct spchw_dwconv_parameters) { |
| 625 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma, |
| 626 | .input_width_tile = 4, |
| 627 | .output_width_tile = 4, |
| 628 | .output_height_tile = 3, |
| 629 | }; |
| 630 | xnn_params.f32.spchw_dwconv3x3s2 = (struct spchw_dwconv_parameters) { |
| 631 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma, |
| 632 | .input_width_tile = 4, |
| 633 | .output_width_tile = 4, |
| 634 | .output_height_tile = 1, |
| 635 | }; |
Marat Dukhan | a99918a | 2019-11-15 14:40:12 -0800 | [diff] [blame] | 636 | xnn_params.f32.spchw_dwconv5x5 = (struct spchw_dwconv_parameters) { |
| 637 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma, |
| 638 | .input_width_tile = 4, |
| 639 | .output_width_tile = 4, |
Erich Elsen | 4ad5115 | 2019-11-19 13:11:53 -0800 | [diff] [blame] | 640 | .output_height_tile = 3, |
Marat Dukhan | a99918a | 2019-11-15 14:40:12 -0800 | [diff] [blame] | 641 | }; |
| 642 | xnn_params.f32.spchw_dwconv5x5s2 = (struct spchw_dwconv_parameters) { |
| 643 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma, |
| 644 | .input_width_tile = 4, |
| 645 | .output_width_tile = 4, |
| 646 | .output_height_tile = 1, |
| 647 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 648 | xnn_params.f32.spchw_gavgpool = (struct spchw_gavgpool_parameters) { |
| 649 | .ukernel = (xnn_gavgpool_spchw_ukernel_function) xnn_f32_gavgpool_spchw_ukernel__neon_x4, |
| 650 | .channel_tile = 4, |
| 651 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 652 | #endif // XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 653 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 654 | |
| 655 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 656 | #ifndef XNN_NO_X32_OPERATORS |
| 657 | xnn_params.x32.pad = (struct pad_parameters) { |
| 658 | .ukernel = xnn_x32_pad_x2__neon, |
| 659 | .mr = 2, |
| 660 | }; |
| 661 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 662 | xnn_params.x32.zip = (struct zip_parameters) { |
| 663 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__neon, |
| 664 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__neon, |
| 665 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__neon, |
| 666 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__neon, |
| 667 | }; |
| 668 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 669 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 670 | #elif XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 671 | if (!cpuinfo_has_x86_sse2()) { |
| 672 | xnn_log_error("XNNPACK initialization failed: SSE2 is not supported"); |
| 673 | return; |
| 674 | } |
| 675 | |
| 676 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 677 | #ifndef XNN_NO_Q8_OPERATORS |
| 678 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 679 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_4x4c2__sse2, |
| 680 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_4x4c2__sse2, |
| 681 | .mr = 4, |
| 682 | .nr = 4, |
| 683 | .log2_kr = 1, |
| 684 | }; |
| 685 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 686 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__sse2, |
| 687 | .cr = 8, |
| 688 | .mr = 9, |
| 689 | }; |
| 690 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 691 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__sse2, |
| 692 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__sse2, |
| 693 | .mr = 9, |
| 694 | .qr = 8, |
| 695 | }; |
| 696 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 697 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__sse2, |
| 698 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__sse2, |
| 699 | .mr = 7, |
| 700 | }; |
| 701 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__sse2; |
| 702 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 703 | |
| 704 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 705 | #ifndef XNN_NO_U8_OPERATORS |
| 706 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 707 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__sse2_c16, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 708 | .mr = 9, |
| 709 | .qr = 8, |
| 710 | }; |
| 711 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__sse2; |
| 712 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 713 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__sse2; |
| 714 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 715 | |
| 716 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 717 | #ifndef XNN_NO_X8_OPERATORS |
| 718 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 719 | xnn_params.x8.zip = (struct zip_parameters) { |
| 720 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__sse2, |
| 721 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__sse2, |
| 722 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__sse2, |
| 723 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__sse2, |
| 724 | }; |
| 725 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 726 | |
| 727 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 728 | #ifndef XNN_NO_F32_OPERATORS |
Marat Dukhan | 0f349c4 | 2019-11-27 11:58:54 -0800 | [diff] [blame] | 729 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 730 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 731 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_7x16__avx512f_broadcast, |
| 732 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_7x16__avx512f_broadcast, |
| 733 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16__avx512f_broadcast, |
| 734 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16__avx512f_broadcast, |
| 735 | .mr = 7, |
| 736 | .nr = 16, |
| 737 | }; |
| 738 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) { |
Marat Dukhan | 2712132 | 2019-12-09 14:57:40 -0800 | [diff] [blame] | 739 | switch (cpuinfo_get_core(0)->uarch) { |
| 740 | case cpuinfo_uarch_zen: |
| 741 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 742 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x16s4__fma3_broadcast, |
| 743 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x16s4__fma3_broadcast, |
| 744 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16s4__fma3_broadcast, |
| 745 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16s4__fma3_broadcast, |
| 746 | .mr = 4, |
| 747 | .nr = 16, |
| 748 | .log2_sr = 2, |
| 749 | }; |
| 750 | break; |
| 751 | default: |
| 752 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 753 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_5x16__fma3_broadcast, |
| 754 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_5x16__fma3_broadcast, |
| 755 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16__fma3_broadcast, |
| 756 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16__fma3_broadcast, |
| 757 | .mr = 5, |
| 758 | .nr = 16, |
| 759 | }; |
| 760 | break; |
| 761 | } |
Marat Dukhan | 1025ea3 | 2019-11-21 16:01:08 -0800 | [diff] [blame] | 762 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 763 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | eccfd71 | 2019-12-08 16:49:27 -0800 | [diff] [blame] | 764 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_5x16__avx_broadcast, |
| 765 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_5x16__avx_broadcast, |
| 766 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16__avx_broadcast, |
| 767 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16__avx_broadcast, |
| 768 | .mr = 5, |
| 769 | .nr = 16, |
Marat Dukhan | 1025ea3 | 2019-11-21 16:01:08 -0800 | [diff] [blame] | 770 | }; |
| 771 | } else { |
| 772 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 773 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__sse_load1, |
| 774 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__sse_load1, |
| 775 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__sse_load1, |
| 776 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__sse_load1, |
| 777 | .mr = 4, |
| 778 | .nr = 8, |
| 779 | }; |
| 780 | } |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 781 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 782 | .gemm = NULL, |
| 783 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2c4__sse, |
| 784 | .mr = 4, |
| 785 | .nr = 2, |
| 786 | .log2_kr = 2, |
| 787 | }; |
Marat Dukhan | 479f87e | 2019-11-27 15:17:06 -0800 | [diff] [blame] | 788 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 789 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 790 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__avx512f, |
| 791 | .cr = 16, |
| 792 | .mr = 4, |
| 793 | }; |
| 794 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 795 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x9__avx512f, |
| 796 | .cr = 16, |
| 797 | .mr = 9, |
| 798 | }; |
| 799 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 800 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x25__avx512f, |
| 801 | .cr = 16, |
| 802 | .mr = 25, |
| 803 | }; |
| 804 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) { |
Marat Dukhan | 17ec5f3 | 2019-11-22 13:34:16 -0800 | [diff] [blame] | 805 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 806 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__fma3, |
| 807 | .cr = 16, |
| 808 | .mr = 4, |
| 809 | }; |
| 810 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 811 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x9__fma3, |
| 812 | .cr = 16, |
| 813 | .mr = 9, |
| 814 | }; |
| 815 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 816 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x25__fma3, |
| 817 | .cr = 8, |
| 818 | .mr = 25, |
| 819 | }; |
| 820 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 821 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 822 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__avx, |
| 823 | .cr = 16, |
| 824 | .mr = 4, |
| 825 | }; |
| 826 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 827 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x9__avx, |
| 828 | .cr = 16, |
| 829 | .mr = 9, |
| 830 | }; |
| 831 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 832 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x25__avx, |
| 833 | .cr = 8, |
| 834 | .mr = 25, |
| 835 | }; |
| 836 | } else { |
| 837 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 838 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x4__sse, |
| 839 | .cr = 8, |
| 840 | .mr = 4, |
| 841 | }; |
| 842 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 843 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x9__sse, |
| 844 | .cr = 8, |
| 845 | .mr = 9, |
| 846 | }; |
| 847 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 848 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x25__sse, |
| 849 | .cr = 8, |
| 850 | .mr = 25, |
| 851 | }; |
| 852 | } |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 853 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
| 854 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__sse, |
| 855 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__sse, |
| 856 | .mr = 9, |
| 857 | .qr = 8, |
| 858 | }; |
| 859 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
| 860 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__sse, |
| 861 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__sse, |
| 862 | .mr = 9, |
| 863 | .qr = 8, |
| 864 | }; |
| 865 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
| 866 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__sse, |
| 867 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__sse, |
| 868 | .mr = 7, |
| 869 | }; |
| 870 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 871 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__sse_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 872 | .mr = 9, |
| 873 | .qr = 8, |
| 874 | }; |
| 875 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 876 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__sse2_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 877 | .mr = 4, |
| 878 | }; |
| 879 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 880 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__sse2_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 881 | .mr = 9, |
| 882 | }; |
| 883 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 884 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__sse2_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 885 | .mr = 9, |
| 886 | .qr = 8, |
| 887 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 888 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 889 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__sse_c8, |
| 890 | .pixel_tile = 1, |
| 891 | .channel_tile = 8, |
| 892 | }; |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 893 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 894 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__avx512f; |
| 895 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 896 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__avx; |
| 897 | } else { |
| 898 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__sse; |
| 899 | } |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 900 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 901 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__avx512f_x32; |
| 902 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) { |
| 903 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__fma3_x16; |
| 904 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 905 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__avx_x16; |
| 906 | } else { |
| 907 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__sse_x8; |
| 908 | } |
Marat Dukhan | fa0a432 | 2020-01-06 16:14:29 -0800 | [diff] [blame] | 909 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx2()) { |
| 910 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x40; |
| 911 | } else { |
| 912 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__sse2_p5_div_x16; |
| 913 | } |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 914 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 915 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__sse2_2x8, |
| 916 | .row_tile = 2, |
| 917 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 918 | }; |
Marat Dukhan | 1edc454 | 2020-01-27 12:40:13 -0800 | [diff] [blame] | 919 | xnn_params.f32.raddstoreexpminusmax = xnn_f32_raddstoreexpminusmax_ukernel__sse2_p5_x20_acc2; |
| 920 | xnn_params.f32.rmax = xnn_f32_rmax_ukernel__sse; |
Marat Dukhan | 9a88efe | 2019-12-10 15:54:24 -0800 | [diff] [blame] | 921 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 922 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 923 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__avx512f_x32, |
| 924 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx512f_x32, |
| 925 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx512f_x32, |
| 926 | .element_tile = 32, |
| 927 | }; |
| 928 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 929 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__avx512f_x32, |
| 930 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__avx512f_x32, |
| 931 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__avx512f_x32, |
| 932 | .element_tile = 32, |
| 933 | }; |
| 934 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 935 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__avx512f_x32, |
| 936 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx512f_x32, |
| 937 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx512f_x32, |
| 938 | .element_tile = 32, |
| 939 | }; |
| 940 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 941 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__avx512f_x32, |
| 942 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx512f_x32, |
| 943 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx512f_x32, |
| 944 | .element_tile = 32, |
| 945 | }; |
| 946 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 947 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__avx512f_x32, |
| 948 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx512f_x32, |
| 949 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx512f_x32, |
| 950 | .element_tile = 32, |
| 951 | }; |
| 952 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 953 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__avx512f_x32, |
| 954 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__avx512f_x32, |
| 955 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__avx512f_x32, |
| 956 | .element_tile = 32, |
| 957 | }; |
| 958 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 959 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 960 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__avx_x16, |
| 961 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx_x16, |
| 962 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx_x16, |
| 963 | .element_tile = 16, |
| 964 | }; |
| 965 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 966 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__avx_x16, |
| 967 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__avx_x16, |
| 968 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__avx_x16, |
| 969 | .element_tile = 16, |
| 970 | }; |
| 971 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 972 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__avx_x16, |
| 973 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx_x16, |
| 974 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx_x16, |
| 975 | .element_tile = 16, |
| 976 | }; |
| 977 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 978 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__avx_x16, |
| 979 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx_x16, |
| 980 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx_x16, |
| 981 | .element_tile = 16, |
| 982 | }; |
| 983 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 984 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__avx_x16, |
| 985 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx_x16, |
| 986 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx_x16, |
| 987 | .element_tile = 16, |
| 988 | }; |
| 989 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 990 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__avx_x16, |
| 991 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__avx_x16, |
| 992 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__avx_x16, |
| 993 | .element_tile = 16, |
| 994 | }; |
| 995 | } else { |
| 996 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 997 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__sse_x8, |
| 998 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__sse_x8, |
| 999 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__sse_x8, |
| 1000 | .element_tile = 8, |
| 1001 | }; |
| 1002 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 1003 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__sse_x8, |
| 1004 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__sse_x8, |
| 1005 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__sse_x8, |
| 1006 | .element_tile = 8, |
| 1007 | }; |
| 1008 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 1009 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__sse_x8, |
| 1010 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__sse_x8, |
| 1011 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__sse_x8, |
| 1012 | .element_tile = 8, |
| 1013 | }; |
| 1014 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 1015 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__sse_x8, |
| 1016 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__sse_x8, |
| 1017 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__sse_x8, |
| 1018 | .element_tile = 8, |
| 1019 | }; |
| 1020 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 1021 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__sse_x8, |
| 1022 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__sse_x8, |
| 1023 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__sse_x8, |
| 1024 | .element_tile = 8, |
| 1025 | }; |
| 1026 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 1027 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__sse_x8, |
| 1028 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__sse_x8, |
| 1029 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__sse_x8, |
| 1030 | .element_tile = 8, |
| 1031 | }; |
| 1032 | } |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1033 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 1034 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__sse_2x, |
| 1035 | .channel_tile = 4, |
| 1036 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1037 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1038 | #ifndef XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1039 | xnn_params.f32.spmm = (struct spmm_parameters) { |
| 1040 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_4x1__sse, |
| 1041 | .mr = 4, |
| 1042 | .nr = 1, |
| 1043 | }; |
| 1044 | xnn_params.f32.spchw_dwconv3x3 = (struct spchw_dwconv_parameters) { |
| 1045 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3p1__sse, |
| 1046 | .input_width_tile = 4, |
| 1047 | .output_width_tile = 4, |
| 1048 | .output_height_tile = 1, |
| 1049 | }; |
| 1050 | xnn_params.f32.spchw_dwconv3x3s2 = (struct spchw_dwconv_parameters) { |
| 1051 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse, |
| 1052 | .input_width_tile = 4, |
| 1053 | .output_width_tile = 4, |
| 1054 | .output_height_tile = 1, |
| 1055 | }; |
| 1056 | xnn_params.f32.spchw_gavgpool = (struct spchw_gavgpool_parameters) { |
| 1057 | .ukernel = (xnn_gavgpool_spchw_ukernel_function) xnn_f32_gavgpool_spchw_ukernel__sse_x4, |
| 1058 | .channel_tile = 4, |
| 1059 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1060 | #endif // XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1061 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1062 | |
| 1063 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1064 | #ifndef XNN_NO_X32_OPERATORS |
| 1065 | xnn_params.x32.pad = (struct pad_parameters) { |
| 1066 | .ukernel = xnn_x32_pad_x2__sse2, |
| 1067 | .mr = 2, |
| 1068 | }; |
| 1069 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 1070 | xnn_params.x32.zip = (struct zip_parameters) { |
| 1071 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__sse2, |
| 1072 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__sse2, |
| 1073 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__sse2, |
| 1074 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__sse2, |
| 1075 | }; |
| 1076 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1077 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 1078 | #elif XNN_ARCH_PNACL || XNN_ARCH_WASMSIMD |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1079 | // Unlike most other architectures, on x86/x86-64 when floating-point instructions |
| 1080 | // have no NaN arguments, but produce NaN output, the output NaN has sign bit set. |
| 1081 | // We use it to distinguish x86/x86-64 from other architectures, by doing subtraction |
| 1082 | // of two infinities (must produce NaN per IEEE 754 standard). |
| 1083 | static volatile uint32_t minus_inf = UINT32_C(0xFF800000); |
| 1084 | const bool is_wasm_x86 = (int32_t) xnn_stub_wasm_f32_sub(minus_inf, minus_inf) < 0; |
| 1085 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1086 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1087 | #ifndef XNN_NO_Q8_OPERATORS |
| 1088 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 1089 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_2x2__scalar, |
| 1090 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_2x2__scalar, |
| 1091 | .mr = 2, |
| 1092 | .nr = 2, |
| 1093 | }; |
| 1094 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 1095 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up1x9__scalar, |
| 1096 | .cr = 1, |
| 1097 | .mr = 9, |
| 1098 | }; |
| 1099 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 1100 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__scalar, |
| 1101 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__scalar, |
| 1102 | .mr = 9, |
| 1103 | .qr = 8, |
| 1104 | }; |
| 1105 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 1106 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__scalar, |
| 1107 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__scalar, |
| 1108 | .mr = 7, |
| 1109 | }; |
| 1110 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__scalar; |
| 1111 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1112 | |
| 1113 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1114 | #ifndef XNN_NO_U8_OPERATORS |
| 1115 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1116 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1117 | .mr = 9, |
| 1118 | .qr = 8, |
| 1119 | }; |
| 1120 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__scalar; |
| 1121 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 1122 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__scalar; |
| 1123 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1124 | |
| 1125 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1126 | #ifndef XNN_NO_X8_OPERATORS |
| 1127 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 1128 | xnn_params.x8.zip = (struct zip_parameters) { |
| 1129 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__scalar, |
| 1130 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__scalar, |
| 1131 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__scalar, |
| 1132 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__scalar, |
| 1133 | }; |
| 1134 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1135 | |
| 1136 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1137 | #ifndef XNN_NO_F32_OPERATORS |
| 1138 | if (is_wasm_x86) { |
| 1139 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | cb80197 | 2019-10-23 02:10:33 -0700 | [diff] [blame] | 1140 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__psimd_splat, |
| 1141 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__psimd_splat, |
| 1142 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__psimd_splat, |
| 1143 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__psimd_splat, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1144 | .mr = 4, |
| 1145 | .nr = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1146 | }; |
| 1147 | } else { |
| 1148 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | cd945c6 | 2019-10-25 11:59:50 -0700 | [diff] [blame] | 1149 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8s4__psimd, |
| 1150 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8s4__psimd, |
| 1151 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_igemm_ukernel_1x8s4__psimd, |
| 1152 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8s4__psimd, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1153 | .mr = 6, |
| 1154 | .nr = 8, |
Marat Dukhan | cd945c6 | 2019-10-25 11:59:50 -0700 | [diff] [blame] | 1155 | .log2_sr = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1156 | }; |
| 1157 | } |
| 1158 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 1159 | .gemm = NULL, |
| 1160 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2c4__psimd, |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1161 | .mr = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1162 | .nr = 2, |
| 1163 | .log2_kr = 2, |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1164 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1165 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
Marat Dukhan | 5098c3e | 2019-11-07 12:01:19 -0800 | [diff] [blame] | 1166 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x4__psimd_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1167 | .cr = 4, |
| 1168 | .mr = 4, |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1169 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1170 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
Marat Dukhan | 5098c3e | 2019-11-07 12:01:19 -0800 | [diff] [blame] | 1171 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__psimd_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1172 | .cr = 4, |
| 1173 | .mr = 9, |
| 1174 | }; |
| 1175 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
Marat Dukhan | 5098c3e | 2019-11-07 12:01:19 -0800 | [diff] [blame] | 1176 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x25__psimd_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1177 | .cr = 4, |
| 1178 | .mr = 25, |
| 1179 | }; |
| 1180 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
| 1181 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__psimd, |
| 1182 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__psimd, |
| 1183 | .mr = 9, |
| 1184 | .qr = 8, |
| 1185 | }; |
| 1186 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
| 1187 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__psimd, |
| 1188 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__psimd, |
| 1189 | .mr = 9, |
| 1190 | .qr = 8, |
| 1191 | }; |
| 1192 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
| 1193 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__psimd, |
| 1194 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__psimd, |
| 1195 | .mr = 7, |
| 1196 | }; |
| 1197 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1198 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1199 | .mr = 9, |
| 1200 | .qr = 8, |
| 1201 | }; |
| 1202 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1203 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1204 | .mr = 4, |
| 1205 | }; |
| 1206 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1207 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1208 | .mr = 9, |
| 1209 | }; |
| 1210 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1211 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1212 | .mr = 9, |
| 1213 | .qr = 8, |
| 1214 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 1215 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 1216 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__psimd_c8, |
| 1217 | .pixel_tile = 1, |
| 1218 | .channel_tile = 8, |
| 1219 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1220 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__psimd; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 1221 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__psimd_x8; |
Marat Dukhan | 8d3c07e | 2020-01-02 01:20:59 -0800 | [diff] [blame] | 1222 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__psimd_p5_div_x16; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1223 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 1224 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__psimd_2x8, |
| 1225 | .row_tile = 2, |
| 1226 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1227 | }; |
Marat Dukhan | 1edc454 | 2020-01-27 12:40:13 -0800 | [diff] [blame] | 1228 | xnn_params.f32.raddstoreexpminusmax = xnn_f32_raddstoreexpminusmax_ukernel__psimd_p5_x16_acc2; |
| 1229 | xnn_params.f32.rmax = xnn_f32_rmax_ukernel__psimd; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 1230 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 1231 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__psimd_x8, |
| 1232 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__psimd_x8, |
| 1233 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__psimd_x8, |
| 1234 | .element_tile = 8, |
| 1235 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 1236 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 1237 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__psimd_x4, |
| 1238 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__psimd_x4, |
| 1239 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__psimd_x4, |
| 1240 | .element_tile = 4, |
| 1241 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 1242 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 1243 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__psimd_x8, |
| 1244 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__psimd_x8, |
| 1245 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__psimd_x8, |
| 1246 | .element_tile = 8, |
| 1247 | }; |
| 1248 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 1249 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__psimd_x8, |
| 1250 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__psimd_x8, |
| 1251 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__psimd_x8, |
| 1252 | .element_tile = 8, |
| 1253 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 1254 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 1255 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__psimd_x8, |
| 1256 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__psimd_x8, |
| 1257 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__psimd_x8, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 1258 | .element_tile = 8, |
| 1259 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 1260 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 1261 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__psimd_x8, |
| 1262 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__psimd_x8, |
| 1263 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__psimd_x8, |
| 1264 | .element_tile = 8, |
| 1265 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1266 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 1267 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__psimd_2x, |
| 1268 | .channel_tile = 4, |
| 1269 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1270 | }; |
| 1271 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1272 | |
| 1273 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1274 | #ifndef XNN_NO_X32_OPERATORS |
| 1275 | xnn_params.x32.pad = (struct pad_parameters) { |
| 1276 | .ukernel = xnn_x32_pad_x2__psimd, |
| 1277 | .mr = 2, |
| 1278 | }; |
| 1279 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 1280 | xnn_params.x32.zip = (struct zip_parameters) { |
| 1281 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__psimd, |
| 1282 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__psimd, |
| 1283 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__psimd, |
| 1284 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__psimd, |
| 1285 | }; |
| 1286 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1287 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 1288 | #elif XNN_ARCH_WASM || XNN_ARCH_ASMJS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1289 | // Unlike most other architectures, on x86/x86-64 when floating-point instructions |
| 1290 | // have no NaN arguments, but produce NaN output, the output NaN has sign bit set. |
| 1291 | // We use it to distinguish x86/x86-64 from other architectures, by doing subtraction |
| 1292 | // of two infinities (must produce NaN per IEEE 754 standard). |
| 1293 | static volatile uint32_t minus_inf = UINT32_C(0xFF800000); |
| 1294 | const bool is_wasm_x86 = (int32_t) xnn_stub_wasm_f32_sub(minus_inf, minus_inf) < 0; |
| 1295 | |
| 1296 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1297 | #ifndef XNN_NO_Q8_OPERATORS |
| 1298 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 1299 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_2x2__scalar, |
| 1300 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_2x2__scalar, |
| 1301 | .mr = 2, |
| 1302 | .nr = 2, |
| 1303 | }; |
| 1304 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 1305 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up1x9__scalar, |
| 1306 | .cr = 1, |
| 1307 | .mr = 9, |
| 1308 | }; |
| 1309 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
| 1310 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_up9__scalar, |
| 1311 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_mp9p8q__scalar, |
| 1312 | .mr = 9, |
| 1313 | .qr = 8, |
| 1314 | }; |
| 1315 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
| 1316 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_up7__scalar, |
| 1317 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_mp7p7q__scalar, |
| 1318 | .mr = 7, |
| 1319 | }; |
| 1320 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__scalar; |
| 1321 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1322 | |
| 1323 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1324 | #ifndef XNN_NO_U8_OPERATORS |
| 1325 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1326 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1327 | .mr = 9, |
| 1328 | .qr = 8, |
| 1329 | }; |
| 1330 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__scalar; |
| 1331 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 1332 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__scalar; |
| 1333 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1334 | |
| 1335 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1336 | #ifndef XNN_NO_X8_OPERATORS |
| 1337 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 1338 | xnn_params.x8.zip = (struct zip_parameters) { |
| 1339 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__scalar, |
| 1340 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__scalar, |
| 1341 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__scalar, |
| 1342 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__scalar, |
| 1343 | }; |
| 1344 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1345 | |
| 1346 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1347 | #ifndef XNN_NO_F32_OPERATORS |
| 1348 | if (is_wasm_x86) { |
| 1349 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 1350 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_2x4__scalar, |
| 1351 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_2x4__scalar, |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1352 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x4__wasm, |
| 1353 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x4__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1354 | .mr = 2, |
| 1355 | .nr = 4, |
| 1356 | }; |
| 1357 | } else { |
| 1358 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1359 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x4__wasm, |
| 1360 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x4__wasm, |
| 1361 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x4__wasm, |
| 1362 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x4__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1363 | .mr = 4, |
| 1364 | .nr = 4, |
| 1365 | }; |
| 1366 | } |
| 1367 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
| 1368 | .gemm = NULL, |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1369 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2__wasm, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1370 | .mr = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1371 | .nr = 2, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1372 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1373 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1374 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up1x4__wasm_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1375 | .cr = 1, |
| 1376 | .mr = 4, |
| 1377 | }; |
| 1378 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1379 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up1x9__wasm_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1380 | .cr = 1, |
| 1381 | .mr = 9, |
| 1382 | }; |
| 1383 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1384 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up1x25__wasm_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1385 | .cr = 1, |
| 1386 | .mr = 25, |
| 1387 | }; |
| 1388 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1389 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_up9__wasm, |
| 1390 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_mp9p8q__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1391 | .mr = 9, |
| 1392 | .qr = 8, |
| 1393 | }; |
| 1394 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1395 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_up9__wasm, |
| 1396 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_mp9p8q__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1397 | .mr = 9, |
| 1398 | .qr = 8, |
| 1399 | }; |
| 1400 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1401 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_up7__wasm, |
| 1402 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_mp7p7q__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1403 | .mr = 7, |
| 1404 | }; |
| 1405 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1406 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__wasm_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1407 | .mr = 9, |
| 1408 | .qr = 8, |
| 1409 | }; |
| 1410 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1411 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1412 | .mr = 4, |
| 1413 | }; |
| 1414 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1415 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1416 | .mr = 9, |
| 1417 | }; |
| 1418 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1419 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1420 | .mr = 9, |
| 1421 | .qr = 8, |
| 1422 | }; |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 1423 | xnn_params.f32.bilinear = (struct bilinear_parameters) { |
| 1424 | .ukernel = (xnn_bilinear_ukernel_function) xnn_f32_bilinear_ukernel__scalar_c2, |
| 1425 | .pixel_tile = 1, |
| 1426 | .channel_tile = 2, |
| 1427 | }; |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1428 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__wasm; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 1429 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__wasm_x4; |
Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 1430 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__scalar_lut64_p2_div_x2; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1431 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1432 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__wasm_2x4, |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 1433 | .row_tile = 4, |
| 1434 | .channel_tile = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1435 | }; |
Marat Dukhan | 1edc454 | 2020-01-27 12:40:13 -0800 | [diff] [blame] | 1436 | xnn_params.f32.raddstoreexpminusmax = xnn_f32_raddstoreexpminusmax_ukernel__scalar_p5_x4_acc2; |
| 1437 | xnn_params.f32.rmax = xnn_f32_rmax_ukernel__scalar; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 1438 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1439 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__wasm_x4, |
| 1440 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__wasm_x4, |
| 1441 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__wasm_x4, |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 1442 | .element_tile = 8, |
| 1443 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 1444 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 1445 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__wasm_x2, |
| 1446 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__wasm_x2, |
| 1447 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__wasm_x2, |
| 1448 | .element_tile = 2, |
| 1449 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 1450 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 1451 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__wasm_x4, |
| 1452 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__wasm_x4, |
| 1453 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__wasm_x4, |
| 1454 | .element_tile = 8, |
| 1455 | }; |
| 1456 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 1457 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__wasm_x4, |
| 1458 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__wasm_x4, |
| 1459 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__wasm_x4, |
| 1460 | .element_tile = 8, |
| 1461 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 1462 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1463 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__wasm_x4, |
| 1464 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__wasm_x4, |
| 1465 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__wasm_x4, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 1466 | .element_tile = 8, |
| 1467 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 1468 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1469 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__wasm_x4, |
| 1470 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__wasm_x4, |
| 1471 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__wasm_x4, |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 1472 | .element_tile = 8, |
| 1473 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1474 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1475 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c1__wasm_2x, |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 1476 | .channel_tile = 1, |
| 1477 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1478 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1479 | #ifndef XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1480 | xnn_params.f32.spmm = (struct spmm_parameters) { |
Marat Dukhan | bff791e | 2019-10-24 11:05:37 -0700 | [diff] [blame] | 1481 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_8x1__scalar, |
| 1482 | .mr = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1483 | .nr = 1, |
| 1484 | }; |
Erich Elsen | c6afd9b | 2019-10-24 16:10:53 -0700 | [diff] [blame] | 1485 | xnn_params.f32.spmm2 = (struct spmm_parameters) { |
| 1486 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_8x2__scalar, |
| 1487 | .mr = 8, |
| 1488 | .nr = 2, |
| 1489 | }; |
| 1490 | xnn_params.f32.spmm4 = (struct spmm_parameters) { |
| 1491 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_8x4__scalar, |
| 1492 | .mr = 8, |
| 1493 | .nr = 4, |
| 1494 | }; |
Marat Dukhan | 14fe0b2 | 2019-10-23 21:20:07 -0700 | [diff] [blame] | 1495 | xnn_params.f32.hwc2spchw_dconv3x3c3s2 = (struct hwc2spchw_dconv_parameters) { |
| 1496 | .ukernel_with_symm_padding = |
| 1497 | (xnn_conv_hwc2spchw_ukernel_function) xnn_f32_conv_hwc2spchw_ukernel_3x3s2p1c3x4__scalar_1x1, |
| 1498 | .output_channel_tile = 4, |
| 1499 | .output_height_tile = 1, |
| 1500 | .output_width_tile = 1, |
| 1501 | }; |
| 1502 | xnn_params.f32.spchw_dwconv3x3 = (struct spchw_dwconv_parameters) { |
| 1503 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3p1__scalar, |
| 1504 | .input_width_tile = 1, |
| 1505 | .output_width_tile = 1, |
| 1506 | .output_height_tile = 1, |
| 1507 | }; |
| 1508 | xnn_params.f32.spchw_dwconv3x3s2 = (struct spchw_dwconv_parameters) { |
| 1509 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3s2p1__scalar, |
| 1510 | .input_width_tile = 1, |
| 1511 | .output_width_tile = 1, |
| 1512 | .output_height_tile = 1, |
| 1513 | }; |
Marat Dukhan | a99918a | 2019-11-15 14:40:12 -0800 | [diff] [blame] | 1514 | xnn_params.f32.spchw_dwconv5x5 = (struct spchw_dwconv_parameters) { |
| 1515 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5p2__scalar, |
| 1516 | .input_width_tile = 1, |
| 1517 | .output_width_tile = 1, |
| 1518 | .output_height_tile = 1, |
| 1519 | }; |
| 1520 | xnn_params.f32.spchw_dwconv5x5s2 = (struct spchw_dwconv_parameters) { |
| 1521 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5s2p2__scalar, |
| 1522 | .input_width_tile = 1, |
| 1523 | .output_width_tile = 1, |
| 1524 | .output_height_tile = 1, |
| 1525 | }; |
Marat Dukhan | 14fe0b2 | 2019-10-23 21:20:07 -0700 | [diff] [blame] | 1526 | xnn_params.f32.spchw_gavgpool = (struct spchw_gavgpool_parameters) { |
| 1527 | .ukernel = (xnn_gavgpool_spchw_ukernel_function) xnn_f32_gavgpool_spchw_ukernel__scalar_x1, |
| 1528 | .channel_tile = 1, |
| 1529 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1530 | #endif // XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1531 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1532 | |
| 1533 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1534 | #ifndef XNN_NO_X32_OPERATORS |
| 1535 | xnn_params.x32.pad = (struct pad_parameters) { |
| 1536 | .ukernel = xnn_x32_pad_x2__scalar, |
| 1537 | .mr = 2, |
| 1538 | }; |
| 1539 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__scalar; |
| 1540 | xnn_params.x32.zip = (struct zip_parameters) { |
| 1541 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__scalar, |
| 1542 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__scalar, |
| 1543 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__scalar, |
| 1544 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__scalar, |
| 1545 | }; |
| 1546 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1547 | |
| 1548 | #else |
| 1549 | #error "Unsupported architecture" |
| 1550 | #endif |
| 1551 | xnn_params.initialized = true; |
| 1552 | } |
| 1553 | |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 1554 | enum xnn_status xnn_initialize(const struct xnn_allocator* allocator) { |
Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 1555 | #ifndef __EMSCRIPTEN__ |
| 1556 | if (!cpuinfo_initialize()) { |
| 1557 | return xnn_status_out_of_memory; |
| 1558 | } |
| 1559 | #endif |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1560 | pthread_once(&init_guard, &init); |
| 1561 | if (xnn_params.initialized) { |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 1562 | if (allocator != NULL) { |
| 1563 | memcpy(&xnn_params.allocator, allocator, sizeof(struct xnn_allocator)); |
| 1564 | } else { |
| 1565 | xnn_params.allocator.allocate = &xnn_allocate; |
| 1566 | xnn_params.allocator.reallocate = &xnn_reallocate; |
| 1567 | xnn_params.allocator.deallocate = &xnn_deallocate; |
| 1568 | xnn_params.allocator.aligned_allocate = &xnn_aligned_allocate; |
| 1569 | xnn_params.allocator.aligned_deallocate = &xnn_aligned_deallocate; |
| 1570 | } |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1571 | return xnn_status_success; |
| 1572 | } else { |
| 1573 | return xnn_status_unsupported_hardware; |
| 1574 | } |
| 1575 | } |
| 1576 | |
| 1577 | enum xnn_status xnn_deinitialize(void) { |
Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 1578 | #ifndef __EMSCRIPTEN__ |
| 1579 | cpuinfo_deinitialize(); |
| 1580 | #endif |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1581 | return xnn_status_success; |
| 1582 | } |