blob: 54fd96ed56147b93dc7f4c357e48715e8594d848 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
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Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
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Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -0700494 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -0700506 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
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518 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700522 "src/qs8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan06716242021-05-26 15:56:39 -0700525 "src/qs8-requantization/rndna-scalar-signed64.c",
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Marat Dukhan062bee32021-05-27 20:31:07 -0700528 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700529 "src/qs8-vadd/gen/minmax-scalar-x1.c",
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533 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
534 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700535 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700540 "src/qu8-gemm/2x2-minmax-scalar.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700542 "src/qu8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -0700544 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700545 "src/qu8-requantization/rndna-scalar-signed64.c",
546 "src/qu8-requantization/rndna-scalar-unsigned32.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -0700548 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700549 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700550 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700551 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700552 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700553 "src/x8-lut/scalar.c",
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556 "src/x8-zip/x4-scalar.c",
557 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800558 "src/x32-depthtospace2d-chw2hwc/scalar.c",
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560 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700561 "src/x32-packx/x2-scalar.c",
562 "src/x32-packx/x3-scalar.c",
563 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700564 "src/x32-pad/scalar-float.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -0700566 "src/x32-unpool/scalar.c",
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Marat Dukhan436ebe62019-12-04 15:10:12 -0800574WASM_UKERNELS = [
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001314 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
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Marat Dukhaned6baaf2020-12-01 15:07:08 -08001318 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07001345 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
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Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001356 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
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1365 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001370 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
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1372 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
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1375 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
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1378 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
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1380 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07001382 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
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1385 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1386 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
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1388 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1389 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001390 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1391 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1392 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1393 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001394 "src/math/roundd-wasmsimd-addsub.c",
1395 "src/math/roundd-wasmsimd-cvt.c",
1396 "src/math/roundne-wasmsimd-addsub.c",
1397 "src/math/roundu-wasmsimd-addsub.c",
1398 "src/math/roundu-wasmsimd-cvt.c",
1399 "src/math/roundz-wasmsimd-addsub.c",
1400 "src/math/roundz-wasmsimd-cvt.c",
1401 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1402 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001403 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1405 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1407 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
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Marat Dukhanb5e3d172020-08-06 13:29:53 -07001409 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
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1423 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
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1428 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1429 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001430 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001431 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001432 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1433 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
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1435 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001440 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001441 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001442 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001443 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001444 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001445 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001446 "src/x32-zip/x2-wasmsimd.c",
1447 "src/x32-zip/x3-wasmsimd.c",
1448 "src/x32-zip/x4-wasmsimd.c",
1449 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001450]
1451
Marat Dukhan08c4a432019-10-03 09:29:21 -07001452# ISA-specific micro-kernels
1453NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001454 "src/f32-argmaxpool/4x-neon-c4.c",
1455 "src/f32-argmaxpool/9p8x-neon-c4.c",
1456 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001457 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1458 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001459 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001460 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001461 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001462 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001463 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001464 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001465 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001466 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001467 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001468 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001469 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001470 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001471 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001472 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001473 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1474 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1475 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1476 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1477 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001478 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001479 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001480 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1481 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1482 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001483 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001484 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001485 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1486 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1487 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1488 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1489 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001490 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1491 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1492 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001493 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001494 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001495 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1496 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1497 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001498 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1499 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1500 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1501 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001502 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001503 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1504 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001505 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001506 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001507 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001508 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001509 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1510 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001511 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1512 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1513 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1514 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1515 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1516 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1517 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1518 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001519 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001520 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001521 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001522 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1523 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001524 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001525 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1526 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001527 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001528 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1529 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1530 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1531 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1532 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001533 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1534 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001535 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1536 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001537 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1538 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001539 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1540 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1541 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1542 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1543 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1544 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1545 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1546 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1547 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1548 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1549 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1550 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1551 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1552 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1553 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1554 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001555 "src/f32-ibilinear-chw/gen/neon-p4.c",
1556 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001557 "src/f32-ibilinear/gen/neon-c4.c",
1558 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001559 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001560 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001561 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001562 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1563 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001564 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001565 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1566 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1567 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1568 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001569 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1570 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001571 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1572 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001573 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1574 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001575 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1576 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1577 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001578 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1579 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001580 "src/f32-prelu/gen/neon-1x4.c",
1581 "src/f32-prelu/gen/neon-1x8.c",
1582 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001583 "src/f32-prelu/gen/neon-2x4.c",
1584 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001585 "src/f32-prelu/gen/neon-2x16.c",
1586 "src/f32-prelu/gen/neon-4x4.c",
1587 "src/f32-prelu/gen/neon-4x8.c",
1588 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001589 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001590 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001591 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001592 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1593 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001594 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001595 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1596 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001597 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001598 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1599 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001600 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1601 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1602 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1603 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1604 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1605 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1606 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1607 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1608 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1609 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1610 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1611 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1612 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001613 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001614 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1615 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1616 "src/f32-spmm/gen/4x1-minmax-neon.c",
1617 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1618 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1619 "src/f32-spmm/gen/8x1-minmax-neon.c",
1620 "src/f32-spmm/gen/12x1-minmax-neon.c",
1621 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1622 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1623 "src/f32-spmm/gen/16x1-minmax-neon.c",
1624 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1625 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1626 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001627 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1628 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1629 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1630 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001631 "src/f32-vbinary/gen/vmax-neon-x4.c",
1632 "src/f32-vbinary/gen/vmax-neon-x8.c",
1633 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1634 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1635 "src/f32-vbinary/gen/vmin-neon-x4.c",
1636 "src/f32-vbinary/gen/vmin-neon-x8.c",
1637 "src/f32-vbinary/gen/vminc-neon-x4.c",
1638 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001639 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1640 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1641 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1642 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1643 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1644 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001645 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1646 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1647 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1648 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001649 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1650 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1651 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1652 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001653 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1654 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001655 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1656 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1657 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1658 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1659 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1660 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1661 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1662 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1663 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1664 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1665 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1666 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001667 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1668 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1669 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001670 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1671 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001672 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1673 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001674 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1675 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001676 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1677 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1679 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1680 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1681 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1682 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1683 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001684 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1685 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1686 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1687 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1688 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1689 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1690 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1691 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1692 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1693 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1694 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1695 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1696 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1697 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1698 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1699 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1700 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1701 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001702 "src/f32-vunary/gen/vabs-neon-x4.c",
1703 "src/f32-vunary/gen/vabs-neon-x8.c",
1704 "src/f32-vunary/gen/vneg-neon-x4.c",
1705 "src/f32-vunary/gen/vneg-neon-x8.c",
1706 "src/f32-vunary/gen/vsqr-neon-x4.c",
1707 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001708 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1709 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001710 "src/math/roundd-neon-addsub.c",
1711 "src/math/roundd-neon-cvt.c",
1712 "src/math/roundne-neon-addsub.c",
1713 "src/math/roundu-neon-addsub.c",
1714 "src/math/roundu-neon-cvt.c",
1715 "src/math/roundz-neon-addsub.c",
1716 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001717 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1718 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1719 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1720 "src/math/sqrt-neon-nr1rsqrts.c",
1721 "src/math/sqrt-neon-nr2rsqrts.c",
1722 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001723 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
1724 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
1725 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
1726 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
1727 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
1728 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
1729 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
1730 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001731 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1732 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1733 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1734 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001735 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1736 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1737 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1738 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001739 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1740 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1741 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1742 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1743 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1744 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1745 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1746 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1747 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1748 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1749 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1750 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1751 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1752 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1753 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1754 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1755 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1756 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1757 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1758 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1759 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1760 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1761 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1762 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1763 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1764 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1765 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1766 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1767 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1768 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1769 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1770 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1771 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1772 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1773 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1774 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1775 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1776 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1777 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1778 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1779 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1780 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1781 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1782 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1783 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1784 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1785 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1786 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1787 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1788 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1789 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1790 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1791 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1792 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1793 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1794 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1795 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1796 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1797 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1798 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1799 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1800 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1801 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1802 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1803 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1804 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1805 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1806 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1807 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1808 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1809 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1810 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1811 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1812 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1813 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1814 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1815 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1816 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1817 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1818 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1819 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1820 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1821 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1822 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1823 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1824 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1825 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1826 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1827 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1828 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1829 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1830 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1831 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1832 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1833 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1834 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1835 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1836 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
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1838 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1839 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1840 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
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1842 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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1846 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
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1848 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1849 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1850 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1851 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1852 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1853 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1854 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1855 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1856 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1857 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1858 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1859 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1860 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1861 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1862 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1863 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1864 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1865 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1866 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1867 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1868 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1869 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1870 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1871 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1872 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1873 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1874 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001875 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001876 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001877 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07001878 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07001879 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
1880 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
1881 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
1882 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
1883 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
1884 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
1885 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
1886 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001887 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
1888 "src/qu8-avgpool/9x-minmax-neon-c8.c",
1889 "src/qu8-dwconv/up8x9-minmax-neon.c",
1890 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
1891 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
1892 "src/qu8-gemm/4x8-minmax-neon.c",
1893 "src/qu8-gemm/8x8-minmax-neon.c",
1894 "src/qu8-igemm/4x8-minmax-neon.c",
1895 "src/qu8-igemm/8x8-minmax-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001896 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001897 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001898 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001899 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001900 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001901 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001902 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001903 "src/x8-zip/x2-neon.c",
1904 "src/x8-zip/x3-neon.c",
1905 "src/x8-zip/x4-neon.c",
1906 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07001907 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001908 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07001909 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07001910 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001911 "src/x32-zip/x2-neon.c",
1912 "src/x32-zip/x3-neon.c",
1913 "src/x32-zip/x4-neon.c",
1914 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001915]
1916
1917NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07001918 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1919 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1920 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1921 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1922 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1923 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1924 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
1925 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1926 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
1927 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1928 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
1929 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1930 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1931 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1932 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1933 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1934 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1935 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1936 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1937 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1938 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
1939 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1940 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1941 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1942 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1943 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1944 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1945 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1946 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1947 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001948 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
1949 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001950 "src/f32-ibilinear/gen/neonfma-c4.c",
1951 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001952 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001953 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001954 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001955 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1956 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001957 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1958 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001959 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1960 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001961 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1962 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001963 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001964 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001965 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001966 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1967 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001968 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001969 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1970 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001971 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001972 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1973 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001974 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1975 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1976 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1977 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1978 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1979 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1980 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1981 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1982 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1983 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1984 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1985 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1986 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08001987 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1988 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
1989 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1990 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1991 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
1992 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1993 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1994 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1995 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
1996 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1997 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
1998 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
1999 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002000 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2001 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2002 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2003 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2004 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2005 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2006 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2007 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2008 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2009 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2010 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2011 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002012 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2013 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002014 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2015 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2016 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2017 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2018 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2019 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2020 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2021 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2022 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2023 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2024 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2025 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2026 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2027 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2028 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2029 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2030 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2031 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2032 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2033 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2034 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2035 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2036 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2037 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2038 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2039 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2040 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2041 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2042 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2043 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2044 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2045 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2046 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2047 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2048 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2049 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2050 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2051 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2052 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2053 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2054 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2055 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2056 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2057 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2058 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2059 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2060 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2061 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2062 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2063 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2064 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2065 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2066 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2067 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002068 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2069 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2070 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2071 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2072 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2073 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2074 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2075 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2076 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2077 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2078 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2079 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2080 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2081 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2082 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2083 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2084 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2085 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2086 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2087 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002088 "src/math/exp-neonfma-rr2-lut64-p2.c",
2089 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002090 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2091 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002092 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2093 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2094 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002095 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2096 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2097 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002098 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2099 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2100 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002101 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2102 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2103 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002104 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2105 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2106 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002107 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2108 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2109 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002110 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2111 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2112 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002113 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002114 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002115 "src/math/sqrt-neonfma-nr2fma.c",
2116 "src/math/sqrt-neonfma-nr2fma1adj.c",
2117 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002118]
2119
2120AARCH64_NEONFMA_UKERNELS = [
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Marat Dukhance7a3f82020-05-17 21:46:44 -07002122 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002123 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
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Marat Dukhan56b10cd2020-05-18 09:35:49 -07002125 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002126 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002127 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002128 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002129 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002130 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
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2132 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002133 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002134 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002135 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
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2138 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2139 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002140 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2141 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2142 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002143 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002144 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002145 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2146 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2147 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002148 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
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2151 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002152 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002153 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002155 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002156 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002157 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002158 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002161 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002169 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002170 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002171 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2172 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2173 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
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2176 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2177 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2178 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2179 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2180 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2181 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2182 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2183 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2184 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2185 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2186 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2187 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2188 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2189 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2190 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002191 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2192 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002193 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2194 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002195 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2196 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002197 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2198 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002199 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2200 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002201 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2202 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2203 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2204 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2205 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2206 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002207 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2208 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
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2210 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2211 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2212 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2213 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2214 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2215 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2216 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2217 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2218 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2219 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2220 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2221 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2222 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2223 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2224 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002225 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2226 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002227 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002228 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002229 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002230 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002231 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002232 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002233]
2234
Marat Dukhan8853b822020-05-07 12:19:01 -07002235NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002236 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2237 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002238 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2239 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2240 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2241 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2242 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2243 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002244 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002245 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002246 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002247 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002248]
2249
Marat Dukhan08c4a432019-10-03 09:29:21 -07002250AARCH64_NEONFP16ARITH_UKERNELS = [
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2452 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2453 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2454 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002455 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2456 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2457 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002458 "src/f32-ibilinear-chw/gen/sse-p4.c",
2459 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002460 "src/f32-ibilinear/gen/sse-c4.c",
2461 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002462 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2463 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2464 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002465 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2466 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2467 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002468 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2469 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2470 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2471 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002472 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2473 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2474 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002475 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2476 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2477 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002478 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002479 "src/f32-prelu/gen/sse-2x4.c",
2480 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002481 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002482 "src/f32-spmm/gen/4x1-minmax-sse.c",
2483 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002484 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002485 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002486 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2487 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2488 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2489 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2490 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2491 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2492 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2493 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002494 "src/f32-vbinary/gen/vmax-sse-x4.c",
2495 "src/f32-vbinary/gen/vmax-sse-x8.c",
2496 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2497 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2498 "src/f32-vbinary/gen/vmin-sse-x4.c",
2499 "src/f32-vbinary/gen/vmin-sse-x8.c",
2500 "src/f32-vbinary/gen/vminc-sse-x4.c",
2501 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002502 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2503 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2504 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2505 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2506 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2507 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2508 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2509 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002510 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2511 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2512 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2513 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002514 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2515 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2516 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2517 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002518 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2519 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002520 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2521 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002522 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2523 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002524 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2525 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002526 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2527 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002528 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2529 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002530 "src/f32-vunary/gen/vabs-sse-x4.c",
2531 "src/f32-vunary/gen/vabs-sse-x8.c",
2532 "src/f32-vunary/gen/vneg-sse-x4.c",
2533 "src/f32-vunary/gen/vneg-sse-x8.c",
2534 "src/f32-vunary/gen/vsqr-sse-x4.c",
2535 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002536 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002537 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002538 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002539 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002540 "src/math/sqrt-sse-hh1mac.c",
2541 "src/math/sqrt-sse-nr1mac.c",
2542 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002543 "src/x32-fill/sse.c",
2544 "src/x32-packx/x4-sse.c",
2545 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002546]
2547
2548SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002549 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002550 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002551 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002552 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2553 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2554 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2555 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2556 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2557 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2558 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2559 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2560 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2561 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2562 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2563 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002564 "src/f32-prelu/gen/sse2-2x4.c",
2565 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002566 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002567 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002568 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002569 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2570 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002571 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002572 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2573 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002574 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002575 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2576 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002577 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002578 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2579 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2580 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2581 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2582 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2583 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2584 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2585 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2586 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2587 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2588 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2589 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002590 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2591 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002592 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2593 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002594 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2595 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2596 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2597 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2598 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2599 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002600 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2601 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2602 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2603 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2604 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2605 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2606 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2607 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2608 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2609 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2610 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2611 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002612 "src/math/exp-sse2-rr2-lut64-p2.c",
2613 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002614 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002615 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002616 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002617 "src/math/roundd-sse2-cvt.c",
2618 "src/math/roundne-sse2-cvt.c",
2619 "src/math/roundu-sse2-cvt.c",
2620 "src/math/roundz-sse2-cvt.c",
2621 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2622 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2623 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2624 "src/math/sigmoid-sse2-rr2-p5-div.c",
2625 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2626 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002627 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2628 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
2629 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2630 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
2631 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2632 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
2633 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
2634 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
2635 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2636 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
2637 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2638 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
2639 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
2640 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
2641 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2642 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
2643 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2644 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
2645 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2646 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
2647 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
2648 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
2649 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2650 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
2651 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2652 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
2653 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
2654 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002655 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002656 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002657 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2658 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2659 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002660 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002661 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2662 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2663 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2664 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2665 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2666 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002667 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2668 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2669 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002670 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2671 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2672 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002673 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2674 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002677 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07002681 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002682 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002683 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07002686 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002687 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07002696 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002714 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07002727 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002730 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
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Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002736 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002737 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002738 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002739 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07002743 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -07002747 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -07002749 "src/qu8-dwconv/up8x9-minmax-sse2.c",
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2751 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
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2753 "src/qu8-gemm/4x4c2-minmax-sse2.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002755 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002756 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002757 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002758 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002759 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002760 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002761 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002762 "src/x8-zip/x2-sse2.c",
2763 "src/x8-zip/x3-sse2.c",
2764 "src/x8-zip/x4-sse2.c",
2765 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002766 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002767 "src/x32-zip/x2-sse2.c",
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Marat Dukhanfe7acb62020-03-09 19:30:05 -07002771]
2772
2773SSSE3_UKERNELS = [
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2838 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002839 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002840 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002841 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002842 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002843 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002844 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002845 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002846 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002847]
2848
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002849SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08002850 "src/f32-prelu/gen/sse41-2x4.c",
2851 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002852 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
2853 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
2854 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
2855 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
2856 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
2857 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
2858 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
2859 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
2860 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
2861 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
2862 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
2863 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002864 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
2865 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002866 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
2867 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002868 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
2869 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
2870 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
2871 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
2872 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
2873 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002874 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
2875 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
2876 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
2877 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
2878 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
2879 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
2880 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
2881 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
2882 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
2883 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
2884 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
2885 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002886 "src/math/roundd-sse41.c",
2887 "src/math/roundne-sse41.c",
2888 "src/math/roundu-sse41.c",
2889 "src/math/roundz-sse41.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002890 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
2891 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
2892 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
2893 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
2894 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
2895 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
2896 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
2897 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
2898 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
2899 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
2900 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
2901 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
2902 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
2903 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
2904 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
2905 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
2906 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
2907 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
2908 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
2909 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
2910 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
2911 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
2912 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
2913 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
2914 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
2915 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
2916 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
2917 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002918 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
2919 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002920 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
2921 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002922 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
2923 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
2924 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
2925 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
2926 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
2927 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002928 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
2929 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002930 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
2931 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
2932 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
2933 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
2934 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
2935 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
2936 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
2937 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
2938 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
2939 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
2940 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
2941 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002942 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
2943 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
2944 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002945 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
2946 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
2947 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002948 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
2949 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002950 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002951 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002952 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002953 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
2954 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002955 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002956 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002957 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002958 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
2959 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002960 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002961 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002962 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002963 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
2964 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002965 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002966 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002967 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002968 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
2969 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002970 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002971 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002972 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002973 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
2974 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002975 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002976 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002977 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002978 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
2979 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002980 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002981 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002982 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002983 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
2984 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002985 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002986 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
2987 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
2988 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002989 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002990 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
2991 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
2992 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002993 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002994 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
2995 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
2996 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002997 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002998 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
2999 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3000 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003001 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003002 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
3003 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3004 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003005 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003006 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
3007 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
3008 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003009 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003010 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003011 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003012 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003013 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07003014 "src/qs8-requantization/rndnu-sse4.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003015 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3016 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3017 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3018 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003019 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3020 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3021 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3022 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003023 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3024 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3025 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3026 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003027 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3028 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3029 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3030 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003031 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003032 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003033]
3034
Marat Dukhan08c4a432019-10-03 09:29:21 -07003035AVX_UKERNELS = [
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Marat Dukhan1c587112020-04-08 20:04:28 -07003038 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3039 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003040 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003042 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
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3044 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
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3046 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3047 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003048 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003049 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3050 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003051 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003052 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003053 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003054 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003055 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
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3057 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3058 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3059 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3060 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3061 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3062 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3063 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3064 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3065 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003066 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003067 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3068 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003069 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003070 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003071 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003072 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003073 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3074 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003075 "src/f32-prelu/gen/avx-2x8.c",
3076 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003077 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003078 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3079 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3080 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3081 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3082 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3083 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3084 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3085 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003086 "src/f32-vbinary/gen/vmax-avx-x8.c",
3087 "src/f32-vbinary/gen/vmax-avx-x16.c",
3088 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3089 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3090 "src/f32-vbinary/gen/vmin-avx-x8.c",
3091 "src/f32-vbinary/gen/vmin-avx-x16.c",
3092 "src/f32-vbinary/gen/vminc-avx-x8.c",
3093 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003094 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3095 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3096 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3097 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3098 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3099 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3100 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3101 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003102 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3103 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3104 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3105 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003106 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3107 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3108 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3109 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003110 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3111 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003112 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3113 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3114 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3115 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3116 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3117 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3118 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3119 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3120 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3121 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3122 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3123 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3124 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3125 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3126 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3127 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3128 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3129 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003130 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3131 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003132 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3133 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003134 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3135 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003136 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3137 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003138 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3139 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3140 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3141 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3142 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3143 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003144 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003145 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3146 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3147 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3148 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3149 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3150 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3151 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3152 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3153 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3154 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3155 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3156 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3157 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3158 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3159 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3160 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3161 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3162 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3163 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3164 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003165 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3166 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003167 "src/f32-vunary/gen/vabs-avx-x8.c",
3168 "src/f32-vunary/gen/vabs-avx-x16.c",
3169 "src/f32-vunary/gen/vneg-avx-x8.c",
3170 "src/f32-vunary/gen/vneg-avx-x16.c",
3171 "src/f32-vunary/gen/vsqr-avx-x8.c",
3172 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003173 "src/math/exp-avx-rr2-p5.c",
3174 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3175 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3176 "src/math/expm1minus-avx-rr2-p6.c",
3177 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3178 "src/math/sigmoid-avx-rr2-p5-div.c",
3179 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3180 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003181 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3182 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3183 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3184 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3185 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3186 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3187 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3188 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3189 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3190 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3191 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3192 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3193 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3194 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3195 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3196 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3197 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3198 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3199 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3200 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3201 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3202 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3203 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3204 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3205 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3206 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3207 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3208 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003209 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3210 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003211 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3212 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003213 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3214 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3215 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3216 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3217 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3218 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003219 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3220 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003221 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3222 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3223 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3224 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3225 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3226 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3227 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3228 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3229 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3230 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3231 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3232 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003233 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3234 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003235 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003236 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003237 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003238 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3239 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003240 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003241 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003242 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003243 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003245 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003246 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003247 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003248 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3249 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003250 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003251 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003252 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003253 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3254 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003255 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003256 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003257 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003258 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003260 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003261 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003262 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003263 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003265 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003266 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003267 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003268 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3269 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003270 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003271 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
3272 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3273 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003274 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003275 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
3276 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003278 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003279 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
3280 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3281 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003282 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003283 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
3284 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3285 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003286 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003287 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
3288 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3289 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003290 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003291 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
3292 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3293 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003294 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003295 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003296 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3297 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3298 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3299 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3300 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3301 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3302 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3303 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3304 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3305 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3306 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3307 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3308 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3309 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3310 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3311 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003312]
3313
Marat Dukhan1566fee2020-08-02 21:55:41 -07003314XOP_UKERNELS = [
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3317 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3318 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
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3322 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
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3330 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3331 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3332 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3333 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3334 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3335 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3336 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3337 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
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Marat Dukhancaf48312021-06-01 20:20:58 -07003343 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003344 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003345 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
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Marat Dukhane1ff2482021-05-24 17:48:47 -07003348 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003349 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
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3352 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3353 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07003355 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003359 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003364 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003365 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07003368 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003369 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07003383 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003384 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003385 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003389 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
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3395 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003396 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-xop-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07003416 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003417 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld64.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003418 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3419 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3420 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3421 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3422 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3423 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3424 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3425 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003426]
3427
Marat Dukhanfda12b82019-11-21 12:27:59 -08003428FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003429 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
3430 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003431 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
3432 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003433 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
3434 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003435 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
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3437 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
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3439 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3440 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003441 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003442 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
3443 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
3444 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
3445 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003446 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003447 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
3448 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003449 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003450 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
3451 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003452 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
3453 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
3454 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003455 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3456 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3457 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3458 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3459 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3460 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3461 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3462 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3463 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3464 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3465 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3466 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3467 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3468 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003469 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003470 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3471 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3472 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3473 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003474 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003475 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3476 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003477 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003478 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3479 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003480 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3481 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3482 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003483 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3484 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003485 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
3486 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
3487 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
3488 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
3489 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
3490 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
3491 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
3492 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003493 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003494 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003495 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08003496]
3497
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003498AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003499 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
3500 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003501 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003502 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003503 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003504 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
3505 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003506 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003507 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
3508 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
3509 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003510 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003511 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
3512 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003513 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003514 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003515 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003516 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
3517 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003518 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003519 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
3520 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
3521 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003522 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003523 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
3524 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003525 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003526 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003527 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003528 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3529 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003530 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003531 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3532 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3533 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003534 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003535 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3536 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3537 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3538 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3539 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3540 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3541 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3542 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3543 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3544 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3545 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3546 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3547 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3548 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3549 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3550 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3551 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3552 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3553 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3554 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3555 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3556 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3557 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3558 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3559 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3560 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3561 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3562 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3563 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3564 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3565 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3566 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3567 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3568 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3569 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3570 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3571 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3572 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3573 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3574 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003575 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3576 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3577 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3578 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3579 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3580 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3581 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3582 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3583 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3584 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3585 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3586 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3587 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3588 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3589 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3590 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3591 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3592 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3593 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3594 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3595 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3596 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3597 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3598 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003599 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3600 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3601 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3602 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3603 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3604 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3605 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3606 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3607 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3608 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3609 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3610 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3611 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3612 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3613 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3614 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3615 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3616 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3617 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3618 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3619 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3620 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3621 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3622 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3623 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3624 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3625 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3626 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3627 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3628 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003629 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3630 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3631 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003632 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3633 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3634 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3635 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003636 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003637 "src/math/extexp-avx2-p5.c",
3638 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3639 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3640 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3641 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3642 "src/math/sigmoid-avx2-rr1-p5-div.c",
3643 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3644 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3645 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3646 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3647 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3648 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3649 "src/math/sigmoid-avx2-rr2-p5-div.c",
3650 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3651 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003652 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
3653 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
3654 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
3655 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
3656 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
3657 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07003658 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
3659 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
3660 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003661 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003662 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003663 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003664 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003665 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003666 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003667 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
3668 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003669 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003670 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003671 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
3672 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003673 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003674 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003675 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003676 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003677 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003678 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003679 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
3680 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003681 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003682 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003683 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
3684 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003685 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003686 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003687 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003688 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003689 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003690 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003691 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003692 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003693 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003694 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003695 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003696 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003697 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003698 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003699 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003700 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003701 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003702 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003703 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3704 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3705 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3706 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3707 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3708 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3709 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3710 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003711]
3712
Marat Dukhan08c4a432019-10-03 09:29:21 -07003713AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003714 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
3715 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003716 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
3717 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003718 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
3719 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003720 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
3721 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
3722 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
3723 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
3724 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
3725 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003726 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
3727 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
3728 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
3729 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
3730 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
3731 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003732 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
3733 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
3734 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
3735 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
3736 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
3737 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003738 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
3739 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
3740 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
3741 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
3742 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
3743 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003744 "src/f32-prelu/gen/avx512f-2x16.c",
3745 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003746 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3747 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003748 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003749 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003750 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003751 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3752 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003753 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003754 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3755 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3756 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003757 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003758 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
3759 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003760 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003761 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003762 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003763 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
3764 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003765 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003766 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
3767 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
3768 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003769 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003770 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3771 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003772 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003773 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003774 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003775 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3776 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003777 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003778 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3779 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3780 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003781 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003782 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003783 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
3784 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
3785 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
3786 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
3787 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
3788 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
3789 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
3790 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003791 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
3792 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
3793 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
3794 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
3795 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
3796 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
3797 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
3798 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003799 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
3800 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
3801 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
3802 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
3803 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
3804 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
3805 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
3806 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003807 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
3808 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
3809 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
3810 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003811 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
3812 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
3813 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
3814 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003815 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
3816 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003817 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
3818 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
3819 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
3820 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
3821 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
3822 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
3823 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
3824 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
3825 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
3826 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
3827 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
3828 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
3829 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
3830 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
3831 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
3832 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003833 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
3834 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003835 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
3836 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003837 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
3838 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003839 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
3840 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
3841 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
3842 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
3843 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
3844 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
3845 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
3846 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003847 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003848 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
3849 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
3850 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
3851 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
3852 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
3853 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
3854 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
3855 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
3856 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
3857 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
3858 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
3859 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
3860 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
3861 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
3862 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
3863 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
3864 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
3865 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
3866 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
3867 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
3868 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
3869 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
3870 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
3871 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003872 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
3873 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
3874 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
3875 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
3876 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
3877 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
3878 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
3879 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
3880 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
3881 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
3882 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
3883 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
3884 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
3885 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
3886 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
3887 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
3888 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
3889 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
3890 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
3891 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
3892 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
3893 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
3894 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
3895 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
3896 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
3897 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
3898 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
3899 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
3900 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
3901 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
3902 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
3903 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
3904 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
3905 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
3906 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
3907 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
3908 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
3909 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
3910 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
3911 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
3912 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
3913 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
3914 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
3915 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
3916 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
3917 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
3918 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
3919 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003920 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
3921 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
3922 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
3923 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
3924 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
3925 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
3926 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
3927 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003928 "src/f32-vunary/gen/vabs-avx512f-x16.c",
3929 "src/f32-vunary/gen/vabs-avx512f-x32.c",
3930 "src/f32-vunary/gen/vneg-avx512f-x16.c",
3931 "src/f32-vunary/gen/vneg-avx512f-x32.c",
3932 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
3933 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003934 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
3935 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
3936 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
3937 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
3938 "src/math/exp-avx512f-rr2-p5-scalef.c",
3939 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003940 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
3941 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07003942 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003943 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003944 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003945 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003946 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003947 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003948 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003949 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003950 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003951 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
3952 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
3953 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
3954 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
3955 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
3956 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
3957 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
3958 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
3959 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
3960 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003961 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003962 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003963 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
3964 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
3965 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
3966 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003967 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003968 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003969 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003970]
3971
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07003972AVX512SKX_UKERNELS = [
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07003973 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
3974 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
3975 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
3976 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
3977 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
3978 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
3979 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
3980 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003981 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003982 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003983 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003984 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003985 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003986 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003987 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003988 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003989 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003990 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003991 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003992 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003993 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003994 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003995 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003996 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003997 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003998 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003999 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004000 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004001 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004002 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004003 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004004 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004005]
4006
Frank Barchardbcedc082020-08-17 18:00:51 -07004007WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004008 "src/f32-vrelu/wasm_shr_x1.S",
4009 "src/f32-vrelu/wasm_shr_x2.S",
4010 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004011]
4012
Marat Dukhan08c4a432019-10-03 09:29:21 -07004013AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07004014 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004015 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004016 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4017 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004018 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004019 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004020 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004021 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004022 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4023 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004024 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
4025 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
4026 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
4027 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004028]
4029
4030AARCH64_ASM_UKERNELS = [
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004031 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004032 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004033 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004034 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004035 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004036 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -07004037 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004038 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
4039 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
4040 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
4041 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
4042 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
4043 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
4044 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004045 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
4046 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004047 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4048 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
4049 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004050 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
4051 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004052 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4053 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
4054 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
4055 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004056 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004057 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
4058 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004059 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
4060 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
4061 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4062 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004063 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004064 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004065 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004066 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004067 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
4068 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
4069 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
4070 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
4071 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
4072 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
4073 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4074 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
4075 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
4076 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
4077 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
4078 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
4079 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
4080 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
4081 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
4082 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4083 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
4084 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
4085 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
4086 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
4087 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
4088 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004089 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004090 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004091 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4092 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004093 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
4094 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4095 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
4096 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
4097 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
4098 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004099 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
4100 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
4101 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
4102 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004103 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
4104 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004105 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4106 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4107 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4108 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004109 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4110 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004111 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4112 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4113 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4114 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004115 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
4116 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004117 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4118 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004119 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4120 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4121 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004122 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4123 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4124 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4125 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
4126 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4127 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4128 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4129 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004130 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004131 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4132 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004133 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4134 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004135]
4136
Marat Dukhan1b354632020-03-23 12:50:22 -07004137INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004138 "src/xnnpack/argmaxpool.h",
4139 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004140 "src/xnnpack/common.h",
4141 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004142 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004143 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004144 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004145 "src/xnnpack/gavgpool.h",
4146 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004147 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004148 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004149 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004150 "src/xnnpack/lut.h",
4151 "src/xnnpack/math.h",
4152 "src/xnnpack/maxpool.h",
4153 "src/xnnpack/packx.h",
4154 "src/xnnpack/pad.h",
4155 "src/xnnpack/params.h",
4156 "src/xnnpack/pavgpool.h",
4157 "src/xnnpack/ppmm.h",
4158 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004159 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004160 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004161 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004162 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004163 "src/xnnpack/spmm.h",
4164 "src/xnnpack/unpool.h",
4165 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004166 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004167 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004168 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004169 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004170 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004171 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004172 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004173]
4174
4175INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004176 "include/xnnpack.h",
4177 "src/xnnpack/allocator.h",
4178 "src/xnnpack/compute.h",
4179 "src/xnnpack/im2col.h",
4180 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004181 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004182 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004183 "src/xnnpack/operator.h",
4184 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004185 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004186 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004187 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004188 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004189]
4190
Marat Dukhan1b354632020-03-23 12:50:22 -07004191ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004192 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004193]
4194
Marat Dukhan1b354632020-03-23 12:50:22 -07004195MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004196 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004197 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004198]
4199
Marat Dukhan1b354632020-03-23 12:50:22 -07004200MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004201 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004202 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004203 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004204 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004205]
4206
4207OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004208 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004209 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004210]
4211
4212WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004213 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004214 "src/xnnpack/operator.h",
4215 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004216]
4217
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004218LOGGING_COPTS = select({
4219 # No logging in optimized mode
4220 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4221 # Full logging in debug mode
4222 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4223 # Error-only logging in default (fastbuild) mode
4224 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4225})
4226
Marat Dukhan3b59de22020-06-03 20:15:19 -07004227LOGGING_SRCS = select({
4228 # No logging in optimized mode
4229 ":optimized_build": [],
4230 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004231 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004232 "src/operator-strings.c",
4233 "src/subgraph-strings.c",
4234 ],
4235})
4236
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004237LOGGING_HDRS = [
4238 "src/xnnpack/log.h",
4239]
4240
Marat Dukhan08c4a432019-10-03 09:29:21 -07004241xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004242 name = "tables",
4243 srcs = TABLE_SRCS,
4244 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004245 gcc_copts = xnnpack_gcc_std_copts(),
4246 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004247)
4248
4249xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004250 name = "scalar_ukernels",
4251 srcs = SCALAR_UKERNELS,
4252 hdrs = INTERNAL_HDRS,
4253 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004254 gcc_copts = xnnpack_gcc_std_copts(),
4255 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004256 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004257 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004258 "@FP16",
4259 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004260 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004261 ],
4262)
4263
4264xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004265 name = "scalar_ukernels_test_mode",
4266 srcs = SCALAR_UKERNELS,
4267 hdrs = INTERNAL_HDRS,
4268 aarch32_copts = ["-marm"],
4269 copts = [
4270 "-UNDEBUG",
4271 "-DXNN_TEST_MODE=1",
4272 ],
4273 gcc_copts = xnnpack_gcc_std_copts(),
4274 msvc_copts = xnnpack_msvc_std_copts(),
4275 deps = [
4276 ":tables",
4277 "@FP16",
4278 "@FXdiv",
4279 "@pthreadpool",
4280 ],
4281)
4282
4283xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004284 name = "wasm_ukernels",
4285 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004286 gcc_copts = xnnpack_gcc_std_copts(),
4287 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004288 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004289 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004290 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004291 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004292 "@FP16",
4293 "@FXdiv",
4294 "@pthreadpool",
4295 ],
4296)
4297
4298xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004299 name = "wasm_ukernels_test_mode",
4300 hdrs = INTERNAL_HDRS,
4301 copts = [
4302 "-UNDEBUG",
4303 "-DXNN_TEST_MODE=1",
4304 ],
4305 gcc_copts = xnnpack_gcc_std_copts(),
4306 msvc_copts = xnnpack_msvc_std_copts(),
4307 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004308 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004309 deps = [
4310 ":tables",
4311 "@FP16",
4312 "@FXdiv",
4313 "@pthreadpool",
4314 ],
4315)
4316
4317xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004318 name = "neon_ukernels",
4319 hdrs = INTERNAL_HDRS,
4320 aarch32_copts = [
4321 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004322 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004323 "-mfpu=neon",
4324 ],
4325 aarch32_srcs = NEON_UKERNELS,
4326 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004327 gcc_copts = xnnpack_gcc_std_copts(),
4328 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004329 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004330 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004331 "@FP16",
4332 "@pthreadpool",
4333 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004334)
4335
4336xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004337 name = "neon_ukernels_test_mode",
4338 hdrs = INTERNAL_HDRS,
4339 aarch32_copts = [
4340 "-marm",
4341 "-march=armv7-a",
4342 "-mfpu=neon",
4343 ],
4344 aarch32_srcs = NEON_UKERNELS,
4345 aarch64_srcs = NEON_UKERNELS,
4346 copts = [
4347 "-UNDEBUG",
4348 "-DXNN_TEST_MODE=1",
4349 ],
4350 gcc_copts = xnnpack_gcc_std_copts(),
4351 msvc_copts = xnnpack_msvc_std_copts(),
4352 deps = [
4353 ":tables",
4354 "@FP16",
4355 "@pthreadpool",
4356 ],
4357)
4358
4359xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004360 name = "neonfma_ukernels",
4361 hdrs = INTERNAL_HDRS,
4362 aarch32_copts = [
4363 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004364 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004365 "-mfpu=neon-vfpv4",
4366 ],
4367 aarch32_srcs = NEONFMA_UKERNELS,
4368 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004369 apple_aarch32_copts = [
4370 "-mcpu=swift",
4371 "-mtune=generic",
4372 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004373 gcc_copts = xnnpack_gcc_std_copts(),
4374 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004375 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004376 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004377 "@FP16",
4378 "@pthreadpool",
4379 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004380)
4381
4382xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004383 name = "neonfma_ukernels_test_mode",
4384 hdrs = INTERNAL_HDRS,
4385 aarch32_copts = [
4386 "-marm",
4387 "-march=armv7-a",
4388 "-mfpu=neon-vfpv4",
4389 ],
4390 aarch32_srcs = NEONFMA_UKERNELS,
4391 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004392 apple_aarch32_copts = [
4393 "-mcpu=swift",
4394 "-mtune=generic",
4395 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004396 copts = [
4397 "-UNDEBUG",
4398 "-DXNN_TEST_MODE=1",
4399 ],
4400 gcc_copts = xnnpack_gcc_std_copts(),
4401 msvc_copts = xnnpack_msvc_std_copts(),
4402 deps = [
4403 ":tables",
4404 "@FP16",
4405 "@pthreadpool",
4406 ],
4407)
4408
4409xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004410 name = "neonv8_ukernels",
4411 hdrs = INTERNAL_HDRS,
4412 aarch32_copts = [
4413 "-marm",
4414 "-march=armv8-a",
4415 "-mfpu=neon-fp-armv8",
4416 ],
4417 aarch32_srcs = NEONV8_UKERNELS,
4418 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004419 apple_aarch32_copts = [
4420 "-mcpu=cyclone",
4421 "-mtune=generic",
4422 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004423 gcc_copts = xnnpack_gcc_std_copts(),
4424 msvc_copts = xnnpack_msvc_std_copts(),
4425 deps = [
4426 ":tables",
4427 "@FP16",
4428 "@pthreadpool",
4429 ],
4430)
4431
4432xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004433 name = "neonv8_ukernels_test_mode",
4434 hdrs = INTERNAL_HDRS,
4435 aarch32_copts = [
4436 "-marm",
4437 "-march=armv8-a",
4438 "-mfpu=neon-fp-armv8",
4439 ],
4440 aarch32_srcs = NEONV8_UKERNELS,
4441 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004442 apple_aarch32_copts = [
4443 "-mcpu=cyclone",
4444 "-mtune=generic",
4445 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004446 copts = [
4447 "-UNDEBUG",
4448 "-DXNN_TEST_MODE=1",
4449 ],
4450 gcc_copts = xnnpack_gcc_std_copts(),
4451 msvc_copts = xnnpack_msvc_std_copts(),
4452 deps = [
4453 ":tables",
4454 "@FP16",
4455 "@pthreadpool",
4456 ],
4457)
4458
4459xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004460 name = "neonfp16arith_ukernels",
4461 hdrs = INTERNAL_HDRS,
4462 aarch64_copts = ["-march=armv8.2-a+fp16"],
4463 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004464 gcc_copts = xnnpack_gcc_std_copts(),
4465 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004466 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004467 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004468 "@FP16",
4469 "@pthreadpool",
4470 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004471)
4472
4473xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004474 name = "neonfp16arith_ukernels_test_mode",
4475 hdrs = INTERNAL_HDRS,
4476 aarch64_copts = ["-march=armv8.2-a+fp16"],
4477 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4478 copts = [
4479 "-UNDEBUG",
4480 "-DXNN_TEST_MODE=1",
4481 ],
4482 gcc_copts = xnnpack_gcc_std_copts(),
4483 msvc_copts = xnnpack_msvc_std_copts(),
4484 deps = [
4485 ":tables",
4486 "@FP16",
4487 "@pthreadpool",
4488 ],
4489)
4490
4491xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004492 name = "neondot_ukernels",
4493 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004494 aarch32_copts = [
4495 "-marm",
4496 "-march=armv8.2-a+dotprod",
4497 "-mfpu=neon-fp-armv8",
4498 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004499 aarch32_srcs = NEONDOT_UKERNELS,
4500 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4501 aarch64_srcs = NEONDOT_UKERNELS,
4502 gcc_copts = xnnpack_gcc_std_copts(),
4503 msvc_copts = xnnpack_msvc_std_copts(),
4504 deps = [
4505 ":tables",
4506 "@FP16",
4507 "@pthreadpool",
4508 ],
4509)
4510
4511xnnpack_cc_library(
4512 name = "neondot_ukernels_test_mode",
4513 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004514 aarch32_copts = [
4515 "-marm",
4516 "-march=armv8.2-a+dotprod",
4517 "-mfpu=neon-fp-armv8",
4518 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004519 aarch32_srcs = NEONDOT_UKERNELS,
4520 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4521 aarch64_srcs = NEONDOT_UKERNELS,
4522 copts = [
4523 "-UNDEBUG",
4524 "-DXNN_TEST_MODE=1",
4525 ],
4526 gcc_copts = xnnpack_gcc_std_copts(),
4527 msvc_copts = xnnpack_msvc_std_copts(),
4528 deps = [
4529 ":tables",
4530 "@FP16",
4531 "@pthreadpool",
4532 ],
4533)
4534
4535xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004536 name = "sse2_ukernels",
4537 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004538 gcc_copts = xnnpack_gcc_std_copts(),
4539 gcc_x86_copts = ["-msse2"],
4540 msvc_copts = xnnpack_msvc_std_copts(),
4541 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004542 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004543 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004544 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004545 "@FP16",
4546 "@pthreadpool",
4547 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004548)
4549
4550xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004551 name = "sse2_ukernels_test_mode",
4552 hdrs = INTERNAL_HDRS,
4553 copts = [
4554 "-UNDEBUG",
4555 "-DXNN_TEST_MODE=1",
4556 ],
4557 gcc_copts = xnnpack_gcc_std_copts(),
4558 gcc_x86_copts = ["-msse2"],
4559 msvc_copts = xnnpack_msvc_std_copts(),
4560 msvc_x86_32_copts = ["/arch:SSE2"],
4561 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4562 deps = [
4563 ":tables",
4564 "@FP16",
4565 "@pthreadpool",
4566 ],
4567)
4568
4569xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004570 name = "ssse3_ukernels",
4571 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004572 gcc_copts = xnnpack_gcc_std_copts(),
4573 gcc_x86_copts = ["-mssse3"],
4574 msvc_copts = xnnpack_msvc_std_copts(),
4575 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004576 x86_srcs = SSSE3_UKERNELS,
4577 deps = [
4578 ":tables",
4579 "@FP16",
4580 "@pthreadpool",
4581 ],
4582)
4583
4584xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004585 name = "ssse3_ukernels_test_mode",
4586 hdrs = INTERNAL_HDRS,
4587 copts = [
4588 "-UNDEBUG",
4589 "-DXNN_TEST_MODE=1",
4590 ],
4591 gcc_copts = xnnpack_gcc_std_copts(),
4592 gcc_x86_copts = ["-mssse3"],
4593 msvc_copts = xnnpack_msvc_std_copts(),
4594 msvc_x86_32_copts = ["/arch:SSE2"],
4595 x86_srcs = SSSE3_UKERNELS,
4596 deps = [
4597 ":tables",
4598 "@FP16",
4599 "@pthreadpool",
4600 ],
4601)
4602
4603xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004604 name = "sse41_ukernels",
4605 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004606 gcc_copts = xnnpack_gcc_std_copts(),
4607 gcc_x86_copts = ["-msse4.1"],
4608 msvc_copts = xnnpack_msvc_std_copts(),
4609 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004610 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004611 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004612 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004613 "@FP16",
4614 "@pthreadpool",
4615 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004616)
4617
4618xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004619 name = "sse41_ukernels_test_mode",
4620 hdrs = INTERNAL_HDRS,
4621 copts = [
4622 "-UNDEBUG",
4623 "-DXNN_TEST_MODE=1",
4624 ],
4625 gcc_copts = xnnpack_gcc_std_copts(),
4626 gcc_x86_copts = ["-msse4.1"],
4627 msvc_copts = xnnpack_msvc_std_copts(),
4628 msvc_x86_32_copts = ["/arch:SSE2"],
4629 x86_srcs = SSE41_UKERNELS,
4630 deps = [
4631 ":tables",
4632 "@FP16",
4633 "@pthreadpool",
4634 ],
4635)
4636
4637xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004638 name = "avx_ukernels",
4639 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004640 gcc_copts = xnnpack_gcc_std_copts(),
4641 gcc_x86_copts = ["-mavx"],
4642 msvc_copts = xnnpack_msvc_std_copts(),
4643 msvc_x86_32_copts = ["/arch:AVX"],
4644 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004645 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004646 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004647 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004648 "@FP16",
4649 "@pthreadpool",
4650 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004651)
4652
4653xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004654 name = "avx_ukernels_test_mode",
4655 hdrs = INTERNAL_HDRS,
4656 copts = [
4657 "-UNDEBUG",
4658 "-DXNN_TEST_MODE=1",
4659 ],
4660 gcc_copts = xnnpack_gcc_std_copts(),
4661 gcc_x86_copts = ["-mavx"],
4662 msvc_copts = xnnpack_msvc_std_copts(),
4663 msvc_x86_32_copts = ["/arch:AVX"],
4664 msvc_x86_64_copts = ["/arch:AVX"],
4665 x86_srcs = AVX_UKERNELS,
4666 deps = [
4667 ":tables",
4668 "@FP16",
4669 "@pthreadpool",
4670 ],
4671)
4672
4673xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07004674 name = "xop_ukernels",
4675 hdrs = INTERNAL_HDRS,
4676 gcc_copts = xnnpack_gcc_std_copts(),
4677 gcc_x86_copts = ["-mxop"],
4678 msvc_copts = xnnpack_msvc_std_copts(),
4679 msvc_x86_32_copts = ["/arch:AVX"],
4680 msvc_x86_64_copts = ["/arch:AVX"],
4681 x86_srcs = XOP_UKERNELS,
4682 deps = [
4683 ":tables",
4684 "@FP16",
4685 "@pthreadpool",
4686 ],
4687)
4688
4689xnnpack_cc_library(
4690 name = "xop_ukernels_test_mode",
4691 hdrs = INTERNAL_HDRS,
4692 copts = [
4693 "-UNDEBUG",
4694 "-DXNN_TEST_MODE=1",
4695 ],
4696 gcc_copts = xnnpack_gcc_std_copts(),
4697 gcc_x86_copts = ["-mxop"],
4698 msvc_copts = xnnpack_msvc_std_copts(),
4699 msvc_x86_32_copts = ["/arch:AVX"],
4700 msvc_x86_64_copts = ["/arch:AVX"],
4701 x86_srcs = XOP_UKERNELS,
4702 deps = [
4703 ":tables",
4704 "@FP16",
4705 "@pthreadpool",
4706 ],
4707)
4708
4709xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08004710 name = "fma3_ukernels",
4711 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004712 gcc_copts = xnnpack_gcc_std_copts(),
4713 gcc_x86_copts = ["-mfma"],
4714 msvc_copts = xnnpack_msvc_std_copts(),
4715 msvc_x86_32_copts = ["/arch:AVX"],
4716 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08004717 x86_srcs = FMA3_UKERNELS,
4718 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004719 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004720 "@FP16",
4721 "@pthreadpool",
4722 ],
4723)
4724
4725xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004726 name = "fma3_ukernels_test_mode",
4727 hdrs = INTERNAL_HDRS,
4728 copts = [
4729 "-UNDEBUG",
4730 "-DXNN_TEST_MODE=1",
4731 ],
4732 gcc_copts = xnnpack_gcc_std_copts(),
4733 gcc_x86_copts = ["-mfma"],
4734 msvc_copts = xnnpack_msvc_std_copts(),
4735 msvc_x86_32_copts = ["/arch:AVX"],
4736 msvc_x86_64_copts = ["/arch:AVX"],
4737 x86_srcs = FMA3_UKERNELS,
4738 deps = [
4739 ":tables",
4740 "@FP16",
4741 "@pthreadpool",
4742 ],
4743)
4744
4745xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004746 name = "avx2_ukernels",
4747 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004748 gcc_copts = xnnpack_gcc_std_copts(),
4749 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004750 "-mfma",
4751 "-mavx2",
4752 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004753 msvc_copts = xnnpack_msvc_std_copts(),
4754 msvc_x86_32_copts = ["/arch:AVX2"],
4755 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004756 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004757 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004758 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004759 "@FP16",
4760 "@pthreadpool",
4761 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004762)
4763
4764xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004765 name = "avx2_ukernels_test_mode",
4766 hdrs = INTERNAL_HDRS,
4767 copts = [
4768 "-UNDEBUG",
4769 "-DXNN_TEST_MODE=1",
4770 ],
4771 gcc_copts = xnnpack_gcc_std_copts(),
4772 gcc_x86_copts = [
4773 "-mfma",
4774 "-mavx2",
4775 ],
4776 msvc_copts = xnnpack_msvc_std_copts(),
4777 msvc_x86_32_copts = ["/arch:AVX2"],
4778 msvc_x86_64_copts = ["/arch:AVX2"],
4779 x86_srcs = AVX2_UKERNELS,
4780 deps = [
4781 ":tables",
4782 "@FP16",
4783 "@pthreadpool",
4784 ],
4785)
4786
4787xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004788 name = "avx512f_ukernels",
4789 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004790 gcc_copts = xnnpack_gcc_std_copts(),
4791 gcc_x86_copts = ["-mavx512f"],
4792 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4793 msvc_copts = xnnpack_msvc_std_copts(),
4794 msvc_x86_32_copts = ["/arch:AVX512"],
4795 msvc_x86_64_copts = ["/arch:AVX512"],
4796 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004797 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004798 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004799 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004800 "@FP16",
4801 "@pthreadpool",
4802 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004803)
4804
4805xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004806 name = "avx512f_ukernels_test_mode",
4807 hdrs = INTERNAL_HDRS,
4808 copts = [
4809 "-UNDEBUG",
4810 "-DXNN_TEST_MODE=1",
4811 ],
4812 gcc_copts = xnnpack_gcc_std_copts(),
4813 gcc_x86_copts = ["-mavx512f"],
4814 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4815 msvc_copts = xnnpack_msvc_std_copts(),
4816 msvc_x86_32_copts = ["/arch:AVX512"],
4817 msvc_x86_64_copts = ["/arch:AVX512"],
4818 msys_copts = ["-fno-asynchronous-unwind-tables"],
4819 x86_srcs = AVX512F_UKERNELS,
4820 deps = [
4821 ":tables",
4822 "@FP16",
4823 "@pthreadpool",
4824 ],
4825)
4826
4827xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004828 name = "avx512skx_ukernels",
4829 hdrs = INTERNAL_HDRS,
4830 gcc_copts = xnnpack_gcc_std_copts(),
4831 gcc_x86_copts = [
4832 "-mavx512f",
4833 "-mavx512cd",
4834 "-mavx512bw",
4835 "-mavx512dq",
4836 "-mavx512vl",
4837 ],
4838 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4839 msvc_copts = xnnpack_msvc_std_copts(),
4840 msvc_x86_32_copts = ["/arch:AVX512"],
4841 msvc_x86_64_copts = ["/arch:AVX512"],
4842 msys_copts = ["-fno-asynchronous-unwind-tables"],
4843 x86_srcs = AVX512SKX_UKERNELS,
4844 deps = [
4845 ":tables",
4846 "@FP16",
4847 "@pthreadpool",
4848 ],
4849)
4850
4851xnnpack_cc_library(
4852 name = "avx512skx_ukernels_test_mode",
4853 hdrs = INTERNAL_HDRS,
4854 copts = [
4855 "-UNDEBUG",
4856 "-DXNN_TEST_MODE=1",
4857 ],
4858 gcc_copts = xnnpack_gcc_std_copts(),
4859 gcc_x86_copts = [
4860 "-mavx512f",
4861 "-mavx512cd",
4862 "-mavx512bw",
4863 "-mavx512dq",
4864 "-mavx512vl",
4865 ],
4866 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4867 msvc_copts = xnnpack_msvc_std_copts(),
4868 msvc_x86_32_copts = ["/arch:AVX512"],
4869 msvc_x86_64_copts = ["/arch:AVX512"],
4870 msys_copts = ["-fno-asynchronous-unwind-tables"],
4871 x86_srcs = AVX512SKX_UKERNELS,
4872 deps = [
4873 ":tables",
4874 "@FP16",
4875 "@pthreadpool",
4876 ],
4877)
4878
4879xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004880 name = "asm_ukernels",
4881 hdrs = ["src/xnnpack/assembly.h"],
4882 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07004883 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004884 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07004885 wasm_srcs = WASM32_ASM_UKERNELS,
4886 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07004887)
4888
Marat Dukhan3b59de22020-06-03 20:15:19 -07004889xnnpack_cc_library(
4890 name = "logging_utils",
4891 srcs = LOGGING_SRCS,
4892 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4893 copts = LOGGING_COPTS + [
4894 "-Isrc",
4895 "-Iinclude",
4896 ] + select({
4897 ":debug_build": [],
4898 "//conditions:default": xnnpack_min_size_copts(),
4899 }),
4900 gcc_copts = xnnpack_gcc_std_copts(),
4901 msvc_copts = xnnpack_msvc_std_copts(),
4902 visibility = xnnpack_visibility(),
4903 deps = [
4904 "@FP16",
4905 "@clog",
4906 "@pthreadpool",
4907 ],
4908)
4909
Marat Dukhan08c4a432019-10-03 09:29:21 -07004910xnnpack_aggregate_library(
4911 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004912 aarch32_ios_deps = [
4913 ":neon_ukernels",
4914 ":neonfma_ukernels",
4915 ":neonv8_ukernels",
4916 ":asm_ukernels",
4917 ],
4918 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004919 ":neon_ukernels",
4920 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004921 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004922 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004923 ":asm_ukernels",
4924 ],
4925 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004926 ":neon_ukernels",
4927 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004928 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004929 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004930 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004931 ":asm_ukernels",
4932 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004933 generic_deps = [
4934 ":scalar_ukernels",
4935 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004936 wasm_deps = [
4937 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004938 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004939 ],
4940 wasmsimd_deps = [
4941 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004942 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004943 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004944 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004945 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004946 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004947 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004948 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004949 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004950 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004951 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004952 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004953 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004954 ],
4955)
4956
Marat Dukhan33fcf782020-05-24 14:27:15 -07004957xnnpack_aggregate_library(
4958 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004959 aarch32_ios_deps = [
4960 ":neon_ukernels_test_mode",
4961 ":neonfma_ukernels_test_mode",
4962 ":neonv8_ukernels_test_mode",
4963 ":asm_ukernels",
4964 ],
4965 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07004966 ":neon_ukernels_test_mode",
4967 ":neonfma_ukernels_test_mode",
4968 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004969 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004970 ":asm_ukernels",
4971 ],
4972 aarch64_deps = [
4973 ":neon_ukernels_test_mode",
4974 ":neonfma_ukernels_test_mode",
4975 ":neonv8_ukernels_test_mode",
4976 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004977 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004978 ":asm_ukernels",
4979 ],
4980 generic_deps = [
4981 ":scalar_ukernels_test_mode",
4982 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004983 wasm_deps = [
4984 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004985 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004986 ],
4987 wasmsimd_deps = [
4988 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004989 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004990 ],
4991 x86_deps = [
4992 ":sse2_ukernels_test_mode",
4993 ":ssse3_ukernels_test_mode",
4994 ":sse41_ukernels_test_mode",
4995 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004996 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004997 ":fma3_ukernels_test_mode",
4998 ":avx2_ukernels_test_mode",
4999 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005000 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005001 ],
5002)
5003
Marat Dukhan08c4a432019-10-03 09:29:21 -07005004xnnpack_cc_library(
5005 name = "im2col",
5006 srcs = ["src/im2col.c"],
5007 hdrs = [
5008 "src/xnnpack/common.h",
5009 "src/xnnpack/im2col.h",
5010 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005011 gcc_copts = xnnpack_gcc_std_copts(),
5012 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005013)
5014
5015xnnpack_cc_library(
5016 name = "indirection",
5017 srcs = ["src/indirection.c"],
5018 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005019 gcc_copts = xnnpack_gcc_std_copts(),
5020 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005021 deps = [
5022 "@FP16",
5023 "@FXdiv",
5024 "@pthreadpool",
5025 ],
5026)
5027
5028xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005029 name = "indirection_test_mode",
5030 srcs = ["src/indirection.c"],
5031 hdrs = INTERNAL_HDRS,
5032 copts = [
5033 "-UNDEBUG",
5034 "-DXNN_TEST_MODE=1",
5035 ],
5036 gcc_copts = xnnpack_gcc_std_copts(),
5037 msvc_copts = xnnpack_msvc_std_copts(),
5038 deps = [
5039 "@FP16",
5040 "@FXdiv",
5041 "@pthreadpool",
5042 ],
5043)
5044
5045xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005046 name = "packing",
5047 srcs = ["src/packing.c"],
5048 hdrs = INTERNAL_HDRS,
5049 gcc_copts = xnnpack_gcc_std_copts(),
5050 msvc_copts = xnnpack_msvc_std_copts(),
5051 deps = [
5052 "@FP16",
5053 "@FXdiv",
5054 "@pthreadpool",
5055 ],
5056)
5057
5058xnnpack_cc_library(
5059 name = "packing_test_mode",
5060 srcs = ["src/packing.c"],
5061 hdrs = INTERNAL_HDRS,
5062 copts = [
5063 "-UNDEBUG",
5064 "-DXNN_TEST_MODE=1",
5065 ],
5066 gcc_copts = xnnpack_gcc_std_copts(),
5067 msvc_copts = xnnpack_msvc_std_copts(),
5068 deps = [
5069 "@FP16",
5070 "@FXdiv",
5071 "@pthreadpool",
5072 ],
5073)
5074
5075xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005076 name = "operator_run",
5077 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005078 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005079 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005080 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5081 "//conditions:default": [],
5082 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005083 gcc_copts = xnnpack_gcc_std_copts(),
5084 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005085 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005086 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005087 "@FP16",
5088 "@FXdiv",
5089 "@clog",
5090 "@pthreadpool",
5091 ],
5092)
5093
Chao Mei6ddfc602020-05-13 22:29:36 -07005094xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005095 name = "operator_run_test_mode",
5096 srcs = ["src/operator-run.c"],
5097 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5098 copts = LOGGING_COPTS + [
5099 "-UNDEBUG",
5100 "-DXNN_TEST_MODE=1",
5101 ] + select({
5102 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5103 "//conditions:default": [],
5104 }),
5105 gcc_copts = xnnpack_gcc_std_copts(),
5106 msvc_copts = xnnpack_msvc_std_copts(),
5107 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005108 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005109 "@FP16",
5110 "@FXdiv",
5111 "@clog",
5112 "@pthreadpool",
5113 ],
5114)
5115
5116xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005117 name = "memory_planner",
5118 srcs = ["src/memory-planner.c"],
5119 hdrs = INTERNAL_HDRS,
5120 defines = select({
5121 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5122 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5123 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5124 }),
5125 gcc_copts = xnnpack_gcc_std_copts(),
5126 msvc_copts = xnnpack_msvc_std_copts(),
5127 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005128 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005129 "@pthreadpool",
5130 ],
5131)
5132
Marat Dukhan33fcf782020-05-24 14:27:15 -07005133xnnpack_cc_library(
5134 name = "memory_planner_test_mode",
5135 srcs = ["src/memory-planner.c"],
5136 hdrs = INTERNAL_HDRS,
5137 copts = [
5138 "-UNDEBUG",
5139 "-DXNN_TEST_MODE=1",
5140 ],
5141 defines = select({
5142 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5143 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5144 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5145 }),
5146 gcc_copts = xnnpack_gcc_std_copts(),
5147 msvc_copts = xnnpack_msvc_std_copts(),
5148 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005149 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005150 "@pthreadpool",
5151 ],
5152)
5153
Marat Dukhan08c4a432019-10-03 09:29:21 -07005154cc_library(
5155 name = "enable_assembly",
5156 defines = select({
5157 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5158 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005159 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005160 }),
5161)
5162
Marat Dukhan9de90e02020-06-18 16:04:12 -07005163cc_library(
5164 name = "enable_sparse",
5165 defines = select({
5166 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5167 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005168 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005169 }),
5170)
5171
Marat Dukhancf056b22019-10-07 10:26:29 -07005172xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005173 name = "operators",
5174 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005175 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005176 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005177 ],
5178 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005179 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005180 "-Isrc",
5181 "-Iinclude",
5182 ] + select({
5183 ":debug_build": [],
5184 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005185 }) + select({
5186 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5187 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005188 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005189 gcc_copts = xnnpack_gcc_std_copts(),
5190 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005191 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005192 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005193 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005194 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005195 "@FP16",
5196 "@FXdiv",
5197 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005198 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005199 ],
5200)
5201
Marat Dukhan10a38082020-04-17 03:58:35 -07005202xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005203 name = "operators_test_mode",
5204 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005205 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005206 "src/operator-delete.c",
5207 ],
5208 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5209 copts = LOGGING_COPTS + [
5210 "-Isrc",
5211 "-Iinclude",
5212 "-UNDEBUG",
5213 "-DXNN_TEST_MODE=1",
5214 ] + select({
5215 ":debug_build": [],
5216 "//conditions:default": xnnpack_min_size_copts(),
5217 }) + select({
5218 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5219 "//conditions:default": [],
5220 }),
5221 gcc_copts = xnnpack_gcc_std_copts(),
5222 msvc_copts = xnnpack_msvc_std_copts(),
5223 deps = [
5224 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005225 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005226 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005227 "@FP16",
5228 "@FXdiv",
5229 "@clog",
5230 "@pthreadpool",
5231 ],
5232)
5233
5234xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005235 name = "XNNPACK",
5236 srcs = [
5237 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005238 "src/runtime.c",
5239 "src/subgraph.c",
5240 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005241 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005242 hdrs = ["include/xnnpack.h"],
5243 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005244 "-Isrc",
5245 "-Iinclude",
5246 ] + select({
5247 ":debug_build": [],
5248 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005249 }) + select({
5250 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5251 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005252 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005253 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005254 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005255 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005256 visibility = xnnpack_visibility(),
5257 deps = [
5258 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005259 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005260 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005261 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005262 ":operator_run",
5263 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005264 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005265 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005266 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005267 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005268 ] + select({
5269 ":emscripten": [],
5270 "//conditions:default": ["@cpuinfo"],
5271 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005272)
5273
Marat Dukhan10a38082020-04-17 03:58:35 -07005274xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005275 name = "XNNPACK_test_mode",
5276 srcs = [
5277 "src/init.c",
5278 "src/runtime.c",
5279 "src/subgraph.c",
5280 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005281 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005282 hdrs = ["include/xnnpack.h"],
5283 copts = LOGGING_COPTS + [
5284 "-Isrc",
5285 "-Iinclude",
5286 "-UNDEBUG",
5287 "-DXNN_TEST_MODE=1",
5288 ] + select({
5289 ":debug_build": [],
5290 "//conditions:default": xnnpack_min_size_copts(),
5291 }) + select({
5292 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5293 "//conditions:default": [],
5294 }),
5295 gcc_copts = xnnpack_gcc_std_copts(),
5296 includes = ["include"],
5297 msvc_copts = xnnpack_msvc_std_copts(),
5298 visibility = xnnpack_visibility(),
5299 deps = [
5300 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005301 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005302 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005303 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005304 ":operator_run_test_mode",
5305 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005306 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005307 "@clog",
5308 "@FP16",
5309 "@pthreadpool",
5310 ] + select({
5311 ":emscripten": [],
5312 "//conditions:default": ["@cpuinfo"],
5313 }),
5314)
5315
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005316# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5317# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005318xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005319 name = "xnnpack_for_tflite",
5320 srcs = [
5321 "src/init.c",
5322 "src/runtime.c",
5323 "src/subgraph.c",
5324 "src/tensor.c",
5325 ] + SUBGRAPH_SRCS,
5326 hdrs = ["include/xnnpack.h"],
5327 copts = LOGGING_COPTS + [
5328 "-Isrc",
5329 "-Iinclude",
5330 ] + select({
5331 ":debug_build": [],
5332 "//conditions:default": xnnpack_min_size_copts(),
5333 }) + select({
5334 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5335 "//conditions:default": [],
5336 }),
5337 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005338 "XNN_NO_QU8_OPERATORS",
5339 "XNN_NO_U8_OPERATORS",
5340 "XNN_NO_X8_OPERATORS",
5341 "XNN_NO_F16_OPERATORS",
5342 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005343 ] + select({
5344 ":xnn_enable_qs8_explicit_true": [],
5345 ":xnn_enable_qs8_explicit_false": ["XNN_NO_QS8_OPERATORS"],
5346 "//conditions:default": ["XNN_NO_QS8_OPERATORS"],
5347 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005348 gcc_copts = xnnpack_gcc_std_copts(),
5349 includes = ["include"],
5350 msvc_copts = xnnpack_msvc_std_copts(),
5351 visibility = xnnpack_visibility(),
5352 deps = [
5353 ":enable_assembly",
5354 ":enable_sparse",
5355 ":logging_utils",
5356 ":memory_planner",
5357 ":operator_run",
5358 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005359 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005360 "@clog",
5361 "@FP16",
5362 "@pthreadpool",
5363 ] + select({
5364 ":emscripten": [],
5365 "//conditions:default": ["@cpuinfo"],
5366 }),
5367)
5368
5369# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5370# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5371xnnpack_cc_library(
5372 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005373 srcs = [
5374 "src/init.c",
5375 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005376 hdrs = ["include/xnnpack.h"],
5377 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005378 "-Isrc",
5379 "-Iinclude",
5380 ] + select({
5381 ":debug_build": [],
5382 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005383 }) + select({
5384 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5385 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005386 }),
5387 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005388 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005389 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005390 "XNN_NO_U8_OPERATORS",
5391 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005392 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005393 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005394 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005395 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005396 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005397 visibility = xnnpack_visibility(),
5398 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005399 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005400 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005401 ":operator_run",
5402 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005403 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005404 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005405 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005406 ] + select({
5407 ":emscripten": [],
5408 "//conditions:default": ["@cpuinfo"],
5409 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005410)
5411
Marat Dukhancf056b22019-10-07 10:26:29 -07005412xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005413 name = "bench_utils",
5414 srcs = ["bench/utils.cc"],
5415 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005416 deps = [
5417 "@com_google_benchmark//:benchmark",
5418 "@cpuinfo",
5419 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005420)
5421
Frank Barchard7e955972019-10-11 10:34:25 -07005422######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005423
5424xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005425 name = "qs8_gemm_bench",
5426 srcs = [
5427 "bench/gemm.h",
5428 "bench/qs8-gemm.cc",
5429 "src/xnnpack/AlignedAllocator.h",
5430 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005431 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5432 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005433)
5434
5435xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005436 name = "qs8_requantization_bench",
5437 srcs = [
5438 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005439 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005440 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005441 ] + MICROKERNEL_BENCHMARK_HDRS,
5442 deps = MICROKERNEL_BENCHMARK_DEPS,
5443)
5444
5445xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005446 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005447 srcs = [
5448 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005449 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005450 "src/xnnpack/AlignedAllocator.h",
5451 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005452 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005453 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005454)
5455
5456xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005457 name = "qu8_requantization_bench",
5458 srcs = [
5459 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005460 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005461 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005462 ] + MICROKERNEL_BENCHMARK_HDRS,
5463 deps = MICROKERNEL_BENCHMARK_DEPS,
5464)
5465
5466xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005467 name = "f16_igemm_bench",
5468 srcs = [
5469 "bench/f16-igemm.cc",
5470 "bench/conv.h",
5471 "bench/google/conv.h",
5472 "src/xnnpack/AlignedAllocator.h",
5473 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005474 deps = MICROKERNEL_BENCHMARK_DEPS + [
5475 ":indirection",
5476 ":packing",
5477 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005478)
5479
5480xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005481 name = "f16_gemm_bench",
5482 srcs = [
5483 "bench/f16-gemm.cc",
5484 "bench/gemm.h",
5485 "src/xnnpack/AlignedAllocator.h",
5486 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005487 deps = MICROKERNEL_BENCHMARK_DEPS + [
5488 ":packing",
5489 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005490)
5491
5492xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005493 name = "f16_spmm_bench",
5494 srcs = [
5495 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005496 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005497 "src/xnnpack/AlignedAllocator.h",
5498 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005499 deps = MICROKERNEL_BENCHMARK_DEPS,
5500)
5501
5502xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005503 name = "f16_vrelu_bench",
5504 srcs = [
5505 "bench/f16-vrelu.cc",
5506 "src/xnnpack/AlignedAllocator.h",
5507 ] + MICROKERNEL_BENCHMARK_HDRS,
5508 deps = MICROKERNEL_BENCHMARK_DEPS,
5509)
5510
5511xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005512 name = "f32_igemm_bench",
5513 srcs = [
5514 "bench/f32-igemm.cc",
5515 "bench/conv.h",
5516 "src/xnnpack/AlignedAllocator.h",
5517 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005518 deps = MICROKERNEL_BENCHMARK_DEPS + [
5519 ":indirection",
5520 ":packing",
5521 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005522)
5523
5524xnnpack_benchmark(
5525 name = "f32_conv_hwc_bench",
5526 srcs = [
5527 "bench/f32-conv-hwc.cc",
5528 "bench/dconv.h",
5529 "src/xnnpack/AlignedAllocator.h",
5530 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005531 deps = MICROKERNEL_BENCHMARK_DEPS + [
5532 ":packing",
5533 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005534)
5535
5536xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005537 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005538 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005539 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005540 "bench/dconv.h",
5541 "src/xnnpack/AlignedAllocator.h",
5542 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005543 deps = MICROKERNEL_BENCHMARK_DEPS + [
5544 ":packing",
5545 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005546)
5547
5548xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005549 name = "f16_dwconv_bench",
5550 srcs = [
5551 "bench/f16-dwconv.cc",
5552 "bench/dwconv.h",
5553 "bench/google/dwconv.h",
5554 "src/xnnpack/AlignedAllocator.h",
5555 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005556 deps = MICROKERNEL_BENCHMARK_DEPS + [
5557 ":indirection",
5558 ":packing",
5559 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005560)
5561
5562xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005563 name = "f32_dwconv_bench",
5564 srcs = [
5565 "bench/f32-dwconv.cc",
5566 "bench/dwconv.h",
5567 "src/xnnpack/AlignedAllocator.h",
5568 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005569 deps = MICROKERNEL_BENCHMARK_DEPS + [
5570 ":indirection",
5571 ":packing",
5572 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005573)
5574
5575xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005576 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005577 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005578 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005579 "bench/dwconv.h",
5580 "src/xnnpack/AlignedAllocator.h",
5581 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005582 deps = MICROKERNEL_BENCHMARK_DEPS + [
5583 ":indirection",
5584 ":packing",
5585 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005586)
5587
5588xnnpack_benchmark(
5589 name = "f32_gemm_bench",
5590 srcs = [
5591 "bench/f32-gemm.cc",
5592 "bench/gemm.h",
5593 "src/xnnpack/AlignedAllocator.h",
5594 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005595 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005596 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005597)
5598
5599xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005600 name = "f32_raddexpminusmax_bench",
5601 srcs = [
5602 "bench/f32-raddexpminusmax.cc",
5603 "src/xnnpack/AlignedAllocator.h",
5604 ] + MICROKERNEL_BENCHMARK_HDRS,
5605 deps = MICROKERNEL_BENCHMARK_DEPS,
5606)
5607
5608xnnpack_benchmark(
5609 name = "f32_raddextexp_bench",
5610 srcs = [
5611 "bench/f32-raddextexp.cc",
5612 "src/xnnpack/AlignedAllocator.h",
5613 ] + MICROKERNEL_BENCHMARK_HDRS,
5614 deps = MICROKERNEL_BENCHMARK_DEPS,
5615)
5616
5617xnnpack_benchmark(
5618 name = "f32_raddstoreexpminusmax_bench",
5619 srcs = [
5620 "bench/f32-raddstoreexpminusmax.cc",
5621 "src/xnnpack/AlignedAllocator.h",
5622 ] + MICROKERNEL_BENCHMARK_HDRS,
5623 deps = MICROKERNEL_BENCHMARK_DEPS,
5624)
5625
5626xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005627 name = "f32_rmax_bench",
5628 srcs = [
5629 "bench/f32-rmax.cc",
5630 "src/xnnpack/AlignedAllocator.h",
5631 ] + MICROKERNEL_BENCHMARK_HDRS,
5632 deps = MICROKERNEL_BENCHMARK_DEPS,
5633)
5634
5635xnnpack_benchmark(
5636 name = "f32_spmm_bench",
5637 srcs = [
5638 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005639 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005640 "src/xnnpack/AlignedAllocator.h",
5641 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005642 deps = MICROKERNEL_BENCHMARK_DEPS,
5643)
5644
5645xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005646 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005647 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005648 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005649 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005650 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08005651 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005652)
5653
5654xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005655 name = "f32_velu_bench",
5656 srcs = [
5657 "bench/f32-velu.cc",
5658 "src/xnnpack/AlignedAllocator.h",
5659 ] + MICROKERNEL_BENCHMARK_HDRS,
5660 deps = MICROKERNEL_BENCHMARK_DEPS,
5661)
5662
5663xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005664 name = "f32_vhswish_bench",
5665 srcs = [
5666 "bench/f32-vhswish.cc",
5667 "src/xnnpack/AlignedAllocator.h",
5668 ] + MICROKERNEL_BENCHMARK_HDRS,
5669 deps = MICROKERNEL_BENCHMARK_DEPS,
5670)
5671
5672xnnpack_benchmark(
5673 name = "f32_vrelu_bench",
5674 srcs = [
5675 "bench/f32-vrelu.cc",
5676 "src/xnnpack/AlignedAllocator.h",
5677 ] + MICROKERNEL_BENCHMARK_HDRS,
5678 deps = MICROKERNEL_BENCHMARK_DEPS,
5679)
5680
5681xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005682 name = "f32_vscaleexpminusmax_bench",
5683 srcs = [
5684 "bench/f32-vscaleexpminusmax.cc",
5685 "src/xnnpack/AlignedAllocator.h",
5686 ] + MICROKERNEL_BENCHMARK_HDRS,
5687 deps = MICROKERNEL_BENCHMARK_DEPS,
5688)
5689
5690xnnpack_benchmark(
5691 name = "f32_vscaleextexp_bench",
5692 srcs = [
5693 "bench/f32-vscaleextexp.cc",
5694 "src/xnnpack/AlignedAllocator.h",
5695 ] + MICROKERNEL_BENCHMARK_HDRS,
5696 deps = MICROKERNEL_BENCHMARK_DEPS,
5697)
5698
5699xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005700 name = "f32_vsigmoid_bench",
5701 srcs = [
5702 "bench/f32-vsigmoid.cc",
5703 "src/xnnpack/AlignedAllocator.h",
5704 ] + MICROKERNEL_BENCHMARK_HDRS,
5705 deps = MICROKERNEL_BENCHMARK_DEPS,
5706)
5707
5708xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005709 name = "f32_vsqrt_bench",
5710 srcs = [
5711 "bench/f32-vsqrt.cc",
5712 "src/xnnpack/AlignedAllocator.h",
5713 ] + MICROKERNEL_BENCHMARK_HDRS,
5714 deps = MICROKERNEL_BENCHMARK_DEPS,
5715)
5716
5717xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005718 name = "f32_im2col_gemm_bench",
5719 srcs = [
5720 "bench/f32-im2col-gemm.cc",
5721 "bench/conv.h",
5722 "src/xnnpack/AlignedAllocator.h",
5723 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005724 deps = MICROKERNEL_BENCHMARK_DEPS + [
5725 ":im2col",
5726 ":packing",
5727 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005728)
5729
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005730xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005731 name = "rounding_bench",
5732 srcs = [
5733 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005734 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005735 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005736 ] + MICROKERNEL_BENCHMARK_HDRS,
5737 deps = MICROKERNEL_BENCHMARK_DEPS,
5738)
5739
Marat Dukhan08c4a432019-10-03 09:29:21 -07005740########################### Benchmarks for operators ###########################
5741
5742xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005743 name = "average_pooling_bench",
5744 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07005745 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005746 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005747 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005748)
5749
5750xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005751 name = "bankers_rounding_bench",
5752 srcs = ["bench/bankers-rounding.cc"],
5753 copts = xnnpack_optional_tflite_copts(),
5754 tags = ["nowin32"],
5755 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5756)
5757
5758xnnpack_benchmark(
5759 name = "ceiling_bench",
5760 srcs = ["bench/ceiling.cc"],
5761 copts = xnnpack_optional_tflite_copts(),
5762 tags = ["nowin32"],
5763 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5764)
5765
5766xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005767 name = "channel_shuffle_bench",
5768 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005769 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005770)
5771
5772xnnpack_benchmark(
5773 name = "convolution_bench",
5774 srcs = ["bench/convolution.cc"],
5775 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005776 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005777 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005778)
5779
5780xnnpack_benchmark(
5781 name = "deconvolution_bench",
5782 srcs = ["bench/deconvolution.cc"],
5783 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005784 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005785 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005786)
5787
5788xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08005789 name = "elu_bench",
5790 srcs = ["bench/elu.cc"],
5791 copts = xnnpack_optional_tflite_copts(),
5792 tags = ["nowin32"],
5793 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5794)
5795
5796xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005797 name = "floor_bench",
5798 srcs = ["bench/floor.cc"],
5799 copts = xnnpack_optional_tflite_copts(),
5800 tags = ["nowin32"],
5801 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5802)
5803
5804xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005805 name = "global_average_pooling_bench",
5806 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005807 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005808)
5809
5810xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07005811 name = "hardswish_bench",
5812 srcs = ["bench/hardswish.cc"],
5813 copts = xnnpack_optional_tflite_copts(),
5814 tags = ["nowin32"],
5815 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5816)
5817
5818xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005819 name = "max_pooling_bench",
5820 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005821 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005822)
5823
5824xnnpack_benchmark(
5825 name = "sigmoid_bench",
5826 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08005827 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005828 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005829 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005830)
5831
5832xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07005833 name = "prelu_bench",
5834 srcs = ["bench/prelu.cc"],
5835 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005836 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005837 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07005838)
5839
5840xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005841 name = "softmax_bench",
5842 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08005843 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005844 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005845 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005846)
5847
Marat Dukhan87727142020-06-24 15:24:10 -07005848xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07005849 name = "square_root_bench",
5850 srcs = ["bench/square-root.cc"],
5851 copts = xnnpack_optional_tflite_copts(),
5852 tags = ["nowin32"],
5853 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5854)
5855
5856xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005857 name = "truncation_bench",
5858 srcs = ["bench/truncation.cc"],
5859 deps = OPERATOR_BENCHMARK_DEPS,
5860)
5861
Marat Dukhanc068bb62019-10-04 13:24:39 -07005862############################# End-to-end benchmarks ############################
5863
5864cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005865 name = "fp32_mobilenet_v1",
5866 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005867 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005868 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005869 linkstatic = True,
5870 deps = [
5871 ":XNNPACK",
5872 "@pthreadpool",
5873 ],
5874)
5875
5876cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005877 name = "fp32_sparse_mobilenet_v1",
5878 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
5879 hdrs = ["models/models.h"],
5880 copts = xnnpack_std_cxxopts(),
5881 linkstatic = True,
5882 deps = [
5883 ":XNNPACK",
5884 "@pthreadpool",
5885 ],
5886)
5887
5888cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005889 name = "fp16_mobilenet_v1",
5890 srcs = ["models/fp16-mobilenet-v1.cc"],
5891 hdrs = ["models/models.h"],
5892 copts = xnnpack_std_cxxopts(),
5893 linkstatic = True,
5894 deps = [
5895 ":XNNPACK",
5896 "@FP16",
5897 "@pthreadpool",
5898 ],
5899)
5900
5901cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005902 name = "qs8_mobilenet_v1",
5903 srcs = ["models/qs8-mobilenet-v1.cc"],
5904 hdrs = ["models/models.h"],
5905 copts = xnnpack_std_cxxopts(),
5906 linkstatic = True,
5907 deps = [
5908 ":XNNPACK",
5909 "@pthreadpool",
5910 ],
5911)
5912
5913cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07005914 name = "qs8_mobilenet_v2",
5915 srcs = ["models/qs8-mobilenet-v2.cc"],
5916 hdrs = ["models/models.h"],
5917 copts = xnnpack_std_cxxopts(),
5918 linkstatic = True,
5919 deps = [
5920 ":XNNPACK",
5921 "@pthreadpool",
5922 ],
5923)
5924
5925cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005926 name = "qu8_mobilenet_v1",
5927 srcs = ["models/qu8-mobilenet-v1.cc"],
5928 hdrs = ["models/models.h"],
5929 copts = xnnpack_std_cxxopts(),
5930 linkstatic = True,
5931 deps = [
5932 ":XNNPACK",
5933 "@pthreadpool",
5934 ],
5935)
5936
5937cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005938 name = "fp32_mobilenet_v2",
5939 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005940 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005941 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005942 linkstatic = True,
5943 deps = [
5944 ":XNNPACK",
5945 "@pthreadpool",
5946 ],
5947)
5948
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005949cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005950 name = "fp32_sparse_mobilenet_v2",
5951 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
5952 hdrs = ["models/models.h"],
5953 copts = xnnpack_std_cxxopts(),
5954 linkstatic = True,
5955 deps = [
5956 ":XNNPACK",
5957 "@pthreadpool",
5958 ],
5959)
5960
5961cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005962 name = "fp16_mobilenet_v2",
5963 srcs = ["models/fp16-mobilenet-v2.cc"],
5964 hdrs = ["models/models.h"],
5965 copts = xnnpack_std_cxxopts(),
5966 linkstatic = True,
5967 deps = [
5968 ":XNNPACK",
5969 "@FP16",
5970 "@pthreadpool",
5971 ],
5972)
5973
5974cc_library(
5975 name = "fp32_mobilenet_v3_large",
5976 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005977 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005978 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005979 linkstatic = True,
5980 deps = [
5981 ":XNNPACK",
5982 "@pthreadpool",
5983 ],
5984)
5985
5986cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005987 name = "fp32_sparse_mobilenet_v3_large",
5988 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
5989 hdrs = ["models/models.h"],
5990 copts = xnnpack_std_cxxopts(),
5991 linkstatic = True,
5992 deps = [
5993 ":XNNPACK",
5994 "@pthreadpool",
5995 ],
5996)
5997
5998cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005999 name = "fp16_mobilenet_v3_large",
6000 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6001 hdrs = ["models/models.h"],
6002 copts = xnnpack_std_cxxopts(),
6003 linkstatic = True,
6004 deps = [
6005 ":XNNPACK",
6006 "@FP16",
6007 "@pthreadpool",
6008 ],
6009)
6010
6011cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006012 name = "fp32_mobilenet_v3_small",
6013 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006014 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006015 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006016 linkstatic = True,
6017 deps = [
6018 ":XNNPACK",
6019 "@pthreadpool",
6020 ],
6021)
6022
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006023cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006024 name = "fp32_sparse_mobilenet_v3_small",
6025 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6026 hdrs = ["models/models.h"],
6027 copts = xnnpack_std_cxxopts(),
6028 linkstatic = True,
6029 deps = [
6030 ":XNNPACK",
6031 "@pthreadpool",
6032 ],
6033)
6034
6035cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006036 name = "fp16_mobilenet_v3_small",
6037 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6038 hdrs = ["models/models.h"],
6039 copts = xnnpack_std_cxxopts(),
6040 linkstatic = True,
6041 deps = [
6042 ":XNNPACK",
6043 "@FP16",
6044 "@pthreadpool",
6045 ],
6046)
6047
Marat Dukhanc068bb62019-10-04 13:24:39 -07006048xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006049 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006050 srcs = [
6051 "bench/f32-dwconv-e2e.cc",
6052 "bench/end2end.h",
6053 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006054 deps = MICROKERNEL_BENCHMARK_DEPS + [
6055 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006056 ":fp32_mobilenet_v1",
6057 ":fp32_mobilenet_v2",
6058 ":fp32_mobilenet_v3_large",
6059 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006060 ],
6061)
6062
6063xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006064 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006065 srcs = [
6066 "bench/f32-gemm-e2e.cc",
6067 "bench/end2end.h",
6068 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006069 deps = MICROKERNEL_BENCHMARK_DEPS + [
6070 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006071 ":fp32_mobilenet_v1",
6072 ":fp32_mobilenet_v2",
6073 ":fp32_mobilenet_v3_large",
6074 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006075 ],
6076)
6077
6078xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006079 name = "qs8_gemm_e2e_bench",
6080 srcs = [
6081 "bench/qs8-gemm-e2e.cc",
6082 "bench/end2end.h",
6083 ] + MICROKERNEL_BENCHMARK_HDRS,
6084 deps = MICROKERNEL_BENCHMARK_DEPS + [
6085 ":XNNPACK",
6086 ":qs8_mobilenet_v1",
6087 ":qs8_mobilenet_v2",
6088 ],
6089)
6090
6091xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006092 name = "end2end_bench",
6093 srcs = ["bench/end2end.cc"],
6094 deps = [
6095 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006096 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006097 ":fp16_mobilenet_v1",
6098 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006099 ":fp16_mobilenet_v3_large",
6100 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006101 ":fp32_mobilenet_v1",
6102 ":fp32_mobilenet_v2",
6103 ":fp32_mobilenet_v3_large",
6104 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006105 ":fp32_sparse_mobilenet_v1",
6106 ":fp32_sparse_mobilenet_v2",
6107 ":fp32_sparse_mobilenet_v3_large",
6108 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006109 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006110 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006111 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006112 "@pthreadpool",
6113 ],
6114)
6115
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006116#################### Accuracy evaluation for math functions ####################
6117
6118xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006119 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006120 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006121 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006122 "src/xnnpack/AlignedAllocator.h",
6123 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006124 deps = ACCURACY_EVAL_DEPS + [
6125 ":bench_utils",
6126 "@cpuinfo",
6127 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006128)
6129
Marat Dukhan515c9772019-10-17 18:07:57 -07006130xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006131 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006132 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006133 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006134 "src/xnnpack/AlignedAllocator.h",
6135 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006136 deps = ACCURACY_EVAL_DEPS + [
6137 ":bench_utils",
6138 "@cpuinfo",
6139 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006140)
6141
Marat Dukhan98ba4412019-10-23 02:14:28 -07006142xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006143 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006144 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006145 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006146 "src/xnnpack/AlignedAllocator.h",
6147 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006148 deps = ACCURACY_EVAL_DEPS + [
6149 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006150 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006151 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006152)
6153
6154xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006155 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006156 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006157 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006158 "src/xnnpack/AlignedAllocator.h",
6159 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006160 deps = ACCURACY_EVAL_DEPS + [
6161 ":bench_utils",
6162 "@cpuinfo",
6163 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006164)
6165
Marat Dukhanf44f0222020-12-14 11:53:27 -08006166xnnpack_benchmark(
6167 name = "f32_sigmoid_ulp_eval",
6168 srcs = [
6169 "eval/f32-sigmoid-ulp.cc",
6170 "src/xnnpack/AlignedAllocator.h",
6171 ] + ACCURACY_EVAL_HDRS,
6172 deps = ACCURACY_EVAL_DEPS + [
6173 ":bench_utils",
6174 "@cpuinfo",
6175 ],
6176)
6177
6178xnnpack_benchmark(
6179 name = "f32_sqrt_ulp_eval",
6180 srcs = [
6181 "eval/f32-sqrt-ulp.cc",
6182 "src/xnnpack/AlignedAllocator.h",
6183 ] + ACCURACY_EVAL_HDRS,
6184 deps = ACCURACY_EVAL_DEPS + [
6185 ":bench_utils",
6186 "@cpuinfo",
6187 ],
6188)
6189
6190################### Accuracy verification for math functions ##################
6191
6192xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006193 name = "f32_exp_eval",
6194 srcs = [
6195 "eval/f32-exp.cc",
6196 "src/xnnpack/AlignedAllocator.h",
6197 "src/xnnpack/math-stubs.h",
6198 ] + MICROKERNEL_TEST_HDRS,
6199 automatic = False,
6200 deps = MICROKERNEL_TEST_DEPS,
6201)
6202
6203xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006204 name = "f32_expm1minus_eval",
6205 srcs = [
6206 "eval/f32-expm1minus.cc",
6207 "src/xnnpack/AlignedAllocator.h",
6208 "src/xnnpack/math-stubs.h",
6209 ] + MICROKERNEL_TEST_HDRS,
6210 automatic = False,
6211 deps = MICROKERNEL_TEST_DEPS,
6212)
6213
Marat Dukhan8853b822020-05-07 12:19:01 -07006214xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006215 name = "f32_expminus_eval",
6216 srcs = [
6217 "eval/f32-expminus.cc",
6218 "src/xnnpack/AlignedAllocator.h",
6219 "src/xnnpack/math-stubs.h",
6220 ] + MICROKERNEL_TEST_HDRS,
6221 automatic = False,
6222 deps = MICROKERNEL_TEST_DEPS,
6223)
6224
6225xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006226 name = "f32_roundne_eval",
6227 srcs = [
6228 "eval/f32-roundne.cc",
6229 "src/xnnpack/AlignedAllocator.h",
6230 "src/xnnpack/math-stubs.h",
6231 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006232 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006233 deps = MICROKERNEL_TEST_DEPS,
6234)
6235
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006236xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006237 name = "f32_roundd_eval",
6238 srcs = [
6239 "eval/f32-roundd.cc",
6240 "src/xnnpack/AlignedAllocator.h",
6241 "src/xnnpack/math-stubs.h",
6242 ] + MICROKERNEL_TEST_HDRS,
6243 automatic = False,
6244 deps = MICROKERNEL_TEST_DEPS,
6245)
6246
6247xnnpack_unit_test(
6248 name = "f32_roundu_eval",
6249 srcs = [
6250 "eval/f32-roundu.cc",
6251 "src/xnnpack/AlignedAllocator.h",
6252 "src/xnnpack/math-stubs.h",
6253 ] + MICROKERNEL_TEST_HDRS,
6254 automatic = False,
6255 deps = MICROKERNEL_TEST_DEPS,
6256)
6257
6258xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006259 name = "f32_roundz_eval",
6260 srcs = [
6261 "eval/f32-roundz.cc",
6262 "src/xnnpack/AlignedAllocator.h",
6263 "src/xnnpack/math-stubs.h",
6264 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006265 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006266 deps = MICROKERNEL_TEST_DEPS,
6267)
6268
Marat Dukhan08c4a432019-10-03 09:29:21 -07006269######################### Unit tests for micro-kernels #########################
6270
6271xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006272 name = "f16_dwconv_minmax_test",
6273 srcs = [
6274 "test/f16-dwconv-minmax.cc",
6275 "test/dwconv-microkernel-tester.h",
6276 "src/xnnpack/AlignedAllocator.h",
6277 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6278 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6279)
6280
6281xnnpack_unit_test(
6282 name = "f16_gavgpool_minmax_test",
6283 srcs = [
6284 "test/f16-gavgpool-minmax.cc",
6285 "test/gavgpool-microkernel-tester.h",
6286 "src/xnnpack/AlignedAllocator.h",
6287 ] + MICROKERNEL_TEST_HDRS,
6288 deps = MICROKERNEL_TEST_DEPS,
6289)
6290
6291xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006292 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006293 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006294 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006295 "test/gemm-microkernel-tester.h",
6296 "src/xnnpack/AlignedAllocator.h",
6297 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006298 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006299)
6300
6301xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006302 name = "f16_igemm_minmax_test",
6303 srcs = [
6304 "test/f16-igemm-minmax.cc",
6305 "test/gemm-microkernel-tester.h",
6306 "src/xnnpack/AlignedAllocator.h",
6307 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6308 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6309)
6310
6311xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006312 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006313 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006314 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006315 "test/spmm-microkernel-tester.h",
6316 "src/xnnpack/AlignedAllocator.h",
6317 ] + MICROKERNEL_TEST_HDRS,
6318 deps = MICROKERNEL_TEST_DEPS,
6319)
6320
6321xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006322 name = "f16_vadd_minmax_test",
6323 srcs = [
6324 "test/f16-vadd-minmax.cc",
6325 "test/vbinary-microkernel-tester.h",
6326 ] + MICROKERNEL_TEST_HDRS,
6327 deps = MICROKERNEL_TEST_DEPS,
6328)
6329
6330xnnpack_unit_test(
6331 name = "f16_vaddc_minmax_test",
6332 srcs = [
6333 "test/f16-vaddc-minmax.cc",
6334 "test/vbinaryc-microkernel-tester.h",
6335 ] + MICROKERNEL_TEST_HDRS,
6336 deps = MICROKERNEL_TEST_DEPS,
6337)
6338
6339xnnpack_unit_test(
6340 name = "f16_vclamp_test",
6341 srcs = [
6342 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006343 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006344 ] + MICROKERNEL_TEST_HDRS,
6345 deps = MICROKERNEL_TEST_DEPS,
6346)
6347
6348xnnpack_unit_test(
6349 name = "f16_vdiv_minmax_test",
6350 srcs = [
6351 "test/f16-vdiv-minmax.cc",
6352 "test/vbinary-microkernel-tester.h",
6353 ] + MICROKERNEL_TEST_HDRS,
6354 deps = MICROKERNEL_TEST_DEPS,
6355)
6356
6357xnnpack_unit_test(
6358 name = "f16_vdivc_minmax_test",
6359 srcs = [
6360 "test/f16-vdivc-minmax.cc",
6361 "test/vbinaryc-microkernel-tester.h",
6362 ] + MICROKERNEL_TEST_HDRS,
6363 deps = MICROKERNEL_TEST_DEPS,
6364)
6365
6366xnnpack_unit_test(
6367 name = "f16_vrdivc_minmax_test",
6368 srcs = [
6369 "test/f16-vrdivc-minmax.cc",
6370 "test/vbinaryc-microkernel-tester.h",
6371 ] + MICROKERNEL_TEST_HDRS,
6372 deps = MICROKERNEL_TEST_DEPS,
6373)
6374
6375xnnpack_unit_test(
6376 name = "f16_vhswish_test",
6377 srcs = [
6378 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006379 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006380 ] + MICROKERNEL_TEST_HDRS,
6381 deps = MICROKERNEL_TEST_DEPS,
6382)
6383
6384xnnpack_unit_test(
6385 name = "f16_vmax_test",
6386 srcs = [
6387 "test/f16-vmax.cc",
6388 "test/vbinary-microkernel-tester.h",
6389 ] + MICROKERNEL_TEST_HDRS,
6390 deps = MICROKERNEL_TEST_DEPS,
6391)
6392
6393xnnpack_unit_test(
6394 name = "f16_vmaxc_test",
6395 srcs = [
6396 "test/f16-vmaxc.cc",
6397 "test/vbinaryc-microkernel-tester.h",
6398 ] + MICROKERNEL_TEST_HDRS,
6399 deps = MICROKERNEL_TEST_DEPS,
6400)
6401
6402xnnpack_unit_test(
6403 name = "f16_vmin_test",
6404 srcs = [
6405 "test/f16-vmin.cc",
6406 "test/vbinary-microkernel-tester.h",
6407 ] + MICROKERNEL_TEST_HDRS,
6408 deps = MICROKERNEL_TEST_DEPS,
6409)
6410
6411xnnpack_unit_test(
6412 name = "f16_vminc_test",
6413 srcs = [
6414 "test/f16-vminc.cc",
6415 "test/vbinaryc-microkernel-tester.h",
6416 ] + MICROKERNEL_TEST_HDRS,
6417 deps = MICROKERNEL_TEST_DEPS,
6418)
6419
6420xnnpack_unit_test(
6421 name = "f16_vmul_minmax_test",
6422 srcs = [
6423 "test/f16-vmul-minmax.cc",
6424 "test/vbinary-microkernel-tester.h",
6425 ] + MICROKERNEL_TEST_HDRS,
6426 deps = MICROKERNEL_TEST_DEPS,
6427)
6428
6429xnnpack_unit_test(
6430 name = "f16_vmulc_minmax_test",
6431 srcs = [
6432 "test/f16-vmulc-minmax.cc",
6433 "test/vbinaryc-microkernel-tester.h",
6434 ] + MICROKERNEL_TEST_HDRS,
6435 deps = MICROKERNEL_TEST_DEPS,
6436)
6437
6438xnnpack_unit_test(
6439 name = "f16_vmulcaddc_minmax_test",
6440 srcs = [
6441 "test/f16-vmulcaddc-minmax.cc",
6442 "test/vmulcaddc-microkernel-tester.h",
6443 "src/xnnpack/AlignedAllocator.h",
6444 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6445 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6446)
6447
6448xnnpack_unit_test(
6449 name = "f16_vsub_minmax_test",
6450 srcs = [
6451 "test/f16-vsub-minmax.cc",
6452 "test/vbinary-microkernel-tester.h",
6453 ] + MICROKERNEL_TEST_HDRS,
6454 deps = MICROKERNEL_TEST_DEPS,
6455)
6456
6457xnnpack_unit_test(
6458 name = "f16_vsubc_minmax_test",
6459 srcs = [
6460 "test/f16-vsubc-minmax.cc",
6461 "test/vbinaryc-microkernel-tester.h",
6462 ] + MICROKERNEL_TEST_HDRS,
6463 deps = MICROKERNEL_TEST_DEPS,
6464)
6465
6466xnnpack_unit_test(
6467 name = "f16_vrsubc_minmax_test",
6468 srcs = [
6469 "test/f16-vrsubc-minmax.cc",
6470 "test/vbinaryc-microkernel-tester.h",
6471 ] + MICROKERNEL_TEST_HDRS,
6472 deps = MICROKERNEL_TEST_DEPS,
6473)
6474
6475xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006476 name = "f32_argmaxpool_test",
6477 srcs = [
6478 "test/f32-argmaxpool.cc",
6479 "test/argmaxpool-microkernel-tester.h",
6480 "src/xnnpack/AlignedAllocator.h",
6481 ] + MICROKERNEL_TEST_HDRS,
6482 deps = MICROKERNEL_TEST_DEPS,
6483)
6484
6485xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006486 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006487 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006488 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006489 "test/avgpool-microkernel-tester.h",
6490 "src/xnnpack/AlignedAllocator.h",
6491 ] + MICROKERNEL_TEST_HDRS,
6492 deps = MICROKERNEL_TEST_DEPS,
6493)
6494
6495xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006496 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006497 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006498 "test/f32-ibilinear.cc",
6499 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006500 "src/xnnpack/AlignedAllocator.h",
6501 ] + MICROKERNEL_TEST_HDRS,
6502 deps = MICROKERNEL_TEST_DEPS,
6503)
6504
6505xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006506 name = "f32_ibilinear_chw_test",
6507 srcs = [
6508 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006509 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006510 "src/xnnpack/AlignedAllocator.h",
6511 ] + MICROKERNEL_TEST_HDRS,
6512 deps = MICROKERNEL_TEST_DEPS,
6513)
6514
6515xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006516 name = "f32_igemm_test",
6517 srcs = [
6518 "test/f32-igemm.cc",
6519 "test/gemm-microkernel-tester.h",
6520 "src/xnnpack/AlignedAllocator.h",
6521 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006522 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006523)
6524
6525xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006526 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006527 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006528 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006529 "test/gemm-microkernel-tester.h",
6530 "src/xnnpack/AlignedAllocator.h",
6531 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006532 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006533)
6534
6535xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006536 name = "f32_igemm_minmax_test",
6537 srcs = [
6538 "test/f32-igemm-minmax.cc",
6539 "test/gemm-microkernel-tester.h",
6540 "src/xnnpack/AlignedAllocator.h",
6541 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006542 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006543)
6544
6545xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006546 name = "f32_conv_hwc_test",
6547 srcs = [
6548 "test/f32-conv-hwc.cc",
6549 "test/conv-hwc-microkernel-tester.h",
6550 "src/xnnpack/AlignedAllocator.h",
6551 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006552 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006553)
6554
6555xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006556 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006557 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006558 "test/f32-conv-hwc2chw.cc",
6559 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006560 "src/xnnpack/AlignedAllocator.h",
6561 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006562 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006563)
6564
6565xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006566 name = "f32_dwconv_test",
6567 srcs = [
6568 "test/f32-dwconv.cc",
6569 "test/dwconv-microkernel-tester.h",
6570 "src/xnnpack/AlignedAllocator.h",
6571 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006572 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006573)
6574
6575xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006576 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006577 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006578 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006579 "test/dwconv-microkernel-tester.h",
6580 "src/xnnpack/AlignedAllocator.h",
6581 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006582 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006583)
6584
6585xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006586 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006587 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006588 "test/f32-dwconv2d-chw.cc",
6589 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006590 "src/xnnpack/AlignedAllocator.h",
6591 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006592 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006593)
6594
6595xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006596 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006597 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006598 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006599 "test/gavgpool-microkernel-tester.h",
6600 "src/xnnpack/AlignedAllocator.h",
6601 ] + MICROKERNEL_TEST_HDRS,
6602 deps = MICROKERNEL_TEST_DEPS,
6603)
6604
6605xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006606 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006607 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006608 "test/f32-gavgpool-cw.cc",
6609 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006610 "src/xnnpack/AlignedAllocator.h",
6611 ] + MICROKERNEL_TEST_HDRS,
6612 deps = MICROKERNEL_TEST_DEPS,
6613)
6614
6615xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006616 name = "f32_gemm_test",
6617 srcs = [
6618 "test/f32-gemm.cc",
6619 "test/gemm-microkernel-tester.h",
6620 "src/xnnpack/AlignedAllocator.h",
6621 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006622 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006623)
6624
6625xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006626 name = "f32_gemm_relu_test",
6627 srcs = [
6628 "test/f32-gemm-relu.cc",
6629 "test/gemm-microkernel-tester.h",
6630 "src/xnnpack/AlignedAllocator.h",
6631 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006632 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07006633)
6634
6635xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006636 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006637 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006638 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006639 "test/gemm-microkernel-tester.h",
6640 "src/xnnpack/AlignedAllocator.h",
6641 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006642 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006643)
6644
6645xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006646 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006647 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006648 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006649 "test/gemm-microkernel-tester.h",
6650 "src/xnnpack/AlignedAllocator.h",
6651 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006652 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006653)
6654
6655xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006656 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07006657 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07006658 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07006659 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006660 ] + MICROKERNEL_TEST_HDRS,
6661 deps = MICROKERNEL_TEST_DEPS,
6662)
6663
6664xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006665 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006666 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006667 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006668 "test/maxpool-microkernel-tester.h",
6669 ] + MICROKERNEL_TEST_HDRS,
6670 deps = MICROKERNEL_TEST_DEPS,
6671)
6672
6673xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006674 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006675 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006676 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006677 "test/avgpool-microkernel-tester.h",
6678 "src/xnnpack/AlignedAllocator.h",
6679 ] + MICROKERNEL_TEST_HDRS,
6680 deps = MICROKERNEL_TEST_DEPS,
6681)
6682
6683xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006684 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006685 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006686 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006687 "test/gemm-microkernel-tester.h",
6688 "src/xnnpack/AlignedAllocator.h",
6689 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006690 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006691)
6692
6693xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07006694 name = "f16_prelu_test",
6695 srcs = [
6696 "test/f16-prelu.cc",
6697 "test/prelu-microkernel-tester.h",
6698 "src/xnnpack/AlignedAllocator.h",
6699 ] + MICROKERNEL_TEST_HDRS,
6700 deps = MICROKERNEL_TEST_DEPS,
6701)
6702
6703xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006704 name = "f32_prelu_test",
6705 srcs = [
6706 "test/f32-prelu.cc",
6707 "test/prelu-microkernel-tester.h",
6708 "src/xnnpack/AlignedAllocator.h",
6709 ] + MICROKERNEL_TEST_HDRS,
6710 deps = MICROKERNEL_TEST_DEPS,
6711)
6712
6713xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006714 name = "f32_raddexpminusmax_test",
6715 srcs = [
6716 "test/f32-raddexpminusmax.cc",
6717 "test/raddexpminusmax-microkernel-tester.h",
6718 ] + MICROKERNEL_TEST_HDRS,
6719 deps = MICROKERNEL_TEST_DEPS,
6720)
6721
6722xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006723 name = "f32_raddextexp_test",
6724 srcs = [
6725 "test/f32-raddextexp.cc",
6726 "test/raddextexp-microkernel-tester.h",
6727 ] + MICROKERNEL_TEST_HDRS,
6728 deps = MICROKERNEL_TEST_DEPS,
6729)
6730
6731xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006732 name = "f32_raddstoreexpminusmax_test",
6733 srcs = [
6734 "test/f32-raddstoreexpminusmax.cc",
6735 "test/raddstoreexpminusmax-microkernel-tester.h",
6736 ] + MICROKERNEL_TEST_HDRS,
6737 deps = MICROKERNEL_TEST_DEPS,
6738)
6739
6740xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006741 name = "f32_rmax_test",
6742 srcs = [
6743 "test/f32-rmax.cc",
6744 "test/rmax-microkernel-tester.h",
6745 ] + MICROKERNEL_TEST_HDRS,
6746 deps = MICROKERNEL_TEST_DEPS,
6747)
6748
6749xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006750 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006751 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006752 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006753 "test/spmm-microkernel-tester.h",
6754 "src/xnnpack/AlignedAllocator.h",
6755 ] + MICROKERNEL_TEST_HDRS,
6756 deps = MICROKERNEL_TEST_DEPS,
6757)
6758
6759xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006760 name = "f32_vabs_test",
6761 srcs = [
6762 "test/f32-vabs.cc",
6763 "test/vunary-microkernel-tester.h",
6764 ] + MICROKERNEL_TEST_HDRS,
6765 deps = MICROKERNEL_TEST_DEPS,
6766)
6767
6768xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006769 name = "f32_vadd_test",
6770 srcs = [
6771 "test/f32-vadd.cc",
6772 "test/vbinary-microkernel-tester.h",
6773 ] + MICROKERNEL_TEST_HDRS,
6774 deps = MICROKERNEL_TEST_DEPS,
6775)
6776
6777xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006778 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006779 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006780 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006781 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006782 ] + MICROKERNEL_TEST_HDRS,
6783 deps = MICROKERNEL_TEST_DEPS,
6784)
6785
6786xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006787 name = "f32_vadd_relu_test",
6788 srcs = [
6789 "test/f32-vadd-relu.cc",
6790 "test/vbinary-microkernel-tester.h",
6791 ] + MICROKERNEL_TEST_HDRS,
6792 deps = MICROKERNEL_TEST_DEPS,
6793)
6794
6795xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006796 name = "f32_vaddc_test",
6797 srcs = [
6798 "test/f32-vaddc.cc",
6799 "test/vbinaryc-microkernel-tester.h",
6800 ] + MICROKERNEL_TEST_HDRS,
6801 deps = MICROKERNEL_TEST_DEPS,
6802)
6803
6804xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006805 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006806 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006807 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006808 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006809 ] + MICROKERNEL_TEST_HDRS,
6810 deps = MICROKERNEL_TEST_DEPS,
6811)
6812
6813xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006814 name = "f32_vaddc_relu_test",
6815 srcs = [
6816 "test/f32-vaddc-relu.cc",
6817 "test/vbinaryc-microkernel-tester.h",
6818 ] + MICROKERNEL_TEST_HDRS,
6819 deps = MICROKERNEL_TEST_DEPS,
6820)
6821
6822xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006823 name = "f32_vclamp_test",
6824 srcs = [
6825 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07006826 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006827 ] + MICROKERNEL_TEST_HDRS,
6828 deps = MICROKERNEL_TEST_DEPS,
6829)
6830
6831xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006832 name = "f32_vdiv_test",
6833 srcs = [
6834 "test/f32-vdiv.cc",
6835 "test/vbinary-microkernel-tester.h",
6836 ] + MICROKERNEL_TEST_HDRS,
6837 deps = MICROKERNEL_TEST_DEPS,
6838)
6839
6840xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006841 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006842 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006843 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006844 "test/vbinary-microkernel-tester.h",
6845 ] + MICROKERNEL_TEST_HDRS,
6846 deps = MICROKERNEL_TEST_DEPS,
6847)
6848
6849xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006850 name = "f32_vdiv_relu_test",
6851 srcs = [
6852 "test/f32-vdiv-relu.cc",
6853 "test/vbinary-microkernel-tester.h",
6854 ] + MICROKERNEL_TEST_HDRS,
6855 deps = MICROKERNEL_TEST_DEPS,
6856)
6857
6858xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006859 name = "f32_vdivc_test",
6860 srcs = [
6861 "test/f32-vdivc.cc",
6862 "test/vbinaryc-microkernel-tester.h",
6863 ] + MICROKERNEL_TEST_HDRS,
6864 deps = MICROKERNEL_TEST_DEPS,
6865)
6866
6867xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006868 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006869 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006870 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006871 "test/vbinaryc-microkernel-tester.h",
6872 ] + MICROKERNEL_TEST_HDRS,
6873 deps = MICROKERNEL_TEST_DEPS,
6874)
6875
6876xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006877 name = "f32_vdivc_relu_test",
6878 srcs = [
6879 "test/f32-vdivc-relu.cc",
6880 "test/vbinaryc-microkernel-tester.h",
6881 ] + MICROKERNEL_TEST_HDRS,
6882 deps = MICROKERNEL_TEST_DEPS,
6883)
6884
6885xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006886 name = "f32_vrdivc_test",
6887 srcs = [
6888 "test/f32-vrdivc.cc",
6889 "test/vbinaryc-microkernel-tester.h",
6890 ] + MICROKERNEL_TEST_HDRS,
6891 deps = MICROKERNEL_TEST_DEPS,
6892)
6893
6894xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006895 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006896 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006897 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006898 "test/vbinaryc-microkernel-tester.h",
6899 ] + MICROKERNEL_TEST_HDRS,
6900 deps = MICROKERNEL_TEST_DEPS,
6901)
6902
6903xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006904 name = "f32_vrdivc_relu_test",
6905 srcs = [
6906 "test/f32-vrdivc-relu.cc",
6907 "test/vbinaryc-microkernel-tester.h",
6908 ] + MICROKERNEL_TEST_HDRS,
6909 deps = MICROKERNEL_TEST_DEPS,
6910)
6911
6912xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006913 name = "f32_velu_test",
6914 srcs = [
6915 "test/f32-velu.cc",
6916 "test/vunary-microkernel-tester.h",
6917 ] + MICROKERNEL_TEST_HDRS,
6918 deps = MICROKERNEL_TEST_DEPS,
6919)
6920
6921xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08006922 name = "f32_vmax_test",
6923 srcs = [
6924 "test/f32-vmax.cc",
6925 "test/vbinary-microkernel-tester.h",
6926 ] + MICROKERNEL_TEST_HDRS,
6927 deps = MICROKERNEL_TEST_DEPS,
6928)
6929
6930xnnpack_unit_test(
6931 name = "f32_vmaxc_test",
6932 srcs = [
6933 "test/f32-vmaxc.cc",
6934 "test/vbinaryc-microkernel-tester.h",
6935 ] + MICROKERNEL_TEST_HDRS,
6936 deps = MICROKERNEL_TEST_DEPS,
6937)
6938
6939xnnpack_unit_test(
6940 name = "f32_vmin_test",
6941 srcs = [
6942 "test/f32-vmin.cc",
6943 "test/vbinary-microkernel-tester.h",
6944 ] + MICROKERNEL_TEST_HDRS,
6945 deps = MICROKERNEL_TEST_DEPS,
6946)
6947
6948xnnpack_unit_test(
6949 name = "f32_vminc_test",
6950 srcs = [
6951 "test/f32-vminc.cc",
6952 "test/vbinaryc-microkernel-tester.h",
6953 ] + MICROKERNEL_TEST_HDRS,
6954 deps = MICROKERNEL_TEST_DEPS,
6955)
6956
6957xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006958 name = "f32_vmul_test",
6959 srcs = [
6960 "test/f32-vmul.cc",
6961 "test/vbinary-microkernel-tester.h",
6962 ] + MICROKERNEL_TEST_HDRS,
6963 deps = MICROKERNEL_TEST_DEPS,
6964)
6965
6966xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006967 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006968 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006969 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006970 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006971 ] + MICROKERNEL_TEST_HDRS,
6972 deps = MICROKERNEL_TEST_DEPS,
6973)
6974
6975xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006976 name = "f32_vmul_relu_test",
6977 srcs = [
6978 "test/f32-vmul-relu.cc",
6979 "test/vbinary-microkernel-tester.h",
6980 ] + MICROKERNEL_TEST_HDRS,
6981 deps = MICROKERNEL_TEST_DEPS,
6982)
6983
6984xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006985 name = "f32_vmulc_test",
6986 srcs = [
6987 "test/f32-vmulc.cc",
6988 "test/vbinaryc-microkernel-tester.h",
6989 ] + MICROKERNEL_TEST_HDRS,
6990 deps = MICROKERNEL_TEST_DEPS,
6991)
6992
6993xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006994 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006995 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006996 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006997 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006998 ] + MICROKERNEL_TEST_HDRS,
6999 deps = MICROKERNEL_TEST_DEPS,
7000)
7001
7002xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007003 name = "f32_vmulc_relu_test",
7004 srcs = [
7005 "test/f32-vmulc-relu.cc",
7006 "test/vbinaryc-microkernel-tester.h",
7007 ] + MICROKERNEL_TEST_HDRS,
7008 deps = MICROKERNEL_TEST_DEPS,
7009)
7010
7011xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007012 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007013 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007014 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007015 "test/vmulcaddc-microkernel-tester.h",
7016 "src/xnnpack/AlignedAllocator.h",
7017 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007018 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007019)
7020
7021xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007022 name = "f32_vlrelu_test",
7023 srcs = [
7024 "test/f32-vlrelu.cc",
7025 "test/vunary-microkernel-tester.h",
7026 ] + MICROKERNEL_TEST_HDRS,
7027 deps = MICROKERNEL_TEST_DEPS,
7028)
7029
7030xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007031 name = "f32_vneg_test",
7032 srcs = [
7033 "test/f32-vneg.cc",
7034 "test/vunary-microkernel-tester.h",
7035 ] + MICROKERNEL_TEST_HDRS,
7036 deps = MICROKERNEL_TEST_DEPS,
7037)
7038
7039xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007040 name = "f32_vrelu_test",
7041 srcs = [
7042 "test/f32-vrelu.cc",
7043 "test/vunary-microkernel-tester.h",
7044 ] + MICROKERNEL_TEST_HDRS,
7045 deps = MICROKERNEL_TEST_DEPS,
7046)
7047
7048xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007049 name = "f32_vrndne_test",
7050 srcs = [
7051 "test/f32-vrndne.cc",
7052 "test/vunary-microkernel-tester.h",
7053 ] + MICROKERNEL_TEST_HDRS,
7054 deps = MICROKERNEL_TEST_DEPS,
7055)
7056
7057xnnpack_unit_test(
7058 name = "f32_vrndz_test",
7059 srcs = [
7060 "test/f32-vrndz.cc",
7061 "test/vunary-microkernel-tester.h",
7062 ] + MICROKERNEL_TEST_HDRS,
7063 deps = MICROKERNEL_TEST_DEPS,
7064)
7065
7066xnnpack_unit_test(
7067 name = "f32_vrndu_test",
7068 srcs = [
7069 "test/f32-vrndu.cc",
7070 "test/vunary-microkernel-tester.h",
7071 ] + MICROKERNEL_TEST_HDRS,
7072 deps = MICROKERNEL_TEST_DEPS,
7073)
7074
7075xnnpack_unit_test(
7076 name = "f32_vrndd_test",
7077 srcs = [
7078 "test/f32-vrndd.cc",
7079 "test/vunary-microkernel-tester.h",
7080 ] + MICROKERNEL_TEST_HDRS,
7081 deps = MICROKERNEL_TEST_DEPS,
7082)
7083
7084xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007085 name = "f32_vscale_test",
7086 srcs = [
7087 "test/f32-vscale.cc",
7088 "test/vscale-microkernel-tester.h",
7089 ] + MICROKERNEL_TEST_HDRS,
7090 deps = MICROKERNEL_TEST_DEPS,
7091)
7092
7093xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007094 name = "f32_vscaleexpminusmax_test",
7095 srcs = [
7096 "test/f32-vscaleexpminusmax.cc",
7097 "test/vscaleexpminusmax-microkernel-tester.h",
7098 ] + MICROKERNEL_TEST_HDRS,
7099 deps = MICROKERNEL_TEST_DEPS,
7100)
7101
7102xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007103 name = "f32_vscaleextexp_test",
7104 srcs = [
7105 "test/f32-vscaleextexp.cc",
7106 "test/vscaleextexp-microkernel-tester.h",
7107 ] + MICROKERNEL_TEST_HDRS,
7108 deps = MICROKERNEL_TEST_DEPS,
7109)
7110
7111xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007112 name = "f32_vsigmoid_test",
7113 srcs = [
7114 "test/f32-vsigmoid.cc",
7115 "test/vunary-microkernel-tester.h",
7116 ] + MICROKERNEL_TEST_HDRS,
7117 deps = MICROKERNEL_TEST_DEPS,
7118)
7119
7120xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007121 name = "f32_vsqr_test",
7122 srcs = [
7123 "test/f32-vsqr.cc",
7124 "test/vunary-microkernel-tester.h",
7125 ] + MICROKERNEL_TEST_HDRS,
7126 deps = MICROKERNEL_TEST_DEPS,
7127)
7128
7129xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007130 name = "f32_vsqrdiff_test",
7131 srcs = [
7132 "test/f32-vsqrdiff.cc",
7133 "test/vbinary-microkernel-tester.h",
7134 ] + MICROKERNEL_TEST_HDRS,
7135 deps = MICROKERNEL_TEST_DEPS,
7136)
7137
7138xnnpack_unit_test(
7139 name = "f32_vsqrdiffc_test",
7140 srcs = [
7141 "test/f32-vsqrdiffc.cc",
7142 "test/vbinaryc-microkernel-tester.h",
7143 ] + MICROKERNEL_TEST_HDRS,
7144 deps = MICROKERNEL_TEST_DEPS,
7145)
7146
7147xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007148 name = "f32_vsqrt_test",
7149 srcs = [
7150 "test/f32-vsqrt.cc",
7151 "test/vunary-microkernel-tester.h",
7152 ] + MICROKERNEL_TEST_HDRS,
7153 deps = MICROKERNEL_TEST_DEPS,
7154)
7155
7156xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007157 name = "f32_vsub_test",
7158 srcs = [
7159 "test/f32-vsub.cc",
7160 "test/vbinary-microkernel-tester.h",
7161 ] + MICROKERNEL_TEST_HDRS,
7162 deps = MICROKERNEL_TEST_DEPS,
7163)
7164
7165xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007166 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007167 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007168 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007169 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007170 ] + MICROKERNEL_TEST_HDRS,
7171 deps = MICROKERNEL_TEST_DEPS,
7172)
7173
7174xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007175 name = "f32_vsub_relu_test",
7176 srcs = [
7177 "test/f32-vsub-relu.cc",
7178 "test/vbinary-microkernel-tester.h",
7179 ] + MICROKERNEL_TEST_HDRS,
7180 deps = MICROKERNEL_TEST_DEPS,
7181)
7182
7183xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007184 name = "f32_vsubc_test",
7185 srcs = [
7186 "test/f32-vsubc.cc",
7187 "test/vbinaryc-microkernel-tester.h",
7188 ] + MICROKERNEL_TEST_HDRS,
7189 deps = MICROKERNEL_TEST_DEPS,
7190)
7191
7192xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007193 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007194 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007195 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007196 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007197 ] + MICROKERNEL_TEST_HDRS,
7198 deps = MICROKERNEL_TEST_DEPS,
7199)
7200
7201xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007202 name = "f32_vsubc_relu_test",
7203 srcs = [
7204 "test/f32-vsubc-relu.cc",
7205 "test/vbinaryc-microkernel-tester.h",
7206 ] + MICROKERNEL_TEST_HDRS,
7207 deps = MICROKERNEL_TEST_DEPS,
7208)
7209
7210xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007211 name = "f32_vrsubc_test",
7212 srcs = [
7213 "test/f32-vrsubc.cc",
7214 "test/vbinaryc-microkernel-tester.h",
7215 ] + MICROKERNEL_TEST_HDRS,
7216 deps = MICROKERNEL_TEST_DEPS,
7217)
7218
7219xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007220 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007221 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007222 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007223 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007224 ] + MICROKERNEL_TEST_HDRS,
7225 deps = MICROKERNEL_TEST_DEPS,
7226)
7227
7228xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007229 name = "f32_vrsubc_relu_test",
7230 srcs = [
7231 "test/f32-vrsubc-relu.cc",
7232 "test/vbinaryc-microkernel-tester.h",
7233 ] + MICROKERNEL_TEST_HDRS,
7234 deps = MICROKERNEL_TEST_DEPS,
7235)
7236
7237xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007238 name = "qc8_gemm_minmax_fp32_test",
7239 timeout = "moderate",
7240 srcs = [
7241 "test/qc8-gemm-minmax-fp32.cc",
7242 "test/gemm-microkernel-tester.h",
7243 "src/xnnpack/AlignedAllocator.h",
7244 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7245 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7246)
7247
7248xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007249 name = "qc8_igemm_minmax_fp32_test",
7250 timeout = "moderate",
7251 srcs = [
7252 "test/qc8-igemm-minmax-fp32.cc",
7253 "test/gemm-microkernel-tester.h",
7254 "src/xnnpack/AlignedAllocator.h",
7255 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7256 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7257)
7258
7259xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007260 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007261 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007262 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007263 "test/dwconv-microkernel-tester.h",
7264 "src/xnnpack/AlignedAllocator.h",
7265 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7266 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7267)
7268
7269xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007270 name = "qs8_dwconv_minmax_fp32_test",
7271 srcs = [
7272 "test/qs8-dwconv-minmax-fp32.cc",
7273 "test/dwconv-microkernel-tester.h",
7274 "src/xnnpack/AlignedAllocator.h",
7275 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7276 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7277)
7278
7279xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007280 name = "qs8_gavgpool_minmax_test",
7281 srcs = [
7282 "test/qs8-gavgpool-minmax.cc",
7283 "test/gavgpool-microkernel-tester.h",
7284 "src/xnnpack/AlignedAllocator.h",
7285 ] + MICROKERNEL_TEST_HDRS,
7286 deps = MICROKERNEL_TEST_DEPS,
7287)
7288
7289xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007290 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007291 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007292 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007293 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007294 "test/gemm-microkernel-tester.h",
7295 "src/xnnpack/AlignedAllocator.h",
7296 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7297 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7298)
7299
7300xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007301 name = "qs8_gemm_minmax_fp32_test",
7302 timeout = "moderate",
7303 srcs = [
7304 "test/qs8-gemm-minmax-fp32.cc",
7305 "test/gemm-microkernel-tester.h",
7306 "src/xnnpack/AlignedAllocator.h",
7307 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7308 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7309)
7310
7311xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007312 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007313 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007314 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007315 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007316 "test/gemm-microkernel-tester.h",
7317 "src/xnnpack/AlignedAllocator.h",
7318 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7319 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7320)
7321
7322xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007323 name = "qs8_igemm_minmax_fp32_test",
7324 timeout = "moderate",
7325 srcs = [
7326 "test/qs8-igemm-minmax-fp32.cc",
7327 "test/gemm-microkernel-tester.h",
7328 "src/xnnpack/AlignedAllocator.h",
7329 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7330 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7331)
7332
7333xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007334 name = "qs8_requantization_test",
7335 srcs = [
7336 "src/xnnpack/requantization-stubs.h",
7337 "test/qs8-requantization.cc",
7338 "test/requantization-tester.h",
7339 ] + MICROKERNEL_TEST_HDRS,
7340 deps = MICROKERNEL_TEST_DEPS,
7341)
7342
7343xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007344 name = "qs8_vadd_minmax_test",
7345 srcs = [
7346 "test/qs8-vadd-minmax.cc",
7347 "test/vadd-microkernel-tester.h",
7348 ] + MICROKERNEL_TEST_HDRS,
7349 deps = MICROKERNEL_TEST_DEPS,
7350)
7351
7352xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007353 name = "qs8_vaddc_minmax_test",
7354 srcs = [
7355 "test/qs8-vaddc-minmax.cc",
7356 "test/vaddc-microkernel-tester.h",
7357 ] + MICROKERNEL_TEST_HDRS,
7358 deps = MICROKERNEL_TEST_DEPS,
7359)
7360
7361xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007362 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007363 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007364 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007365 "test/avgpool-microkernel-tester.h",
7366 "src/xnnpack/AlignedAllocator.h",
7367 ] + MICROKERNEL_TEST_HDRS,
7368 deps = MICROKERNEL_TEST_DEPS,
7369)
7370
7371xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007372 name = "qu8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007373 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007374 "test/qu8-dwconv-minmax.cc",
7375 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007376 "src/xnnpack/AlignedAllocator.h",
7377 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007378 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007379)
7380
7381xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007382 name = "qu8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007383 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007384 "test/qu8-igemm-minmax.cc",
7385 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007386 "src/xnnpack/AlignedAllocator.h",
7387 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007388 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007389)
7390
7391xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007392 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007393 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007394 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007395 "test/gavgpool-microkernel-tester.h",
7396 "src/xnnpack/AlignedAllocator.h",
7397 ] + MICROKERNEL_TEST_HDRS,
7398 deps = MICROKERNEL_TEST_DEPS,
7399)
7400
7401xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007402 name = "qu8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007403 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007404 "test/qu8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007405 "test/gemm-microkernel-tester.h",
7406 "src/xnnpack/AlignedAllocator.h",
7407 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007408 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007409)
7410
7411xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007412 name = "qu8_requantization_test",
7413 srcs = [
7414 "src/xnnpack/requantization-stubs.h",
7415 "test/qu8-requantization.cc",
7416 "test/requantization-tester.h",
7417 ] + MICROKERNEL_TEST_HDRS,
7418 deps = MICROKERNEL_TEST_DEPS,
7419)
7420
7421xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007422 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007423 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007424 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007425 "test/vadd-microkernel-tester.h",
7426 ] + MICROKERNEL_TEST_HDRS,
7427 deps = MICROKERNEL_TEST_DEPS,
7428)
7429
7430xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007431 name = "u8_lut32norm_test",
7432 srcs = [
7433 "test/u8-lut32norm.cc",
7434 "test/lut-norm-microkernel-tester.h",
7435 ] + MICROKERNEL_TEST_HDRS,
7436 deps = MICROKERNEL_TEST_DEPS,
7437)
7438
7439xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007440 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007441 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007442 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007443 "test/maxpool-microkernel-tester.h",
7444 ] + MICROKERNEL_TEST_HDRS,
7445 deps = MICROKERNEL_TEST_DEPS,
7446)
7447
7448xnnpack_unit_test(
7449 name = "u8_rmax_test",
7450 srcs = [
7451 "test/u8-rmax.cc",
7452 "test/rmax-microkernel-tester.h",
7453 ] + MICROKERNEL_TEST_HDRS,
7454 deps = MICROKERNEL_TEST_DEPS,
7455)
7456
7457xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007458 name = "u8_vclamp_test",
7459 srcs = [
7460 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007461 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007462 ] + MICROKERNEL_TEST_HDRS,
7463 deps = MICROKERNEL_TEST_DEPS,
7464)
7465
7466xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007467 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007468 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007469 "test/x32-depthtospace2d-chw2hwc.cc",
7470 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007471 ] + MICROKERNEL_TEST_HDRS,
7472 deps = MICROKERNEL_TEST_DEPS,
7473)
7474
7475xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007476 name = "x32_fill_test",
7477 srcs = [
7478 "test/x32-fill.cc",
7479 "test/fill-microkernel-tester.h",
7480 ] + MICROKERNEL_TEST_HDRS,
7481 deps = MICROKERNEL_TEST_DEPS,
7482)
7483
7484xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007485 name = "x32_packx_test",
7486 srcs = [
7487 "test/x32-packx.cc",
7488 "test/pack-microkernel-tester.h",
7489 "src/xnnpack/AlignedAllocator.h",
7490 ] + MICROKERNEL_TEST_HDRS,
7491 deps = MICROKERNEL_TEST_DEPS,
7492)
7493
7494xnnpack_unit_test(
7495 name = "x32_pad_test",
7496 srcs = [
7497 "test/x32-pad.cc",
7498 "test/pad-microkernel-tester.h",
7499 ] + MICROKERNEL_TEST_HDRS,
7500 deps = MICROKERNEL_TEST_DEPS,
7501)
7502
7503xnnpack_unit_test(
7504 name = "x32_unpool_test",
7505 srcs = [
7506 "test/x32-unpool.cc",
7507 "test/unpool-microkernel-tester.h",
7508 ] + MICROKERNEL_TEST_HDRS,
7509 deps = MICROKERNEL_TEST_DEPS,
7510)
7511
7512xnnpack_unit_test(
7513 name = "x32_zip_test",
7514 srcs = [
7515 "test/x32-zip.cc",
7516 "test/zip-microkernel-tester.h",
7517 ] + MICROKERNEL_TEST_HDRS,
7518 deps = MICROKERNEL_TEST_DEPS,
7519)
7520
7521xnnpack_unit_test(
7522 name = "x8_lut_test",
7523 srcs = [
7524 "test/x8-lut.cc",
7525 "test/lut-microkernel-tester.h",
7526 ] + MICROKERNEL_TEST_HDRS,
7527 deps = MICROKERNEL_TEST_DEPS,
7528)
7529
7530xnnpack_unit_test(
7531 name = "x8_zip_test",
7532 srcs = [
7533 "test/x8-zip.cc",
7534 "test/zip-microkernel-tester.h",
7535 ] + MICROKERNEL_TEST_HDRS,
7536 deps = MICROKERNEL_TEST_DEPS,
7537)
7538
Marat Dukhan20c3b922020-03-10 03:45:06 -07007539########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007540
7541xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007542 name = "operator_size_test",
7543 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007544 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007545)
7546
Marat Dukhan20c3b922020-03-10 03:45:06 -07007547xnnpack_binary(
7548 name = "subgraph_size_test",
7549 srcs = ["test/subgraph-size.c"],
7550 deps = [":XNNPACK"],
7551)
7552
7553########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007554
7555xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007556 name = "abs_nc_test",
7557 srcs = [
7558 "test/abs-nc.cc",
7559 "test/abs-operator-tester.h",
7560 ],
7561 deps = OPERATOR_TEST_DEPS,
7562)
7563
7564xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007565 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007566 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007567 srcs = [
7568 "test/add-nd.cc",
7569 "test/binary-elementwise-operator-tester.h",
7570 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007571 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007572)
7573
7574xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007575 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007576 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007577 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007578 "test/argmax-pooling-operator-tester.h",
7579 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007580 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007581)
7582
7583xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007584 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007585 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007586 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007587 "test/average-pooling-operator-tester.h",
7588 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007589 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007590)
7591
7592xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007593 name = "bankers_rounding_nc_test",
7594 srcs = [
7595 "test/bankers-rounding-nc.cc",
7596 "test/bankers-rounding-operator-tester.h",
7597 ],
7598 deps = OPERATOR_TEST_DEPS,
7599)
7600
7601xnnpack_unit_test(
7602 name = "ceiling_nc_test",
7603 srcs = [
7604 "test/ceiling-nc.cc",
7605 "test/ceiling-operator-tester.h",
7606 ],
7607 deps = OPERATOR_TEST_DEPS,
7608)
7609
7610xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007611 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007612 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007613 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007614 "test/channel-shuffle-operator-tester.h",
7615 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007616 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007617)
7618
7619xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007620 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007621 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007622 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007623 "test/clamp-operator-tester.h",
7624 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007625 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007626)
7627
7628xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07007629 name = "constant_pad_nd_test",
7630 srcs = [
7631 "test/constant-pad-nd.cc",
7632 "test/constant-pad-operator-tester.h",
7633 ],
7634 deps = OPERATOR_TEST_DEPS,
7635)
7636
7637xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007638 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007639 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007640 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007641 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007642 "test/convolution-operator-tester.h",
7643 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007644 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007645)
7646
7647xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007648 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007649 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007650 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007651 "test/convolution-nchw.cc",
7652 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007653 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007654 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007655)
7656
7657xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07007658 name = "copy_nc_test",
7659 srcs = [
7660 "test/copy-nc.cc",
7661 "test/copy-operator-tester.h",
7662 ],
7663 deps = OPERATOR_TEST_DEPS,
7664)
7665
7666xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007667 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08007668 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007669 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007670 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007671 "test/deconvolution-operator-tester.h",
7672 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007673 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007674)
7675
7676xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08007677 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007678 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08007679 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007680 "test/depth-to-space-operator-tester.h",
7681 ] + OPERATOR_TEST_PARAMS_HDRS,
7682 deps = OPERATOR_TEST_DEPS,
7683)
7684
7685xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08007686 name = "depth_to_space_nhwc_test",
7687 srcs = [
7688 "test/depth-to-space-nhwc.cc",
7689 "test/depth-to-space-operator-tester.h",
7690 ] + OPERATOR_TEST_PARAMS_HDRS,
7691 deps = OPERATOR_TEST_DEPS,
7692)
7693
7694xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08007695 name = "divide_nd_test",
7696 srcs = [
7697 "test/binary-elementwise-operator-tester.h",
7698 "test/divide-nd.cc",
7699 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007700 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08007701)
7702
7703xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08007704 name = "elu_nc_test",
7705 srcs = [
7706 "test/elu-nc.cc",
7707 "test/elu-operator-tester.h",
7708 ],
7709 deps = OPERATOR_TEST_DEPS,
7710)
7711
7712xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007713 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007714 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007715 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007716 "test/fully-connected-operator-tester.h",
7717 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007718 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007719)
7720
7721xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007722 name = "floor_nc_test",
7723 srcs = [
7724 "test/floor-nc.cc",
7725 "test/floor-operator-tester.h",
7726 ],
7727 deps = OPERATOR_TEST_DEPS,
7728)
7729
7730xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007731 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007732 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007733 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007734 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07007735 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007736 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007737)
7738
7739xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007740 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007741 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007742 "test/global-average-pooling-ncw.cc",
7743 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007744 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007745 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007746)
7747
7748xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007749 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007750 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007751 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007752 "test/hardswish-operator-tester.h",
7753 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007754 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007755)
7756
7757xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007758 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007759 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007760 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007761 "test/leaky-relu-operator-tester.h",
7762 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007763 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007764)
7765
7766xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007767 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007768 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007769 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007770 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007771 "test/max-pooling-operator-tester.h",
7772 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007773 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007774)
7775
7776xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08007777 name = "maximum_nd_test",
7778 srcs = [
7779 "test/binary-elementwise-operator-tester.h",
7780 "test/maximum-nd.cc",
7781 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007782 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007783)
7784
7785xnnpack_unit_test(
7786 name = "minimum_nd_test",
7787 srcs = [
7788 "test/binary-elementwise-operator-tester.h",
7789 "test/minimum-nd.cc",
7790 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007791 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007792)
7793
7794xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007795 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007796 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007797 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08007798 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007799 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007800 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08007801)
7802
7803xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007804 name = "negate_nc_test",
7805 srcs = [
7806 "test/negate-nc.cc",
7807 "test/negate-operator-tester.h",
7808 ],
7809 deps = OPERATOR_TEST_DEPS,
7810)
7811
7812xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007813 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007814 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007815 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007816 "test/prelu-operator-tester.h",
7817 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007818 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007819)
7820
7821xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007822 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08007823 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007824 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08007825 "test/resize-bilinear-operator-tester.h",
7826 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007827 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08007828)
7829
7830xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07007831 name = "resize_bilinear_nchw_test",
7832 srcs = [
7833 "test/resize-bilinear-nchw.cc",
7834 "test/resize-bilinear-operator-tester.h",
7835 ] + OPERATOR_TEST_PARAMS_HDRS,
7836 deps = OPERATOR_TEST_DEPS,
7837)
7838
7839xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007840 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007841 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007842 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007843 "test/sigmoid-operator-tester.h",
7844 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007845 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007846)
7847
7848xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007849 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007850 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007851 "test/softmax-nc.cc",
7852 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007853 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007854 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007855)
7856
7857xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007858 name = "square_nc_test",
7859 srcs = [
7860 "test/square-nc.cc",
7861 "test/square-operator-tester.h",
7862 ],
7863 deps = OPERATOR_TEST_DEPS,
7864)
7865
7866xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07007867 name = "square_root_nc_test",
7868 srcs = [
7869 "test/square-root-nc.cc",
7870 "test/square-root-operator-tester.h",
7871 ],
7872 deps = OPERATOR_TEST_DEPS,
7873)
7874
7875xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07007876 name = "squared_difference_nd_test",
7877 srcs = [
7878 "test/binary-elementwise-operator-tester.h",
7879 "test/squared-difference-nd.cc",
7880 ],
7881 deps = OPERATOR_TEST_DEPS,
7882)
7883
7884xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007885 name = "subtract_nd_test",
7886 srcs = [
7887 "test/binary-elementwise-operator-tester.h",
7888 "test/subtract-nd.cc",
7889 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007890 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007891)
7892
7893xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007894 name = "truncation_nc_test",
7895 srcs = [
7896 "test/truncation-nc.cc",
7897 "test/truncation-operator-tester.h",
7898 ],
7899 deps = OPERATOR_TEST_DEPS,
7900)
7901
7902xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007903 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007904 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007905 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007906 "test/unpooling-operator-tester.h",
7907 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007908 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007909)
7910
Chao Mei6ddfc602020-05-13 22:29:36 -07007911############################### Misc unit tests ###############################
7912
7913xnnpack_unit_test(
7914 name = "memory_planner_test",
7915 srcs = [
7916 "test/memory-planner-test.cc",
7917 ],
7918 deps = [
7919 ":XNNPACK",
7920 ":memory_planner",
7921 ],
7922)
7923
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07007924xnnpack_unit_test(
7925 name = "subgraph_nchw_test",
7926 srcs = [
7927 "src/xnnpack/subgraph.h",
7928 "test/subgraph-nchw.cc",
7929 "test/subgraph-tester.h",
7930 ],
7931 deps = [
7932 ":XNNPACK",
7933 ],
7934)
7935
Marat Dukhan08c4a432019-10-03 09:29:21 -07007936############################# Build configurations #############################
7937
Marat Dukhanb8642352019-10-30 15:43:02 -07007938# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07007939config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007940 name = "xnn_enable_assembly_explicit_true",
7941 define_values = {"xnn_enable_assembly": "true"},
7942)
7943
7944# Disables usage of assembly kernels.
7945config_setting(
7946 name = "xnn_enable_assembly_explicit_false",
7947 define_values = {"xnn_enable_assembly": "false"},
7948)
7949
Marat Dukhan9de90e02020-06-18 16:04:12 -07007950# Enables usage of sparse inference.
7951config_setting(
7952 name = "xnn_enable_sparse_explicit_true",
7953 define_values = {"xnn_enable_sparse": "true"},
7954)
7955
7956# Disables usage of sparse inference.
7957config_setting(
7958 name = "xnn_enable_sparse_explicit_false",
7959 define_values = {"xnn_enable_sparse": "false"},
7960)
7961
Marat Dukhan05702cf2020-03-26 15:41:33 -07007962# Disables usage of HMP-aware optimizations.
7963config_setting(
7964 name = "xnn_enable_hmp_explicit_false",
7965 define_values = {"xnn_enable_hmp": "false"},
7966)
7967
Chao Mei6ddfc602020-05-13 22:29:36 -07007968# Enable usage of optimized memory allocation
7969config_setting(
7970 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07007971 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007972)
7973
7974# Disable usage of optimized memory allocation
7975config_setting(
7976 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07007977 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007978)
7979
Marat Dukhanb939cdb2021-03-30 18:51:51 -07007980# Enable QS8 inference in TFLite-specific version
7981config_setting(
7982 name = "xnn_enable_qs8_explicit_true",
7983 define_values = {"xnn_enable_qs8": "true"},
7984)
7985
7986# Disable QS8 inference in TFLite-specific version
7987config_setting(
7988 name = "xnn_enable_qs8_explicit_false",
7989 define_values = {"xnn_enable_qs8": "false"},
7990)
7991
Marat Dukhanb8642352019-10-30 15:43:02 -07007992# Builds with -c dbg
7993config_setting(
7994 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007995 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07007996 "compilation_mode": "dbg",
7997 },
7998)
7999
8000# Builds with -c opt
8001config_setting(
8002 name = "optimized_build",
8003 values = {
8004 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008005 },
8006)
8007
8008config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008009 name = "linux_k8",
8010 values = {"cpu": "k8"},
8011)
8012
8013config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008014 name = "linux_arm",
8015 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008016)
8017
8018config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008019 name = "linux_armeabi",
8020 values = {"cpu": "armeabi"},
8021)
8022
8023config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008024 name = "linux_armhf",
8025 values = {"cpu": "armhf"},
8026)
8027
8028config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008029 name = "linux_armv7a",
8030 values = {"cpu": "armv7a"},
8031)
8032
8033config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008034 name = "linux_aarch64",
8035 values = {"cpu": "aarch64"},
8036)
8037
8038config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008039 name = "android",
8040 values = {"crosstool_top": "//external:android/crosstool"},
8041)
8042
8043config_setting(
8044 name = "android_armv7",
8045 values = {
8046 "crosstool_top": "//external:android/crosstool",
8047 "cpu": "armeabi-v7a",
8048 },
8049)
8050
8051config_setting(
8052 name = "android_arm64",
8053 values = {
8054 "crosstool_top": "//external:android/crosstool",
8055 "cpu": "arm64-v8a",
8056 },
8057)
8058
8059config_setting(
8060 name = "android_x86",
8061 values = {
8062 "crosstool_top": "//external:android/crosstool",
8063 "cpu": "x86",
8064 },
8065)
8066
8067config_setting(
8068 name = "android_x86_64",
8069 values = {
8070 "crosstool_top": "//external:android/crosstool",
8071 "cpu": "x86_64",
8072 },
8073)
8074
8075config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008076 name = "windows_x86_64",
8077 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008078)
8079
8080config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008081 name = "windows_x86_64_clang",
8082 values = {
8083 "compiler": "clang-cl",
8084 "cpu": "x64_windows",
8085 },
8086)
8087
8088config_setting(
8089 name = "windows_x86_64_mingw",
8090 values = {
8091 "compiler": "mingw-gcc",
8092 "cpu": "x64_windows",
8093 },
8094)
8095
8096config_setting(
8097 name = "windows_x86_64_msys",
8098 values = {
8099 "compiler": "msys-gcc",
8100 "cpu": "x64_windows",
8101 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008102)
8103
8104config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008105 name = "macos_x86_64",
8106 values = {
8107 "apple_platform_type": "macos",
8108 "cpu": "darwin",
8109 },
8110)
8111
8112config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008113 name = "macos_arm64",
8114 values = {
8115 "apple_platform_type": "macos",
8116 "cpu": "darwin_arm64",
8117 },
8118)
8119
8120config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008121 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008122 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008123)
8124
8125config_setting(
8126 name = "emscripten_wasm",
8127 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008128 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008129 "cpu": "wasm",
8130 },
8131)
8132
8133config_setting(
8134 name = "emscripten_wasmsimd",
8135 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008136 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008137 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008138 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008139 },
8140)
8141
8142config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008143 name = "ios_armv7",
8144 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008145 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008146 "cpu": "ios_armv7",
8147 },
8148)
8149
8150config_setting(
8151 name = "ios_arm64",
8152 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008153 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008154 "cpu": "ios_arm64",
8155 },
8156)
8157
8158config_setting(
8159 name = "ios_arm64e",
8160 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008161 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008162 "cpu": "ios_arm64e",
8163 },
8164)
8165
8166config_setting(
8167 name = "ios_x86",
8168 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008169 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008170 "cpu": "ios_i386",
8171 },
8172)
8173
8174config_setting(
8175 name = "ios_x86_64",
8176 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008177 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008178 "cpu": "ios_x86_64",
8179 },
8180)
8181
8182config_setting(
8183 name = "watchos_armv7k",
8184 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008185 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008186 "cpu": "watchos_armv7k",
8187 },
8188)
8189
8190config_setting(
8191 name = "watchos_arm64_32",
8192 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008193 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008194 "cpu": "watchos_arm64_32",
8195 },
8196)
8197
8198config_setting(
8199 name = "watchos_x86",
8200 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008201 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008202 "cpu": "watchos_i386",
8203 },
8204)
8205
8206config_setting(
8207 name = "watchos_x86_64",
8208 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008209 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008210 "cpu": "watchos_x86_64",
8211 },
8212)
8213
8214config_setting(
8215 name = "tvos_arm64",
8216 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008217 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008218 "cpu": "tvos_arm64",
8219 },
8220)
8221
8222config_setting(
8223 name = "tvos_x86_64",
8224 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008225 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008226 "cpu": "tvos_x86_64",
8227 },
8228)