XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1 | // Copyright 2019 Google LLC |
| 2 | // |
| 3 | // This source code is licensed under the BSD-style license found in the |
| 4 | // LICENSE file in the root directory of this source tree. |
| 5 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6 | #include <gtest/gtest.h> |
| 7 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 8 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9 | #include <xnnpack/isa-checks.h> |
| 10 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 11 | #include <xnnpack/dwconv.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 12 | #include "dwconv-spchw-microkernel-tester.h" |
| 13 | |
| 14 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 15 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 16 | TEST(F32_DWCONV_SPCHW_3X3P1__SSE, input_width_eq_4) { |
| 17 | TEST_REQUIRES_X86_SSE; |
| 18 | DWConvSpCHWMicrokernelTester() |
| 19 | .input_tuple_size(4) |
| 20 | .output_tuple_size(4) |
| 21 | .input_width(4) |
| 22 | .padding_left(1) |
| 23 | .padding_right(1) |
| 24 | .kernel_height(3) |
| 25 | .kernel_width(3) |
| 26 | .output_height(1) |
| 27 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__sse); |
| 28 | } |
| 29 | |
| 30 | TEST(F32_DWCONV_SPCHW_3X3P1__SSE, input_width_lt_4) { |
| 31 | TEST_REQUIRES_X86_SSE; |
| 32 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 33 | DWConvSpCHWMicrokernelTester() |
| 34 | .input_tuple_size(4) |
| 35 | .output_tuple_size(4) |
| 36 | .input_width(input_width) |
| 37 | .padding_left(1) |
| 38 | .padding_right(1) |
| 39 | .kernel_height(3) |
| 40 | .kernel_width(3) |
| 41 | .output_height(1) |
| 42 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__sse); |
| 43 | } |
| 44 | } |
| 45 | |
| 46 | TEST(F32_DWCONV_SPCHW_3X3P1__SSE, input_width_gt_4) { |
| 47 | TEST_REQUIRES_X86_SSE; |
| 48 | for (size_t input_width = 5; input_width < 8; input_width++) { |
| 49 | DWConvSpCHWMicrokernelTester() |
| 50 | .input_tuple_size(4) |
| 51 | .output_tuple_size(4) |
| 52 | .input_width(input_width) |
| 53 | .padding_left(1) |
| 54 | .padding_right(1) |
| 55 | .kernel_height(3) |
| 56 | .kernel_width(3) |
| 57 | .output_height(1) |
| 58 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__sse); |
| 59 | } |
| 60 | } |
| 61 | |
| 62 | TEST(F32_DWCONV_SPCHW_3X3P1__SSE, input_width_div_4) { |
| 63 | TEST_REQUIRES_X86_SSE; |
| 64 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 65 | DWConvSpCHWMicrokernelTester() |
| 66 | .input_tuple_size(4) |
| 67 | .output_tuple_size(4) |
| 68 | .input_width(input_width) |
| 69 | .padding_left(1) |
| 70 | .padding_right(1) |
| 71 | .kernel_height(3) |
| 72 | .kernel_width(3) |
| 73 | .output_height(1) |
| 74 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__sse); |
| 75 | } |
| 76 | } |
| 77 | |
| 78 | TEST(F32_DWCONV_SPCHW_3X3P1__SSE, input_width_stride) { |
| 79 | TEST_REQUIRES_X86_SSE; |
| 80 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 81 | DWConvSpCHWMicrokernelTester() |
| 82 | .input_tuple_size(4) |
| 83 | .output_tuple_size(4) |
| 84 | .input_width(input_width) |
| 85 | .input_width_stride(36) |
| 86 | .padding_left(1) |
| 87 | .padding_right(1) |
| 88 | .kernel_height(3) |
| 89 | .kernel_width(3) |
| 90 | .output_height(1) |
| 91 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__sse); |
| 92 | } |
| 93 | } |
| 94 | |
| 95 | TEST(F32_DWCONV_SPCHW_3X3P1__SSE, input_tuple_stride) { |
| 96 | TEST_REQUIRES_X86_SSE; |
| 97 | for (size_t input_width = 1; input_width < 32; input_width += 5) { |
| 98 | DWConvSpCHWMicrokernelTester() |
| 99 | .input_tuple_size(4) |
| 100 | .output_tuple_size(4) |
| 101 | .input_width(input_width) |
| 102 | .input_width_stride(4) |
| 103 | .input_tuple_stride(3 * 4) |
| 104 | .padding_left(1) |
| 105 | .padding_right(1) |
| 106 | .kernel_height(3) |
| 107 | .kernel_width(3) |
| 108 | .output_height(1) |
| 109 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__sse); |
| 110 | } |
| 111 | } |
| 112 | |
| 113 | TEST(F32_DWCONV_SPCHW_3X3P1__SSE, output_height_gt_1) { |
| 114 | TEST_REQUIRES_X86_SSE; |
| 115 | for (size_t output_height = 2; output_height < 5; output_height++) { |
| 116 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 117 | DWConvSpCHWMicrokernelTester() |
| 118 | .input_tuple_size(4) |
| 119 | .output_tuple_size(4) |
| 120 | .input_width(input_width) |
| 121 | .padding_left(1) |
| 122 | .padding_right(1) |
| 123 | .kernel_height(3) |
| 124 | .kernel_width(3) |
| 125 | .output_height(output_height) |
| 126 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__sse); |
| 127 | } |
| 128 | } |
| 129 | } |
| 130 | |
| 131 | TEST(F32_DWCONV_SPCHW_3X3P1__SSE, output_width_stride) { |
| 132 | TEST_REQUIRES_X86_SSE; |
| 133 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 134 | DWConvSpCHWMicrokernelTester() |
| 135 | .input_tuple_size(4) |
| 136 | .output_tuple_size(4) |
| 137 | .input_width(input_width) |
| 138 | .padding_left(1) |
| 139 | .padding_right(1) |
| 140 | .kernel_height(3) |
| 141 | .kernel_width(3) |
| 142 | .output_height(5) |
| 143 | .output_width_stride(36) |
| 144 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__sse); |
| 145 | } |
| 146 | } |
| 147 | |
| 148 | TEST(F32_DWCONV_SPCHW_3X3P1__SSE, output_tuple_stride) { |
| 149 | TEST_REQUIRES_X86_SSE; |
| 150 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 151 | DWConvSpCHWMicrokernelTester() |
| 152 | .input_tuple_size(4) |
| 153 | .output_tuple_size(4) |
| 154 | .input_width(input_width) |
| 155 | .padding_left(1) |
| 156 | .padding_right(1) |
| 157 | .kernel_height(3) |
| 158 | .kernel_width(3) |
| 159 | .output_height(5) |
| 160 | .output_width_stride(4) |
| 161 | .output_tuple_stride(5 * 4) |
| 162 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__sse); |
| 163 | } |
| 164 | } |
| 165 | |
| 166 | TEST(F32_DWCONV_SPCHW_3X3P1__SSE, chw_layout) { |
| 167 | TEST_REQUIRES_X86_SSE; |
| 168 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 169 | DWConvSpCHWMicrokernelTester() |
| 170 | .input_tuple_size(4) |
| 171 | .output_tuple_size(4) |
| 172 | .input_width(input_width) |
| 173 | .input_width_stride(input_width) |
| 174 | .padding_left(1) |
| 175 | .padding_right(1) |
| 176 | .kernel_height(3) |
| 177 | .kernel_width(3) |
| 178 | .output_height(5) |
| 179 | .output_width_stride(input_width) |
| 180 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__sse); |
| 181 | } |
| 182 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 183 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 184 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 185 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 186 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SSE, input_width_eq_4) { |
| 187 | TEST_REQUIRES_X86_SSE; |
| 188 | DWConvSpCHWMicrokernelTester() |
| 189 | .input_tuple_size(4) |
| 190 | .output_tuple_size(4) |
| 191 | .input_width(4) |
| 192 | .padding_left(1) |
| 193 | .padding_right(1) |
| 194 | .kernel_height(3) |
| 195 | .kernel_width(3) |
| 196 | .subsampling(2) |
| 197 | .output_height(1) |
| 198 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse); |
| 199 | } |
| 200 | |
| 201 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SSE, input_width_lt_4) { |
| 202 | TEST_REQUIRES_X86_SSE; |
| 203 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 204 | DWConvSpCHWMicrokernelTester() |
| 205 | .input_tuple_size(4) |
| 206 | .output_tuple_size(4) |
| 207 | .input_width(input_width) |
| 208 | .padding_left(1) |
| 209 | .padding_right(1) |
| 210 | .kernel_height(3) |
| 211 | .kernel_width(3) |
| 212 | .subsampling(2) |
| 213 | .output_height(1) |
| 214 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse); |
| 215 | } |
| 216 | } |
| 217 | |
| 218 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SSE, input_width_gt_4) { |
| 219 | TEST_REQUIRES_X86_SSE; |
| 220 | for (size_t input_width = 5; input_width < 8; input_width++) { |
| 221 | DWConvSpCHWMicrokernelTester() |
| 222 | .input_tuple_size(4) |
| 223 | .output_tuple_size(4) |
| 224 | .input_width(input_width) |
| 225 | .padding_left(1) |
| 226 | .padding_right(1) |
| 227 | .kernel_height(3) |
| 228 | .kernel_width(3) |
| 229 | .subsampling(2) |
| 230 | .output_height(1) |
| 231 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse); |
| 232 | } |
| 233 | } |
| 234 | |
| 235 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SSE, input_width_div_4) { |
| 236 | TEST_REQUIRES_X86_SSE; |
| 237 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 238 | DWConvSpCHWMicrokernelTester() |
| 239 | .input_tuple_size(4) |
| 240 | .output_tuple_size(4) |
| 241 | .input_width(input_width) |
| 242 | .padding_left(1) |
| 243 | .padding_right(1) |
| 244 | .kernel_height(3) |
| 245 | .kernel_width(3) |
| 246 | .subsampling(2) |
| 247 | .output_height(1) |
| 248 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse); |
| 249 | } |
| 250 | } |
| 251 | |
| 252 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SSE, input_width_stride) { |
| 253 | TEST_REQUIRES_X86_SSE; |
| 254 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 255 | DWConvSpCHWMicrokernelTester() |
| 256 | .input_tuple_size(4) |
| 257 | .output_tuple_size(4) |
| 258 | .input_width(input_width) |
| 259 | .input_width_stride(36) |
| 260 | .padding_left(1) |
| 261 | .padding_right(1) |
| 262 | .kernel_height(3) |
| 263 | .kernel_width(3) |
| 264 | .subsampling(2) |
| 265 | .output_height(1) |
| 266 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse); |
| 267 | } |
| 268 | } |
| 269 | |
| 270 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SSE, input_tuple_stride) { |
| 271 | TEST_REQUIRES_X86_SSE; |
| 272 | for (size_t input_width = 1; input_width < 32; input_width += 5) { |
| 273 | DWConvSpCHWMicrokernelTester() |
| 274 | .input_tuple_size(4) |
| 275 | .output_tuple_size(4) |
| 276 | .input_width(input_width) |
| 277 | .input_width_stride(4) |
| 278 | .input_tuple_stride(3 * 4) |
| 279 | .padding_left(1) |
| 280 | .padding_right(1) |
| 281 | .kernel_height(3) |
| 282 | .kernel_width(3) |
| 283 | .subsampling(2) |
| 284 | .output_height(1) |
| 285 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse); |
| 286 | } |
| 287 | } |
| 288 | |
| 289 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SSE, output_height_gt_1) { |
| 290 | TEST_REQUIRES_X86_SSE; |
| 291 | for (size_t output_height = 2; output_height < 5; output_height++) { |
| 292 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 293 | DWConvSpCHWMicrokernelTester() |
| 294 | .input_tuple_size(4) |
| 295 | .output_tuple_size(4) |
| 296 | .input_width(input_width) |
| 297 | .padding_left(1) |
| 298 | .padding_right(1) |
| 299 | .kernel_height(3) |
| 300 | .kernel_width(3) |
| 301 | .subsampling(2) |
| 302 | .output_height(output_height) |
| 303 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse); |
| 304 | } |
| 305 | } |
| 306 | } |
| 307 | |
| 308 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SSE, output_width_stride) { |
| 309 | TEST_REQUIRES_X86_SSE; |
| 310 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 311 | DWConvSpCHWMicrokernelTester() |
| 312 | .input_tuple_size(4) |
| 313 | .output_tuple_size(4) |
| 314 | .input_width(input_width) |
| 315 | .padding_left(1) |
| 316 | .padding_right(1) |
| 317 | .kernel_height(3) |
| 318 | .kernel_width(3) |
| 319 | .subsampling(2) |
| 320 | .output_height(5) |
| 321 | .output_width_stride(36) |
| 322 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse); |
| 323 | } |
| 324 | } |
| 325 | |
| 326 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SSE, output_tuple_stride) { |
| 327 | TEST_REQUIRES_X86_SSE; |
| 328 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 329 | DWConvSpCHWMicrokernelTester() |
| 330 | .input_tuple_size(4) |
| 331 | .output_tuple_size(4) |
| 332 | .input_width(input_width) |
| 333 | .padding_left(1) |
| 334 | .padding_right(1) |
| 335 | .kernel_height(3) |
| 336 | .kernel_width(3) |
| 337 | .subsampling(2) |
| 338 | .output_height(5) |
| 339 | .output_width_stride(4) |
| 340 | .output_tuple_stride(5 * 4) |
| 341 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse); |
| 342 | } |
| 343 | } |
| 344 | |
| 345 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SSE, chw_layout) { |
| 346 | TEST_REQUIRES_X86_SSE; |
| 347 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 348 | DWConvSpCHWMicrokernelTester() |
| 349 | .input_tuple_size(4) |
| 350 | .output_tuple_size(4) |
| 351 | .input_width(input_width) |
| 352 | .input_width_stride(input_width) |
| 353 | .padding_left(1) |
| 354 | .padding_right(1) |
| 355 | .kernel_height(3) |
| 356 | .kernel_width(3) |
| 357 | .subsampling(2) |
| 358 | .output_height(5) |
| 359 | .output_width_stride((input_width - 1) / 2 + 1) |
| 360 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse); |
| 361 | } |
| 362 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 363 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 364 | |
| 365 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 366 | #if XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 367 | TEST(F32_DWCONV_SPCHW_3X3P1__NEONFMA, input_width_eq_4) { |
| 368 | TEST_REQUIRES_ARM_NEON_FMA; |
| 369 | DWConvSpCHWMicrokernelTester() |
| 370 | .input_tuple_size(4) |
| 371 | .output_tuple_size(4) |
| 372 | .input_width(4) |
| 373 | .padding_left(1) |
| 374 | .padding_right(1) |
| 375 | .kernel_height(3) |
| 376 | .kernel_width(3) |
| 377 | .output_height(1) |
| 378 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma); |
| 379 | } |
| 380 | |
| 381 | TEST(F32_DWCONV_SPCHW_3X3P1__NEONFMA, input_width_lt_4) { |
| 382 | TEST_REQUIRES_ARM_NEON_FMA; |
| 383 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 384 | DWConvSpCHWMicrokernelTester() |
| 385 | .input_tuple_size(4) |
| 386 | .output_tuple_size(4) |
| 387 | .input_width(input_width) |
| 388 | .padding_left(1) |
| 389 | .padding_right(1) |
| 390 | .kernel_height(3) |
| 391 | .kernel_width(3) |
| 392 | .output_height(1) |
| 393 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma); |
| 394 | } |
| 395 | } |
| 396 | |
| 397 | TEST(F32_DWCONV_SPCHW_3X3P1__NEONFMA, input_width_gt_4) { |
| 398 | TEST_REQUIRES_ARM_NEON_FMA; |
| 399 | for (size_t input_width = 5; input_width < 8; input_width++) { |
| 400 | DWConvSpCHWMicrokernelTester() |
| 401 | .input_tuple_size(4) |
| 402 | .output_tuple_size(4) |
| 403 | .input_width(input_width) |
| 404 | .padding_left(1) |
| 405 | .padding_right(1) |
| 406 | .kernel_height(3) |
| 407 | .kernel_width(3) |
| 408 | .output_height(1) |
| 409 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma); |
| 410 | } |
| 411 | } |
| 412 | |
| 413 | TEST(F32_DWCONV_SPCHW_3X3P1__NEONFMA, input_width_div_4) { |
| 414 | TEST_REQUIRES_ARM_NEON_FMA; |
| 415 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 416 | DWConvSpCHWMicrokernelTester() |
| 417 | .input_tuple_size(4) |
| 418 | .output_tuple_size(4) |
| 419 | .input_width(input_width) |
| 420 | .padding_left(1) |
| 421 | .padding_right(1) |
| 422 | .kernel_height(3) |
| 423 | .kernel_width(3) |
| 424 | .output_height(1) |
| 425 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma); |
| 426 | } |
| 427 | } |
| 428 | |
| 429 | TEST(F32_DWCONV_SPCHW_3X3P1__NEONFMA, input_width_stride) { |
| 430 | TEST_REQUIRES_ARM_NEON_FMA; |
| 431 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 432 | DWConvSpCHWMicrokernelTester() |
| 433 | .input_tuple_size(4) |
| 434 | .output_tuple_size(4) |
| 435 | .input_width(input_width) |
| 436 | .input_width_stride(36) |
| 437 | .padding_left(1) |
| 438 | .padding_right(1) |
| 439 | .kernel_height(3) |
| 440 | .kernel_width(3) |
| 441 | .output_height(1) |
| 442 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma); |
| 443 | } |
| 444 | } |
| 445 | |
| 446 | TEST(F32_DWCONV_SPCHW_3X3P1__NEONFMA, input_tuple_stride) { |
| 447 | TEST_REQUIRES_ARM_NEON_FMA; |
| 448 | for (size_t input_width = 1; input_width < 32; input_width += 5) { |
| 449 | DWConvSpCHWMicrokernelTester() |
| 450 | .input_tuple_size(4) |
| 451 | .output_tuple_size(4) |
| 452 | .input_width(input_width) |
| 453 | .input_width_stride(4) |
| 454 | .input_tuple_stride(3 * 4) |
| 455 | .padding_left(1) |
| 456 | .padding_right(1) |
| 457 | .kernel_height(3) |
| 458 | .kernel_width(3) |
| 459 | .output_height(1) |
| 460 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma); |
| 461 | } |
| 462 | } |
| 463 | |
| 464 | TEST(F32_DWCONV_SPCHW_3X3P1__NEONFMA, output_height_gt_1) { |
| 465 | TEST_REQUIRES_ARM_NEON_FMA; |
| 466 | for (size_t output_height = 2; output_height < 5; output_height++) { |
| 467 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 468 | DWConvSpCHWMicrokernelTester() |
| 469 | .input_tuple_size(4) |
| 470 | .output_tuple_size(4) |
| 471 | .input_width(input_width) |
| 472 | .padding_left(1) |
| 473 | .padding_right(1) |
| 474 | .kernel_height(3) |
| 475 | .kernel_width(3) |
| 476 | .output_height(output_height) |
| 477 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma); |
| 478 | } |
| 479 | } |
| 480 | } |
| 481 | |
| 482 | TEST(F32_DWCONV_SPCHW_3X3P1__NEONFMA, output_width_stride) { |
| 483 | TEST_REQUIRES_ARM_NEON_FMA; |
| 484 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 485 | DWConvSpCHWMicrokernelTester() |
| 486 | .input_tuple_size(4) |
| 487 | .output_tuple_size(4) |
| 488 | .input_width(input_width) |
| 489 | .padding_left(1) |
| 490 | .padding_right(1) |
| 491 | .kernel_height(3) |
| 492 | .kernel_width(3) |
| 493 | .output_height(5) |
| 494 | .output_width_stride(36) |
| 495 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma); |
| 496 | } |
| 497 | } |
| 498 | |
| 499 | TEST(F32_DWCONV_SPCHW_3X3P1__NEONFMA, output_tuple_stride) { |
| 500 | TEST_REQUIRES_ARM_NEON_FMA; |
| 501 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 502 | DWConvSpCHWMicrokernelTester() |
| 503 | .input_tuple_size(4) |
| 504 | .output_tuple_size(4) |
| 505 | .input_width(input_width) |
| 506 | .padding_left(1) |
| 507 | .padding_right(1) |
| 508 | .kernel_height(3) |
| 509 | .kernel_width(3) |
| 510 | .output_height(5) |
| 511 | .output_width_stride(4) |
| 512 | .output_tuple_stride(5 * 4) |
| 513 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma); |
| 514 | } |
| 515 | } |
| 516 | |
| 517 | TEST(F32_DWCONV_SPCHW_3X3P1__NEONFMA, chw_layout) { |
| 518 | TEST_REQUIRES_ARM_NEON_FMA; |
| 519 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 520 | DWConvSpCHWMicrokernelTester() |
| 521 | .input_tuple_size(4) |
| 522 | .output_tuple_size(4) |
| 523 | .input_width(input_width) |
| 524 | .input_width_stride(input_width) |
| 525 | .padding_left(1) |
| 526 | .padding_right(1) |
| 527 | .kernel_height(3) |
| 528 | .kernel_width(3) |
| 529 | .output_height(5) |
| 530 | .output_width_stride(input_width) |
| 531 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma); |
| 532 | } |
| 533 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 534 | #endif // XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 535 | |
| 536 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 537 | #if XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 538 | TEST(F32_DWCONV_SPCHW_3X3S2P1__NEONFMA, input_width_eq_4) { |
| 539 | TEST_REQUIRES_ARM_NEON_FMA; |
| 540 | DWConvSpCHWMicrokernelTester() |
| 541 | .input_tuple_size(4) |
| 542 | .output_tuple_size(4) |
| 543 | .input_width(4) |
| 544 | .padding_left(1) |
| 545 | .padding_right(1) |
| 546 | .kernel_height(3) |
| 547 | .kernel_width(3) |
| 548 | .subsampling(2) |
| 549 | .output_height(1) |
| 550 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma); |
| 551 | } |
| 552 | |
| 553 | TEST(F32_DWCONV_SPCHW_3X3S2P1__NEONFMA, input_width_lt_4) { |
| 554 | TEST_REQUIRES_ARM_NEON_FMA; |
| 555 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 556 | DWConvSpCHWMicrokernelTester() |
| 557 | .input_tuple_size(4) |
| 558 | .output_tuple_size(4) |
| 559 | .input_width(input_width) |
| 560 | .padding_left(1) |
| 561 | .padding_right(1) |
| 562 | .kernel_height(3) |
| 563 | .kernel_width(3) |
| 564 | .subsampling(2) |
| 565 | .output_height(1) |
| 566 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma); |
| 567 | } |
| 568 | } |
| 569 | |
| 570 | TEST(F32_DWCONV_SPCHW_3X3S2P1__NEONFMA, input_width_gt_4) { |
| 571 | TEST_REQUIRES_ARM_NEON_FMA; |
| 572 | for (size_t input_width = 5; input_width < 8; input_width++) { |
| 573 | DWConvSpCHWMicrokernelTester() |
| 574 | .input_tuple_size(4) |
| 575 | .output_tuple_size(4) |
| 576 | .input_width(input_width) |
| 577 | .padding_left(1) |
| 578 | .padding_right(1) |
| 579 | .kernel_height(3) |
| 580 | .kernel_width(3) |
| 581 | .subsampling(2) |
| 582 | .output_height(1) |
| 583 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma); |
| 584 | } |
| 585 | } |
| 586 | |
| 587 | TEST(F32_DWCONV_SPCHW_3X3S2P1__NEONFMA, input_width_div_4) { |
| 588 | TEST_REQUIRES_ARM_NEON_FMA; |
| 589 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 590 | DWConvSpCHWMicrokernelTester() |
| 591 | .input_tuple_size(4) |
| 592 | .output_tuple_size(4) |
| 593 | .input_width(input_width) |
| 594 | .padding_left(1) |
| 595 | .padding_right(1) |
| 596 | .kernel_height(3) |
| 597 | .kernel_width(3) |
| 598 | .subsampling(2) |
| 599 | .output_height(1) |
| 600 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma); |
| 601 | } |
| 602 | } |
| 603 | |
| 604 | TEST(F32_DWCONV_SPCHW_3X3S2P1__NEONFMA, input_width_stride) { |
| 605 | TEST_REQUIRES_ARM_NEON_FMA; |
| 606 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 607 | DWConvSpCHWMicrokernelTester() |
| 608 | .input_tuple_size(4) |
| 609 | .output_tuple_size(4) |
| 610 | .input_width(input_width) |
| 611 | .input_width_stride(36) |
| 612 | .padding_left(1) |
| 613 | .padding_right(1) |
| 614 | .kernel_height(3) |
| 615 | .kernel_width(3) |
| 616 | .subsampling(2) |
| 617 | .output_height(1) |
| 618 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma); |
| 619 | } |
| 620 | } |
| 621 | |
| 622 | TEST(F32_DWCONV_SPCHW_3X3S2P1__NEONFMA, input_tuple_stride) { |
| 623 | TEST_REQUIRES_ARM_NEON_FMA; |
| 624 | for (size_t input_width = 1; input_width < 32; input_width += 5) { |
| 625 | DWConvSpCHWMicrokernelTester() |
| 626 | .input_tuple_size(4) |
| 627 | .output_tuple_size(4) |
| 628 | .input_width(input_width) |
| 629 | .input_width_stride(4) |
| 630 | .input_tuple_stride(3 * 4) |
| 631 | .padding_left(1) |
| 632 | .padding_right(1) |
| 633 | .kernel_height(3) |
| 634 | .kernel_width(3) |
| 635 | .subsampling(2) |
| 636 | .output_height(1) |
| 637 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma); |
| 638 | } |
| 639 | } |
| 640 | |
| 641 | TEST(F32_DWCONV_SPCHW_3X3S2P1__NEONFMA, output_height_gt_1) { |
| 642 | TEST_REQUIRES_ARM_NEON_FMA; |
| 643 | for (size_t output_height = 2; output_height < 5; output_height++) { |
| 644 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 645 | DWConvSpCHWMicrokernelTester() |
| 646 | .input_tuple_size(4) |
| 647 | .output_tuple_size(4) |
| 648 | .input_width(input_width) |
| 649 | .padding_left(1) |
| 650 | .padding_right(1) |
| 651 | .kernel_height(3) |
| 652 | .kernel_width(3) |
| 653 | .subsampling(2) |
| 654 | .output_height(output_height) |
| 655 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma); |
| 656 | } |
| 657 | } |
| 658 | } |
| 659 | |
| 660 | TEST(F32_DWCONV_SPCHW_3X3S2P1__NEONFMA, output_width_stride) { |
| 661 | TEST_REQUIRES_ARM_NEON_FMA; |
| 662 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 663 | DWConvSpCHWMicrokernelTester() |
| 664 | .input_tuple_size(4) |
| 665 | .output_tuple_size(4) |
| 666 | .input_width(input_width) |
| 667 | .padding_left(1) |
| 668 | .padding_right(1) |
| 669 | .kernel_height(3) |
| 670 | .kernel_width(3) |
| 671 | .subsampling(2) |
| 672 | .output_height(5) |
| 673 | .output_width_stride(36) |
| 674 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma); |
| 675 | } |
| 676 | } |
| 677 | |
| 678 | TEST(F32_DWCONV_SPCHW_3X3S2P1__NEONFMA, output_tuple_stride) { |
| 679 | TEST_REQUIRES_ARM_NEON_FMA; |
| 680 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 681 | DWConvSpCHWMicrokernelTester() |
| 682 | .input_tuple_size(4) |
| 683 | .output_tuple_size(4) |
| 684 | .input_width(input_width) |
| 685 | .padding_left(1) |
| 686 | .padding_right(1) |
| 687 | .kernel_height(3) |
| 688 | .kernel_width(3) |
| 689 | .subsampling(2) |
| 690 | .output_height(5) |
| 691 | .output_width_stride(4) |
| 692 | .output_tuple_stride(5 * 4) |
| 693 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma); |
| 694 | } |
| 695 | } |
| 696 | |
| 697 | TEST(F32_DWCONV_SPCHW_3X3S2P1__NEONFMA, chw_layout) { |
| 698 | TEST_REQUIRES_ARM_NEON_FMA; |
| 699 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 700 | DWConvSpCHWMicrokernelTester() |
| 701 | .input_tuple_size(4) |
| 702 | .output_tuple_size(4) |
| 703 | .input_width(input_width) |
| 704 | .input_width_stride(input_width) |
| 705 | .padding_left(1) |
| 706 | .padding_right(1) |
| 707 | .kernel_height(3) |
| 708 | .kernel_width(3) |
| 709 | .subsampling(2) |
| 710 | .output_height(5) |
| 711 | .output_width_stride((input_width - 1) / 2 + 1) |
| 712 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma); |
| 713 | } |
| 714 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 715 | #endif // XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 716 | |
| 717 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 718 | #if XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 719 | TEST(F32_DWCONV_SPCHW_5X5P2__NEONFMA, input_width_eq_4) { |
| 720 | TEST_REQUIRES_ARM_NEON_FMA; |
| 721 | DWConvSpCHWMicrokernelTester() |
| 722 | .input_tuple_size(4) |
| 723 | .output_tuple_size(4) |
| 724 | .input_width(4) |
| 725 | .padding_left(2) |
| 726 | .padding_right(2) |
| 727 | .kernel_height(5) |
| 728 | .kernel_width(5) |
| 729 | .output_height(1) |
| 730 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma); |
| 731 | } |
| 732 | |
| 733 | TEST(F32_DWCONV_SPCHW_5X5P2__NEONFMA, input_width_lt_4) { |
| 734 | TEST_REQUIRES_ARM_NEON_FMA; |
| 735 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 736 | DWConvSpCHWMicrokernelTester() |
| 737 | .input_tuple_size(4) |
| 738 | .output_tuple_size(4) |
| 739 | .input_width(input_width) |
| 740 | .padding_left(2) |
| 741 | .padding_right(2) |
| 742 | .kernel_height(5) |
| 743 | .kernel_width(5) |
| 744 | .output_height(1) |
| 745 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma); |
| 746 | } |
| 747 | } |
| 748 | |
| 749 | TEST(F32_DWCONV_SPCHW_5X5P2__NEONFMA, input_width_gt_4) { |
| 750 | TEST_REQUIRES_ARM_NEON_FMA; |
| 751 | for (size_t input_width = 5; input_width < 8; input_width++) { |
| 752 | DWConvSpCHWMicrokernelTester() |
| 753 | .input_tuple_size(4) |
| 754 | .output_tuple_size(4) |
| 755 | .input_width(input_width) |
| 756 | .padding_left(2) |
| 757 | .padding_right(2) |
| 758 | .kernel_height(5) |
| 759 | .kernel_width(5) |
| 760 | .output_height(1) |
| 761 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma); |
| 762 | } |
| 763 | } |
| 764 | |
| 765 | TEST(F32_DWCONV_SPCHW_5X5P2__NEONFMA, input_width_div_4) { |
| 766 | TEST_REQUIRES_ARM_NEON_FMA; |
| 767 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 768 | DWConvSpCHWMicrokernelTester() |
| 769 | .input_tuple_size(4) |
| 770 | .output_tuple_size(4) |
| 771 | .input_width(input_width) |
| 772 | .padding_left(2) |
| 773 | .padding_right(2) |
| 774 | .kernel_height(5) |
| 775 | .kernel_width(5) |
| 776 | .output_height(1) |
| 777 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma); |
| 778 | } |
| 779 | } |
| 780 | |
| 781 | TEST(F32_DWCONV_SPCHW_5X5P2__NEONFMA, input_width_stride) { |
| 782 | TEST_REQUIRES_ARM_NEON_FMA; |
| 783 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 784 | DWConvSpCHWMicrokernelTester() |
| 785 | .input_tuple_size(4) |
| 786 | .output_tuple_size(4) |
| 787 | .input_width(input_width) |
| 788 | .input_width_stride(36) |
| 789 | .padding_left(2) |
| 790 | .padding_right(2) |
| 791 | .kernel_height(5) |
| 792 | .kernel_width(5) |
| 793 | .output_height(1) |
| 794 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma); |
| 795 | } |
| 796 | } |
| 797 | |
| 798 | TEST(F32_DWCONV_SPCHW_5X5P2__NEONFMA, input_tuple_stride) { |
| 799 | TEST_REQUIRES_ARM_NEON_FMA; |
| 800 | for (size_t input_width = 1; input_width < 32; input_width += 5) { |
| 801 | DWConvSpCHWMicrokernelTester() |
| 802 | .input_tuple_size(4) |
| 803 | .output_tuple_size(4) |
| 804 | .input_width(input_width) |
| 805 | .input_width_stride(4) |
| 806 | .input_tuple_stride(3 * 4) |
| 807 | .padding_left(2) |
| 808 | .padding_right(2) |
| 809 | .kernel_height(5) |
| 810 | .kernel_width(5) |
| 811 | .output_height(1) |
| 812 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma); |
| 813 | } |
| 814 | } |
| 815 | |
Erich Elsen | 4ad5115 | 2019-11-19 13:11:53 -0800 | [diff] [blame] | 816 | TEST(F32_DWCONV_SPCHW_5X5P2__NEONFMA, output_height_eq_2) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 817 | TEST_REQUIRES_ARM_NEON_FMA; |
Erich Elsen | 4ad5115 | 2019-11-19 13:11:53 -0800 | [diff] [blame] | 818 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 819 | DWConvSpCHWMicrokernelTester() |
| 820 | .input_tuple_size(4) |
| 821 | .output_tuple_size(4) |
| 822 | .input_width(input_width) |
| 823 | .padding_left(2) |
| 824 | .padding_right(2) |
| 825 | .kernel_height(5) |
| 826 | .kernel_width(5) |
| 827 | .output_height(2) |
| 828 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma); |
| 829 | } |
| 830 | } |
| 831 | |
| 832 | TEST(F32_DWCONV_SPCHW_5X5P2__NEONFMA, output_height_gt_2) { |
| 833 | TEST_REQUIRES_ARM_NEON_FMA; |
| 834 | for (size_t output_height = 3; output_height < 5; output_height++) { |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 835 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 836 | DWConvSpCHWMicrokernelTester() |
| 837 | .input_tuple_size(4) |
| 838 | .output_tuple_size(4) |
| 839 | .input_width(input_width) |
| 840 | .padding_left(2) |
| 841 | .padding_right(2) |
| 842 | .kernel_height(5) |
| 843 | .kernel_width(5) |
| 844 | .output_height(output_height) |
| 845 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma); |
| 846 | } |
| 847 | } |
| 848 | } |
| 849 | |
| 850 | TEST(F32_DWCONV_SPCHW_5X5P2__NEONFMA, output_width_stride) { |
| 851 | TEST_REQUIRES_ARM_NEON_FMA; |
| 852 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 853 | DWConvSpCHWMicrokernelTester() |
| 854 | .input_tuple_size(4) |
| 855 | .output_tuple_size(4) |
| 856 | .input_width(input_width) |
| 857 | .padding_left(2) |
| 858 | .padding_right(2) |
| 859 | .kernel_height(5) |
| 860 | .kernel_width(5) |
| 861 | .output_height(5) |
| 862 | .output_width_stride(36) |
| 863 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma); |
| 864 | } |
| 865 | } |
| 866 | |
| 867 | TEST(F32_DWCONV_SPCHW_5X5P2__NEONFMA, output_tuple_stride) { |
| 868 | TEST_REQUIRES_ARM_NEON_FMA; |
| 869 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 870 | DWConvSpCHWMicrokernelTester() |
| 871 | .input_tuple_size(4) |
| 872 | .output_tuple_size(4) |
| 873 | .input_width(input_width) |
| 874 | .padding_left(2) |
| 875 | .padding_right(2) |
| 876 | .kernel_height(5) |
| 877 | .kernel_width(5) |
| 878 | .output_height(5) |
| 879 | .output_width_stride(4) |
| 880 | .output_tuple_stride(5 * 4) |
| 881 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma); |
| 882 | } |
| 883 | } |
| 884 | |
| 885 | TEST(F32_DWCONV_SPCHW_5X5P2__NEONFMA, chw_layout) { |
| 886 | TEST_REQUIRES_ARM_NEON_FMA; |
| 887 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 888 | for (size_t output_height = 1; output_height < 32; output_height += 3) { |
| 889 | DWConvSpCHWMicrokernelTester() |
| 890 | .input_tuple_size(4) |
| 891 | .output_tuple_size(4) |
| 892 | .input_width(input_width) |
| 893 | .input_width_stride(input_width) |
| 894 | .padding_left(2) |
| 895 | .padding_right(2) |
| 896 | .kernel_height(5) |
| 897 | .kernel_width(5) |
| 898 | .output_height(5) |
| 899 | .output_width_stride(input_width) |
| 900 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma); |
| 901 | } |
| 902 | } |
| 903 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 904 | #endif // XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 905 | |
| 906 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 907 | #if XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 908 | TEST(F32_DWCONV_SPCHW_5X5S2P2__NEONFMA, input_width_eq_8) { |
| 909 | TEST_REQUIRES_ARM_NEON_FMA; |
| 910 | DWConvSpCHWMicrokernelTester() |
| 911 | .input_tuple_size(4) |
| 912 | .output_tuple_size(4) |
| 913 | .input_width(8) |
| 914 | .padding_left(2) |
| 915 | .padding_right(2) |
| 916 | .kernel_height(5) |
| 917 | .kernel_width(5) |
| 918 | .subsampling(2) |
| 919 | .output_height(1) |
| 920 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma); |
| 921 | } |
| 922 | |
| 923 | TEST(F32_DWCONV_SPCHW_5X5S2P2__NEONFMA, input_width_lt_8) { |
| 924 | TEST_REQUIRES_ARM_NEON_FMA; |
| 925 | for (size_t input_width = 1; input_width < 8; input_width++) { |
| 926 | DWConvSpCHWMicrokernelTester() |
| 927 | .input_tuple_size(4) |
| 928 | .output_tuple_size(4) |
| 929 | .input_width(input_width) |
| 930 | .padding_left(2) |
| 931 | .padding_right(2) |
| 932 | .kernel_height(5) |
| 933 | .kernel_width(5) |
| 934 | .subsampling(2) |
| 935 | .output_height(1) |
| 936 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma); |
| 937 | } |
| 938 | } |
| 939 | |
| 940 | TEST(F32_DWCONV_SPCHW_5X5S2P2__NEONFMA, input_width_gt_8) { |
| 941 | TEST_REQUIRES_ARM_NEON_FMA; |
| 942 | for (size_t input_width = 8; input_width < 16; input_width++) { |
| 943 | DWConvSpCHWMicrokernelTester() |
| 944 | .input_tuple_size(4) |
| 945 | .output_tuple_size(4) |
| 946 | .input_width(input_width) |
| 947 | .padding_left(2) |
| 948 | .padding_right(2) |
| 949 | .kernel_height(5) |
| 950 | .kernel_width(5) |
| 951 | .subsampling(2) |
| 952 | .output_height(1) |
| 953 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma); |
| 954 | } |
| 955 | } |
| 956 | |
| 957 | TEST(F32_DWCONV_SPCHW_5X5S2P2__NEONFMA, input_width_div_4) { |
| 958 | TEST_REQUIRES_ARM_NEON_FMA; |
| 959 | for (size_t input_width = 16; input_width < 32; input_width += 4) { |
| 960 | DWConvSpCHWMicrokernelTester() |
| 961 | .input_tuple_size(4) |
| 962 | .output_tuple_size(4) |
| 963 | .input_width(input_width) |
| 964 | .padding_left(2) |
| 965 | .padding_right(2) |
| 966 | .kernel_height(5) |
| 967 | .kernel_width(5) |
| 968 | .subsampling(2) |
| 969 | .output_height(1) |
| 970 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma); |
| 971 | } |
| 972 | } |
| 973 | |
| 974 | TEST(F32_DWCONV_SPCHW_5X5S2P2__NEONFMA, input_width_stride) { |
| 975 | TEST_REQUIRES_ARM_NEON_FMA; |
| 976 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 977 | DWConvSpCHWMicrokernelTester() |
| 978 | .input_tuple_size(4) |
| 979 | .output_tuple_size(4) |
| 980 | .input_width(input_width) |
| 981 | .input_width_stride(36) |
| 982 | .padding_left(2) |
| 983 | .padding_right(2) |
| 984 | .kernel_height(5) |
| 985 | .kernel_width(5) |
| 986 | .subsampling(2) |
| 987 | .output_height(1) |
| 988 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma); |
| 989 | } |
| 990 | } |
| 991 | |
| 992 | TEST(F32_DWCONV_SPCHW_5X5S2P2__NEONFMA, input_tuple_stride) { |
| 993 | TEST_REQUIRES_ARM_NEON_FMA; |
| 994 | for (size_t input_width = 1; input_width < 32; input_width += 5) { |
| 995 | DWConvSpCHWMicrokernelTester() |
| 996 | .input_tuple_size(4) |
| 997 | .output_tuple_size(4) |
| 998 | .input_width(input_width) |
| 999 | .input_width_stride(4) |
| 1000 | .input_tuple_stride(3 * 4) |
| 1001 | .padding_left(2) |
| 1002 | .padding_right(2) |
| 1003 | .kernel_height(5) |
| 1004 | .kernel_width(5) |
| 1005 | .subsampling(2) |
| 1006 | .output_height(1) |
| 1007 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma); |
| 1008 | } |
| 1009 | } |
| 1010 | |
| 1011 | TEST(F32_DWCONV_SPCHW_5X5S2P2__NEONFMA, output_height_gt_1) { |
| 1012 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1013 | for (size_t output_height = 3; output_height < 4; output_height++) { |
| 1014 | for (size_t input_width = 4; input_width < 5; input_width += 3) { |
| 1015 | DWConvSpCHWMicrokernelTester() |
| 1016 | .input_tuple_size(4) |
| 1017 | .output_tuple_size(4) |
| 1018 | .input_width(input_width) |
| 1019 | .padding_left(2) |
| 1020 | .padding_right(2) |
| 1021 | .kernel_height(5) |
| 1022 | .kernel_width(5) |
| 1023 | .subsampling(2) |
| 1024 | .output_height(output_height) |
| 1025 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma); |
| 1026 | } |
| 1027 | } |
| 1028 | } |
| 1029 | |
| 1030 | TEST(F32_DWCONV_SPCHW_5X5S2P2__NEONFMA, output_width_stride) { |
| 1031 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1032 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1033 | DWConvSpCHWMicrokernelTester() |
| 1034 | .input_tuple_size(4) |
| 1035 | .output_tuple_size(4) |
| 1036 | .input_width(input_width) |
| 1037 | .padding_left(2) |
| 1038 | .padding_right(2) |
| 1039 | .kernel_height(5) |
| 1040 | .kernel_width(5) |
| 1041 | .subsampling(2) |
| 1042 | .output_height(5) |
| 1043 | .output_width_stride(36) |
| 1044 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma); |
| 1045 | } |
| 1046 | } |
| 1047 | |
| 1048 | TEST(F32_DWCONV_SPCHW_5X5S2P2__NEONFMA, output_tuple_stride) { |
| 1049 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1050 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1051 | DWConvSpCHWMicrokernelTester() |
| 1052 | .input_tuple_size(4) |
| 1053 | .output_tuple_size(4) |
| 1054 | .input_width(input_width) |
| 1055 | .padding_left(2) |
| 1056 | .padding_right(2) |
| 1057 | .kernel_height(5) |
| 1058 | .kernel_width(5) |
| 1059 | .subsampling(2) |
| 1060 | .output_height(5) |
| 1061 | .output_width_stride(4) |
| 1062 | .output_tuple_stride(5 * 4) |
| 1063 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma); |
| 1064 | } |
| 1065 | } |
| 1066 | |
| 1067 | TEST(F32_DWCONV_SPCHW_5X5S2P2__NEONFMA, chw_layout) { |
| 1068 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1069 | for (size_t input_width = 1; input_width < 32; input_width += 1) { |
| 1070 | DWConvSpCHWMicrokernelTester() |
| 1071 | .input_tuple_size(4) |
| 1072 | .output_tuple_size(4) |
| 1073 | .input_width(input_width) |
| 1074 | .input_width_stride(input_width) |
| 1075 | .padding_left(2) |
| 1076 | .padding_right(2) |
| 1077 | .kernel_height(5) |
| 1078 | .kernel_width(5) |
| 1079 | .subsampling(2) |
| 1080 | .output_height(5) |
| 1081 | .output_width_stride((input_width - 1) / 2 + 1) |
| 1082 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma); |
| 1083 | } |
| 1084 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 1085 | #endif // XNN_ARCH_ARM64 |
Erich Elsen | 0cc2c53 | 2019-10-15 04:44:18 -0700 | [diff] [blame] | 1086 | |
| 1087 | TEST(F32_DWCONV_SPCHW_3X3P1__SCALAR, input_width_eq_1) { |
| 1088 | DWConvSpCHWMicrokernelTester() |
| 1089 | .input_tuple_size(1) |
| 1090 | .output_tuple_size(1) |
| 1091 | .input_width(1) |
| 1092 | .padding_left(1) |
| 1093 | .padding_right(1) |
| 1094 | .kernel_height(3) |
| 1095 | .kernel_width(3) |
| 1096 | .output_height(1) |
| 1097 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1098 | } |
| 1099 | |
| 1100 | TEST(F32_DWCONV_SPCHW_3X3P1__SCALAR, input_width_gt_1) { |
| 1101 | for (size_t input_width = 2; input_width < 32; input_width++) { |
| 1102 | DWConvSpCHWMicrokernelTester() |
| 1103 | .input_tuple_size(1) |
| 1104 | .output_tuple_size(1) |
| 1105 | .input_width(input_width) |
| 1106 | .padding_left(1) |
| 1107 | .padding_right(1) |
| 1108 | .kernel_height(3) |
| 1109 | .kernel_width(3) |
| 1110 | .output_height(1) |
| 1111 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1112 | } |
| 1113 | } |
| 1114 | |
| 1115 | TEST(F32_DWCONV_SPCHW_3X3P1__SCALAR, input_width_stride) { |
| 1116 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1117 | DWConvSpCHWMicrokernelTester() |
| 1118 | .input_tuple_size(1) |
| 1119 | .output_tuple_size(1) |
| 1120 | .input_width(input_width) |
| 1121 | .input_width_stride(36) |
| 1122 | .padding_left(1) |
| 1123 | .padding_right(1) |
| 1124 | .kernel_height(3) |
| 1125 | .kernel_width(3) |
| 1126 | .output_height(1) |
| 1127 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1128 | } |
| 1129 | } |
| 1130 | |
| 1131 | TEST(F32_DWCONV_SPCHW_3X3P1__SCALAR, input_tuple_stride) { |
| 1132 | for (size_t input_width = 1; input_width < 32; input_width += 5) { |
| 1133 | DWConvSpCHWMicrokernelTester() |
| 1134 | .input_tuple_size(1) |
| 1135 | .output_tuple_size(1) |
| 1136 | .input_width(input_width) |
| 1137 | .input_width_stride(4) |
| 1138 | .input_tuple_stride(3 * 4) |
| 1139 | .padding_left(1) |
| 1140 | .padding_right(1) |
| 1141 | .kernel_height(3) |
| 1142 | .kernel_width(3) |
| 1143 | .output_height(1) |
| 1144 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1145 | } |
| 1146 | } |
| 1147 | |
| 1148 | TEST(F32_DWCONV_SPCHW_3X3P1__SCALAR, output_height_gt_1) { |
| 1149 | for (size_t output_height = 2; output_height < 5; output_height++) { |
| 1150 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1151 | DWConvSpCHWMicrokernelTester() |
| 1152 | .input_tuple_size(1) |
| 1153 | .output_tuple_size(1) |
| 1154 | .input_width(input_width) |
| 1155 | .padding_left(1) |
| 1156 | .padding_right(1) |
| 1157 | .kernel_height(3) |
| 1158 | .kernel_width(3) |
| 1159 | .output_height(output_height) |
| 1160 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1161 | } |
| 1162 | } |
| 1163 | } |
| 1164 | |
| 1165 | TEST(F32_DWCONV_SPCHW_3X3P1__SCALAR, output_width_stride) { |
| 1166 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1167 | DWConvSpCHWMicrokernelTester() |
| 1168 | .input_tuple_size(1) |
| 1169 | .output_tuple_size(1) |
| 1170 | .input_width(input_width) |
| 1171 | .padding_left(1) |
| 1172 | .padding_right(1) |
| 1173 | .kernel_height(3) |
| 1174 | .kernel_width(3) |
| 1175 | .output_height(5) |
| 1176 | .output_width_stride(36) |
| 1177 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1178 | } |
| 1179 | } |
| 1180 | |
| 1181 | TEST(F32_DWCONV_SPCHW_3X3P1__SCALAR, output_tuple_stride) { |
| 1182 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1183 | DWConvSpCHWMicrokernelTester() |
| 1184 | .input_tuple_size(1) |
| 1185 | .output_tuple_size(1) |
| 1186 | .input_width(input_width) |
| 1187 | .padding_left(1) |
| 1188 | .padding_right(1) |
| 1189 | .kernel_height(3) |
| 1190 | .kernel_width(3) |
| 1191 | .output_height(5) |
| 1192 | .output_width_stride(4) |
| 1193 | .output_tuple_stride(5 * 4) |
| 1194 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1195 | } |
| 1196 | } |
| 1197 | |
| 1198 | TEST(F32_DWCONV_SPCHW_3X3P1__SCALAR, chw_layout) { |
| 1199 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1200 | DWConvSpCHWMicrokernelTester() |
| 1201 | .input_tuple_size(1) |
| 1202 | .output_tuple_size(1) |
| 1203 | .input_width(input_width) |
| 1204 | .input_width_stride(input_width) |
| 1205 | .padding_left(1) |
| 1206 | .padding_right(1) |
| 1207 | .kernel_height(3) |
| 1208 | .kernel_width(3) |
| 1209 | .output_height(5) |
| 1210 | .output_width_stride(input_width) |
| 1211 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1212 | } |
| 1213 | } |
Erich Elsen | ac4de80 | 2019-10-16 04:35:30 -0700 | [diff] [blame] | 1214 | |
| 1215 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SCALAR, input_width_eq_1) { |
| 1216 | DWConvSpCHWMicrokernelTester() |
| 1217 | .input_tuple_size(1) |
| 1218 | .output_tuple_size(1) |
| 1219 | .input_width(1) |
| 1220 | .padding_left(1) |
| 1221 | .padding_right(1) |
| 1222 | .kernel_height(3) |
| 1223 | .kernel_width(3) |
| 1224 | .subsampling(2) |
| 1225 | .output_height(1) |
| 1226 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1227 | } |
| 1228 | |
| 1229 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SCALAR, input_width_gt_1) { |
| 1230 | for (size_t input_width = 2; input_width < 32; input_width++) { |
| 1231 | DWConvSpCHWMicrokernelTester() |
| 1232 | .input_tuple_size(1) |
| 1233 | .output_tuple_size(1) |
| 1234 | .input_width(input_width) |
| 1235 | .padding_left(1) |
| 1236 | .padding_right(1) |
| 1237 | .kernel_height(3) |
| 1238 | .kernel_width(3) |
| 1239 | .subsampling(2) |
| 1240 | .output_height(1) |
| 1241 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1242 | } |
| 1243 | } |
| 1244 | |
| 1245 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SCALAR, input_width_stride) { |
| 1246 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1247 | DWConvSpCHWMicrokernelTester() |
| 1248 | .input_tuple_size(1) |
| 1249 | .output_tuple_size(1) |
| 1250 | .input_width(input_width) |
| 1251 | .input_width_stride(36) |
| 1252 | .padding_left(1) |
| 1253 | .padding_right(1) |
| 1254 | .kernel_height(3) |
| 1255 | .kernel_width(3) |
| 1256 | .subsampling(2) |
| 1257 | .output_height(1) |
| 1258 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1259 | } |
| 1260 | } |
| 1261 | |
| 1262 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SCALAR, input_tuple_stride) { |
| 1263 | for (size_t input_width = 1; input_width < 32; input_width += 5) { |
| 1264 | DWConvSpCHWMicrokernelTester() |
| 1265 | .input_tuple_size(1) |
| 1266 | .output_tuple_size(1) |
| 1267 | .input_width(input_width) |
| 1268 | .input_width_stride(4) |
| 1269 | .input_tuple_stride(3 * 4) |
| 1270 | .padding_left(1) |
| 1271 | .padding_right(1) |
| 1272 | .kernel_height(3) |
| 1273 | .kernel_width(3) |
| 1274 | .subsampling(2) |
| 1275 | .output_height(1) |
| 1276 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1277 | } |
| 1278 | } |
| 1279 | |
| 1280 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SCALAR, output_height_gt_1) { |
| 1281 | for (size_t output_height = 2; output_height < 5; output_height++) { |
| 1282 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1283 | DWConvSpCHWMicrokernelTester() |
| 1284 | .input_tuple_size(1) |
| 1285 | .output_tuple_size(1) |
| 1286 | .input_width(input_width) |
| 1287 | .padding_left(1) |
| 1288 | .padding_right(1) |
| 1289 | .kernel_height(3) |
| 1290 | .kernel_width(3) |
| 1291 | .subsampling(2) |
| 1292 | .output_height(output_height) |
| 1293 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1294 | } |
| 1295 | } |
| 1296 | } |
| 1297 | |
| 1298 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SCALAR, output_width_stride) { |
| 1299 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1300 | DWConvSpCHWMicrokernelTester() |
| 1301 | .input_tuple_size(1) |
| 1302 | .output_tuple_size(1) |
| 1303 | .input_width(input_width) |
| 1304 | .padding_left(1) |
| 1305 | .padding_right(1) |
| 1306 | .kernel_height(3) |
| 1307 | .kernel_width(3) |
| 1308 | .subsampling(2) |
| 1309 | .output_height(5) |
| 1310 | .output_width_stride(36) |
| 1311 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1312 | } |
| 1313 | } |
| 1314 | |
| 1315 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SCALAR, output_tuple_stride) { |
| 1316 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1317 | DWConvSpCHWMicrokernelTester() |
| 1318 | .input_tuple_size(1) |
| 1319 | .output_tuple_size(1) |
| 1320 | .input_width(input_width) |
| 1321 | .padding_left(1) |
| 1322 | .padding_right(1) |
| 1323 | .kernel_height(3) |
| 1324 | .kernel_width(3) |
| 1325 | .subsampling(2) |
| 1326 | .output_height(5) |
| 1327 | .output_width_stride(4) |
| 1328 | .output_tuple_stride(5 * 4) |
| 1329 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1330 | } |
| 1331 | } |
| 1332 | |
| 1333 | TEST(F32_DWCONV_SPCHW_3X3S2P1__SCALAR, chw_layout) { |
| 1334 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1335 | DWConvSpCHWMicrokernelTester() |
| 1336 | .input_tuple_size(1) |
| 1337 | .output_tuple_size(1) |
| 1338 | .input_width(input_width) |
| 1339 | .input_width_stride(input_width) |
| 1340 | .padding_left(1) |
| 1341 | .padding_right(1) |
| 1342 | .kernel_height(3) |
| 1343 | .kernel_width(3) |
| 1344 | .subsampling(2) |
| 1345 | .output_height(5) |
| 1346 | .output_width_stride(input_width) |
| 1347 | .Test(xnn_f32_dwconv_spchw_ukernel_3x3s2p1__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1348 | } |
| 1349 | } |
Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 1350 | |
| 1351 | TEST(F32_DWCONV_SPCHW_5X5P2__SCALAR, input_width_eq_1) { |
| 1352 | DWConvSpCHWMicrokernelTester() |
| 1353 | .input_tuple_size(1) |
| 1354 | .output_tuple_size(1) |
| 1355 | .input_width(1) |
| 1356 | .padding_left(2) |
| 1357 | .padding_right(2) |
| 1358 | .kernel_height(5) |
| 1359 | .kernel_width(5) |
| 1360 | .output_height(1) |
| 1361 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1362 | } |
| 1363 | |
| 1364 | TEST(F32_DWCONV_SPCHW_5X5P2__SCALAR, input_width_gt_1) { |
| 1365 | for (size_t input_width = 2; input_width < 32; input_width++) { |
| 1366 | DWConvSpCHWMicrokernelTester() |
| 1367 | .input_tuple_size(1) |
| 1368 | .output_tuple_size(1) |
| 1369 | .input_width(input_width) |
| 1370 | .padding_left(2) |
| 1371 | .padding_right(2) |
| 1372 | .kernel_height(5) |
| 1373 | .kernel_width(5) |
| 1374 | .output_height(1) |
| 1375 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1376 | } |
| 1377 | } |
| 1378 | |
| 1379 | TEST(F32_DWCONV_SPCHW_5X5P2__SCALAR, input_width_stride) { |
| 1380 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1381 | DWConvSpCHWMicrokernelTester() |
| 1382 | .input_tuple_size(1) |
| 1383 | .output_tuple_size(1) |
| 1384 | .input_width(input_width) |
| 1385 | .input_width_stride(36) |
| 1386 | .padding_left(2) |
| 1387 | .padding_right(2) |
| 1388 | .kernel_height(5) |
| 1389 | .kernel_width(5) |
| 1390 | .output_height(1) |
| 1391 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1392 | } |
| 1393 | } |
| 1394 | |
| 1395 | TEST(F32_DWCONV_SPCHW_5X5P2__SCALAR, input_tuple_stride) { |
| 1396 | for (size_t input_width = 1; input_width < 32; input_width += 5) { |
| 1397 | DWConvSpCHWMicrokernelTester() |
| 1398 | .input_tuple_size(1) |
| 1399 | .output_tuple_size(1) |
| 1400 | .input_width(input_width) |
| 1401 | .input_width_stride(4) |
| 1402 | .input_tuple_stride(3 * 4) |
| 1403 | .padding_left(2) |
| 1404 | .padding_right(2) |
| 1405 | .kernel_height(5) |
| 1406 | .kernel_width(5) |
| 1407 | .output_height(1) |
| 1408 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1409 | } |
| 1410 | } |
| 1411 | |
| 1412 | TEST(F32_DWCONV_SPCHW_5X5P2__SCALAR, output_height_gt_1) { |
| 1413 | for (size_t output_height = 2; output_height < 5; output_height++) { |
| 1414 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1415 | DWConvSpCHWMicrokernelTester() |
| 1416 | .input_tuple_size(1) |
| 1417 | .output_tuple_size(1) |
| 1418 | .input_width(input_width) |
| 1419 | .padding_left(2) |
| 1420 | .padding_right(2) |
| 1421 | .kernel_height(5) |
| 1422 | .kernel_width(5) |
| 1423 | .output_height(output_height) |
| 1424 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1425 | } |
| 1426 | } |
| 1427 | } |
| 1428 | |
| 1429 | TEST(F32_DWCONV_SPCHW_5X5P2__SCALAR, output_width_stride) { |
| 1430 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1431 | DWConvSpCHWMicrokernelTester() |
| 1432 | .input_tuple_size(1) |
| 1433 | .output_tuple_size(1) |
| 1434 | .input_width(input_width) |
| 1435 | .padding_left(2) |
| 1436 | .padding_right(2) |
| 1437 | .kernel_height(5) |
| 1438 | .kernel_width(5) |
| 1439 | .output_height(5) |
| 1440 | .output_width_stride(36) |
| 1441 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1442 | } |
| 1443 | } |
| 1444 | |
| 1445 | TEST(F32_DWCONV_SPCHW_5X5P2__SCALAR, output_tuple_stride) { |
| 1446 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1447 | DWConvSpCHWMicrokernelTester() |
| 1448 | .input_tuple_size(1) |
| 1449 | .output_tuple_size(1) |
| 1450 | .input_width(input_width) |
| 1451 | .padding_left(2) |
| 1452 | .padding_right(2) |
| 1453 | .kernel_height(5) |
| 1454 | .kernel_width(5) |
| 1455 | .output_height(5) |
| 1456 | .output_width_stride(4) |
| 1457 | .output_tuple_stride(5 * 4) |
| 1458 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1459 | } |
| 1460 | } |
| 1461 | |
| 1462 | TEST(F32_DWCONV_SPCHW_5X5P2__SCALAR, chw_layout) { |
| 1463 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1464 | DWConvSpCHWMicrokernelTester() |
| 1465 | .input_tuple_size(1) |
| 1466 | .output_tuple_size(1) |
| 1467 | .input_width(input_width) |
| 1468 | .input_width_stride(input_width) |
| 1469 | .padding_left(2) |
| 1470 | .padding_right(2) |
| 1471 | .kernel_height(5) |
| 1472 | .kernel_width(5) |
| 1473 | .output_height(5) |
| 1474 | .output_width_stride(input_width) |
| 1475 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1476 | } |
| 1477 | } |
| 1478 | |
| 1479 | TEST(F32_DWCONV_SPCHW_5X5S2P2__SCALAR, input_width_eq_1) { |
| 1480 | DWConvSpCHWMicrokernelTester() |
| 1481 | .input_tuple_size(1) |
| 1482 | .output_tuple_size(1) |
| 1483 | .input_width(1) |
| 1484 | .padding_left(2) |
| 1485 | .padding_right(2) |
| 1486 | .kernel_height(5) |
| 1487 | .kernel_width(5) |
| 1488 | .output_height(1) |
| 1489 | .subsampling(2) |
| 1490 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1491 | } |
| 1492 | |
| 1493 | TEST(F32_DWCONV_SPCHW_5X5S2P2__SCALAR, input_width_gt_1) { |
| 1494 | for (size_t input_width = 2; input_width < 32; input_width++) { |
| 1495 | DWConvSpCHWMicrokernelTester() |
| 1496 | .input_tuple_size(1) |
| 1497 | .output_tuple_size(1) |
| 1498 | .input_width(input_width) |
| 1499 | .padding_left(2) |
| 1500 | .padding_right(2) |
| 1501 | .kernel_height(5) |
| 1502 | .kernel_width(5) |
| 1503 | .output_height(1) |
| 1504 | .subsampling(2) |
| 1505 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1506 | } |
| 1507 | } |
| 1508 | |
| 1509 | TEST(F32_DWCONV_SPCHW_5X5S2P2__SCALAR, input_width_stride) { |
| 1510 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1511 | DWConvSpCHWMicrokernelTester() |
| 1512 | .input_tuple_size(1) |
| 1513 | .output_tuple_size(1) |
| 1514 | .input_width(input_width) |
| 1515 | .input_width_stride(36) |
| 1516 | .padding_left(2) |
| 1517 | .padding_right(2) |
| 1518 | .kernel_height(5) |
| 1519 | .kernel_width(5) |
| 1520 | .output_height(1) |
| 1521 | .subsampling(2) |
| 1522 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1523 | } |
| 1524 | } |
| 1525 | |
| 1526 | TEST(F32_DWCONV_SPCHW_5X5S2P2__SCALAR, input_tuple_stride) { |
| 1527 | for (size_t input_width = 1; input_width < 32; input_width += 5) { |
| 1528 | DWConvSpCHWMicrokernelTester() |
| 1529 | .input_tuple_size(1) |
| 1530 | .output_tuple_size(1) |
| 1531 | .input_width(input_width) |
| 1532 | .input_width_stride(4) |
| 1533 | .input_tuple_stride(3 * 4) |
| 1534 | .padding_left(2) |
| 1535 | .padding_right(2) |
| 1536 | .kernel_height(5) |
| 1537 | .kernel_width(5) |
| 1538 | .output_height(1) |
| 1539 | .subsampling(2) |
| 1540 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1541 | } |
| 1542 | } |
| 1543 | |
| 1544 | TEST(F32_DWCONV_SPCHW_5X5S2P2__SCALAR, output_height_gt_1) { |
| 1545 | for (size_t output_height = 2; output_height < 5; output_height++) { |
| 1546 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1547 | DWConvSpCHWMicrokernelTester() |
| 1548 | .input_tuple_size(1) |
| 1549 | .output_tuple_size(1) |
| 1550 | .input_width(input_width) |
| 1551 | .padding_left(2) |
| 1552 | .padding_right(2) |
| 1553 | .kernel_height(5) |
| 1554 | .kernel_width(5) |
| 1555 | .output_height(output_height) |
| 1556 | .subsampling(2) |
| 1557 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1558 | } |
| 1559 | } |
| 1560 | } |
| 1561 | |
| 1562 | TEST(F32_DWCONV_SPCHW_5X5S2P2__SCALAR, output_width_stride) { |
| 1563 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1564 | DWConvSpCHWMicrokernelTester() |
| 1565 | .input_tuple_size(1) |
| 1566 | .output_tuple_size(1) |
| 1567 | .input_width(input_width) |
| 1568 | .padding_left(2) |
| 1569 | .padding_right(2) |
| 1570 | .kernel_height(5) |
| 1571 | .kernel_width(5) |
| 1572 | .output_height(5) |
| 1573 | .output_width_stride(36) |
| 1574 | .subsampling(2) |
| 1575 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1576 | } |
| 1577 | } |
| 1578 | |
| 1579 | TEST(F32_DWCONV_SPCHW_5X5S2P2__SCALAR, output_tuple_stride) { |
| 1580 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1581 | DWConvSpCHWMicrokernelTester() |
| 1582 | .input_tuple_size(1) |
| 1583 | .output_tuple_size(1) |
| 1584 | .input_width(input_width) |
| 1585 | .padding_left(2) |
| 1586 | .padding_right(2) |
| 1587 | .kernel_height(5) |
| 1588 | .kernel_width(5) |
| 1589 | .output_height(5) |
| 1590 | .output_width_stride(4) |
| 1591 | .output_tuple_stride(5 * 4) |
| 1592 | .subsampling(2) |
| 1593 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1594 | } |
| 1595 | } |
| 1596 | |
| 1597 | TEST(F32_DWCONV_SPCHW_5X5S2P2__SCALAR, chw_layout) { |
| 1598 | for (size_t input_width = 1; input_width < 32; input_width += 3) { |
| 1599 | DWConvSpCHWMicrokernelTester() |
| 1600 | .input_tuple_size(1) |
| 1601 | .output_tuple_size(1) |
| 1602 | .input_width(input_width) |
| 1603 | .input_width_stride(input_width) |
| 1604 | .padding_left(2) |
| 1605 | .padding_right(2) |
| 1606 | .kernel_height(5) |
| 1607 | .kernel_width(5) |
| 1608 | .output_height(5) |
| 1609 | .output_width_stride(input_width) |
| 1610 | .subsampling(2) |
| 1611 | .Test(xnn_f32_dwconv_spchw_ukernel_5x5s2p2__scalar, DWConvSpCHWMicrokernelTester::Variant::Scalar); |
| 1612 | } |
| 1613 | } |