| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 1 | // Copyright (C) 2020 The Android Open Source Project |
| 2 | // |
| 3 | // Licensed under the Apache License, Version 2.0 (the "License"); |
| 4 | // you may not use this file except in compliance with the License. |
| 5 | // You may obtain a copy of the License at |
| 6 | // |
| 7 | // http://www.apache.org/licenses/LICENSE-2.0 |
| 8 | // |
| 9 | // Unless required by applicable law or agreed to in writing, software |
| 10 | // distributed under the License is distributed on an "AS IS" BASIS, |
| 11 | // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 12 | // See the License for the specific language governing permissions and |
| 13 | // limitations under the License. |
| 14 | |
| Bob Badour | c011629 | 2021-02-12 20:34:13 -0800 | [diff] [blame] | 15 | package { |
| 16 | default_applicable_licenses: ["external_XNNPACK_license"], |
| 17 | } |
| 18 | |
| 19 | // Added automatically by a large-scale-change |
| 20 | // See: http://go/android-license-faq |
| 21 | license { |
| 22 | name: "external_XNNPACK_license", |
| 23 | visibility: [":__subpackages__"], |
| 24 | license_kinds: [ |
| 25 | "SPDX-license-identifier-BSD", |
| 26 | ], |
| 27 | license_text: [ |
| 28 | "LICENSE", |
| 29 | ], |
| 30 | } |
| 31 | |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 32 | OPERATOR_SRCS = [ |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 33 | "src/operators/argmax-pooling-nhwc.c", |
| 34 | "src/operators/average-pooling-nhwc.c", |
| 35 | "src/operators/binary-elementwise-nd.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 36 | "src/operators/channel-shuffle-nc.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 37 | "src/operators/constant-pad-nd.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 38 | "src/operators/convolution-nchw.c", |
| 39 | "src/operators/convolution-nhwc.c", |
| 40 | "src/operators/deconvolution-nhwc.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 41 | "src/operators/depth-to-space-nchw2nhwc.c", |
| 42 | "src/operators/depth-to-space-nhwc.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 43 | "src/operators/fully-connected-nc.c", |
| 44 | "src/operators/global-average-pooling-ncw.c", |
| 45 | "src/operators/global-average-pooling-nwc.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 46 | "src/operators/lut-elementwise-nc.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 47 | "src/operators/max-pooling-nhwc.c", |
| 48 | "src/operators/prelu-nc.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 49 | "src/operators/resize-bilinear-nchw.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 50 | "src/operators/resize-bilinear-nhwc.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 51 | "src/operators/softmax-nc.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 52 | "src/operators/unary-elementwise-nc.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 53 | "src/operators/unpooling-nhwc.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 54 | ] |
| 55 | |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 56 | LOGGING_SRCS = [ |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 57 | "src/datatype-strings.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 58 | "src/operator-strings.c", |
| 59 | "src/subgraph-strings.c", |
| 60 | ] |
| 61 | |
| 62 | SUBGRAPH_SRCS = [ |
| 63 | "src/subgraph/abs.c", |
| 64 | "src/subgraph/add2.c", |
| 65 | "src/subgraph/argmax-pooling-2d.c", |
| 66 | "src/subgraph/average-pooling-2d.c", |
| 67 | "src/subgraph/bankers-rounding.c", |
| 68 | "src/subgraph/ceiling.c", |
| 69 | "src/subgraph/clamp.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 70 | "src/subgraph/convert.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 71 | "src/subgraph/convolution-2d.c", |
| 72 | "src/subgraph/deconvolution-2d.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 73 | "src/subgraph/depth-to-space.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 74 | "src/subgraph/depthwise-convolution-2d.c", |
| 75 | "src/subgraph/divide.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 76 | "src/subgraph/elu.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 77 | "src/subgraph/floor.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 78 | "src/subgraph/fully-connected.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 79 | "src/subgraph/global-average-pooling-2d.c", |
| 80 | "src/subgraph/hardswish.c", |
| 81 | "src/subgraph/leaky-relu.c", |
| 82 | "src/subgraph/max-pooling-2d.c", |
| 83 | "src/subgraph/maximum2.c", |
| 84 | "src/subgraph/minimum2.c", |
| 85 | "src/subgraph/multiply2.c", |
| 86 | "src/subgraph/negate.c", |
| 87 | "src/subgraph/prelu.c", |
| 88 | "src/subgraph/sigmoid.c", |
| 89 | "src/subgraph/softmax.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 90 | "src/subgraph/square-root.c", |
| 91 | "src/subgraph/square.c", |
| 92 | "src/subgraph/squared-difference.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 93 | "src/subgraph/static-constant-pad.c", |
| 94 | "src/subgraph/static-reshape.c", |
| 95 | "src/subgraph/static-resize-bilinear-2d.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 96 | "src/subgraph/subtract.c", |
| 97 | "src/subgraph/unpooling-2d.c", |
| 98 | ] |
| 99 | |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 100 | TABLE_SRCS = [ |
| 101 | "src/tables/exp2-k-over-64.c", |
| 102 | "src/tables/exp2-k-over-2048.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 103 | "src/tables/exp2minus-k-over-4.c", |
| 104 | "src/tables/exp2minus-k-over-8.c", |
| 105 | "src/tables/exp2minus-k-over-16.c", |
| 106 | "src/tables/exp2minus-k-over-64.c", |
| 107 | "src/tables/exp2minus-k-over-2048.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 108 | ] |
| 109 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 110 | PROD_SCALAR_PORTABLE_MICROKERNEL_SRCS = [ |
| 111 | "src/params-init.c", |
| 112 | "src/u8-lut32norm/scalar.c", |
| 113 | "src/x8-lut/gen/lut-scalar-x4.c", |
| 114 | "src/x32-depthtospace2d-chw2hwc/scalar.c", |
| 115 | "src/xx-copy/memcpy.c", |
| 116 | ] |
| 117 | |
| 118 | PROD_SCALAR_AARCH32_MICROKERNEL_SRCS = [ |
| 119 | "src/f16-f32-vcvt/gen/vcvt-scalar-x4.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 120 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| 121 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| 122 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 123 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 124 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 125 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| 126 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 127 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 128 | "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| 129 | "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| 130 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| 131 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 132 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| 133 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 134 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| 135 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| 136 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c", |
| 137 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c", |
| 138 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c", |
| 139 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c", |
| 140 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c", |
| 141 | "src/f32-gavgpool-cw/scalar-x1.c", |
| 142 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 143 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| 144 | "src/f32-gemm/gen/1x4-minmax-scalar.c", |
| 145 | "src/f32-gemm/gen/1x4-relu-scalar.c", |
| 146 | "src/f32-gemm/gen/1x4-scalar.c", |
| 147 | "src/f32-gemm/gen/4x2-minmax-scalar.c", |
| 148 | "src/f32-gemm/gen/4x2-scalar.c", |
| 149 | "src/f32-gemm/gen/4x4-minmax-scalar.c", |
| 150 | "src/f32-gemm/gen/4x4-relu-scalar.c", |
| 151 | "src/f32-gemm/gen/4x4-scalar.c", |
| 152 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| 153 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 154 | "src/f32-igemm/gen/1x4-minmax-scalar.c", |
| 155 | "src/f32-igemm/gen/1x4-relu-scalar.c", |
| 156 | "src/f32-igemm/gen/1x4-scalar.c", |
| 157 | "src/f32-igemm/gen/4x2-minmax-scalar.c", |
| 158 | "src/f32-igemm/gen/4x2-scalar.c", |
| 159 | "src/f32-igemm/gen/4x4-minmax-scalar.c", |
| 160 | "src/f32-igemm/gen/4x4-relu-scalar.c", |
| 161 | "src/f32-igemm/gen/4x4-scalar.c", |
| 162 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 163 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 164 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| 165 | "src/f32-prelu/gen/scalar-2x4.c", |
| 166 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x4.c", |
| 167 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x4.c", |
| 168 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c", |
| 169 | "src/f32-rmax/scalar.c", |
| 170 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 171 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 172 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| 173 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| 174 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| 175 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c", |
| 176 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c", |
| 177 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| 178 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| 179 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| 180 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| 181 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| 182 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| 183 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c", |
| 184 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| 185 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| 186 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| 187 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| 188 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| 189 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| 190 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c", |
| 191 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| 192 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| 193 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 194 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| 195 | "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c", |
| 196 | "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c", |
| 197 | "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c", |
| 198 | "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c", |
| 199 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c", |
| 200 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 201 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 202 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 203 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| 204 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c", |
| 205 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c", |
| 206 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 207 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 208 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 209 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 210 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| 211 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| 212 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 213 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c1.c", |
| 214 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c1.c", |
| 215 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 216 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 217 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 218 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 219 | "src/qs8-vadd/gen/minmax-scalar-x1.c", |
| 220 | "src/qs8-vaddc/gen/minmax-scalar-x1.c", |
| 221 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 222 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 223 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 224 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| 225 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| 226 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| 227 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 228 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c1.c", |
| 229 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c1.c", |
| 230 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 231 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 232 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 233 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 234 | "src/qu8-vadd/gen/minmax-scalar-x1.c", |
| 235 | "src/qu8-vaddc/gen/minmax-scalar-x1.c", |
| 236 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 237 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 238 | "src/s8-ibilinear/gen/scalar-c1.c", |
| 239 | "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| 240 | "src/s8-vclamp/scalar-x4.c", |
| 241 | "src/u8-ibilinear/gen/scalar-c1.c", |
| 242 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| 243 | "src/u8-rmax/scalar.c", |
| 244 | "src/u8-vclamp/scalar-x4.c", |
| 245 | "src/x8-zip/x2-scalar.c", |
| 246 | "src/x8-zip/x3-scalar.c", |
| 247 | "src/x8-zip/x4-scalar.c", |
| 248 | "src/x8-zip/xm-scalar.c", |
| 249 | "src/x32-packx/x2-scalar.c", |
| 250 | "src/x32-packx/x3-scalar.c", |
| 251 | "src/x32-packx/x4-scalar.c", |
| 252 | "src/x32-unpool/scalar.c", |
| 253 | "src/x32-zip/x2-scalar.c", |
| 254 | "src/x32-zip/x3-scalar.c", |
| 255 | "src/x32-zip/x4-scalar.c", |
| 256 | "src/x32-zip/xm-scalar.c", |
| 257 | "src/xx-fill/scalar-x16.c", |
| 258 | "src/xx-pad/scalar.c", |
| 259 | ] |
| 260 | |
| 261 | PROD_SCALAR_WASM_MICROKERNEL_SRCS = [ |
| 262 | "src/f16-f32-vcvt/gen/vcvt-scalar-x1.c", |
| 263 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| 264 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| 265 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| 266 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 267 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| 268 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| 269 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| 270 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| 271 | "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| 272 | "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| 273 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| 274 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 275 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| 276 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 277 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| 278 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| 279 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c", |
| 280 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c", |
| 281 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c", |
| 282 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c", |
| 283 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x4.c", |
| 284 | "src/f32-gavgpool-cw/scalar-x1.c", |
| 285 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 286 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| 287 | "src/f32-gemm/gen/2x4-minmax-scalar.c", |
| 288 | "src/f32-gemm/gen/2x4-relu-scalar.c", |
| 289 | "src/f32-gemm/gen/2x4-scalar.c", |
| 290 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| 291 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 292 | "src/f32-igemm/gen/2x4-minmax-scalar.c", |
| 293 | "src/f32-igemm/gen/2x4-relu-scalar.c", |
| 294 | "src/f32-igemm/gen/2x4-scalar.c", |
| 295 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 296 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 297 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| 298 | "src/f32-prelu/gen/scalar-2x4.c", |
| 299 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x1.c", |
| 300 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x1.c", |
| 301 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c", |
| 302 | "src/f32-rmax/scalar.c", |
| 303 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 304 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 305 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| 306 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| 307 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| 308 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c", |
| 309 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c", |
| 310 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| 311 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| 312 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| 313 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| 314 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| 315 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| 316 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c", |
| 317 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| 318 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| 319 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| 320 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| 321 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| 322 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| 323 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c", |
| 324 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| 325 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| 326 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 327 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| 328 | "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c", |
| 329 | "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c", |
| 330 | "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c", |
| 331 | "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c", |
| 332 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c", |
| 333 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 334 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 335 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 336 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| 337 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| 338 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| 339 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 340 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 341 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 342 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 343 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| 344 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| 345 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| 346 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c4.c", |
| 347 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c4.c", |
| 348 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 349 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 350 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 351 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 352 | "src/qs8-vadd/gen/minmax-scalar-x4.c", |
| 353 | "src/qs8-vaddc/gen/minmax-scalar-x4.c", |
| 354 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 355 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 356 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 357 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| 358 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| 359 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| 360 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| 361 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c4.c", |
| 362 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c4.c", |
| 363 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 364 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 365 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 366 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 367 | "src/qu8-vadd/gen/minmax-scalar-x4.c", |
| 368 | "src/qu8-vaddc/gen/minmax-scalar-x4.c", |
| 369 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 370 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 371 | "src/s8-ibilinear/gen/scalar-c1.c", |
| 372 | "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| 373 | "src/s8-vclamp/scalar-x4.c", |
| 374 | "src/u8-ibilinear/gen/scalar-c1.c", |
| 375 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| 376 | "src/u8-rmax/scalar.c", |
| 377 | "src/u8-vclamp/scalar-x4.c", |
| 378 | "src/x8-zip/x2-scalar.c", |
| 379 | "src/x8-zip/x3-scalar.c", |
| 380 | "src/x8-zip/x4-scalar.c", |
| 381 | "src/x8-zip/xm-scalar.c", |
| 382 | "src/x32-packx/x2-scalar.c", |
| 383 | "src/x32-packx/x3-scalar.c", |
| 384 | "src/x32-packx/x4-scalar.c", |
| 385 | "src/x32-unpool/scalar.c", |
| 386 | "src/x32-zip/x2-scalar.c", |
| 387 | "src/x32-zip/x3-scalar.c", |
| 388 | "src/x32-zip/x4-scalar.c", |
| 389 | "src/x32-zip/xm-scalar.c", |
| 390 | "src/xx-fill/scalar-x16.c", |
| 391 | "src/xx-pad/scalar.c", |
| 392 | ] |
| 393 | |
| 394 | PROD_SCALAR_RISCV_MICROKERNEL_SRCS = [ |
| 395 | "src/f16-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 396 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| 397 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| 398 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| 399 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 400 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| 401 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| 402 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| 403 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| 404 | "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| 405 | "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| 406 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| 407 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 408 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| 409 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 410 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| 411 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| 412 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c", |
| 413 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c", |
| 414 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c", |
| 415 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c", |
| 416 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c", |
| 417 | "src/f32-gavgpool-cw/scalar-x1.c", |
| 418 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 419 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| 420 | "src/f32-gemm/gen/1x4-minmax-scalar.c", |
| 421 | "src/f32-gemm/gen/1x4-relu-scalar.c", |
| 422 | "src/f32-gemm/gen/1x4-scalar.c", |
| 423 | "src/f32-gemm/gen/4x2-minmax-scalar.c", |
| 424 | "src/f32-gemm/gen/4x2-scalar.c", |
| 425 | "src/f32-gemm/gen/4x4-minmax-scalar.c", |
| 426 | "src/f32-gemm/gen/4x4-relu-scalar.c", |
| 427 | "src/f32-gemm/gen/4x4-scalar.c", |
| 428 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| 429 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 430 | "src/f32-igemm/gen/1x4-minmax-scalar.c", |
| 431 | "src/f32-igemm/gen/1x4-relu-scalar.c", |
| 432 | "src/f32-igemm/gen/1x4-scalar.c", |
| 433 | "src/f32-igemm/gen/4x2-minmax-scalar.c", |
| 434 | "src/f32-igemm/gen/4x2-scalar.c", |
| 435 | "src/f32-igemm/gen/4x4-minmax-scalar.c", |
| 436 | "src/f32-igemm/gen/4x4-relu-scalar.c", |
| 437 | "src/f32-igemm/gen/4x4-scalar.c", |
| 438 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 439 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 440 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| 441 | "src/f32-prelu/gen/scalar-2x4.c", |
| 442 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x4.c", |
| 443 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x4.c", |
| 444 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c", |
| 445 | "src/f32-rmax/scalar.c", |
| 446 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 447 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 448 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| 449 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| 450 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| 451 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c", |
| 452 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c", |
| 453 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| 454 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| 455 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| 456 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| 457 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| 458 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| 459 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c", |
| 460 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| 461 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| 462 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| 463 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| 464 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| 465 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| 466 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c", |
| 467 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| 468 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| 469 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 470 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| 471 | "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c", |
| 472 | "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c", |
| 473 | "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c", |
| 474 | "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c", |
| 475 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c", |
| 476 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 477 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 478 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 479 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| 480 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| 481 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| 482 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 483 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 484 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 485 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 486 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| 487 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| 488 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 489 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c1.c", |
| 490 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c1.c", |
| 491 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 492 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 493 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 494 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 495 | "src/qs8-vadd/gen/minmax-scalar-x4.c", |
| 496 | "src/qs8-vaddc/gen/minmax-scalar-x4.c", |
| 497 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 498 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 499 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 500 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| 501 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| 502 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| 503 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 504 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c1.c", |
| 505 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c1.c", |
| 506 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 507 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 508 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 509 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 510 | "src/qu8-vadd/gen/minmax-scalar-x4.c", |
| 511 | "src/qu8-vaddc/gen/minmax-scalar-x4.c", |
| 512 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 513 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 514 | "src/s8-ibilinear/gen/scalar-c1.c", |
| 515 | "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| 516 | "src/s8-vclamp/scalar-x4.c", |
| 517 | "src/u8-ibilinear/gen/scalar-c1.c", |
| 518 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| 519 | "src/u8-rmax/scalar.c", |
| 520 | "src/u8-vclamp/scalar-x4.c", |
| 521 | "src/x8-zip/x2-scalar.c", |
| 522 | "src/x8-zip/x3-scalar.c", |
| 523 | "src/x8-zip/x4-scalar.c", |
| 524 | "src/x8-zip/xm-scalar.c", |
| 525 | "src/x32-packx/x2-scalar.c", |
| 526 | "src/x32-packx/x3-scalar.c", |
| 527 | "src/x32-packx/x4-scalar.c", |
| 528 | "src/x32-unpool/scalar.c", |
| 529 | "src/x32-zip/x2-scalar.c", |
| 530 | "src/x32-zip/x3-scalar.c", |
| 531 | "src/x32-zip/x4-scalar.c", |
| 532 | "src/x32-zip/xm-scalar.c", |
| 533 | "src/xx-fill/scalar-x16.c", |
| 534 | "src/xx-pad/scalar.c", |
| 535 | ] |
| 536 | |
| 537 | ALL_SCALAR_MICROKERNEL_SRCS = [ |
| 538 | "src/f16-f32-vcvt/gen/vcvt-scalar-x1.c", |
| 539 | "src/f16-f32-vcvt/gen/vcvt-scalar-x2.c", |
| 540 | "src/f16-f32-vcvt/gen/vcvt-scalar-x3.c", |
| 541 | "src/f16-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 542 | "src/f32-argmaxpool/4x-scalar-c1.c", |
| 543 | "src/f32-argmaxpool/9p8x-scalar-c1.c", |
| 544 | "src/f32-argmaxpool/9x-scalar-c1.c", |
| 545 | "src/f32-avgpool/9p8x-minmax-scalar-c1.c", |
| 546 | "src/f32-avgpool/9x-minmax-scalar-c1.c", |
| 547 | "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c", |
| 548 | "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c", |
| 549 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c", |
| 550 | "src/f32-dwconv/gen/up1x3-minmax-scalar-acc2.c", |
| 551 | "src/f32-dwconv/gen/up1x3-minmax-scalar.c", |
| 552 | "src/f32-dwconv/gen/up1x3-scalar-acc2.c", |
| 553 | "src/f32-dwconv/gen/up1x3-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 554 | "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c", |
| 555 | "src/f32-dwconv/gen/up1x4-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 556 | "src/f32-dwconv/gen/up1x4-scalar-acc2.c", |
| 557 | "src/f32-dwconv/gen/up1x4-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 558 | "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c", |
| 559 | "src/f32-dwconv/gen/up1x9-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 560 | "src/f32-dwconv/gen/up1x9-scalar-acc2.c", |
| 561 | "src/f32-dwconv/gen/up1x9-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 562 | "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c", |
| 563 | "src/f32-dwconv/gen/up1x25-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 564 | "src/f32-dwconv/gen/up1x25-scalar-acc2.c", |
| 565 | "src/f32-dwconv/gen/up1x25-scalar.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 566 | "src/f32-dwconv/gen/up2x3-minmax-scalar-acc2.c", |
| 567 | "src/f32-dwconv/gen/up2x3-minmax-scalar.c", |
| 568 | "src/f32-dwconv/gen/up2x3-scalar-acc2.c", |
| 569 | "src/f32-dwconv/gen/up2x3-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 570 | "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c", |
| 571 | "src/f32-dwconv/gen/up2x4-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 572 | "src/f32-dwconv/gen/up2x4-scalar-acc2.c", |
| 573 | "src/f32-dwconv/gen/up2x4-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 574 | "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c", |
| 575 | "src/f32-dwconv/gen/up2x9-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 576 | "src/f32-dwconv/gen/up2x9-scalar-acc2.c", |
| 577 | "src/f32-dwconv/gen/up2x9-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 578 | "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c", |
| 579 | "src/f32-dwconv/gen/up2x25-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 580 | "src/f32-dwconv/gen/up2x25-scalar-acc2.c", |
| 581 | "src/f32-dwconv/gen/up2x25-scalar.c", |
| 582 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c", |
| 583 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c", |
| 584 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c", |
| 585 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c", |
| 586 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c", |
| 587 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c", |
| 588 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c", |
| 589 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c", |
| 590 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c", |
| 591 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c", |
| 592 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c", |
| 593 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c", |
| 594 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c", |
| 595 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c", |
| 596 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c", |
| 597 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c", |
| 598 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c", |
| 599 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c", |
| 600 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c", |
| 601 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c", |
| 602 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c", |
| 603 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c", |
| 604 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c", |
| 605 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c", |
| 606 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c", |
| 607 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c", |
| 608 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c", |
| 609 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c", |
| 610 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c", |
| 611 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c", |
| 612 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c", |
| 613 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c", |
| 614 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c", |
| 615 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c", |
| 616 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c", |
| 617 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c", |
| 618 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c", |
| 619 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 620 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x1.c", |
| 621 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x2.c", |
| 622 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x3.c", |
| 623 | "src/f32-f16-vcvt/gen/vcvt-scalar-bitcast-x4.c", |
| 624 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x1.c", |
| 625 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x2.c", |
| 626 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x3.c", |
| 627 | "src/f32-f16-vcvt/gen/vcvt-scalar-fabsf-x4.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 628 | "src/f32-gavgpool-cw/scalar-x1.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 629 | "src/f32-gavgpool/7p7x-minmax-scalar-c1.c", |
| 630 | "src/f32-gavgpool/7x-minmax-scalar-c1.c", |
| 631 | "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c", |
| 632 | "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c", |
| 633 | "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 634 | "src/f32-gemm/gen/1x4-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 635 | "src/f32-gemm/gen/1x4-relu-scalar.c", |
| 636 | "src/f32-gemm/gen/1x4-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 637 | "src/f32-gemm/gen/2x4-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 638 | "src/f32-gemm/gen/2x4-relu-scalar.c", |
| 639 | "src/f32-gemm/gen/2x4-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 640 | "src/f32-gemm/gen/4x2-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 641 | "src/f32-gemm/gen/4x2-relu-scalar.c", |
| 642 | "src/f32-gemm/gen/4x2-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 643 | "src/f32-gemm/gen/4x4-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 644 | "src/f32-gemm/gen/4x4-relu-scalar.c", |
| 645 | "src/f32-gemm/gen/4x4-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 646 | "src/f32-ibilinear-chw/gen/scalar-p1.c", |
| 647 | "src/f32-ibilinear-chw/gen/scalar-p2.c", |
| 648 | "src/f32-ibilinear-chw/gen/scalar-p4.c", |
| Miao Wang | 2534c2f | 2020-03-16 11:58:04 -0700 | [diff] [blame] | 649 | "src/f32-ibilinear/gen/scalar-c1.c", |
| 650 | "src/f32-ibilinear/gen/scalar-c2.c", |
| 651 | "src/f32-ibilinear/gen/scalar-c4.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 652 | "src/f32-igemm/gen/1x4-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 653 | "src/f32-igemm/gen/1x4-relu-scalar.c", |
| 654 | "src/f32-igemm/gen/1x4-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 655 | "src/f32-igemm/gen/2x4-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 656 | "src/f32-igemm/gen/2x4-relu-scalar.c", |
| 657 | "src/f32-igemm/gen/2x4-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 658 | "src/f32-igemm/gen/4x2-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 659 | "src/f32-igemm/gen/4x2-relu-scalar.c", |
| 660 | "src/f32-igemm/gen/4x2-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 661 | "src/f32-igemm/gen/4x4-minmax-scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 662 | "src/f32-igemm/gen/4x4-relu-scalar.c", |
| 663 | "src/f32-igemm/gen/4x4-scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 664 | "src/f32-maxpool/9p8x-minmax-scalar-c1.c", |
| 665 | "src/f32-pavgpool/9p8x-minmax-scalar-c1.c", |
| 666 | "src/f32-pavgpool/9x-minmax-scalar-c1.c", |
| 667 | "src/f32-ppmm/gen/2x4-minmax-scalar.c", |
| 668 | "src/f32-ppmm/gen/3x3-minmax-scalar.c", |
| 669 | "src/f32-ppmm/gen/4x2-minmax-scalar.c", |
| 670 | "src/f32-ppmm/gen/4x4-minmax-scalar.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 671 | "src/f32-prelu/gen/scalar-2x1.c", |
| 672 | "src/f32-prelu/gen/scalar-2x4.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 673 | "src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x1.c", |
| 674 | "src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x2.c", |
| 675 | "src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x3.c", |
| 676 | "src/f32-qs8-vcvt/gen/vcvt-scalar-fmagic-x4.c", |
| 677 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x1.c", |
| 678 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x2.c", |
| 679 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x3.c", |
| 680 | "src/f32-qs8-vcvt/gen/vcvt-scalar-imagic-x4.c", |
| 681 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x1.c", |
| 682 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x2.c", |
| 683 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x3.c", |
| 684 | "src/f32-qs8-vcvt/gen/vcvt-scalar-lrintf-x4.c", |
| 685 | "src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x1.c", |
| 686 | "src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x2.c", |
| 687 | "src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x3.c", |
| 688 | "src/f32-qu8-vcvt/gen/vcvt-scalar-fmagic-x4.c", |
| 689 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x1.c", |
| 690 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x2.c", |
| 691 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x3.c", |
| 692 | "src/f32-qu8-vcvt/gen/vcvt-scalar-imagic-x4.c", |
| 693 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x1.c", |
| 694 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x2.c", |
| 695 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x3.c", |
| 696 | "src/f32-qu8-vcvt/gen/vcvt-scalar-lrintf-x4.c", |
| 697 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x1.c", |
| 698 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x2-acc2.c", |
| 699 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x2.c", |
| 700 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x4-acc2.c", |
| 701 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x4-acc4.c", |
| 702 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-lut64-p2-x4.c", |
| 703 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x1.c", |
| 704 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x2-acc2.c", |
| 705 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x2.c", |
| 706 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc2.c", |
| 707 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4-acc4.c", |
| 708 | "src/f32-raddstoreexpminusmax/gen/scalar-rr2-p5-x4.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 709 | "src/f32-rmax/scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 710 | "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c", |
| 711 | "src/f32-spmm/gen/1x1-minmax-scalar.c", |
| 712 | "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c", |
| 713 | "src/f32-spmm/gen/2x1-minmax-scalar.c", |
| 714 | "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c", |
| 715 | "src/f32-spmm/gen/4x1-minmax-scalar.c", |
| 716 | "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c", |
| 717 | "src/f32-spmm/gen/8x1-minmax-scalar.c", |
| 718 | "src/f32-spmm/gen/8x2-minmax-scalar.c", |
| 719 | "src/f32-spmm/gen/8x4-minmax-scalar.c", |
| 720 | "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c", |
| 721 | "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c", |
| 722 | "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 723 | "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c", |
| 724 | "src/f32-vbinary/gen/vadd-relu-scalar-x1.c", |
| 725 | "src/f32-vbinary/gen/vadd-relu-scalar-x2.c", |
| 726 | "src/f32-vbinary/gen/vadd-relu-scalar-x4.c", |
| 727 | "src/f32-vbinary/gen/vadd-relu-scalar-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 728 | "src/f32-vbinary/gen/vadd-scalar-x1.c", |
| 729 | "src/f32-vbinary/gen/vadd-scalar-x2.c", |
| 730 | "src/f32-vbinary/gen/vadd-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 731 | "src/f32-vbinary/gen/vadd-scalar-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 732 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c", |
| 733 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c", |
| 734 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 735 | "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c", |
| 736 | "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c", |
| 737 | "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c", |
| 738 | "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c", |
| 739 | "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 740 | "src/f32-vbinary/gen/vaddc-scalar-x1.c", |
| 741 | "src/f32-vbinary/gen/vaddc-scalar-x2.c", |
| 742 | "src/f32-vbinary/gen/vaddc-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 743 | "src/f32-vbinary/gen/vaddc-scalar-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 744 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c", |
| 745 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c", |
| 746 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 747 | "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c", |
| 748 | "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c", |
| 749 | "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c", |
| 750 | "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c", |
| 751 | "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 752 | "src/f32-vbinary/gen/vdiv-scalar-x1.c", |
| 753 | "src/f32-vbinary/gen/vdiv-scalar-x2.c", |
| 754 | "src/f32-vbinary/gen/vdiv-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 755 | "src/f32-vbinary/gen/vdiv-scalar-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 756 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c", |
| 757 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c", |
| 758 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 759 | "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c", |
| 760 | "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c", |
| 761 | "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c", |
| 762 | "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c", |
| 763 | "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 764 | "src/f32-vbinary/gen/vdivc-scalar-x1.c", |
| 765 | "src/f32-vbinary/gen/vdivc-scalar-x2.c", |
| 766 | "src/f32-vbinary/gen/vdivc-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 767 | "src/f32-vbinary/gen/vdivc-scalar-x8.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 768 | "src/f32-vbinary/gen/vmax-scalar-x1.c", |
| 769 | "src/f32-vbinary/gen/vmax-scalar-x2.c", |
| 770 | "src/f32-vbinary/gen/vmax-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 771 | "src/f32-vbinary/gen/vmax-scalar-x8.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 772 | "src/f32-vbinary/gen/vmaxc-scalar-x1.c", |
| 773 | "src/f32-vbinary/gen/vmaxc-scalar-x2.c", |
| 774 | "src/f32-vbinary/gen/vmaxc-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 775 | "src/f32-vbinary/gen/vmaxc-scalar-x8.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 776 | "src/f32-vbinary/gen/vmin-scalar-x1.c", |
| 777 | "src/f32-vbinary/gen/vmin-scalar-x2.c", |
| 778 | "src/f32-vbinary/gen/vmin-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 779 | "src/f32-vbinary/gen/vmin-scalar-x8.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 780 | "src/f32-vbinary/gen/vminc-scalar-x1.c", |
| 781 | "src/f32-vbinary/gen/vminc-scalar-x2.c", |
| 782 | "src/f32-vbinary/gen/vminc-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 783 | "src/f32-vbinary/gen/vminc-scalar-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 784 | "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c", |
| 785 | "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c", |
| 786 | "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 787 | "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c", |
| 788 | "src/f32-vbinary/gen/vmul-relu-scalar-x1.c", |
| 789 | "src/f32-vbinary/gen/vmul-relu-scalar-x2.c", |
| 790 | "src/f32-vbinary/gen/vmul-relu-scalar-x4.c", |
| 791 | "src/f32-vbinary/gen/vmul-relu-scalar-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 792 | "src/f32-vbinary/gen/vmul-scalar-x1.c", |
| 793 | "src/f32-vbinary/gen/vmul-scalar-x2.c", |
| 794 | "src/f32-vbinary/gen/vmul-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 795 | "src/f32-vbinary/gen/vmul-scalar-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 796 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c", |
| 797 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c", |
| 798 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 799 | "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c", |
| 800 | "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c", |
| 801 | "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c", |
| 802 | "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c", |
| 803 | "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 804 | "src/f32-vbinary/gen/vmulc-scalar-x1.c", |
| 805 | "src/f32-vbinary/gen/vmulc-scalar-x2.c", |
| 806 | "src/f32-vbinary/gen/vmulc-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 807 | "src/f32-vbinary/gen/vmulc-scalar-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 808 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c", |
| 809 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c", |
| 810 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 811 | "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c", |
| 812 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c", |
| 813 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c", |
| 814 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c", |
| 815 | "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 816 | "src/f32-vbinary/gen/vrdivc-scalar-x1.c", |
| 817 | "src/f32-vbinary/gen/vrdivc-scalar-x2.c", |
| 818 | "src/f32-vbinary/gen/vrdivc-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 819 | "src/f32-vbinary/gen/vrdivc-scalar-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 820 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c", |
| 821 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c", |
| 822 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 823 | "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c", |
| 824 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c", |
| 825 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c", |
| 826 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c", |
| 827 | "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 828 | "src/f32-vbinary/gen/vrsubc-scalar-x1.c", |
| 829 | "src/f32-vbinary/gen/vrsubc-scalar-x2.c", |
| 830 | "src/f32-vbinary/gen/vrsubc-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 831 | "src/f32-vbinary/gen/vrsubc-scalar-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 832 | "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c", |
| 833 | "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c", |
| 834 | "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 835 | "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 836 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c", |
| 837 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c", |
| 838 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 839 | "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 840 | "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c", |
| 841 | "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c", |
| 842 | "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 843 | "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c", |
| 844 | "src/f32-vbinary/gen/vsub-relu-scalar-x1.c", |
| 845 | "src/f32-vbinary/gen/vsub-relu-scalar-x2.c", |
| 846 | "src/f32-vbinary/gen/vsub-relu-scalar-x4.c", |
| 847 | "src/f32-vbinary/gen/vsub-relu-scalar-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 848 | "src/f32-vbinary/gen/vsub-scalar-x1.c", |
| 849 | "src/f32-vbinary/gen/vsub-scalar-x2.c", |
| 850 | "src/f32-vbinary/gen/vsub-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 851 | "src/f32-vbinary/gen/vsub-scalar-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 852 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c", |
| 853 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c", |
| 854 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 855 | "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c", |
| 856 | "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c", |
| 857 | "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c", |
| 858 | "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c", |
| 859 | "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 860 | "src/f32-vbinary/gen/vsubc-scalar-x1.c", |
| 861 | "src/f32-vbinary/gen/vsubc-scalar-x2.c", |
| 862 | "src/f32-vbinary/gen/vsubc-scalar-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 863 | "src/f32-vbinary/gen/vsubc-scalar-x8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 864 | "src/f32-vclamp/gen/vclamp-scalar-x1.c", |
| 865 | "src/f32-vclamp/gen/vclamp-scalar-x2.c", |
| 866 | "src/f32-vclamp/gen/vclamp-scalar-x4.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 867 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c", |
| 868 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c", |
| 869 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c", |
| 870 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c", |
| 871 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c", |
| 872 | "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c", |
| 873 | "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c", |
| 874 | "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c", |
| 875 | "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c", |
| 876 | "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c", |
| 877 | "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c", |
| 878 | "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 879 | "src/f32-vhswish/gen/vhswish-scalar-x1.c", |
| 880 | "src/f32-vhswish/gen/vhswish-scalar-x2.c", |
| 881 | "src/f32-vhswish/gen/vhswish-scalar-x4.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 882 | "src/f32-vlrelu/gen/vlrelu-scalar-x1.c", |
| 883 | "src/f32-vlrelu/gen/vlrelu-scalar-x2.c", |
| 884 | "src/f32-vlrelu/gen/vlrelu-scalar-x4.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 885 | "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c", |
| 886 | "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c", |
| 887 | "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 888 | "src/f32-vrelu/gen/vrelu-scalar-x1.c", |
| 889 | "src/f32-vrelu/gen/vrelu-scalar-x2.c", |
| 890 | "src/f32-vrelu/gen/vrelu-scalar-x4.c", |
| 891 | "src/f32-vrelu/gen/vrelu-scalar-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 892 | "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c", |
| 893 | "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c", |
| 894 | "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 895 | "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c", |
| 896 | "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c", |
| 897 | "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c", |
| 898 | "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c", |
| 899 | "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c", |
| 900 | "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c", |
| 901 | "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c", |
| 902 | "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c", |
| 903 | "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 904 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x1.c", |
| 905 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x2.c", |
| 906 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut64-p2-div-x4.c", |
| 907 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut2048-p1-div-x1.c", |
| 908 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut2048-p1-div-x2.c", |
| 909 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-lut2048-p1-div-x4.c", |
| 910 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-p5-div-x1.c", |
| 911 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-p5-div-x2.c", |
| 912 | "src/f32-vsigmoid/gen/vsigmoid-scalar-rr2-p5-div-x4.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 913 | "src/f32-vsqrt/gen/scalar-sqrt-x1.c", |
| 914 | "src/f32-vsqrt/gen/scalar-sqrt-x2.c", |
| 915 | "src/f32-vsqrt/gen/scalar-sqrt-x4.c", |
| 916 | "src/f32-vunary/gen/vabs-scalar-x1.c", |
| 917 | "src/f32-vunary/gen/vabs-scalar-x2.c", |
| 918 | "src/f32-vunary/gen/vabs-scalar-x4.c", |
| 919 | "src/f32-vunary/gen/vneg-scalar-x1.c", |
| 920 | "src/f32-vunary/gen/vneg-scalar-x2.c", |
| 921 | "src/f32-vunary/gen/vneg-scalar-x4.c", |
| 922 | "src/f32-vunary/gen/vsqr-scalar-x1.c", |
| 923 | "src/f32-vunary/gen/vsqr-scalar-x2.c", |
| 924 | "src/f32-vunary/gen/vsqr-scalar-x4.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 925 | "src/math/cvt-f32-f16-scalar-bitcast.c", |
| 926 | "src/math/cvt-f32-f16-scalar-fabsf.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 927 | "src/math/expm1minus-scalar-rr2-lut4-p4.c", |
| 928 | "src/math/expm1minus-scalar-rr2-lut8-p3.c", |
| 929 | "src/math/expm1minus-scalar-rr2-lut8-p4.c", |
| 930 | "src/math/expm1minus-scalar-rr2-lut16-p3.c", |
| 931 | "src/math/expm1minus-scalar-rr2-lut16-p4.c", |
| 932 | "src/math/expm1minus-scalar-rr2-p5.c", |
| 933 | "src/math/expm1minus-scalar-rr2-p6.c", |
| 934 | "src/math/expminus-scalar-rr2-lut64-p2.c", |
| 935 | "src/math/expminus-scalar-rr2-lut2048-p1.c", |
| 936 | "src/math/expminus-scalar-rr2-p5.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 937 | "src/math/roundd-scalar-addsub.c", |
| 938 | "src/math/roundd-scalar-cvt.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 939 | "src/math/roundd-scalar-floor.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 940 | "src/math/roundne-scalar-addsub.c", |
| 941 | "src/math/roundne-scalar-nearbyint.c", |
| 942 | "src/math/roundne-scalar-rint.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 943 | "src/math/roundu-scalar-addsub.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 944 | "src/math/roundu-scalar-ceil.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 945 | "src/math/roundu-scalar-cvt.c", |
| 946 | "src/math/roundz-scalar-addsub.c", |
| 947 | "src/math/roundz-scalar-cvt.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 948 | "src/math/roundz-scalar-trunc.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 949 | "src/math/sigmoid-scalar-rr2-lut64-p2-div.c", |
| 950 | "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c", |
| 951 | "src/math/sigmoid-scalar-rr2-p5-div.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 952 | "src/params-init.c", |
| 953 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| 954 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-imagic.c", |
| 955 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-scalar-lrintf.c", |
| 956 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| 957 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| 958 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-scalar-lrintf.c", |
| 959 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c", |
| 960 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| 961 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| 962 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c", |
| 963 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-imagic.c", |
| 964 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| 965 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-fmagic.c", |
| 966 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-imagic.c", |
| 967 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-scalar-lrintf.c", |
| 968 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-fmagic.c", |
| 969 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-imagic.c", |
| 970 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-scalar-lrintf.c", |
| 971 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 972 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 973 | "src/qc8-gemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| 974 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| 975 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 976 | "src/qc8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 977 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 978 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 979 | "src/qc8-gemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| 980 | "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| 981 | "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 982 | "src/qc8-gemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| 983 | "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| 984 | "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 985 | "src/qc8-gemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| 986 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| 987 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 988 | "src/qc8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 989 | "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| 990 | "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 991 | "src/qc8-gemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| 992 | "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| 993 | "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 994 | "src/qc8-gemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| 995 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 996 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 997 | "src/qc8-igemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| 998 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| 999 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1000 | "src/qc8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 1001 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 1002 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1003 | "src/qc8-igemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| 1004 | "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| 1005 | "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1006 | "src/qc8-igemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| 1007 | "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| 1008 | "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1009 | "src/qc8-igemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| 1010 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| 1011 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1012 | "src/qc8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 1013 | "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| 1014 | "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1015 | "src/qc8-igemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| 1016 | "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| 1017 | "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1018 | "src/qc8-igemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| 1019 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| 1020 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-imagic.c", |
| 1021 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-scalar-lrintf.c", |
| 1022 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| 1023 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| 1024 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-scalar-lrintf.c", |
| 1025 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c", |
| 1026 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| 1027 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| 1028 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c", |
| 1029 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-imagic.c", |
| 1030 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| 1031 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-fmagic.c", |
| 1032 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-imagic.c", |
| 1033 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-scalar-lrintf.c", |
| 1034 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-fmagic.c", |
| 1035 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-imagic.c", |
| 1036 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-scalar-lrintf.c", |
| 1037 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| 1038 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x2.c", |
| 1039 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x3.c", |
| 1040 | "src/qs8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 1041 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-fmagic-c1.c", |
| 1042 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-fmagic-c2.c", |
| 1043 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-fmagic-c4.c", |
| 1044 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c1.c", |
| 1045 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c2.c", |
| 1046 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c4.c", |
| 1047 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-lrintf-c1.c", |
| 1048 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-lrintf-c2.c", |
| 1049 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-scalar-lrintf-c4.c", |
| 1050 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-fmagic-c1.c", |
| 1051 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-fmagic-c2.c", |
| 1052 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-fmagic-c4.c", |
| 1053 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c1.c", |
| 1054 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c2.c", |
| 1055 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c4.c", |
| 1056 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-lrintf-c1.c", |
| 1057 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-lrintf-c2.c", |
| 1058 | "src/qs8-gavgpool/gen/7x-minmax-fp32-scalar-lrintf-c4.c", |
| 1059 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 1060 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1061 | "src/qs8-gemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| 1062 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| 1063 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1064 | "src/qs8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 1065 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 1066 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1067 | "src/qs8-gemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| 1068 | "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| 1069 | "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1070 | "src/qs8-gemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| 1071 | "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| 1072 | "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1073 | "src/qs8-gemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| 1074 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| 1075 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1076 | "src/qs8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 1077 | "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| 1078 | "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1079 | "src/qs8-gemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| 1080 | "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| 1081 | "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1082 | "src/qs8-gemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| 1083 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 1084 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1085 | "src/qs8-igemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| 1086 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| 1087 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1088 | "src/qs8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 1089 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 1090 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1091 | "src/qs8-igemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| 1092 | "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| 1093 | "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1094 | "src/qs8-igemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| 1095 | "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| 1096 | "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1097 | "src/qs8-igemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| 1098 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| 1099 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1100 | "src/qs8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 1101 | "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| 1102 | "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1103 | "src/qs8-igemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| 1104 | "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| 1105 | "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1106 | "src/qs8-igemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| 1107 | "src/qs8-requantization/fp32-scalar-fmagic.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 1108 | "src/qs8-requantization/fp32-scalar-lrintf.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 1109 | "src/qs8-requantization/gemmlowp-scalar.c", |
| 1110 | "src/qs8-requantization/rndna-scalar-signed64.c", |
| 1111 | "src/qs8-requantization/rndna-scalar-unsigned32.c", |
| 1112 | "src/qs8-requantization/rndna-scalar-unsigned64.c", |
| 1113 | "src/qs8-requantization/rndnu-scalar.c", |
| 1114 | "src/qs8-vadd/gen/minmax-scalar-x1.c", |
| 1115 | "src/qs8-vadd/gen/minmax-scalar-x2.c", |
| 1116 | "src/qs8-vadd/gen/minmax-scalar-x4.c", |
| 1117 | "src/qs8-vaddc/gen/minmax-scalar-x1.c", |
| 1118 | "src/qs8-vaddc/gen/minmax-scalar-x2.c", |
| 1119 | "src/qs8-vaddc/gen/minmax-scalar-x4.c", |
| 1120 | "src/qs8-vmul/gen/minmax-fp32-scalar-x1.c", |
| 1121 | "src/qs8-vmul/gen/minmax-fp32-scalar-x2.c", |
| 1122 | "src/qs8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 1123 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x1.c", |
| 1124 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x2.c", |
| 1125 | "src/qs8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 1126 | "src/qu8-avgpool/9p8x-minmax-scalar-c1.c", |
| 1127 | "src/qu8-avgpool/9x-minmax-scalar-c1.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 1128 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-fmagic.c", |
| 1129 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-imagic.c", |
| 1130 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-scalar-lrintf.c", |
| 1131 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-fmagic.c", |
| 1132 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-imagic.c", |
| 1133 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-scalar-lrintf.c", |
| 1134 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-fmagic.c", |
| 1135 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-imagic.c", |
| 1136 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-scalar-lrintf.c", |
| 1137 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-fmagic.c", |
| 1138 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-imagic.c", |
| 1139 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-scalar-lrintf.c", |
| 1140 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-fmagic.c", |
| 1141 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-imagic.c", |
| 1142 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-scalar-lrintf.c", |
| 1143 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-fmagic.c", |
| 1144 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-imagic.c", |
| 1145 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-scalar-lrintf.c", |
| 1146 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x1.c", |
| 1147 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x2.c", |
| 1148 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x3.c", |
| 1149 | "src/qu8-f32-vcvt/gen/vcvt-scalar-x4.c", |
| 1150 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-fmagic-c1.c", |
| 1151 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-fmagic-c2.c", |
| 1152 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-fmagic-c4.c", |
| 1153 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c1.c", |
| 1154 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c2.c", |
| 1155 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-imagic-c4.c", |
| 1156 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-lrintf-c1.c", |
| 1157 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-lrintf-c2.c", |
| 1158 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-scalar-lrintf-c4.c", |
| 1159 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-fmagic-c1.c", |
| 1160 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-fmagic-c2.c", |
| 1161 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-fmagic-c4.c", |
| 1162 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c1.c", |
| 1163 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c2.c", |
| 1164 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-imagic-c4.c", |
| 1165 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-lrintf-c1.c", |
| 1166 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-lrintf-c2.c", |
| 1167 | "src/qu8-gavgpool/gen/7x-minmax-fp32-scalar-lrintf-c4.c", |
| 1168 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 1169 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1170 | "src/qu8-gemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| 1171 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| 1172 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1173 | "src/qu8-gemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 1174 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 1175 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1176 | "src/qu8-gemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| 1177 | "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| 1178 | "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1179 | "src/qu8-gemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| 1180 | "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| 1181 | "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1182 | "src/qu8-gemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| 1183 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| 1184 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1185 | "src/qu8-gemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 1186 | "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| 1187 | "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1188 | "src/qu8-gemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| 1189 | "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| 1190 | "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1191 | "src/qu8-gemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| 1192 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-fmagic.c", |
| 1193 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-imagic.c", |
| 1194 | "src/qu8-igemm/gen/1x2-minmax-fp32-scalar-lrintf.c", |
| 1195 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-fmagic.c", |
| 1196 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-imagic.c", |
| 1197 | "src/qu8-igemm/gen/1x4-minmax-fp32-scalar-lrintf.c", |
| 1198 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-fmagic.c", |
| 1199 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-imagic.c", |
| 1200 | "src/qu8-igemm/gen/2x2-minmax-fp32-scalar-lrintf.c", |
| 1201 | "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-fmagic.c", |
| 1202 | "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-imagic.c", |
| 1203 | "src/qu8-igemm/gen/2x4-minmax-fp32-scalar-lrintf.c", |
| 1204 | "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-fmagic.c", |
| 1205 | "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-imagic.c", |
| 1206 | "src/qu8-igemm/gen/3x2-minmax-fp32-scalar-lrintf.c", |
| 1207 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-fmagic.c", |
| 1208 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-imagic.c", |
| 1209 | "src/qu8-igemm/gen/3x4-minmax-fp32-scalar-lrintf.c", |
| 1210 | "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-fmagic.c", |
| 1211 | "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-imagic.c", |
| 1212 | "src/qu8-igemm/gen/4x2-minmax-fp32-scalar-lrintf.c", |
| 1213 | "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-fmagic.c", |
| 1214 | "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-imagic.c", |
| 1215 | "src/qu8-igemm/gen/4x4-minmax-fp32-scalar-lrintf.c", |
| 1216 | "src/qu8-requantization/fp32-scalar-fmagic.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 1217 | "src/qu8-requantization/fp32-scalar-lrintf.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 1218 | "src/qu8-requantization/gemmlowp-scalar.c", |
| 1219 | "src/qu8-requantization/rndna-scalar-signed64.c", |
| 1220 | "src/qu8-requantization/rndna-scalar-unsigned32.c", |
| 1221 | "src/qu8-requantization/rndna-scalar-unsigned64.c", |
| 1222 | "src/qu8-vadd/gen/minmax-scalar-x1.c", |
| 1223 | "src/qu8-vadd/gen/minmax-scalar-x2.c", |
| 1224 | "src/qu8-vadd/gen/minmax-scalar-x4.c", |
| 1225 | "src/qu8-vaddc/gen/minmax-scalar-x1.c", |
| 1226 | "src/qu8-vaddc/gen/minmax-scalar-x2.c", |
| 1227 | "src/qu8-vaddc/gen/minmax-scalar-x4.c", |
| 1228 | "src/qu8-vmul/gen/minmax-fp32-scalar-x1.c", |
| 1229 | "src/qu8-vmul/gen/minmax-fp32-scalar-x2.c", |
| 1230 | "src/qu8-vmul/gen/minmax-fp32-scalar-x4.c", |
| 1231 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x1.c", |
| 1232 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x2.c", |
| 1233 | "src/qu8-vmulc/gen/minmax-fp32-scalar-x4.c", |
| 1234 | "src/s8-ibilinear/gen/scalar-c1.c", |
| 1235 | "src/s8-ibilinear/gen/scalar-c2.c", |
| 1236 | "src/s8-ibilinear/gen/scalar-c4.c", |
| 1237 | "src/s8-maxpool/9p8x-minmax-scalar-c1.c", |
| 1238 | "src/s8-vclamp/scalar-x4.c", |
| 1239 | "src/u8-ibilinear/gen/scalar-c1.c", |
| 1240 | "src/u8-ibilinear/gen/scalar-c2.c", |
| 1241 | "src/u8-ibilinear/gen/scalar-c4.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 1242 | "src/u8-lut32norm/scalar.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 1243 | "src/u8-maxpool/9p8x-minmax-scalar-c1.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 1244 | "src/u8-rmax/scalar.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 1245 | "src/u8-vclamp/scalar-x4.c", |
| 1246 | "src/x8-lut/gen/lut-scalar-x1.c", |
| 1247 | "src/x8-lut/gen/lut-scalar-x2.c", |
| 1248 | "src/x8-lut/gen/lut-scalar-x4.c", |
| 1249 | "src/x8-lut/gen/lut-scalar-x8.c", |
| 1250 | "src/x8-lut/gen/lut-scalar-x16.c", |
| 1251 | "src/x8-transpose/gen/1x2-scalar-int.c", |
| 1252 | "src/x8-transpose/gen/1x4-scalar-int.c", |
| 1253 | "src/x8-transpose/gen/2x1-scalar-int.c", |
| 1254 | "src/x8-transpose/gen/2x2-scalar-int.c", |
| 1255 | "src/x8-transpose/gen/2x4-scalar-int.c", |
| 1256 | "src/x8-transpose/gen/4x1-scalar-int.c", |
| 1257 | "src/x8-transpose/gen/4x2-scalar-int.c", |
| 1258 | "src/x8-transpose/gen/4x4-scalar-int.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 1259 | "src/x8-zip/x2-scalar.c", |
| 1260 | "src/x8-zip/x3-scalar.c", |
| 1261 | "src/x8-zip/x4-scalar.c", |
| 1262 | "src/x8-zip/xm-scalar.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 1263 | "src/x16-transpose/gen/1x2-scalar-int.c", |
| 1264 | "src/x16-transpose/gen/1x4-scalar-int.c", |
| 1265 | "src/x16-transpose/gen/2x1-scalar-int.c", |
| 1266 | "src/x16-transpose/gen/2x2-scalar-int.c", |
| 1267 | "src/x16-transpose/gen/2x4-scalar-int.c", |
| 1268 | "src/x16-transpose/gen/4x1-scalar-int.c", |
| 1269 | "src/x16-transpose/gen/4x2-scalar-int.c", |
| 1270 | "src/x16-transpose/gen/4x4-scalar-int.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 1271 | "src/x32-depthtospace2d-chw2hwc/scalar.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 1272 | "src/x32-packx/x2-scalar.c", |
| 1273 | "src/x32-packx/x3-scalar.c", |
| 1274 | "src/x32-packx/x4-scalar.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 1275 | "src/x32-transpose/gen/1x2-scalar-float.c", |
| 1276 | "src/x32-transpose/gen/1x2-scalar-int.c", |
| 1277 | "src/x32-transpose/gen/1x4-scalar-float.c", |
| 1278 | "src/x32-transpose/gen/1x4-scalar-int.c", |
| 1279 | "src/x32-transpose/gen/2x1-scalar-float.c", |
| 1280 | "src/x32-transpose/gen/2x1-scalar-int.c", |
| 1281 | "src/x32-transpose/gen/2x2-scalar-float.c", |
| 1282 | "src/x32-transpose/gen/2x2-scalar-int.c", |
| 1283 | "src/x32-transpose/gen/2x4-scalar-float.c", |
| 1284 | "src/x32-transpose/gen/2x4-scalar-int.c", |
| 1285 | "src/x32-transpose/gen/4x1-scalar-float.c", |
| 1286 | "src/x32-transpose/gen/4x1-scalar-int.c", |
| 1287 | "src/x32-transpose/gen/4x2-scalar-float.c", |
| 1288 | "src/x32-transpose/gen/4x2-scalar-int.c", |
| 1289 | "src/x32-transpose/gen/4x4-scalar-float.c", |
| 1290 | "src/x32-transpose/gen/4x4-scalar-int.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 1291 | "src/x32-unpool/scalar.c", |
| 1292 | "src/x32-zip/x2-scalar.c", |
| 1293 | "src/x32-zip/x3-scalar.c", |
| 1294 | "src/x32-zip/x4-scalar.c", |
| 1295 | "src/x32-zip/xm-scalar.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 1296 | "src/x64-transpose/gen/1x2-scalar-float.c", |
| 1297 | "src/x64-transpose/gen/1x2-scalar-int.c", |
| 1298 | "src/x64-transpose/gen/2x1-scalar-float.c", |
| 1299 | "src/x64-transpose/gen/2x1-scalar-int.c", |
| 1300 | "src/x64-transpose/gen/2x2-scalar-float.c", |
| 1301 | "src/x64-transpose/gen/2x2-scalar-int.c", |
| 1302 | "src/x64-transpose/gen/4x1-scalar-float.c", |
| 1303 | "src/x64-transpose/gen/4x1-scalar-int.c", |
| 1304 | "src/x64-transpose/gen/4x2-scalar-float.c", |
| 1305 | "src/x64-transpose/gen/4x2-scalar-int.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 1306 | "src/xx-copy/memcpy.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 1307 | "src/xx-fill/scalar-x16.c", |
| 1308 | "src/xx-pad/scalar.c", |
| 1309 | ] |
| 1310 | |
| 1311 | ALL_WASM_MICROKERNEL_SRCS = [ |
| 1312 | "src/f32-avgpool/9p8x-minmax-wasm-c1.c", |
| 1313 | "src/f32-avgpool/9x-minmax-wasm-c1.c", |
| 1314 | "src/f32-dwconv/gen/up1x3-minmax-wasm-acc2.c", |
| 1315 | "src/f32-dwconv/gen/up1x3-minmax-wasm.c", |
| 1316 | "src/f32-dwconv/gen/up1x3-wasm-acc2.c", |
| 1317 | "src/f32-dwconv/gen/up1x3-wasm.c", |
| 1318 | "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c", |
| 1319 | "src/f32-dwconv/gen/up1x4-minmax-wasm.c", |
| 1320 | "src/f32-dwconv/gen/up1x4-wasm-acc2.c", |
| 1321 | "src/f32-dwconv/gen/up1x4-wasm.c", |
| 1322 | "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c", |
| 1323 | "src/f32-dwconv/gen/up1x9-minmax-wasm.c", |
| 1324 | "src/f32-dwconv/gen/up1x9-wasm-acc2.c", |
| 1325 | "src/f32-dwconv/gen/up1x9-wasm.c", |
| 1326 | "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c", |
| 1327 | "src/f32-dwconv/gen/up1x25-minmax-wasm.c", |
| 1328 | "src/f32-dwconv/gen/up1x25-wasm-acc2.c", |
| 1329 | "src/f32-dwconv/gen/up1x25-wasm.c", |
| 1330 | "src/f32-dwconv/gen/up2x3-minmax-wasm-acc2.c", |
| 1331 | "src/f32-dwconv/gen/up2x3-minmax-wasm.c", |
| 1332 | "src/f32-dwconv/gen/up2x3-wasm-acc2.c", |
| 1333 | "src/f32-dwconv/gen/up2x3-wasm.c", |
| 1334 | "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c", |
| 1335 | "src/f32-dwconv/gen/up2x4-minmax-wasm.c", |
| 1336 | "src/f32-dwconv/gen/up2x4-wasm-acc2.c", |
| 1337 | "src/f32-dwconv/gen/up2x4-wasm.c", |
| 1338 | "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c", |
| 1339 | "src/f32-dwconv/gen/up2x9-minmax-wasm.c", |
| 1340 | "src/f32-dwconv/gen/up2x9-wasm-acc2.c", |
| 1341 | "src/f32-dwconv/gen/up2x9-wasm.c", |
| 1342 | "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c", |
| 1343 | "src/f32-dwconv/gen/up2x25-minmax-wasm.c", |
| 1344 | "src/f32-dwconv/gen/up2x25-wasm-acc2.c", |
| 1345 | "src/f32-dwconv/gen/up2x25-wasm.c", |
| 1346 | "src/f32-gavgpool/7p7x-minmax-wasm-c1.c", |
| 1347 | "src/f32-gavgpool/7x-minmax-wasm-c1.c", |
| 1348 | "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c", |
| 1349 | "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c", |
| 1350 | "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c", |
| 1351 | "src/f32-gemm/gen/1x4-minmax-wasm.c", |
| 1352 | "src/f32-gemm/gen/1x4-relu-wasm.c", |
| 1353 | "src/f32-gemm/gen/1x4-wasm.c", |
| 1354 | "src/f32-gemm/gen/2x4-minmax-wasm.c", |
| 1355 | "src/f32-gemm/gen/2x4-relu-wasm.c", |
| 1356 | "src/f32-gemm/gen/2x4-wasm.c", |
| 1357 | "src/f32-gemm/gen/4x2-minmax-wasm.c", |
| 1358 | "src/f32-gemm/gen/4x2-relu-wasm.c", |
| 1359 | "src/f32-gemm/gen/4x2-wasm.c", |
| 1360 | "src/f32-gemm/gen/4x4-minmax-wasm.c", |
| 1361 | "src/f32-gemm/gen/4x4-relu-wasm.c", |
| 1362 | "src/f32-gemm/gen/4x4-wasm.c", |
| 1363 | "src/f32-igemm/gen/1x4-minmax-wasm.c", |
| 1364 | "src/f32-igemm/gen/1x4-relu-wasm.c", |
| 1365 | "src/f32-igemm/gen/1x4-wasm.c", |
| 1366 | "src/f32-igemm/gen/2x4-minmax-wasm.c", |
| 1367 | "src/f32-igemm/gen/2x4-relu-wasm.c", |
| 1368 | "src/f32-igemm/gen/2x4-wasm.c", |
| 1369 | "src/f32-igemm/gen/4x2-minmax-wasm.c", |
| 1370 | "src/f32-igemm/gen/4x2-relu-wasm.c", |
| 1371 | "src/f32-igemm/gen/4x2-wasm.c", |
| 1372 | "src/f32-igemm/gen/4x4-minmax-wasm.c", |
| 1373 | "src/f32-igemm/gen/4x4-relu-wasm.c", |
| 1374 | "src/f32-igemm/gen/4x4-wasm.c", |
| 1375 | "src/f32-maxpool/9p8x-minmax-wasm-c1.c", |
| 1376 | "src/f32-pavgpool/9p8x-minmax-wasm-c1.c", |
| 1377 | "src/f32-pavgpool/9x-minmax-wasm-c1.c", |
| 1378 | "src/f32-prelu/gen/wasm-2x1.c", |
| 1379 | "src/f32-prelu/gen/wasm-2x4.c", |
| 1380 | "src/f32-qs8-vcvt/gen/vcvt-wasm-fmagic-x1.c", |
| 1381 | "src/f32-qs8-vcvt/gen/vcvt-wasm-fmagic-x2.c", |
| 1382 | "src/f32-qs8-vcvt/gen/vcvt-wasm-fmagic-x3.c", |
| 1383 | "src/f32-qs8-vcvt/gen/vcvt-wasm-fmagic-x4.c", |
| 1384 | "src/f32-qu8-vcvt/gen/vcvt-wasm-fmagic-x1.c", |
| 1385 | "src/f32-qu8-vcvt/gen/vcvt-wasm-fmagic-x2.c", |
| 1386 | "src/f32-qu8-vcvt/gen/vcvt-wasm-fmagic-x3.c", |
| 1387 | "src/f32-qu8-vcvt/gen/vcvt-wasm-fmagic-x4.c", |
| 1388 | "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c", |
| 1389 | "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c", |
| 1390 | "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c", |
| 1391 | "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c", |
| 1392 | "src/f32-vbinary/gen/vadd-relu-wasm-x1.c", |
| 1393 | "src/f32-vbinary/gen/vadd-relu-wasm-x2.c", |
| 1394 | "src/f32-vbinary/gen/vadd-relu-wasm-x4.c", |
| 1395 | "src/f32-vbinary/gen/vadd-relu-wasm-x8.c", |
| 1396 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c", |
| 1397 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c", |
| 1398 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c", |
| 1399 | "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c", |
| 1400 | "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c", |
| 1401 | "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c", |
| 1402 | "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c", |
| 1403 | "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c", |
| 1404 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c", |
| 1405 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c", |
| 1406 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c", |
| 1407 | "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c", |
| 1408 | "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c", |
| 1409 | "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c", |
| 1410 | "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c", |
| 1411 | "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c", |
| 1412 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c", |
| 1413 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c", |
| 1414 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c", |
| 1415 | "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c", |
| 1416 | "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c", |
| 1417 | "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c", |
| 1418 | "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c", |
| 1419 | "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c", |
| 1420 | "src/f32-vbinary/gen/vmax-wasm-x1.c", |
| 1421 | "src/f32-vbinary/gen/vmax-wasm-x2.c", |
| 1422 | "src/f32-vbinary/gen/vmax-wasm-x4.c", |
| 1423 | "src/f32-vbinary/gen/vmax-wasm-x8.c", |
| 1424 | "src/f32-vbinary/gen/vmaxc-wasm-x1.c", |
| 1425 | "src/f32-vbinary/gen/vmaxc-wasm-x2.c", |
| 1426 | "src/f32-vbinary/gen/vmaxc-wasm-x4.c", |
| 1427 | "src/f32-vbinary/gen/vmaxc-wasm-x8.c", |
| 1428 | "src/f32-vbinary/gen/vmin-wasm-x1.c", |
| 1429 | "src/f32-vbinary/gen/vmin-wasm-x2.c", |
| 1430 | "src/f32-vbinary/gen/vmin-wasm-x4.c", |
| 1431 | "src/f32-vbinary/gen/vmin-wasm-x8.c", |
| 1432 | "src/f32-vbinary/gen/vminc-wasm-x1.c", |
| 1433 | "src/f32-vbinary/gen/vminc-wasm-x2.c", |
| 1434 | "src/f32-vbinary/gen/vminc-wasm-x4.c", |
| 1435 | "src/f32-vbinary/gen/vminc-wasm-x8.c", |
| 1436 | "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c", |
| 1437 | "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c", |
| 1438 | "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c", |
| 1439 | "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c", |
| 1440 | "src/f32-vbinary/gen/vmul-relu-wasm-x1.c", |
| 1441 | "src/f32-vbinary/gen/vmul-relu-wasm-x2.c", |
| 1442 | "src/f32-vbinary/gen/vmul-relu-wasm-x4.c", |
| 1443 | "src/f32-vbinary/gen/vmul-relu-wasm-x8.c", |
| 1444 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c", |
| 1445 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c", |
| 1446 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c", |
| 1447 | "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c", |
| 1448 | "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c", |
| 1449 | "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c", |
| 1450 | "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c", |
| 1451 | "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c", |
| 1452 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c", |
| 1453 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c", |
| 1454 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c", |
| 1455 | "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c", |
| 1456 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c", |
| 1457 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c", |
| 1458 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c", |
| 1459 | "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c", |
| 1460 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c", |
| 1461 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c", |
| 1462 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c", |
| 1463 | "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c", |
| 1464 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c", |
| 1465 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c", |
| 1466 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c", |
| 1467 | "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c", |
| 1468 | "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c", |
| 1469 | "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c", |
| 1470 | "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c", |
| 1471 | "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c", |
| 1472 | "src/f32-vbinary/gen/vsub-relu-wasm-x1.c", |
| 1473 | "src/f32-vbinary/gen/vsub-relu-wasm-x2.c", |
| 1474 | "src/f32-vbinary/gen/vsub-relu-wasm-x4.c", |
| 1475 | "src/f32-vbinary/gen/vsub-relu-wasm-x8.c", |
| 1476 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c", |
| 1477 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c", |
| 1478 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c", |
| 1479 | "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c", |
| 1480 | "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c", |
| 1481 | "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c", |
| 1482 | "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c", |
| 1483 | "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c", |
| 1484 | "src/f32-vclamp/gen/vclamp-wasm-x1.c", |
| 1485 | "src/f32-vclamp/gen/vclamp-wasm-x2.c", |
| 1486 | "src/f32-vclamp/gen/vclamp-wasm-x4.c", |
| 1487 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c", |
| 1488 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c", |
| 1489 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c", |
| 1490 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c", |
| 1491 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c", |
| 1492 | "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c", |
| 1493 | "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c", |
| 1494 | "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c", |
| 1495 | "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c", |
| 1496 | "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c", |
| 1497 | "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c", |
| 1498 | "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c", |
| 1499 | "src/f32-vhswish/gen/vhswish-wasm-x1.c", |
| 1500 | "src/f32-vhswish/gen/vhswish-wasm-x2.c", |
| 1501 | "src/f32-vhswish/gen/vhswish-wasm-x4.c", |
| 1502 | "src/f32-vlrelu/gen/vlrelu-wasm-x1.c", |
| 1503 | "src/f32-vlrelu/gen/vlrelu-wasm-x2.c", |
| 1504 | "src/f32-vlrelu/gen/vlrelu-wasm-x4.c", |
| 1505 | "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c", |
| 1506 | "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c", |
| 1507 | "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c", |
| 1508 | "src/f32-vrelu/gen/vrelu-wasm-x1.c", |
| 1509 | "src/f32-vrelu/gen/vrelu-wasm-x2.c", |
| 1510 | "src/f32-vrelu/gen/vrelu-wasm-x4.c", |
| 1511 | "src/f32-vrelu/gen/vrelu-wasm-x8.c", |
| 1512 | "src/qc8-dwconv/gen/up1x9-minmax-fp32-wasm-fmagic.c", |
| 1513 | "src/qc8-dwconv/gen/up1x25-minmax-fp32-wasm-fmagic.c", |
| 1514 | "src/qc8-dwconv/gen/up2x9-minmax-fp32-wasm-fmagic.c", |
| 1515 | "src/qc8-dwconv/gen/up2x25-minmax-fp32-wasm-fmagic.c", |
| 1516 | "src/qc8-dwconv/gen/up4x9-minmax-fp32-wasm-fmagic.c", |
| 1517 | "src/qc8-dwconv/gen/up4x25-minmax-fp32-wasm-fmagic.c", |
| 1518 | "src/qc8-gemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1519 | "src/qc8-gemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1520 | "src/qc8-gemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1521 | "src/qc8-gemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1522 | "src/qc8-gemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1523 | "src/qc8-gemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1524 | "src/qc8-gemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1525 | "src/qc8-gemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1526 | "src/qc8-igemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1527 | "src/qc8-igemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1528 | "src/qc8-igemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1529 | "src/qc8-igemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1530 | "src/qc8-igemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1531 | "src/qc8-igemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1532 | "src/qc8-igemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1533 | "src/qc8-igemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1534 | "src/qs8-dwconv/gen/up1x9-minmax-fp32-wasm-fmagic.c", |
| 1535 | "src/qs8-dwconv/gen/up1x25-minmax-fp32-wasm-fmagic.c", |
| 1536 | "src/qs8-dwconv/gen/up2x9-minmax-fp32-wasm-fmagic.c", |
| 1537 | "src/qs8-dwconv/gen/up2x25-minmax-fp32-wasm-fmagic.c", |
| 1538 | "src/qs8-dwconv/gen/up4x9-minmax-fp32-wasm-fmagic.c", |
| 1539 | "src/qs8-dwconv/gen/up4x25-minmax-fp32-wasm-fmagic.c", |
| 1540 | "src/qs8-gemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1541 | "src/qs8-gemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1542 | "src/qs8-gemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1543 | "src/qs8-gemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1544 | "src/qs8-gemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1545 | "src/qs8-gemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1546 | "src/qs8-gemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1547 | "src/qs8-gemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1548 | "src/qs8-igemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1549 | "src/qs8-igemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1550 | "src/qs8-igemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1551 | "src/qs8-igemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1552 | "src/qs8-igemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1553 | "src/qs8-igemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1554 | "src/qs8-igemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1555 | "src/qs8-igemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1556 | "src/qu8-dwconv/gen/up1x9-minmax-fp32-wasm-fmagic.c", |
| 1557 | "src/qu8-dwconv/gen/up1x25-minmax-fp32-wasm-fmagic.c", |
| 1558 | "src/qu8-dwconv/gen/up2x9-minmax-fp32-wasm-fmagic.c", |
| 1559 | "src/qu8-dwconv/gen/up2x25-minmax-fp32-wasm-fmagic.c", |
| 1560 | "src/qu8-dwconv/gen/up4x9-minmax-fp32-wasm-fmagic.c", |
| 1561 | "src/qu8-dwconv/gen/up4x25-minmax-fp32-wasm-fmagic.c", |
| 1562 | "src/qu8-gemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1563 | "src/qu8-gemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1564 | "src/qu8-gemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1565 | "src/qu8-gemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1566 | "src/qu8-gemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1567 | "src/qu8-gemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1568 | "src/qu8-gemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1569 | "src/qu8-gemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1570 | "src/qu8-igemm/gen/1x2-minmax-fp32-wasm-fmagic.c", |
| 1571 | "src/qu8-igemm/gen/1x4-minmax-fp32-wasm-fmagic.c", |
| 1572 | "src/qu8-igemm/gen/2x2-minmax-fp32-wasm-fmagic.c", |
| 1573 | "src/qu8-igemm/gen/2x4-minmax-fp32-wasm-fmagic.c", |
| 1574 | "src/qu8-igemm/gen/3x2-minmax-fp32-wasm-fmagic.c", |
| 1575 | "src/qu8-igemm/gen/3x4-minmax-fp32-wasm-fmagic.c", |
| 1576 | "src/qu8-igemm/gen/4x2-minmax-fp32-wasm-fmagic.c", |
| 1577 | "src/qu8-igemm/gen/4x4-minmax-fp32-wasm-fmagic.c", |
| 1578 | ] |
| 1579 | |
| 1580 | ALL_WASMSIMD_MICROKERNEL_SRCS = [ |
| 1581 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x8.c", |
| 1582 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x16.c", |
| 1583 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x24.c", |
| 1584 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int16-x32.c", |
| 1585 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x8.c", |
| 1586 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x16.c", |
| 1587 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x24.c", |
| 1588 | "src/f16-f32-vcvt/gen/vcvt-wasmsimd-int32-x32.c", |
| 1589 | "src/f32-argmaxpool/4x-wasmsimd-c4.c", |
| 1590 | "src/f32-argmaxpool/9p8x-wasmsimd-c4.c", |
| 1591 | "src/f32-argmaxpool/9x-wasmsimd-c4.c", |
| 1592 | "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c", |
| 1593 | "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c", |
| 1594 | "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c", |
| 1595 | "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c", |
| 1596 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c", |
| 1597 | "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-arm-acc2.c", |
| 1598 | "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-arm.c", |
| 1599 | "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-x86-acc2.c", |
| 1600 | "src/f32-dwconv/gen/up4x3-minmax-wasmsimd-x86.c", |
| 1601 | "src/f32-dwconv/gen/up4x3-wasmsimd.c", |
| 1602 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c", |
| 1603 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c", |
| 1604 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c", |
| 1605 | "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c", |
| 1606 | "src/f32-dwconv/gen/up4x4-wasmsimd.c", |
| 1607 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c", |
| 1608 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c", |
| 1609 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c", |
| 1610 | "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c", |
| 1611 | "src/f32-dwconv/gen/up4x9-wasmsimd.c", |
| 1612 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c", |
| 1613 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c", |
| 1614 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c", |
| 1615 | "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c", |
| 1616 | "src/f32-dwconv/gen/up4x25-wasmsimd.c", |
| 1617 | "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-arm-acc2.c", |
| 1618 | "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-arm.c", |
| 1619 | "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-x86-acc2.c", |
| 1620 | "src/f32-dwconv/gen/up8x3-minmax-wasmsimd-x86.c", |
| 1621 | "src/f32-dwconv/gen/up8x3-wasmsimd.c", |
| 1622 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c", |
| 1623 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c", |
| 1624 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c", |
| 1625 | "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c", |
| 1626 | "src/f32-dwconv/gen/up8x4-wasmsimd.c", |
| 1627 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c", |
| 1628 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c", |
| 1629 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c", |
| 1630 | "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c", |
| 1631 | "src/f32-dwconv/gen/up8x9-wasmsimd.c", |
| 1632 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c", |
| 1633 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c", |
| 1634 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c", |
| 1635 | "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c", |
| 1636 | "src/f32-dwconv/gen/up8x25-wasmsimd.c", |
| 1637 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1638 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1639 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1640 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1641 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1642 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1643 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| 1644 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| 1645 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c", |
| 1646 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c", |
| 1647 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1648 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1649 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1650 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c", |
| 1651 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1652 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c", |
| 1653 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c", |
| 1654 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c", |
| 1655 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c", |
| 1656 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c", |
| 1657 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1658 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1659 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1660 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1661 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1662 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1663 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| 1664 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| 1665 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c", |
| 1666 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c", |
| 1667 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1668 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1669 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1670 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c", |
| 1671 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1672 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c", |
| 1673 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c", |
| 1674 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c", |
| 1675 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c", |
| 1676 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c", |
| 1677 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1678 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1679 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1680 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1681 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1682 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1683 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| 1684 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| 1685 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1686 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1687 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1688 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c", |
| 1689 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1690 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c", |
| 1691 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c", |
| 1692 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c", |
| 1693 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1694 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1695 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1696 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1697 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1698 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1699 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| 1700 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| 1701 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1702 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1703 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1704 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c", |
| 1705 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1706 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c", |
| 1707 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c", |
| 1708 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c", |
| 1709 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1710 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1711 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1712 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c", |
| 1713 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1714 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1715 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c", |
| 1716 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1717 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c", |
| 1718 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| 1719 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c", |
| 1720 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c", |
| 1721 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c", |
| 1722 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1723 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1724 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1725 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c", |
| 1726 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c", |
| 1727 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1728 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c", |
| 1729 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c", |
| 1730 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c", |
| 1731 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c", |
| 1732 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c", |
| 1733 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c", |
| 1734 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c", |
| 1735 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1736 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1737 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1738 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c", |
| 1739 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1740 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1741 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c", |
| 1742 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1743 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c", |
| 1744 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| 1745 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c", |
| 1746 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c", |
| 1747 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c", |
| 1748 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1749 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1750 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1751 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c", |
| 1752 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c", |
| 1753 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1754 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c", |
| 1755 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c", |
| 1756 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c", |
| 1757 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c", |
| 1758 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c", |
| 1759 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4.c", |
| 1760 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c", |
| 1761 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c", |
| 1762 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c", |
| 1763 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c", |
| 1764 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c", |
| 1765 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4.c", |
| 1766 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c", |
| 1767 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c", |
| 1768 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4.c", |
| 1769 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c", |
| 1770 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4.c", |
| 1771 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc2.c", |
| 1772 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc3.c", |
| 1773 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc4.c", |
| 1774 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c", |
| 1775 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4.c", |
| 1776 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc2.c", |
| 1777 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc3.c", |
| 1778 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4.c", |
| 1779 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4-acc2.c", |
| 1780 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4.c", |
| 1781 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c", |
| 1782 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c", |
| 1783 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c", |
| 1784 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c", |
| 1785 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c", |
| 1786 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c", |
| 1787 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c", |
| 1788 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4.c", |
| 1789 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c", |
| 1790 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4.c", |
| 1791 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc2.c", |
| 1792 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc3.c", |
| 1793 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc4.c", |
| 1794 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c", |
| 1795 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4.c", |
| 1796 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc2.c", |
| 1797 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc3.c", |
| 1798 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c", |
| 1799 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c", |
| 1800 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c", |
| 1801 | "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x8.c", |
| 1802 | "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x16.c", |
| 1803 | "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x24.c", |
| 1804 | "src/f32-f16-vcvt/gen/vcvt-wasmsimd-x32.c", |
| 1805 | "src/f32-gavgpool-cw/wasmsimd-arm-x4.c", |
| 1806 | "src/f32-gavgpool-cw/wasmsimd-x86-x4.c", |
| 1807 | "src/f32-gavgpool/7p7x-minmax-wasmsimd-arm-c4.c", |
| 1808 | "src/f32-gavgpool/7p7x-minmax-wasmsimd-x86-c4.c", |
| 1809 | "src/f32-gavgpool/7x-minmax-wasmsimd-arm-c4.c", |
| 1810 | "src/f32-gavgpool/7x-minmax-wasmsimd-x86-c4.c", |
| 1811 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1812 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-splat.c", |
| 1813 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1814 | "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-splat.c", |
| 1815 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c", |
| 1816 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c", |
| 1817 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1818 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-splat.c", |
| 1819 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1820 | "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-splat.c", |
| 1821 | "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c", |
| 1822 | "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c", |
| 1823 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1824 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-splat.c", |
| 1825 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1826 | "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-splat.c", |
| 1827 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c", |
| 1828 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c", |
| 1829 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1830 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-splat.c", |
| 1831 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1832 | "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-splat.c", |
| 1833 | "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c", |
| 1834 | "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c", |
| 1835 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-loadsplat.c", |
| 1836 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-splat.c", |
| 1837 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-loadsplat.c", |
| 1838 | "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-splat.c", |
| 1839 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c", |
| 1840 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c", |
| 1841 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1842 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-splat.c", |
| 1843 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1844 | "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-splat.c", |
| 1845 | "src/f32-gemm/gen/1x8-relu-wasmsimd-splat.c", |
| 1846 | "src/f32-gemm/gen/1x8-wasmsimd-splat.c", |
| 1847 | "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c", |
| 1848 | "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c", |
| 1849 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1850 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-splat.c", |
| 1851 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1852 | "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-splat.c", |
| 1853 | "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c", |
| 1854 | "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c", |
| 1855 | "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-arm.c", |
| 1856 | "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-x86.c", |
| 1857 | "src/f32-gemm/gen/4x2c4-relu-wasmsimd.c", |
| 1858 | "src/f32-gemm/gen/4x2c4-wasmsimd.c", |
| 1859 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1860 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-splat.c", |
| 1861 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1862 | "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-splat.c", |
| 1863 | "src/f32-gemm/gen/4x8-relu-wasmsimd-splat.c", |
| 1864 | "src/f32-gemm/gen/4x8-wasmsimd-splat.c", |
| 1865 | "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c", |
| 1866 | "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c", |
| 1867 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1868 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-splat.c", |
| 1869 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1870 | "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-splat.c", |
| 1871 | "src/f32-gemm/gen/5x8-relu-wasmsimd-splat.c", |
| 1872 | "src/f32-gemm/gen/5x8-wasmsimd-splat.c", |
| 1873 | "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c", |
| 1874 | "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c", |
| 1875 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1876 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-splat.c", |
| 1877 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1878 | "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-splat.c", |
| 1879 | "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c", |
| 1880 | "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c", |
| 1881 | "src/f32-ibilinear-chw/gen/wasmsimd-p4.c", |
| 1882 | "src/f32-ibilinear-chw/gen/wasmsimd-p8.c", |
| 1883 | "src/f32-ibilinear/gen/wasmsimd-c4.c", |
| 1884 | "src/f32-ibilinear/gen/wasmsimd-c8.c", |
| 1885 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1886 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-splat.c", |
| 1887 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1888 | "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-splat.c", |
| 1889 | "src/f32-igemm/gen/1x8-relu-wasmsimd-splat.c", |
| 1890 | "src/f32-igemm/gen/1x8-wasmsimd-splat.c", |
| 1891 | "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c", |
| 1892 | "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c", |
| 1893 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1894 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-splat.c", |
| 1895 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1896 | "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-splat.c", |
| 1897 | "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c", |
| 1898 | "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c", |
| 1899 | "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-arm.c", |
| 1900 | "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-x86.c", |
| 1901 | "src/f32-igemm/gen/4x2c4-relu-wasmsimd.c", |
| 1902 | "src/f32-igemm/gen/4x2c4-wasmsimd.c", |
| 1903 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1904 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-splat.c", |
| 1905 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1906 | "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-splat.c", |
| 1907 | "src/f32-igemm/gen/4x8-relu-wasmsimd-splat.c", |
| 1908 | "src/f32-igemm/gen/4x8-wasmsimd-splat.c", |
| 1909 | "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c", |
| 1910 | "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c", |
| 1911 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1912 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-splat.c", |
| 1913 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1914 | "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-splat.c", |
| 1915 | "src/f32-igemm/gen/5x8-relu-wasmsimd-splat.c", |
| 1916 | "src/f32-igemm/gen/5x8-wasmsimd-splat.c", |
| 1917 | "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c", |
| 1918 | "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c", |
| 1919 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c", |
| 1920 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-splat.c", |
| 1921 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c", |
| 1922 | "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-splat.c", |
| 1923 | "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c", |
| 1924 | "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c", |
| 1925 | "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c", |
| 1926 | "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c", |
| 1927 | "src/f32-pavgpool/9p8x-minmax-wasmsimd-arm-c4.c", |
| 1928 | "src/f32-pavgpool/9p8x-minmax-wasmsimd-x86-c4.c", |
| 1929 | "src/f32-pavgpool/9x-minmax-wasmsimd-arm-c4.c", |
| 1930 | "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c", |
| 1931 | "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c", |
| 1932 | "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c", |
| 1933 | "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c", |
| 1934 | "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c", |
| 1935 | "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c", |
| 1936 | "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c", |
| 1937 | "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c", |
| 1938 | "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c", |
| 1939 | "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c", |
| 1940 | "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c", |
| 1941 | "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c", |
| 1942 | "src/f32-prelu/gen/wasmsimd-minmax-1x4.c", |
| 1943 | "src/f32-prelu/gen/wasmsimd-minmax-1x8.c", |
| 1944 | "src/f32-prelu/gen/wasmsimd-minmax-1x16.c", |
| 1945 | "src/f32-prelu/gen/wasmsimd-minmax-2x4.c", |
| 1946 | "src/f32-prelu/gen/wasmsimd-minmax-2x8.c", |
| 1947 | "src/f32-prelu/gen/wasmsimd-minmax-2x16.c", |
| 1948 | "src/f32-prelu/gen/wasmsimd-minmax-4x4.c", |
| 1949 | "src/f32-prelu/gen/wasmsimd-minmax-4x8.c", |
| 1950 | "src/f32-prelu/gen/wasmsimd-minmax-4x16.c", |
| 1951 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x8.c", |
| 1952 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x16.c", |
| 1953 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x24.c", |
| 1954 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-cvt-x32.c", |
| 1955 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x8.c", |
| 1956 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x16.c", |
| 1957 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x24.c", |
| 1958 | "src/f32-qs8-vcvt/gen/vcvt-wasmsimd-magic-x32.c", |
| 1959 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x8.c", |
| 1960 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x16.c", |
| 1961 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x24.c", |
| 1962 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-cvt-x32.c", |
| 1963 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x8.c", |
| 1964 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x16.c", |
| 1965 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x24.c", |
| 1966 | "src/f32-qu8-vcvt/gen/vcvt-wasmsimd-magic-x32.c", |
| 1967 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x4.c", |
| 1968 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x8-acc2.c", |
| 1969 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x8.c", |
| 1970 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x12-acc2.c", |
| 1971 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x12-acc3.c", |
| 1972 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x12.c", |
| 1973 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x16-acc2.c", |
| 1974 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x16-acc4.c", |
| 1975 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x16.c", |
| 1976 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x20-acc2.c", |
| 1977 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x20-acc5.c", |
| 1978 | "src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x20.c", |
| 1979 | "src/f32-rmax/wasmsimd-arm.c", |
| 1980 | "src/f32-rmax/wasmsimd-x86.c", |
| 1981 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 1982 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c", |
| 1983 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c", |
| 1984 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c", |
| 1985 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c", |
| 1986 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 1987 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c", |
| 1988 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c", |
| 1989 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c", |
| 1990 | "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c", |
| 1991 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 1992 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c", |
| 1993 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c", |
| 1994 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c", |
| 1995 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c", |
| 1996 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 1997 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c", |
| 1998 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c", |
| 1999 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c", |
| 2000 | "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c", |
| 2001 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 2002 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c", |
| 2003 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c", |
| 2004 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c", |
| 2005 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c", |
| 2006 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 2007 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c", |
| 2008 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c", |
| 2009 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c", |
| 2010 | "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c", |
| 2011 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c", |
| 2012 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c", |
| 2013 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c", |
| 2014 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c", |
| 2015 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c", |
| 2016 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c", |
| 2017 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c", |
| 2018 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c", |
| 2019 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c", |
| 2020 | "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c", |
| 2021 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c", |
| 2022 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c", |
| 2023 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c", |
| 2024 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c", |
| 2025 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c", |
| 2026 | "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c", |
| 2027 | "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c", |
| 2028 | "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c", |
| 2029 | "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c", |
| 2030 | "src/f32-vbinary/gen/vadd-wasmsimd-x4.c", |
| 2031 | "src/f32-vbinary/gen/vadd-wasmsimd-x8.c", |
| 2032 | "src/f32-vbinary/gen/vadd-wasmsimd-x16.c", |
| 2033 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c", |
| 2034 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c", |
| 2035 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c", |
| 2036 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c", |
| 2037 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c", |
| 2038 | "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c", |
| 2039 | "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c", |
| 2040 | "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c", |
| 2041 | "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c", |
| 2042 | "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c", |
| 2043 | "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c", |
| 2044 | "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c", |
| 2045 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c", |
| 2046 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c", |
| 2047 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c", |
| 2048 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c", |
| 2049 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c", |
| 2050 | "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c", |
| 2051 | "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c", |
| 2052 | "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c", |
| 2053 | "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c", |
| 2054 | "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c", |
| 2055 | "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c", |
| 2056 | "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c", |
| 2057 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c", |
| 2058 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c", |
| 2059 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c", |
| 2060 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c", |
| 2061 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c", |
| 2062 | "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c", |
| 2063 | "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c", |
| 2064 | "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c", |
| 2065 | "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c", |
| 2066 | "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c", |
| 2067 | "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c", |
| 2068 | "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c", |
| 2069 | "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c", |
| 2070 | "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c", |
| 2071 | "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c", |
| 2072 | "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c", |
| 2073 | "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c", |
| 2074 | "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c", |
| 2075 | "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c", |
| 2076 | "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c", |
| 2077 | "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c", |
| 2078 | "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c", |
| 2079 | "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c", |
| 2080 | "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c", |
| 2081 | "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c", |
| 2082 | "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c", |
| 2083 | "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c", |
| 2084 | "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c", |
| 2085 | "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c", |
| 2086 | "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c", |
| 2087 | "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c", |
| 2088 | "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c", |
| 2089 | "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c", |
| 2090 | "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c", |
| 2091 | "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c", |
| 2092 | "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c", |
| 2093 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c", |
| 2094 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c", |
| 2095 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c", |
| 2096 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c", |
| 2097 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c", |
| 2098 | "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c", |
| 2099 | "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c", |
| 2100 | "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c", |
| 2101 | "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c", |
| 2102 | "src/f32-vbinary/gen/vmul-wasmsimd-x4.c", |
| 2103 | "src/f32-vbinary/gen/vmul-wasmsimd-x8.c", |
| 2104 | "src/f32-vbinary/gen/vmul-wasmsimd-x16.c", |
| 2105 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c", |
| 2106 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c", |
| 2107 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c", |
| 2108 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c", |
| 2109 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c", |
| 2110 | "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c", |
| 2111 | "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c", |
| 2112 | "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c", |
| 2113 | "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c", |
| 2114 | "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c", |
| 2115 | "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c", |
| 2116 | "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c", |
| 2117 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c", |
| 2118 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c", |
| 2119 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c", |
| 2120 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c", |
| 2121 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c", |
| 2122 | "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c", |
| 2123 | "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c", |
| 2124 | "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c", |
| 2125 | "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c", |
| 2126 | "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c", |
| 2127 | "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c", |
| 2128 | "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c", |
| 2129 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c", |
| 2130 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c", |
| 2131 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c", |
| 2132 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c", |
| 2133 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c", |
| 2134 | "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c", |
| 2135 | "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c", |
| 2136 | "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c", |
| 2137 | "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c", |
| 2138 | "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c", |
| 2139 | "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c", |
| 2140 | "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c", |
| 2141 | "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c", |
| 2142 | "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c", |
| 2143 | "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c", |
| 2144 | "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c", |
| 2145 | "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c", |
| 2146 | "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c", |
| 2147 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c", |
| 2148 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c", |
| 2149 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c", |
| 2150 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c", |
| 2151 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c", |
| 2152 | "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c", |
| 2153 | "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c", |
| 2154 | "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c", |
| 2155 | "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c", |
| 2156 | "src/f32-vbinary/gen/vsub-wasmsimd-x4.c", |
| 2157 | "src/f32-vbinary/gen/vsub-wasmsimd-x8.c", |
| 2158 | "src/f32-vbinary/gen/vsub-wasmsimd-x16.c", |
| 2159 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c", |
| 2160 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c", |
| 2161 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c", |
| 2162 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c", |
| 2163 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c", |
| 2164 | "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c", |
| 2165 | "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c", |
| 2166 | "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c", |
| 2167 | "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c", |
| 2168 | "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c", |
| 2169 | "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c", |
| 2170 | "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c", |
| 2171 | "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c", |
| 2172 | "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c", |
| 2173 | "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c", |
| 2174 | "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c", |
| 2175 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c", |
| 2176 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c", |
| 2177 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c", |
| 2178 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c", |
| 2179 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c", |
| 2180 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c", |
| 2181 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c", |
| 2182 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c", |
| 2183 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c", |
| 2184 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c", |
| 2185 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c", |
| 2186 | "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c", |
| 2187 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c", |
| 2188 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c", |
| 2189 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c", |
| 2190 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c", |
| 2191 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c", |
| 2192 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c", |
| 2193 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c", |
| 2194 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c", |
| 2195 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c", |
| 2196 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c", |
| 2197 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c", |
| 2198 | "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c", |
| 2199 | "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c", |
| 2200 | "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c", |
| 2201 | "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c", |
| 2202 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c", |
| 2203 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c", |
| 2204 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c", |
| 2205 | "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c", |
| 2206 | "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c", |
| 2207 | "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c", |
| 2208 | "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c", |
| 2209 | "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c", |
| 2210 | "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c", |
| 2211 | "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c", |
| 2212 | "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c", |
| 2213 | "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c", |
| 2214 | "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c", |
| 2215 | "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c", |
| 2216 | "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c", |
| 2217 | "src/f32-vrnd/gen/vrndd-wasmsimd-native-x4.c", |
| 2218 | "src/f32-vrnd/gen/vrndd-wasmsimd-native-x8.c", |
| 2219 | "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c", |
| 2220 | "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c", |
| 2221 | "src/f32-vrnd/gen/vrndne-wasmsimd-native-x4.c", |
| 2222 | "src/f32-vrnd/gen/vrndne-wasmsimd-native-x8.c", |
| 2223 | "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c", |
| 2224 | "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c", |
| 2225 | "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c", |
| 2226 | "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c", |
| 2227 | "src/f32-vrnd/gen/vrndu-wasmsimd-native-x4.c", |
| 2228 | "src/f32-vrnd/gen/vrndu-wasmsimd-native-x8.c", |
| 2229 | "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c", |
| 2230 | "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c", |
| 2231 | "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c", |
| 2232 | "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c", |
| 2233 | "src/f32-vrnd/gen/vrndz-wasmsimd-native-x4.c", |
| 2234 | "src/f32-vrnd/gen/vrndz-wasmsimd-native-x8.c", |
| 2235 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x4.c", |
| 2236 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x8.c", |
| 2237 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x12.c", |
| 2238 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x16.c", |
| 2239 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x20.c", |
| 2240 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-lut64-p2-div-x24.c", |
| 2241 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x4.c", |
| 2242 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x8.c", |
| 2243 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x12.c", |
| 2244 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x16.c", |
| 2245 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x20.c", |
| 2246 | "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-rr2-p5-div-x24.c", |
| 2247 | "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c", |
| 2248 | "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c", |
| 2249 | "src/f32-vunary/gen/vabs-wasmsimd-x4.c", |
| 2250 | "src/f32-vunary/gen/vabs-wasmsimd-x8.c", |
| 2251 | "src/f32-vunary/gen/vneg-wasmsimd-x4.c", |
| 2252 | "src/f32-vunary/gen/vneg-wasmsimd-x8.c", |
| 2253 | "src/f32-vunary/gen/vsqr-wasmsimd-x4.c", |
| 2254 | "src/f32-vunary/gen/vsqr-wasmsimd-x8.c", |
| 2255 | "src/math/cvt-f16-f32-wasmsimd-int16.c", |
| 2256 | "src/math/cvt-f16-f32-wasmsimd-int32.c", |
| 2257 | "src/math/cvt-f32-f16-wasmsimd.c", |
| 2258 | "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c", |
| 2259 | "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c", |
| 2260 | "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c", |
| 2261 | "src/math/expm1minus-wasmsimd-rr2-p6-max.c", |
| 2262 | "src/math/roundd-wasmsimd-addsub.c", |
| 2263 | "src/math/roundd-wasmsimd-cvt.c", |
| 2264 | "src/math/roundd-wasmsimd-native.c", |
| 2265 | "src/math/roundne-wasmsimd-addsub.c", |
| 2266 | "src/math/roundne-wasmsimd-native.c", |
| 2267 | "src/math/roundu-wasmsimd-addsub.c", |
| 2268 | "src/math/roundu-wasmsimd-cvt.c", |
| 2269 | "src/math/roundu-wasmsimd-native.c", |
| 2270 | "src/math/roundz-wasmsimd-addsub.c", |
| 2271 | "src/math/roundz-wasmsimd-cvt.c", |
| 2272 | "src/math/roundz-wasmsimd-native.c", |
| 2273 | "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c", |
| 2274 | "src/math/sigmoid-wasmsimd-rr2-p5-div.c", |
| 2275 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| 2276 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| 2277 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| 2278 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| 2279 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| 2280 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| 2281 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| 2282 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| 2283 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| 2284 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| 2285 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| 2286 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| 2287 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2288 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2289 | "src/qc8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2290 | "src/qc8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2291 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2292 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2293 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2294 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| 2295 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2296 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2297 | "src/qc8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2298 | "src/qc8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2299 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2300 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2301 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2302 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| 2303 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2304 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2305 | "src/qc8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2306 | "src/qc8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2307 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2308 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2309 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2310 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| 2311 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2312 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2313 | "src/qc8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2314 | "src/qc8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2315 | "src/qc8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2316 | "src/qc8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2317 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2318 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2319 | "src/qc8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2320 | "src/qc8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2321 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2322 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2323 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2324 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| 2325 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2326 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2327 | "src/qc8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2328 | "src/qc8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2329 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2330 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2331 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2332 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| 2333 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2334 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2335 | "src/qc8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2336 | "src/qc8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2337 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2338 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2339 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2340 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| 2341 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2342 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2343 | "src/qc8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2344 | "src/qc8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2345 | "src/qc8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2346 | "src/qc8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2347 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| 2348 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| 2349 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| 2350 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| 2351 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| 2352 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| 2353 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| 2354 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| 2355 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16-add16.c", |
| 2356 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| 2357 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16-add16.c", |
| 2358 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| 2359 | "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x8.c", |
| 2360 | "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x16.c", |
| 2361 | "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x24.c", |
| 2362 | "src/qs8-f32-vcvt/gen/vcvt-wasmsimd-x32.c", |
| 2363 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c8.c", |
| 2364 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c16.c", |
| 2365 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c24.c", |
| 2366 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c32.c", |
| 2367 | "src/qs8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c8.c", |
| 2368 | "src/qs8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c16.c", |
| 2369 | "src/qs8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c24.c", |
| 2370 | "src/qs8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c32.c", |
| 2371 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2372 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2373 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| 2374 | "src/qs8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2375 | "src/qs8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2376 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2377 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2378 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2379 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| 2380 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| 2381 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-wasmsimd-mul16.c", |
| 2382 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2383 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2384 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| 2385 | "src/qs8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2386 | "src/qs8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2387 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2388 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2389 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2390 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| 2391 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| 2392 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-wasmsimd-mul16.c", |
| 2393 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2394 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2395 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| 2396 | "src/qs8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2397 | "src/qs8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2398 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2399 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2400 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2401 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| 2402 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| 2403 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-wasmsimd-mul16.c", |
| 2404 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2405 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2406 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| 2407 | "src/qs8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2408 | "src/qs8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2409 | "src/qs8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2410 | "src/qs8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2411 | "src/qs8-gemm/gen/4x4c8-xw-minmax-fp32-wasmsimd-dot16x2.c", |
| 2412 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2413 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2414 | "src/qs8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2415 | "src/qs8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2416 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2417 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2418 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2419 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| 2420 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2421 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2422 | "src/qs8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2423 | "src/qs8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2424 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2425 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2426 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2427 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| 2428 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2429 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2430 | "src/qs8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2431 | "src/qs8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2432 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2433 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2434 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld64.c", |
| 2435 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul16-ld128.c", |
| 2436 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2437 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2438 | "src/qs8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2439 | "src/qs8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2440 | "src/qs8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2441 | "src/qs8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2442 | "src/qs8-requantization/fp32-wasmsimd.c", |
| 2443 | "src/qs8-requantization/gemmlowp-wasmsimd.c", |
| 2444 | "src/qs8-vadd/gen/minmax-wasmsimd-x8.c", |
| 2445 | "src/qs8-vadd/gen/minmax-wasmsimd-x16.c", |
| 2446 | "src/qs8-vadd/gen/minmax-wasmsimd-x24.c", |
| 2447 | "src/qs8-vadd/gen/minmax-wasmsimd-x32.c", |
| 2448 | "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c", |
| 2449 | "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c", |
| 2450 | "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c", |
| 2451 | "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c", |
| 2452 | "src/qs8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 2453 | "src/qs8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| 2454 | "src/qs8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 2455 | "src/qs8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| 2456 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-wasmsimd-mul16.c", |
| 2457 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-wasmsimd-mul16.c", |
| 2458 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-wasmsimd-mul16.c", |
| 2459 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-wasmsimd-mul16.c", |
| 2460 | "src/qu8-dwconv/gen/up24x9-minmax-fp32-wasmsimd-mul16.c", |
| 2461 | "src/qu8-dwconv/gen/up24x25-minmax-fp32-wasmsimd-mul16.c", |
| 2462 | "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x8.c", |
| 2463 | "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x16.c", |
| 2464 | "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x24.c", |
| 2465 | "src/qu8-f32-vcvt/gen/vcvt-wasmsimd-x32.c", |
| 2466 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c8.c", |
| 2467 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c16.c", |
| 2468 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c24.c", |
| 2469 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-wasmsimd-c32.c", |
| 2470 | "src/qu8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c8.c", |
| 2471 | "src/qu8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c16.c", |
| 2472 | "src/qu8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c24.c", |
| 2473 | "src/qu8-gavgpool/gen/7x-minmax-fp32-wasmsimd-c32.c", |
| 2474 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2475 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2476 | "src/qu8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2477 | "src/qu8-gemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2478 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2479 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2480 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2481 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| 2482 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2483 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2484 | "src/qu8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2485 | "src/qu8-gemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2486 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2487 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2488 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2489 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| 2490 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2491 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2492 | "src/qu8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2493 | "src/qu8-gemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2494 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2495 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2496 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2497 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| 2498 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2499 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2500 | "src/qu8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2501 | "src/qu8-gemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2502 | "src/qu8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2503 | "src/qu8-gemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2504 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2505 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2506 | "src/qu8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2507 | "src/qu8-igemm/gen/1x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2508 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2509 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2510 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2511 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| 2512 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2513 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2514 | "src/qu8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2515 | "src/qu8-igemm/gen/2x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2516 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2517 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2518 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2519 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| 2520 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2521 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2522 | "src/qu8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2523 | "src/qu8-igemm/gen/3x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2524 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2525 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2526 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld64.c", |
| 2527 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-wasmsimd-mul32-ld128.c", |
| 2528 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2529 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2530 | "src/qu8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2531 | "src/qu8-igemm/gen/4x4c2s4-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2532 | "src/qu8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld64.c", |
| 2533 | "src/qu8-igemm/gen/4x4c8-minmax-fp32-wasmsimd-dot16x2-ld128.c", |
| 2534 | "src/qu8-requantization/fp32-wasmsimd.c", |
| 2535 | "src/qu8-requantization/gemmlowp-wasmsimd.c", |
| 2536 | "src/qu8-vadd/gen/minmax-wasmsimd-x8.c", |
| 2537 | "src/qu8-vadd/gen/minmax-wasmsimd-x16.c", |
| 2538 | "src/qu8-vadd/gen/minmax-wasmsimd-x32.c", |
| 2539 | "src/qu8-vaddc/gen/minmax-wasmsimd-x8.c", |
| 2540 | "src/qu8-vaddc/gen/minmax-wasmsimd-x16.c", |
| 2541 | "src/qu8-vaddc/gen/minmax-wasmsimd-x32.c", |
| 2542 | "src/qu8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 2543 | "src/qu8-vmul/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| 2544 | "src/qu8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x8.c", |
| 2545 | "src/qu8-vmulc/gen/minmax-fp32-wasmsimd-mul32-ld64-x16.c", |
| 2546 | "src/s8-ibilinear/gen/wasmsimd-dot16x2-c8.c", |
| 2547 | "src/s8-ibilinear/gen/wasmsimd-dot16x2-c16.c", |
| 2548 | "src/s8-ibilinear/gen/wasmsimd-mul32-c8.c", |
| 2549 | "src/s8-ibilinear/gen/wasmsimd-mul32-c16.c", |
| 2550 | "src/s8-maxpool/9p8x-minmax-wasmsimd-c16.c", |
| 2551 | "src/s8-vclamp/wasmsimd-x64.c", |
| 2552 | "src/u8-ibilinear/gen/wasmsimd-dot16x2-c8.c", |
| 2553 | "src/u8-ibilinear/gen/wasmsimd-dot16x2-c16.c", |
| 2554 | "src/u8-ibilinear/gen/wasmsimd-mul32-c8.c", |
| 2555 | "src/u8-ibilinear/gen/wasmsimd-mul32-c16.c", |
| 2556 | "src/u8-maxpool/9p8x-minmax-wasmsimd-c16.c", |
| 2557 | "src/u8-vclamp/wasmsimd-x64.c", |
| 2558 | "src/x8-lut/gen/lut-wasmsimd-x16.c", |
| 2559 | "src/x8-lut/gen/lut-wasmsimd-x32.c", |
| 2560 | "src/x8-lut/gen/lut-wasmsimd-x48.c", |
| 2561 | "src/x8-lut/gen/lut-wasmsimd-x64.c", |
| 2562 | "src/x32-packx/x4-wasmsimd.c", |
| 2563 | "src/x32-transpose/4x4-wasmsimd.c", |
| 2564 | "src/x32-unpool/wasmsimd.c", |
| 2565 | "src/x32-zip/x2-wasmsimd.c", |
| 2566 | "src/x32-zip/x3-wasmsimd.c", |
| 2567 | "src/x32-zip/x4-wasmsimd.c", |
| 2568 | "src/x32-zip/xm-wasmsimd.c", |
| 2569 | "src/xx-fill/wasmsimd-x64.c", |
| 2570 | "src/xx-pad/wasmsimd.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 2571 | ] |
| 2572 | |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 2573 | // ISA-specific micro-kernels |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 2574 | PROD_NEON_MICROKERNEL_SRCS = [ |
| 2575 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 2576 | "src/f32-argmaxpool/4x-neon-c4.c", |
| 2577 | "src/f32-argmaxpool/9p8x-neon-c4.c", |
| 2578 | "src/f32-argmaxpool/9x-neon-c4.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2579 | "src/f32-avgpool/9p8x-minmax-neon-c4.c", |
| 2580 | "src/f32-avgpool/9x-minmax-neon-c4.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 2581 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c", |
| 2582 | "src/f32-dwconv/gen/up8x3-minmax-neon.c", |
| 2583 | "src/f32-dwconv/gen/up8x4-minmax-neon.c", |
| 2584 | "src/f32-dwconv/gen/up8x9-minmax-neon.c", |
| 2585 | "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c", |
| 2586 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c", |
| 2587 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c", |
| 2588 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c", |
| 2589 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c", |
| 2590 | "src/f32-f16-vcvt/gen/vcvt-neon-x8.c", |
| 2591 | "src/f32-gavgpool-cw/neon-x4.c", |
| 2592 | "src/f32-gavgpool/7p7x-minmax-neon-c4.c", |
| 2593 | "src/f32-gavgpool/7x-minmax-neon-c4.c", |
| 2594 | "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c", |
| 2595 | "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2596 | "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2597 | "src/f32-ibilinear-chw/gen/neon-p8.c", |
| 2598 | "src/f32-ibilinear/gen/neon-c8.c", |
| 2599 | "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c", |
| 2600 | "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2601 | "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2602 | "src/f32-maxpool/9p8x-minmax-neon-c4.c", |
| 2603 | "src/f32-pavgpool/9p8x-minmax-neon-c4.c", |
| 2604 | "src/f32-pavgpool/9x-minmax-neon-c4.c", |
| 2605 | "src/f32-prelu/gen/neon-2x8.c", |
| 2606 | "src/f32-qs8-vcvt/gen/vcvt-neon-x32.c", |
| 2607 | "src/f32-qu8-vcvt/gen/vcvt-neon-x32.c", |
| 2608 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x8.c", |
| 2609 | "src/f32-rmax/neon.c", |
| 2610 | "src/f32-spmm/gen/32x1-minmax-neon.c", |
| 2611 | "src/f32-vbinary/gen/vadd-minmax-neon-x8.c", |
| 2612 | "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c", |
| 2613 | "src/f32-vbinary/gen/vmax-neon-x8.c", |
| 2614 | "src/f32-vbinary/gen/vmaxc-neon-x8.c", |
| 2615 | "src/f32-vbinary/gen/vmin-neon-x8.c", |
| 2616 | "src/f32-vbinary/gen/vminc-neon-x8.c", |
| 2617 | "src/f32-vbinary/gen/vmul-minmax-neon-x8.c", |
| 2618 | "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c", |
| 2619 | "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c", |
| 2620 | "src/f32-vbinary/gen/vsqrdiff-neon-x8.c", |
| 2621 | "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c", |
| 2622 | "src/f32-vbinary/gen/vsub-minmax-neon-x8.c", |
| 2623 | "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c", |
| 2624 | "src/f32-vclamp/gen/vclamp-neon-x8.c", |
| 2625 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c", |
| 2626 | "src/f32-vhswish/gen/vhswish-neon-x16.c", |
| 2627 | "src/f32-vlrelu/gen/vlrelu-neon-x8.c", |
| 2628 | "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c", |
| 2629 | "src/f32-vrnd/gen/vrndd-neon-x8.c", |
| 2630 | "src/f32-vrnd/gen/vrndne-neon-x8.c", |
| 2631 | "src/f32-vrnd/gen/vrndu-neon-x8.c", |
| 2632 | "src/f32-vrnd/gen/vrndz-neon-x8.c", |
| 2633 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c", |
| 2634 | "src/f32-vunary/gen/vabs-neon-x8.c", |
| 2635 | "src/f32-vunary/gen/vneg-neon-x8.c", |
| 2636 | "src/f32-vunary/gen/vsqr-neon-x8.c", |
| 2637 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c", |
| 2638 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c", |
| 2639 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c", |
| 2640 | "src/qc8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| 2641 | "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 2642 | "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 2643 | "src/qc8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| 2644 | "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 2645 | "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 2646 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c", |
| 2647 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c", |
| 2648 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c", |
| 2649 | "src/qs8-f32-vcvt/gen/vcvt-neon-x32.c", |
| 2650 | "src/qs8-gavgpool/gen/7p7x-minmax-rndnu-neon-c8.c", |
| 2651 | "src/qs8-gavgpool/gen/7x-minmax-rndnu-neon-c8.c", |
| 2652 | "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| 2653 | "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| 2654 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 2655 | "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| 2656 | "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| 2657 | "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| 2658 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 2659 | "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| 2660 | "src/qs8-vadd/gen/minmax-neon-ld64-x16.c", |
| 2661 | "src/qs8-vadd/gen/minmax-neon-ld64-x32.c", |
| 2662 | "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c", |
| 2663 | "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c", |
| 2664 | "src/qs8-vmul/gen/minmax-rndnu-neon-ld64-x16.c", |
| 2665 | "src/qs8-vmulc/gen/minmax-rndnu-neon-ld64-x16.c", |
| 2666 | "src/qu8-avgpool/9p8x-minmax-neon-c8.c", |
| 2667 | "src/qu8-avgpool/9x-minmax-neon-c8.c", |
| 2668 | "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c", |
| 2669 | "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c", |
| 2670 | "src/qu8-f32-vcvt/gen/vcvt-neon-x32.c", |
| 2671 | "src/qu8-gavgpool/gen/7p7x-minmax-rndnu-neon-c8.c", |
| 2672 | "src/qu8-gavgpool/gen/7x-minmax-rndnu-neon-c8.c", |
| 2673 | "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| 2674 | "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 2675 | "src/qu8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| 2676 | "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| 2677 | "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| 2678 | "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 2679 | "src/qu8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| 2680 | "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| 2681 | "src/qu8-vadd/gen/minmax-neon-ld64-x16.c", |
| 2682 | "src/qu8-vadd/gen/minmax-neon-ld64-x32.c", |
| 2683 | "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c", |
| 2684 | "src/qu8-vaddc/gen/minmax-neon-ld64-x32.c", |
| 2685 | "src/qu8-vmul/gen/minmax-rndnu-neon-ld64-x16.c", |
| 2686 | "src/qu8-vmulc/gen/minmax-rndnu-neon-ld64-x16.c", |
| 2687 | "src/s8-ibilinear/gen/neon-c8.c", |
| 2688 | "src/s8-ibilinear/gen/neon-c16.c", |
| 2689 | "src/s8-maxpool/9p8x-minmax-neon-c16.c", |
| 2690 | "src/s8-vclamp/neon-x64.c", |
| 2691 | "src/u8-ibilinear/gen/neon-c8.c", |
| 2692 | "src/u8-ibilinear/gen/neon-c16.c", |
| 2693 | "src/u8-maxpool/9p8x-minmax-neon-c16.c", |
| 2694 | "src/u8-rmax/neon.c", |
| 2695 | "src/u8-vclamp/neon-x64.c", |
| 2696 | "src/x8-zip/x2-neon.c", |
| 2697 | "src/x8-zip/x3-neon.c", |
| 2698 | "src/x8-zip/x4-neon.c", |
| 2699 | "src/x8-zip/xm-neon.c", |
| 2700 | "src/x32-packx/x4-neon-st4.c", |
| 2701 | "src/x32-unpool/neon.c", |
| 2702 | "src/x32-zip/x2-neon.c", |
| 2703 | "src/x32-zip/x3-neon.c", |
| 2704 | "src/x32-zip/x4-neon.c", |
| 2705 | "src/x32-zip/xm-neon.c", |
| 2706 | "src/xx-fill/neon-x64.c", |
| 2707 | "src/xx-pad/neon.c", |
| 2708 | ] |
| 2709 | |
| 2710 | ALL_NEON_MICROKERNEL_SRCS = [ |
| 2711 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x8.c", |
| 2712 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x16.c", |
| 2713 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x24.c", |
| 2714 | "src/f16-f32-vcvt/gen/vcvt-neon-int16-x32.c", |
| 2715 | "src/f16-f32-vcvt/gen/vcvt-neon-int32-x8.c", |
| 2716 | "src/f16-f32-vcvt/gen/vcvt-neon-int32-x16.c", |
| 2717 | "src/f16-f32-vcvt/gen/vcvt-neon-int32-x24.c", |
| 2718 | "src/f16-f32-vcvt/gen/vcvt-neon-int32-x32.c", |
| 2719 | "src/f32-argmaxpool/4x-neon-c4.c", |
| 2720 | "src/f32-argmaxpool/9p8x-neon-c4.c", |
| 2721 | "src/f32-argmaxpool/9x-neon-c4.c", |
| 2722 | "src/f32-avgpool/9p8x-minmax-neon-c4.c", |
| 2723 | "src/f32-avgpool/9x-minmax-neon-c4.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 2724 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 2725 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2726 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 2727 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c", |
| 2728 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 2729 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2730 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 2731 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 2732 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 2733 | "src/f32-dwconv/gen/up4x3-minmax-neon-acc2.c", |
| 2734 | "src/f32-dwconv/gen/up4x3-minmax-neon.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 2735 | "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2736 | "src/f32-dwconv/gen/up4x4-minmax-neon.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2737 | "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2738 | "src/f32-dwconv/gen/up4x9-minmax-neon.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 2739 | "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2740 | "src/f32-dwconv/gen/up4x25-minmax-neon.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 2741 | "src/f32-dwconv/gen/up8x3-minmax-neon-acc2.c", |
| 2742 | "src/f32-dwconv/gen/up8x3-minmax-neon.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2743 | "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c", |
| 2744 | "src/f32-dwconv/gen/up8x4-minmax-neon.c", |
| 2745 | "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c", |
| 2746 | "src/f32-dwconv/gen/up8x9-minmax-neon.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 2747 | "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2748 | "src/f32-dwconv/gen/up8x25-minmax-neon.c", |
| 2749 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c", |
| 2750 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c", |
| 2751 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c", |
| 2752 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c", |
| 2753 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c", |
| 2754 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c", |
| 2755 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c", |
| 2756 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c", |
| 2757 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c", |
| 2758 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c", |
| 2759 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c", |
| 2760 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c", |
| 2761 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c", |
| 2762 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c", |
| 2763 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c", |
| 2764 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c", |
| 2765 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c", |
| 2766 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c", |
| 2767 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c", |
| 2768 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c", |
| 2769 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c", |
| 2770 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c", |
| 2771 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c", |
| 2772 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c", |
| 2773 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c", |
| 2774 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c", |
| 2775 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c", |
| 2776 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c", |
| 2777 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c", |
| 2778 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c", |
| 2779 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c", |
| 2780 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c", |
| 2781 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c", |
| 2782 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c", |
| 2783 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c", |
| 2784 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c", |
| 2785 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c", |
| 2786 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c", |
| 2787 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c", |
| 2788 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c", |
| 2789 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 2790 | "src/f32-f16-vcvt/gen/vcvt-neon-x8.c", |
| 2791 | "src/f32-f16-vcvt/gen/vcvt-neon-x16.c", |
| 2792 | "src/f32-f16-vcvt/gen/vcvt-neon-x24.c", |
| 2793 | "src/f32-f16-vcvt/gen/vcvt-neon-x32.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 2794 | "src/f32-gavgpool-cw/neon-x4.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2795 | "src/f32-gavgpool/7p7x-minmax-neon-c4.c", |
| 2796 | "src/f32-gavgpool/7x-minmax-neon-c4.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2797 | "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2798 | "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c", |
| 2799 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2800 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2801 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c", |
| 2802 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c", |
| 2803 | "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c", |
| 2804 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c", |
| 2805 | "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2806 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c", |
| 2807 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2808 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c", |
| 2809 | "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2810 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c", |
| 2811 | "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2812 | "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c", |
| 2813 | "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c", |
| 2814 | "src/f32-gemm/gen/1x8s4-minmax-neon.c", |
| 2815 | "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2816 | "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c", |
| 2817 | "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c", |
| 2818 | "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2819 | "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c", |
| 2820 | "src/f32-gemm/gen/4x8s4-minmax-neon.c", |
| 2821 | "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c", |
| 2822 | "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c", |
| 2823 | "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c", |
| 2824 | "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c", |
| 2825 | "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c", |
| 2826 | "src/f32-gemm/gen/6x8s4-minmax-neon.c", |
| 2827 | "src/f32-gemm/gen/8x8s4-minmax-neon.c", |
| Miao Wang | 338e80e | 2021-03-23 08:56:09 -0700 | [diff] [blame] | 2828 | "src/f32-ibilinear-chw/gen/neon-p4.c", |
| 2829 | "src/f32-ibilinear-chw/gen/neon-p8.c", |
| Miao Wang | 2534c2f | 2020-03-16 11:58:04 -0700 | [diff] [blame] | 2830 | "src/f32-ibilinear/gen/neon-c4.c", |
| 2831 | "src/f32-ibilinear/gen/neon-c8.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2832 | "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2833 | "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2834 | "src/f32-igemm/gen/1x8s4-minmax-neon.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2835 | "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c", |
| 2836 | "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2837 | "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2838 | "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c", |
| 2839 | "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c", |
| 2840 | "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c", |
| 2841 | "src/f32-igemm/gen/4x8s4-minmax-neon.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2842 | "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c", |
| 2843 | "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2844 | "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c", |
| 2845 | "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2846 | "src/f32-igemm/gen/6x8s4-minmax-neon.c", |
| 2847 | "src/f32-igemm/gen/8x8s4-minmax-neon.c", |
| 2848 | "src/f32-maxpool/9p8x-minmax-neon-c4.c", |
| 2849 | "src/f32-pavgpool/9p8x-minmax-neon-c4.c", |
| 2850 | "src/f32-pavgpool/9x-minmax-neon-c4.c", |
| 2851 | "src/f32-ppmm/gen/4x8-minmax-neon.c", |
| 2852 | "src/f32-ppmm/gen/8x8-minmax-neon.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 2853 | "src/f32-prelu/gen/neon-1x4.c", |
| 2854 | "src/f32-prelu/gen/neon-1x8.c", |
| 2855 | "src/f32-prelu/gen/neon-1x16.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 2856 | "src/f32-prelu/gen/neon-2x4.c", |
| 2857 | "src/f32-prelu/gen/neon-2x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 2858 | "src/f32-prelu/gen/neon-2x16.c", |
| 2859 | "src/f32-prelu/gen/neon-4x4.c", |
| 2860 | "src/f32-prelu/gen/neon-4x8.c", |
| 2861 | "src/f32-prelu/gen/neon-4x16.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 2862 | "src/f32-qs8-vcvt/gen/vcvt-neon-x8.c", |
| 2863 | "src/f32-qs8-vcvt/gen/vcvt-neon-x16.c", |
| 2864 | "src/f32-qs8-vcvt/gen/vcvt-neon-x24.c", |
| 2865 | "src/f32-qs8-vcvt/gen/vcvt-neon-x32.c", |
| 2866 | "src/f32-qu8-vcvt/gen/vcvt-neon-x8.c", |
| 2867 | "src/f32-qu8-vcvt/gen/vcvt-neon-x16.c", |
| 2868 | "src/f32-qu8-vcvt/gen/vcvt-neon-x24.c", |
| 2869 | "src/f32-qu8-vcvt/gen/vcvt-neon-x32.c", |
| 2870 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x4.c", |
| 2871 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x8-acc2.c", |
| 2872 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x8.c", |
| 2873 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x12-acc2.c", |
| 2874 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x12-acc3.c", |
| 2875 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x12.c", |
| 2876 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x16-acc2.c", |
| 2877 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x16-acc4.c", |
| 2878 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x16.c", |
| 2879 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x20-acc2.c", |
| 2880 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x20-acc5.c", |
| 2881 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-lut64-p2-x20.c", |
| 2882 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x4.c", |
| 2883 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x8-acc2.c", |
| 2884 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x8.c", |
| 2885 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x12-acc2.c", |
| 2886 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x12-acc3.c", |
| 2887 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x12.c", |
| 2888 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x16-acc2.c", |
| 2889 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x16-acc4.c", |
| 2890 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x16.c", |
| 2891 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x20-acc2.c", |
| 2892 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x20-acc5.c", |
| 2893 | "src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x20.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 2894 | "src/f32-rmax/neon.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 2895 | "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c", |
| 2896 | "src/f32-spmm/gen/4x1-minmax-neon-x2.c", |
| 2897 | "src/f32-spmm/gen/4x1-minmax-neon.c", |
| 2898 | "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c", |
| 2899 | "src/f32-spmm/gen/8x1-minmax-neon-x2.c", |
| 2900 | "src/f32-spmm/gen/8x1-minmax-neon.c", |
| 2901 | "src/f32-spmm/gen/12x1-minmax-neon.c", |
| 2902 | "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c", |
| 2903 | "src/f32-spmm/gen/16x1-minmax-neon-x2.c", |
| 2904 | "src/f32-spmm/gen/16x1-minmax-neon.c", |
| 2905 | "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c", |
| 2906 | "src/f32-spmm/gen/32x1-minmax-neon-x2.c", |
| 2907 | "src/f32-spmm/gen/32x1-minmax-neon.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2908 | "src/f32-vbinary/gen/vadd-minmax-neon-x4.c", |
| 2909 | "src/f32-vbinary/gen/vadd-minmax-neon-x8.c", |
| 2910 | "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c", |
| 2911 | "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 2912 | "src/f32-vbinary/gen/vmax-neon-x4.c", |
| 2913 | "src/f32-vbinary/gen/vmax-neon-x8.c", |
| 2914 | "src/f32-vbinary/gen/vmaxc-neon-x4.c", |
| 2915 | "src/f32-vbinary/gen/vmaxc-neon-x8.c", |
| 2916 | "src/f32-vbinary/gen/vmin-neon-x4.c", |
| 2917 | "src/f32-vbinary/gen/vmin-neon-x8.c", |
| 2918 | "src/f32-vbinary/gen/vminc-neon-x4.c", |
| 2919 | "src/f32-vbinary/gen/vminc-neon-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2920 | "src/f32-vbinary/gen/vmul-minmax-neon-x4.c", |
| 2921 | "src/f32-vbinary/gen/vmul-minmax-neon-x8.c", |
| 2922 | "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c", |
| 2923 | "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c", |
| 2924 | "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c", |
| 2925 | "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 2926 | "src/f32-vbinary/gen/vsqrdiff-neon-x4.c", |
| 2927 | "src/f32-vbinary/gen/vsqrdiff-neon-x8.c", |
| 2928 | "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c", |
| 2929 | "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2930 | "src/f32-vbinary/gen/vsub-minmax-neon-x4.c", |
| 2931 | "src/f32-vbinary/gen/vsub-minmax-neon-x8.c", |
| 2932 | "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c", |
| 2933 | "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 2934 | "src/f32-vclamp/gen/vclamp-neon-x4.c", |
| 2935 | "src/f32-vclamp/gen/vclamp-neon-x8.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 2936 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c", |
| 2937 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c", |
| 2938 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c", |
| 2939 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c", |
| 2940 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c", |
| 2941 | "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c", |
| 2942 | "src/f32-velu/gen/velu-neon-rr2-p6-x4.c", |
| 2943 | "src/f32-velu/gen/velu-neon-rr2-p6-x8.c", |
| 2944 | "src/f32-velu/gen/velu-neon-rr2-p6-x12.c", |
| 2945 | "src/f32-velu/gen/velu-neon-rr2-p6-x16.c", |
| 2946 | "src/f32-velu/gen/velu-neon-rr2-p6-x20.c", |
| 2947 | "src/f32-velu/gen/velu-neon-rr2-p6-x24.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 2948 | "src/f32-vhswish/gen/vhswish-neon-x4.c", |
| 2949 | "src/f32-vhswish/gen/vhswish-neon-x8.c", |
| 2950 | "src/f32-vhswish/gen/vhswish-neon-x16.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 2951 | "src/f32-vlrelu/gen/vlrelu-neon-x4.c", |
| 2952 | "src/f32-vlrelu/gen/vlrelu-neon-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 2953 | "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c", |
| 2954 | "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 2955 | "src/f32-vrelu/gen/vrelu-neon-x4.c", |
| 2956 | "src/f32-vrelu/gen/vrelu-neon-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 2957 | "src/f32-vrnd/gen/vrndd-neon-x4.c", |
| 2958 | "src/f32-vrnd/gen/vrndd-neon-x8.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2959 | "src/f32-vrnd/gen/vrndne-neon-x4.c", |
| 2960 | "src/f32-vrnd/gen/vrndne-neon-x8.c", |
| 2961 | "src/f32-vrnd/gen/vrndu-neon-x4.c", |
| 2962 | "src/f32-vrnd/gen/vrndu-neon-x8.c", |
| 2963 | "src/f32-vrnd/gen/vrndz-neon-x4.c", |
| 2964 | "src/f32-vrnd/gen/vrndz-neon-x8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 2965 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c", |
| 2966 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c", |
| 2967 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c", |
| 2968 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c", |
| 2969 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c", |
| 2970 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c", |
| 2971 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c", |
| 2972 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c", |
| 2973 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c", |
| 2974 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c", |
| 2975 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c", |
| 2976 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c", |
| 2977 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c", |
| 2978 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c", |
| 2979 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c", |
| 2980 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c", |
| 2981 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c", |
| 2982 | "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 2983 | "src/f32-vunary/gen/vabs-neon-x4.c", |
| 2984 | "src/f32-vunary/gen/vabs-neon-x8.c", |
| 2985 | "src/f32-vunary/gen/vneg-neon-x4.c", |
| 2986 | "src/f32-vunary/gen/vneg-neon-x8.c", |
| 2987 | "src/f32-vunary/gen/vsqr-neon-x4.c", |
| 2988 | "src/f32-vunary/gen/vsqr-neon-x8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 2989 | "src/math/cvt-f16-f32-neon-int16.c", |
| 2990 | "src/math/cvt-f16-f32-neon-int32.c", |
| 2991 | "src/math/cvt-f32-f16-neon.c", |
| 2992 | "src/math/cvt-f32-qs8-neon.c", |
| 2993 | "src/math/cvt-f32-qu8-neon.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 2994 | "src/math/expm1minus-neon-rr2-lut16-p3.c", |
| 2995 | "src/math/expm1minus-neon-rr2-p6.c", |
| 2996 | "src/math/roundd-neon-addsub.c", |
| 2997 | "src/math/roundd-neon-cvt.c", |
| 2998 | "src/math/roundne-neon-addsub.c", |
| 2999 | "src/math/roundu-neon-addsub.c", |
| 3000 | "src/math/roundu-neon-cvt.c", |
| 3001 | "src/math/roundz-neon-addsub.c", |
| 3002 | "src/math/roundz-neon-cvt.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 3003 | "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c", |
| 3004 | "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c", |
| 3005 | "src/math/sigmoid-neon-rr2-p5-nr2recps.c", |
| 3006 | "src/math/sqrt-neon-nr1rsqrts.c", |
| 3007 | "src/math/sqrt-neon-nr2rsqrts.c", |
| 3008 | "src/math/sqrt-neon-nr3rsqrts.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3009 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mla8-ld64.c", |
| 3010 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul8-ld64.c", |
| 3011 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| 3012 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mla8-ld64.c", |
| 3013 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul8-ld64.c", |
| 3014 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| 3015 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld64.c", |
| 3016 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mla8-ld128.c", |
| 3017 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld64.c", |
| 3018 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul8-ld128.c", |
| 3019 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| 3020 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld64.c", |
| 3021 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mla8-ld128.c", |
| 3022 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld64.c", |
| 3023 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul8-ld128.c", |
| 3024 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| 3025 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| 3026 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| 3027 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| 3028 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| 3029 | "src/qc8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3030 | "src/qc8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| 3031 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| 3032 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3033 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| 3034 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| 3035 | "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 3036 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| 3037 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3038 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| 3039 | "src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| 3040 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| 3041 | "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3042 | "src/qc8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| 3043 | "src/qc8-gemm/gen/2x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3044 | "src/qc8-gemm/gen/2x8-minmax-fp32-neon-mlal-lane.c", |
| 3045 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| 3046 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3047 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| 3048 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| 3049 | "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 3050 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| 3051 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3052 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| 3053 | "src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| 3054 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| 3055 | "src/qc8-gemm/gen/2x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3056 | "src/qc8-gemm/gen/2x16-minmax-fp32-neon-mlal-lane.c", |
| 3057 | "src/qc8-gemm/gen/3x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3058 | "src/qc8-gemm/gen/3x8-minmax-fp32-neon-mlal-lane.c", |
| 3059 | "src/qc8-gemm/gen/3x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3060 | "src/qc8-gemm/gen/3x16-minmax-fp32-neon-mlal-lane.c", |
| 3061 | "src/qc8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3062 | "src/qc8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| 3063 | "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3064 | "src/qc8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| 3065 | "src/qc8-gemm/gen/6x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3066 | "src/qc8-gemm/gen/6x8-minmax-fp32-neon-mlal-lane.c", |
| 3067 | "src/qc8-gemm/gen/6x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3068 | "src/qc8-gemm/gen/6x16-minmax-fp32-neon-mlal-lane.c", |
| 3069 | "src/qc8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3070 | "src/qc8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| 3071 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| 3072 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3073 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| 3074 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| 3075 | "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 3076 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| 3077 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3078 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| 3079 | "src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| 3080 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| 3081 | "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3082 | "src/qc8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| 3083 | "src/qc8-igemm/gen/2x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3084 | "src/qc8-igemm/gen/2x8-minmax-fp32-neon-mlal-lane.c", |
| 3085 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| 3086 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3087 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| 3088 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| 3089 | "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 3090 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| 3091 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3092 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| 3093 | "src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| 3094 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| 3095 | "src/qc8-igemm/gen/2x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3096 | "src/qc8-igemm/gen/2x16-minmax-fp32-neon-mlal-lane.c", |
| 3097 | "src/qc8-igemm/gen/3x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3098 | "src/qc8-igemm/gen/3x8-minmax-fp32-neon-mlal-lane.c", |
| 3099 | "src/qc8-igemm/gen/3x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3100 | "src/qc8-igemm/gen/3x16-minmax-fp32-neon-mlal-lane.c", |
| 3101 | "src/qc8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3102 | "src/qc8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| 3103 | "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3104 | "src/qc8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| 3105 | "src/qc8-igemm/gen/6x8-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3106 | "src/qc8-igemm/gen/6x8-minmax-fp32-neon-mlal-lane.c", |
| 3107 | "src/qc8-igemm/gen/6x16-minmax-fp32-neon-mlal-lane-prfm.c", |
| 3108 | "src/qc8-igemm/gen/6x16-minmax-fp32-neon-mlal-lane.c", |
| 3109 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| 3110 | "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mla8-ld64.c", |
| 3111 | "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8-ld64.c", |
| 3112 | "src/qs8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c", |
| 3113 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| 3114 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mla8-ld64.c", |
| 3115 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8-ld64.c", |
| 3116 | "src/qs8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c", |
| 3117 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| 3118 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld64.c", |
| 3119 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mla8-ld128.c", |
| 3120 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld64.c", |
| 3121 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8-ld128.c", |
| 3122 | "src/qs8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c", |
| 3123 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| 3124 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld64.c", |
| 3125 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mla8-ld128.c", |
| 3126 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld64.c", |
| 3127 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8-ld128.c", |
| 3128 | "src/qs8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c", |
| 3129 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| 3130 | "src/qs8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c", |
| 3131 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| 3132 | "src/qs8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c", |
| 3133 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| 3134 | "src/qs8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c", |
| 3135 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| 3136 | "src/qs8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c", |
| 3137 | "src/qs8-f32-vcvt/gen/vcvt-neon-x8.c", |
| 3138 | "src/qs8-f32-vcvt/gen/vcvt-neon-x16.c", |
| 3139 | "src/qs8-f32-vcvt/gen/vcvt-neon-x24.c", |
| 3140 | "src/qs8-f32-vcvt/gen/vcvt-neon-x32.c", |
| 3141 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neon-c8.c", |
| 3142 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neon-c16.c", |
| 3143 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neon-c24.c", |
| 3144 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neon-c32.c", |
| 3145 | "src/qs8-gavgpool/gen/7p7x-minmax-rndnu-neon-c8.c", |
| 3146 | "src/qs8-gavgpool/gen/7p7x-minmax-rndnu-neon-c16.c", |
| 3147 | "src/qs8-gavgpool/gen/7p7x-minmax-rndnu-neon-c24.c", |
| 3148 | "src/qs8-gavgpool/gen/7p7x-minmax-rndnu-neon-c32.c", |
| 3149 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neon-c8.c", |
| 3150 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neon-c16.c", |
| 3151 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neon-c24.c", |
| 3152 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neon-c32.c", |
| 3153 | "src/qs8-gavgpool/gen/7x-minmax-rndnu-neon-c8.c", |
| 3154 | "src/qs8-gavgpool/gen/7x-minmax-rndnu-neon-c16.c", |
| 3155 | "src/qs8-gavgpool/gen/7x-minmax-rndnu-neon-c24.c", |
| 3156 | "src/qs8-gavgpool/gen/7x-minmax-rndnu-neon-c32.c", |
| 3157 | "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3158 | "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| 3159 | "src/qs8-gemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c", |
| 3160 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| 3161 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3162 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| 3163 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| 3164 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c", |
| 3165 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3166 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3167 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3168 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c", |
| 3169 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3170 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3171 | "src/qs8-gemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3172 | "src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 3173 | "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3174 | "src/qs8-gemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c", |
| 3175 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| 3176 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3177 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| 3178 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c", |
| 3179 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3180 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3181 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c", |
| 3182 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3183 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3184 | "src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| 3185 | "src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3186 | "src/qs8-gemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c", |
| 3187 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| 3188 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mlal.c", |
| 3189 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-neon-mull.c", |
| 3190 | "src/qs8-gemm/gen/1x8c16-minmax-rndnu-neon-mlal.c", |
| 3191 | "src/qs8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| 3192 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3193 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 3194 | "src/qs8-gemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c", |
| 3195 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c", |
| 3196 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3197 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3198 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3199 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c", |
| 3200 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3201 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3202 | "src/qs8-gemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3203 | "src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3204 | "src/qs8-gemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c", |
| 3205 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c", |
| 3206 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3207 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3208 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c", |
| 3209 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3210 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3211 | "src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3212 | "src/qs8-gemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c", |
| 3213 | "src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mlal.c", |
| 3214 | "src/qs8-gemm/gen/1x16c8-minmax-rndnu-neon-mull.c", |
| 3215 | "src/qs8-gemm/gen/1x16c16-minmax-rndnu-neon-mlal.c", |
| 3216 | "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3217 | "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c", |
| 3218 | "src/qs8-gemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c", |
| 3219 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| 3220 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3221 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| 3222 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| 3223 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c", |
| 3224 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3225 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3226 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3227 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c", |
| 3228 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3229 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3230 | "src/qs8-gemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3231 | "src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 3232 | "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3233 | "src/qs8-gemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c", |
| 3234 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| 3235 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3236 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| 3237 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c", |
| 3238 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3239 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3240 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c", |
| 3241 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3242 | "src/qs8-gemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3243 | "src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| 3244 | "src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3245 | "src/qs8-gemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c", |
| 3246 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| 3247 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mlal.c", |
| 3248 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-neon-mull.c", |
| 3249 | "src/qs8-gemm/gen/2x8c16-minmax-rndnu-neon-mlal.c", |
| 3250 | "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3251 | "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c", |
| 3252 | "src/qs8-gemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c", |
| 3253 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c", |
| 3254 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3255 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3256 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3257 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c", |
| 3258 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3259 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3260 | "src/qs8-gemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3261 | "src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3262 | "src/qs8-gemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c", |
| 3263 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c", |
| 3264 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3265 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3266 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c", |
| 3267 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3268 | "src/qs8-gemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3269 | "src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3270 | "src/qs8-gemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c", |
| 3271 | "src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mlal.c", |
| 3272 | "src/qs8-gemm/gen/2x16c8-minmax-rndnu-neon-mull.c", |
| 3273 | "src/qs8-gemm/gen/2x16c16-minmax-rndnu-neon-mlal.c", |
| 3274 | "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3275 | "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| 3276 | "src/qs8-gemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c", |
| 3277 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c", |
| 3278 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3279 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3280 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3281 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c", |
| 3282 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3283 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3284 | "src/qs8-gemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3285 | "src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3286 | "src/qs8-gemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c", |
| 3287 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c", |
| 3288 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3289 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3290 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c", |
| 3291 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3292 | "src/qs8-gemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3293 | "src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3294 | "src/qs8-gemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c", |
| 3295 | "src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mlal.c", |
| 3296 | "src/qs8-gemm/gen/3x8c8-minmax-rndnu-neon-mull.c", |
| 3297 | "src/qs8-gemm/gen/3x8c16-minmax-rndnu-neon-mlal.c", |
| 3298 | "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3299 | "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c", |
| 3300 | "src/qs8-gemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c", |
| 3301 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c", |
| 3302 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3303 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3304 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3305 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c", |
| 3306 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3307 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3308 | "src/qs8-gemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3309 | "src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3310 | "src/qs8-gemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c", |
| 3311 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c", |
| 3312 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3313 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3314 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c", |
| 3315 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3316 | "src/qs8-gemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3317 | "src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3318 | "src/qs8-gemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c", |
| 3319 | "src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mlal.c", |
| 3320 | "src/qs8-gemm/gen/3x16c8-minmax-rndnu-neon-mull.c", |
| 3321 | "src/qs8-gemm/gen/3x16c16-minmax-rndnu-neon-mlal.c", |
| 3322 | "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3323 | "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| 3324 | "src/qs8-gemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c", |
| 3325 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c", |
| 3326 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3327 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3328 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3329 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c", |
| 3330 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3331 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3332 | "src/qs8-gemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3333 | "src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3334 | "src/qs8-gemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c", |
| 3335 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c", |
| 3336 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3337 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3338 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c", |
| 3339 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3340 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3341 | "src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3342 | "src/qs8-gemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c", |
| 3343 | "src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mlal.c", |
| 3344 | "src/qs8-gemm/gen/4x8c8-minmax-rndnu-neon-mull.c", |
| 3345 | "src/qs8-gemm/gen/4x8c16-minmax-rndnu-neon-mlal.c", |
| 3346 | "src/qs8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| 3347 | "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3348 | "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| 3349 | "src/qs8-gemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c", |
| 3350 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c", |
| 3351 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3352 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3353 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3354 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c", |
| 3355 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3356 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3357 | "src/qs8-gemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3358 | "src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3359 | "src/qs8-gemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c", |
| 3360 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c", |
| 3361 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3362 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3363 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c", |
| 3364 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3365 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3366 | "src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3367 | "src/qs8-gemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c", |
| 3368 | "src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mlal.c", |
| 3369 | "src/qs8-gemm/gen/4x16c8-minmax-rndnu-neon-mull.c", |
| 3370 | "src/qs8-gemm/gen/4x16c16-minmax-rndnu-neon-mlal.c", |
| 3371 | "src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3372 | "src/qs8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c", |
| 3373 | "src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3374 | "src/qs8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c", |
| 3375 | "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3376 | "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| 3377 | "src/qs8-igemm/gen/1x8-minmax-rndnu-neon-mull-addw-dup.c", |
| 3378 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-dup.c", |
| 3379 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3380 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| 3381 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| 3382 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-dup.c", |
| 3383 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3384 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3385 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3386 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-dup.c", |
| 3387 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3388 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3389 | "src/qs8-igemm/gen/1x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3390 | "src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neon-mlal.c", |
| 3391 | "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3392 | "src/qs8-igemm/gen/1x8c2s4-minmax-rndnu-neon-mull.c", |
| 3393 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-dup.c", |
| 3394 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3395 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| 3396 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-dup.c", |
| 3397 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3398 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3399 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-dup.c", |
| 3400 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3401 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3402 | "src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neon-mlal.c", |
| 3403 | "src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3404 | "src/qs8-igemm/gen/1x8c4s2-minmax-rndnu-neon-mull.c", |
| 3405 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-neon-mlal.c", |
| 3406 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mlal.c", |
| 3407 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-neon-mull.c", |
| 3408 | "src/qs8-igemm/gen/1x8c16-minmax-rndnu-neon-mlal.c", |
| 3409 | "src/qs8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| 3410 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3411 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 3412 | "src/qs8-igemm/gen/1x16-minmax-rndnu-neon-mull-addw-dup.c", |
| 3413 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-dup.c", |
| 3414 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3415 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3416 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3417 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-dup.c", |
| 3418 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3419 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3420 | "src/qs8-igemm/gen/1x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3421 | "src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3422 | "src/qs8-igemm/gen/1x16c2s4-minmax-rndnu-neon-mull.c", |
| 3423 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-dup.c", |
| 3424 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3425 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3426 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-dup.c", |
| 3427 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3428 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3429 | "src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3430 | "src/qs8-igemm/gen/1x16c4s2-minmax-rndnu-neon-mull.c", |
| 3431 | "src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mlal.c", |
| 3432 | "src/qs8-igemm/gen/1x16c8-minmax-rndnu-neon-mull.c", |
| 3433 | "src/qs8-igemm/gen/1x16c16-minmax-rndnu-neon-mlal.c", |
| 3434 | "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3435 | "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c", |
| 3436 | "src/qs8-igemm/gen/2x8-minmax-rndnu-neon-mull-addw-dup.c", |
| 3437 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-dup.c", |
| 3438 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld1r.c", |
| 3439 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld2r.c", |
| 3440 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neon-mlal-ld4r.c", |
| 3441 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-dup.c", |
| 3442 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3443 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3444 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3445 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-dup.c", |
| 3446 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3447 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3448 | "src/qs8-igemm/gen/2x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3449 | "src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neon-mlal.c", |
| 3450 | "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3451 | "src/qs8-igemm/gen/2x8c2s4-minmax-rndnu-neon-mull.c", |
| 3452 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-dup.c", |
| 3453 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld1r.c", |
| 3454 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neon-mlal-ld2r.c", |
| 3455 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-dup.c", |
| 3456 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3457 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3458 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-dup.c", |
| 3459 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3460 | "src/qs8-igemm/gen/2x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3461 | "src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neon-mlal.c", |
| 3462 | "src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3463 | "src/qs8-igemm/gen/2x8c4s2-minmax-rndnu-neon-mull.c", |
| 3464 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-neon-mlal.c", |
| 3465 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mlal.c", |
| 3466 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-neon-mull.c", |
| 3467 | "src/qs8-igemm/gen/2x8c16-minmax-rndnu-neon-mlal.c", |
| 3468 | "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3469 | "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c", |
| 3470 | "src/qs8-igemm/gen/2x16-minmax-rndnu-neon-mull-addw-dup.c", |
| 3471 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-dup.c", |
| 3472 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3473 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3474 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3475 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-dup.c", |
| 3476 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3477 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3478 | "src/qs8-igemm/gen/2x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3479 | "src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3480 | "src/qs8-igemm/gen/2x16c2s4-minmax-rndnu-neon-mull.c", |
| 3481 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-dup.c", |
| 3482 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3483 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3484 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-dup.c", |
| 3485 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3486 | "src/qs8-igemm/gen/2x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3487 | "src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3488 | "src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c", |
| 3489 | "src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mlal.c", |
| 3490 | "src/qs8-igemm/gen/2x16c8-minmax-rndnu-neon-mull.c", |
| 3491 | "src/qs8-igemm/gen/2x16c16-minmax-rndnu-neon-mlal.c", |
| 3492 | "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3493 | "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| 3494 | "src/qs8-igemm/gen/3x8-minmax-rndnu-neon-mull-addw-dup.c", |
| 3495 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-dup.c", |
| 3496 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3497 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3498 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3499 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-dup.c", |
| 3500 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3501 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3502 | "src/qs8-igemm/gen/3x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3503 | "src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3504 | "src/qs8-igemm/gen/3x8c2s4-minmax-rndnu-neon-mull.c", |
| 3505 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-dup.c", |
| 3506 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3507 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3508 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-dup.c", |
| 3509 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3510 | "src/qs8-igemm/gen/3x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3511 | "src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3512 | "src/qs8-igemm/gen/3x8c4s2-minmax-rndnu-neon-mull.c", |
| 3513 | "src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mlal.c", |
| 3514 | "src/qs8-igemm/gen/3x8c8-minmax-rndnu-neon-mull.c", |
| 3515 | "src/qs8-igemm/gen/3x8c16-minmax-rndnu-neon-mlal.c", |
| 3516 | "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3517 | "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c", |
| 3518 | "src/qs8-igemm/gen/3x16-minmax-rndnu-neon-mull-addw-dup.c", |
| 3519 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-dup.c", |
| 3520 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3521 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3522 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3523 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-dup.c", |
| 3524 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3525 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3526 | "src/qs8-igemm/gen/3x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3527 | "src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3528 | "src/qs8-igemm/gen/3x16c2s4-minmax-rndnu-neon-mull.c", |
| 3529 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-dup.c", |
| 3530 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3531 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3532 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-dup.c", |
| 3533 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3534 | "src/qs8-igemm/gen/3x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3535 | "src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3536 | "src/qs8-igemm/gen/3x16c4s2-minmax-rndnu-neon-mull.c", |
| 3537 | "src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mlal.c", |
| 3538 | "src/qs8-igemm/gen/3x16c8-minmax-rndnu-neon-mull.c", |
| 3539 | "src/qs8-igemm/gen/3x16c16-minmax-rndnu-neon-mlal.c", |
| 3540 | "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3541 | "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| 3542 | "src/qs8-igemm/gen/4x8-minmax-rndnu-neon-mull-addw-dup.c", |
| 3543 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-dup.c", |
| 3544 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3545 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3546 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3547 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-dup.c", |
| 3548 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3549 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3550 | "src/qs8-igemm/gen/4x8c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3551 | "src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mlal.c", |
| 3552 | "src/qs8-igemm/gen/4x8c2s4-minmax-rndnu-neon-mull.c", |
| 3553 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-dup.c", |
| 3554 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3555 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3556 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-dup.c", |
| 3557 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3558 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3559 | "src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mlal.c", |
| 3560 | "src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c", |
| 3561 | "src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mlal.c", |
| 3562 | "src/qs8-igemm/gen/4x8c8-minmax-rndnu-neon-mull.c", |
| 3563 | "src/qs8-igemm/gen/4x8c16-minmax-rndnu-neon-mlal.c", |
| 3564 | "src/qs8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| 3565 | "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3566 | "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| 3567 | "src/qs8-igemm/gen/4x16-minmax-rndnu-neon-mull-addw-dup.c", |
| 3568 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-dup.c", |
| 3569 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld1r.c", |
| 3570 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld2r.c", |
| 3571 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mlal-ld4r.c", |
| 3572 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-dup.c", |
| 3573 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld1r.c", |
| 3574 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld2r.c", |
| 3575 | "src/qs8-igemm/gen/4x16c2-minmax-rndnu-neon-mull-ld4r.c", |
| 3576 | "src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mlal.c", |
| 3577 | "src/qs8-igemm/gen/4x16c2s4-minmax-rndnu-neon-mull.c", |
| 3578 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-dup.c", |
| 3579 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld1r.c", |
| 3580 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mlal-ld2r.c", |
| 3581 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-dup.c", |
| 3582 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld1r.c", |
| 3583 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neon-mull-ld2r.c", |
| 3584 | "src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mlal.c", |
| 3585 | "src/qs8-igemm/gen/4x16c4s2-minmax-rndnu-neon-mull.c", |
| 3586 | "src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mlal.c", |
| 3587 | "src/qs8-igemm/gen/4x16c8-minmax-rndnu-neon-mull.c", |
| 3588 | "src/qs8-igemm/gen/4x16c16-minmax-rndnu-neon-mlal.c", |
| 3589 | "src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3590 | "src/qs8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c", |
| 3591 | "src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane-prfm.c", |
| 3592 | "src/qs8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 3593 | "src/qs8-requantization/fp32-neon.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3594 | "src/qs8-requantization/gemmlowp-neon.c", |
| 3595 | "src/qs8-requantization/rndna-neon.c", |
| 3596 | "src/qs8-requantization/rndnu-neon-mull.c", |
| 3597 | "src/qs8-requantization/rndnu-neon-qdmulh.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 3598 | "src/qs8-vadd/gen/minmax-neon-ld64-x8.c", |
| 3599 | "src/qs8-vadd/gen/minmax-neon-ld64-x16.c", |
| 3600 | "src/qs8-vadd/gen/minmax-neon-ld64-x24.c", |
| 3601 | "src/qs8-vadd/gen/minmax-neon-ld64-x32.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3602 | "src/qs8-vadd/gen/minmax-neon-ld128-x16.c", |
| 3603 | "src/qs8-vadd/gen/minmax-neon-ld128-x32.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 3604 | "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c", |
| 3605 | "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c", |
| 3606 | "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c", |
| 3607 | "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3608 | "src/qs8-vaddc/gen/minmax-neon-ld128-x16.c", |
| 3609 | "src/qs8-vaddc/gen/minmax-neon-ld128-x32.c", |
| 3610 | "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x8.c", |
| 3611 | "src/qs8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| 3612 | "src/qs8-vmul/gen/minmax-fp32-neon-ld128-x16.c", |
| 3613 | "src/qs8-vmul/gen/minmax-rndnu-neon-ld64-x8.c", |
| 3614 | "src/qs8-vmul/gen/minmax-rndnu-neon-ld64-x16.c", |
| 3615 | "src/qs8-vmul/gen/minmax-rndnu-neon-ld128-x16.c", |
| 3616 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x8.c", |
| 3617 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| 3618 | "src/qs8-vmulc/gen/minmax-fp32-neon-ld128-x16.c", |
| 3619 | "src/qs8-vmulc/gen/minmax-rndnu-neon-ld64-x8.c", |
| 3620 | "src/qs8-vmulc/gen/minmax-rndnu-neon-ld64-x16.c", |
| 3621 | "src/qs8-vmulc/gen/minmax-rndnu-neon-ld128-x16.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 3622 | "src/qu8-avgpool/9p8x-minmax-neon-c8.c", |
| 3623 | "src/qu8-avgpool/9x-minmax-neon-c8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3624 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-neon-mul16.c", |
| 3625 | "src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul8.c", |
| 3626 | "src/qu8-dwconv/gen/up8x9-minmax-rndnu-neon-mul16.c", |
| 3627 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-neon-mul16.c", |
| 3628 | "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul8.c", |
| 3629 | "src/qu8-dwconv/gen/up8x25-minmax-rndnu-neon-mul16.c", |
| 3630 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-neon-mul16.c", |
| 3631 | "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul8.c", |
| 3632 | "src/qu8-dwconv/gen/up16x9-minmax-rndnu-neon-mul16.c", |
| 3633 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-neon-mul16.c", |
| 3634 | "src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul8.c", |
| 3635 | "src/qu8-dwconv/gen/up16x25-minmax-rndnu-neon-mul16.c", |
| 3636 | "src/qu8-dwconv/gen/up24x9-minmax-fp32-neon-mul16.c", |
| 3637 | "src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul8.c", |
| 3638 | "src/qu8-dwconv/gen/up24x9-minmax-rndnu-neon-mul16.c", |
| 3639 | "src/qu8-dwconv/gen/up24x25-minmax-fp32-neon-mul16.c", |
| 3640 | "src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul8.c", |
| 3641 | "src/qu8-dwconv/gen/up24x25-minmax-rndnu-neon-mul16.c", |
| 3642 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-neon-mul16.c", |
| 3643 | "src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul8.c", |
| 3644 | "src/qu8-dwconv/gen/up32x9-minmax-rndnu-neon-mul16.c", |
| 3645 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-neon-mul16.c", |
| 3646 | "src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul8.c", |
| 3647 | "src/qu8-dwconv/gen/up32x25-minmax-rndnu-neon-mul16.c", |
| 3648 | "src/qu8-f32-vcvt/gen/vcvt-neon-x8.c", |
| 3649 | "src/qu8-f32-vcvt/gen/vcvt-neon-x16.c", |
| 3650 | "src/qu8-f32-vcvt/gen/vcvt-neon-x24.c", |
| 3651 | "src/qu8-f32-vcvt/gen/vcvt-neon-x32.c", |
| 3652 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neon-c8.c", |
| 3653 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neon-c16.c", |
| 3654 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neon-c24.c", |
| 3655 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neon-c32.c", |
| 3656 | "src/qu8-gavgpool/gen/7p7x-minmax-rndnu-neon-c8.c", |
| 3657 | "src/qu8-gavgpool/gen/7p7x-minmax-rndnu-neon-c16.c", |
| 3658 | "src/qu8-gavgpool/gen/7p7x-minmax-rndnu-neon-c24.c", |
| 3659 | "src/qu8-gavgpool/gen/7p7x-minmax-rndnu-neon-c32.c", |
| 3660 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neon-c8.c", |
| 3661 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neon-c16.c", |
| 3662 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neon-c24.c", |
| 3663 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neon-c32.c", |
| 3664 | "src/qu8-gavgpool/gen/7x-minmax-rndnu-neon-c8.c", |
| 3665 | "src/qu8-gavgpool/gen/7x-minmax-rndnu-neon-c16.c", |
| 3666 | "src/qu8-gavgpool/gen/7x-minmax-rndnu-neon-c24.c", |
| 3667 | "src/qu8-gavgpool/gen/7x-minmax-rndnu-neon-c32.c", |
| 3668 | "src/qu8-gemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| 3669 | "src/qu8-gemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| 3670 | "src/qu8-gemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| 3671 | "src/qu8-gemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 3672 | "src/qu8-gemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c", |
| 3673 | "src/qu8-gemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c", |
| 3674 | "src/qu8-gemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| 3675 | "src/qu8-gemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c", |
| 3676 | "src/qu8-gemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| 3677 | "src/qu8-gemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| 3678 | "src/qu8-gemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| 3679 | "src/qu8-gemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| 3680 | "src/qu8-gemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c", |
| 3681 | "src/qu8-gemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c", |
| 3682 | "src/qu8-igemm/gen/1x8-minmax-fp32-neon-mlal-lane.c", |
| 3683 | "src/qu8-igemm/gen/1x8-minmax-rndnu-neon-mlal-lane.c", |
| 3684 | "src/qu8-igemm/gen/1x16-minmax-fp32-neon-mlal-lane.c", |
| 3685 | "src/qu8-igemm/gen/1x16-minmax-rndnu-neon-mlal-lane.c", |
| 3686 | "src/qu8-igemm/gen/2x8-minmax-rndnu-neon-mlal-lane.c", |
| 3687 | "src/qu8-igemm/gen/2x16-minmax-rndnu-neon-mlal-lane.c", |
| 3688 | "src/qu8-igemm/gen/3x8-minmax-rndnu-neon-mlal-lane.c", |
| 3689 | "src/qu8-igemm/gen/3x16-minmax-rndnu-neon-mlal-lane.c", |
| 3690 | "src/qu8-igemm/gen/4x8-minmax-fp32-neon-mlal-lane.c", |
| 3691 | "src/qu8-igemm/gen/4x8-minmax-rndnu-neon-mlal-lane.c", |
| 3692 | "src/qu8-igemm/gen/4x16-minmax-fp32-neon-mlal-lane.c", |
| 3693 | "src/qu8-igemm/gen/4x16-minmax-rndnu-neon-mlal-lane.c", |
| 3694 | "src/qu8-igemm/gen/6x8-minmax-rndnu-neon-mlal-lane.c", |
| 3695 | "src/qu8-igemm/gen/6x16-minmax-rndnu-neon-mlal-lane.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 3696 | "src/qu8-requantization/fp32-neon.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3697 | "src/qu8-requantization/gemmlowp-neon.c", |
| 3698 | "src/qu8-requantization/rndna-neon.c", |
| 3699 | "src/qu8-vadd/gen/minmax-neon-ld64-x8.c", |
| 3700 | "src/qu8-vadd/gen/minmax-neon-ld64-x16.c", |
| 3701 | "src/qu8-vadd/gen/minmax-neon-ld64-x32.c", |
| 3702 | "src/qu8-vadd/gen/minmax-neon-ld128-x16.c", |
| 3703 | "src/qu8-vaddc/gen/minmax-neon-ld64-x8.c", |
| 3704 | "src/qu8-vaddc/gen/minmax-neon-ld64-x16.c", |
| 3705 | "src/qu8-vaddc/gen/minmax-neon-ld64-x32.c", |
| 3706 | "src/qu8-vaddc/gen/minmax-neon-ld128-x16.c", |
| 3707 | "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x8.c", |
| 3708 | "src/qu8-vmul/gen/minmax-fp32-neon-ld64-x16.c", |
| 3709 | "src/qu8-vmul/gen/minmax-fp32-neon-ld128-x16.c", |
| 3710 | "src/qu8-vmul/gen/minmax-rndnu-neon-ld64-x8.c", |
| 3711 | "src/qu8-vmul/gen/minmax-rndnu-neon-ld64-x16.c", |
| 3712 | "src/qu8-vmul/gen/minmax-rndnu-neon-ld128-x16.c", |
| 3713 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x8.c", |
| 3714 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld64-x16.c", |
| 3715 | "src/qu8-vmulc/gen/minmax-fp32-neon-ld128-x16.c", |
| 3716 | "src/qu8-vmulc/gen/minmax-rndnu-neon-ld64-x8.c", |
| 3717 | "src/qu8-vmulc/gen/minmax-rndnu-neon-ld64-x16.c", |
| 3718 | "src/qu8-vmulc/gen/minmax-rndnu-neon-ld128-x16.c", |
| 3719 | "src/s8-ibilinear/gen/neon-c8.c", |
| 3720 | "src/s8-ibilinear/gen/neon-c16.c", |
| 3721 | "src/s8-maxpool/9p8x-minmax-neon-c16.c", |
| 3722 | "src/s8-vclamp/neon-x64.c", |
| 3723 | "src/u8-ibilinear/gen/neon-c8.c", |
| 3724 | "src/u8-ibilinear/gen/neon-c16.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 3725 | "src/u8-maxpool/9p8x-minmax-neon-c16.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 3726 | "src/u8-rmax/neon.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3727 | "src/u8-vclamp/neon-x64.c", |
| 3728 | "src/x8-transpose/gen/16x16-reuse-dec-zip-neon.c", |
| 3729 | "src/x8-transpose/gen/16x16-reuse-mov-zip-neon.c", |
| 3730 | "src/x8-transpose/gen/16x16-reuse-switch-zip-neon.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 3731 | "src/x8-zip/x2-neon.c", |
| 3732 | "src/x8-zip/x3-neon.c", |
| 3733 | "src/x8-zip/x4-neon.c", |
| 3734 | "src/x8-zip/xm-neon.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3735 | "src/x16-transpose/gen/8x8-multi-dec-zip-neon.c", |
| 3736 | "src/x16-transpose/gen/8x8-multi-mov-zip-neon.c", |
| 3737 | "src/x16-transpose/gen/8x8-multi-switch-zip-neon.c", |
| 3738 | "src/x16-transpose/gen/8x8-reuse-dec-zip-neon.c", |
| 3739 | "src/x16-transpose/gen/8x8-reuse-mov-zip-neon.c", |
| 3740 | "src/x16-transpose/gen/8x8-reuse-multi-zip-neon.c", |
| 3741 | "src/x16-transpose/gen/8x8-reuse-switch-zip-neon.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 3742 | "src/x32-packx/x4-neon-st4.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3743 | "src/x32-transpose/gen/4x4-multi-dec-zip-neon.c", |
| 3744 | "src/x32-transpose/gen/4x4-multi-mov-zip-neon.c", |
| 3745 | "src/x32-transpose/gen/4x4-multi-multi-zip-neon.c", |
| 3746 | "src/x32-transpose/gen/4x4-multi-switch-zip-neon.c", |
| 3747 | "src/x32-transpose/gen/4x4-reuse-dec-zip-neon.c", |
| 3748 | "src/x32-transpose/gen/4x4-reuse-mov-zip-neon.c", |
| 3749 | "src/x32-transpose/gen/4x4-reuse-multi-zip-neon.c", |
| 3750 | "src/x32-transpose/gen/4x4-reuse-switch-zip-neon.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 3751 | "src/x32-unpool/neon.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 3752 | "src/x32-zip/x2-neon.c", |
| 3753 | "src/x32-zip/x3-neon.c", |
| 3754 | "src/x32-zip/x4-neon.c", |
| 3755 | "src/x32-zip/xm-neon.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3756 | "src/xx-fill/neon-x64.c", |
| 3757 | "src/xx-pad/neon.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 3758 | ] |
| 3759 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3760 | PROD_NEONFP16_MICROKERNEL_SRCS = [ |
| 3761 | "src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c", |
| 3762 | "src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c", |
| 3763 | ] |
| 3764 | |
| 3765 | ALL_NEONFP16_MICROKERNEL_SRCS = [ |
| 3766 | "src/f16-f32-vcvt/gen/vcvt-neonfp16-x8.c", |
| 3767 | "src/f16-f32-vcvt/gen/vcvt-neonfp16-x16.c", |
| 3768 | "src/f32-f16-vcvt/gen/vcvt-neonfp16-x8.c", |
| 3769 | "src/f32-f16-vcvt/gen/vcvt-neonfp16-x16.c", |
| 3770 | "src/math/cvt-f16-f32-neonfp16.c", |
| 3771 | "src/math/cvt-f32-f16-neonfp16.c", |
| 3772 | ] |
| 3773 | |
| 3774 | PROD_NEONFMA_MICROKERNEL_SRCS = [ |
| 3775 | "src/f32-dwconv/gen/up8x3-minmax-neonfma.c", |
| 3776 | "src/f32-dwconv/gen/up8x4-minmax-neonfma.c", |
| 3777 | "src/f32-dwconv/gen/up8x9-minmax-neonfma.c", |
| 3778 | "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c", |
| 3779 | "src/f32-gemm/gen/1x8s4-minmax-neonfma.c", |
| 3780 | "src/f32-gemm/gen/6x8s4-minmax-neonfma.c", |
| 3781 | "src/f32-ibilinear-chw/gen/neonfma-p8.c", |
| 3782 | "src/f32-ibilinear/gen/neonfma-c8.c", |
| 3783 | "src/f32-igemm/gen/1x8s4-minmax-neonfma.c", |
| 3784 | "src/f32-igemm/gen/6x8s4-minmax-neonfma.c", |
| 3785 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16.c", |
| 3786 | "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c", |
| 3787 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c", |
| 3788 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c", |
| 3789 | "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c", |
| 3790 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c", |
| 3791 | ] |
| 3792 | |
| 3793 | ALL_NEONFMA_MICROKERNEL_SRCS = [ |
| 3794 | "src/f32-dwconv/gen/up4x3-minmax-neonfma-acc2.c", |
| 3795 | "src/f32-dwconv/gen/up4x3-minmax-neonfma.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 3796 | "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c", |
| 3797 | "src/f32-dwconv/gen/up4x4-minmax-neonfma.c", |
| 3798 | "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c", |
| 3799 | "src/f32-dwconv/gen/up4x9-minmax-neonfma.c", |
| 3800 | "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c", |
| 3801 | "src/f32-dwconv/gen/up4x25-minmax-neonfma.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3802 | "src/f32-dwconv/gen/up8x3-minmax-neonfma-acc2.c", |
| 3803 | "src/f32-dwconv/gen/up8x3-minmax-neonfma.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 3804 | "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c", |
| 3805 | "src/f32-dwconv/gen/up8x4-minmax-neonfma.c", |
| 3806 | "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c", |
| 3807 | "src/f32-dwconv/gen/up8x9-minmax-neonfma.c", |
| 3808 | "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c", |
| 3809 | "src/f32-dwconv/gen/up8x25-minmax-neonfma.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3810 | "src/f32-dwconv/gen/up16x3-minmax-neon-acc2.c", |
| 3811 | "src/f32-dwconv/gen/up16x3-minmax-neon.c", |
| 3812 | "src/f32-dwconv/gen/up16x3-minmax-neonfma-acc2.c", |
| 3813 | "src/f32-dwconv/gen/up16x3-minmax-neonfma.c", |
| 3814 | "src/f32-dwconv/gen/up16x4-minmax-neon-acc2.c", |
| 3815 | "src/f32-dwconv/gen/up16x4-minmax-neon.c", |
| 3816 | "src/f32-dwconv/gen/up16x4-minmax-neonfma-acc2.c", |
| 3817 | "src/f32-dwconv/gen/up16x4-minmax-neonfma.c", |
| 3818 | "src/f32-dwconv/gen/up16x9-minmax-neon-acc2.c", |
| 3819 | "src/f32-dwconv/gen/up16x9-minmax-neon.c", |
| 3820 | "src/f32-dwconv/gen/up16x9-minmax-neonfma-acc2.c", |
| 3821 | "src/f32-dwconv/gen/up16x9-minmax-neonfma.c", |
| 3822 | "src/f32-dwconv/gen/up16x25-minmax-neon-acc2.c", |
| 3823 | "src/f32-dwconv/gen/up16x25-minmax-neon.c", |
| 3824 | "src/f32-dwconv/gen/up16x25-minmax-neonfma-acc2.c", |
| 3825 | "src/f32-dwconv/gen/up16x25-minmax-neonfma.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 3826 | "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c", |
| 3827 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c", |
| 3828 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c", |
| 3829 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c", |
| 3830 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c", |
| 3831 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c", |
| 3832 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c", |
| 3833 | "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c", |
| 3834 | "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c", |
| 3835 | "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c", |
| 3836 | "src/f32-gemm/gen/1x8s4-minmax-neonfma.c", |
| 3837 | "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c", |
| 3838 | "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c", |
| 3839 | "src/f32-gemm/gen/4x8s4-minmax-neonfma.c", |
| 3840 | "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c", |
| 3841 | "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c", |
| 3842 | "src/f32-gemm/gen/6x8s4-minmax-neonfma.c", |
| 3843 | "src/f32-gemm/gen/8x8s4-minmax-neonfma.c", |
| Miao Wang | 338e80e | 2021-03-23 08:56:09 -0700 | [diff] [blame] | 3844 | "src/f32-ibilinear-chw/gen/neonfma-p4.c", |
| 3845 | "src/f32-ibilinear-chw/gen/neonfma-p8.c", |
| Miao Wang | 2534c2f | 2020-03-16 11:58:04 -0700 | [diff] [blame] | 3846 | "src/f32-ibilinear/gen/neonfma-c4.c", |
| 3847 | "src/f32-ibilinear/gen/neonfma-c8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 3848 | "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 3849 | "src/f32-igemm/gen/1x8s4-minmax-neonfma.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 3850 | "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 3851 | "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c", |
| 3852 | "src/f32-igemm/gen/4x8s4-minmax-neonfma.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 3853 | "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c", |
| 3854 | "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 3855 | "src/f32-igemm/gen/6x8s4-minmax-neonfma.c", |
| 3856 | "src/f32-igemm/gen/8x8s4-minmax-neonfma.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 3857 | "src/f32-ppmm/gen/4x8-minmax-neonfma.c", |
| 3858 | "src/f32-ppmm/gen/8x8-minmax-neonfma.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3859 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x4.c", |
| 3860 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x8-acc2.c", |
| 3861 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x8.c", |
| 3862 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x12-acc2.c", |
| 3863 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x12-acc3.c", |
| 3864 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x12.c", |
| 3865 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16-acc2.c", |
| 3866 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16-acc4.c", |
| 3867 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x16.c", |
| 3868 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x20-acc2.c", |
| 3869 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x20-acc5.c", |
| 3870 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-lut64-p2-x20.c", |
| 3871 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x4.c", |
| 3872 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x8-acc2.c", |
| 3873 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x8.c", |
| 3874 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x12-acc2.c", |
| 3875 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x12-acc3.c", |
| 3876 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x12.c", |
| 3877 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x16-acc2.c", |
| 3878 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x16-acc4.c", |
| 3879 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x16.c", |
| 3880 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x20-acc2.c", |
| 3881 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x20-acc5.c", |
| 3882 | "src/f32-raddstoreexpminusmax/gen/neonfma-rr1-p5-x20.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 3883 | "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c", |
| 3884 | "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c", |
| 3885 | "src/f32-spmm/gen/4x1-minmax-neonfma.c", |
| 3886 | "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c", |
| 3887 | "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c", |
| 3888 | "src/f32-spmm/gen/8x1-minmax-neonfma.c", |
| 3889 | "src/f32-spmm/gen/12x1-minmax-neonfma.c", |
| 3890 | "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c", |
| 3891 | "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c", |
| 3892 | "src/f32-spmm/gen/16x1-minmax-neonfma.c", |
| 3893 | "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c", |
| 3894 | "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c", |
| 3895 | "src/f32-spmm/gen/32x1-minmax-neonfma.c", |
| 3896 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c", |
| 3897 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c", |
| 3898 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c", |
| 3899 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c", |
| 3900 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c", |
| 3901 | "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c", |
| 3902 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c", |
| 3903 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c", |
| 3904 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c", |
| 3905 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c", |
| 3906 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c", |
| 3907 | "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 3908 | "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c", |
| 3909 | "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 3910 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c", |
| 3911 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c", |
| 3912 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c", |
| 3913 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c", |
| 3914 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c", |
| 3915 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c", |
| 3916 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c", |
| 3917 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c", |
| 3918 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c", |
| 3919 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c", |
| 3920 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c", |
| 3921 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c", |
| 3922 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c", |
| 3923 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c", |
| 3924 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c", |
| 3925 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c", |
| 3926 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c", |
| 3927 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c", |
| 3928 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c", |
| 3929 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c", |
| 3930 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c", |
| 3931 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c", |
| 3932 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c", |
| 3933 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c", |
| 3934 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c", |
| 3935 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c", |
| 3936 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c", |
| 3937 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c", |
| 3938 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c", |
| 3939 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c", |
| 3940 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c", |
| 3941 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c", |
| 3942 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c", |
| 3943 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c", |
| 3944 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c", |
| 3945 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c", |
| 3946 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c", |
| 3947 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c", |
| 3948 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c", |
| 3949 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c", |
| 3950 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c", |
| 3951 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c", |
| 3952 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c", |
| 3953 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c", |
| 3954 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c", |
| 3955 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c", |
| 3956 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c", |
| 3957 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c", |
| 3958 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c", |
| 3959 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c", |
| 3960 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c", |
| 3961 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c", |
| 3962 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c", |
| 3963 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 3964 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c", |
| 3965 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c", |
| 3966 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c", |
| 3967 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c", |
| 3968 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c", |
| 3969 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c", |
| 3970 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c", |
| 3971 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c", |
| 3972 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c", |
| 3973 | "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c", |
| 3974 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c", |
| 3975 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c", |
| 3976 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c", |
| 3977 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c", |
| 3978 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c", |
| 3979 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c", |
| 3980 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c", |
| 3981 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c", |
| 3982 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c", |
| 3983 | "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 3984 | "src/math/exp-neonfma-rr2-lut64-p2.c", |
| 3985 | "src/math/exp-neonfma-rr2-p5.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 3986 | "src/math/expm1minus-neonfma-rr1-lut16-p3.c", |
| 3987 | "src/math/expm1minus-neonfma-rr1-p6.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 3988 | "src/math/expminus-neonfma-rr2-lut64-p2.c", |
| 3989 | "src/math/expminus-neonfma-rr2-lut2048-p1.c", |
| 3990 | "src/math/expminus-neonfma-rr2-p5.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 3991 | "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c", |
| 3992 | "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c", |
| 3993 | "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 3994 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c", |
| 3995 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c", |
| 3996 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 3997 | "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c", |
| 3998 | "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c", |
| 3999 | "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4000 | "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c", |
| 4001 | "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c", |
| 4002 | "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4003 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c", |
| 4004 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c", |
| 4005 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4006 | "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c", |
| 4007 | "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c", |
| 4008 | "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4009 | "src/math/sqrt-neonfma-nr1fma.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4010 | "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4011 | "src/math/sqrt-neonfma-nr2fma.c", |
| 4012 | "src/math/sqrt-neonfma-nr2fma1adj.c", |
| 4013 | "src/math/sqrt-neonfma-nr3fma.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4014 | ] |
| 4015 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4016 | PROD_AARCH64_NEON_MICROKERNEL_SRCS = [ |
| 4017 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c", |
| 4018 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c", |
| 4019 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c", |
| 4020 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c", |
| 4021 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c", |
| 4022 | "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 4023 | "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 4024 | "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 4025 | "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 4026 | "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 4027 | "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 4028 | "src/f32-spmm/gen/32x2-minmax-neonfma.c", |
| 4029 | "src/f32-spmm/gen/32x4-minmax-neonfma.c", |
| 4030 | "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c", |
| 4031 | "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c", |
| 4032 | "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c", |
| 4033 | "src/f32-vsqrt/gen/neon-sqrt-x4.c", |
| 4034 | "src/x8-lut/gen/lut-neon-tbx128x4-x64.c", |
| 4035 | ] |
| 4036 | |
| 4037 | ALL_AARCH64_NEON_MICROKERNEL_SRCS = [ |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4038 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c", |
| 4039 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c", |
| 4040 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c", |
| 4041 | "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c", |
| 4042 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c", |
| 4043 | "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c", |
| 4044 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c", |
| 4045 | "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c", |
| 4046 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c", |
| 4047 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c", |
| 4048 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c", |
| 4049 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c", |
| 4050 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c", |
| 4051 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c", |
| 4052 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c", |
| 4053 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c", |
| 4054 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c", |
| 4055 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c", |
| 4056 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c", |
| 4057 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c", |
| 4058 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c", |
| 4059 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c", |
| 4060 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c", |
| 4061 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c", |
| 4062 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c", |
| 4063 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c", |
| 4064 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c", |
| 4065 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c", |
| 4066 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c", |
| 4067 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c", |
| 4068 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c", |
| 4069 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c", |
| 4070 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c", |
| 4071 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c", |
| 4072 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c", |
| 4073 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c", |
| 4074 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c", |
| 4075 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c", |
| 4076 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c", |
| 4077 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c", |
| 4078 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c", |
| 4079 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c", |
| 4080 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c", |
| 4081 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c", |
| 4082 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c", |
| 4083 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c", |
| 4084 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c", |
| 4085 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c", |
| 4086 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c", |
| 4087 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4088 | "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4089 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4090 | "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4091 | "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c", |
| 4092 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c", |
| 4093 | "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4094 | "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 4095 | "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 4096 | "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c", |
| 4097 | "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c", |
| 4098 | "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c", |
| 4099 | "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 4100 | "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4101 | "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c", |
| 4102 | "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c", |
| 4103 | "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4104 | "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4105 | "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4106 | "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c", |
| 4107 | "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4108 | "src/f32-spmm/gen/4x2-minmax-neonfma.c", |
| 4109 | "src/f32-spmm/gen/4x4-minmax-neonfma.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4110 | "src/f32-spmm/gen/8x2-minmax-neonfma.c", |
| 4111 | "src/f32-spmm/gen/8x4-minmax-neonfma.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4112 | "src/f32-spmm/gen/12x2-minmax-neonfma.c", |
| 4113 | "src/f32-spmm/gen/12x4-minmax-neonfma.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4114 | "src/f32-spmm/gen/16x2-minmax-neonfma.c", |
| 4115 | "src/f32-spmm/gen/16x4-minmax-neonfma.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4116 | "src/f32-spmm/gen/32x2-minmax-neonfma.c", |
| 4117 | "src/f32-spmm/gen/32x4-minmax-neonfma.c", |
| 4118 | "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c", |
| 4119 | "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c", |
| 4120 | "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c", |
| 4121 | "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c", |
| 4122 | "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c", |
| 4123 | "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4124 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c", |
| 4125 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c", |
| 4126 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c", |
| 4127 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c", |
| 4128 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c", |
| 4129 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c", |
| 4130 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c", |
| 4131 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c", |
| 4132 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c", |
| 4133 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c", |
| 4134 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c", |
| 4135 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c", |
| 4136 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c", |
| 4137 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c", |
| 4138 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c", |
| 4139 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c", |
| 4140 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c", |
| 4141 | "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4142 | "src/f32-vsqrt/gen/neon-sqrt-x4.c", |
| 4143 | "src/f32-vsqrt/gen/neon-sqrt-x8.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4144 | "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4145 | "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4146 | "src/math/sigmoid-neonfma-rr1-p5-div.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4147 | "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4148 | "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4149 | "src/math/sigmoid-neonfma-rr2-p5-div.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4150 | "src/x8-lut/gen/lut-neon-tbx128x4-x16.c", |
| 4151 | "src/x8-lut/gen/lut-neon-tbx128x4-x32.c", |
| 4152 | "src/x8-lut/gen/lut-neon-tbx128x4-x48.c", |
| 4153 | "src/x8-lut/gen/lut-neon-tbx128x4-x64.c", |
| 4154 | "src/x32-transpose/4x4-aarch64-tbl.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4155 | ] |
| 4156 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4157 | PROD_NEONV8_MICROKERNEL_SRCS = [ |
| 4158 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c", |
| 4159 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c", |
| 4160 | "src/f32-vrnd/gen/vrndd-neonv8-x8.c", |
| 4161 | "src/f32-vrnd/gen/vrndne-neonv8-x8.c", |
| 4162 | "src/f32-vrnd/gen/vrndu-neonv8-x8.c", |
| 4163 | "src/f32-vrnd/gen/vrndz-neonv8-x8.c", |
| 4164 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c", |
| 4165 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c", |
| 4166 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c", |
| 4167 | "src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4168 | "src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4169 | "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4170 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| 4171 | "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4172 | "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4173 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| 4174 | "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4175 | "src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4176 | "src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4177 | "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4178 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| 4179 | "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4180 | "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4181 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| 4182 | "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4183 | ] |
| 4184 | |
| 4185 | ALL_NEONV8_MICROKERNEL_SRCS = [ |
| 4186 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x8.c", |
| 4187 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x16.c", |
| 4188 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x24.c", |
| 4189 | "src/f32-qs8-vcvt/gen/vcvt-neonv8-x32.c", |
| 4190 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x8.c", |
| 4191 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x16.c", |
| 4192 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x24.c", |
| 4193 | "src/f32-qu8-vcvt/gen/vcvt-neonv8-x32.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4194 | "src/f32-vrnd/gen/vrndd-neonv8-x4.c", |
| 4195 | "src/f32-vrnd/gen/vrndd-neonv8-x8.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4196 | "src/f32-vrnd/gen/vrndne-neonv8-x4.c", |
| 4197 | "src/f32-vrnd/gen/vrndne-neonv8-x8.c", |
| 4198 | "src/f32-vrnd/gen/vrndu-neonv8-x4.c", |
| 4199 | "src/f32-vrnd/gen/vrndu-neonv8-x8.c", |
| 4200 | "src/f32-vrnd/gen/vrndz-neonv8-x4.c", |
| 4201 | "src/f32-vrnd/gen/vrndz-neonv8-x8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4202 | "src/math/cvt-f32-qs8-neonv8.c", |
| 4203 | "src/math/cvt-f32-qu8-neonv8.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 4204 | "src/math/roundd-neonv8.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4205 | "src/math/roundne-neonv8.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 4206 | "src/math/roundu-neonv8.c", |
| 4207 | "src/math/roundz-neonv8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4208 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mla8-ld64.c", |
| 4209 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul8-ld64.c", |
| 4210 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| 4211 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mla8-ld64.c", |
| 4212 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul8-ld64.c", |
| 4213 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| 4214 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld64.c", |
| 4215 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mla8-ld128.c", |
| 4216 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld64.c", |
| 4217 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul8-ld128.c", |
| 4218 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| 4219 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld64.c", |
| 4220 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mla8-ld128.c", |
| 4221 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld64.c", |
| 4222 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul8-ld128.c", |
| 4223 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| 4224 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| 4225 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| 4226 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| 4227 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| 4228 | "src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4229 | "src/qc8-gemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4230 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| 4231 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4232 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4233 | "src/qc8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| 4234 | "src/qc8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4235 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| 4236 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4237 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4238 | "src/qc8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4239 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| 4240 | "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4241 | "src/qc8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4242 | "src/qc8-gemm/gen/2x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4243 | "src/qc8-gemm/gen/2x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4244 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| 4245 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4246 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4247 | "src/qc8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| 4248 | "src/qc8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4249 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| 4250 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4251 | "src/qc8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4252 | "src/qc8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4253 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| 4254 | "src/qc8-gemm/gen/2x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4255 | "src/qc8-gemm/gen/2x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4256 | "src/qc8-gemm/gen/3x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4257 | "src/qc8-gemm/gen/3x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4258 | "src/qc8-gemm/gen/3x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4259 | "src/qc8-gemm/gen/3x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4260 | "src/qc8-gemm/gen/4x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4261 | "src/qc8-gemm/gen/4x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4262 | "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4263 | "src/qc8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4264 | "src/qc8-gemm/gen/6x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4265 | "src/qc8-gemm/gen/6x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4266 | "src/qc8-gemm/gen/6x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4267 | "src/qc8-gemm/gen/6x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4268 | "src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4269 | "src/qc8-igemm/gen/1x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4270 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| 4271 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4272 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4273 | "src/qc8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| 4274 | "src/qc8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4275 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| 4276 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4277 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4278 | "src/qc8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4279 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| 4280 | "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4281 | "src/qc8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4282 | "src/qc8-igemm/gen/2x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4283 | "src/qc8-igemm/gen/2x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4284 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| 4285 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4286 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4287 | "src/qc8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| 4288 | "src/qc8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4289 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| 4290 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4291 | "src/qc8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4292 | "src/qc8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4293 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| 4294 | "src/qc8-igemm/gen/2x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4295 | "src/qc8-igemm/gen/2x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4296 | "src/qc8-igemm/gen/3x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4297 | "src/qc8-igemm/gen/3x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4298 | "src/qc8-igemm/gen/3x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4299 | "src/qc8-igemm/gen/3x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4300 | "src/qc8-igemm/gen/4x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4301 | "src/qc8-igemm/gen/4x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4302 | "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4303 | "src/qc8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4304 | "src/qc8-igemm/gen/6x8-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4305 | "src/qc8-igemm/gen/6x8-minmax-fp32-neonv8-mlal-lane.c", |
| 4306 | "src/qc8-igemm/gen/6x16-minmax-fp32-neonv8-mlal-lane-prfm.c", |
| 4307 | "src/qc8-igemm/gen/6x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4308 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| 4309 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| 4310 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| 4311 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| 4312 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| 4313 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| 4314 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| 4315 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| 4316 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c8.c", |
| 4317 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c16.c", |
| 4318 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c24.c", |
| 4319 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c32.c", |
| 4320 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neonv8-c8.c", |
| 4321 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neonv8-c16.c", |
| 4322 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neonv8-c24.c", |
| 4323 | "src/qs8-gavgpool/gen/7x-minmax-fp32-neonv8-c32.c", |
| 4324 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| 4325 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4326 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4327 | "src/qs8-gemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| 4328 | "src/qs8-gemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4329 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| 4330 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4331 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4332 | "src/qs8-gemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4333 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| 4334 | "src/qs8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4335 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| 4336 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4337 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4338 | "src/qs8-gemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| 4339 | "src/qs8-gemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4340 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| 4341 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4342 | "src/qs8-gemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4343 | "src/qs8-gemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4344 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| 4345 | "src/qs8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4346 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| 4347 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4348 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4349 | "src/qs8-igemm/gen/1x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| 4350 | "src/qs8-igemm/gen/1x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4351 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| 4352 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4353 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4354 | "src/qs8-igemm/gen/1x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4355 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-neonv8-mlal.c", |
| 4356 | "src/qs8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4357 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-dup.c", |
| 4358 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4359 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4360 | "src/qs8-igemm/gen/2x8c2-minmax-fp32-neonv8-mlal-ld4r.c", |
| 4361 | "src/qs8-igemm/gen/2x8c2s4-minmax-fp32-neonv8-mlal.c", |
| 4362 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-dup.c", |
| 4363 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld1r.c", |
| 4364 | "src/qs8-igemm/gen/2x8c4-minmax-fp32-neonv8-mlal-ld2r.c", |
| 4365 | "src/qs8-igemm/gen/2x8c4s2-minmax-fp32-neonv8-mlal.c", |
| 4366 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-neonv8-mlal.c", |
| 4367 | "src/qs8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4368 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 4369 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4370 | "src/qs8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c", |
| 4371 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 4372 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4373 | "src/qs8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c", |
| 4374 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-neonv8-mul16.c", |
| 4375 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-neonv8-mul16.c", |
| 4376 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-neonv8-mul16.c", |
| 4377 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-neonv8-mul16.c", |
| 4378 | "src/qu8-dwconv/gen/up24x9-minmax-fp32-neonv8-mul16.c", |
| 4379 | "src/qu8-dwconv/gen/up24x25-minmax-fp32-neonv8-mul16.c", |
| 4380 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-neonv8-mul16.c", |
| 4381 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-neonv8-mul16.c", |
| 4382 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c8.c", |
| 4383 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c16.c", |
| 4384 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c24.c", |
| 4385 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-neonv8-c32.c", |
| 4386 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neonv8-c8.c", |
| 4387 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neonv8-c16.c", |
| 4388 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neonv8-c24.c", |
| 4389 | "src/qu8-gavgpool/gen/7x-minmax-fp32-neonv8-c32.c", |
| 4390 | "src/qu8-gemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4391 | "src/qu8-gemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4392 | "src/qu8-igemm/gen/1x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4393 | "src/qu8-igemm/gen/4x16-minmax-fp32-neonv8-mlal-lane.c", |
| 4394 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 4395 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4396 | "src/qu8-vmul/gen/minmax-fp32-neonv8-ld128-x16.c", |
| 4397 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x8.c", |
| 4398 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld64-x16.c", |
| 4399 | "src/qu8-vmulc/gen/minmax-fp32-neonv8-ld128-x16.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 4400 | ] |
| 4401 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4402 | PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS = [ |
| 4403 | "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c", |
| 4404 | "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c", |
| 4405 | "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c", |
| 4406 | "src/f16-gavgpool/gen/7p7x-minmax-neonfp16arith-c8.c", |
| 4407 | "src/f16-gavgpool/gen/7x-minmax-neonfp16arith-c8.c", |
| 4408 | "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 4409 | "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 4410 | "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 4411 | "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 4412 | "src/f16-maxpool/9p8x-minmax-neonfp16arith-c8.c", |
| 4413 | "src/f16-prelu/gen/neonfp16arith-2x16.c", |
| 4414 | "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c", |
| 4415 | "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c", |
| 4416 | "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c", |
| 4417 | "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c", |
| 4418 | "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c", |
| 4419 | "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c", |
| 4420 | ] |
| 4421 | |
| 4422 | ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS = [ |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4423 | "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c", |
| 4424 | "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c", |
| 4425 | "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c", |
| 4426 | "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4427 | "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c", |
| 4428 | "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c", |
| 4429 | "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c", |
| 4430 | "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c", |
| 4431 | "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c", |
| 4432 | "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c", |
| 4433 | "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c", |
| 4434 | "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4435 | "src/f16-dwconv/gen/up32x4-minmax-neonfp16arith-acc2.c", |
| 4436 | "src/f16-dwconv/gen/up32x4-minmax-neonfp16arith.c", |
| 4437 | "src/f16-dwconv/gen/up32x9-minmax-neonfp16arith-acc2.c", |
| 4438 | "src/f16-dwconv/gen/up32x9-minmax-neonfp16arith.c", |
| 4439 | "src/f16-dwconv/gen/up32x25-minmax-neonfp16arith-acc2.c", |
| 4440 | "src/f16-dwconv/gen/up32x25-minmax-neonfp16arith.c", |
| 4441 | "src/f16-gavgpool/gen/7p7x-minmax-neonfp16arith-c8.c", |
| 4442 | "src/f16-gavgpool/gen/7p7x-minmax-neonfp16arith-c16.c", |
| 4443 | "src/f16-gavgpool/gen/7p7x-minmax-neonfp16arith-c24.c", |
| 4444 | "src/f16-gavgpool/gen/7p7x-minmax-neonfp16arith-c32.c", |
| 4445 | "src/f16-gavgpool/gen/7x-minmax-neonfp16arith-c8.c", |
| 4446 | "src/f16-gavgpool/gen/7x-minmax-neonfp16arith-c16.c", |
| 4447 | "src/f16-gavgpool/gen/7x-minmax-neonfp16arith-c24.c", |
| 4448 | "src/f16-gavgpool/gen/7x-minmax-neonfp16arith-c32.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4449 | "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c", |
| 4450 | "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c", |
| 4451 | "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c", |
| 4452 | "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c", |
| 4453 | "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c", |
| 4454 | "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c", |
| 4455 | "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c", |
| 4456 | "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c", |
| 4457 | "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c", |
| 4458 | "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 4459 | "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c", |
| 4460 | "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c", |
| 4461 | "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c", |
| 4462 | "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 4463 | "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c", |
| 4464 | "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4465 | "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c", |
| 4466 | "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c", |
| 4467 | "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c", |
| 4468 | "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c", |
| 4469 | "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c", |
| 4470 | "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c", |
| 4471 | "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c", |
| 4472 | "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4473 | "src/f16-maxpool/9p8x-minmax-neonfp16arith-c8.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 4474 | "src/f16-prelu/gen/neonfp16arith-2x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4475 | "src/f16-prelu/gen/neonfp16arith-2x16.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4476 | "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4477 | "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4478 | "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4479 | "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4480 | "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4481 | "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4482 | "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4483 | "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4484 | "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c", |
| 4485 | "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c", |
| 4486 | "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c", |
| 4487 | "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c", |
| 4488 | "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c", |
| 4489 | "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c", |
| 4490 | "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c", |
| 4491 | "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c", |
| 4492 | "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c", |
| 4493 | "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c", |
| 4494 | "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c", |
| 4495 | "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c", |
| 4496 | "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c", |
| 4497 | "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c", |
| 4498 | "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c", |
| 4499 | "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c", |
| 4500 | "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c", |
| 4501 | "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c", |
| 4502 | "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c", |
| 4503 | "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c", |
| 4504 | "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c", |
| 4505 | "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c", |
| 4506 | "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c", |
| 4507 | "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c", |
| 4508 | "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c", |
| 4509 | "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c", |
| 4510 | "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c", |
| 4511 | "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4512 | "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c", |
| 4513 | "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c", |
| 4514 | "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c", |
| 4515 | "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4516 | "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c", |
| 4517 | "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c", |
| 4518 | ] |
| 4519 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4520 | PROD_NEONDOT_MICROKERNEL_SRCS = [ |
| 4521 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4522 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4523 | "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 4524 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4525 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4526 | "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4527 | "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 4528 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4529 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 4530 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4531 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 4532 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| 4533 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 4534 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4535 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 4536 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| 4537 | "src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 4538 | "src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4539 | "src/qu8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 4540 | "src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| 4541 | "src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 4542 | "src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4543 | "src/qu8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 4544 | "src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4545 | ] |
| 4546 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4547 | ALL_NEONDOT_MICROKERNEL_SRCS = [ |
| 4548 | "src/qc8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4549 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4550 | "src/qc8-gemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 4551 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4552 | "src/qc8-gemm/gen/6x8c4-minmax-fp32-neondot.c", |
| 4553 | "src/qc8-gemm/gen/6x16c4-minmax-fp32-neondot.c", |
| 4554 | "src/qc8-gemm/gen/8x8c4-minmax-fp32-neondot.c", |
| 4555 | "src/qc8-gemm/gen/8x16c4-minmax-fp32-neondot.c", |
| 4556 | "src/qc8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4557 | "src/qc8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4558 | "src/qc8-igemm/gen/4x8c4-minmax-fp32-neondot.c", |
| 4559 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4560 | "src/qc8-igemm/gen/6x8c4-minmax-fp32-neondot.c", |
| 4561 | "src/qc8-igemm/gen/6x16c4-minmax-fp32-neondot.c", |
| 4562 | "src/qc8-igemm/gen/8x8c4-minmax-fp32-neondot.c", |
| 4563 | "src/qc8-igemm/gen/8x16c4-minmax-fp32-neondot.c", |
| 4564 | "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4565 | "src/qs8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 4566 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4567 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 4568 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| 4569 | "src/qs8-gemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 4570 | "src/qs8-gemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 4571 | "src/qs8-gemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 4572 | "src/qs8-gemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| 4573 | "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c", |
| 4574 | "src/qs8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 4575 | "src/qs8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4576 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 4577 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| 4578 | "src/qs8-igemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 4579 | "src/qs8-igemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 4580 | "src/qs8-igemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 4581 | "src/qs8-igemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| 4582 | "src/qu8-gemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 4583 | "src/qu8-gemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4584 | "src/qu8-gemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4585 | "src/qu8-gemm/gen/1x32c4-minmax-rndnu-neondot.c", |
| 4586 | "src/qu8-gemm/gen/2x8c4-minmax-rndnu-neondot.c", |
| 4587 | "src/qu8-gemm/gen/2x16c4-minmax-fp32-neondot.c", |
| 4588 | "src/qu8-gemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| 4589 | "src/qu8-gemm/gen/2x32c4-minmax-rndnu-neondot.c", |
| 4590 | "src/qu8-gemm/gen/3x8c4-minmax-rndnu-neondot.c", |
| 4591 | "src/qu8-gemm/gen/3x16c4-minmax-rndnu-neondot.c", |
| 4592 | "src/qu8-gemm/gen/3x32c4-minmax-rndnu-neondot.c", |
| 4593 | "src/qu8-gemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 4594 | "src/qu8-gemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4595 | "src/qu8-gemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| 4596 | "src/qu8-gemm/gen/5x8c4-minmax-rndnu-neondot.c", |
| 4597 | "src/qu8-gemm/gen/5x16c4-minmax-rndnu-neondot.c", |
| 4598 | "src/qu8-gemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 4599 | "src/qu8-gemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 4600 | "src/qu8-gemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 4601 | "src/qu8-gemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| 4602 | "src/qu8-igemm/gen/1x8c4-minmax-rndnu-neondot.c", |
| 4603 | "src/qu8-igemm/gen/1x16c4-minmax-fp32-neondot.c", |
| 4604 | "src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c", |
| 4605 | "src/qu8-igemm/gen/1x32c4-minmax-rndnu-neondot.c", |
| 4606 | "src/qu8-igemm/gen/2x8c4-minmax-rndnu-neondot.c", |
| 4607 | "src/qu8-igemm/gen/2x16c4-minmax-fp32-neondot.c", |
| 4608 | "src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c", |
| 4609 | "src/qu8-igemm/gen/2x32c4-minmax-rndnu-neondot.c", |
| 4610 | "src/qu8-igemm/gen/3x8c4-minmax-rndnu-neondot.c", |
| 4611 | "src/qu8-igemm/gen/3x16c4-minmax-rndnu-neondot.c", |
| 4612 | "src/qu8-igemm/gen/3x32c4-minmax-rndnu-neondot.c", |
| 4613 | "src/qu8-igemm/gen/4x8c4-minmax-rndnu-neondot.c", |
| 4614 | "src/qu8-igemm/gen/4x16c4-minmax-fp32-neondot.c", |
| 4615 | "src/qu8-igemm/gen/4x16c4-minmax-rndnu-neondot.c", |
| 4616 | "src/qu8-igemm/gen/5x8c4-minmax-rndnu-neondot.c", |
| 4617 | "src/qu8-igemm/gen/5x16c4-minmax-rndnu-neondot.c", |
| 4618 | "src/qu8-igemm/gen/6x8c4-minmax-rndnu-neondot.c", |
| 4619 | "src/qu8-igemm/gen/6x16c4-minmax-rndnu-neondot.c", |
| 4620 | "src/qu8-igemm/gen/8x8c4-minmax-rndnu-neondot.c", |
| 4621 | "src/qu8-igemm/gen/8x16c4-minmax-rndnu-neondot.c", |
| 4622 | ] |
| 4623 | |
| 4624 | PROD_SSE_MICROKERNEL_SRCS = [ |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4625 | "src/f32-avgpool/9p8x-minmax-sse-c4.c", |
| 4626 | "src/f32-avgpool/9x-minmax-sse-c4.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4627 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c", |
| 4628 | "src/f32-dwconv/gen/up8x3-minmax-sse.c", |
| 4629 | "src/f32-dwconv/gen/up8x4-minmax-sse.c", |
| 4630 | "src/f32-dwconv/gen/up8x9-minmax-sse.c", |
| 4631 | "src/f32-dwconv/gen/up8x25-minmax-sse.c", |
| 4632 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c", |
| 4633 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c", |
| 4634 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c", |
| 4635 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c", |
| 4636 | "src/f32-gavgpool-cw/sse-x4.c", |
| 4637 | "src/f32-gavgpool/7p7x-minmax-sse-c4.c", |
| 4638 | "src/f32-gavgpool/7x-minmax-sse-c4.c", |
| 4639 | "src/f32-gemm/gen/1x8-minmax-sse-load1.c", |
| 4640 | "src/f32-gemm/gen/4x2c4-minmax-sse.c", |
| 4641 | "src/f32-gemm/gen/4x8-minmax-sse-load1.c", |
| 4642 | "src/f32-ibilinear-chw/gen/sse-p8.c", |
| 4643 | "src/f32-ibilinear/gen/sse-c8.c", |
| 4644 | "src/f32-igemm/gen/1x8-minmax-sse-load1.c", |
| 4645 | "src/f32-igemm/gen/4x2c4-minmax-sse.c", |
| 4646 | "src/f32-igemm/gen/4x8-minmax-sse-load1.c", |
| 4647 | "src/f32-maxpool/9p8x-minmax-sse-c4.c", |
| 4648 | "src/f32-pavgpool/9p8x-minmax-sse-c4.c", |
| 4649 | "src/f32-pavgpool/9x-minmax-sse-c4.c", |
| 4650 | "src/f32-rmax/sse.c", |
| 4651 | "src/f32-spmm/gen/32x1-minmax-sse.c", |
| 4652 | "src/f32-vbinary/gen/vadd-minmax-sse-x8.c", |
| 4653 | "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c", |
| 4654 | "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c", |
| 4655 | "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c", |
| 4656 | "src/f32-vbinary/gen/vmax-sse-x8.c", |
| 4657 | "src/f32-vbinary/gen/vmaxc-sse-x8.c", |
| 4658 | "src/f32-vbinary/gen/vmin-sse-x8.c", |
| 4659 | "src/f32-vbinary/gen/vminc-sse-x8.c", |
| 4660 | "src/f32-vbinary/gen/vmul-minmax-sse-x8.c", |
| 4661 | "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c", |
| 4662 | "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c", |
| 4663 | "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c", |
| 4664 | "src/f32-vbinary/gen/vsqrdiff-sse-x8.c", |
| 4665 | "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c", |
| 4666 | "src/f32-vbinary/gen/vsub-minmax-sse-x8.c", |
| 4667 | "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c", |
| 4668 | "src/f32-vclamp/gen/vclamp-sse-x8.c", |
| 4669 | "src/f32-vhswish/gen/vhswish-sse-x8.c", |
| 4670 | "src/f32-vlrelu/gen/vlrelu-sse-x8.c", |
| 4671 | "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c", |
| 4672 | "src/f32-vsqrt/gen/sse-sqrt-x4.c", |
| 4673 | "src/f32-vunary/gen/vabs-sse-x8.c", |
| 4674 | "src/f32-vunary/gen/vneg-sse-x8.c", |
| 4675 | "src/f32-vunary/gen/vsqr-sse-x8.c", |
| 4676 | "src/x32-packx/x4-sse.c", |
| 4677 | ] |
| 4678 | |
| 4679 | ALL_SSE_MICROKERNEL_SRCS = [ |
| 4680 | "src/f32-avgpool/9p8x-minmax-sse-c4.c", |
| 4681 | "src/f32-avgpool/9x-minmax-sse-c4.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4682 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c", |
| 4683 | "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4684 | "src/f32-dwconv/gen/up4x3-minmax-sse-acc2.c", |
| 4685 | "src/f32-dwconv/gen/up4x3-minmax-sse.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4686 | "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c", |
| 4687 | "src/f32-dwconv/gen/up4x4-minmax-sse.c", |
| 4688 | "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c", |
| 4689 | "src/f32-dwconv/gen/up4x9-minmax-sse.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4690 | "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c", |
| 4691 | "src/f32-dwconv/gen/up4x25-minmax-sse.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4692 | "src/f32-dwconv/gen/up8x3-minmax-sse-acc2.c", |
| 4693 | "src/f32-dwconv/gen/up8x3-minmax-sse.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4694 | "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c", |
| 4695 | "src/f32-dwconv/gen/up8x4-minmax-sse.c", |
| 4696 | "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c", |
| 4697 | "src/f32-dwconv/gen/up8x9-minmax-sse.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4698 | "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c", |
| 4699 | "src/f32-dwconv/gen/up8x25-minmax-sse.c", |
| 4700 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c", |
| 4701 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c", |
| 4702 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c", |
| 4703 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c", |
| 4704 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c", |
| 4705 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c", |
| 4706 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c", |
| 4707 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c", |
| 4708 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c", |
| 4709 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c", |
| 4710 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c", |
| 4711 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c", |
| 4712 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c", |
| 4713 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c", |
| 4714 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c", |
| 4715 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c", |
| 4716 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c", |
| 4717 | "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c", |
| 4718 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c", |
| 4719 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c", |
| 4720 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c", |
| 4721 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c", |
| 4722 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c", |
| 4723 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c", |
| 4724 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c", |
| 4725 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c", |
| 4726 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c", |
| 4727 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c", |
| 4728 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c", |
| 4729 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c", |
| 4730 | "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c", |
| 4731 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c", |
| 4732 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c", |
| 4733 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c", |
| 4734 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c", |
| 4735 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c", |
| 4736 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c", |
| 4737 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c", |
| 4738 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c", |
| 4739 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c", |
| 4740 | "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4741 | "src/f32-gavgpool-cw/sse-x4.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4742 | "src/f32-gavgpool/7p7x-minmax-sse-c4.c", |
| 4743 | "src/f32-gavgpool/7x-minmax-sse-c4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4744 | "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c", |
| 4745 | "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c", |
| 4746 | "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 4747 | "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c", |
| 4748 | "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c", |
| 4749 | "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4750 | "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c", |
| 4751 | "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c", |
| 4752 | "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 4753 | "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c", |
| 4754 | "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c", |
| 4755 | "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4756 | "src/f32-gemm/gen/1x8-minmax-sse-dup.c", |
| 4757 | "src/f32-gemm/gen/1x8-minmax-sse-load1.c", |
| 4758 | "src/f32-gemm/gen/1x8s4-minmax-sse.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 4759 | "src/f32-gemm/gen/3x8-minmax-sse-dup.c", |
| 4760 | "src/f32-gemm/gen/3x8-minmax-sse-load1.c", |
| 4761 | "src/f32-gemm/gen/3x8s4-minmax-sse.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4762 | "src/f32-gemm/gen/4x2c4-minmax-sse.c", |
| 4763 | "src/f32-gemm/gen/4x8-minmax-sse-dup.c", |
| 4764 | "src/f32-gemm/gen/4x8-minmax-sse-load1.c", |
| 4765 | "src/f32-gemm/gen/4x8s4-minmax-sse.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 4766 | "src/f32-gemm/gen/5x8-minmax-sse-dup.c", |
| 4767 | "src/f32-gemm/gen/5x8-minmax-sse-load1.c", |
| 4768 | "src/f32-gemm/gen/5x8s4-minmax-sse.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4769 | "src/f32-ibilinear-chw/gen/sse-p4.c", |
| 4770 | "src/f32-ibilinear-chw/gen/sse-p8.c", |
| Miao Wang | 2534c2f | 2020-03-16 11:58:04 -0700 | [diff] [blame] | 4771 | "src/f32-ibilinear/gen/sse-c4.c", |
| 4772 | "src/f32-ibilinear/gen/sse-c8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4773 | "src/f32-igemm/gen/1x8-minmax-sse-dup.c", |
| 4774 | "src/f32-igemm/gen/1x8-minmax-sse-load1.c", |
| 4775 | "src/f32-igemm/gen/1x8s4-minmax-sse.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 4776 | "src/f32-igemm/gen/3x8-minmax-sse-dup.c", |
| 4777 | "src/f32-igemm/gen/3x8-minmax-sse-load1.c", |
| 4778 | "src/f32-igemm/gen/3x8s4-minmax-sse.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4779 | "src/f32-igemm/gen/4x2c4-minmax-sse.c", |
| 4780 | "src/f32-igemm/gen/4x8-minmax-sse-dup.c", |
| 4781 | "src/f32-igemm/gen/4x8-minmax-sse-load1.c", |
| 4782 | "src/f32-igemm/gen/4x8s4-minmax-sse.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 4783 | "src/f32-igemm/gen/5x8-minmax-sse-dup.c", |
| 4784 | "src/f32-igemm/gen/5x8-minmax-sse-load1.c", |
| 4785 | "src/f32-igemm/gen/5x8s4-minmax-sse.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4786 | "src/f32-maxpool/9p8x-minmax-sse-c4.c", |
| 4787 | "src/f32-pavgpool/9p8x-minmax-sse-c4.c", |
| 4788 | "src/f32-pavgpool/9x-minmax-sse-c4.c", |
| 4789 | "src/f32-ppmm/gen/4x8-minmax-sse.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4790 | "src/f32-prelu/gen/sse-2x4.c", |
| 4791 | "src/f32-prelu/gen/sse-2x8.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4792 | "src/f32-rmax/sse.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4793 | "src/f32-spmm/gen/4x1-minmax-sse.c", |
| 4794 | "src/f32-spmm/gen/8x1-minmax-sse.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4795 | "src/f32-spmm/gen/16x1-minmax-sse.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4796 | "src/f32-spmm/gen/32x1-minmax-sse.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4797 | "src/f32-vbinary/gen/vadd-minmax-sse-x4.c", |
| 4798 | "src/f32-vbinary/gen/vadd-minmax-sse-x8.c", |
| 4799 | "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c", |
| 4800 | "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c", |
| 4801 | "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c", |
| 4802 | "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c", |
| 4803 | "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c", |
| 4804 | "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4805 | "src/f32-vbinary/gen/vmax-sse-x4.c", |
| 4806 | "src/f32-vbinary/gen/vmax-sse-x8.c", |
| 4807 | "src/f32-vbinary/gen/vmaxc-sse-x4.c", |
| 4808 | "src/f32-vbinary/gen/vmaxc-sse-x8.c", |
| 4809 | "src/f32-vbinary/gen/vmin-sse-x4.c", |
| 4810 | "src/f32-vbinary/gen/vmin-sse-x8.c", |
| 4811 | "src/f32-vbinary/gen/vminc-sse-x4.c", |
| 4812 | "src/f32-vbinary/gen/vminc-sse-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4813 | "src/f32-vbinary/gen/vmul-minmax-sse-x4.c", |
| 4814 | "src/f32-vbinary/gen/vmul-minmax-sse-x8.c", |
| 4815 | "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c", |
| 4816 | "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c", |
| 4817 | "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c", |
| 4818 | "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c", |
| 4819 | "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c", |
| 4820 | "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4821 | "src/f32-vbinary/gen/vsqrdiff-sse-x4.c", |
| 4822 | "src/f32-vbinary/gen/vsqrdiff-sse-x8.c", |
| 4823 | "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c", |
| 4824 | "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4825 | "src/f32-vbinary/gen/vsub-minmax-sse-x4.c", |
| 4826 | "src/f32-vbinary/gen/vsub-minmax-sse-x8.c", |
| 4827 | "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c", |
| 4828 | "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4829 | "src/f32-vclamp/gen/vclamp-sse-x4.c", |
| 4830 | "src/f32-vclamp/gen/vclamp-sse-x8.c", |
| 4831 | "src/f32-vhswish/gen/vhswish-sse-x4.c", |
| 4832 | "src/f32-vhswish/gen/vhswish-sse-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4833 | "src/f32-vlrelu/gen/vlrelu-sse-x4.c", |
| 4834 | "src/f32-vlrelu/gen/vlrelu-sse-x8.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 4835 | "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c", |
| 4836 | "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4837 | "src/f32-vrelu/gen/vrelu-sse-x4.c", |
| 4838 | "src/f32-vrelu/gen/vrelu-sse-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4839 | "src/f32-vsqrt/gen/sse-sqrt-x4.c", |
| 4840 | "src/f32-vsqrt/gen/sse-sqrt-x8.c", |
| 4841 | "src/f32-vunary/gen/vabs-sse-x4.c", |
| 4842 | "src/f32-vunary/gen/vabs-sse-x8.c", |
| 4843 | "src/f32-vunary/gen/vneg-sse-x4.c", |
| 4844 | "src/f32-vunary/gen/vneg-sse-x8.c", |
| 4845 | "src/f32-vunary/gen/vsqr-sse-x4.c", |
| 4846 | "src/f32-vunary/gen/vsqr-sse-x8.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 4847 | "src/math/roundd-sse-addsub.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4848 | "src/math/roundne-sse-addsub.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 4849 | "src/math/roundu-sse-addsub.c", |
| 4850 | "src/math/roundz-sse-addsub.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4851 | "src/math/sqrt-sse-hh1mac.c", |
| 4852 | "src/math/sqrt-sse-nr1mac.c", |
| 4853 | "src/math/sqrt-sse-nr2mac.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4854 | "src/x32-packx/x4-sse.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4855 | "src/x32-transpose/4x4-sse.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4856 | ] |
| 4857 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4858 | PROD_SSE2_MICROKERNEL_SRCS = [ |
| 4859 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4860 | "src/f32-argmaxpool/4x-sse2-c4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4861 | "src/f32-argmaxpool/9p8x-sse2-c4.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4862 | "src/f32-argmaxpool/9x-sse2-c4.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4863 | "src/f32-f16-vcvt/gen/vcvt-sse2-x16.c", |
| 4864 | "src/f32-prelu/gen/sse2-2x8.c", |
| 4865 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c", |
| 4866 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c", |
| 4867 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20-acc2.c", |
| 4868 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c", |
| 4869 | "src/f32-vlrelu/gen/vlrelu-sse2-x8.c", |
| 4870 | "src/f32-vrnd/gen/vrndd-sse2-x8.c", |
| 4871 | "src/f32-vrnd/gen/vrndne-sse2-x8.c", |
| 4872 | "src/f32-vrnd/gen/vrndu-sse2-x8.c", |
| 4873 | "src/f32-vrnd/gen/vrndz-sse2-x8.c", |
| 4874 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x8.c", |
| 4875 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 4876 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| 4877 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4878 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4879 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4880 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4881 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| 4882 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| 4883 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| 4884 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse2-c8.c", |
| 4885 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse2-c8.c", |
| 4886 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4887 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4888 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4889 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4890 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 4891 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| 4892 | "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 4893 | "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 4894 | "src/qu8-avgpool/9p8x-minmax-sse2-c8.c", |
| 4895 | "src/qu8-avgpool/9x-minmax-sse2-c8.c", |
| 4896 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 4897 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| 4898 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| 4899 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse2-c8.c", |
| 4900 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse2-c8.c", |
| 4901 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4902 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4903 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 4904 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 4905 | "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 4906 | "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| 4907 | "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 4908 | "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 4909 | "src/s8-ibilinear/gen/sse2-c8.c", |
| 4910 | "src/s8-maxpool/9p8x-minmax-sse2-c16.c", |
| 4911 | "src/s8-vclamp/sse2-x64.c", |
| 4912 | "src/u8-ibilinear/gen/sse2-c8.c", |
| 4913 | "src/u8-maxpool/9p8x-minmax-sse2-c16.c", |
| 4914 | "src/u8-rmax/sse2.c", |
| 4915 | "src/u8-vclamp/sse2-x64.c", |
| 4916 | "src/x8-zip/x2-sse2.c", |
| 4917 | "src/x8-zip/x3-sse2.c", |
| 4918 | "src/x8-zip/x4-sse2.c", |
| 4919 | "src/x8-zip/xm-sse2.c", |
| 4920 | "src/x32-unpool/sse2.c", |
| 4921 | "src/x32-zip/x2-sse2.c", |
| 4922 | "src/x32-zip/x3-sse2.c", |
| 4923 | "src/x32-zip/x4-sse2.c", |
| 4924 | "src/x32-zip/xm-sse2.c", |
| 4925 | "src/xx-fill/sse2-x64.c", |
| 4926 | "src/xx-pad/sse2.c", |
| 4927 | ] |
| 4928 | |
| 4929 | ALL_SSE2_MICROKERNEL_SRCS = [ |
| 4930 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x8.c", |
| 4931 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x16.c", |
| 4932 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x24.c", |
| 4933 | "src/f16-f32-vcvt/gen/vcvt-sse2-int16-x32.c", |
| 4934 | "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x8.c", |
| 4935 | "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x16.c", |
| 4936 | "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x24.c", |
| 4937 | "src/f16-f32-vcvt/gen/vcvt-sse2-int32-x32.c", |
| 4938 | "src/f32-argmaxpool/4x-sse2-c4.c", |
| 4939 | "src/f32-argmaxpool/9p8x-sse2-c4.c", |
| 4940 | "src/f32-argmaxpool/9x-sse2-c4.c", |
| 4941 | "src/f32-f16-vcvt/gen/vcvt-sse2-x8.c", |
| 4942 | "src/f32-f16-vcvt/gen/vcvt-sse2-x16.c", |
| 4943 | "src/f32-f16-vcvt/gen/vcvt-sse2-x24.c", |
| 4944 | "src/f32-f16-vcvt/gen/vcvt-sse2-x32.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 4945 | "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c", |
| 4946 | "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c", |
| 4947 | "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c", |
| 4948 | "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c", |
| 4949 | "src/f32-gemm/gen/1x8-minmax-sse2-dup.c", |
| 4950 | "src/f32-gemm/gen/3x8-minmax-sse2-dup.c", |
| 4951 | "src/f32-gemm/gen/4x8-minmax-sse2-dup.c", |
| 4952 | "src/f32-gemm/gen/5x8-minmax-sse2-dup.c", |
| 4953 | "src/f32-igemm/gen/1x8-minmax-sse2-dup.c", |
| 4954 | "src/f32-igemm/gen/3x8-minmax-sse2-dup.c", |
| 4955 | "src/f32-igemm/gen/4x8-minmax-sse2-dup.c", |
| 4956 | "src/f32-igemm/gen/5x8-minmax-sse2-dup.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 4957 | "src/f32-prelu/gen/sse2-2x4.c", |
| 4958 | "src/f32-prelu/gen/sse2-2x8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 4959 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x8.c", |
| 4960 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x16.c", |
| 4961 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x24.c", |
| 4962 | "src/f32-qs8-vcvt/gen/vcvt-sse2-x32.c", |
| 4963 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x8.c", |
| 4964 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x16.c", |
| 4965 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x24.c", |
| 4966 | "src/f32-qu8-vcvt/gen/vcvt-sse2-x32.c", |
| 4967 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x4.c", |
| 4968 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x8-acc2.c", |
| 4969 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x8.c", |
| 4970 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x12-acc2.c", |
| 4971 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x12-acc3.c", |
| 4972 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x12.c", |
| 4973 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x16-acc2.c", |
| 4974 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x16-acc4.c", |
| 4975 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x16.c", |
| 4976 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20-acc2.c", |
| 4977 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20-acc5.c", |
| 4978 | "src/f32-raddstoreexpminusmax/gen/sse2-rr2-p5-x20.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 4979 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c", |
| 4980 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c", |
| 4981 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c", |
| 4982 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c", |
| 4983 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c", |
| 4984 | "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c", |
| 4985 | "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c", |
| 4986 | "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c", |
| 4987 | "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c", |
| 4988 | "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c", |
| 4989 | "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c", |
| 4990 | "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4991 | "src/f32-vlrelu/gen/vlrelu-sse2-x4.c", |
| 4992 | "src/f32-vlrelu/gen/vlrelu-sse2-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 4993 | "src/f32-vrnd/gen/vrndd-sse2-x4.c", |
| 4994 | "src/f32-vrnd/gen/vrndd-sse2-x8.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 4995 | "src/f32-vrnd/gen/vrndne-sse2-x4.c", |
| 4996 | "src/f32-vrnd/gen/vrndne-sse2-x8.c", |
| 4997 | "src/f32-vrnd/gen/vrndu-sse2-x4.c", |
| 4998 | "src/f32-vrnd/gen/vrndu-sse2-x8.c", |
| 4999 | "src/f32-vrnd/gen/vrndz-sse2-x4.c", |
| 5000 | "src/f32-vrnd/gen/vrndz-sse2-x8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5001 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x4.c", |
| 5002 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x8.c", |
| 5003 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x12.c", |
| 5004 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x16.c", |
| 5005 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x20.c", |
| 5006 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-lut64-p2-div-x24.c", |
| 5007 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x4.c", |
| 5008 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x8.c", |
| 5009 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x12.c", |
| 5010 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x16.c", |
| 5011 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x20.c", |
| 5012 | "src/f32-vsigmoid/gen/vsigmoid-sse2-rr2-p5-div-x24.c", |
| 5013 | "src/math/cvt-f16-f32-sse2-int16.c", |
| 5014 | "src/math/cvt-f16-f32-sse2-int32.c", |
| 5015 | "src/math/cvt-f32-f16-sse2.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5016 | "src/math/exp-sse2-rr2-lut64-p2.c", |
| 5017 | "src/math/exp-sse2-rr2-p5.c", |
| 5018 | "src/math/expm1minus-sse2-rr2-lut16-p3.c", |
| 5019 | "src/math/expm1minus-sse2-rr2-p6.c", |
| 5020 | "src/math/expminus-sse2-rr2-p5.c", |
| 5021 | "src/math/roundd-sse2-cvt.c", |
| 5022 | "src/math/roundne-sse2-cvt.c", |
| 5023 | "src/math/roundu-sse2-cvt.c", |
| 5024 | "src/math/roundz-sse2-cvt.c", |
| 5025 | "src/math/sigmoid-sse2-rr2-lut64-p2-div.c", |
| 5026 | "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c", |
| 5027 | "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c", |
| 5028 | "src/math/sigmoid-sse2-rr2-p5-div.c", |
| 5029 | "src/math/sigmoid-sse2-rr2-p5-nr1.c", |
| 5030 | "src/math/sigmoid-sse2-rr2-p5-nr2.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5031 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| 5032 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 5033 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| 5034 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| 5035 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c", |
| 5036 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| 5037 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c", |
| 5038 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| 5039 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c", |
| 5040 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c", |
| 5041 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| 5042 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| 5043 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 5044 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| 5045 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| 5046 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| 5047 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| 5048 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| 5049 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| 5050 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| 5051 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 5052 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| 5053 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| 5054 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| 5055 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| 5056 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| 5057 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 5058 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| 5059 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| 5060 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| 5061 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| 5062 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| 5063 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| 5064 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| 5065 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 5066 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| 5067 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| 5068 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| 5069 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16-add16.c", |
| 5070 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 5071 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16-add16.c", |
| 5072 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| 5073 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16-add16.c", |
| 5074 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| 5075 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16-add16.c", |
| 5076 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| 5077 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c", |
| 5078 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c", |
| 5079 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x8.c", |
| 5080 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x16.c", |
| 5081 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x24.c", |
| 5082 | "src/qs8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| 5083 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse2-c8.c", |
| 5084 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse2-c16.c", |
| 5085 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse2-c24.c", |
| 5086 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse2-c8.c", |
| 5087 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse2-c16.c", |
| 5088 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse2-c24.c", |
| 5089 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| 5090 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| 5091 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse2.c", |
| 5092 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 5093 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| 5094 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse2.c", |
| 5095 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| 5096 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| 5097 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse2.c", |
| 5098 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| 5099 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| 5100 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse2.c", |
| 5101 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| 5102 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| 5103 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse2.c", |
| 5104 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 5105 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| 5106 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse2.c", |
| 5107 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| 5108 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| 5109 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse2.c", |
| 5110 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| 5111 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| 5112 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 5113 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| 5114 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| 5115 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| 5116 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| 5117 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| 5118 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| 5119 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| 5120 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 5121 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| 5122 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| 5123 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5124 | "src/qs8-requantization/fp32-sse2.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5125 | "src/qs8-requantization/gemmlowp-sse2.c", |
| 5126 | "src/qs8-requantization/rndna-sse2.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5127 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 5128 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c", |
| 5129 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c", |
| 5130 | "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c", |
| 5131 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| 5132 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c", |
| 5133 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c", |
| 5134 | "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5135 | "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 5136 | "src/qs8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| 5137 | "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 5138 | "src/qs8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 5139 | "src/qu8-avgpool/9p8x-minmax-sse2-c8.c", |
| 5140 | "src/qu8-avgpool/9x-minmax-sse2-c8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5141 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c", |
| 5142 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c", |
| 5143 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c", |
| 5144 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c", |
| 5145 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x8.c", |
| 5146 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x16.c", |
| 5147 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x24.c", |
| 5148 | "src/qu8-f32-vcvt/gen/vcvt-sse2-x32.c", |
| 5149 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse2-c8.c", |
| 5150 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse2-c16.c", |
| 5151 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse2-c24.c", |
| 5152 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse2-c8.c", |
| 5153 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse2-c16.c", |
| 5154 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse2-c24.c", |
| 5155 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| 5156 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| 5157 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 5158 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| 5159 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| 5160 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| 5161 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| 5162 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| 5163 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| 5164 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| 5165 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 5166 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| 5167 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| 5168 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| 5169 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c", |
| 5170 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c", |
| 5171 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c", |
| 5172 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c", |
| 5173 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c", |
| 5174 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c", |
| 5175 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c", |
| 5176 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c", |
| 5177 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c", |
| 5178 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c", |
| 5179 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c", |
| 5180 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c", |
| 5181 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c", |
| 5182 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 5183 | "src/qu8-requantization/fp32-sse2.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5184 | "src/qu8-requantization/gemmlowp-sse2.c", |
| 5185 | "src/qu8-requantization/rndna-sse2.c", |
| 5186 | "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x8.c", |
| 5187 | "src/qu8-vadd/gen/minmax-sse2-mul16-ld64-x16.c", |
| 5188 | "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c", |
| 5189 | "src/qu8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c", |
| 5190 | "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 5191 | "src/qu8-vmul/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| 5192 | "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x8.c", |
| 5193 | "src/qu8-vmulc/gen/minmax-fp32-sse2-mul16-ld64-x16.c", |
| 5194 | "src/s8-ibilinear/gen/sse2-c8.c", |
| 5195 | "src/s8-ibilinear/gen/sse2-c16.c", |
| 5196 | "src/s8-maxpool/9p8x-minmax-sse2-c16.c", |
| 5197 | "src/s8-vclamp/sse2-x64.c", |
| 5198 | "src/u8-ibilinear/gen/sse2-c8.c", |
| 5199 | "src/u8-ibilinear/gen/sse2-c16.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5200 | "src/u8-maxpool/9p8x-minmax-sse2-c16.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 5201 | "src/u8-rmax/sse2.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5202 | "src/u8-vclamp/sse2-x64.c", |
| 5203 | "src/x8-transpose/gen/16x16-reuse-mov-sse2.c", |
| 5204 | "src/x8-transpose/gen/16x16-reuse-switch-sse2.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5205 | "src/x8-zip/x2-sse2.c", |
| 5206 | "src/x8-zip/x3-sse2.c", |
| 5207 | "src/x8-zip/x4-sse2.c", |
| 5208 | "src/x8-zip/xm-sse2.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5209 | "src/x16-transpose/4x8-sse2.c", |
| 5210 | "src/x16-transpose/gen/8x8-multi-mov-sse2.c", |
| 5211 | "src/x16-transpose/gen/8x8-multi-switch-sse2.c", |
| 5212 | "src/x16-transpose/gen/8x8-reuse-mov-sse2.c", |
| 5213 | "src/x16-transpose/gen/8x8-reuse-multi-sse2.c", |
| 5214 | "src/x16-transpose/gen/8x8-reuse-switch-sse2.c", |
| 5215 | "src/x32-transpose/gen/4x4-multi-mov-sse2.c", |
| 5216 | "src/x32-transpose/gen/4x4-multi-multi-sse2.c", |
| 5217 | "src/x32-transpose/gen/4x4-multi-switch-sse2.c", |
| 5218 | "src/x32-transpose/gen/4x4-reuse-mov-sse2.c", |
| 5219 | "src/x32-transpose/gen/4x4-reuse-multi-sse2.c", |
| 5220 | "src/x32-transpose/gen/4x4-reuse-switch-sse2.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 5221 | "src/x32-unpool/sse2.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 5222 | "src/x32-zip/x2-sse2.c", |
| 5223 | "src/x32-zip/x3-sse2.c", |
| 5224 | "src/x32-zip/x4-sse2.c", |
| 5225 | "src/x32-zip/xm-sse2.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5226 | "src/x64-transpose/gen/2x2-multi-mov-sse2.c", |
| 5227 | "src/x64-transpose/gen/2x2-multi-multi-sse2.c", |
| 5228 | "src/x64-transpose/gen/2x2-multi-switch-sse2.c", |
| 5229 | "src/x64-transpose/gen/2x2-reuse-mov-sse2.c", |
| 5230 | "src/x64-transpose/gen/2x2-reuse-multi-sse2.c", |
| 5231 | "src/x64-transpose/gen/2x2-reuse-switch-sse2.c", |
| 5232 | "src/xx-fill/sse2-x64.c", |
| 5233 | "src/xx-pad/sse2.c", |
| Miao Wang | 2534c2f | 2020-03-16 11:58:04 -0700 | [diff] [blame] | 5234 | ] |
| 5235 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5236 | PROD_SSSE3_MICROKERNEL_SRCS = [ |
| 5237 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c", |
| 5238 | ] |
| 5239 | |
| 5240 | ALL_SSSE3_MICROKERNEL_SRCS = [ |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5241 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c", |
| 5242 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c", |
| 5243 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c", |
| 5244 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c", |
| 5245 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c", |
| 5246 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c", |
| 5247 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c", |
| 5248 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c", |
| 5249 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c", |
| 5250 | "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5251 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c", |
| 5252 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c", |
| 5253 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-ssse3.c", |
| 5254 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c", |
| 5255 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c", |
| 5256 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-ssse3.c", |
| 5257 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c", |
| 5258 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c", |
| 5259 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-ssse3.c", |
| 5260 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c", |
| 5261 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c", |
| 5262 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c", |
| 5263 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c", |
| 5264 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c", |
| 5265 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c", |
| 5266 | "src/qs8-requantization/gemmlowp-ssse3.c", |
| 5267 | "src/qs8-requantization/rndna-ssse3.c", |
| 5268 | "src/qu8-requantization/gemmlowp-ssse3.c", |
| 5269 | "src/qu8-requantization/rndna-ssse3.c", |
| 5270 | "src/x8-lut/gen/lut-ssse3-x16.c", |
| 5271 | "src/x8-lut/gen/lut-ssse3-x32.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 5272 | ] |
| 5273 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5274 | PROD_SSE41_MICROKERNEL_SRCS = [ |
| 5275 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c", |
| 5276 | "src/f32-f16-vcvt/gen/vcvt-sse41-x8.c", |
| 5277 | "src/f32-prelu/gen/sse41-2x8.c", |
| 5278 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c", |
| 5279 | "src/f32-vlrelu/gen/vlrelu-sse41-x8.c", |
| 5280 | "src/f32-vrnd/gen/vrndd-sse41-x8.c", |
| 5281 | "src/f32-vrnd/gen/vrndne-sse41-x8.c", |
| 5282 | "src/f32-vrnd/gen/vrndu-sse41-x8.c", |
| 5283 | "src/f32-vrnd/gen/vrndz-sse41-x8.c", |
| 5284 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x8.c", |
| 5285 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| 5286 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| 5287 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5288 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5289 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5290 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5291 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| 5292 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| 5293 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| 5294 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse41-c8.c", |
| 5295 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse41-c8.c", |
| 5296 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5297 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5298 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5299 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5300 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5301 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5302 | "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5303 | "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5304 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| 5305 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| 5306 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| 5307 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse41-c8.c", |
| 5308 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse41-c8.c", |
| 5309 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5310 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5311 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5312 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5313 | "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5314 | "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5315 | "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5316 | "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5317 | "src/s8-ibilinear/gen/sse41-c16.c", |
| 5318 | "src/s8-maxpool/9p8x-minmax-sse41-c16.c", |
| 5319 | "src/s8-vclamp/sse41-x64.c", |
| 5320 | "src/u8-ibilinear/gen/sse41-c16.c", |
| 5321 | ] |
| 5322 | |
| 5323 | ALL_SSE41_MICROKERNEL_SRCS = [ |
| 5324 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x8.c", |
| 5325 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x16.c", |
| 5326 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x24.c", |
| 5327 | "src/f16-f32-vcvt/gen/vcvt-sse41-int16-x32.c", |
| 5328 | "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x8.c", |
| 5329 | "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x16.c", |
| 5330 | "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x24.c", |
| 5331 | "src/f16-f32-vcvt/gen/vcvt-sse41-int32-x32.c", |
| 5332 | "src/f32-f16-vcvt/gen/vcvt-sse41-x8.c", |
| 5333 | "src/f32-f16-vcvt/gen/vcvt-sse41-x16.c", |
| 5334 | "src/f32-f16-vcvt/gen/vcvt-sse41-x24.c", |
| 5335 | "src/f32-f16-vcvt/gen/vcvt-sse41-x32.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 5336 | "src/f32-prelu/gen/sse41-2x4.c", |
| 5337 | "src/f32-prelu/gen/sse41-2x8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5338 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x8.c", |
| 5339 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x16.c", |
| 5340 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x24.c", |
| 5341 | "src/f32-qs8-vcvt/gen/vcvt-sse41-x32.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 5342 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c", |
| 5343 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c", |
| 5344 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c", |
| 5345 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c", |
| 5346 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c", |
| 5347 | "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c", |
| 5348 | "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c", |
| 5349 | "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c", |
| 5350 | "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c", |
| 5351 | "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c", |
| 5352 | "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c", |
| 5353 | "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 5354 | "src/f32-vlrelu/gen/vlrelu-sse41-x4.c", |
| 5355 | "src/f32-vlrelu/gen/vlrelu-sse41-x8.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 5356 | "src/f32-vrnd/gen/vrndd-sse41-x4.c", |
| 5357 | "src/f32-vrnd/gen/vrndd-sse41-x8.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5358 | "src/f32-vrnd/gen/vrndne-sse41-x4.c", |
| 5359 | "src/f32-vrnd/gen/vrndne-sse41-x8.c", |
| 5360 | "src/f32-vrnd/gen/vrndu-sse41-x4.c", |
| 5361 | "src/f32-vrnd/gen/vrndu-sse41-x8.c", |
| 5362 | "src/f32-vrnd/gen/vrndz-sse41-x4.c", |
| 5363 | "src/f32-vrnd/gen/vrndz-sse41-x8.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5364 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x4.c", |
| 5365 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x8.c", |
| 5366 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x12.c", |
| 5367 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x16.c", |
| 5368 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x20.c", |
| 5369 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-lut64-p2-div-x24.c", |
| 5370 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x4.c", |
| 5371 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x8.c", |
| 5372 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x12.c", |
| 5373 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x16.c", |
| 5374 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x20.c", |
| 5375 | "src/f32-vsigmoid/gen/vsigmoid-sse41-rr2-p5-div-x24.c", |
| 5376 | "src/math/cvt-f16-f32-sse41-int16.c", |
| 5377 | "src/math/cvt-f16-f32-sse41-int32.c", |
| 5378 | "src/math/cvt-f32-f16-sse41.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 5379 | "src/math/roundd-sse41.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5380 | "src/math/roundne-sse41.c", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 5381 | "src/math/roundu-sse41.c", |
| 5382 | "src/math/roundz-sse41.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5383 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| 5384 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| 5385 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| 5386 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| 5387 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| 5388 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| 5389 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c", |
| 5390 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| 5391 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| 5392 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c", |
| 5393 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| 5394 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| 5395 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c", |
| 5396 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c", |
| 5397 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c", |
| 5398 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c", |
| 5399 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| 5400 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| 5401 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5402 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| 5403 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| 5404 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| 5405 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| 5406 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| 5407 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| 5408 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| 5409 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5410 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| 5411 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| 5412 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| 5413 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| 5414 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| 5415 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5416 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| 5417 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| 5418 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| 5419 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| 5420 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| 5421 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| 5422 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| 5423 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5424 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| 5425 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| 5426 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| 5427 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16-add16.c", |
| 5428 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| 5429 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| 5430 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16-add16.c", |
| 5431 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| 5432 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| 5433 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16-add16.c", |
| 5434 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| 5435 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| 5436 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16-add16.c", |
| 5437 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| 5438 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| 5439 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c", |
| 5440 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c", |
| 5441 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c", |
| 5442 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c", |
| 5443 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x8.c", |
| 5444 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| 5445 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x24.c", |
| 5446 | "src/qs8-f32-vcvt/gen/vcvt-sse41-x32.c", |
| 5447 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse41-c8.c", |
| 5448 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse41-c16.c", |
| 5449 | "src/qs8-gavgpool/gen/7p7x-minmax-fp32-sse41-c24.c", |
| 5450 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse41-c8.c", |
| 5451 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse41-c16.c", |
| 5452 | "src/qs8-gavgpool/gen/7x-minmax-fp32-sse41-c24.c", |
| 5453 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| 5454 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| 5455 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-sse41.c", |
| 5456 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5457 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| 5458 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-sse41.c", |
| 5459 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| 5460 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| 5461 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-sse41.c", |
| 5462 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| 5463 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| 5464 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-sse41.c", |
| 5465 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| 5466 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| 5467 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-sse41.c", |
| 5468 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5469 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| 5470 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-sse41.c", |
| 5471 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| 5472 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| 5473 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-sse41.c", |
| 5474 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| 5475 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| 5476 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5477 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| 5478 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| 5479 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| 5480 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| 5481 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| 5482 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| 5483 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| 5484 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5485 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| 5486 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| 5487 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5488 | "src/qs8-requantization/fp32-sse4.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5489 | "src/qs8-requantization/gemmlowp-sse4.c", |
| 5490 | "src/qs8-requantization/rndna-sse4.c", |
| 5491 | "src/qs8-requantization/rndnu-sse4-sra.c", |
| 5492 | "src/qs8-requantization/rndnu-sse4-srl.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5493 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5494 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c", |
| 5495 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c", |
| 5496 | "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c", |
| 5497 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c", |
| 5498 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c", |
| 5499 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c", |
| 5500 | "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c", |
| 5501 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5502 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c", |
| 5503 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c", |
| 5504 | "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c", |
| 5505 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c", |
| 5506 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c", |
| 5507 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c", |
| 5508 | "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5509 | "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 5510 | "src/qs8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5511 | "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 5512 | "src/qs8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5513 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c", |
| 5514 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c", |
| 5515 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c", |
| 5516 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c", |
| 5517 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c", |
| 5518 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c", |
| 5519 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c", |
| 5520 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c", |
| 5521 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x8.c", |
| 5522 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x16.c", |
| 5523 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x24.c", |
| 5524 | "src/qu8-f32-vcvt/gen/vcvt-sse41-x32.c", |
| 5525 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse41-c8.c", |
| 5526 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse41-c16.c", |
| 5527 | "src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse41-c24.c", |
| 5528 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse41-c8.c", |
| 5529 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse41-c16.c", |
| 5530 | "src/qu8-gavgpool/gen/7x-minmax-fp32-sse41-c24.c", |
| 5531 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| 5532 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| 5533 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5534 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| 5535 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| 5536 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| 5537 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| 5538 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| 5539 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| 5540 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| 5541 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5542 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| 5543 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| 5544 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| 5545 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c", |
| 5546 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c", |
| 5547 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c", |
| 5548 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c", |
| 5549 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c", |
| 5550 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c", |
| 5551 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c", |
| 5552 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c", |
| 5553 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c", |
| 5554 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c", |
| 5555 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c", |
| 5556 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c", |
| 5557 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c", |
| 5558 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c", |
| 5559 | "src/qu8-requantization/gemmlowp-sse4.c", |
| 5560 | "src/qu8-requantization/rndna-sse4.c", |
| 5561 | "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5562 | "src/qu8-vadd/gen/minmax-sse41-mul16-ld64-x16.c", |
| 5563 | "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x8.c", |
| 5564 | "src/qu8-vadd/gen/minmax-sse41-mul32-ld32-x16.c", |
| 5565 | "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c", |
| 5566 | "src/qu8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c", |
| 5567 | "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c", |
| 5568 | "src/qu8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c", |
| 5569 | "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 5570 | "src/qu8-vmul/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5571 | "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x8.c", |
| 5572 | "src/qu8-vmulc/gen/minmax-fp32-sse41-mul16-ld64-x16.c", |
| 5573 | "src/s8-ibilinear/gen/sse41-c8.c", |
| 5574 | "src/s8-ibilinear/gen/sse41-c16.c", |
| 5575 | "src/s8-maxpool/9p8x-minmax-sse41-c16.c", |
| 5576 | "src/s8-vclamp/sse41-x64.c", |
| 5577 | "src/u8-ibilinear/gen/sse41-c8.c", |
| 5578 | "src/u8-ibilinear/gen/sse41-c16.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 5579 | ] |
| 5580 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5581 | PROD_AVX_MICROKERNEL_SRCS = [ |
| 5582 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c", |
| 5583 | "src/f32-dwconv/gen/up8x25-minmax-avx.c", |
| 5584 | "src/f32-dwconv/gen/up16x3-minmax-avx.c", |
| 5585 | "src/f32-dwconv/gen/up16x4-minmax-avx.c", |
| 5586 | "src/f32-dwconv/gen/up16x9-minmax-avx.c", |
| 5587 | "src/f32-f16-vcvt/gen/vcvt-avx-x24.c", |
| 5588 | "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c", |
| 5589 | "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c", |
| 5590 | "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c", |
| 5591 | "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c", |
| 5592 | "src/f32-prelu/gen/avx-2x16.c", |
| 5593 | "src/f32-qs8-vcvt/gen/vcvt-avx-x32.c", |
| 5594 | "src/f32-qu8-vcvt/gen/vcvt-avx-x32.c", |
| 5595 | "src/f32-vbinary/gen/vadd-minmax-avx-x16.c", |
| 5596 | "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c", |
| 5597 | "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c", |
| 5598 | "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c", |
| 5599 | "src/f32-vbinary/gen/vmax-avx-x16.c", |
| 5600 | "src/f32-vbinary/gen/vmaxc-avx-x16.c", |
| 5601 | "src/f32-vbinary/gen/vmin-avx-x16.c", |
| 5602 | "src/f32-vbinary/gen/vminc-avx-x16.c", |
| 5603 | "src/f32-vbinary/gen/vmul-minmax-avx-x16.c", |
| 5604 | "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c", |
| 5605 | "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c", |
| 5606 | "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c", |
| 5607 | "src/f32-vbinary/gen/vsqrdiff-avx-x16.c", |
| 5608 | "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c", |
| 5609 | "src/f32-vbinary/gen/vsub-minmax-avx-x16.c", |
| 5610 | "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c", |
| 5611 | "src/f32-vclamp/gen/vclamp-avx-x16.c", |
| 5612 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c", |
| 5613 | "src/f32-vhswish/gen/vhswish-avx-x16.c", |
| 5614 | "src/f32-vlrelu/gen/vlrelu-avx-x16.c", |
| 5615 | "src/f32-vrnd/gen/vrndd-avx-x16.c", |
| 5616 | "src/f32-vrnd/gen/vrndne-avx-x16.c", |
| 5617 | "src/f32-vrnd/gen/vrndu-avx-x16.c", |
| 5618 | "src/f32-vrnd/gen/vrndz-avx-x16.c", |
| 5619 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c", |
| 5620 | "src/f32-vsqrt/gen/avx-sqrt-x8.c", |
| 5621 | "src/f32-vunary/gen/vabs-avx-x16.c", |
| 5622 | "src/f32-vunary/gen/vneg-avx-x16.c", |
| 5623 | "src/f32-vunary/gen/vsqr-avx-x16.c", |
| 5624 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| 5625 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| 5626 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5627 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5628 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5629 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5630 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| 5631 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| 5632 | "src/qs8-f32-vcvt/gen/vcvt-avx-x32.c", |
| 5633 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5634 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5635 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5636 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5637 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 5638 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| 5639 | "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5640 | "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5641 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| 5642 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| 5643 | "src/qu8-f32-vcvt/gen/vcvt-avx-x32.c", |
| 5644 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5645 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5646 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5647 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5648 | "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 5649 | "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| 5650 | "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5651 | "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5652 | "src/x8-lut/gen/lut-avx-x64.c", |
| 5653 | ] |
| 5654 | |
| 5655 | ALL_AVX_MICROKERNEL_SRCS = [ |
| 5656 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x8.c", |
| 5657 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x16.c", |
| 5658 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x24.c", |
| 5659 | "src/f16-f32-vcvt/gen/vcvt-avx-int16-x32.c", |
| 5660 | "src/f16-f32-vcvt/gen/vcvt-avx-int32-x8.c", |
| 5661 | "src/f16-f32-vcvt/gen/vcvt-avx-int32-x16.c", |
| 5662 | "src/f16-f32-vcvt/gen/vcvt-avx-int32-x24.c", |
| 5663 | "src/f16-f32-vcvt/gen/vcvt-avx-int32-x32.c", |
| 5664 | "src/f32-dwconv/gen/up8x3-minmax-avx-acc2.c", |
| 5665 | "src/f32-dwconv/gen/up8x3-minmax-avx.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5666 | "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c", |
| 5667 | "src/f32-dwconv/gen/up8x4-minmax-avx.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5668 | "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c", |
| 5669 | "src/f32-dwconv/gen/up8x9-minmax-avx.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5670 | "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c", |
| 5671 | "src/f32-dwconv/gen/up8x25-minmax-avx.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5672 | "src/f32-dwconv/gen/up16x3-minmax-avx-acc2.c", |
| 5673 | "src/f32-dwconv/gen/up16x3-minmax-avx.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5674 | "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c", |
| 5675 | "src/f32-dwconv/gen/up16x4-minmax-avx.c", |
| 5676 | "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c", |
| 5677 | "src/f32-dwconv/gen/up16x9-minmax-avx.c", |
| 5678 | "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c", |
| 5679 | "src/f32-dwconv/gen/up16x25-minmax-avx.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5680 | "src/f32-f16-vcvt/gen/vcvt-avx-x8.c", |
| 5681 | "src/f32-f16-vcvt/gen/vcvt-avx-x16.c", |
| 5682 | "src/f32-f16-vcvt/gen/vcvt-avx-x24.c", |
| 5683 | "src/f32-f16-vcvt/gen/vcvt-avx-x32.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5684 | "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5685 | "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c", |
| 5686 | "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5687 | "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5688 | "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5689 | "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5690 | "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5691 | "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c", |
| 5692 | "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c", |
| 5693 | "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c", |
| 5694 | "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c", |
| 5695 | "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c", |
| 5696 | "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c", |
| 5697 | "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c", |
| 5698 | "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c", |
| 5699 | "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c", |
| 5700 | "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c", |
| 5701 | "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5702 | "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5703 | "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c", |
| 5704 | "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5705 | "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5706 | "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5707 | "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5708 | "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5709 | "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c", |
| 5710 | "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c", |
| Miao Wang | 2534c2f | 2020-03-16 11:58:04 -0700 | [diff] [blame] | 5711 | "src/f32-prelu/gen/avx-2x8.c", |
| 5712 | "src/f32-prelu/gen/avx-2x16.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5713 | "src/f32-qs8-vcvt/gen/vcvt-avx-x8.c", |
| 5714 | "src/f32-qs8-vcvt/gen/vcvt-avx-x16.c", |
| 5715 | "src/f32-qs8-vcvt/gen/vcvt-avx-x24.c", |
| 5716 | "src/f32-qs8-vcvt/gen/vcvt-avx-x32.c", |
| 5717 | "src/f32-qu8-vcvt/gen/vcvt-avx-x8.c", |
| 5718 | "src/f32-qu8-vcvt/gen/vcvt-avx-x16.c", |
| 5719 | "src/f32-qu8-vcvt/gen/vcvt-avx-x24.c", |
| 5720 | "src/f32-qu8-vcvt/gen/vcvt-avx-x32.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 5721 | "src/f32-rmax/avx.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5722 | "src/f32-vbinary/gen/vadd-minmax-avx-x8.c", |
| 5723 | "src/f32-vbinary/gen/vadd-minmax-avx-x16.c", |
| 5724 | "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c", |
| 5725 | "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c", |
| 5726 | "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c", |
| 5727 | "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c", |
| 5728 | "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c", |
| 5729 | "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 5730 | "src/f32-vbinary/gen/vmax-avx-x8.c", |
| 5731 | "src/f32-vbinary/gen/vmax-avx-x16.c", |
| 5732 | "src/f32-vbinary/gen/vmaxc-avx-x8.c", |
| 5733 | "src/f32-vbinary/gen/vmaxc-avx-x16.c", |
| 5734 | "src/f32-vbinary/gen/vmin-avx-x8.c", |
| 5735 | "src/f32-vbinary/gen/vmin-avx-x16.c", |
| 5736 | "src/f32-vbinary/gen/vminc-avx-x8.c", |
| 5737 | "src/f32-vbinary/gen/vminc-avx-x16.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5738 | "src/f32-vbinary/gen/vmul-minmax-avx-x8.c", |
| 5739 | "src/f32-vbinary/gen/vmul-minmax-avx-x16.c", |
| 5740 | "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c", |
| 5741 | "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c", |
| 5742 | "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c", |
| 5743 | "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c", |
| 5744 | "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c", |
| 5745 | "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 5746 | "src/f32-vbinary/gen/vsqrdiff-avx-x8.c", |
| 5747 | "src/f32-vbinary/gen/vsqrdiff-avx-x16.c", |
| 5748 | "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c", |
| 5749 | "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 5750 | "src/f32-vbinary/gen/vsub-minmax-avx-x8.c", |
| 5751 | "src/f32-vbinary/gen/vsub-minmax-avx-x16.c", |
| 5752 | "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c", |
| 5753 | "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5754 | "src/f32-vclamp/gen/vclamp-avx-x8.c", |
| 5755 | "src/f32-vclamp/gen/vclamp-avx-x16.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 5756 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c", |
| 5757 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c", |
| 5758 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c", |
| 5759 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c", |
| 5760 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c", |
| 5761 | "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c", |
| 5762 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c", |
| 5763 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c", |
| 5764 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c", |
| 5765 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c", |
| 5766 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c", |
| 5767 | "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c", |
| 5768 | "src/f32-velu/gen/velu-avx-rr2-p6-x8.c", |
| 5769 | "src/f32-velu/gen/velu-avx-rr2-p6-x16.c", |
| 5770 | "src/f32-velu/gen/velu-avx-rr2-p6-x24.c", |
| 5771 | "src/f32-velu/gen/velu-avx-rr2-p6-x32.c", |
| 5772 | "src/f32-velu/gen/velu-avx-rr2-p6-x40.c", |
| 5773 | "src/f32-velu/gen/velu-avx-rr2-p6-x48.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5774 | "src/f32-vhswish/gen/vhswish-avx-x8.c", |
| 5775 | "src/f32-vhswish/gen/vhswish-avx-x16.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 5776 | "src/f32-vlrelu/gen/vlrelu-avx-x8.c", |
| 5777 | "src/f32-vlrelu/gen/vlrelu-avx-x16.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5778 | "src/f32-vrelu/gen/vrelu-avx-x8.c", |
| 5779 | "src/f32-vrelu/gen/vrelu-avx-x16.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 5780 | "src/f32-vrnd/gen/vrndd-avx-x8.c", |
| 5781 | "src/f32-vrnd/gen/vrndd-avx-x16.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5782 | "src/f32-vrnd/gen/vrndne-avx-x8.c", |
| 5783 | "src/f32-vrnd/gen/vrndne-avx-x16.c", |
| 5784 | "src/f32-vrnd/gen/vrndu-avx-x8.c", |
| 5785 | "src/f32-vrnd/gen/vrndu-avx-x16.c", |
| 5786 | "src/f32-vrnd/gen/vrndz-avx-x8.c", |
| 5787 | "src/f32-vrnd/gen/vrndz-avx-x16.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5788 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c", |
| 5789 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c", |
| 5790 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c", |
| 5791 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c", |
| 5792 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c", |
| 5793 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c", |
| 5794 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c", |
| 5795 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c", |
| 5796 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c", |
| 5797 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c", |
| 5798 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c", |
| 5799 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c", |
| 5800 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c", |
| 5801 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c", |
| 5802 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c", |
| 5803 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c", |
| 5804 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c", |
| 5805 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c", |
| 5806 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c", |
| 5807 | "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 5808 | "src/f32-vsqrt/gen/avx-sqrt-x8.c", |
| 5809 | "src/f32-vsqrt/gen/avx-sqrt-x16.c", |
| 5810 | "src/f32-vunary/gen/vabs-avx-x8.c", |
| 5811 | "src/f32-vunary/gen/vabs-avx-x16.c", |
| 5812 | "src/f32-vunary/gen/vneg-avx-x8.c", |
| 5813 | "src/f32-vunary/gen/vneg-avx-x16.c", |
| 5814 | "src/f32-vunary/gen/vsqr-avx-x8.c", |
| 5815 | "src/f32-vunary/gen/vsqr-avx-x16.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5816 | "src/math/exp-avx-rr2-p5.c", |
| 5817 | "src/math/expm1minus-avx-rr2-lut4-p4-perm.c", |
| 5818 | "src/math/expm1minus-avx-rr2-lut16-p3.c", |
| 5819 | "src/math/expm1minus-avx-rr2-p6.c", |
| 5820 | "src/math/sigmoid-avx-rr2-lut64-p2-div.c", |
| 5821 | "src/math/sigmoid-avx-rr2-p5-div.c", |
| 5822 | "src/math/sigmoid-avx-rr2-p5-nr1.c", |
| 5823 | "src/math/sigmoid-avx-rr2-p5-nr2.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 5824 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c", |
| 5825 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| 5826 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| 5827 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c", |
| 5828 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| 5829 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| 5830 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| 5831 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| 5832 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| 5833 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| 5834 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| 5835 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| 5836 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c", |
| 5837 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c", |
| 5838 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c", |
| 5839 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c", |
| 5840 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| 5841 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| 5842 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| 5843 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5844 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| 5845 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| 5846 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| 5847 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5848 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| 5849 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| 5850 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| 5851 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| 5852 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| 5853 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| 5854 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| 5855 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| 5856 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| 5857 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5858 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| 5859 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| 5860 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| 5861 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5862 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| 5863 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| 5864 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| 5865 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| 5866 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| 5867 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| 5868 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16-add16.c", |
| 5869 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| 5870 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| 5871 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16-add16.c", |
| 5872 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| 5873 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| 5874 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16-add16.c", |
| 5875 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| 5876 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| 5877 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16-add16.c", |
| 5878 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| 5879 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| 5880 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c", |
| 5881 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c", |
| 5882 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c", |
| 5883 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c", |
| 5884 | "src/qs8-f32-vcvt/gen/vcvt-avx-x8.c", |
| 5885 | "src/qs8-f32-vcvt/gen/vcvt-avx-x16.c", |
| 5886 | "src/qs8-f32-vcvt/gen/vcvt-avx-x24.c", |
| 5887 | "src/qs8-f32-vcvt/gen/vcvt-avx-x32.c", |
| 5888 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| 5889 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| 5890 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-avx.c", |
| 5891 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| 5892 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5893 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-avx.c", |
| 5894 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| 5895 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| 5896 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-avx.c", |
| 5897 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| 5898 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5899 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-avx.c", |
| 5900 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| 5901 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| 5902 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-avx.c", |
| 5903 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| 5904 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| 5905 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-avx.c", |
| 5906 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| 5907 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| 5908 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-avx.c", |
| 5909 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| 5910 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| 5911 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| 5912 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5913 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| 5914 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| 5915 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| 5916 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5917 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| 5918 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| 5919 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| 5920 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| 5921 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| 5922 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| 5923 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c", |
| 5924 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c", |
| 5925 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c", |
| 5926 | "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c", |
| 5927 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 5928 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c", |
| 5929 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c", |
| 5930 | "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c", |
| 5931 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c", |
| 5932 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c", |
| 5933 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c", |
| 5934 | "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c", |
| 5935 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| 5936 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c", |
| 5937 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c", |
| 5938 | "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c", |
| 5939 | "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 5940 | "src/qs8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5941 | "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 5942 | "src/qs8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5943 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c", |
| 5944 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c", |
| 5945 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c", |
| 5946 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c", |
| 5947 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c", |
| 5948 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c", |
| 5949 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c", |
| 5950 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c", |
| 5951 | "src/qu8-f32-vcvt/gen/vcvt-avx-x8.c", |
| 5952 | "src/qu8-f32-vcvt/gen/vcvt-avx-x16.c", |
| 5953 | "src/qu8-f32-vcvt/gen/vcvt-avx-x24.c", |
| 5954 | "src/qu8-f32-vcvt/gen/vcvt-avx-x32.c", |
| 5955 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| 5956 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| 5957 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| 5958 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5959 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| 5960 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| 5961 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| 5962 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5963 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| 5964 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| 5965 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| 5966 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| 5967 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| 5968 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| 5969 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c", |
| 5970 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c", |
| 5971 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c", |
| 5972 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c", |
| 5973 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c", |
| 5974 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c", |
| 5975 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c", |
| 5976 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c", |
| 5977 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c", |
| 5978 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c", |
| 5979 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c", |
| 5980 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c", |
| 5981 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c", |
| 5982 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c", |
| 5983 | "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x8.c", |
| 5984 | "src/qu8-vadd/gen/minmax-avx-mul16-ld64-x16.c", |
| 5985 | "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x8.c", |
| 5986 | "src/qu8-vadd/gen/minmax-avx-mul32-ld32-x16.c", |
| 5987 | "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x8.c", |
| 5988 | "src/qu8-vaddc/gen/minmax-avx-mul16-ld64-x16.c", |
| 5989 | "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x8.c", |
| 5990 | "src/qu8-vaddc/gen/minmax-avx-mul32-ld32-x16.c", |
| 5991 | "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 5992 | "src/qu8-vmul/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5993 | "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x8.c", |
| 5994 | "src/qu8-vmulc/gen/minmax-fp32-avx-mul16-ld64-x16.c", |
| 5995 | "src/x8-lut/gen/lut-avx-x16.c", |
| 5996 | "src/x8-lut/gen/lut-avx-x32.c", |
| 5997 | "src/x8-lut/gen/lut-avx-x48.c", |
| 5998 | "src/x8-lut/gen/lut-avx-x64.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 5999 | ] |
| 6000 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6001 | PROD_F16C_MICROKERNEL_SRCS = [ |
| 6002 | "src/f16-f32-vcvt/gen/vcvt-f16c-x16.c", |
| 6003 | "src/f16-gavgpool/gen/7p7x-minmax-f16c-c8.c", |
| 6004 | "src/f16-gavgpool/gen/7x-minmax-f16c-c8.c", |
| 6005 | "src/f16-maxpool/9p8x-minmax-f16c-c8.c", |
| 6006 | "src/f16-prelu/gen/f16c-2x16.c", |
| 6007 | "src/f16-vbinary/gen/vadd-minmax-f16c-x16.c", |
| 6008 | "src/f16-vbinary/gen/vaddc-minmax-f16c-x16.c", |
| 6009 | "src/f16-vbinary/gen/vmul-minmax-f16c-x16.c", |
| 6010 | "src/f16-vbinary/gen/vmulc-minmax-f16c-x16.c", |
| 6011 | "src/f16-vhswish/gen/vhswish-f16c-x16.c", |
| 6012 | "src/f32-f16-vcvt/gen/vcvt-f16c-x16.c", |
| 6013 | ] |
| 6014 | |
| 6015 | ALL_F16C_MICROKERNEL_SRCS = [ |
| 6016 | "src/f16-f32-vcvt/gen/vcvt-f16c-x8.c", |
| 6017 | "src/f16-f32-vcvt/gen/vcvt-f16c-x16.c", |
| 6018 | "src/f16-gavgpool/gen/7p7x-minmax-f16c-c8.c", |
| 6019 | "src/f16-gavgpool/gen/7p7x-minmax-f16c-c16.c", |
| 6020 | "src/f16-gavgpool/gen/7p7x-minmax-f16c-c24.c", |
| 6021 | "src/f16-gavgpool/gen/7p7x-minmax-f16c-c32.c", |
| 6022 | "src/f16-gavgpool/gen/7x-minmax-f16c-c8.c", |
| 6023 | "src/f16-gavgpool/gen/7x-minmax-f16c-c16.c", |
| 6024 | "src/f16-gavgpool/gen/7x-minmax-f16c-c24.c", |
| 6025 | "src/f16-gavgpool/gen/7x-minmax-f16c-c32.c", |
| 6026 | "src/f16-maxpool/9p8x-minmax-f16c-c8.c", |
| 6027 | "src/f16-prelu/gen/f16c-2x8.c", |
| 6028 | "src/f16-prelu/gen/f16c-2x16.c", |
| 6029 | "src/f16-vbinary/gen/vadd-minmax-f16c-x8.c", |
| 6030 | "src/f16-vbinary/gen/vadd-minmax-f16c-x16.c", |
| 6031 | "src/f16-vbinary/gen/vaddc-minmax-f16c-x8.c", |
| 6032 | "src/f16-vbinary/gen/vaddc-minmax-f16c-x16.c", |
| 6033 | "src/f16-vbinary/gen/vdiv-minmax-f16c-x8.c", |
| 6034 | "src/f16-vbinary/gen/vdiv-minmax-f16c-x16.c", |
| 6035 | "src/f16-vbinary/gen/vdivc-minmax-f16c-x8.c", |
| 6036 | "src/f16-vbinary/gen/vdivc-minmax-f16c-x16.c", |
| 6037 | "src/f16-vbinary/gen/vmax-f16c-x8.c", |
| 6038 | "src/f16-vbinary/gen/vmax-f16c-x16.c", |
| 6039 | "src/f16-vbinary/gen/vmaxc-f16c-x8.c", |
| 6040 | "src/f16-vbinary/gen/vmaxc-f16c-x16.c", |
| 6041 | "src/f16-vbinary/gen/vmin-f16c-x8.c", |
| 6042 | "src/f16-vbinary/gen/vmin-f16c-x16.c", |
| 6043 | "src/f16-vbinary/gen/vminc-f16c-x8.c", |
| 6044 | "src/f16-vbinary/gen/vminc-f16c-x16.c", |
| 6045 | "src/f16-vbinary/gen/vmul-minmax-f16c-x8.c", |
| 6046 | "src/f16-vbinary/gen/vmul-minmax-f16c-x16.c", |
| 6047 | "src/f16-vbinary/gen/vmulc-minmax-f16c-x8.c", |
| 6048 | "src/f16-vbinary/gen/vmulc-minmax-f16c-x16.c", |
| 6049 | "src/f16-vbinary/gen/vrdivc-minmax-f16c-x8.c", |
| 6050 | "src/f16-vbinary/gen/vrdivc-minmax-f16c-x16.c", |
| 6051 | "src/f16-vbinary/gen/vrsubc-minmax-f16c-x8.c", |
| 6052 | "src/f16-vbinary/gen/vrsubc-minmax-f16c-x16.c", |
| 6053 | "src/f16-vbinary/gen/vsub-minmax-f16c-x8.c", |
| 6054 | "src/f16-vbinary/gen/vsub-minmax-f16c-x16.c", |
| 6055 | "src/f16-vbinary/gen/vsubc-minmax-f16c-x8.c", |
| 6056 | "src/f16-vbinary/gen/vsubc-minmax-f16c-x16.c", |
| 6057 | "src/f16-vclamp/gen/vclamp-f16c-x8.c", |
| 6058 | "src/f16-vclamp/gen/vclamp-f16c-x16.c", |
| 6059 | "src/f16-vhswish/gen/vhswish-f16c-x8.c", |
| 6060 | "src/f16-vhswish/gen/vhswish-f16c-x16.c", |
| 6061 | "src/f32-f16-vcvt/gen/vcvt-f16c-x8.c", |
| 6062 | "src/f32-f16-vcvt/gen/vcvt-f16c-x16.c", |
| 6063 | "src/math/cvt-f16-f32-f16c.c", |
| 6064 | "src/math/cvt-f32-f16-f16c.c", |
| 6065 | ] |
| 6066 | |
| 6067 | PROD_XOP_MICROKERNEL_SRCS = [ |
| 6068 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| 6069 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| 6070 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6071 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6072 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6073 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6074 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| 6075 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| 6076 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6077 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6078 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6079 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6080 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 6081 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 6082 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| 6083 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| 6084 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6085 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6086 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6087 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6088 | "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 6089 | "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 6090 | ] |
| 6091 | |
| 6092 | ALL_XOP_MICROKERNEL_SRCS = [ |
| 6093 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c", |
| 6094 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| 6095 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c", |
| 6096 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| 6097 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| 6098 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| 6099 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| 6100 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| 6101 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c", |
| 6102 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c", |
| 6103 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| 6104 | "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| 6105 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6106 | "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| 6107 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| 6108 | "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| 6109 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6110 | "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| 6111 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| 6112 | "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| 6113 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| 6114 | "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| 6115 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| 6116 | "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| 6117 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| 6118 | "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| 6119 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6120 | "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| 6121 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| 6122 | "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| 6123 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6124 | "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| 6125 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| 6126 | "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| 6127 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| 6128 | "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| 6129 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| 6130 | "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| 6131 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul16-add16.c", |
| 6132 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| 6133 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul16-add16.c", |
| 6134 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| 6135 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul16-add16.c", |
| 6136 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| 6137 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul16-add16.c", |
| 6138 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| 6139 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c", |
| 6140 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c", |
| 6141 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| 6142 | "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| 6143 | "src/qs8-gemm/gen/1x4c2-xw-minmax-fp32-xop.c", |
| 6144 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6145 | "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| 6146 | "src/qs8-gemm/gen/1x4c8-xw-minmax-fp32-xop.c", |
| 6147 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| 6148 | "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| 6149 | "src/qs8-gemm/gen/2x4c2-xw-minmax-fp32-xop.c", |
| 6150 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6151 | "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| 6152 | "src/qs8-gemm/gen/2x4c8-xw-minmax-fp32-xop.c", |
| 6153 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| 6154 | "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| 6155 | "src/qs8-gemm/gen/3x4c2-xw-minmax-fp32-xop.c", |
| 6156 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| 6157 | "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| 6158 | "src/qs8-gemm/gen/3x4c8-xw-minmax-fp32-xop.c", |
| 6159 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| 6160 | "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| 6161 | "src/qs8-gemm/gen/4x4c2-xw-minmax-fp32-xop.c", |
| 6162 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| 6163 | "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| 6164 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6165 | "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| 6166 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| 6167 | "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| 6168 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6169 | "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| 6170 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| 6171 | "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| 6172 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| 6173 | "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| 6174 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| 6175 | "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6176 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 6177 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c", |
| 6178 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c", |
| 6179 | "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c", |
| 6180 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 6181 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c", |
| 6182 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c", |
| 6183 | "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6184 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c", |
| 6185 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c", |
| 6186 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c", |
| 6187 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c", |
| 6188 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| 6189 | "src/qu8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| 6190 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6191 | "src/qu8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| 6192 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| 6193 | "src/qu8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| 6194 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6195 | "src/qu8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| 6196 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| 6197 | "src/qu8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| 6198 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| 6199 | "src/qu8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| 6200 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| 6201 | "src/qu8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| 6202 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c", |
| 6203 | "src/qu8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c", |
| 6204 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c", |
| 6205 | "src/qu8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c", |
| 6206 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c", |
| 6207 | "src/qu8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c", |
| 6208 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c", |
| 6209 | "src/qu8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c", |
| 6210 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c", |
| 6211 | "src/qu8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c", |
| 6212 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c", |
| 6213 | "src/qu8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c", |
| 6214 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c", |
| 6215 | "src/qu8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c", |
| 6216 | "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x8.c", |
| 6217 | "src/qu8-vadd/gen/minmax-xop-mul32-ld32-x16.c", |
| 6218 | "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x8.c", |
| 6219 | "src/qu8-vaddc/gen/minmax-xop-mul32-ld32-x16.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6220 | ] |
| 6221 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6222 | PROD_FMA3_MICROKERNEL_SRCS = [ |
| 6223 | "src/f16-dwconv/gen/up8x25-minmax-fma3-acc2.c", |
| 6224 | "src/f16-dwconv/gen/up16x4-minmax-fma3.c", |
| 6225 | "src/f16-dwconv/gen/up16x9-minmax-fma3.c", |
| 6226 | "src/f16-vmulcaddc/gen/c8-minmax-fma3-2x.c", |
| 6227 | "src/f32-dwconv/gen/up8x25-minmax-fma3.c", |
| 6228 | "src/f32-dwconv/gen/up16x3-minmax-fma3.c", |
| 6229 | "src/f32-dwconv/gen/up16x4-minmax-fma3.c", |
| 6230 | "src/f32-dwconv/gen/up16x9-minmax-fma3.c", |
| 6231 | "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c", |
| 6232 | "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 6233 | "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| 6234 | "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c", |
| 6235 | "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c", |
| 6236 | "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 6237 | "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| 6238 | "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c", |
| 6239 | "src/f32-vhswish/gen/vhswish-fma3-x16.c", |
| 6240 | ] |
| 6241 | |
| 6242 | ALL_FMA3_MICROKERNEL_SRCS = [ |
| 6243 | "src/f16-dwconv/gen/up8x4-minmax-fma3-acc2.c", |
| 6244 | "src/f16-dwconv/gen/up8x4-minmax-fma3.c", |
| 6245 | "src/f16-dwconv/gen/up8x9-minmax-fma3-acc2.c", |
| 6246 | "src/f16-dwconv/gen/up8x9-minmax-fma3.c", |
| 6247 | "src/f16-dwconv/gen/up8x25-minmax-fma3-acc2.c", |
| 6248 | "src/f16-dwconv/gen/up8x25-minmax-fma3.c", |
| 6249 | "src/f16-dwconv/gen/up16x4-minmax-fma3-acc2.c", |
| 6250 | "src/f16-dwconv/gen/up16x4-minmax-fma3.c", |
| 6251 | "src/f16-dwconv/gen/up16x9-minmax-fma3-acc2.c", |
| 6252 | "src/f16-dwconv/gen/up16x9-minmax-fma3.c", |
| 6253 | "src/f16-dwconv/gen/up16x25-minmax-fma3-acc2.c", |
| 6254 | "src/f16-dwconv/gen/up16x25-minmax-fma3.c", |
| 6255 | "src/f16-dwconv/gen/up32x4-minmax-fma3-acc2.c", |
| 6256 | "src/f16-dwconv/gen/up32x4-minmax-fma3.c", |
| 6257 | "src/f16-dwconv/gen/up32x9-minmax-fma3-acc2.c", |
| 6258 | "src/f16-dwconv/gen/up32x9-minmax-fma3.c", |
| 6259 | "src/f16-dwconv/gen/up32x25-minmax-fma3-acc2.c", |
| 6260 | "src/f16-dwconv/gen/up32x25-minmax-fma3.c", |
| 6261 | "src/f16-vmulcaddc/gen/c8-minmax-fma3-2x.c", |
| 6262 | "src/f16-vmulcaddc/gen/c16-minmax-fma3-2x.c", |
| 6263 | "src/f32-dwconv/gen/up8x3-minmax-fma3-acc2.c", |
| 6264 | "src/f32-dwconv/gen/up8x3-minmax-fma3.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6265 | "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c", |
| 6266 | "src/f32-dwconv/gen/up8x4-minmax-fma3.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6267 | "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c", |
| 6268 | "src/f32-dwconv/gen/up8x9-minmax-fma3.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6269 | "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c", |
| 6270 | "src/f32-dwconv/gen/up8x25-minmax-fma3.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6271 | "src/f32-dwconv/gen/up16x3-minmax-fma3-acc2.c", |
| 6272 | "src/f32-dwconv/gen/up16x3-minmax-fma3.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6273 | "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c", |
| 6274 | "src/f32-dwconv/gen/up16x4-minmax-fma3.c", |
| 6275 | "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c", |
| 6276 | "src/f32-dwconv/gen/up16x9-minmax-fma3.c", |
| 6277 | "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c", |
| 6278 | "src/f32-dwconv/gen/up16x25-minmax-fma3.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6279 | "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6280 | "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c", |
| 6281 | "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c", |
| 6282 | "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c", |
| 6283 | "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6284 | "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6285 | "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c", |
| 6286 | "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6287 | "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6288 | "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c", |
| 6289 | "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6290 | "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c", |
| 6291 | "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c", |
| 6292 | "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6293 | "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c", |
| 6294 | "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c", |
| 6295 | "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 6296 | "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c", |
| 6297 | "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c", |
| 6298 | "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c", |
| 6299 | "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c", |
| 6300 | "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| 6301 | "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c", |
| 6302 | "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c", |
| 6303 | "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c", |
| 6304 | "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c", |
| 6305 | "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c", |
| 6306 | "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6307 | "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6308 | "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c", |
| 6309 | "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c", |
| 6310 | "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c", |
| 6311 | "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6312 | "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6313 | "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c", |
| 6314 | "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6315 | "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6316 | "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c", |
| 6317 | "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6318 | "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c", |
| 6319 | "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c", |
| 6320 | "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6321 | "src/f32-vhswish/gen/vhswish-fma3-x8.c", |
| 6322 | "src/f32-vhswish/gen/vhswish-fma3-x16.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 6323 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c", |
| 6324 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c", |
| 6325 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c", |
| 6326 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c", |
| 6327 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c", |
| 6328 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c", |
| 6329 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c", |
| 6330 | "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c", |
| 6331 | "src/math/sqrt-fma3-nr1fma.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 6332 | "src/math/sqrt-fma3-nr1fma1adj.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6333 | "src/math/sqrt-fma3-nr2fma.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6334 | ] |
| 6335 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6336 | PROD_AVX2_MICROKERNEL_SRCS = [ |
| 6337 | "src/f16-gemm/gen/1x16-minmax-avx2-broadcast.c", |
| 6338 | "src/f16-gemm/gen/4x16-minmax-avx2-broadcast.c", |
| 6339 | "src/f16-igemm/gen/1x16-minmax-avx2-broadcast.c", |
| 6340 | "src/f16-igemm/gen/4x16-minmax-avx2-broadcast.c", |
| 6341 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x64.c", |
| 6342 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x64.c", |
| 6343 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c", |
| 6344 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c", |
| 6345 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6346 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 6347 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6348 | "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6349 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6350 | "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6351 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6352 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 6353 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| 6354 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6355 | "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6356 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6357 | "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6358 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6359 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6360 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6361 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 6362 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| 6363 | "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6364 | "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6365 | "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6366 | "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6367 | "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6368 | "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6369 | "src/x8-lut/gen/lut-avx2-x128.c", |
| 6370 | ] |
| 6371 | |
| 6372 | ALL_AVX2_MICROKERNEL_SRCS = [ |
| 6373 | "src/f16-gemm/gen/1x8-minmax-avx2-broadcast.c", |
| 6374 | "src/f16-gemm/gen/1x16-minmax-avx2-broadcast.c", |
| 6375 | "src/f16-gemm/gen/3x16-minmax-avx2-broadcast.c", |
| 6376 | "src/f16-gemm/gen/4x8-minmax-avx2-broadcast.c", |
| 6377 | "src/f16-gemm/gen/4x16-minmax-avx2-broadcast.c", |
| 6378 | "src/f16-gemm/gen/5x8-minmax-avx2-broadcast.c", |
| 6379 | "src/f16-gemm/gen/5x16-minmax-avx2-broadcast.c", |
| 6380 | "src/f16-gemm/gen/6x8-minmax-avx2-broadcast.c", |
| 6381 | "src/f16-gemm/gen/7x8-minmax-avx2-broadcast.c", |
| 6382 | "src/f16-igemm/gen/1x8-minmax-avx2-broadcast.c", |
| 6383 | "src/f16-igemm/gen/1x16-minmax-avx2-broadcast.c", |
| 6384 | "src/f16-igemm/gen/3x16-minmax-avx2-broadcast.c", |
| 6385 | "src/f16-igemm/gen/4x8-minmax-avx2-broadcast.c", |
| 6386 | "src/f16-igemm/gen/4x16-minmax-avx2-broadcast.c", |
| 6387 | "src/f16-igemm/gen/5x8-minmax-avx2-broadcast.c", |
| 6388 | "src/f16-igemm/gen/5x16-minmax-avx2-broadcast.c", |
| 6389 | "src/f16-igemm/gen/6x8-minmax-avx2-broadcast.c", |
| 6390 | "src/f16-igemm/gen/7x8-minmax-avx2-broadcast.c", |
| 6391 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x16.c", |
| 6392 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x32.c", |
| 6393 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x48.c", |
| 6394 | "src/f32-qs8-vcvt/gen/vcvt-avx2-x64.c", |
| 6395 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x16.c", |
| 6396 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x32.c", |
| 6397 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x48.c", |
| 6398 | "src/f32-qu8-vcvt/gen/vcvt-avx2-x64.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6399 | "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c", |
| 6400 | "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6401 | "src/f32-raddexpminusmax/gen/avx2-p5-x64.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6402 | "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6403 | "src/f32-raddexpminusmax/gen/avx2-p5-x72.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6404 | "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c", |
| 6405 | "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6406 | "src/f32-raddexpminusmax/gen/avx2-p5-x80.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6407 | "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c", |
| 6408 | "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c", |
| 6409 | "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6410 | "src/f32-raddexpminusmax/gen/avx2-p5-x96.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6411 | "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c", |
| 6412 | "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6413 | "src/f32-raddextexp/gen/avx2-p5-x64.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6414 | "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6415 | "src/f32-raddextexp/gen/avx2-p5-x72.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6416 | "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c", |
| 6417 | "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6418 | "src/f32-raddextexp/gen/avx2-p5-x80.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6419 | "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c", |
| 6420 | "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c", |
| 6421 | "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6422 | "src/f32-raddextexp/gen/avx2-p5-x96.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6423 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x64-acc2.c", |
| 6424 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x64-acc4.c", |
| 6425 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x64.c", |
| 6426 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x72-acc3.c", |
| 6427 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x72.c", |
| 6428 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x80-acc2.c", |
| 6429 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x80-acc5.c", |
| 6430 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x80.c", |
| 6431 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96-acc2.c", |
| 6432 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96-acc3.c", |
| 6433 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96-acc6.c", |
| 6434 | "src/f32-raddstoreexpminusmax/gen/avx2-rr1-p5-x96.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 6435 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c", |
| 6436 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c", |
| 6437 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c", |
| 6438 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c", |
| 6439 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c", |
| 6440 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c", |
| 6441 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c", |
| 6442 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c", |
| 6443 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c", |
| 6444 | "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c", |
| 6445 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c", |
| 6446 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c", |
| 6447 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c", |
| 6448 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c", |
| 6449 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c", |
| 6450 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c", |
| 6451 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c", |
| 6452 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c", |
| 6453 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c", |
| 6454 | "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c", |
| 6455 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c", |
| 6456 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c", |
| 6457 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c", |
| 6458 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c", |
| 6459 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c", |
| 6460 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c", |
| 6461 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c", |
| 6462 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c", |
| 6463 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c", |
| 6464 | "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c", |
| 6465 | "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c", |
| 6466 | "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c", |
| 6467 | "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c", |
| 6468 | "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c", |
| 6469 | "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c", |
| 6470 | "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c", |
| 6471 | "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c", |
| 6472 | "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c", |
| 6473 | "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c", |
| 6474 | "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6475 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c", |
| 6476 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c", |
| 6477 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c", |
| 6478 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c", |
| 6479 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c", |
| 6480 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c", |
| 6481 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c", |
| 6482 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c", |
| 6483 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c", |
| 6484 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c", |
| 6485 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c", |
| 6486 | "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c", |
| 6487 | "src/f32-vscaleextexp/gen/avx2-p5-x8.c", |
| 6488 | "src/f32-vscaleextexp/gen/avx2-p5-x16.c", |
| 6489 | "src/f32-vscaleextexp/gen/avx2-p5-x24.c", |
| 6490 | "src/f32-vscaleextexp/gen/avx2-p5-x32.c", |
| 6491 | "src/f32-vscaleextexp/gen/avx2-p5-x40.c", |
| 6492 | "src/f32-vscaleextexp/gen/avx2-p5-x48.c", |
| 6493 | "src/f32-vscaleextexp/gen/avx2-p5-x56.c", |
| 6494 | "src/f32-vscaleextexp/gen/avx2-p5-x64.c", |
| 6495 | "src/f32-vscaleextexp/gen/avx2-p5-x72.c", |
| 6496 | "src/f32-vscaleextexp/gen/avx2-p5-x80.c", |
| 6497 | "src/f32-vscaleextexp/gen/avx2-p5-x88.c", |
| 6498 | "src/f32-vscaleextexp/gen/avx2-p5-x96.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6499 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c", |
| 6500 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c", |
| 6501 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c", |
| 6502 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c", |
| 6503 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c", |
| 6504 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c", |
| 6505 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c", |
| 6506 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c", |
| 6507 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c", |
| 6508 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c", |
| 6509 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c", |
| 6510 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c", |
| 6511 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c", |
| 6512 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c", |
| 6513 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c", |
| 6514 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c", |
| 6515 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c", |
| 6516 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c", |
| 6517 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c", |
| 6518 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c", |
| 6519 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c", |
| 6520 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c", |
| 6521 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c", |
| 6522 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c", |
| 6523 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c", |
| 6524 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c", |
| 6525 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c", |
| 6526 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c", |
| 6527 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c", |
| 6528 | "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6529 | "src/math/exp-avx2-rr2-lut8-p3-perm.c", |
| 6530 | "src/math/exp-avx2-rr2-lut8-p4-perm.c", |
| 6531 | "src/math/exp-avx2-rr2-p5.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6532 | "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c", |
| 6533 | "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c", |
| 6534 | "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c", |
| 6535 | "src/math/expm1minus-avx2-rr1-p6.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6536 | "src/math/expminus-avx2-rr1-p5.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 6537 | "src/math/expminus-avx2-rr2-p5.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6538 | "src/math/extexp-avx2-p5.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6539 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c", |
| 6540 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c", |
| 6541 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c", |
| 6542 | "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6543 | "src/math/sigmoid-avx2-rr1-p5-div.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6544 | "src/math/sigmoid-avx2-rr1-p5-nr1fma.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6545 | "src/math/sigmoid-avx2-rr1-p5-nr2fma.c", |
| 6546 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c", |
| 6547 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c", |
| 6548 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c", |
| 6549 | "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c", |
| 6550 | "src/math/sigmoid-avx2-rr2-p5-div.c", |
| 6551 | "src/math/sigmoid-avx2-rr2-p5-nr1fma.c", |
| 6552 | "src/math/sigmoid-avx2-rr2-p5-nr2fma.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6553 | "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| 6554 | "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| 6555 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| 6556 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6557 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| 6558 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6559 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| 6560 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6561 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| 6562 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 6563 | "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c", |
| 6564 | "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c", |
| 6565 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| 6566 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6567 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| 6568 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| 6569 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| 6570 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6571 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| 6572 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| 6573 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6574 | "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c", |
| 6575 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6576 | "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c", |
| 6577 | "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6578 | "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c", |
| 6579 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6580 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6581 | "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6582 | "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| 6583 | "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| 6584 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| 6585 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6586 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| 6587 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6588 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| 6589 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6590 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| 6591 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 6592 | "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c", |
| 6593 | "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c", |
| 6594 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| 6595 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6596 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16-vpunpck.c", |
| 6597 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| 6598 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-add16-vpunpck.c", |
| 6599 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpmovsx.c", |
| 6600 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16-vpunpck.c", |
| 6601 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| 6602 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x8.c", |
| 6603 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| 6604 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x24.c", |
| 6605 | "src/qs8-f32-vcvt/gen/vcvt-avx2-x32.c", |
| 6606 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6607 | "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c", |
| 6608 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6609 | "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c", |
| 6610 | "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6611 | "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c", |
| 6612 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6613 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6614 | "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6615 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c", |
| 6616 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6617 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c", |
| 6618 | "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c", |
| 6619 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c", |
| 6620 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6621 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c", |
| 6622 | "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6623 | "src/qu8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c", |
| 6624 | "src/qu8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c", |
| 6625 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c", |
| 6626 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c", |
| 6627 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c", |
| 6628 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c", |
| 6629 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x8.c", |
| 6630 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x16.c", |
| 6631 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x24.c", |
| 6632 | "src/qu8-f32-vcvt/gen/vcvt-avx2-x32.c", |
| 6633 | "src/qu8-gemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6634 | "src/qu8-gemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6635 | "src/qu8-gemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6636 | "src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c", |
| 6637 | "src/qu8-igemm/gen/2x8c8-minmax-fp32-avx2.c", |
| 6638 | "src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c", |
| 6639 | "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x8.c", |
| 6640 | "src/qu8-vadd/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6641 | "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c", |
| 6642 | "src/qu8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c", |
| 6643 | "src/x8-lut/gen/lut-avx2-x32.c", |
| 6644 | "src/x8-lut/gen/lut-avx2-x64.c", |
| 6645 | "src/x8-lut/gen/lut-avx2-x96.c", |
| 6646 | "src/x8-lut/gen/lut-avx2-x128.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6647 | ] |
| 6648 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6649 | PROD_AVX512F_MICROKERNEL_SRCS = [ |
| 6650 | "src/f32-dwconv/gen/up16x3-minmax-avx512f.c", |
| 6651 | "src/f32-dwconv/gen/up16x4-minmax-avx512f.c", |
| 6652 | "src/f32-dwconv/gen/up16x9-minmax-avx512f.c", |
| 6653 | "src/f32-dwconv/gen/up16x25-minmax-avx512f.c", |
| 6654 | "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 6655 | "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 6656 | "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 6657 | "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 6658 | "src/f32-prelu/gen/avx512f-2x16.c", |
| 6659 | "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c", |
| 6660 | "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c", |
| 6661 | "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c", |
| 6662 | "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c", |
| 6663 | "src/f32-vbinary/gen/vmax-avx512f-x32.c", |
| 6664 | "src/f32-vbinary/gen/vmaxc-avx512f-x32.c", |
| 6665 | "src/f32-vbinary/gen/vmin-avx512f-x32.c", |
| 6666 | "src/f32-vbinary/gen/vminc-avx512f-x32.c", |
| 6667 | "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c", |
| 6668 | "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c", |
| 6669 | "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c", |
| 6670 | "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c", |
| 6671 | "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c", |
| 6672 | "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c", |
| 6673 | "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c", |
| 6674 | "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c", |
| 6675 | "src/f32-vclamp/gen/vclamp-avx512f-x16.c", |
| 6676 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c", |
| 6677 | "src/f32-vhswish/gen/vhswish-avx512f-x16.c", |
| 6678 | "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c", |
| 6679 | "src/f32-vrnd/gen/vrndd-avx512f-x16.c", |
| 6680 | "src/f32-vrnd/gen/vrndne-avx512f-x16.c", |
| 6681 | "src/f32-vrnd/gen/vrndu-avx512f-x16.c", |
| 6682 | "src/f32-vrnd/gen/vrndz-avx512f-x16.c", |
| 6683 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c", |
| 6684 | "src/f32-vunary/gen/vabs-avx512f-x16.c", |
| 6685 | "src/f32-vunary/gen/vneg-avx512f-x16.c", |
| 6686 | "src/f32-vunary/gen/vsqr-avx512f-x16.c", |
| 6687 | ] |
| 6688 | |
| 6689 | ALL_AVX512F_MICROKERNEL_SRCS = [ |
| 6690 | "src/f32-dwconv/gen/up16x3-minmax-avx512f-acc2.c", |
| 6691 | "src/f32-dwconv/gen/up16x3-minmax-avx512f.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6692 | "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c", |
| 6693 | "src/f32-dwconv/gen/up16x4-minmax-avx512f.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6694 | "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c", |
| 6695 | "src/f32-dwconv/gen/up16x9-minmax-avx512f.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6696 | "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c", |
| 6697 | "src/f32-dwconv/gen/up16x25-minmax-avx512f.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6698 | "src/f32-dwconv/gen/up32x3-minmax-avx512f-acc2.c", |
| 6699 | "src/f32-dwconv/gen/up32x3-minmax-avx512f.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6700 | "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c", |
| 6701 | "src/f32-dwconv/gen/up32x4-minmax-avx512f.c", |
| 6702 | "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c", |
| 6703 | "src/f32-dwconv/gen/up32x9-minmax-avx512f.c", |
| 6704 | "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c", |
| 6705 | "src/f32-dwconv/gen/up32x25-minmax-avx512f.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6706 | "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c", |
| 6707 | "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c", |
| 6708 | "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c", |
| 6709 | "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c", |
| 6710 | "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c", |
| 6711 | "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6712 | "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 6713 | "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c", |
| 6714 | "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c", |
| 6715 | "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c", |
| 6716 | "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 6717 | "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6718 | "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c", |
| 6719 | "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c", |
| 6720 | "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c", |
| 6721 | "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c", |
| 6722 | "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c", |
| 6723 | "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c", |
| Miao Wang | 2534c2f | 2020-03-16 11:58:04 -0700 | [diff] [blame] | 6724 | "src/f32-prelu/gen/avx512f-2x16.c", |
| 6725 | "src/f32-prelu/gen/avx512f-2x32.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6726 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c", |
| 6727 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6728 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6729 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6730 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6731 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c", |
| 6732 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6733 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6734 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c", |
| 6735 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c", |
| 6736 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6737 | "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6738 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c", |
| 6739 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6740 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6741 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6742 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6743 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c", |
| 6744 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6745 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6746 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c", |
| 6747 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c", |
| 6748 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6749 | "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6750 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x128-acc2.c", |
| 6751 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x128-acc4.c", |
| 6752 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x128.c", |
| 6753 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x144-acc3.c", |
| 6754 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x144.c", |
| 6755 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x160-acc2.c", |
| 6756 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x160-acc5.c", |
| 6757 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x160.c", |
| 6758 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192-acc2.c", |
| 6759 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192-acc3.c", |
| 6760 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192-acc6.c", |
| 6761 | "src/f32-raddstoreexpminusmax/gen/avx512f-rr1-p5-scalef-x192.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6762 | "src/f32-rmax/avx512f.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6763 | "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c", |
| 6764 | "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c", |
| 6765 | "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c", |
| 6766 | "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c", |
| 6767 | "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c", |
| 6768 | "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c", |
| 6769 | "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c", |
| 6770 | "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6771 | "src/f32-vbinary/gen/vmax-avx512f-x16.c", |
| 6772 | "src/f32-vbinary/gen/vmax-avx512f-x32.c", |
| 6773 | "src/f32-vbinary/gen/vmaxc-avx512f-x16.c", |
| 6774 | "src/f32-vbinary/gen/vmaxc-avx512f-x32.c", |
| 6775 | "src/f32-vbinary/gen/vmin-avx512f-x16.c", |
| 6776 | "src/f32-vbinary/gen/vmin-avx512f-x32.c", |
| 6777 | "src/f32-vbinary/gen/vminc-avx512f-x16.c", |
| 6778 | "src/f32-vbinary/gen/vminc-avx512f-x32.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6779 | "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c", |
| 6780 | "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c", |
| 6781 | "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c", |
| 6782 | "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c", |
| 6783 | "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c", |
| 6784 | "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c", |
| 6785 | "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c", |
| 6786 | "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 6787 | "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c", |
| 6788 | "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c", |
| 6789 | "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c", |
| 6790 | "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 6791 | "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c", |
| 6792 | "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c", |
| 6793 | "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c", |
| 6794 | "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6795 | "src/f32-vclamp/gen/vclamp-avx512f-x16.c", |
| 6796 | "src/f32-vclamp/gen/vclamp-avx512f-x32.c", |
| Miao Wang | 55abe39 | 2021-02-03 14:54:41 -0800 | [diff] [blame] | 6797 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c", |
| 6798 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c", |
| 6799 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c", |
| 6800 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c", |
| 6801 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c", |
| 6802 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c", |
| 6803 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c", |
| 6804 | "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c", |
| 6805 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c", |
| 6806 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c", |
| 6807 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c", |
| 6808 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c", |
| 6809 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c", |
| 6810 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c", |
| 6811 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c", |
| 6812 | "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6813 | "src/f32-vhswish/gen/vhswish-avx512f-x16.c", |
| 6814 | "src/f32-vhswish/gen/vhswish-avx512f-x32.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 6815 | "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c", |
| 6816 | "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6817 | "src/f32-vrelu/gen/vrelu-avx512f-x16.c", |
| 6818 | "src/f32-vrelu/gen/vrelu-avx512f-x32.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6819 | "src/f32-vrnd/gen/vrndd-avx512f-x16.c", |
| 6820 | "src/f32-vrnd/gen/vrndd-avx512f-x32.c", |
| 6821 | "src/f32-vrnd/gen/vrndne-avx512f-x16.c", |
| 6822 | "src/f32-vrnd/gen/vrndne-avx512f-x32.c", |
| 6823 | "src/f32-vrnd/gen/vrndu-avx512f-x16.c", |
| 6824 | "src/f32-vrnd/gen/vrndu-avx512f-x32.c", |
| 6825 | "src/f32-vrnd/gen/vrndz-avx512f-x16.c", |
| 6826 | "src/f32-vrnd/gen/vrndz-avx512f-x32.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6827 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c", |
| 6828 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c", |
| 6829 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c", |
| 6830 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c", |
| 6831 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c", |
| 6832 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c", |
| 6833 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c", |
| 6834 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c", |
| 6835 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c", |
| 6836 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c", |
| 6837 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c", |
| 6838 | "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c", |
| 6839 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c", |
| 6840 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c", |
| 6841 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c", |
| 6842 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c", |
| 6843 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c", |
| 6844 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c", |
| 6845 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c", |
| 6846 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c", |
| 6847 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c", |
| 6848 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c", |
| 6849 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c", |
| 6850 | "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6851 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c", |
| 6852 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c", |
| 6853 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c", |
| 6854 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c", |
| 6855 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c", |
| 6856 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c", |
| 6857 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c", |
| 6858 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c", |
| 6859 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c", |
| 6860 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c", |
| 6861 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c", |
| 6862 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c", |
| 6863 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c", |
| 6864 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c", |
| 6865 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c", |
| 6866 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c", |
| 6867 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c", |
| 6868 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c", |
| 6869 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c", |
| 6870 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c", |
| 6871 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c", |
| 6872 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c", |
| 6873 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c", |
| 6874 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c", |
| 6875 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c", |
| 6876 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c", |
| 6877 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c", |
| 6878 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c", |
| 6879 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c", |
| 6880 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c", |
| 6881 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c", |
| 6882 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c", |
| 6883 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c", |
| 6884 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c", |
| 6885 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c", |
| 6886 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c", |
| 6887 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c", |
| 6888 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c", |
| 6889 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c", |
| 6890 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c", |
| 6891 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c", |
| 6892 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c", |
| 6893 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c", |
| 6894 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c", |
| 6895 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c", |
| 6896 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c", |
| 6897 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c", |
| 6898 | "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 6899 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c", |
| 6900 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c", |
| 6901 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c", |
| 6902 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c", |
| 6903 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c", |
| 6904 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c", |
| 6905 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c", |
| 6906 | "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c", |
| 6907 | "src/f32-vunary/gen/vabs-avx512f-x16.c", |
| 6908 | "src/f32-vunary/gen/vabs-avx512f-x32.c", |
| 6909 | "src/f32-vunary/gen/vneg-avx512f-x16.c", |
| 6910 | "src/f32-vunary/gen/vneg-avx512f-x32.c", |
| 6911 | "src/f32-vunary/gen/vsqr-avx512f-x16.c", |
| 6912 | "src/f32-vunary/gen/vsqr-avx512f-x32.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6913 | "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c", |
| 6914 | "src/math/exp-avx512f-rr2-lut16-p3-perm.c", |
| 6915 | "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c", |
| 6916 | "src/math/exp-avx512f-rr2-lut32-p2-perm2.c", |
| 6917 | "src/math/exp-avx512f-rr2-p5-scalef.c", |
| 6918 | "src/math/exp-avx512f-rr2-p5.c", |
| 6919 | "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c", |
| 6920 | "src/math/expm1minus-avx512f-rr1-p6.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6921 | "src/math/extexp-avx512f-p5.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6922 | "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c", |
| 6923 | "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c", |
| 6924 | "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c", |
| 6925 | "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c", |
| 6926 | "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c", |
| 6927 | "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c", |
| 6928 | "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c", |
| 6929 | "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c", |
| 6930 | "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c", |
| 6931 | "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c", |
| 6932 | "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c", |
| 6933 | "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c", |
| 6934 | "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c", |
| 6935 | "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c", |
| 6936 | "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c", |
| 6937 | "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c", |
| 6938 | "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c", |
| 6939 | "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c", |
| 6940 | "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c", |
| 6941 | "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c", |
| 6942 | "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c", |
| 6943 | "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c", |
| 6944 | "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c", |
| 6945 | "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 6946 | "src/math/sqrt-avx512f-nr1fma.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 6947 | "src/math/sqrt-avx512f-nr1fma1adj.c", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 6948 | "src/math/sqrt-avx512f-nr2fma.c", |
| 6949 | ] |
| 6950 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6951 | PROD_AVX512SKX_MICROKERNEL_SRCS = [ |
| 6952 | "src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| 6953 | "src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c", |
| 6954 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x128.c", |
| 6955 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x128.c", |
| 6956 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6957 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| 6958 | "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6959 | "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6960 | "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6961 | "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6962 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6963 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| 6964 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6965 | "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6966 | "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6967 | "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6968 | "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6969 | "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6970 | "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6971 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6972 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| 6973 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6974 | "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6975 | "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6976 | "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 6977 | "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 6978 | "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6979 | "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 6980 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 6981 | ] |
| 6982 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 6983 | ALL_AVX512SKX_MICROKERNEL_SRCS = [ |
| 6984 | "src/f16-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| 6985 | "src/f16-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6986 | "src/f32-f16-vcvt/gen/vcvt-avx512skx-x16.c", |
| 6987 | "src/f32-f16-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6988 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6989 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x64.c", |
| 6990 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x96.c", |
| 6991 | "src/f32-qs8-vcvt/gen/vcvt-avx512skx-x128.c", |
| 6992 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x32.c", |
| 6993 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x64.c", |
| 6994 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x96.c", |
| 6995 | "src/f32-qu8-vcvt/gen/vcvt-avx512skx-x128.c", |
| 6996 | "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| 6997 | "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| 6998 | "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 6999 | "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| 7000 | "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 7001 | "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 7002 | "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 7003 | "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 7004 | "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 7005 | "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 7006 | "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 7007 | "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 7008 | "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| 7009 | "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| 7010 | "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 7011 | "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| 7012 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| 7013 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| 7014 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x48.c", |
| 7015 | "src/qs8-f32-vcvt/gen/vcvt-avx512skx-x64.c", |
| 7016 | "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 7017 | "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 7018 | "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 7019 | "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 7020 | "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 7021 | "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 7022 | "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 7023 | "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 7024 | "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 7025 | "src/qs8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| 7026 | "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 7027 | "src/qs8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| 7028 | "src/qu8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c", |
| 7029 | "src/qu8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c", |
| 7030 | "src/qu8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c", |
| 7031 | "src/qu8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c", |
| 7032 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x16.c", |
| 7033 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x32.c", |
| 7034 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x48.c", |
| 7035 | "src/qu8-f32-vcvt/gen/vcvt-avx512skx-x64.c", |
| 7036 | "src/qu8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 7037 | "src/qu8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 7038 | "src/qu8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 7039 | "src/qu8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 7040 | "src/qu8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c", |
| 7041 | "src/qu8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c", |
| 7042 | "src/qu8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c", |
| 7043 | "src/qu8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c", |
| 7044 | "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 7045 | "src/qu8-vadd/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| 7046 | "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c", |
| 7047 | "src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x32.c", |
| 7048 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x64.c", |
| 7049 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x128.c", |
| 7050 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x192.c", |
| 7051 | "src/x8-lut/gen/lut-avx512skx-vpshufb-x256.c", |
| 7052 | ] |
| 7053 | |
| 7054 | WASM32_ASM_MICROKERNEL_SRCS = [ |
| 7055 | "src/f32-vrelu/wasm_shr_x1.S", |
| 7056 | "src/f32-vrelu/wasm_shr_x2.S", |
| 7057 | "src/f32-vrelu/wasm_shr_x4.S", |
| 7058 | ] |
| 7059 | |
| 7060 | AARCH32_ASM_MICROKERNEL_SRCS = [ |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 7061 | "src/f32-gemm/4x4-aarch32-vfp-ld64.S", |
| 7062 | "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7063 | "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S", |
| 7064 | "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 7065 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7066 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 7067 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7068 | "src/f32-gemm/gen/4x8-minmax-aarch32-neon-prfm-cortex-a75.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7069 | "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S", |
| 7070 | "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 7071 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S", |
| 7072 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S", |
| 7073 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7074 | "src/f32-igemm/gen/4x8-minmax-aarch32-neon-prfm-cortex-a75.S", |
| 7075 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neon-mlal-lane-cortex-a7.S", |
| 7076 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neon-mlal-lane-cortex-a53.S", |
| 7077 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neon-mlal-lane-ld64.S", |
| 7078 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neon-mlal-lane-prfm-cortex-a7.S", |
| 7079 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neon-mlal-lane-prfm-cortex-a53.S", |
| 7080 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neon-mlal-lane-prfm-ld64.S", |
| 7081 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-cortex-a53.S", |
| 7082 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-ld64.S", |
| 7083 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-prfm-cortex-a53.S", |
| 7084 | "src/qc8-gemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-prfm-ld64.S", |
| 7085 | "src/qc8-gemm/gen/4x8c4-minmax-fp32-aarch32-neondot-cortex-a55.S", |
| 7086 | "src/qc8-gemm/gen/4x8c4-minmax-fp32-aarch32-neondot-ld64.S", |
| 7087 | "src/qc8-igemm/gen/4x8-minmax-fp32-aarch32-neon-mlal-lane-ld64.S", |
| 7088 | "src/qc8-igemm/gen/4x8-minmax-fp32-aarch32-neon-mlal-lane-prfm-ld64.S", |
| 7089 | "src/qc8-igemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-ld64.S", |
| 7090 | "src/qc8-igemm/gen/4x8-minmax-fp32-aarch32-neonv8-mlal-lane-prfm-ld64.S", |
| 7091 | "src/qc8-igemm/gen/4x8c4-minmax-fp32-aarch32-neondot-cortex-a55.S", |
| 7092 | "src/qc8-igemm/gen/4x8c4-minmax-fp32-aarch32-neondot-ld64.S", |
| 7093 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-cortex-a7.S", |
| 7094 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-cortex-a53.S", |
| 7095 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S", |
| 7096 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-cortex-a7.S", |
| 7097 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-cortex-a53.S", |
| 7098 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S", |
| 7099 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-cortex-a55.S", |
| 7100 | "src/qs8-gemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-ld64.S", |
| 7101 | "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S", |
| 7102 | "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S", |
| 7103 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-cortex-a55.S", |
| 7104 | "src/qs8-igemm/gen/4x8c4-minmax-rndnu-aarch32-neondot-ld64.S", |
| 7105 | "src/qu8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-cortex-a7.S", |
| 7106 | "src/qu8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-cortex-a53.S", |
| 7107 | "src/qu8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S", |
| 7108 | "src/qu8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-cortex-a7.S", |
| 7109 | "src/qu8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-cortex-a53.S", |
| 7110 | "src/qu8-gemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S", |
| 7111 | "src/qu8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-ld64.S", |
| 7112 | "src/qu8-igemm/gen/4x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-ld64.S", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7113 | ] |
| 7114 | |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7115 | AARCH64_ASM_MICROKERNEL_SRCS = [ |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 7116 | "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7117 | "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 7118 | "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7119 | "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 7120 | "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7121 | "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a55.S", |
| 7122 | "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-cortex-a75.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7123 | "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 7124 | "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7125 | "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S", |
| 7126 | "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S", |
| 7127 | "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S", |
| 7128 | "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S", |
| 7129 | "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7130 | "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a55.S", |
| 7131 | "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-cortex-a75.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7132 | "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S", |
| 7133 | "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7134 | "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S", |
| 7135 | "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7136 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7137 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7138 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7139 | "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7140 | "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7141 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| 7142 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7143 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7144 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7145 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7146 | "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7147 | "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7148 | "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7149 | "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7150 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S", |
| 7151 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7152 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7153 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7154 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7155 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7156 | "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7157 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7158 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 7159 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7160 | "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7161 | "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S", |
| 7162 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 7163 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7164 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 7165 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S", |
| 7166 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7167 | "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7168 | "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7169 | "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7170 | "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7171 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 7172 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7173 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S", |
| 7174 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S", |
| 7175 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S", |
| 7176 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7177 | "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7178 | "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7179 | "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7180 | "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 7181 | "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7182 | "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S", |
| 7183 | "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S", |
| 7184 | "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S", |
| 7185 | "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7186 | "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7187 | "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7188 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7189 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S", |
| 7190 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S", |
| 7191 | "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7192 | "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7193 | "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7194 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7195 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S", |
| 7196 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S", |
| 7197 | "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S", |
| 7198 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7199 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7200 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7201 | "src/qc8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 7202 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 7203 | "src/qc8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 7204 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7205 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7206 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7207 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 7208 | "src/qc8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S", |
| 7209 | "src/qc8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| 7210 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| 7211 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| 7212 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| 7213 | "src/qc8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| 7214 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 7215 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 7216 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 7217 | "src/qc8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| 7218 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7219 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7220 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7221 | "src/qc8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 7222 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7223 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7224 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7225 | "src/qc8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 7226 | "src/qc8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| 7227 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| 7228 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| 7229 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| 7230 | "src/qc8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| 7231 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 7232 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 7233 | "src/qc8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| 7234 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7235 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7236 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7237 | "src/qs8-gemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 7238 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| 7239 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7240 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| 7241 | "src/qs8-gemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| 7242 | "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 7243 | "src/qs8-gemm/gen/1x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 7244 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld32.S", |
| 7245 | "src/qs8-gemm/gen/1x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| 7246 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7247 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7248 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7249 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 7250 | "src/qs8-gemm/gen/2x8c8-minmax-fp32-aarch64-neon-mull.S", |
| 7251 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| 7252 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7253 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| 7254 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| 7255 | "src/qs8-gemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mull.S", |
| 7256 | "src/qs8-gemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| 7257 | "src/qs8-gemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal.S", |
| 7258 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| 7259 | "src/qs8-gemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| 7260 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| 7261 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| 7262 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| 7263 | "src/qs8-gemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| 7264 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| 7265 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| 7266 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| 7267 | "src/qs8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| 7268 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 7269 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld32.S", |
| 7270 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 7271 | "src/qs8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| 7272 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| 7273 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld32.S", |
| 7274 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| 7275 | "src/qs8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| 7276 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7277 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7278 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7279 | "src/qs8-igemm/gen/1x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 7280 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| 7281 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7282 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| 7283 | "src/qs8-igemm/gen/1x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| 7284 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-cortex-a53.S", |
| 7285 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7286 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal-prfm.S", |
| 7287 | "src/qs8-igemm/gen/2x8c8-minmax-fp32-aarch64-neon-mlal.S", |
| 7288 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-cortex-a53.S", |
| 7289 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm-cortex-a53.S", |
| 7290 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal-prfm.S", |
| 7291 | "src/qs8-igemm/gen/2x8c8-minmax-rndnu-aarch64-neon-mlal.S", |
| 7292 | "src/qs8-igemm/gen/2x8c16-minmax-fp32-aarch64-neon-mlal.S", |
| 7293 | "src/qs8-igemm/gen/2x8c16-minmax-rndnu-aarch64-neon-mlal.S", |
| 7294 | "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| 7295 | "src/qs8-igemm/gen/4x8-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| 7296 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-cortex-a53.S", |
| 7297 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-ld64.S", |
| 7298 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| 7299 | "src/qs8-igemm/gen/4x16-minmax-fp32-aarch64-neon-mlal-lane-prfm-ld64.S", |
| 7300 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| 7301 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| 7302 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| 7303 | "src/qs8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| 7304 | "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 7305 | "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld64.S", |
| 7306 | "src/qs8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| 7307 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| 7308 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld64.S", |
| 7309 | "src/qs8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| 7310 | "src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| 7311 | "src/qu8-gemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| 7312 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| 7313 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S", |
| 7314 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| 7315 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| 7316 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S", |
| 7317 | "src/qu8-gemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| 7318 | "src/qu8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 7319 | "src/qu8-gemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| 7320 | "src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| 7321 | "src/qu8-gemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| 7322 | "src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| 7323 | "src/qu8-igemm/gen/4x8c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| 7324 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a53.S", |
| 7325 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-cortex-a75.S", |
| 7326 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S", |
| 7327 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a53.S", |
| 7328 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-cortex-a75.S", |
| 7329 | "src/qu8-igemm/gen/4x16-minmax-rndnu-aarch64-neon-mlal-lane-prfm-ld64.S", |
| 7330 | "src/qu8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S", |
| 7331 | "src/qu8-igemm/gen/4x16c4-minmax-fp32-aarch64-neondot-ld128.S", |
| 7332 | "src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S", |
| 7333 | "src/qu8-igemm/gen/4x16c4-minmax-rndnu-aarch64-neondot-ld128.S", |
| 7334 | ] |
| 7335 | |
| 7336 | JIT_AARCH32_SRCS = [ |
| 7337 | "src/f32-gemm/4x8-aarch32-neon-cortex-a7.cc", |
| 7338 | "src/f32-gemm/4x8-aarch32-neon-cortex-a53.cc", |
| 7339 | "src/f32-gemm/4x8-aarch32-neon-cortex-a55.cc", |
| 7340 | "src/f32-gemm/4x8-aarch32-neon-cortex-a75.cc", |
| 7341 | "src/f32-gemm/4x8-aarch32-neon-ld64.cc", |
| 7342 | "src/f32-igemm/4x8-aarch32-neon-cortex-a7.cc", |
| 7343 | "src/f32-igemm/4x8-aarch32-neon-cortex-a53.cc", |
| 7344 | "src/f32-igemm/4x8-aarch32-neon-cortex-a55.cc", |
| 7345 | "src/f32-igemm/4x8-aarch32-neon-cortex-a75.cc", |
| 7346 | "src/f32-igemm/4x8-aarch32-neon-ld64.cc", |
| 7347 | "src/qc8-gemm/4x8-fp32-aarch32-neonv8-mlal-lane-ld64.cc", |
| 7348 | "src/qc8-gemm/4x8c4-fp32-aarch32-neondot-ld64.cc", |
| 7349 | "src/qc8-igemm/4x8-fp32-aarch32-neonv8-mlal-lane-ld64.cc", |
| 7350 | "src/qc8-igemm/4x8c4-fp32-aarch32-neondot-ld64.cc", |
| 7351 | "src/qs8-gemm/4x8-rndnu-aarch32-neon-mlal-lane-ld64.cc", |
| 7352 | "src/qs8-gemm/4x8c4-rndnu-aarch32-neondot-ld64.cc", |
| 7353 | "src/qs8-igemm/4x8-rndnu-aarch32-neon-mlal-lane-ld64.cc", |
| 7354 | "src/qs8-igemm/4x8c4-rndnu-aarch32-neondot-ld64.cc", |
| 7355 | ] |
| 7356 | |
| 7357 | JIT_AARCH64_SRCS = [ |
| 7358 | "src/f32-gemm/1x8-aarch64-neonfma-cortex-a75.cc", |
| 7359 | "src/f32-gemm/6x8-aarch64-neonfma-cortex-a75.cc", |
| 7360 | "src/f32-igemm/1x8-aarch64-neonfma-cortex-a75.cc", |
| 7361 | "src/f32-igemm/6x8-aarch64-neonfma-cortex-a75.cc", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7362 | ] |
| 7363 | |
| 7364 | cc_defaults { |
| 7365 | name: "xnnpack_internal_default", |
| 7366 | vendor_available: true, |
| 7367 | sdk_version: "current", |
| 7368 | local_include_dirs: [ |
| 7369 | "include", |
| 7370 | "src", |
| 7371 | ], |
| 7372 | cflags: [ |
| 7373 | "-std=c99", |
| 7374 | "-DXNN_LOG_LEVEL=2", |
| 7375 | "-Wno-unused-parameter", |
| 7376 | "-Wno-missing-field-initializers", |
| 7377 | "-Wno-pointer-arith", |
| Miao Wang | ef75bc9 | 2020-07-25 09:15:12 -0700 | [diff] [blame] | 7378 | "-Wno-implicit-function-declaration", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7379 | "-Wno-ignored-qualifiers", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7380 | ], |
| 7381 | stl: "libc++_static", |
| 7382 | } |
| 7383 | |
| 7384 | cc_library_static { |
| 7385 | name: "xnnpack_tables", |
| 7386 | defaults: ["xnnpack_internal_default"], |
| 7387 | srcs: TABLE_SRCS, |
| 7388 | } |
| 7389 | |
| 7390 | cc_library_static { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 7391 | name: "xnnpack_logging_utils", |
| 7392 | defaults: ["xnnpack_internal_default"], |
| 7393 | srcs: LOGGING_SRCS, |
| 7394 | header_libs: [ |
| 7395 | "fp16_headers", |
| 7396 | ], |
| 7397 | static_libs: [ |
| 7398 | "libclog", |
| 7399 | "libpthreadpool", |
| 7400 | ], |
| 7401 | } |
| 7402 | |
| 7403 | cc_library_static { |
| 7404 | name: "xnnpack_memory_planner", |
| 7405 | defaults: ["xnnpack_internal_default"], |
| 7406 | srcs: [ |
| 7407 | "src/memory-planner.c", |
| 7408 | ], |
| 7409 | cflags: [ |
| 7410 | "-DXNN_ENABLE_MEMOPT=1", |
| 7411 | ], |
| 7412 | header_libs: [ |
| 7413 | "fp16_headers", |
| 7414 | ], |
| 7415 | static_libs: [ |
| 7416 | "libpthreadpool", |
| 7417 | "xnnpack_logging_utils", |
| 7418 | ], |
| 7419 | } |
| 7420 | |
| 7421 | cc_library_static { |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7422 | name: "xnnpack_im2col", |
| 7423 | defaults: ["xnnpack_internal_default"], |
| 7424 | srcs: [ |
| 7425 | "src/im2col.c", |
| 7426 | ], |
| 7427 | } |
| 7428 | |
| 7429 | cc_library_static { |
| 7430 | name: "xnnpack_indirection", |
| 7431 | defaults: ["xnnpack_internal_default"], |
| 7432 | srcs: [ |
| 7433 | "src/indirection.c", |
| 7434 | ], |
| 7435 | header_libs: [ |
| 7436 | "fp16_headers", |
| 7437 | "fxdiv_headers", |
| 7438 | ], |
| 7439 | static_libs: [ |
| 7440 | "libpthreadpool", |
| 7441 | ], |
| 7442 | } |
| 7443 | |
| 7444 | cc_library_static { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 7445 | name: "xnnpack_packing", |
| 7446 | defaults: ["xnnpack_internal_default"], |
| 7447 | srcs: [ |
| 7448 | "src/packing.c", |
| 7449 | ], |
| 7450 | header_libs: [ |
| 7451 | "fp16_headers", |
| 7452 | "fxdiv_headers", |
| 7453 | ], |
| 7454 | static_libs: [ |
| 7455 | "libpthreadpool", |
| 7456 | ], |
| 7457 | } |
| 7458 | |
| 7459 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7460 | name: "xnnpack_jit_memory", |
| 7461 | defaults: ["xnnpack_internal_default"], |
| 7462 | srcs: [ |
| 7463 | "src/jit/memory.c", |
| 7464 | ], |
| 7465 | static_libs: [ |
| 7466 | "libclog", |
| 7467 | "libpthreadpool", |
| 7468 | "xnnpack_logging_utils", |
| 7469 | ], |
| 7470 | } |
| 7471 | |
| 7472 | cc_library_static { |
| 7473 | name: "xnnpack_jit", |
| 7474 | defaults: ["xnnpack_internal_default"], |
| 7475 | srcs: [ |
| 7476 | "src/jit/aarch32-assembler.cc", |
| 7477 | "src/jit/aarch64-assembler.cc", |
| 7478 | "src/jit/assembler.cc", |
| 7479 | ], |
| 7480 | arch: { |
| 7481 | arm: { |
| 7482 | srcs: JIT_AARCH32_SRCS, |
| 7483 | }, |
| 7484 | arm64: { |
| 7485 | srcs: JIT_AARCH64_SRCS, |
| 7486 | }, |
| 7487 | }, |
| 7488 | static_libs: [ |
| 7489 | "libclog", |
| 7490 | "libpthreadpool", |
| 7491 | "xnnpack_jit_memory", |
| 7492 | "xnnpack_logging_utils", |
| 7493 | ], |
| 7494 | } |
| 7495 | |
| 7496 | cc_library_static { |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7497 | name: "xnnpack_operator_run", |
| 7498 | defaults: ["xnnpack_internal_default"], |
| 7499 | srcs: [ |
| 7500 | "src/operator-run.c", |
| 7501 | ], |
| 7502 | cflags: [ |
| 7503 | "-Wno-vla", |
| 7504 | ], |
| 7505 | header_libs: [ |
| 7506 | "fp16_headers", |
| 7507 | "fxdiv_headers", |
| 7508 | ], |
| 7509 | static_libs: [ |
| 7510 | "libclog", |
| 7511 | "libpthreadpool", |
| 7512 | ], |
| 7513 | } |
| 7514 | |
| 7515 | cc_library_static { |
| 7516 | name: "xnnpack_operators", |
| 7517 | defaults: ["xnnpack_internal_default"], |
| 7518 | srcs: OPERATOR_SRCS + [ |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7519 | "src/allocator.c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7520 | "src/operator-delete.c", |
| 7521 | ], |
| 7522 | header_libs: [ |
| 7523 | "fp16_headers", |
| 7524 | "fxdiv_headers", |
| 7525 | ], |
| 7526 | static_libs: [ |
| 7527 | "libclog", |
| 7528 | "libpthreadpool", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 7529 | "xnnpack_logging_utils", |
| 7530 | "xnnpack_packing", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7531 | "xnnpack_jit_memory", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7532 | ], |
| 7533 | whole_static_libs: [ |
| 7534 | "xnnpack_indirection", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7535 | "xnnpack_operator_run", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7536 | ], |
| 7537 | } |
| 7538 | |
| 7539 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7540 | name: "xnnpack_scalar_bench_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7541 | defaults: ["xnnpack_internal_default"], |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7542 | srcs: ALL_SCALAR_MICROKERNEL_SRCS, |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7543 | header_libs: [ |
| 7544 | "fp16_headers", |
| 7545 | "fxdiv_headers", |
| 7546 | ], |
| 7547 | static_libs: [ |
| 7548 | "libpthreadpool", |
| 7549 | "xnnpack_tables", |
| 7550 | ], |
| 7551 | } |
| 7552 | |
| 7553 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7554 | name: "xnnpack_scalar_prod_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7555 | defaults: ["xnnpack_internal_default"], |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7556 | srcs: PROD_SCALAR_PORTABLE_MICROKERNEL_SRCS, |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7557 | arch: { |
| 7558 | arm: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7559 | srcs: PROD_SCALAR_AARCH32_MICROKERNEL_SRCS, |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7560 | cflags: [ |
| 7561 | "-marm", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7562 | ], |
| 7563 | }, |
| 7564 | arm64: { |
| 7565 | srcs: PROD_SCALAR_AARCH32_MICROKERNEL_SRCS, |
| 7566 | }, |
| 7567 | }, |
| 7568 | header_libs: [ |
| 7569 | "fp16_headers", |
| 7570 | "fxdiv_headers", |
| 7571 | ], |
| 7572 | static_libs: [ |
| 7573 | "libpthreadpool", |
| 7574 | "xnnpack_tables", |
| 7575 | ], |
| 7576 | } |
| 7577 | |
| 7578 | cc_library_static { |
| 7579 | name: "xnnpack_neon_bench_microkernels", |
| 7580 | defaults: ["xnnpack_internal_default"], |
| 7581 | srcs: ALL_NEON_MICROKERNEL_SRCS, |
| 7582 | arch: { |
| 7583 | arm: { |
| 7584 | cflags: [ |
| 7585 | "-marm", |
| 7586 | "-march=armv7-a", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7587 | "-mfpu=neon", |
| 7588 | ], |
| 7589 | }, |
| 7590 | arm64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7591 | srcs: ALL_AARCH64_NEON_MICROKERNEL_SRCS, |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7592 | }, |
| 7593 | x86: { enabled: false, }, |
| 7594 | x86_64: { enabled: false, }, |
| 7595 | }, |
| 7596 | header_libs: [ |
| 7597 | "fp16_headers", |
| 7598 | ], |
| 7599 | static_libs: [ |
| 7600 | "libpthreadpool", |
| 7601 | "xnnpack_tables", |
| 7602 | ], |
| 7603 | } |
| 7604 | |
| 7605 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7606 | name: "xnnpack_neon_prod_microkernels", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7607 | defaults: ["xnnpack_internal_default"], |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7608 | srcs: PROD_NEON_MICROKERNEL_SRCS, |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7609 | arch: { |
| 7610 | arm: { |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7611 | cflags: [ |
| 7612 | "-marm", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7613 | "-march=armv7-a", |
| 7614 | "-mfpu=neon", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7615 | ], |
| 7616 | }, |
| 7617 | arm64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7618 | srcs: PROD_AARCH64_NEON_MICROKERNEL_SRCS, |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7619 | }, |
| 7620 | x86: { enabled: false, }, |
| 7621 | x86_64: { enabled: false, }, |
| 7622 | }, |
| 7623 | header_libs: [ |
| 7624 | "fp16_headers", |
| 7625 | ], |
| 7626 | static_libs: [ |
| 7627 | "libpthreadpool", |
| 7628 | "xnnpack_tables", |
| 7629 | ], |
| 7630 | } |
| 7631 | |
| 7632 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7633 | name: "xnnpack_neonfp16_bench_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7634 | defaults: ["xnnpack_internal_default"], |
| 7635 | arch: { |
| 7636 | arm: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7637 | srcs: ALL_NEONFP16_MICROKERNEL_SRCS, |
| 7638 | cflags: [ |
| 7639 | "-marm", |
| 7640 | "-march=armv7-a", |
| 7641 | "-mfpu=neon-fp16", |
| 7642 | ], |
| 7643 | }, |
| 7644 | arm64: { |
| 7645 | srcs: ALL_NEONFP16_MICROKERNEL_SRCS, |
| 7646 | }, |
| 7647 | x86: { enabled: false, }, |
| 7648 | x86_64: { enabled: false, }, |
| 7649 | }, |
| 7650 | header_libs: [ |
| 7651 | "fp16_headers", |
| 7652 | ], |
| 7653 | static_libs: [ |
| 7654 | "libpthreadpool", |
| 7655 | "xnnpack_tables", |
| 7656 | ], |
| 7657 | } |
| 7658 | |
| 7659 | cc_library_static { |
| 7660 | name: "xnnpack_neonfp16_prod_microkernels", |
| 7661 | defaults: ["xnnpack_internal_default"], |
| 7662 | arch: { |
| 7663 | arm: { |
| 7664 | srcs: PROD_NEONFP16_MICROKERNEL_SRCS, |
| 7665 | cflags: [ |
| 7666 | "-marm", |
| 7667 | "-march=armv7-a", |
| 7668 | "-mfpu=neon-fp16", |
| 7669 | ], |
| 7670 | }, |
| 7671 | arm64: { |
| 7672 | srcs: PROD_NEONFP16_MICROKERNEL_SRCS, |
| 7673 | }, |
| 7674 | x86: { enabled: false, }, |
| 7675 | x86_64: { enabled: false, }, |
| 7676 | }, |
| 7677 | header_libs: [ |
| 7678 | "fp16_headers", |
| 7679 | ], |
| 7680 | static_libs: [ |
| 7681 | "libpthreadpool", |
| 7682 | "xnnpack_tables", |
| 7683 | ], |
| 7684 | } |
| 7685 | |
| 7686 | cc_library_static { |
| 7687 | name: "xnnpack_neonfma_bench_microkernels", |
| 7688 | defaults: ["xnnpack_internal_default"], |
| 7689 | arch: { |
| 7690 | arm: { |
| 7691 | srcs: ALL_NEONFMA_MICROKERNEL_SRCS, |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7692 | cflags: [ |
| 7693 | "-marm", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 7694 | "-march=armv7-a", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7695 | "-mfpu=neon-vfpv4", |
| 7696 | ], |
| 7697 | }, |
| 7698 | arm64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7699 | srcs: ALL_NEONFMA_MICROKERNEL_SRCS, |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7700 | }, |
| 7701 | x86: { enabled: false, }, |
| 7702 | x86_64: { enabled: false, }, |
| 7703 | }, |
| 7704 | header_libs: [ |
| 7705 | "fp16_headers", |
| 7706 | ], |
| 7707 | static_libs: [ |
| 7708 | "libpthreadpool", |
| 7709 | "xnnpack_tables", |
| 7710 | ], |
| 7711 | } |
| 7712 | |
| 7713 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7714 | name: "xnnpack_neonfma_prod_microkernels", |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 7715 | defaults: ["xnnpack_internal_default"], |
| 7716 | arch: { |
| 7717 | arm: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7718 | srcs: PROD_NEONFMA_MICROKERNEL_SRCS, |
| 7719 | cflags: [ |
| 7720 | "-marm", |
| 7721 | "-march=armv7-a", |
| 7722 | "-mfpu=neon-vfpv4", |
| 7723 | ], |
| 7724 | }, |
| 7725 | arm64: { |
| 7726 | srcs: PROD_NEONFMA_MICROKERNEL_SRCS, |
| 7727 | }, |
| 7728 | x86: { enabled: false, }, |
| 7729 | x86_64: { enabled: false, }, |
| 7730 | }, |
| 7731 | header_libs: [ |
| 7732 | "fp16_headers", |
| 7733 | ], |
| 7734 | static_libs: [ |
| 7735 | "libpthreadpool", |
| 7736 | "xnnpack_tables", |
| 7737 | ], |
| 7738 | } |
| 7739 | |
| 7740 | cc_library_static { |
| 7741 | name: "xnnpack_neonv8_bench_microkernels", |
| 7742 | defaults: ["xnnpack_internal_default"], |
| 7743 | arch: { |
| 7744 | arm: { |
| 7745 | srcs: ALL_NEONV8_MICROKERNEL_SRCS, |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 7746 | cflags: [ |
| 7747 | "-marm", |
| 7748 | "-march=armv8-a", |
| 7749 | "-mfpu=neon-fp-armv8", |
| 7750 | ], |
| 7751 | }, |
| 7752 | arm64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7753 | srcs: ALL_NEONV8_MICROKERNEL_SRCS, |
| Miao Wang | c0aa11a | 2020-06-10 13:41:26 -0700 | [diff] [blame] | 7754 | }, |
| 7755 | x86: { enabled: false, }, |
| 7756 | x86_64: { enabled: false, }, |
| 7757 | }, |
| 7758 | header_libs: [ |
| 7759 | "fp16_headers", |
| 7760 | ], |
| 7761 | static_libs: [ |
| 7762 | "libpthreadpool", |
| 7763 | "xnnpack_tables", |
| 7764 | ], |
| 7765 | } |
| 7766 | |
| 7767 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7768 | name: "xnnpack_neonv8_prod_microkernels", |
| 7769 | defaults: ["xnnpack_internal_default"], |
| 7770 | arch: { |
| 7771 | arm: { |
| 7772 | srcs: PROD_NEONV8_MICROKERNEL_SRCS, |
| 7773 | cflags: [ |
| 7774 | "-marm", |
| 7775 | "-march=armv8-a", |
| 7776 | "-mfpu=neon-fp-armv8", |
| 7777 | ], |
| 7778 | }, |
| 7779 | arm64: { |
| 7780 | srcs: PROD_NEONV8_MICROKERNEL_SRCS, |
| 7781 | }, |
| 7782 | x86: { enabled: false, }, |
| 7783 | x86_64: { enabled: false, }, |
| 7784 | }, |
| 7785 | header_libs: [ |
| 7786 | "fp16_headers", |
| 7787 | ], |
| 7788 | static_libs: [ |
| 7789 | "libpthreadpool", |
| 7790 | "xnnpack_tables", |
| 7791 | ], |
| 7792 | } |
| 7793 | |
| 7794 | cc_library_static { |
| 7795 | name: "xnnpack_neonfp16arith_bench_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7796 | defaults: ["xnnpack_internal_default"], |
| 7797 | arch: { |
| 7798 | arm: { enabled: false, }, |
| 7799 | arm64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7800 | srcs: ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7801 | cflags: [ |
| 7802 | "-march=armv8.2-a+fp16", |
| 7803 | ], |
| 7804 | }, |
| 7805 | x86: { enabled: false, }, |
| 7806 | x86_64: { enabled: false, }, |
| 7807 | }, |
| 7808 | header_libs: [ |
| 7809 | "fp16_headers", |
| 7810 | ], |
| 7811 | static_libs: [ |
| 7812 | "libpthreadpool", |
| 7813 | "xnnpack_tables", |
| 7814 | ], |
| 7815 | } |
| 7816 | |
| 7817 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7818 | name: "xnnpack_neonfp16arith_prod_microkernels", |
| 7819 | defaults: ["xnnpack_internal_default"], |
| 7820 | arch: { |
| 7821 | arm: { enabled: false, }, |
| 7822 | arm64: { |
| 7823 | srcs: PROD_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS, |
| 7824 | cflags: [ |
| 7825 | "-march=armv8.2-a+fp16", |
| 7826 | ], |
| 7827 | }, |
| 7828 | x86: { enabled: false, }, |
| 7829 | x86_64: { enabled: false, }, |
| 7830 | }, |
| 7831 | header_libs: [ |
| 7832 | "fp16_headers", |
| 7833 | ], |
| 7834 | static_libs: [ |
| 7835 | "libpthreadpool", |
| 7836 | "xnnpack_tables", |
| 7837 | ], |
| 7838 | } |
| 7839 | |
| 7840 | cc_library_static { |
| 7841 | name: "xnnpack_neondot_bench_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7842 | defaults: ["xnnpack_internal_default"], |
| 7843 | arch: { |
| 7844 | arm: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7845 | srcs: ALL_NEONDOT_MICROKERNEL_SRCS, |
| 7846 | cflags: [ |
| 7847 | "-marm", |
| 7848 | "-march=armv8.2-a+dotprod", |
| 7849 | "-mfpu=neon-fp-armv8", |
| 7850 | ], |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7851 | }, |
| 7852 | arm64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7853 | srcs: ALL_NEONDOT_MICROKERNEL_SRCS, |
| 7854 | cflags: [ |
| 7855 | "-march=armv8.2-a+dotprod", |
| 7856 | ], |
| 7857 | }, |
| 7858 | x86: { enabled: false, }, |
| 7859 | x86_64: { enabled: false, }, |
| 7860 | }, |
| 7861 | header_libs: [ |
| 7862 | "fp16_headers", |
| 7863 | ], |
| 7864 | static_libs: [ |
| 7865 | "libpthreadpool", |
| 7866 | "xnnpack_tables", |
| 7867 | ], |
| 7868 | } |
| 7869 | |
| 7870 | cc_library_static { |
| 7871 | name: "xnnpack_neondot_prod_microkernels", |
| 7872 | defaults: ["xnnpack_internal_default"], |
| 7873 | arch: { |
| 7874 | arm: { |
| 7875 | srcs: PROD_NEONDOT_MICROKERNEL_SRCS, |
| 7876 | cflags: [ |
| 7877 | "-marm", |
| 7878 | "-march=armv8.2-a+dotprod", |
| 7879 | "-mfpu=neon-fp-armv8", |
| 7880 | ], |
| 7881 | }, |
| 7882 | arm64: { |
| 7883 | srcs: PROD_NEONDOT_MICROKERNEL_SRCS, |
| 7884 | cflags: [ |
| 7885 | "-march=armv8.2-a+dotprod", |
| 7886 | ], |
| 7887 | }, |
| 7888 | x86: { enabled: false, }, |
| 7889 | x86_64: { enabled: false, }, |
| 7890 | }, |
| 7891 | header_libs: [ |
| 7892 | "fp16_headers", |
| 7893 | ], |
| 7894 | static_libs: [ |
| 7895 | "libpthreadpool", |
| 7896 | "xnnpack_tables", |
| 7897 | ], |
| 7898 | } |
| 7899 | |
| 7900 | cc_library_static { |
| 7901 | name: "xnnpack_asm_microkernels", |
| 7902 | defaults: ["xnnpack_internal_default"], |
| 7903 | arch: { |
| 7904 | arm: { |
| 7905 | srcs: AARCH32_ASM_MICROKERNEL_SRCS, |
| 7906 | clang_asflags: [ |
| 7907 | "-marm", |
| 7908 | "-march=armv8.2-a+dotprod", |
| 7909 | "-mfpu=neon-fp-armv8", |
| 7910 | ], |
| 7911 | }, |
| 7912 | arm64: { |
| 7913 | srcs: AARCH64_ASM_MICROKERNEL_SRCS, |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7914 | clang_asflags: [ |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 7915 | "-march=armv8.2-a+fp16+dotprod", |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 7916 | ], |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7917 | }, |
| 7918 | x86: { enabled: false, }, |
| 7919 | x86_64: { enabled: false, }, |
| 7920 | }, |
| 7921 | } |
| 7922 | |
| 7923 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7924 | name: "xnnpack_sse2_amalgam_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7925 | defaults: ["xnnpack_internal_default"], |
| 7926 | arch: { |
| 7927 | arm: { enabled: false, }, |
| 7928 | arm64: { enabled: false, }, |
| 7929 | x86: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7930 | srcs: [ |
| 7931 | "src/amalgam/sse.c", |
| 7932 | "src/amalgam/sse2.c", |
| 7933 | ], |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7934 | cflags: [ |
| 7935 | "-msse2", |
| 7936 | ], |
| 7937 | }, |
| 7938 | x86_64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7939 | srcs: [ |
| 7940 | "src/amalgam/sse.c", |
| 7941 | "src/amalgam/sse2.c", |
| 7942 | ], |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 7943 | cflags: [ |
| 7944 | "-msse2", |
| 7945 | ], |
| 7946 | }, |
| 7947 | }, |
| 7948 | header_libs: [ |
| 7949 | "fp16_headers", |
| 7950 | ], |
| 7951 | static_libs: [ |
| 7952 | "libpthreadpool", |
| 7953 | "xnnpack_tables", |
| 7954 | ], |
| 7955 | } |
| 7956 | |
| 7957 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7958 | name: "xnnpack_sse2_bench_microkernels", |
| Miao Wang | 2534c2f | 2020-03-16 11:58:04 -0700 | [diff] [blame] | 7959 | defaults: ["xnnpack_internal_default"], |
| 7960 | arch: { |
| 7961 | arm: { enabled: false, }, |
| 7962 | arm64: { enabled: false, }, |
| 7963 | x86: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 7964 | srcs: ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS, |
| 7965 | cflags: [ |
| 7966 | "-msse2", |
| 7967 | ], |
| 7968 | }, |
| 7969 | x86_64: { |
| 7970 | srcs: ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS, |
| 7971 | cflags: [ |
| 7972 | "-msse2", |
| 7973 | ], |
| 7974 | }, |
| 7975 | }, |
| 7976 | header_libs: [ |
| 7977 | "fp16_headers", |
| 7978 | ], |
| 7979 | static_libs: [ |
| 7980 | "libpthreadpool", |
| 7981 | "xnnpack_tables", |
| 7982 | ], |
| 7983 | } |
| 7984 | |
| 7985 | cc_library_static { |
| 7986 | name: "xnnpack_sse2_prod_microkernels", |
| 7987 | defaults: ["xnnpack_internal_default"], |
| 7988 | arch: { |
| 7989 | arm: { enabled: false, }, |
| 7990 | arm64: { enabled: false, }, |
| 7991 | x86: { |
| 7992 | srcs: ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS, |
| 7993 | cflags: [ |
| 7994 | "-msse2", |
| 7995 | ], |
| 7996 | }, |
| 7997 | x86_64: { |
| 7998 | srcs: ALL_SSE_MICROKERNEL_SRCS + ALL_SSE2_MICROKERNEL_SRCS, |
| 7999 | cflags: [ |
| 8000 | "-msse2", |
| 8001 | ], |
| 8002 | }, |
| 8003 | }, |
| 8004 | header_libs: [ |
| 8005 | "fp16_headers", |
| 8006 | ], |
| 8007 | static_libs: [ |
| 8008 | "libpthreadpool", |
| 8009 | "xnnpack_tables", |
| 8010 | ], |
| 8011 | } |
| 8012 | |
| 8013 | cc_library_static { |
| 8014 | name: "xnnpack_ssse3_amalgam_microkernels", |
| 8015 | defaults: ["xnnpack_internal_default"], |
| 8016 | arch: { |
| 8017 | arm: { enabled: false, }, |
| 8018 | arm64: { enabled: false, }, |
| 8019 | x86: { |
| 8020 | srcs: [ |
| 8021 | "src/amalgam/ssse3.c", |
| 8022 | ], |
| Miao Wang | 2534c2f | 2020-03-16 11:58:04 -0700 | [diff] [blame] | 8023 | cflags: [ |
| 8024 | "-mssse3", |
| 8025 | ], |
| 8026 | }, |
| 8027 | x86_64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8028 | srcs: [ |
| 8029 | "src/amalgam/ssse3.c", |
| 8030 | ], |
| Miao Wang | 2534c2f | 2020-03-16 11:58:04 -0700 | [diff] [blame] | 8031 | cflags: [ |
| 8032 | "-mssse3", |
| 8033 | ], |
| 8034 | }, |
| 8035 | }, |
| 8036 | header_libs: [ |
| 8037 | "fp16_headers", |
| 8038 | ], |
| 8039 | static_libs: [ |
| 8040 | "libpthreadpool", |
| 8041 | "xnnpack_tables", |
| 8042 | ], |
| 8043 | } |
| 8044 | |
| 8045 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8046 | name: "xnnpack_ssse3_bench_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8047 | defaults: ["xnnpack_internal_default"], |
| 8048 | arch: { |
| 8049 | arm: { enabled: false, }, |
| 8050 | arm64: { enabled: false, }, |
| 8051 | x86: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8052 | srcs: ALL_SSSE3_MICROKERNEL_SRCS, |
| 8053 | cflags: [ |
| 8054 | "-mssse3", |
| 8055 | ], |
| 8056 | }, |
| 8057 | x86_64: { |
| 8058 | srcs: ALL_SSSE3_MICROKERNEL_SRCS, |
| 8059 | cflags: [ |
| 8060 | "-mssse3", |
| 8061 | ], |
| 8062 | }, |
| 8063 | }, |
| 8064 | header_libs: [ |
| 8065 | "fp16_headers", |
| 8066 | ], |
| 8067 | static_libs: [ |
| 8068 | "libpthreadpool", |
| 8069 | "xnnpack_tables", |
| 8070 | ], |
| 8071 | } |
| 8072 | |
| 8073 | cc_library_static { |
| 8074 | name: "xnnpack_ssse3_prod_microkernels", |
| 8075 | defaults: ["xnnpack_internal_default"], |
| 8076 | arch: { |
| 8077 | arm: { enabled: false, }, |
| 8078 | arm64: { enabled: false, }, |
| 8079 | x86: { |
| 8080 | srcs: PROD_SSSE3_MICROKERNEL_SRCS, |
| 8081 | cflags: [ |
| 8082 | "-mssse3", |
| 8083 | ], |
| 8084 | }, |
| 8085 | x86_64: { |
| 8086 | srcs: PROD_SSSE3_MICROKERNEL_SRCS, |
| 8087 | cflags: [ |
| 8088 | "-mssse3", |
| 8089 | ], |
| 8090 | }, |
| 8091 | }, |
| 8092 | header_libs: [ |
| 8093 | "fp16_headers", |
| 8094 | ], |
| 8095 | static_libs: [ |
| 8096 | "libpthreadpool", |
| 8097 | "xnnpack_tables", |
| 8098 | ], |
| 8099 | } |
| 8100 | |
| 8101 | cc_library_static { |
| 8102 | name: "xnnpack_sse41_amalgam_microkernels", |
| 8103 | defaults: ["xnnpack_internal_default"], |
| 8104 | arch: { |
| 8105 | arm: { enabled: false, }, |
| 8106 | arm64: { enabled: false, }, |
| 8107 | x86: { |
| 8108 | srcs: [ |
| 8109 | "src/amalgam/sse41.c", |
| 8110 | ], |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8111 | cflags: [ |
| 8112 | "-msse4.1", |
| 8113 | ], |
| 8114 | }, |
| 8115 | x86_64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8116 | srcs: [ |
| 8117 | "src/amalgam/sse41.c", |
| 8118 | ], |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8119 | cflags: [ |
| 8120 | "-msse4.1", |
| 8121 | ], |
| 8122 | }, |
| 8123 | }, |
| 8124 | header_libs: [ |
| 8125 | "fp16_headers", |
| 8126 | ], |
| 8127 | static_libs: [ |
| 8128 | "libpthreadpool", |
| 8129 | "xnnpack_tables", |
| 8130 | ], |
| 8131 | } |
| 8132 | |
| 8133 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8134 | name: "xnnpack_sse41_bench_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8135 | defaults: ["xnnpack_internal_default"], |
| 8136 | arch: { |
| 8137 | arm: { enabled: false, }, |
| 8138 | arm64: { enabled: false, }, |
| 8139 | x86: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8140 | srcs: ALL_SSE41_MICROKERNEL_SRCS, |
| 8141 | cflags: [ |
| 8142 | "-msse4.1", |
| 8143 | ], |
| 8144 | }, |
| 8145 | x86_64: { |
| 8146 | srcs: ALL_SSE41_MICROKERNEL_SRCS, |
| 8147 | cflags: [ |
| 8148 | "-msse4.1", |
| 8149 | ], |
| 8150 | }, |
| 8151 | }, |
| 8152 | header_libs: [ |
| 8153 | "fp16_headers", |
| 8154 | ], |
| 8155 | static_libs: [ |
| 8156 | "libpthreadpool", |
| 8157 | "xnnpack_tables", |
| 8158 | ], |
| 8159 | } |
| 8160 | |
| 8161 | cc_library_static { |
| 8162 | name: "xnnpack_sse41_prod_microkernels", |
| 8163 | defaults: ["xnnpack_internal_default"], |
| 8164 | arch: { |
| 8165 | arm: { enabled: false, }, |
| 8166 | arm64: { enabled: false, }, |
| 8167 | x86: { |
| 8168 | srcs: PROD_SSE41_MICROKERNEL_SRCS, |
| 8169 | cflags: [ |
| 8170 | "-msse4.1", |
| 8171 | ], |
| 8172 | }, |
| 8173 | x86_64: { |
| 8174 | srcs: PROD_SSE41_MICROKERNEL_SRCS, |
| 8175 | cflags: [ |
| 8176 | "-msse4.1", |
| 8177 | ], |
| 8178 | }, |
| 8179 | }, |
| 8180 | header_libs: [ |
| 8181 | "fp16_headers", |
| 8182 | ], |
| 8183 | static_libs: [ |
| 8184 | "libpthreadpool", |
| 8185 | "xnnpack_tables", |
| 8186 | ], |
| 8187 | } |
| 8188 | |
| 8189 | cc_library_static { |
| 8190 | name: "xnnpack_avx_amalgam_microkernels", |
| 8191 | defaults: ["xnnpack_internal_default"], |
| 8192 | arch: { |
| 8193 | arm: { enabled: false, }, |
| 8194 | arm64: { enabled: false, }, |
| 8195 | x86: { |
| 8196 | srcs: [ |
| 8197 | "src/amalgam/avx.c", |
| 8198 | ], |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8199 | cflags: [ |
| 8200 | "-mavx", |
| 8201 | ], |
| 8202 | }, |
| 8203 | x86_64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8204 | srcs: [ |
| 8205 | "src/amalgam/avx.c", |
| 8206 | ], |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8207 | cflags: [ |
| 8208 | "-mavx", |
| 8209 | ], |
| 8210 | }, |
| 8211 | }, |
| 8212 | header_libs: [ |
| 8213 | "fp16_headers", |
| 8214 | ], |
| 8215 | static_libs: [ |
| 8216 | "libpthreadpool", |
| 8217 | "xnnpack_tables", |
| 8218 | ], |
| 8219 | } |
| 8220 | |
| 8221 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8222 | name: "xnnpack_avx_bench_microkernels", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 8223 | defaults: ["xnnpack_internal_default"], |
| 8224 | arch: { |
| 8225 | arm: { enabled: false, }, |
| 8226 | arm64: { enabled: false, }, |
| 8227 | x86: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8228 | srcs: ALL_AVX_MICROKERNEL_SRCS, |
| 8229 | cflags: [ |
| 8230 | "-mavx", |
| 8231 | ], |
| 8232 | }, |
| 8233 | x86_64: { |
| 8234 | srcs: ALL_AVX_MICROKERNEL_SRCS, |
| 8235 | cflags: [ |
| 8236 | "-mavx", |
| 8237 | ], |
| 8238 | }, |
| 8239 | }, |
| 8240 | header_libs: [ |
| 8241 | "fp16_headers", |
| 8242 | ], |
| 8243 | static_libs: [ |
| 8244 | "libpthreadpool", |
| 8245 | "xnnpack_tables", |
| 8246 | ], |
| 8247 | } |
| 8248 | |
| 8249 | cc_library_static { |
| 8250 | name: "xnnpack_avx_prod_microkernels", |
| 8251 | defaults: ["xnnpack_internal_default"], |
| 8252 | arch: { |
| 8253 | arm: { enabled: false, }, |
| 8254 | arm64: { enabled: false, }, |
| 8255 | x86: { |
| 8256 | srcs: PROD_AVX_MICROKERNEL_SRCS, |
| 8257 | cflags: [ |
| 8258 | "-mavx", |
| 8259 | ], |
| 8260 | }, |
| 8261 | x86_64: { |
| 8262 | srcs: PROD_AVX_MICROKERNEL_SRCS, |
| 8263 | cflags: [ |
| 8264 | "-mavx", |
| 8265 | ], |
| 8266 | }, |
| 8267 | }, |
| 8268 | header_libs: [ |
| 8269 | "fp16_headers", |
| 8270 | ], |
| 8271 | static_libs: [ |
| 8272 | "libpthreadpool", |
| 8273 | "xnnpack_tables", |
| 8274 | ], |
| 8275 | } |
| 8276 | |
| 8277 | cc_library_static { |
| 8278 | name: "xnnpack_f16c_amalgam_microkernels", |
| 8279 | defaults: ["xnnpack_internal_default"], |
| 8280 | arch: { |
| 8281 | arm: { enabled: false, }, |
| 8282 | arm64: { enabled: false, }, |
| 8283 | x86: { |
| 8284 | srcs: [ |
| 8285 | "src/amalgam/f16c.c", |
| 8286 | ], |
| 8287 | cflags: [ |
| 8288 | "-mf16c", |
| 8289 | ], |
| 8290 | }, |
| 8291 | x86_64: { |
| 8292 | srcs: [ |
| 8293 | "src/amalgam/f16c.c", |
| 8294 | ], |
| 8295 | cflags: [ |
| 8296 | "-mf16c", |
| 8297 | ], |
| 8298 | }, |
| 8299 | }, |
| 8300 | header_libs: [ |
| 8301 | "fp16_headers", |
| 8302 | ], |
| 8303 | static_libs: [ |
| 8304 | "libpthreadpool", |
| 8305 | "xnnpack_tables", |
| 8306 | ], |
| 8307 | } |
| 8308 | |
| 8309 | cc_library_static { |
| 8310 | name: "xnnpack_f16c_bench_microkernels", |
| 8311 | defaults: ["xnnpack_internal_default"], |
| 8312 | arch: { |
| 8313 | arm: { enabled: false, }, |
| 8314 | arm64: { enabled: false, }, |
| 8315 | x86: { |
| 8316 | srcs: ALL_F16C_MICROKERNEL_SRCS, |
| 8317 | cflags: [ |
| 8318 | "-mf16c", |
| 8319 | ], |
| 8320 | }, |
| 8321 | x86_64: { |
| 8322 | srcs: ALL_F16C_MICROKERNEL_SRCS, |
| 8323 | cflags: [ |
| 8324 | "-mf16c", |
| 8325 | ], |
| 8326 | }, |
| 8327 | }, |
| 8328 | header_libs: [ |
| 8329 | "fp16_headers", |
| 8330 | ], |
| 8331 | static_libs: [ |
| 8332 | "libpthreadpool", |
| 8333 | "xnnpack_tables", |
| 8334 | ], |
| 8335 | } |
| 8336 | |
| 8337 | cc_library_static { |
| 8338 | name: "xnnpack_f16c_prod_microkernels", |
| 8339 | defaults: ["xnnpack_internal_default"], |
| 8340 | arch: { |
| 8341 | arm: { enabled: false, }, |
| 8342 | arm64: { enabled: false, }, |
| 8343 | x86: { |
| 8344 | srcs: PROD_F16C_MICROKERNEL_SRCS, |
| 8345 | cflags: [ |
| 8346 | "-mf16c", |
| 8347 | ], |
| 8348 | }, |
| 8349 | x86_64: { |
| 8350 | srcs: PROD_F16C_MICROKERNEL_SRCS, |
| 8351 | cflags: [ |
| 8352 | "-mf16c", |
| 8353 | ], |
| 8354 | }, |
| 8355 | }, |
| 8356 | header_libs: [ |
| 8357 | "fp16_headers", |
| 8358 | ], |
| 8359 | static_libs: [ |
| 8360 | "libpthreadpool", |
| 8361 | "xnnpack_tables", |
| 8362 | ], |
| 8363 | } |
| 8364 | |
| 8365 | cc_library_static { |
| 8366 | name: "xnnpack_xop_bench_microkernels", |
| 8367 | defaults: ["xnnpack_internal_default"], |
| 8368 | arch: { |
| 8369 | arm: { enabled: false, }, |
| 8370 | arm64: { enabled: false, }, |
| 8371 | x86: { |
| 8372 | srcs: ALL_XOP_MICROKERNEL_SRCS, |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 8373 | cflags: [ |
| 8374 | "-mxop", |
| 8375 | ], |
| 8376 | }, |
| 8377 | x86_64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8378 | srcs: ALL_XOP_MICROKERNEL_SRCS, |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 8379 | cflags: [ |
| 8380 | "-mxop", |
| 8381 | ], |
| 8382 | }, |
| 8383 | }, |
| 8384 | header_libs: [ |
| 8385 | "fp16_headers", |
| 8386 | ], |
| 8387 | static_libs: [ |
| 8388 | "libpthreadpool", |
| 8389 | "xnnpack_tables", |
| 8390 | ], |
| 8391 | } |
| 8392 | |
| 8393 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8394 | name: "xnnpack_xop_prod_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8395 | defaults: ["xnnpack_internal_default"], |
| 8396 | arch: { |
| 8397 | arm: { enabled: false, }, |
| 8398 | arm64: { enabled: false, }, |
| 8399 | x86: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8400 | srcs: PROD_XOP_MICROKERNEL_SRCS, |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8401 | cflags: [ |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8402 | "-mxop", |
| 8403 | ], |
| 8404 | }, |
| 8405 | x86_64: { |
| 8406 | srcs: PROD_XOP_MICROKERNEL_SRCS, |
| 8407 | cflags: [ |
| 8408 | "-mxop", |
| 8409 | ], |
| 8410 | }, |
| 8411 | }, |
| 8412 | header_libs: [ |
| 8413 | "fp16_headers", |
| 8414 | ], |
| 8415 | static_libs: [ |
| 8416 | "libpthreadpool", |
| 8417 | "xnnpack_tables", |
| 8418 | ], |
| 8419 | } |
| 8420 | |
| 8421 | cc_library_static { |
| 8422 | name: "xnnpack_fma3_amalgam_microkernels", |
| 8423 | defaults: ["xnnpack_internal_default"], |
| 8424 | arch: { |
| 8425 | arm: { enabled: false, }, |
| 8426 | arm64: { enabled: false, }, |
| 8427 | x86: { |
| 8428 | srcs: [ |
| 8429 | "src/amalgam/fma3.c", |
| 8430 | ], |
| 8431 | cflags: [ |
| 8432 | "-mf16c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8433 | "-mfma", |
| 8434 | ], |
| 8435 | }, |
| 8436 | x86_64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8437 | srcs: [ |
| 8438 | "src/amalgam/fma3.c", |
| 8439 | ], |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8440 | cflags: [ |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8441 | "-mf16c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8442 | "-mfma", |
| 8443 | ], |
| 8444 | }, |
| 8445 | }, |
| 8446 | header_libs: [ |
| 8447 | "fp16_headers", |
| 8448 | ], |
| 8449 | static_libs: [ |
| 8450 | "libpthreadpool", |
| 8451 | "xnnpack_tables", |
| 8452 | ], |
| 8453 | } |
| 8454 | |
| 8455 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8456 | name: "xnnpack_fma3_bench_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8457 | defaults: ["xnnpack_internal_default"], |
| 8458 | arch: { |
| 8459 | arm: { enabled: false, }, |
| 8460 | arm64: { enabled: false, }, |
| 8461 | x86: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8462 | srcs: ALL_FMA3_MICROKERNEL_SRCS, |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8463 | cflags: [ |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8464 | "-mf16c", |
| 8465 | "-mfma", |
| 8466 | ], |
| 8467 | }, |
| 8468 | x86_64: { |
| 8469 | srcs: ALL_FMA3_MICROKERNEL_SRCS, |
| 8470 | cflags: [ |
| 8471 | "-mf16c", |
| 8472 | "-mfma", |
| 8473 | ], |
| 8474 | }, |
| 8475 | }, |
| 8476 | header_libs: [ |
| 8477 | "fp16_headers", |
| 8478 | ], |
| 8479 | static_libs: [ |
| 8480 | "libpthreadpool", |
| 8481 | "xnnpack_tables", |
| 8482 | ], |
| 8483 | } |
| 8484 | |
| 8485 | cc_library_static { |
| 8486 | name: "xnnpack_fma3_prod_microkernels", |
| 8487 | defaults: ["xnnpack_internal_default"], |
| 8488 | arch: { |
| 8489 | arm: { enabled: false, }, |
| 8490 | arm64: { enabled: false, }, |
| 8491 | x86: { |
| 8492 | srcs: PROD_FMA3_MICROKERNEL_SRCS, |
| 8493 | cflags: [ |
| 8494 | "-mf16c", |
| 8495 | "-mfma", |
| 8496 | ], |
| 8497 | }, |
| 8498 | x86_64: { |
| 8499 | srcs: PROD_FMA3_MICROKERNEL_SRCS, |
| 8500 | cflags: [ |
| 8501 | "-mf16c", |
| 8502 | "-mfma", |
| 8503 | ], |
| 8504 | }, |
| 8505 | }, |
| 8506 | header_libs: [ |
| 8507 | "fp16_headers", |
| 8508 | ], |
| 8509 | static_libs: [ |
| 8510 | "libpthreadpool", |
| 8511 | "xnnpack_tables", |
| 8512 | ], |
| 8513 | } |
| 8514 | |
| 8515 | cc_library_static { |
| 8516 | name: "xnnpack_avx2_amalgam_microkernels", |
| 8517 | defaults: ["xnnpack_internal_default"], |
| 8518 | arch: { |
| 8519 | arm: { enabled: false, }, |
| 8520 | arm64: { enabled: false, }, |
| 8521 | x86: { |
| 8522 | srcs: [ |
| 8523 | "src/amalgam/avx2.c", |
| 8524 | ], |
| 8525 | cflags: [ |
| 8526 | "-mf16c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8527 | "-mfma", |
| 8528 | "-mavx2", |
| 8529 | ], |
| 8530 | }, |
| 8531 | x86_64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8532 | srcs: [ |
| 8533 | "src/amalgam/avx2.c", |
| 8534 | ], |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8535 | cflags: [ |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8536 | "-mf16c", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8537 | "-mfma", |
| 8538 | "-mavx2", |
| 8539 | ], |
| 8540 | }, |
| 8541 | }, |
| 8542 | header_libs: [ |
| 8543 | "fp16_headers", |
| 8544 | ], |
| 8545 | static_libs: [ |
| 8546 | "libpthreadpool", |
| 8547 | "xnnpack_tables", |
| 8548 | ], |
| 8549 | } |
| 8550 | |
| 8551 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8552 | name: "xnnpack_avx2_bench_microkernels", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 8553 | defaults: ["xnnpack_internal_default"], |
| 8554 | arch: { |
| 8555 | arm: { enabled: false, }, |
| 8556 | arm64: { enabled: false, }, |
| 8557 | x86: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8558 | srcs: ALL_AVX2_MICROKERNEL_SRCS, |
| 8559 | cflags: [ |
| 8560 | "-mf16c", |
| 8561 | "-mfma", |
| 8562 | "-mavx2", |
| 8563 | ], |
| 8564 | }, |
| 8565 | x86_64: { |
| 8566 | srcs: ALL_AVX2_MICROKERNEL_SRCS, |
| 8567 | cflags: [ |
| 8568 | "-mf16c", |
| 8569 | "-mfma", |
| 8570 | "-mavx2", |
| 8571 | ], |
| 8572 | }, |
| 8573 | }, |
| 8574 | header_libs: [ |
| 8575 | "fp16_headers", |
| 8576 | ], |
| 8577 | static_libs: [ |
| 8578 | "libpthreadpool", |
| 8579 | "xnnpack_tables", |
| 8580 | ], |
| 8581 | } |
| 8582 | |
| 8583 | cc_library_static { |
| 8584 | name: "xnnpack_avx2_prod_microkernels", |
| 8585 | defaults: ["xnnpack_internal_default"], |
| 8586 | arch: { |
| 8587 | arm: { enabled: false, }, |
| 8588 | arm64: { enabled: false, }, |
| 8589 | x86: { |
| 8590 | srcs: PROD_AVX2_MICROKERNEL_SRCS, |
| 8591 | cflags: [ |
| 8592 | "-mf16c", |
| 8593 | "-mfma", |
| 8594 | "-mavx2", |
| 8595 | ], |
| 8596 | }, |
| 8597 | x86_64: { |
| 8598 | srcs: PROD_AVX2_MICROKERNEL_SRCS, |
| 8599 | cflags: [ |
| 8600 | "-mf16c", |
| 8601 | "-mfma", |
| 8602 | "-mavx2", |
| 8603 | ], |
| 8604 | }, |
| 8605 | }, |
| 8606 | header_libs: [ |
| 8607 | "fp16_headers", |
| 8608 | ], |
| 8609 | static_libs: [ |
| 8610 | "libpthreadpool", |
| 8611 | "xnnpack_tables", |
| 8612 | ], |
| 8613 | } |
| 8614 | |
| 8615 | cc_library_static { |
| 8616 | name: "xnnpack_avx512skx_amalgam_microkernels", |
| 8617 | defaults: ["xnnpack_internal_default"], |
| 8618 | arch: { |
| 8619 | arm: { enabled: false, }, |
| 8620 | arm64: { enabled: false, }, |
| 8621 | x86: { |
| 8622 | srcs: [ |
| 8623 | "src/amalgam/avx512skx.c", |
| 8624 | ], |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 8625 | cflags: [ |
| 8626 | "-mavx512f", |
| 8627 | "-mavx512cd", |
| 8628 | "-mavx512bw", |
| 8629 | "-mavx512dq", |
| 8630 | "-mavx512vl", |
| 8631 | ], |
| 8632 | }, |
| 8633 | x86_64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8634 | srcs: [ |
| 8635 | "src/amalgam/avx512skx.c", |
| 8636 | ], |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 8637 | cflags: [ |
| 8638 | "-mavx512f", |
| 8639 | "-mavx512cd", |
| 8640 | "-mavx512bw", |
| 8641 | "-mavx512dq", |
| 8642 | "-mavx512vl", |
| 8643 | ], |
| 8644 | }, |
| 8645 | }, |
| 8646 | header_libs: [ |
| 8647 | "fp16_headers", |
| 8648 | ], |
| 8649 | static_libs: [ |
| 8650 | "libpthreadpool", |
| 8651 | "xnnpack_tables", |
| 8652 | ], |
| 8653 | } |
| 8654 | |
| 8655 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8656 | name: "xnnpack_avx512skx_bench_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8657 | defaults: ["xnnpack_internal_default"], |
| 8658 | arch: { |
| 8659 | arm: { enabled: false, }, |
| 8660 | arm64: { enabled: false, }, |
| 8661 | x86: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8662 | srcs: ALL_AVX512SKX_MICROKERNEL_SRCS, |
| 8663 | cflags: [ |
| 8664 | "-mavx512f", |
| 8665 | "-mavx512cd", |
| 8666 | "-mavx512bw", |
| 8667 | "-mavx512dq", |
| 8668 | "-mavx512vl", |
| 8669 | ], |
| 8670 | }, |
| 8671 | x86_64: { |
| 8672 | srcs: ALL_AVX512SKX_MICROKERNEL_SRCS, |
| 8673 | cflags: [ |
| 8674 | "-mavx512f", |
| 8675 | "-mavx512cd", |
| 8676 | "-mavx512bw", |
| 8677 | "-mavx512dq", |
| 8678 | "-mavx512vl", |
| 8679 | ], |
| 8680 | }, |
| 8681 | }, |
| 8682 | header_libs: [ |
| 8683 | "fp16_headers", |
| 8684 | ], |
| 8685 | static_libs: [ |
| 8686 | "libpthreadpool", |
| 8687 | "xnnpack_tables", |
| 8688 | ], |
| 8689 | } |
| 8690 | |
| 8691 | cc_library_static { |
| 8692 | name: "xnnpack_avx512skx_prod_microkernels", |
| 8693 | defaults: ["xnnpack_internal_default"], |
| 8694 | arch: { |
| 8695 | arm: { enabled: false, }, |
| 8696 | arm64: { enabled: false, }, |
| 8697 | x86: { |
| 8698 | srcs: PROD_AVX512SKX_MICROKERNEL_SRCS, |
| 8699 | cflags: [ |
| 8700 | "-mavx512f", |
| 8701 | "-mavx512cd", |
| 8702 | "-mavx512bw", |
| 8703 | "-mavx512dq", |
| 8704 | "-mavx512vl", |
| 8705 | ], |
| 8706 | }, |
| 8707 | x86_64: { |
| 8708 | srcs: PROD_AVX512SKX_MICROKERNEL_SRCS, |
| 8709 | cflags: [ |
| 8710 | "-mavx512f", |
| 8711 | "-mavx512cd", |
| 8712 | "-mavx512bw", |
| 8713 | "-mavx512dq", |
| 8714 | "-mavx512vl", |
| 8715 | ], |
| 8716 | }, |
| 8717 | }, |
| 8718 | header_libs: [ |
| 8719 | "fp16_headers", |
| 8720 | ], |
| 8721 | static_libs: [ |
| 8722 | "libpthreadpool", |
| 8723 | "xnnpack_tables", |
| 8724 | ], |
| 8725 | } |
| 8726 | |
| 8727 | cc_library_static { |
| 8728 | name: "xnnpack_avx512f_amalgam_microkernels", |
| 8729 | defaults: ["xnnpack_internal_default"], |
| 8730 | arch: { |
| 8731 | arm: { enabled: false, }, |
| 8732 | arm64: { enabled: false, }, |
| 8733 | x86: { |
| 8734 | srcs: [ |
| 8735 | "src/amalgam/avx512f.c", |
| 8736 | ], |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8737 | cflags: [ |
| 8738 | "-mavx512f", |
| 8739 | ], |
| 8740 | }, |
| 8741 | x86_64: { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8742 | srcs: [ |
| 8743 | "src/amalgam/avx512f.c", |
| 8744 | ], |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8745 | cflags: [ |
| 8746 | "-mavx512f", |
| 8747 | ], |
| 8748 | }, |
| 8749 | }, |
| 8750 | header_libs: [ |
| 8751 | "fp16_headers", |
| 8752 | ], |
| 8753 | static_libs: [ |
| 8754 | "libpthreadpool", |
| 8755 | "xnnpack_tables", |
| 8756 | ], |
| 8757 | } |
| 8758 | |
| 8759 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8760 | name: "xnnpack_avx512f_bench_microkernels", |
| 8761 | defaults: ["xnnpack_internal_default"], |
| 8762 | arch: { |
| 8763 | arm: { enabled: false, }, |
| 8764 | arm64: { enabled: false, }, |
| 8765 | x86: { |
| 8766 | srcs: ALL_AVX512F_MICROKERNEL_SRCS, |
| 8767 | cflags: [ |
| 8768 | "-mavx512f", |
| 8769 | ], |
| 8770 | }, |
| 8771 | x86_64: { |
| 8772 | srcs: ALL_AVX512F_MICROKERNEL_SRCS, |
| 8773 | cflags: [ |
| 8774 | "-mavx512f", |
| 8775 | ], |
| 8776 | }, |
| 8777 | }, |
| 8778 | header_libs: [ |
| 8779 | "fp16_headers", |
| 8780 | ], |
| 8781 | static_libs: [ |
| 8782 | "libpthreadpool", |
| 8783 | "xnnpack_tables", |
| 8784 | ], |
| 8785 | } |
| 8786 | |
| 8787 | cc_library_static { |
| 8788 | name: "xnnpack_avx512f_prod_microkernels", |
| 8789 | defaults: ["xnnpack_internal_default"], |
| 8790 | arch: { |
| 8791 | arm: { enabled: false, }, |
| 8792 | arm64: { enabled: false, }, |
| 8793 | x86: { |
| 8794 | srcs: PROD_AVX512F_MICROKERNEL_SRCS, |
| 8795 | cflags: [ |
| 8796 | "-mavx512f", |
| 8797 | ], |
| 8798 | }, |
| 8799 | x86_64: { |
| 8800 | srcs: PROD_AVX512F_MICROKERNEL_SRCS, |
| 8801 | cflags: [ |
| 8802 | "-mavx512f", |
| 8803 | ], |
| 8804 | }, |
| 8805 | }, |
| 8806 | header_libs: [ |
| 8807 | "fp16_headers", |
| 8808 | ], |
| 8809 | static_libs: [ |
| 8810 | "libpthreadpool", |
| 8811 | "xnnpack_tables", |
| 8812 | ], |
| 8813 | } |
| 8814 | |
| 8815 | cc_library_static { |
| 8816 | name: "xnnpack_amalgam_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8817 | defaults: ["xnnpack_internal_default"], |
| 8818 | arch: { |
| 8819 | arm: { |
| 8820 | whole_static_libs: [ |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8821 | "xnnpack_neon_prod_microkernels", |
| 8822 | "xnnpack_neonfp16_prod_microkernels", |
| 8823 | "xnnpack_neonfma_prod_microkernels", |
| 8824 | "xnnpack_neonv8_prod_microkernels", |
| 8825 | "xnnpack_neondot_prod_microkernels", |
| 8826 | "xnnpack_asm_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8827 | ], |
| 8828 | }, |
| 8829 | arm64: { |
| 8830 | whole_static_libs: [ |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8831 | "xnnpack_neon_prod_microkernels", |
| 8832 | "xnnpack_neonfp16_prod_microkernels", |
| 8833 | "xnnpack_neonfma_prod_microkernels", |
| 8834 | "xnnpack_neonv8_prod_microkernels", |
| 8835 | "xnnpack_neonfp16arith_prod_microkernels", |
| 8836 | "xnnpack_neondot_prod_microkernels", |
| 8837 | "xnnpack_asm_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8838 | ], |
| 8839 | }, |
| 8840 | x86: { |
| 8841 | whole_static_libs: [ |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8842 | "xnnpack_sse2_amalgam_microkernels", |
| 8843 | "xnnpack_ssse3_amalgam_microkernels", |
| 8844 | "xnnpack_sse41_amalgam_microkernels", |
| 8845 | "xnnpack_avx_amalgam_microkernels", |
| 8846 | "xnnpack_f16c_amalgam_microkernels", |
| 8847 | "xnnpack_fma3_amalgam_microkernels", |
| 8848 | "xnnpack_avx2_amalgam_microkernels", |
| 8849 | "xnnpack_avx512f_amalgam_microkernels", |
| 8850 | "xnnpack_avx512skx_amalgam_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8851 | ], |
| 8852 | }, |
| 8853 | x86_64: { |
| 8854 | whole_static_libs: [ |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8855 | "xnnpack_sse2_amalgam_microkernels", |
| 8856 | "xnnpack_ssse3_amalgam_microkernels", |
| 8857 | "xnnpack_sse41_amalgam_microkernels", |
| 8858 | "xnnpack_avx_amalgam_microkernels", |
| 8859 | "xnnpack_f16c_amalgam_microkernels", |
| 8860 | "xnnpack_fma3_amalgam_microkernels", |
| 8861 | "xnnpack_avx2_amalgam_microkernels", |
| 8862 | "xnnpack_avx512f_amalgam_microkernels", |
| 8863 | "xnnpack_avx512skx_amalgam_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8864 | ], |
| 8865 | }, |
| 8866 | }, |
| 8867 | whole_static_libs: [ |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 8868 | "xnnpack_scalar_prod_microkernels", |
| 8869 | "xnnpack_tables", |
| 8870 | ], |
| 8871 | } |
| 8872 | |
| 8873 | cc_library_static { |
| 8874 | name: "xnnpack_bench_microkernels", |
| 8875 | defaults: ["xnnpack_internal_default"], |
| 8876 | arch: { |
| 8877 | arm: { |
| 8878 | whole_static_libs: [ |
| 8879 | "xnnpack_neon_bench_microkernels", |
| 8880 | "xnnpack_neonfp16_bench_microkernels", |
| 8881 | "xnnpack_neonfma_bench_microkernels", |
| 8882 | "xnnpack_neonv8_bench_microkernels", |
| 8883 | "xnnpack_neondot_bench_microkernels", |
| 8884 | "xnnpack_asm_microkernels", |
| 8885 | ], |
| 8886 | }, |
| 8887 | arm64: { |
| 8888 | whole_static_libs: [ |
| 8889 | "xnnpack_neon_bench_microkernels", |
| 8890 | "xnnpack_neonfp16_bench_microkernels", |
| 8891 | "xnnpack_neonfma_bench_microkernels", |
| 8892 | "xnnpack_neonv8_bench_microkernels", |
| 8893 | "xnnpack_neondot_bench_microkernels", |
| 8894 | "xnnpack_asm_microkernels", |
| 8895 | ], |
| 8896 | }, |
| 8897 | x86: { |
| 8898 | whole_static_libs: [ |
| 8899 | "xnnpack_sse2_bench_microkernels", |
| 8900 | "xnnpack_ssse3_bench_microkernels", |
| 8901 | "xnnpack_sse41_bench_microkernels", |
| 8902 | "xnnpack_avx_bench_microkernels", |
| 8903 | "xnnpack_f16c_bench_microkernels", |
| 8904 | "xnnpack_xop_bench_microkernels", |
| 8905 | "xnnpack_fma3_bench_microkernels", |
| 8906 | "xnnpack_avx2_bench_microkernels", |
| 8907 | "xnnpack_avx512f_bench_microkernels", |
| 8908 | "xnnpack_avx512skx_bench_microkernels", |
| 8909 | ], |
| 8910 | }, |
| 8911 | x86_64: { |
| 8912 | whole_static_libs: [ |
| 8913 | "xnnpack_sse2_bench_microkernels", |
| 8914 | "xnnpack_ssse3_bench_microkernels", |
| 8915 | "xnnpack_sse41_bench_microkernels", |
| 8916 | "xnnpack_avx_bench_microkernels", |
| 8917 | "xnnpack_f16c_bench_microkernels", |
| 8918 | "xnnpack_xop_bench_microkernels", |
| 8919 | "xnnpack_fma3_bench_microkernels", |
| 8920 | "xnnpack_avx2_bench_microkernels", |
| 8921 | "xnnpack_avx512f_bench_microkernels", |
| 8922 | "xnnpack_avx512skx_bench_microkernels", |
| 8923 | ], |
| 8924 | }, |
| 8925 | }, |
| 8926 | whole_static_libs: [ |
| 8927 | "xnnpack_scalar_bench_microkernels", |
| 8928 | "xnnpack_tables", |
| 8929 | ], |
| 8930 | } |
| 8931 | |
| 8932 | cc_library_static { |
| 8933 | name: "xnnpack_prod_microkernels", |
| 8934 | defaults: ["xnnpack_internal_default"], |
| 8935 | arch: { |
| 8936 | arm: { |
| 8937 | whole_static_libs: [ |
| 8938 | "xnnpack_neon_prod_microkernels", |
| 8939 | "xnnpack_neonfp16_prod_microkernels", |
| 8940 | "xnnpack_neonfma_prod_microkernels", |
| 8941 | "xnnpack_neonv8_prod_microkernels", |
| 8942 | "xnnpack_neondot_prod_microkernels", |
| 8943 | "xnnpack_asm_microkernels", |
| 8944 | ], |
| 8945 | }, |
| 8946 | arm64: { |
| 8947 | whole_static_libs: [ |
| 8948 | "xnnpack_neon_prod_microkernels", |
| 8949 | "xnnpack_neonfp16_prod_microkernels", |
| 8950 | "xnnpack_neonfma_prod_microkernels", |
| 8951 | "xnnpack_neonv8_prod_microkernels", |
| 8952 | "xnnpack_neonfp16arith_prod_microkernels", |
| 8953 | "xnnpack_neondot_prod_microkernels", |
| 8954 | "xnnpack_asm_microkernels", |
| 8955 | ], |
| 8956 | }, |
| 8957 | x86: { |
| 8958 | whole_static_libs: [ |
| 8959 | "xnnpack_sse2_prod_microkernels", |
| 8960 | "xnnpack_ssse3_prod_microkernels", |
| 8961 | "xnnpack_sse41_prod_microkernels", |
| 8962 | "xnnpack_avx_prod_microkernels", |
| 8963 | "xnnpack_f16c_prod_microkernels", |
| 8964 | "xnnpack_xop_prod_microkernels", |
| 8965 | "xnnpack_fma3_prod_microkernels", |
| 8966 | "xnnpack_avx2_prod_microkernels", |
| 8967 | "xnnpack_avx512f_prod_microkernels", |
| 8968 | "xnnpack_avx512skx_prod_microkernels", |
| 8969 | ], |
| 8970 | }, |
| 8971 | x86_64: { |
| 8972 | whole_static_libs: [ |
| 8973 | "xnnpack_sse2_prod_microkernels", |
| 8974 | "xnnpack_ssse3_prod_microkernels", |
| 8975 | "xnnpack_sse41_prod_microkernels", |
| 8976 | "xnnpack_avx_prod_microkernels", |
| 8977 | "xnnpack_f16c_prod_microkernels", |
| 8978 | "xnnpack_xop_prod_microkernels", |
| 8979 | "xnnpack_fma3_prod_microkernels", |
| 8980 | "xnnpack_avx2_prod_microkernels", |
| 8981 | "xnnpack_avx512f_prod_microkernels", |
| 8982 | "xnnpack_avx512skx_prod_microkernels", |
| 8983 | ], |
| 8984 | }, |
| 8985 | }, |
| 8986 | whole_static_libs: [ |
| 8987 | "xnnpack_scalar_prod_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 8988 | "xnnpack_tables", |
| 8989 | ], |
| 8990 | } |
| 8991 | |
| 8992 | cc_library_static { |
| 8993 | name: "libXNNPACK", |
| 8994 | defaults: ["xnnpack_internal_default"], |
| 8995 | export_include_dirs: ["include"], |
| 8996 | srcs: [ |
| 8997 | "src/init.c", |
| 8998 | "src/runtime.c", |
| 8999 | "src/subgraph.c", |
| 9000 | "src/tensor.c", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9001 | ] + SUBGRAPH_SRCS, |
| 9002 | header_libs: [ |
| 9003 | "fp16_headers", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9004 | ], |
| 9005 | whole_static_libs: [ |
| 9006 | "libclog", |
| 9007 | "libcpuinfo", |
| 9008 | "libpthreadpool", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 9009 | "xnnpack_jit", |
| 9010 | "xnnpack_jit_memory", |
| 9011 | "xnnpack_prod_microkernels", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9012 | "xnnpack_operators", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9013 | "xnnpack_logging_utils", |
| 9014 | "xnnpack_memory_planner", |
| 9015 | "xnnpack_packing", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9016 | ], |
| 9017 | } |
| 9018 | |
| 9019 | // Tests and benchmarks |
| 9020 | cc_defaults { |
| 9021 | name: "xnnpack_tests_default", |
| 9022 | vendor_available: true, |
| 9023 | stl: "libc++_static", |
| 9024 | local_include_dirs: [ |
| 9025 | "bench", |
| 9026 | "models", |
| 9027 | "test", |
| 9028 | "src", |
| 9029 | ], |
| 9030 | cflags: [ |
| Miao Wang | 400e404 | 2020-04-17 10:15:59 -0700 | [diff] [blame] | 9031 | "-Wno-unused-function", |
| 9032 | "-Wno-unused-parameter", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9033 | "-Wno-unused-private-field", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9034 | ], |
| 9035 | header_libs: [ |
| 9036 | "fp16_headers", |
| 9037 | ], |
| 9038 | static_libs: [ |
| 9039 | "libXNNPACK", |
| 9040 | "libpthreadpool", |
| 9041 | "libgmock", |
| 9042 | ], |
| 9043 | shared_libs: [ |
| 9044 | "liblog", |
| 9045 | ], |
| 9046 | } |
| 9047 | |
| 9048 | cc_library_static { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9049 | name: "xnnpack_mobilenet_v1_fp32", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9050 | defaults: ["xnnpack_tests_default"], |
| 9051 | srcs: [ |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9052 | "models/fp32-mobilenet-v1.cc", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9053 | ], |
| 9054 | } |
| 9055 | |
| 9056 | cc_library_static { |
| Miao Wang | 338e80e | 2021-03-23 08:56:09 -0700 | [diff] [blame] | 9057 | name: "xnnpack_mobilenet_v1_fp32_sparse", |
| 9058 | defaults: ["xnnpack_tests_default"], |
| 9059 | srcs: [ |
| 9060 | "models/fp32-sparse-mobilenet-v1.cc", |
| 9061 | ], |
| 9062 | } |
| 9063 | |
| 9064 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 9065 | name: "xnnpack_qc8_mobilenet_v1", |
| 9066 | defaults: ["xnnpack_tests_default"], |
| 9067 | srcs: [ |
| 9068 | "models/qc8-mobilenet-v1.cc", |
| 9069 | ], |
| 9070 | } |
| 9071 | |
| 9072 | cc_library_static { |
| 9073 | name: "xnnpack_qc8_mobilenet_v2", |
| 9074 | defaults: ["xnnpack_tests_default"], |
| 9075 | srcs: [ |
| 9076 | "models/qc8-mobilenet-v2.cc", |
| 9077 | ], |
| 9078 | } |
| 9079 | |
| 9080 | cc_library_static { |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 9081 | name: "xnnpack_qs8_mobilenet_v1", |
| 9082 | defaults: ["xnnpack_tests_default"], |
| 9083 | srcs: [ |
| 9084 | "models/qs8-mobilenet-v1.cc", |
| 9085 | ], |
| 9086 | } |
| 9087 | |
| 9088 | cc_library_static { |
| Miao Wang | 338e80e | 2021-03-23 08:56:09 -0700 | [diff] [blame] | 9089 | name: "xnnpack_qu8_mobilenet_v1", |
| 9090 | defaults: ["xnnpack_tests_default"], |
| 9091 | srcs: [ |
| 9092 | "models/qu8-mobilenet-v1.cc", |
| 9093 | ], |
| 9094 | } |
| 9095 | |
| 9096 | cc_library_static { |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 9097 | name: "xnnpack_qu8_mobilenet_v2", |
| 9098 | defaults: ["xnnpack_tests_default"], |
| 9099 | srcs: [ |
| 9100 | "models/qu8-mobilenet-v2.cc", |
| 9101 | ], |
| 9102 | } |
| 9103 | |
| 9104 | cc_library_static { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9105 | name: "xnnpack_mobilenet_v1_fp16", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9106 | defaults: ["xnnpack_tests_default"], |
| 9107 | srcs: [ |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9108 | "models/fp16-mobilenet-v1.cc", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9109 | ], |
| 9110 | } |
| 9111 | |
| 9112 | cc_library_static { |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 9113 | name: "xnnpack_qs8_mobilenet_v2", |
| 9114 | defaults: ["xnnpack_tests_default"], |
| 9115 | srcs: [ |
| 9116 | "models/qs8-mobilenet-v2.cc", |
| 9117 | ], |
| 9118 | } |
| 9119 | |
| 9120 | cc_library_static { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9121 | name: "xnnpack_mobilenet_v2_fp32", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9122 | defaults: ["xnnpack_tests_default"], |
| 9123 | srcs: [ |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9124 | "models/fp32-mobilenet-v2.cc", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9125 | ], |
| 9126 | } |
| 9127 | |
| 9128 | cc_library_static { |
| Miao Wang | 338e80e | 2021-03-23 08:56:09 -0700 | [diff] [blame] | 9129 | name: "xnnpack_mobilenet_v2_fp32_sparse", |
| 9130 | defaults: ["xnnpack_tests_default"], |
| 9131 | srcs: [ |
| 9132 | "models/fp32-sparse-mobilenet-v2.cc", |
| 9133 | ], |
| 9134 | } |
| 9135 | |
| 9136 | cc_library_static { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9137 | name: "xnnpack_mobilenet_v2_fp16", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9138 | defaults: ["xnnpack_tests_default"], |
| 9139 | srcs: [ |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9140 | "models/fp16-mobilenet-v2.cc", |
| 9141 | ], |
| 9142 | } |
| 9143 | |
| 9144 | |
| 9145 | cc_library_static { |
| 9146 | name: "xnnpack_mobilenet_v3_large_fp32", |
| 9147 | defaults: ["xnnpack_tests_default"], |
| 9148 | srcs: [ |
| 9149 | "models/fp32-mobilenet-v3-large.cc", |
| 9150 | ], |
| 9151 | } |
| 9152 | |
| 9153 | cc_library_static { |
| Miao Wang | 338e80e | 2021-03-23 08:56:09 -0700 | [diff] [blame] | 9154 | name: "xnnpack_mobilenet_v3_large_fp32_sparse", |
| 9155 | defaults: ["xnnpack_tests_default"], |
| 9156 | srcs: [ |
| 9157 | "models/fp32-sparse-mobilenet-v3-large.cc", |
| 9158 | ], |
| 9159 | } |
| 9160 | |
| 9161 | cc_library_static { |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 9162 | name: "xnnpack_mobilenet_v3_large_fp16", |
| 9163 | defaults: ["xnnpack_tests_default"], |
| 9164 | srcs: [ |
| 9165 | "models/fp16-mobilenet-v3-large.cc", |
| 9166 | ], |
| 9167 | } |
| 9168 | |
| 9169 | cc_library_static { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9170 | name: "xnnpack_mobilenet_v3_small_fp32", |
| 9171 | defaults: ["xnnpack_tests_default"], |
| 9172 | srcs: [ |
| 9173 | "models/fp32-mobilenet-v3-small.cc", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9174 | ], |
| 9175 | } |
| 9176 | |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 9177 | cc_library_static { |
| Miao Wang | 338e80e | 2021-03-23 08:56:09 -0700 | [diff] [blame] | 9178 | name: "xnnpack_mobilenet_v3_small_fp32_sparse", |
| 9179 | defaults: ["xnnpack_tests_default"], |
| 9180 | srcs: [ |
| 9181 | "models/fp32-sparse-mobilenet-v3-small.cc", |
| 9182 | ], |
| 9183 | } |
| 9184 | |
| 9185 | cc_library_static { |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 9186 | name: "xnnpack_mobilenet_v3_small_fp16", |
| 9187 | defaults: ["xnnpack_tests_default"], |
| 9188 | srcs: [ |
| 9189 | "models/fp16-mobilenet-v3-small.cc", |
| 9190 | ], |
| 9191 | } |
| 9192 | |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9193 | cc_benchmark { |
| 9194 | name: "xnnpack_end2end_bench", |
| 9195 | defaults: ["xnnpack_tests_default"], |
| 9196 | srcs: [ |
| 9197 | "bench/end2end.cc", |
| 9198 | "bench/utils.cc", |
| 9199 | ], |
| 9200 | cflags: [ |
| 9201 | "-Wno-unused-result" |
| 9202 | ], |
| 9203 | static_libs: [ |
| 9204 | "libcpuinfo", |
| 9205 | "libgoogle-benchmark", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 9206 | "xnnpack_qc8_mobilenet_v1", |
| 9207 | "xnnpack_qc8_mobilenet_v2", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 9208 | "xnnpack_qs8_mobilenet_v1", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9209 | "xnnpack_mobilenet_v1_fp32", |
| Miao Wang | 338e80e | 2021-03-23 08:56:09 -0700 | [diff] [blame] | 9210 | "xnnpack_mobilenet_v1_fp32_sparse", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9211 | "xnnpack_mobilenet_v1_fp16", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 9212 | "xnnpack_qs8_mobilenet_v2", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9213 | "xnnpack_mobilenet_v2_fp32", |
| Miao Wang | 338e80e | 2021-03-23 08:56:09 -0700 | [diff] [blame] | 9214 | "xnnpack_mobilenet_v2_fp32_sparse", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9215 | "xnnpack_mobilenet_v2_fp16", |
| 9216 | "xnnpack_mobilenet_v3_large_fp32", |
| Miao Wang | 338e80e | 2021-03-23 08:56:09 -0700 | [diff] [blame] | 9217 | "xnnpack_mobilenet_v3_large_fp32_sparse", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 9218 | "xnnpack_mobilenet_v3_large_fp16", |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9219 | "xnnpack_mobilenet_v3_small_fp32", |
| Miao Wang | 338e80e | 2021-03-23 08:56:09 -0700 | [diff] [blame] | 9220 | "xnnpack_mobilenet_v3_small_fp32_sparse", |
| Miao Wang | 5eea831 | 2020-12-07 09:12:40 -0800 | [diff] [blame] | 9221 | "xnnpack_mobilenet_v3_small_fp16", |
| Miao Wang | 338e80e | 2021-03-23 08:56:09 -0700 | [diff] [blame] | 9222 | "xnnpack_qu8_mobilenet_v1", |
| Miao Wang | 663cd1e | 2022-02-04 21:08:55 +0000 | [diff] [blame] | 9223 | "xnnpack_qu8_mobilenet_v2", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9224 | ], |
| 9225 | } |
| 9226 | |
| 9227 | cc_test { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9228 | name: "xnnpack_abs_nc_test", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9229 | defaults: ["xnnpack_tests_default"], |
| 9230 | srcs: [ |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9231 | "test/abs-nc.cc", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9232 | ], |
| 9233 | test_suites: [ |
| 9234 | "general-tests", |
| 9235 | ], |
| 9236 | } |
| 9237 | |
| 9238 | cc_test { |
| 9239 | name: "xnnpack_add_nd_test", |
| 9240 | defaults: ["xnnpack_tests_default"], |
| 9241 | srcs: [ |
| 9242 | "test/add-nd.cc", |
| 9243 | ], |
| 9244 | test_suites: [ |
| 9245 | "general-tests", |
| 9246 | ], |
| 9247 | } |
| 9248 | |
| 9249 | cc_test { |
| 9250 | name: "xnnpack_argmax_pooling_nhwc_test", |
| 9251 | defaults: ["xnnpack_tests_default"], |
| 9252 | srcs: [ |
| 9253 | "test/argmax-pooling-nhwc.cc", |
| 9254 | ], |
| 9255 | test_suites: [ |
| 9256 | "general-tests", |
| 9257 | ], |
| 9258 | } |
| 9259 | |
| 9260 | cc_test { |
| 9261 | name: "xnnpack_average_pooling_nhwc_test", |
| 9262 | defaults: ["xnnpack_tests_default"], |
| 9263 | srcs: [ |
| 9264 | "test/average-pooling-nhwc.cc", |
| 9265 | ], |
| 9266 | test_suites: [ |
| 9267 | "general-tests", |
| 9268 | ], |
| 9269 | } |
| 9270 | |
| 9271 | cc_test { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9272 | name: "xnnpack_bankers_rounding_nc_test", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9273 | defaults: ["xnnpack_tests_default"], |
| 9274 | srcs: [ |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9275 | "test/bankers-rounding-nc.cc", |
| 9276 | ], |
| 9277 | test_suites: [ |
| 9278 | "general-tests", |
| 9279 | ], |
| 9280 | } |
| 9281 | |
| 9282 | cc_test { |
| 9283 | name: "xnnpack_ceiling_nc_test", |
| 9284 | defaults: ["xnnpack_tests_default"], |
| 9285 | srcs: [ |
| 9286 | "test/ceiling-nc.cc", |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9287 | ], |
| 9288 | test_suites: [ |
| 9289 | "general-tests", |
| 9290 | ], |
| 9291 | } |
| 9292 | |
| 9293 | cc_test { |
| 9294 | name: "xnnpack_channel_shuffle_nc_test", |
| 9295 | defaults: ["xnnpack_tests_default"], |
| 9296 | srcs: [ |
| 9297 | "test/channel-shuffle-nc.cc", |
| 9298 | ], |
| 9299 | test_suites: [ |
| 9300 | "general-tests", |
| 9301 | ], |
| 9302 | } |
| 9303 | |
| 9304 | cc_test { |
| 9305 | name: "xnnpack_clamp_nc_test", |
| 9306 | defaults: ["xnnpack_tests_default"], |
| 9307 | srcs: [ |
| 9308 | "test/clamp-nc.cc", |
| 9309 | ], |
| 9310 | test_suites: [ |
| 9311 | "general-tests", |
| 9312 | ], |
| 9313 | } |
| 9314 | |
| 9315 | cc_test { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9316 | name: "xnnpack_constant_pad_nd_test", |
| 9317 | defaults: ["xnnpack_tests_default"], |
| 9318 | srcs: [ |
| 9319 | "test/constant-pad-nd.cc", |
| 9320 | ], |
| 9321 | test_suites: [ |
| 9322 | "general-tests", |
| 9323 | ], |
| 9324 | } |
| 9325 | |
| 9326 | cc_test { |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9327 | name: "xnnpack_convolution_nhwc_test", |
| 9328 | defaults: ["xnnpack_tests_default"], |
| 9329 | srcs: [ |
| 9330 | "test/convolution-nhwc.cc", |
| 9331 | ], |
| 9332 | test_suites: [ |
| 9333 | "general-tests", |
| 9334 | ], |
| 9335 | } |
| 9336 | |
| 9337 | cc_test { |
| 9338 | name: "xnnpack_convolution_nchw_test", |
| 9339 | defaults: ["xnnpack_tests_default"], |
| 9340 | srcs: [ |
| 9341 | "test/convolution-nchw.cc", |
| 9342 | ], |
| 9343 | test_suites: [ |
| 9344 | "general-tests", |
| 9345 | ], |
| 9346 | } |
| 9347 | |
| 9348 | cc_test { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9349 | name: "xnnpack_copy_nc_test", |
| 9350 | defaults: ["xnnpack_tests_default"], |
| 9351 | srcs: [ |
| 9352 | "test/copy-nc.cc", |
| 9353 | ], |
| 9354 | test_suites: [ |
| 9355 | "general-tests", |
| 9356 | ], |
| 9357 | } |
| 9358 | |
| 9359 | cc_test { |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9360 | name: "xnnpack_deconvolution_nhwc_test", |
| 9361 | defaults: ["xnnpack_tests_default"], |
| 9362 | srcs: [ |
| 9363 | "test/deconvolution-nhwc.cc", |
| 9364 | ], |
| 9365 | test_suites: [ |
| 9366 | "general-tests", |
| 9367 | ], |
| 9368 | } |
| 9369 | |
| 9370 | cc_test { |
| 9371 | name: "xnnpack_divide_nd_test", |
| 9372 | defaults: ["xnnpack_tests_default"], |
| 9373 | srcs: [ |
| 9374 | "test/divide-nd.cc", |
| 9375 | ], |
| 9376 | test_suites: [ |
| 9377 | "general-tests", |
| 9378 | ], |
| 9379 | } |
| 9380 | |
| 9381 | cc_test { |
| 9382 | name: "xnnpack_fully_connected_nc_test", |
| 9383 | defaults: ["xnnpack_tests_default"], |
| 9384 | srcs: [ |
| 9385 | "test/fully-connected-nc.cc", |
| 9386 | ], |
| 9387 | test_suites: [ |
| 9388 | "general-tests", |
| 9389 | ], |
| 9390 | } |
| 9391 | |
| 9392 | cc_test { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9393 | name: "xnnpack_floor_nc_test", |
| 9394 | defaults: ["xnnpack_tests_default"], |
| 9395 | srcs: [ |
| 9396 | "test/floor-nc.cc", |
| 9397 | ], |
| 9398 | test_suites: [ |
| 9399 | "general-tests", |
| 9400 | ], |
| 9401 | } |
| 9402 | |
| 9403 | cc_test { |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9404 | name: "xnnpack_global_average_pooling_nwc_test", |
| 9405 | defaults: ["xnnpack_tests_default"], |
| 9406 | srcs: [ |
| 9407 | "test/global-average-pooling-nwc.cc", |
| 9408 | ], |
| 9409 | test_suites: [ |
| 9410 | "general-tests", |
| 9411 | ], |
| 9412 | } |
| 9413 | |
| 9414 | cc_test { |
| 9415 | name: "xnnpack_global_average_pooling_ncw_test", |
| 9416 | defaults: ["xnnpack_tests_default"], |
| 9417 | srcs: [ |
| 9418 | "test/global-average-pooling-ncw.cc", |
| 9419 | ], |
| 9420 | test_suites: [ |
| 9421 | "general-tests", |
| 9422 | ], |
| 9423 | } |
| 9424 | |
| 9425 | cc_test { |
| 9426 | name: "xnnpack_hardswish_nc_test", |
| 9427 | defaults: ["xnnpack_tests_default"], |
| 9428 | srcs: [ |
| 9429 | "test/hardswish-nc.cc", |
| 9430 | ], |
| 9431 | test_suites: [ |
| 9432 | "general-tests", |
| 9433 | ], |
| 9434 | } |
| 9435 | |
| 9436 | cc_test { |
| 9437 | name: "xnnpack_leaky_relu_nc_test", |
| 9438 | defaults: ["xnnpack_tests_default"], |
| 9439 | srcs: [ |
| 9440 | "test/leaky-relu-nc.cc", |
| 9441 | ], |
| 9442 | test_suites: [ |
| 9443 | "general-tests", |
| 9444 | ], |
| 9445 | } |
| 9446 | |
| 9447 | cc_test { |
| 9448 | name: "xnnpack_max_pooling_nhwc_test", |
| 9449 | defaults: ["xnnpack_tests_default"], |
| 9450 | srcs: [ |
| 9451 | "test/max-pooling-nhwc.cc", |
| 9452 | ], |
| 9453 | test_suites: [ |
| 9454 | "general-tests", |
| 9455 | ], |
| 9456 | } |
| 9457 | |
| 9458 | cc_test { |
| 9459 | name: "xnnpack_maximum_nd_test", |
| 9460 | defaults: ["xnnpack_tests_default"], |
| 9461 | srcs: [ |
| 9462 | "test/maximum-nd.cc", |
| 9463 | ], |
| 9464 | test_suites: [ |
| 9465 | "general-tests", |
| 9466 | ], |
| 9467 | } |
| 9468 | |
| 9469 | cc_test { |
| 9470 | name: "xnnpack_minimum_nd_test", |
| 9471 | defaults: ["xnnpack_tests_default"], |
| 9472 | srcs: [ |
| 9473 | "test/minimum-nd.cc", |
| 9474 | ], |
| 9475 | test_suites: [ |
| 9476 | "general-tests", |
| 9477 | ], |
| 9478 | } |
| 9479 | |
| 9480 | cc_test { |
| 9481 | name: "xnnpack_multiply_nd_test", |
| 9482 | defaults: ["xnnpack_tests_default"], |
| 9483 | srcs: [ |
| 9484 | "test/multiply-nd.cc", |
| 9485 | ], |
| 9486 | test_suites: [ |
| 9487 | "general-tests", |
| 9488 | ], |
| 9489 | } |
| 9490 | |
| 9491 | cc_test { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9492 | name: "xnnpack_negate_nc_test", |
| 9493 | defaults: ["xnnpack_tests_default"], |
| 9494 | srcs: [ |
| 9495 | "test/negate-nc.cc", |
| 9496 | ], |
| 9497 | test_suites: [ |
| 9498 | "general-tests", |
| 9499 | ], |
| 9500 | } |
| 9501 | |
| 9502 | cc_test { |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9503 | name: "xnnpack_prelu_nc_test", |
| 9504 | defaults: ["xnnpack_tests_default"], |
| 9505 | srcs: [ |
| 9506 | "test/prelu-nc.cc", |
| 9507 | ], |
| 9508 | test_suites: [ |
| 9509 | "general-tests", |
| 9510 | ], |
| 9511 | } |
| 9512 | |
| 9513 | cc_test { |
| 9514 | name: "xnnpack_resize_bilinear_nhwc_test", |
| 9515 | defaults: ["xnnpack_tests_default"], |
| 9516 | srcs: [ |
| 9517 | "test/resize-bilinear-nhwc.cc", |
| 9518 | ], |
| 9519 | test_suites: [ |
| 9520 | "general-tests", |
| 9521 | ], |
| 9522 | } |
| 9523 | |
| 9524 | cc_test { |
| 9525 | name: "xnnpack_sigmoid_nc_test", |
| 9526 | defaults: ["xnnpack_tests_default"], |
| 9527 | srcs: [ |
| 9528 | "test/sigmoid-nc.cc", |
| 9529 | ], |
| 9530 | test_suites: [ |
| 9531 | "general-tests", |
| 9532 | ], |
| 9533 | } |
| 9534 | |
| 9535 | cc_test { |
| 9536 | name: "xnnpack_softmax_nc_test", |
| 9537 | defaults: ["xnnpack_tests_default"], |
| 9538 | srcs: [ |
| 9539 | "test/softmax-nc.cc", |
| 9540 | ], |
| 9541 | test_suites: [ |
| 9542 | "general-tests", |
| 9543 | ], |
| 9544 | } |
| 9545 | |
| 9546 | cc_test { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9547 | name: "xnnpack_square_nc_test", |
| 9548 | defaults: ["xnnpack_tests_default"], |
| 9549 | srcs: [ |
| 9550 | "test/square-nc.cc", |
| 9551 | ], |
| 9552 | test_suites: [ |
| 9553 | "general-tests", |
| 9554 | ], |
| 9555 | } |
| 9556 | |
| 9557 | cc_test { |
| 9558 | name: "xnnpack_square_root_nc_test", |
| 9559 | defaults: ["xnnpack_tests_default"], |
| 9560 | srcs: [ |
| 9561 | "test/square-root-nc.cc", |
| 9562 | ], |
| 9563 | test_suites: [ |
| 9564 | "general-tests", |
| 9565 | ], |
| 9566 | } |
| 9567 | |
| 9568 | cc_test { |
| 9569 | name: "xnnpack_square_difference_nd_test", |
| 9570 | defaults: ["xnnpack_tests_default"], |
| 9571 | srcs: [ |
| 9572 | "test/squared-difference-nd.cc", |
| 9573 | ], |
| 9574 | test_suites: [ |
| 9575 | "general-tests", |
| 9576 | ], |
| 9577 | } |
| 9578 | |
| 9579 | cc_test { |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9580 | name: "xnnpack_subtract_nd_test", |
| 9581 | defaults: ["xnnpack_tests_default"], |
| 9582 | srcs: [ |
| 9583 | "test/subtract-nd.cc", |
| 9584 | ], |
| 9585 | test_suites: [ |
| 9586 | "general-tests", |
| 9587 | ], |
| 9588 | } |
| 9589 | |
| 9590 | cc_test { |
| Miao Wang | 86f5fbe | 2020-07-24 11:16:10 -0700 | [diff] [blame] | 9591 | name: "xnnpack_truncation_nc_test", |
| 9592 | defaults: ["xnnpack_tests_default"], |
| 9593 | srcs: [ |
| 9594 | "test/truncation-nc.cc", |
| 9595 | ], |
| 9596 | test_suites: [ |
| 9597 | "general-tests", |
| 9598 | ], |
| 9599 | } |
| 9600 | |
| 9601 | cc_test { |
| Miao Wang | e999347 | 2020-02-10 15:00:10 -0800 | [diff] [blame] | 9602 | name: "xnnpack_unpooling_nhwc_test", |
| 9603 | defaults: ["xnnpack_tests_default"], |
| 9604 | srcs: [ |
| 9605 | "test/unpooling-nhwc.cc", |
| 9606 | ], |
| 9607 | test_suites: [ |
| 9608 | "general-tests", |
| 9609 | ], |
| 9610 | } |