Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 1 | // Auto-generated file. Do not edit! |
| 2 | // Template: src/qs8-vmul/neon.c.in |
| 3 | // Generator: tools/xngen |
| 4 | // |
| 5 | // Copyright 2021 Google LLC |
| 6 | // |
| 7 | // This source code is licensed under the BSD-style license found in the |
| 8 | // LICENSE file in the root directory of this source tree. |
| 9 | |
| 10 | #include <assert.h> |
| 11 | |
| 12 | #include <arm_neon.h> |
| 13 | |
Marat Dukhan | 6428725 | 2021-09-07 16:20:03 -0700 | [diff] [blame] | 14 | #include <xnnpack/vmul.h> |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 15 | |
| 16 | |
| 17 | void xnn_qu8_vmul_minmax_fp32_ukernel__neon_ld64_x16( |
| 18 | size_t n, |
| 19 | const uint8_t* input_a, |
| 20 | const uint8_t* input_b, |
| 21 | uint8_t* output, |
Marat Dukhan | 7be427a | 2021-12-13 23:38:20 -0800 | [diff] [blame] | 22 | const union xnn_qu8_mul_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 23 | { |
Marat Dukhan | 1d90101 | 2021-08-04 17:01:12 -0700 | [diff] [blame] | 24 | const uint8x8_t va_zero_point = vld1_dup_u8(params->fp32_neon.a_zero_point); |
| 25 | const uint8x8_t vb_zero_point = vld1_dup_u8(params->fp32_neon.b_zero_point); |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 26 | const float32x4_t vscale = vld1q_dup_f32(¶ms->fp32_neon.scale); |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 27 | const float32x4_t vmagic_bias = vld1q_dup_f32(¶ms->fp32_neon.magic_bias); |
Marat Dukhan | 482508b | 2021-12-05 10:05:51 -0800 | [diff] [blame] | 28 | const int32x4_t vmagic_bias_less_output_zero_point = vld1q_dup_s32(¶ms->fp32_neon.magic_bias_less_output_zero_point); |
Marat Dukhan | c7d0728 | 2021-12-07 11:42:14 -0800 | [diff] [blame] | 29 | const uint8x16_t voutput_min = vld1q_dup_u8(¶ms->fp32_neon.output_min); |
Marat Dukhan | 482508b | 2021-12-05 10:05:51 -0800 | [diff] [blame] | 30 | const uint8x16_t voutput_max = vld1q_dup_u8(¶ms->fp32_neon.output_max); |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 31 | |
| 32 | for (; n >= 16 * sizeof(uint8_t); n -= 16 * sizeof(uint8_t)) { |
| 33 | const uint8x8_t va01234567 = vld1_u8(input_a); input_a += 8; |
| 34 | const uint8x8_t vb01234567 = vld1_u8(input_b); input_b += 8; |
| 35 | const uint8x8_t va89ABCDEF = vld1_u8(input_a); input_a += 8; |
| 36 | const uint8x8_t vb89ABCDEF = vld1_u8(input_b); input_b += 8; |
| 37 | |
| 38 | const int16x8_t vxa01234567 = vreinterpretq_s16_u16(vsubl_u8(va01234567, va_zero_point)); |
| 39 | const int16x8_t vxb01234567 = vreinterpretq_s16_u16(vsubl_u8(vb01234567, vb_zero_point)); |
| 40 | const int16x8_t vxa89ABCDEF = vreinterpretq_s16_u16(vsubl_u8(va89ABCDEF, va_zero_point)); |
| 41 | const int16x8_t vxb89ABCDEF = vreinterpretq_s16_u16(vsubl_u8(vb89ABCDEF, vb_zero_point)); |
| 42 | |
| 43 | int32x4_t vacc0123 = vmull_s16(vget_low_s16(vxa01234567), vget_low_s16(vxb01234567)); |
| 44 | int32x4_t vacc4567 = vmull_s16(vget_high_s16(vxa01234567), vget_high_s16(vxb01234567)); |
| 45 | int32x4_t vacc89AB = vmull_s16(vget_low_s16(vxa89ABCDEF), vget_low_s16(vxb89ABCDEF)); |
| 46 | int32x4_t vaccCDEF = vmull_s16(vget_high_s16(vxa89ABCDEF), vget_high_s16(vxb89ABCDEF)); |
| 47 | |
| 48 | float32x4_t vfpacc0123 = vcvtq_f32_s32(vacc0123); |
| 49 | float32x4_t vfpacc4567 = vcvtq_f32_s32(vacc4567); |
| 50 | float32x4_t vfpacc89AB = vcvtq_f32_s32(vacc89AB); |
| 51 | float32x4_t vfpaccCDEF = vcvtq_f32_s32(vaccCDEF); |
| 52 | |
| 53 | vfpacc0123 = vmulq_f32(vfpacc0123, vscale); |
| 54 | vfpacc4567 = vmulq_f32(vfpacc4567, vscale); |
| 55 | vfpacc89AB = vmulq_f32(vfpacc89AB, vscale); |
| 56 | vfpaccCDEF = vmulq_f32(vfpaccCDEF, vscale); |
| 57 | |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 58 | vacc0123 = vreinterpretq_s32_f32(vaddq_f32(vfpacc0123, vmagic_bias)); |
| 59 | vacc4567 = vreinterpretq_s32_f32(vaddq_f32(vfpacc4567, vmagic_bias)); |
| 60 | vacc89AB = vreinterpretq_s32_f32(vaddq_f32(vfpacc89AB, vmagic_bias)); |
| 61 | vaccCDEF = vreinterpretq_s32_f32(vaddq_f32(vfpaccCDEF, vmagic_bias)); |
| 62 | |
Marat Dukhan | c7d0728 | 2021-12-07 11:42:14 -0800 | [diff] [blame] | 63 | vacc0123 = vqsubq_s32(vacc0123, vmagic_bias_less_output_zero_point); |
| 64 | vacc4567 = vqsubq_s32(vacc4567, vmagic_bias_less_output_zero_point); |
| 65 | vacc89AB = vqsubq_s32(vacc89AB, vmagic_bias_less_output_zero_point); |
| 66 | vaccCDEF = vqsubq_s32(vaccCDEF, vmagic_bias_less_output_zero_point); |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 67 | |
Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 68 | #if XNN_ARCH_ARM64 |
| 69 | int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567); |
| 70 | int16x8_t vacc89ABCDEF = vqmovn_high_s32(vqmovn_s32(vacc89AB), vaccCDEF); |
| 71 | #else |
| 72 | int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567)); |
| 73 | int16x8_t vacc89ABCDEF = vcombine_s16(vqmovn_s32(vacc89AB), vqmovn_s32(vaccCDEF)); |
| 74 | #endif |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 75 | |
Marat Dukhan | 482508b | 2021-12-05 10:05:51 -0800 | [diff] [blame] | 76 | |
Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 77 | #if XNN_ARCH_ARM64 |
| 78 | uint8x16_t vout0123456789ABCDEF = vqmovun_high_s16(vqmovun_s16(vacc01234567), vacc89ABCDEF); |
| 79 | #else |
| 80 | uint8x16_t vout0123456789ABCDEF = vcombine_u8(vqmovun_s16(vacc01234567), vqmovun_s16(vacc89ABCDEF)); |
| 81 | #endif |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 82 | |
Marat Dukhan | c7d0728 | 2021-12-07 11:42:14 -0800 | [diff] [blame] | 83 | vout0123456789ABCDEF = vmaxq_u8(vout0123456789ABCDEF, voutput_min); |
| 84 | |
Marat Dukhan | 482508b | 2021-12-05 10:05:51 -0800 | [diff] [blame] | 85 | vout0123456789ABCDEF = vminq_u8(vout0123456789ABCDEF, voutput_max); |
| 86 | |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 87 | vst1q_u8(output, vout0123456789ABCDEF); output += 16; |
| 88 | } |
| 89 | if XNN_UNLIKELY(n != 0) { |
| 90 | do { |
| 91 | const uint8x8_t va01234567 = vld1_u8(input_a); input_a += 8; |
| 92 | const uint8x8_t vb01234567 = vld1_u8(input_b); input_b += 8; |
| 93 | |
| 94 | const int16x8_t vxa01234567 = vreinterpretq_s16_u16(vsubl_u8(va01234567, va_zero_point)); |
| 95 | const int16x8_t vxb01234567 = vreinterpretq_s16_u16(vsubl_u8(vb01234567, vb_zero_point)); |
| 96 | |
| 97 | int32x4_t vacc0123 = vmull_s16(vget_low_s16(vxa01234567), vget_low_s16(vxb01234567)); |
| 98 | int32x4_t vacc4567 = vmull_s16(vget_high_s16(vxa01234567), vget_high_s16(vxb01234567)); |
| 99 | |
| 100 | float32x4_t vfpacc0123 = vcvtq_f32_s32(vacc0123); |
| 101 | float32x4_t vfpacc4567 = vcvtq_f32_s32(vacc4567); |
| 102 | |
| 103 | vfpacc0123 = vmulq_f32(vfpacc0123, vscale); |
| 104 | vfpacc4567 = vmulq_f32(vfpacc4567, vscale); |
| 105 | |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 106 | vacc0123 = vreinterpretq_s32_f32(vaddq_f32(vfpacc0123, vmagic_bias)); |
| 107 | vacc4567 = vreinterpretq_s32_f32(vaddq_f32(vfpacc4567, vmagic_bias)); |
| 108 | |
Marat Dukhan | c7d0728 | 2021-12-07 11:42:14 -0800 | [diff] [blame] | 109 | vacc0123 = vqsubq_s32(vacc0123, vmagic_bias_less_output_zero_point); |
| 110 | vacc4567 = vqsubq_s32(vacc4567, vmagic_bias_less_output_zero_point); |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 111 | |
Marat Dukhan | 33a98fa | 2022-01-13 00:08:57 -0800 | [diff] [blame] | 112 | #if XNN_ARCH_ARM64 |
| 113 | int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567); |
| 114 | #else |
| 115 | int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567)); |
| 116 | #endif |
| 117 | |
| 118 | |
Marat Dukhan | 482508b | 2021-12-05 10:05:51 -0800 | [diff] [blame] | 119 | uint8x8_t vout01234567 = vqmovun_s16(vacc01234567); |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 120 | |
Marat Dukhan | c7d0728 | 2021-12-07 11:42:14 -0800 | [diff] [blame] | 121 | vout01234567 = vmax_u8(vout01234567, vget_low_u8(voutput_min)); |
Marat Dukhan | 482508b | 2021-12-05 10:05:51 -0800 | [diff] [blame] | 122 | vout01234567 = vmin_u8(vout01234567, vget_low_u8(voutput_max)); |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 123 | if XNN_LIKELY(n >= (8 * sizeof(uint8_t))) { |
| 124 | vst1_u8(output, vout01234567); output += 8; |
| 125 | n -= 8 * sizeof(uint8_t); |
| 126 | } else { |
| 127 | if (n & (4 * sizeof(uint8_t))) { |
Marat Dukhan | 5f7cf55 | 2021-11-25 17:37:03 -0800 | [diff] [blame] | 128 | vst1_lane_u32((void*) output, vreinterpret_u32_u8(vout01234567), 0); output += 4; |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 129 | vout01234567 = vext_u8(vout01234567, vout01234567, 4); |
| 130 | } |
| 131 | if (n & (2 * sizeof(uint8_t))) { |
Marat Dukhan | 5f7cf55 | 2021-11-25 17:37:03 -0800 | [diff] [blame] | 132 | vst1_lane_u16((void*) output, vreinterpret_u16_u8(vout01234567), 0); output += 2; |
Marat Dukhan | 4a7b70f | 2021-08-02 18:18:10 -0700 | [diff] [blame] | 133 | vout01234567 = vext_u8(vout01234567, vout01234567, 2); |
| 134 | } |
| 135 | if (n & (1 * sizeof(uint8_t))) { |
| 136 | vst1_lane_u8(output, vout01234567, 0); |
| 137 | } |
| 138 | n = 0; |
| 139 | } |
| 140 | } while (n != 0); |
| 141 | } |
| 142 | } |