| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1 | // Copyright 2020 Google LLC |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 2 | // |
| 3 | // This source code is licensed under the BSD-style license found in the |
| 4 | // LICENSE file in the root directory of this source tree. |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 5 | // |
| 6 | // Auto-generated file. Do not edit! |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 7 | // Specification: test/f32-dwconv2d-chw.yaml |
| 8 | // Generator: tools/generate-dwconv2d-chw-test.py |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9 | |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 10 | |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 11 | #include <gtest/gtest.h> |
| 12 | |
| Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 13 | #include <xnnpack/common.h> |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 14 | #include <xnnpack/isa-checks.h> |
| 15 | |
| Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 16 | #include <xnnpack/dwconv.h> |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 17 | #include "dwconv2d-microkernel-tester.h" |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 18 | |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 19 | |
| Marat Dukhan | c581e48 | 2020-10-24 01:28:11 -0700 | [diff] [blame] | 20 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 21 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4, output_width_eq_4) { |
| 22 | TEST_REQUIRES_ARM_NEON; |
| 23 | DWConv2DMicrokernelTester() |
| 24 | .input_width(4) |
| 25 | .input_height(1) |
| 26 | .kernel_height(3) |
| 27 | .kernel_width(3) |
| 28 | .subsampling(1) |
| 29 | .padding_left(1) |
| 30 | .padding_right(1) |
| 31 | .padding_top(1) |
| 32 | .padding_bottom(1) |
| 33 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4); |
| 34 | } |
| 35 | |
| 36 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4, output_width_div_4) { |
| 37 | TEST_REQUIRES_ARM_NEON; |
| 38 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 39 | DWConv2DMicrokernelTester() |
| 40 | .input_width(input_width) |
| 41 | .input_height(1) |
| 42 | .kernel_height(3) |
| 43 | .kernel_width(3) |
| 44 | .subsampling(1) |
| 45 | .padding_left(1) |
| 46 | .padding_right(1) |
| 47 | .padding_top(1) |
| 48 | .padding_bottom(1) |
| 49 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4); |
| 50 | } |
| 51 | } |
| 52 | |
| 53 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4, output_width_lt_4) { |
| 54 | TEST_REQUIRES_ARM_NEON; |
| 55 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 56 | DWConv2DMicrokernelTester() |
| 57 | .input_width(4) |
| 58 | .input_height(1) |
| 59 | .kernel_height(3) |
| 60 | .kernel_width(3) |
| 61 | .subsampling(1) |
| 62 | .padding_left(1) |
| 63 | .padding_right(1) |
| 64 | .padding_top(1) |
| 65 | .padding_bottom(1) |
| 66 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4); |
| 67 | } |
| 68 | } |
| 69 | |
| 70 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4, output_width_gt_4) { |
| 71 | TEST_REQUIRES_ARM_NEON; |
| 72 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 73 | DWConv2DMicrokernelTester() |
| 74 | .input_width(input_width) |
| 75 | .input_height(1) |
| 76 | .kernel_height(3) |
| 77 | .kernel_width(3) |
| 78 | .subsampling(1) |
| 79 | .padding_left(1) |
| 80 | .padding_right(1) |
| 81 | .padding_top(1) |
| 82 | .padding_bottom(1) |
| 83 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4); |
| 84 | } |
| 85 | } |
| 86 | |
| 87 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4, output_height_gt_1) { |
| 88 | TEST_REQUIRES_ARM_NEON; |
| 89 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 90 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 91 | DWConv2DMicrokernelTester() |
| 92 | .input_width(input_width) |
| 93 | .input_height(input_height) |
| 94 | .kernel_height(3) |
| 95 | .kernel_width(3) |
| 96 | .subsampling(1) |
| 97 | .padding_left(1) |
| 98 | .padding_right(1) |
| 99 | .padding_top(1) |
| 100 | .padding_bottom(1) |
| 101 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4); |
| 102 | } |
| 103 | } |
| 104 | } |
| 105 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 106 | |
| 107 | |
| 108 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 109 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4, output_width_eq_4) { |
| 110 | TEST_REQUIRES_ARM_NEON; |
| 111 | DWConv2DMicrokernelTester() |
| 112 | .input_width(4) |
| 113 | .input_height(2) |
| 114 | .kernel_height(3) |
| 115 | .kernel_width(3) |
| 116 | .subsampling(1) |
| 117 | .padding_left(1) |
| 118 | .padding_right(1) |
| 119 | .padding_top(1) |
| 120 | .padding_bottom(1) |
| 121 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4); |
| 122 | } |
| 123 | |
| 124 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4, output_width_div_4) { |
| 125 | TEST_REQUIRES_ARM_NEON; |
| 126 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 127 | DWConv2DMicrokernelTester() |
| 128 | .input_width(input_width) |
| 129 | .input_height(2) |
| 130 | .kernel_height(3) |
| 131 | .kernel_width(3) |
| 132 | .subsampling(1) |
| 133 | .padding_left(1) |
| 134 | .padding_right(1) |
| 135 | .padding_top(1) |
| 136 | .padding_bottom(1) |
| 137 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4); |
| 138 | } |
| 139 | } |
| 140 | |
| 141 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4, output_width_lt_4) { |
| 142 | TEST_REQUIRES_ARM_NEON; |
| 143 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 144 | DWConv2DMicrokernelTester() |
| 145 | .input_width(4) |
| 146 | .input_height(2) |
| 147 | .kernel_height(3) |
| 148 | .kernel_width(3) |
| 149 | .subsampling(1) |
| 150 | .padding_left(1) |
| 151 | .padding_right(1) |
| 152 | .padding_top(1) |
| 153 | .padding_bottom(1) |
| 154 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4); |
| 155 | } |
| 156 | } |
| 157 | |
| 158 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4, output_width_gt_4) { |
| 159 | TEST_REQUIRES_ARM_NEON; |
| 160 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 161 | DWConv2DMicrokernelTester() |
| 162 | .input_width(input_width) |
| 163 | .input_height(2) |
| 164 | .kernel_height(3) |
| 165 | .kernel_width(3) |
| 166 | .subsampling(1) |
| 167 | .padding_left(1) |
| 168 | .padding_right(1) |
| 169 | .padding_top(1) |
| 170 | .padding_bottom(1) |
| 171 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4); |
| 172 | } |
| 173 | } |
| 174 | |
| 175 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4, output_height_div_2) { |
| 176 | TEST_REQUIRES_ARM_NEON; |
| 177 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 178 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 179 | DWConv2DMicrokernelTester() |
| 180 | .input_width(input_width) |
| 181 | .input_height(input_height) |
| 182 | .kernel_height(3) |
| 183 | .kernel_width(3) |
| 184 | .subsampling(1) |
| 185 | .padding_left(1) |
| 186 | .padding_right(1) |
| 187 | .padding_top(1) |
| 188 | .padding_bottom(1) |
| 189 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4); |
| 190 | } |
| 191 | } |
| 192 | } |
| 193 | |
| 194 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4, output_height_lt_2) { |
| 195 | TEST_REQUIRES_ARM_NEON; |
| 196 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 197 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 198 | DWConv2DMicrokernelTester() |
| 199 | .input_width(input_width) |
| 200 | .input_height(input_height) |
| 201 | .kernel_height(3) |
| 202 | .kernel_width(3) |
| 203 | .subsampling(1) |
| 204 | .padding_left(1) |
| 205 | .padding_right(1) |
| 206 | .padding_top(1) |
| 207 | .padding_bottom(1) |
| 208 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4); |
| 209 | } |
| 210 | } |
| 211 | } |
| 212 | |
| 213 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4, output_height_gt_2) { |
| 214 | TEST_REQUIRES_ARM_NEON; |
| 215 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 216 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 217 | DWConv2DMicrokernelTester() |
| 218 | .input_width(input_width) |
| 219 | .input_height(input_height) |
| 220 | .kernel_height(3) |
| 221 | .kernel_width(3) |
| 222 | .subsampling(1) |
| 223 | .padding_left(1) |
| 224 | .padding_right(1) |
| 225 | .padding_top(1) |
| 226 | .padding_bottom(1) |
| 227 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4); |
| 228 | } |
| 229 | } |
| 230 | } |
| 231 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 232 | |
| 233 | |
| 234 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 235 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_3X4, output_width_eq_4) { |
| 236 | TEST_REQUIRES_ARM_NEON; |
| 237 | DWConv2DMicrokernelTester() |
| 238 | .input_width(4) |
| 239 | .input_height(3) |
| 240 | .kernel_height(3) |
| 241 | .kernel_width(3) |
| 242 | .subsampling(1) |
| 243 | .padding_left(1) |
| 244 | .padding_right(1) |
| 245 | .padding_top(1) |
| 246 | .padding_bottom(1) |
| 247 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_3x4); |
| 248 | } |
| 249 | |
| 250 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_3X4, output_width_div_4) { |
| 251 | TEST_REQUIRES_ARM_NEON; |
| 252 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 253 | DWConv2DMicrokernelTester() |
| 254 | .input_width(input_width) |
| 255 | .input_height(3) |
| 256 | .kernel_height(3) |
| 257 | .kernel_width(3) |
| 258 | .subsampling(1) |
| 259 | .padding_left(1) |
| 260 | .padding_right(1) |
| 261 | .padding_top(1) |
| 262 | .padding_bottom(1) |
| 263 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_3x4); |
| 264 | } |
| 265 | } |
| 266 | |
| 267 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_3X4, output_width_lt_4) { |
| 268 | TEST_REQUIRES_ARM_NEON; |
| 269 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 270 | DWConv2DMicrokernelTester() |
| 271 | .input_width(4) |
| 272 | .input_height(3) |
| 273 | .kernel_height(3) |
| 274 | .kernel_width(3) |
| 275 | .subsampling(1) |
| 276 | .padding_left(1) |
| 277 | .padding_right(1) |
| 278 | .padding_top(1) |
| 279 | .padding_bottom(1) |
| 280 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_3x4); |
| 281 | } |
| 282 | } |
| 283 | |
| 284 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_3X4, output_width_gt_4) { |
| 285 | TEST_REQUIRES_ARM_NEON; |
| 286 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 287 | DWConv2DMicrokernelTester() |
| 288 | .input_width(input_width) |
| 289 | .input_height(3) |
| 290 | .kernel_height(3) |
| 291 | .kernel_width(3) |
| 292 | .subsampling(1) |
| 293 | .padding_left(1) |
| 294 | .padding_right(1) |
| 295 | .padding_top(1) |
| 296 | .padding_bottom(1) |
| 297 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_3x4); |
| 298 | } |
| 299 | } |
| 300 | |
| 301 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_3X4, output_height_div_3) { |
| 302 | TEST_REQUIRES_ARM_NEON; |
| 303 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 304 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 305 | DWConv2DMicrokernelTester() |
| 306 | .input_width(input_width) |
| 307 | .input_height(input_height) |
| 308 | .kernel_height(3) |
| 309 | .kernel_width(3) |
| 310 | .subsampling(1) |
| 311 | .padding_left(1) |
| 312 | .padding_right(1) |
| 313 | .padding_top(1) |
| 314 | .padding_bottom(1) |
| 315 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_3x4); |
| 316 | } |
| 317 | } |
| 318 | } |
| 319 | |
| 320 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_3X4, output_height_lt_3) { |
| 321 | TEST_REQUIRES_ARM_NEON; |
| 322 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 323 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 324 | DWConv2DMicrokernelTester() |
| 325 | .input_width(input_width) |
| 326 | .input_height(input_height) |
| 327 | .kernel_height(3) |
| 328 | .kernel_width(3) |
| 329 | .subsampling(1) |
| 330 | .padding_left(1) |
| 331 | .padding_right(1) |
| 332 | .padding_top(1) |
| 333 | .padding_bottom(1) |
| 334 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_3x4); |
| 335 | } |
| 336 | } |
| 337 | } |
| 338 | |
| 339 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_3X4, output_height_gt_3) { |
| 340 | TEST_REQUIRES_ARM_NEON; |
| 341 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 342 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 343 | DWConv2DMicrokernelTester() |
| 344 | .input_width(input_width) |
| 345 | .input_height(input_height) |
| 346 | .kernel_height(3) |
| 347 | .kernel_width(3) |
| 348 | .subsampling(1) |
| 349 | .padding_left(1) |
| 350 | .padding_right(1) |
| 351 | .padding_top(1) |
| 352 | .padding_bottom(1) |
| 353 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_3x4); |
| 354 | } |
| 355 | } |
| 356 | } |
| 357 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 358 | |
| 359 | |
| 360 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 361 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_4X4, output_width_eq_4) { |
| 362 | TEST_REQUIRES_ARM_NEON; |
| 363 | DWConv2DMicrokernelTester() |
| 364 | .input_width(4) |
| 365 | .input_height(4) |
| 366 | .kernel_height(3) |
| 367 | .kernel_width(3) |
| 368 | .subsampling(1) |
| 369 | .padding_left(1) |
| 370 | .padding_right(1) |
| 371 | .padding_top(1) |
| 372 | .padding_bottom(1) |
| 373 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_4x4); |
| 374 | } |
| 375 | |
| 376 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_4X4, output_width_div_4) { |
| 377 | TEST_REQUIRES_ARM_NEON; |
| 378 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 379 | DWConv2DMicrokernelTester() |
| 380 | .input_width(input_width) |
| 381 | .input_height(4) |
| 382 | .kernel_height(3) |
| 383 | .kernel_width(3) |
| 384 | .subsampling(1) |
| 385 | .padding_left(1) |
| 386 | .padding_right(1) |
| 387 | .padding_top(1) |
| 388 | .padding_bottom(1) |
| 389 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_4x4); |
| 390 | } |
| 391 | } |
| 392 | |
| 393 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_4X4, output_width_lt_4) { |
| 394 | TEST_REQUIRES_ARM_NEON; |
| 395 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 396 | DWConv2DMicrokernelTester() |
| 397 | .input_width(4) |
| 398 | .input_height(4) |
| 399 | .kernel_height(3) |
| 400 | .kernel_width(3) |
| 401 | .subsampling(1) |
| 402 | .padding_left(1) |
| 403 | .padding_right(1) |
| 404 | .padding_top(1) |
| 405 | .padding_bottom(1) |
| 406 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_4x4); |
| 407 | } |
| 408 | } |
| 409 | |
| 410 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_4X4, output_width_gt_4) { |
| 411 | TEST_REQUIRES_ARM_NEON; |
| 412 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 413 | DWConv2DMicrokernelTester() |
| 414 | .input_width(input_width) |
| 415 | .input_height(4) |
| 416 | .kernel_height(3) |
| 417 | .kernel_width(3) |
| 418 | .subsampling(1) |
| 419 | .padding_left(1) |
| 420 | .padding_right(1) |
| 421 | .padding_top(1) |
| 422 | .padding_bottom(1) |
| 423 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_4x4); |
| 424 | } |
| 425 | } |
| 426 | |
| 427 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_4X4, output_height_div_4) { |
| 428 | TEST_REQUIRES_ARM_NEON; |
| 429 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 430 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 431 | DWConv2DMicrokernelTester() |
| 432 | .input_width(input_width) |
| 433 | .input_height(input_height) |
| 434 | .kernel_height(3) |
| 435 | .kernel_width(3) |
| 436 | .subsampling(1) |
| 437 | .padding_left(1) |
| 438 | .padding_right(1) |
| 439 | .padding_top(1) |
| 440 | .padding_bottom(1) |
| 441 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_4x4); |
| 442 | } |
| 443 | } |
| 444 | } |
| 445 | |
| 446 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_4X4, output_height_lt_4) { |
| 447 | TEST_REQUIRES_ARM_NEON; |
| 448 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 449 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 450 | DWConv2DMicrokernelTester() |
| 451 | .input_width(input_width) |
| 452 | .input_height(input_height) |
| 453 | .kernel_height(3) |
| 454 | .kernel_width(3) |
| 455 | .subsampling(1) |
| 456 | .padding_left(1) |
| 457 | .padding_right(1) |
| 458 | .padding_top(1) |
| 459 | .padding_bottom(1) |
| 460 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_4x4); |
| 461 | } |
| 462 | } |
| 463 | } |
| 464 | |
| 465 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_4X4, output_height_gt_4) { |
| 466 | TEST_REQUIRES_ARM_NEON; |
| 467 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 468 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 469 | DWConv2DMicrokernelTester() |
| 470 | .input_width(input_width) |
| 471 | .input_height(input_height) |
| 472 | .kernel_height(3) |
| 473 | .kernel_width(3) |
| 474 | .subsampling(1) |
| 475 | .padding_left(1) |
| 476 | .padding_right(1) |
| 477 | .padding_top(1) |
| 478 | .padding_bottom(1) |
| 479 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_4x4); |
| 480 | } |
| 481 | } |
| 482 | } |
| 483 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 484 | |
| 485 | |
| 486 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 487 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_5X4, output_width_eq_4) { |
| 488 | TEST_REQUIRES_ARM_NEON; |
| 489 | DWConv2DMicrokernelTester() |
| 490 | .input_width(4) |
| 491 | .input_height(5) |
| 492 | .kernel_height(3) |
| 493 | .kernel_width(3) |
| 494 | .subsampling(1) |
| 495 | .padding_left(1) |
| 496 | .padding_right(1) |
| 497 | .padding_top(1) |
| 498 | .padding_bottom(1) |
| 499 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_5x4); |
| 500 | } |
| 501 | |
| 502 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_5X4, output_width_div_4) { |
| 503 | TEST_REQUIRES_ARM_NEON; |
| 504 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 505 | DWConv2DMicrokernelTester() |
| 506 | .input_width(input_width) |
| 507 | .input_height(5) |
| 508 | .kernel_height(3) |
| 509 | .kernel_width(3) |
| 510 | .subsampling(1) |
| 511 | .padding_left(1) |
| 512 | .padding_right(1) |
| 513 | .padding_top(1) |
| 514 | .padding_bottom(1) |
| 515 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_5x4); |
| 516 | } |
| 517 | } |
| 518 | |
| 519 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_5X4, output_width_lt_4) { |
| 520 | TEST_REQUIRES_ARM_NEON; |
| 521 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 522 | DWConv2DMicrokernelTester() |
| 523 | .input_width(4) |
| 524 | .input_height(5) |
| 525 | .kernel_height(3) |
| 526 | .kernel_width(3) |
| 527 | .subsampling(1) |
| 528 | .padding_left(1) |
| 529 | .padding_right(1) |
| 530 | .padding_top(1) |
| 531 | .padding_bottom(1) |
| 532 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_5x4); |
| 533 | } |
| 534 | } |
| 535 | |
| 536 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_5X4, output_width_gt_4) { |
| 537 | TEST_REQUIRES_ARM_NEON; |
| 538 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 539 | DWConv2DMicrokernelTester() |
| 540 | .input_width(input_width) |
| 541 | .input_height(5) |
| 542 | .kernel_height(3) |
| 543 | .kernel_width(3) |
| 544 | .subsampling(1) |
| 545 | .padding_left(1) |
| 546 | .padding_right(1) |
| 547 | .padding_top(1) |
| 548 | .padding_bottom(1) |
| 549 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_5x4); |
| 550 | } |
| 551 | } |
| 552 | |
| 553 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_5X4, output_height_div_5) { |
| 554 | TEST_REQUIRES_ARM_NEON; |
| 555 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 556 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 557 | DWConv2DMicrokernelTester() |
| 558 | .input_width(input_width) |
| 559 | .input_height(input_height) |
| 560 | .kernel_height(3) |
| 561 | .kernel_width(3) |
| 562 | .subsampling(1) |
| 563 | .padding_left(1) |
| 564 | .padding_right(1) |
| 565 | .padding_top(1) |
| 566 | .padding_bottom(1) |
| 567 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_5x4); |
| 568 | } |
| 569 | } |
| 570 | } |
| 571 | |
| 572 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_5X4, output_height_lt_5) { |
| 573 | TEST_REQUIRES_ARM_NEON; |
| 574 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 575 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 576 | DWConv2DMicrokernelTester() |
| 577 | .input_width(input_width) |
| 578 | .input_height(input_height) |
| 579 | .kernel_height(3) |
| 580 | .kernel_width(3) |
| 581 | .subsampling(1) |
| 582 | .padding_left(1) |
| 583 | .padding_right(1) |
| 584 | .padding_top(1) |
| 585 | .padding_bottom(1) |
| 586 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_5x4); |
| 587 | } |
| 588 | } |
| 589 | } |
| 590 | |
| 591 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_5X4, output_height_gt_5) { |
| 592 | TEST_REQUIRES_ARM_NEON; |
| 593 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 594 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 595 | DWConv2DMicrokernelTester() |
| 596 | .input_width(input_width) |
| 597 | .input_height(input_height) |
| 598 | .kernel_height(3) |
| 599 | .kernel_width(3) |
| 600 | .subsampling(1) |
| 601 | .padding_left(1) |
| 602 | .padding_right(1) |
| 603 | .padding_top(1) |
| 604 | .padding_bottom(1) |
| 605 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_5x4); |
| 606 | } |
| 607 | } |
| 608 | } |
| 609 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 610 | |
| 611 | |
| 612 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 613 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_6X4, output_width_eq_4) { |
| 614 | TEST_REQUIRES_ARM_NEON; |
| 615 | DWConv2DMicrokernelTester() |
| 616 | .input_width(4) |
| 617 | .input_height(6) |
| 618 | .kernel_height(3) |
| 619 | .kernel_width(3) |
| 620 | .subsampling(1) |
| 621 | .padding_left(1) |
| 622 | .padding_right(1) |
| 623 | .padding_top(1) |
| 624 | .padding_bottom(1) |
| 625 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_6x4); |
| 626 | } |
| 627 | |
| 628 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_6X4, output_width_div_4) { |
| 629 | TEST_REQUIRES_ARM_NEON; |
| 630 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 631 | DWConv2DMicrokernelTester() |
| 632 | .input_width(input_width) |
| 633 | .input_height(6) |
| 634 | .kernel_height(3) |
| 635 | .kernel_width(3) |
| 636 | .subsampling(1) |
| 637 | .padding_left(1) |
| 638 | .padding_right(1) |
| 639 | .padding_top(1) |
| 640 | .padding_bottom(1) |
| 641 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_6x4); |
| 642 | } |
| 643 | } |
| 644 | |
| 645 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_6X4, output_width_lt_4) { |
| 646 | TEST_REQUIRES_ARM_NEON; |
| 647 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 648 | DWConv2DMicrokernelTester() |
| 649 | .input_width(4) |
| 650 | .input_height(6) |
| 651 | .kernel_height(3) |
| 652 | .kernel_width(3) |
| 653 | .subsampling(1) |
| 654 | .padding_left(1) |
| 655 | .padding_right(1) |
| 656 | .padding_top(1) |
| 657 | .padding_bottom(1) |
| 658 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_6x4); |
| 659 | } |
| 660 | } |
| 661 | |
| 662 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_6X4, output_width_gt_4) { |
| 663 | TEST_REQUIRES_ARM_NEON; |
| 664 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 665 | DWConv2DMicrokernelTester() |
| 666 | .input_width(input_width) |
| 667 | .input_height(6) |
| 668 | .kernel_height(3) |
| 669 | .kernel_width(3) |
| 670 | .subsampling(1) |
| 671 | .padding_left(1) |
| 672 | .padding_right(1) |
| 673 | .padding_top(1) |
| 674 | .padding_bottom(1) |
| 675 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_6x4); |
| 676 | } |
| 677 | } |
| 678 | |
| 679 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_6X4, output_height_div_6) { |
| 680 | TEST_REQUIRES_ARM_NEON; |
| 681 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 682 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 683 | DWConv2DMicrokernelTester() |
| 684 | .input_width(input_width) |
| 685 | .input_height(input_height) |
| 686 | .kernel_height(3) |
| 687 | .kernel_width(3) |
| 688 | .subsampling(1) |
| 689 | .padding_left(1) |
| 690 | .padding_right(1) |
| 691 | .padding_top(1) |
| 692 | .padding_bottom(1) |
| 693 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_6x4); |
| 694 | } |
| 695 | } |
| 696 | } |
| 697 | |
| 698 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_6X4, output_height_lt_6) { |
| 699 | TEST_REQUIRES_ARM_NEON; |
| 700 | for (size_t input_height = 1; input_height < 6; input_height++) { |
| 701 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 702 | DWConv2DMicrokernelTester() |
| 703 | .input_width(input_width) |
| 704 | .input_height(input_height) |
| 705 | .kernel_height(3) |
| 706 | .kernel_width(3) |
| 707 | .subsampling(1) |
| 708 | .padding_left(1) |
| 709 | .padding_right(1) |
| 710 | .padding_top(1) |
| 711 | .padding_bottom(1) |
| 712 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_6x4); |
| 713 | } |
| 714 | } |
| 715 | } |
| 716 | |
| 717 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_6X4, output_height_gt_6) { |
| 718 | TEST_REQUIRES_ARM_NEON; |
| 719 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 720 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 721 | DWConv2DMicrokernelTester() |
| 722 | .input_width(input_width) |
| 723 | .input_height(input_height) |
| 724 | .kernel_height(3) |
| 725 | .kernel_width(3) |
| 726 | .subsampling(1) |
| 727 | .padding_left(1) |
| 728 | .padding_right(1) |
| 729 | .padding_top(1) |
| 730 | .padding_bottom(1) |
| 731 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_6x4); |
| 732 | } |
| 733 | } |
| 734 | } |
| 735 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 736 | |
| 737 | |
| 738 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 739 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC2, output_width_eq_4) { |
| 740 | TEST_REQUIRES_ARM_NEON; |
| 741 | DWConv2DMicrokernelTester() |
| 742 | .input_width(4) |
| 743 | .input_height(1) |
| 744 | .kernel_height(3) |
| 745 | .kernel_width(3) |
| 746 | .subsampling(1) |
| 747 | .padding_left(1) |
| 748 | .padding_right(1) |
| 749 | .padding_top(1) |
| 750 | .padding_bottom(1) |
| 751 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc2); |
| 752 | } |
| 753 | |
| 754 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC2, output_width_div_4) { |
| 755 | TEST_REQUIRES_ARM_NEON; |
| 756 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 757 | DWConv2DMicrokernelTester() |
| 758 | .input_width(input_width) |
| 759 | .input_height(1) |
| 760 | .kernel_height(3) |
| 761 | .kernel_width(3) |
| 762 | .subsampling(1) |
| 763 | .padding_left(1) |
| 764 | .padding_right(1) |
| 765 | .padding_top(1) |
| 766 | .padding_bottom(1) |
| 767 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc2); |
| 768 | } |
| 769 | } |
| 770 | |
| 771 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC2, output_width_lt_4) { |
| 772 | TEST_REQUIRES_ARM_NEON; |
| 773 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 774 | DWConv2DMicrokernelTester() |
| 775 | .input_width(4) |
| 776 | .input_height(1) |
| 777 | .kernel_height(3) |
| 778 | .kernel_width(3) |
| 779 | .subsampling(1) |
| 780 | .padding_left(1) |
| 781 | .padding_right(1) |
| 782 | .padding_top(1) |
| 783 | .padding_bottom(1) |
| 784 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc2); |
| 785 | } |
| 786 | } |
| 787 | |
| 788 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC2, output_width_gt_4) { |
| 789 | TEST_REQUIRES_ARM_NEON; |
| 790 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 791 | DWConv2DMicrokernelTester() |
| 792 | .input_width(input_width) |
| 793 | .input_height(1) |
| 794 | .kernel_height(3) |
| 795 | .kernel_width(3) |
| 796 | .subsampling(1) |
| 797 | .padding_left(1) |
| 798 | .padding_right(1) |
| 799 | .padding_top(1) |
| 800 | .padding_bottom(1) |
| 801 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc2); |
| 802 | } |
| 803 | } |
| 804 | |
| 805 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC2, output_height_gt_1) { |
| 806 | TEST_REQUIRES_ARM_NEON; |
| 807 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 808 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 809 | DWConv2DMicrokernelTester() |
| 810 | .input_width(input_width) |
| 811 | .input_height(input_height) |
| 812 | .kernel_height(3) |
| 813 | .kernel_width(3) |
| 814 | .subsampling(1) |
| 815 | .padding_left(1) |
| 816 | .padding_right(1) |
| 817 | .padding_top(1) |
| 818 | .padding_bottom(1) |
| 819 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc2); |
| 820 | } |
| 821 | } |
| 822 | } |
| 823 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 824 | |
| 825 | |
| 826 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 827 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC3, output_width_eq_4) { |
| 828 | TEST_REQUIRES_ARM_NEON; |
| 829 | DWConv2DMicrokernelTester() |
| 830 | .input_width(4) |
| 831 | .input_height(1) |
| 832 | .kernel_height(3) |
| 833 | .kernel_width(3) |
| 834 | .subsampling(1) |
| 835 | .padding_left(1) |
| 836 | .padding_right(1) |
| 837 | .padding_top(1) |
| 838 | .padding_bottom(1) |
| 839 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc3); |
| 840 | } |
| 841 | |
| 842 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC3, output_width_div_4) { |
| 843 | TEST_REQUIRES_ARM_NEON; |
| 844 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 845 | DWConv2DMicrokernelTester() |
| 846 | .input_width(input_width) |
| 847 | .input_height(1) |
| 848 | .kernel_height(3) |
| 849 | .kernel_width(3) |
| 850 | .subsampling(1) |
| 851 | .padding_left(1) |
| 852 | .padding_right(1) |
| 853 | .padding_top(1) |
| 854 | .padding_bottom(1) |
| 855 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc3); |
| 856 | } |
| 857 | } |
| 858 | |
| 859 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC3, output_width_lt_4) { |
| 860 | TEST_REQUIRES_ARM_NEON; |
| 861 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 862 | DWConv2DMicrokernelTester() |
| 863 | .input_width(4) |
| 864 | .input_height(1) |
| 865 | .kernel_height(3) |
| 866 | .kernel_width(3) |
| 867 | .subsampling(1) |
| 868 | .padding_left(1) |
| 869 | .padding_right(1) |
| 870 | .padding_top(1) |
| 871 | .padding_bottom(1) |
| 872 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc3); |
| 873 | } |
| 874 | } |
| 875 | |
| 876 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC3, output_width_gt_4) { |
| 877 | TEST_REQUIRES_ARM_NEON; |
| 878 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 879 | DWConv2DMicrokernelTester() |
| 880 | .input_width(input_width) |
| 881 | .input_height(1) |
| 882 | .kernel_height(3) |
| 883 | .kernel_width(3) |
| 884 | .subsampling(1) |
| 885 | .padding_left(1) |
| 886 | .padding_right(1) |
| 887 | .padding_top(1) |
| 888 | .padding_bottom(1) |
| 889 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc3); |
| 890 | } |
| 891 | } |
| 892 | |
| 893 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC3, output_height_gt_1) { |
| 894 | TEST_REQUIRES_ARM_NEON; |
| 895 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 896 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 897 | DWConv2DMicrokernelTester() |
| 898 | .input_width(input_width) |
| 899 | .input_height(input_height) |
| 900 | .kernel_height(3) |
| 901 | .kernel_width(3) |
| 902 | .subsampling(1) |
| 903 | .padding_left(1) |
| 904 | .padding_right(1) |
| 905 | .padding_top(1) |
| 906 | .padding_bottom(1) |
| 907 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc3); |
| 908 | } |
| 909 | } |
| 910 | } |
| 911 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 912 | |
| 913 | |
| 914 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 915 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC4, output_width_eq_4) { |
| 916 | TEST_REQUIRES_ARM_NEON; |
| 917 | DWConv2DMicrokernelTester() |
| 918 | .input_width(4) |
| 919 | .input_height(1) |
| 920 | .kernel_height(3) |
| 921 | .kernel_width(3) |
| 922 | .subsampling(1) |
| 923 | .padding_left(1) |
| 924 | .padding_right(1) |
| 925 | .padding_top(1) |
| 926 | .padding_bottom(1) |
| 927 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc4); |
| 928 | } |
| 929 | |
| 930 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC4, output_width_div_4) { |
| 931 | TEST_REQUIRES_ARM_NEON; |
| 932 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 933 | DWConv2DMicrokernelTester() |
| 934 | .input_width(input_width) |
| 935 | .input_height(1) |
| 936 | .kernel_height(3) |
| 937 | .kernel_width(3) |
| 938 | .subsampling(1) |
| 939 | .padding_left(1) |
| 940 | .padding_right(1) |
| 941 | .padding_top(1) |
| 942 | .padding_bottom(1) |
| 943 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc4); |
| 944 | } |
| 945 | } |
| 946 | |
| 947 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC4, output_width_lt_4) { |
| 948 | TEST_REQUIRES_ARM_NEON; |
| 949 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 950 | DWConv2DMicrokernelTester() |
| 951 | .input_width(4) |
| 952 | .input_height(1) |
| 953 | .kernel_height(3) |
| 954 | .kernel_width(3) |
| 955 | .subsampling(1) |
| 956 | .padding_left(1) |
| 957 | .padding_right(1) |
| 958 | .padding_top(1) |
| 959 | .padding_bottom(1) |
| 960 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc4); |
| 961 | } |
| 962 | } |
| 963 | |
| 964 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC4, output_width_gt_4) { |
| 965 | TEST_REQUIRES_ARM_NEON; |
| 966 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 967 | DWConv2DMicrokernelTester() |
| 968 | .input_width(input_width) |
| 969 | .input_height(1) |
| 970 | .kernel_height(3) |
| 971 | .kernel_width(3) |
| 972 | .subsampling(1) |
| 973 | .padding_left(1) |
| 974 | .padding_right(1) |
| 975 | .padding_top(1) |
| 976 | .padding_bottom(1) |
| 977 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc4); |
| 978 | } |
| 979 | } |
| 980 | |
| 981 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_1X4_ACC4, output_height_gt_1) { |
| 982 | TEST_REQUIRES_ARM_NEON; |
| 983 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 984 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 985 | DWConv2DMicrokernelTester() |
| 986 | .input_width(input_width) |
| 987 | .input_height(input_height) |
| 988 | .kernel_height(3) |
| 989 | .kernel_width(3) |
| 990 | .subsampling(1) |
| 991 | .padding_left(1) |
| 992 | .padding_right(1) |
| 993 | .padding_top(1) |
| 994 | .padding_bottom(1) |
| 995 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc4); |
| 996 | } |
| 997 | } |
| 998 | } |
| 999 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1000 | |
| 1001 | |
| 1002 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1003 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4_ACC2, output_width_eq_4) { |
| 1004 | TEST_REQUIRES_ARM_NEON; |
| 1005 | DWConv2DMicrokernelTester() |
| 1006 | .input_width(4) |
| 1007 | .input_height(2) |
| 1008 | .kernel_height(3) |
| 1009 | .kernel_width(3) |
| 1010 | .subsampling(1) |
| 1011 | .padding_left(1) |
| 1012 | .padding_right(1) |
| 1013 | .padding_top(1) |
| 1014 | .padding_bottom(1) |
| 1015 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4_acc2); |
| 1016 | } |
| 1017 | |
| 1018 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4_ACC2, output_width_div_4) { |
| 1019 | TEST_REQUIRES_ARM_NEON; |
| 1020 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 1021 | DWConv2DMicrokernelTester() |
| 1022 | .input_width(input_width) |
| 1023 | .input_height(2) |
| 1024 | .kernel_height(3) |
| 1025 | .kernel_width(3) |
| 1026 | .subsampling(1) |
| 1027 | .padding_left(1) |
| 1028 | .padding_right(1) |
| 1029 | .padding_top(1) |
| 1030 | .padding_bottom(1) |
| 1031 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4_acc2); |
| 1032 | } |
| 1033 | } |
| 1034 | |
| 1035 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4_ACC2, output_width_lt_4) { |
| 1036 | TEST_REQUIRES_ARM_NEON; |
| 1037 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 1038 | DWConv2DMicrokernelTester() |
| 1039 | .input_width(4) |
| 1040 | .input_height(2) |
| 1041 | .kernel_height(3) |
| 1042 | .kernel_width(3) |
| 1043 | .subsampling(1) |
| 1044 | .padding_left(1) |
| 1045 | .padding_right(1) |
| 1046 | .padding_top(1) |
| 1047 | .padding_bottom(1) |
| 1048 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4_acc2); |
| 1049 | } |
| 1050 | } |
| 1051 | |
| 1052 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4_ACC2, output_width_gt_4) { |
| 1053 | TEST_REQUIRES_ARM_NEON; |
| 1054 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 1055 | DWConv2DMicrokernelTester() |
| 1056 | .input_width(input_width) |
| 1057 | .input_height(2) |
| 1058 | .kernel_height(3) |
| 1059 | .kernel_width(3) |
| 1060 | .subsampling(1) |
| 1061 | .padding_left(1) |
| 1062 | .padding_right(1) |
| 1063 | .padding_top(1) |
| 1064 | .padding_bottom(1) |
| 1065 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4_acc2); |
| 1066 | } |
| 1067 | } |
| 1068 | |
| 1069 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4_ACC2, output_height_div_2) { |
| 1070 | TEST_REQUIRES_ARM_NEON; |
| 1071 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 1072 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1073 | DWConv2DMicrokernelTester() |
| 1074 | .input_width(input_width) |
| 1075 | .input_height(input_height) |
| 1076 | .kernel_height(3) |
| 1077 | .kernel_width(3) |
| 1078 | .subsampling(1) |
| 1079 | .padding_left(1) |
| 1080 | .padding_right(1) |
| 1081 | .padding_top(1) |
| 1082 | .padding_bottom(1) |
| 1083 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4_acc2); |
| 1084 | } |
| 1085 | } |
| 1086 | } |
| 1087 | |
| 1088 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4_ACC2, output_height_lt_2) { |
| 1089 | TEST_REQUIRES_ARM_NEON; |
| 1090 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 1091 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1092 | DWConv2DMicrokernelTester() |
| 1093 | .input_width(input_width) |
| 1094 | .input_height(input_height) |
| 1095 | .kernel_height(3) |
| 1096 | .kernel_width(3) |
| 1097 | .subsampling(1) |
| 1098 | .padding_left(1) |
| 1099 | .padding_right(1) |
| 1100 | .padding_top(1) |
| 1101 | .padding_bottom(1) |
| 1102 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4_acc2); |
| 1103 | } |
| 1104 | } |
| 1105 | } |
| 1106 | |
| 1107 | TEST(F32_DWCONV2D_CHW_3X3P1__NEON_2X4_ACC2, output_height_gt_2) { |
| 1108 | TEST_REQUIRES_ARM_NEON; |
| 1109 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 1110 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1111 | DWConv2DMicrokernelTester() |
| 1112 | .input_width(input_width) |
| 1113 | .input_height(input_height) |
| 1114 | .kernel_height(3) |
| 1115 | .kernel_width(3) |
| 1116 | .subsampling(1) |
| 1117 | .padding_left(1) |
| 1118 | .padding_right(1) |
| 1119 | .padding_top(1) |
| 1120 | .padding_bottom(1) |
| 1121 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4_acc2); |
| 1122 | } |
| 1123 | } |
| 1124 | } |
| 1125 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1126 | |
| 1127 | |
| Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 1128 | #if XNN_ARCH_ARM64 |
| Marat Dukhan | 1268a24 | 2020-10-24 00:36:32 -0700 | [diff] [blame] | 1129 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4, output_width_eq_4) { |
| 1130 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1131 | DWConv2DMicrokernelTester() |
| 1132 | .input_width(4) |
| 1133 | .input_height(1) |
| 1134 | .kernel_height(3) |
| 1135 | .kernel_width(3) |
| 1136 | .subsampling(1) |
| 1137 | .padding_left(1) |
| 1138 | .padding_right(1) |
| 1139 | .padding_top(1) |
| 1140 | .padding_bottom(1) |
| 1141 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4); |
| 1142 | } |
| 1143 | |
| 1144 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4, output_width_div_4) { |
| 1145 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1146 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 1147 | DWConv2DMicrokernelTester() |
| 1148 | .input_width(input_width) |
| 1149 | .input_height(1) |
| 1150 | .kernel_height(3) |
| 1151 | .kernel_width(3) |
| 1152 | .subsampling(1) |
| 1153 | .padding_left(1) |
| 1154 | .padding_right(1) |
| 1155 | .padding_top(1) |
| 1156 | .padding_bottom(1) |
| 1157 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4); |
| 1158 | } |
| 1159 | } |
| 1160 | |
| 1161 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4, output_width_lt_4) { |
| 1162 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1163 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 1164 | DWConv2DMicrokernelTester() |
| 1165 | .input_width(4) |
| 1166 | .input_height(1) |
| 1167 | .kernel_height(3) |
| 1168 | .kernel_width(3) |
| 1169 | .subsampling(1) |
| 1170 | .padding_left(1) |
| 1171 | .padding_right(1) |
| 1172 | .padding_top(1) |
| 1173 | .padding_bottom(1) |
| 1174 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4); |
| 1175 | } |
| 1176 | } |
| 1177 | |
| 1178 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4, output_width_gt_4) { |
| 1179 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1180 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 1181 | DWConv2DMicrokernelTester() |
| 1182 | .input_width(input_width) |
| 1183 | .input_height(1) |
| 1184 | .kernel_height(3) |
| 1185 | .kernel_width(3) |
| 1186 | .subsampling(1) |
| 1187 | .padding_left(1) |
| 1188 | .padding_right(1) |
| 1189 | .padding_top(1) |
| 1190 | .padding_bottom(1) |
| 1191 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4); |
| 1192 | } |
| 1193 | } |
| 1194 | |
| 1195 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4, output_height_gt_1) { |
| 1196 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1197 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 1198 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1199 | DWConv2DMicrokernelTester() |
| 1200 | .input_width(input_width) |
| 1201 | .input_height(input_height) |
| 1202 | .kernel_height(3) |
| 1203 | .kernel_width(3) |
| 1204 | .subsampling(1) |
| 1205 | .padding_left(1) |
| 1206 | .padding_right(1) |
| 1207 | .padding_top(1) |
| 1208 | .padding_bottom(1) |
| 1209 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4); |
| 1210 | } |
| 1211 | } |
| 1212 | } |
| 1213 | #endif // XNN_ARCH_ARM64 |
| 1214 | |
| 1215 | |
| 1216 | #if XNN_ARCH_ARM64 |
| 1217 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4, output_width_eq_4) { |
| 1218 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1219 | DWConv2DMicrokernelTester() |
| 1220 | .input_width(4) |
| 1221 | .input_height(2) |
| 1222 | .kernel_height(3) |
| 1223 | .kernel_width(3) |
| 1224 | .subsampling(1) |
| 1225 | .padding_left(1) |
| 1226 | .padding_right(1) |
| 1227 | .padding_top(1) |
| 1228 | .padding_bottom(1) |
| 1229 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4); |
| 1230 | } |
| 1231 | |
| 1232 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4, output_width_div_4) { |
| 1233 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1234 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 1235 | DWConv2DMicrokernelTester() |
| 1236 | .input_width(input_width) |
| 1237 | .input_height(2) |
| 1238 | .kernel_height(3) |
| 1239 | .kernel_width(3) |
| 1240 | .subsampling(1) |
| 1241 | .padding_left(1) |
| 1242 | .padding_right(1) |
| 1243 | .padding_top(1) |
| 1244 | .padding_bottom(1) |
| 1245 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4); |
| 1246 | } |
| 1247 | } |
| 1248 | |
| 1249 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4, output_width_lt_4) { |
| 1250 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1251 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 1252 | DWConv2DMicrokernelTester() |
| 1253 | .input_width(4) |
| 1254 | .input_height(2) |
| 1255 | .kernel_height(3) |
| 1256 | .kernel_width(3) |
| 1257 | .subsampling(1) |
| 1258 | .padding_left(1) |
| 1259 | .padding_right(1) |
| 1260 | .padding_top(1) |
| 1261 | .padding_bottom(1) |
| 1262 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4); |
| 1263 | } |
| 1264 | } |
| 1265 | |
| 1266 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4, output_width_gt_4) { |
| 1267 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1268 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 1269 | DWConv2DMicrokernelTester() |
| 1270 | .input_width(input_width) |
| 1271 | .input_height(2) |
| 1272 | .kernel_height(3) |
| 1273 | .kernel_width(3) |
| 1274 | .subsampling(1) |
| 1275 | .padding_left(1) |
| 1276 | .padding_right(1) |
| 1277 | .padding_top(1) |
| 1278 | .padding_bottom(1) |
| 1279 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4); |
| 1280 | } |
| 1281 | } |
| 1282 | |
| 1283 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4, output_height_div_2) { |
| 1284 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1285 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 1286 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1287 | DWConv2DMicrokernelTester() |
| 1288 | .input_width(input_width) |
| 1289 | .input_height(input_height) |
| 1290 | .kernel_height(3) |
| 1291 | .kernel_width(3) |
| 1292 | .subsampling(1) |
| 1293 | .padding_left(1) |
| 1294 | .padding_right(1) |
| 1295 | .padding_top(1) |
| 1296 | .padding_bottom(1) |
| 1297 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4); |
| 1298 | } |
| 1299 | } |
| 1300 | } |
| 1301 | |
| 1302 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4, output_height_lt_2) { |
| 1303 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1304 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 1305 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1306 | DWConv2DMicrokernelTester() |
| 1307 | .input_width(input_width) |
| 1308 | .input_height(input_height) |
| 1309 | .kernel_height(3) |
| 1310 | .kernel_width(3) |
| 1311 | .subsampling(1) |
| 1312 | .padding_left(1) |
| 1313 | .padding_right(1) |
| 1314 | .padding_top(1) |
| 1315 | .padding_bottom(1) |
| 1316 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4); |
| 1317 | } |
| 1318 | } |
| 1319 | } |
| 1320 | |
| 1321 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4, output_height_gt_2) { |
| 1322 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1323 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 1324 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1325 | DWConv2DMicrokernelTester() |
| 1326 | .input_width(input_width) |
| 1327 | .input_height(input_height) |
| 1328 | .kernel_height(3) |
| 1329 | .kernel_width(3) |
| 1330 | .subsampling(1) |
| 1331 | .padding_left(1) |
| 1332 | .padding_right(1) |
| 1333 | .padding_top(1) |
| 1334 | .padding_bottom(1) |
| 1335 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4); |
| 1336 | } |
| 1337 | } |
| 1338 | } |
| 1339 | #endif // XNN_ARCH_ARM64 |
| 1340 | |
| 1341 | |
| 1342 | #if XNN_ARCH_ARM64 |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1343 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_3X4, output_width_eq_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1344 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1345 | DWConv2DMicrokernelTester() |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1346 | .input_width(4) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1347 | .input_height(3) |
| 1348 | .kernel_height(3) |
| 1349 | .kernel_width(3) |
| 1350 | .subsampling(1) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1351 | .padding_left(1) |
| 1352 | .padding_right(1) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 1353 | .padding_top(1) |
| 1354 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1355 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_3x4); |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1356 | } |
| 1357 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1358 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_3X4, output_width_div_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1359 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1360 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1361 | DWConv2DMicrokernelTester() |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1362 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1363 | .input_height(3) |
| 1364 | .kernel_height(3) |
| 1365 | .kernel_width(3) |
| 1366 | .subsampling(1) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1367 | .padding_left(1) |
| 1368 | .padding_right(1) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 1369 | .padding_top(1) |
| 1370 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1371 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_3x4); |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1372 | } |
| 1373 | } |
| 1374 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1375 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_3X4, output_width_lt_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1376 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1377 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1378 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1379 | .input_width(4) |
| 1380 | .input_height(3) |
| 1381 | .kernel_height(3) |
| 1382 | .kernel_width(3) |
| 1383 | .subsampling(1) |
| 1384 | .padding_left(1) |
| 1385 | .padding_right(1) |
| 1386 | .padding_top(1) |
| 1387 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1388 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_3x4); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1389 | } |
| 1390 | } |
| 1391 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1392 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_3X4, output_width_gt_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1393 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1394 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1395 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1396 | .input_width(input_width) |
| 1397 | .input_height(3) |
| 1398 | .kernel_height(3) |
| 1399 | .kernel_width(3) |
| 1400 | .subsampling(1) |
| 1401 | .padding_left(1) |
| 1402 | .padding_right(1) |
| 1403 | .padding_top(1) |
| 1404 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1405 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_3x4); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1406 | } |
| 1407 | } |
| 1408 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1409 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_3X4, output_height_div_3) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1410 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1411 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 1412 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1413 | DWConv2DMicrokernelTester() |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1414 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1415 | .input_height(input_height) |
| 1416 | .kernel_height(3) |
| 1417 | .kernel_width(3) |
| 1418 | .subsampling(1) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1419 | .padding_left(1) |
| 1420 | .padding_right(1) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 1421 | .padding_top(1) |
| 1422 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1423 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_3x4); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1424 | } |
| 1425 | } |
| 1426 | } |
| 1427 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1428 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_3X4, output_height_lt_3) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1429 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1430 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 1431 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1432 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1433 | .input_width(input_width) |
| 1434 | .input_height(input_height) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1435 | .kernel_height(3) |
| 1436 | .kernel_width(3) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1437 | .subsampling(1) |
| 1438 | .padding_left(1) |
| 1439 | .padding_right(1) |
| 1440 | .padding_top(1) |
| 1441 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1442 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_3x4); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1443 | } |
| 1444 | } |
| 1445 | } |
| 1446 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1447 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_3X4, output_height_gt_3) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1448 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1449 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 1450 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1451 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 1452 | .input_width(input_width) |
| 1453 | .input_height(input_height) |
| 1454 | .kernel_height(3) |
| 1455 | .kernel_width(3) |
| 1456 | .subsampling(1) |
| 1457 | .padding_left(1) |
| 1458 | .padding_right(1) |
| 1459 | .padding_top(1) |
| 1460 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 1461 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_3x4); |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1462 | } |
| 1463 | } |
| 1464 | } |
| Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 1465 | #endif // XNN_ARCH_ARM64 |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1466 | |
| 1467 | |
| Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 1468 | #if XNN_ARCH_ARM64 |
| Marat Dukhan | 1268a24 | 2020-10-24 00:36:32 -0700 | [diff] [blame] | 1469 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_4X4, output_width_eq_4) { |
| 1470 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1471 | DWConv2DMicrokernelTester() |
| 1472 | .input_width(4) |
| 1473 | .input_height(4) |
| 1474 | .kernel_height(3) |
| 1475 | .kernel_width(3) |
| 1476 | .subsampling(1) |
| 1477 | .padding_left(1) |
| 1478 | .padding_right(1) |
| 1479 | .padding_top(1) |
| 1480 | .padding_bottom(1) |
| 1481 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_4x4); |
| 1482 | } |
| 1483 | |
| 1484 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_4X4, output_width_div_4) { |
| 1485 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1486 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 1487 | DWConv2DMicrokernelTester() |
| 1488 | .input_width(input_width) |
| 1489 | .input_height(4) |
| 1490 | .kernel_height(3) |
| 1491 | .kernel_width(3) |
| 1492 | .subsampling(1) |
| 1493 | .padding_left(1) |
| 1494 | .padding_right(1) |
| 1495 | .padding_top(1) |
| 1496 | .padding_bottom(1) |
| 1497 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_4x4); |
| 1498 | } |
| 1499 | } |
| 1500 | |
| 1501 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_4X4, output_width_lt_4) { |
| 1502 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1503 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 1504 | DWConv2DMicrokernelTester() |
| 1505 | .input_width(4) |
| 1506 | .input_height(4) |
| 1507 | .kernel_height(3) |
| 1508 | .kernel_width(3) |
| 1509 | .subsampling(1) |
| 1510 | .padding_left(1) |
| 1511 | .padding_right(1) |
| 1512 | .padding_top(1) |
| 1513 | .padding_bottom(1) |
| 1514 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_4x4); |
| 1515 | } |
| 1516 | } |
| 1517 | |
| 1518 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_4X4, output_width_gt_4) { |
| 1519 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1520 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 1521 | DWConv2DMicrokernelTester() |
| 1522 | .input_width(input_width) |
| 1523 | .input_height(4) |
| 1524 | .kernel_height(3) |
| 1525 | .kernel_width(3) |
| 1526 | .subsampling(1) |
| 1527 | .padding_left(1) |
| 1528 | .padding_right(1) |
| 1529 | .padding_top(1) |
| 1530 | .padding_bottom(1) |
| 1531 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_4x4); |
| 1532 | } |
| 1533 | } |
| 1534 | |
| 1535 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_4X4, output_height_div_4) { |
| 1536 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1537 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 1538 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1539 | DWConv2DMicrokernelTester() |
| 1540 | .input_width(input_width) |
| 1541 | .input_height(input_height) |
| 1542 | .kernel_height(3) |
| 1543 | .kernel_width(3) |
| 1544 | .subsampling(1) |
| 1545 | .padding_left(1) |
| 1546 | .padding_right(1) |
| 1547 | .padding_top(1) |
| 1548 | .padding_bottom(1) |
| 1549 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_4x4); |
| 1550 | } |
| 1551 | } |
| 1552 | } |
| 1553 | |
| 1554 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_4X4, output_height_lt_4) { |
| 1555 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1556 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 1557 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1558 | DWConv2DMicrokernelTester() |
| 1559 | .input_width(input_width) |
| 1560 | .input_height(input_height) |
| 1561 | .kernel_height(3) |
| 1562 | .kernel_width(3) |
| 1563 | .subsampling(1) |
| 1564 | .padding_left(1) |
| 1565 | .padding_right(1) |
| 1566 | .padding_top(1) |
| 1567 | .padding_bottom(1) |
| 1568 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_4x4); |
| 1569 | } |
| 1570 | } |
| 1571 | } |
| 1572 | |
| 1573 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_4X4, output_height_gt_4) { |
| 1574 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1575 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 1576 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1577 | DWConv2DMicrokernelTester() |
| 1578 | .input_width(input_width) |
| 1579 | .input_height(input_height) |
| 1580 | .kernel_height(3) |
| 1581 | .kernel_width(3) |
| 1582 | .subsampling(1) |
| 1583 | .padding_left(1) |
| 1584 | .padding_right(1) |
| 1585 | .padding_top(1) |
| 1586 | .padding_bottom(1) |
| 1587 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_4x4); |
| 1588 | } |
| 1589 | } |
| 1590 | } |
| 1591 | #endif // XNN_ARCH_ARM64 |
| 1592 | |
| 1593 | |
| 1594 | #if XNN_ARCH_ARM64 |
| 1595 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_5X4, output_width_eq_4) { |
| 1596 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1597 | DWConv2DMicrokernelTester() |
| 1598 | .input_width(4) |
| 1599 | .input_height(5) |
| 1600 | .kernel_height(3) |
| 1601 | .kernel_width(3) |
| 1602 | .subsampling(1) |
| 1603 | .padding_left(1) |
| 1604 | .padding_right(1) |
| 1605 | .padding_top(1) |
| 1606 | .padding_bottom(1) |
| 1607 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_5x4); |
| 1608 | } |
| 1609 | |
| 1610 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_5X4, output_width_div_4) { |
| 1611 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1612 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 1613 | DWConv2DMicrokernelTester() |
| 1614 | .input_width(input_width) |
| 1615 | .input_height(5) |
| 1616 | .kernel_height(3) |
| 1617 | .kernel_width(3) |
| 1618 | .subsampling(1) |
| 1619 | .padding_left(1) |
| 1620 | .padding_right(1) |
| 1621 | .padding_top(1) |
| 1622 | .padding_bottom(1) |
| 1623 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_5x4); |
| 1624 | } |
| 1625 | } |
| 1626 | |
| 1627 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_5X4, output_width_lt_4) { |
| 1628 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1629 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 1630 | DWConv2DMicrokernelTester() |
| 1631 | .input_width(4) |
| 1632 | .input_height(5) |
| 1633 | .kernel_height(3) |
| 1634 | .kernel_width(3) |
| 1635 | .subsampling(1) |
| 1636 | .padding_left(1) |
| 1637 | .padding_right(1) |
| 1638 | .padding_top(1) |
| 1639 | .padding_bottom(1) |
| 1640 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_5x4); |
| 1641 | } |
| 1642 | } |
| 1643 | |
| 1644 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_5X4, output_width_gt_4) { |
| 1645 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1646 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 1647 | DWConv2DMicrokernelTester() |
| 1648 | .input_width(input_width) |
| 1649 | .input_height(5) |
| 1650 | .kernel_height(3) |
| 1651 | .kernel_width(3) |
| 1652 | .subsampling(1) |
| 1653 | .padding_left(1) |
| 1654 | .padding_right(1) |
| 1655 | .padding_top(1) |
| 1656 | .padding_bottom(1) |
| 1657 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_5x4); |
| 1658 | } |
| 1659 | } |
| 1660 | |
| 1661 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_5X4, output_height_div_5) { |
| 1662 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1663 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 1664 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1665 | DWConv2DMicrokernelTester() |
| 1666 | .input_width(input_width) |
| 1667 | .input_height(input_height) |
| 1668 | .kernel_height(3) |
| 1669 | .kernel_width(3) |
| 1670 | .subsampling(1) |
| 1671 | .padding_left(1) |
| 1672 | .padding_right(1) |
| 1673 | .padding_top(1) |
| 1674 | .padding_bottom(1) |
| 1675 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_5x4); |
| 1676 | } |
| 1677 | } |
| 1678 | } |
| 1679 | |
| 1680 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_5X4, output_height_lt_5) { |
| 1681 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1682 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 1683 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1684 | DWConv2DMicrokernelTester() |
| 1685 | .input_width(input_width) |
| 1686 | .input_height(input_height) |
| 1687 | .kernel_height(3) |
| 1688 | .kernel_width(3) |
| 1689 | .subsampling(1) |
| 1690 | .padding_left(1) |
| 1691 | .padding_right(1) |
| 1692 | .padding_top(1) |
| 1693 | .padding_bottom(1) |
| 1694 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_5x4); |
| 1695 | } |
| 1696 | } |
| 1697 | } |
| 1698 | |
| 1699 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_5X4, output_height_gt_5) { |
| 1700 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1701 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 1702 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1703 | DWConv2DMicrokernelTester() |
| 1704 | .input_width(input_width) |
| 1705 | .input_height(input_height) |
| 1706 | .kernel_height(3) |
| 1707 | .kernel_width(3) |
| 1708 | .subsampling(1) |
| 1709 | .padding_left(1) |
| 1710 | .padding_right(1) |
| 1711 | .padding_top(1) |
| 1712 | .padding_bottom(1) |
| 1713 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_5x4); |
| 1714 | } |
| 1715 | } |
| 1716 | } |
| 1717 | #endif // XNN_ARCH_ARM64 |
| 1718 | |
| 1719 | |
| 1720 | #if XNN_ARCH_ARM64 |
| 1721 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_6X4, output_width_eq_4) { |
| 1722 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1723 | DWConv2DMicrokernelTester() |
| 1724 | .input_width(4) |
| 1725 | .input_height(6) |
| 1726 | .kernel_height(3) |
| 1727 | .kernel_width(3) |
| 1728 | .subsampling(1) |
| 1729 | .padding_left(1) |
| 1730 | .padding_right(1) |
| 1731 | .padding_top(1) |
| 1732 | .padding_bottom(1) |
| 1733 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_6x4); |
| 1734 | } |
| 1735 | |
| 1736 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_6X4, output_width_div_4) { |
| 1737 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1738 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 1739 | DWConv2DMicrokernelTester() |
| 1740 | .input_width(input_width) |
| 1741 | .input_height(6) |
| 1742 | .kernel_height(3) |
| 1743 | .kernel_width(3) |
| 1744 | .subsampling(1) |
| 1745 | .padding_left(1) |
| 1746 | .padding_right(1) |
| 1747 | .padding_top(1) |
| 1748 | .padding_bottom(1) |
| 1749 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_6x4); |
| 1750 | } |
| 1751 | } |
| 1752 | |
| 1753 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_6X4, output_width_lt_4) { |
| 1754 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1755 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 1756 | DWConv2DMicrokernelTester() |
| 1757 | .input_width(4) |
| 1758 | .input_height(6) |
| 1759 | .kernel_height(3) |
| 1760 | .kernel_width(3) |
| 1761 | .subsampling(1) |
| 1762 | .padding_left(1) |
| 1763 | .padding_right(1) |
| 1764 | .padding_top(1) |
| 1765 | .padding_bottom(1) |
| 1766 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_6x4); |
| 1767 | } |
| 1768 | } |
| 1769 | |
| 1770 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_6X4, output_width_gt_4) { |
| 1771 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1772 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 1773 | DWConv2DMicrokernelTester() |
| 1774 | .input_width(input_width) |
| 1775 | .input_height(6) |
| 1776 | .kernel_height(3) |
| 1777 | .kernel_width(3) |
| 1778 | .subsampling(1) |
| 1779 | .padding_left(1) |
| 1780 | .padding_right(1) |
| 1781 | .padding_top(1) |
| 1782 | .padding_bottom(1) |
| 1783 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_6x4); |
| 1784 | } |
| 1785 | } |
| 1786 | |
| 1787 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_6X4, output_height_div_6) { |
| 1788 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1789 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 1790 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1791 | DWConv2DMicrokernelTester() |
| 1792 | .input_width(input_width) |
| 1793 | .input_height(input_height) |
| 1794 | .kernel_height(3) |
| 1795 | .kernel_width(3) |
| 1796 | .subsampling(1) |
| 1797 | .padding_left(1) |
| 1798 | .padding_right(1) |
| 1799 | .padding_top(1) |
| 1800 | .padding_bottom(1) |
| 1801 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_6x4); |
| 1802 | } |
| 1803 | } |
| 1804 | } |
| 1805 | |
| 1806 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_6X4, output_height_lt_6) { |
| 1807 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1808 | for (size_t input_height = 1; input_height < 6; input_height++) { |
| 1809 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1810 | DWConv2DMicrokernelTester() |
| 1811 | .input_width(input_width) |
| 1812 | .input_height(input_height) |
| 1813 | .kernel_height(3) |
| 1814 | .kernel_width(3) |
| 1815 | .subsampling(1) |
| 1816 | .padding_left(1) |
| 1817 | .padding_right(1) |
| 1818 | .padding_top(1) |
| 1819 | .padding_bottom(1) |
| 1820 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_6x4); |
| 1821 | } |
| 1822 | } |
| 1823 | } |
| 1824 | |
| 1825 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_6X4, output_height_gt_6) { |
| 1826 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1827 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 1828 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1829 | DWConv2DMicrokernelTester() |
| 1830 | .input_width(input_width) |
| 1831 | .input_height(input_height) |
| 1832 | .kernel_height(3) |
| 1833 | .kernel_width(3) |
| 1834 | .subsampling(1) |
| 1835 | .padding_left(1) |
| 1836 | .padding_right(1) |
| 1837 | .padding_top(1) |
| 1838 | .padding_bottom(1) |
| 1839 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_6x4); |
| 1840 | } |
| 1841 | } |
| 1842 | } |
| 1843 | #endif // XNN_ARCH_ARM64 |
| 1844 | |
| 1845 | |
| 1846 | #if XNN_ARCH_ARM64 |
| 1847 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC2, output_width_eq_4) { |
| 1848 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1849 | DWConv2DMicrokernelTester() |
| 1850 | .input_width(4) |
| 1851 | .input_height(1) |
| 1852 | .kernel_height(3) |
| 1853 | .kernel_width(3) |
| 1854 | .subsampling(1) |
| 1855 | .padding_left(1) |
| 1856 | .padding_right(1) |
| 1857 | .padding_top(1) |
| 1858 | .padding_bottom(1) |
| 1859 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc2); |
| 1860 | } |
| 1861 | |
| 1862 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC2, output_width_div_4) { |
| 1863 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1864 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 1865 | DWConv2DMicrokernelTester() |
| 1866 | .input_width(input_width) |
| 1867 | .input_height(1) |
| 1868 | .kernel_height(3) |
| 1869 | .kernel_width(3) |
| 1870 | .subsampling(1) |
| 1871 | .padding_left(1) |
| 1872 | .padding_right(1) |
| 1873 | .padding_top(1) |
| 1874 | .padding_bottom(1) |
| 1875 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc2); |
| 1876 | } |
| 1877 | } |
| 1878 | |
| 1879 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC2, output_width_lt_4) { |
| 1880 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1881 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 1882 | DWConv2DMicrokernelTester() |
| 1883 | .input_width(4) |
| 1884 | .input_height(1) |
| 1885 | .kernel_height(3) |
| 1886 | .kernel_width(3) |
| 1887 | .subsampling(1) |
| 1888 | .padding_left(1) |
| 1889 | .padding_right(1) |
| 1890 | .padding_top(1) |
| 1891 | .padding_bottom(1) |
| 1892 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc2); |
| 1893 | } |
| 1894 | } |
| 1895 | |
| 1896 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC2, output_width_gt_4) { |
| 1897 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1898 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 1899 | DWConv2DMicrokernelTester() |
| 1900 | .input_width(input_width) |
| 1901 | .input_height(1) |
| 1902 | .kernel_height(3) |
| 1903 | .kernel_width(3) |
| 1904 | .subsampling(1) |
| 1905 | .padding_left(1) |
| 1906 | .padding_right(1) |
| 1907 | .padding_top(1) |
| 1908 | .padding_bottom(1) |
| 1909 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc2); |
| 1910 | } |
| 1911 | } |
| 1912 | |
| 1913 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC2, output_height_gt_1) { |
| 1914 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1915 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 1916 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 1917 | DWConv2DMicrokernelTester() |
| 1918 | .input_width(input_width) |
| 1919 | .input_height(input_height) |
| 1920 | .kernel_height(3) |
| 1921 | .kernel_width(3) |
| 1922 | .subsampling(1) |
| 1923 | .padding_left(1) |
| 1924 | .padding_right(1) |
| 1925 | .padding_top(1) |
| 1926 | .padding_bottom(1) |
| 1927 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc2); |
| 1928 | } |
| 1929 | } |
| 1930 | } |
| 1931 | #endif // XNN_ARCH_ARM64 |
| 1932 | |
| 1933 | |
| 1934 | #if XNN_ARCH_ARM64 |
| 1935 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC3, output_width_eq_4) { |
| 1936 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1937 | DWConv2DMicrokernelTester() |
| 1938 | .input_width(4) |
| 1939 | .input_height(1) |
| 1940 | .kernel_height(3) |
| 1941 | .kernel_width(3) |
| 1942 | .subsampling(1) |
| 1943 | .padding_left(1) |
| 1944 | .padding_right(1) |
| 1945 | .padding_top(1) |
| 1946 | .padding_bottom(1) |
| 1947 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc3); |
| 1948 | } |
| 1949 | |
| 1950 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC3, output_width_div_4) { |
| 1951 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1952 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 1953 | DWConv2DMicrokernelTester() |
| 1954 | .input_width(input_width) |
| 1955 | .input_height(1) |
| 1956 | .kernel_height(3) |
| 1957 | .kernel_width(3) |
| 1958 | .subsampling(1) |
| 1959 | .padding_left(1) |
| 1960 | .padding_right(1) |
| 1961 | .padding_top(1) |
| 1962 | .padding_bottom(1) |
| 1963 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc3); |
| 1964 | } |
| 1965 | } |
| 1966 | |
| 1967 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC3, output_width_lt_4) { |
| 1968 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1969 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 1970 | DWConv2DMicrokernelTester() |
| 1971 | .input_width(4) |
| 1972 | .input_height(1) |
| 1973 | .kernel_height(3) |
| 1974 | .kernel_width(3) |
| 1975 | .subsampling(1) |
| 1976 | .padding_left(1) |
| 1977 | .padding_right(1) |
| 1978 | .padding_top(1) |
| 1979 | .padding_bottom(1) |
| 1980 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc3); |
| 1981 | } |
| 1982 | } |
| 1983 | |
| 1984 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC3, output_width_gt_4) { |
| 1985 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1986 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 1987 | DWConv2DMicrokernelTester() |
| 1988 | .input_width(input_width) |
| 1989 | .input_height(1) |
| 1990 | .kernel_height(3) |
| 1991 | .kernel_width(3) |
| 1992 | .subsampling(1) |
| 1993 | .padding_left(1) |
| 1994 | .padding_right(1) |
| 1995 | .padding_top(1) |
| 1996 | .padding_bottom(1) |
| 1997 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc3); |
| 1998 | } |
| 1999 | } |
| 2000 | |
| 2001 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC3, output_height_gt_1) { |
| 2002 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2003 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 2004 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 2005 | DWConv2DMicrokernelTester() |
| 2006 | .input_width(input_width) |
| 2007 | .input_height(input_height) |
| 2008 | .kernel_height(3) |
| 2009 | .kernel_width(3) |
| 2010 | .subsampling(1) |
| 2011 | .padding_left(1) |
| 2012 | .padding_right(1) |
| 2013 | .padding_top(1) |
| 2014 | .padding_bottom(1) |
| 2015 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc3); |
| 2016 | } |
| 2017 | } |
| 2018 | } |
| 2019 | #endif // XNN_ARCH_ARM64 |
| 2020 | |
| 2021 | |
| 2022 | #if XNN_ARCH_ARM64 |
| 2023 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC4, output_width_eq_4) { |
| 2024 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2025 | DWConv2DMicrokernelTester() |
| 2026 | .input_width(4) |
| 2027 | .input_height(1) |
| 2028 | .kernel_height(3) |
| 2029 | .kernel_width(3) |
| 2030 | .subsampling(1) |
| 2031 | .padding_left(1) |
| 2032 | .padding_right(1) |
| 2033 | .padding_top(1) |
| 2034 | .padding_bottom(1) |
| 2035 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc4); |
| 2036 | } |
| 2037 | |
| 2038 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC4, output_width_div_4) { |
| 2039 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2040 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 2041 | DWConv2DMicrokernelTester() |
| 2042 | .input_width(input_width) |
| 2043 | .input_height(1) |
| 2044 | .kernel_height(3) |
| 2045 | .kernel_width(3) |
| 2046 | .subsampling(1) |
| 2047 | .padding_left(1) |
| 2048 | .padding_right(1) |
| 2049 | .padding_top(1) |
| 2050 | .padding_bottom(1) |
| 2051 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc4); |
| 2052 | } |
| 2053 | } |
| 2054 | |
| 2055 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC4, output_width_lt_4) { |
| 2056 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2057 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 2058 | DWConv2DMicrokernelTester() |
| 2059 | .input_width(4) |
| 2060 | .input_height(1) |
| 2061 | .kernel_height(3) |
| 2062 | .kernel_width(3) |
| 2063 | .subsampling(1) |
| 2064 | .padding_left(1) |
| 2065 | .padding_right(1) |
| 2066 | .padding_top(1) |
| 2067 | .padding_bottom(1) |
| 2068 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc4); |
| 2069 | } |
| 2070 | } |
| 2071 | |
| 2072 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC4, output_width_gt_4) { |
| 2073 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2074 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 2075 | DWConv2DMicrokernelTester() |
| 2076 | .input_width(input_width) |
| 2077 | .input_height(1) |
| 2078 | .kernel_height(3) |
| 2079 | .kernel_width(3) |
| 2080 | .subsampling(1) |
| 2081 | .padding_left(1) |
| 2082 | .padding_right(1) |
| 2083 | .padding_top(1) |
| 2084 | .padding_bottom(1) |
| 2085 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc4); |
| 2086 | } |
| 2087 | } |
| 2088 | |
| 2089 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_1X4_ACC4, output_height_gt_1) { |
| 2090 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2091 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 2092 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 2093 | DWConv2DMicrokernelTester() |
| 2094 | .input_width(input_width) |
| 2095 | .input_height(input_height) |
| 2096 | .kernel_height(3) |
| 2097 | .kernel_width(3) |
| 2098 | .subsampling(1) |
| 2099 | .padding_left(1) |
| 2100 | .padding_right(1) |
| 2101 | .padding_top(1) |
| 2102 | .padding_bottom(1) |
| 2103 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc4); |
| 2104 | } |
| 2105 | } |
| 2106 | } |
| 2107 | #endif // XNN_ARCH_ARM64 |
| 2108 | |
| 2109 | |
| 2110 | #if XNN_ARCH_ARM64 |
| 2111 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4_ACC2, output_width_eq_4) { |
| 2112 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2113 | DWConv2DMicrokernelTester() |
| 2114 | .input_width(4) |
| 2115 | .input_height(2) |
| 2116 | .kernel_height(3) |
| 2117 | .kernel_width(3) |
| 2118 | .subsampling(1) |
| 2119 | .padding_left(1) |
| 2120 | .padding_right(1) |
| 2121 | .padding_top(1) |
| 2122 | .padding_bottom(1) |
| 2123 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4_acc2); |
| 2124 | } |
| 2125 | |
| 2126 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4_ACC2, output_width_div_4) { |
| 2127 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2128 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 2129 | DWConv2DMicrokernelTester() |
| 2130 | .input_width(input_width) |
| 2131 | .input_height(2) |
| 2132 | .kernel_height(3) |
| 2133 | .kernel_width(3) |
| 2134 | .subsampling(1) |
| 2135 | .padding_left(1) |
| 2136 | .padding_right(1) |
| 2137 | .padding_top(1) |
| 2138 | .padding_bottom(1) |
| 2139 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4_acc2); |
| 2140 | } |
| 2141 | } |
| 2142 | |
| 2143 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4_ACC2, output_width_lt_4) { |
| 2144 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2145 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 2146 | DWConv2DMicrokernelTester() |
| 2147 | .input_width(4) |
| 2148 | .input_height(2) |
| 2149 | .kernel_height(3) |
| 2150 | .kernel_width(3) |
| 2151 | .subsampling(1) |
| 2152 | .padding_left(1) |
| 2153 | .padding_right(1) |
| 2154 | .padding_top(1) |
| 2155 | .padding_bottom(1) |
| 2156 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4_acc2); |
| 2157 | } |
| 2158 | } |
| 2159 | |
| 2160 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4_ACC2, output_width_gt_4) { |
| 2161 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2162 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 2163 | DWConv2DMicrokernelTester() |
| 2164 | .input_width(input_width) |
| 2165 | .input_height(2) |
| 2166 | .kernel_height(3) |
| 2167 | .kernel_width(3) |
| 2168 | .subsampling(1) |
| 2169 | .padding_left(1) |
| 2170 | .padding_right(1) |
| 2171 | .padding_top(1) |
| 2172 | .padding_bottom(1) |
| 2173 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4_acc2); |
| 2174 | } |
| 2175 | } |
| 2176 | |
| 2177 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4_ACC2, output_height_div_2) { |
| 2178 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2179 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 2180 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 2181 | DWConv2DMicrokernelTester() |
| 2182 | .input_width(input_width) |
| 2183 | .input_height(input_height) |
| 2184 | .kernel_height(3) |
| 2185 | .kernel_width(3) |
| 2186 | .subsampling(1) |
| 2187 | .padding_left(1) |
| 2188 | .padding_right(1) |
| 2189 | .padding_top(1) |
| 2190 | .padding_bottom(1) |
| 2191 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4_acc2); |
| 2192 | } |
| 2193 | } |
| 2194 | } |
| 2195 | |
| 2196 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4_ACC2, output_height_lt_2) { |
| 2197 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2198 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 2199 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 2200 | DWConv2DMicrokernelTester() |
| 2201 | .input_width(input_width) |
| 2202 | .input_height(input_height) |
| 2203 | .kernel_height(3) |
| 2204 | .kernel_width(3) |
| 2205 | .subsampling(1) |
| 2206 | .padding_left(1) |
| 2207 | .padding_right(1) |
| 2208 | .padding_top(1) |
| 2209 | .padding_bottom(1) |
| 2210 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4_acc2); |
| 2211 | } |
| 2212 | } |
| 2213 | } |
| 2214 | |
| 2215 | TEST(F32_DWCONV2D_CHW_3X3P1__NEONFMA_2X4_ACC2, output_height_gt_2) { |
| 2216 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2217 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 2218 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 2219 | DWConv2DMicrokernelTester() |
| 2220 | .input_width(input_width) |
| 2221 | .input_height(input_height) |
| 2222 | .kernel_height(3) |
| 2223 | .kernel_width(3) |
| 2224 | .subsampling(1) |
| 2225 | .padding_left(1) |
| 2226 | .padding_right(1) |
| 2227 | .padding_top(1) |
| 2228 | .padding_bottom(1) |
| 2229 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4_acc2); |
| 2230 | } |
| 2231 | } |
| 2232 | } |
| 2233 | #endif // XNN_ARCH_ARM64 |
| 2234 | |
| 2235 | |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 2236 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2237 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4, output_width_eq_4) { |
| 2238 | TEST_REQUIRES_ARM_NEON; |
| 2239 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 2240 | DWConv2DMicrokernelTester() |
| 2241 | .input_width(input_width) |
| 2242 | .input_height(2) |
| 2243 | .kernel_height(3) |
| 2244 | .kernel_width(3) |
| 2245 | .subsampling(2) |
| 2246 | .padding_left(1) |
| 2247 | .padding_right(1) |
| 2248 | .padding_top(1) |
| 2249 | .padding_bottom(1) |
| 2250 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4); |
| 2251 | } |
| 2252 | } |
| 2253 | |
| 2254 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4, output_width_div_4) { |
| 2255 | TEST_REQUIRES_ARM_NEON; |
| 2256 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 2257 | DWConv2DMicrokernelTester() |
| 2258 | .input_width(input_width) |
| 2259 | .input_height(2) |
| 2260 | .kernel_height(3) |
| 2261 | .kernel_width(3) |
| 2262 | .subsampling(2) |
| 2263 | .padding_left(1) |
| 2264 | .padding_right(1) |
| 2265 | .padding_top(1) |
| 2266 | .padding_bottom(1) |
| 2267 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4); |
| 2268 | } |
| 2269 | } |
| 2270 | |
| 2271 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4, output_width_lt_4) { |
| 2272 | TEST_REQUIRES_ARM_NEON; |
| 2273 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 2274 | DWConv2DMicrokernelTester() |
| 2275 | .input_width(8) |
| 2276 | .input_height(2) |
| 2277 | .kernel_height(3) |
| 2278 | .kernel_width(3) |
| 2279 | .subsampling(2) |
| 2280 | .padding_left(1) |
| 2281 | .padding_right(1) |
| 2282 | .padding_top(1) |
| 2283 | .padding_bottom(1) |
| 2284 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4); |
| 2285 | } |
| 2286 | } |
| 2287 | |
| 2288 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4, output_width_gt_4) { |
| 2289 | TEST_REQUIRES_ARM_NEON; |
| 2290 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 2291 | DWConv2DMicrokernelTester() |
| 2292 | .input_width(input_width) |
| 2293 | .input_height(2) |
| 2294 | .kernel_height(3) |
| 2295 | .kernel_width(3) |
| 2296 | .subsampling(2) |
| 2297 | .padding_left(1) |
| 2298 | .padding_right(1) |
| 2299 | .padding_top(1) |
| 2300 | .padding_bottom(1) |
| 2301 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4); |
| 2302 | } |
| 2303 | } |
| 2304 | |
| 2305 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4, output_height_eq_1) { |
| 2306 | TEST_REQUIRES_ARM_NEON; |
| 2307 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 2308 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2309 | DWConv2DMicrokernelTester() |
| 2310 | .input_width(input_width) |
| 2311 | .input_height(input_height) |
| 2312 | .kernel_height(3) |
| 2313 | .kernel_width(3) |
| 2314 | .subsampling(2) |
| 2315 | .padding_left(1) |
| 2316 | .padding_right(1) |
| 2317 | .padding_top(1) |
| 2318 | .padding_bottom(1) |
| 2319 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4); |
| 2320 | } |
| 2321 | } |
| 2322 | } |
| 2323 | |
| 2324 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4, output_height_gt_1) { |
| 2325 | TEST_REQUIRES_ARM_NEON; |
| 2326 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 2327 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2328 | DWConv2DMicrokernelTester() |
| 2329 | .input_width(input_width) |
| 2330 | .input_height(input_height) |
| 2331 | .kernel_height(3) |
| 2332 | .kernel_width(3) |
| 2333 | .subsampling(2) |
| 2334 | .padding_left(1) |
| 2335 | .padding_right(1) |
| 2336 | .padding_top(1) |
| 2337 | .padding_bottom(1) |
| 2338 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4); |
| 2339 | } |
| 2340 | } |
| 2341 | } |
| 2342 | |
| 2343 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4, padding_top_eq_1) { |
| 2344 | TEST_REQUIRES_ARM_NEON; |
| 2345 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 2346 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2347 | DWConv2DMicrokernelTester() |
| 2348 | .input_width(input_width) |
| 2349 | .input_height(input_height) |
| 2350 | .kernel_height(3) |
| 2351 | .kernel_width(3) |
| 2352 | .subsampling(2) |
| 2353 | .padding_left(1) |
| 2354 | .padding_right(1) |
| 2355 | .padding_top(0) |
| 2356 | .padding_bottom(1) |
| 2357 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4); |
| 2358 | } |
| 2359 | } |
| 2360 | } |
| 2361 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2362 | |
| 2363 | |
| 2364 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2365 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4, output_width_eq_4) { |
| 2366 | TEST_REQUIRES_ARM_NEON; |
| 2367 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 2368 | DWConv2DMicrokernelTester() |
| 2369 | .input_width(input_width) |
| 2370 | .input_height(4) |
| 2371 | .kernel_height(3) |
| 2372 | .kernel_width(3) |
| 2373 | .subsampling(2) |
| 2374 | .padding_left(1) |
| 2375 | .padding_right(1) |
| 2376 | .padding_top(1) |
| 2377 | .padding_bottom(1) |
| 2378 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4); |
| 2379 | } |
| 2380 | } |
| 2381 | |
| 2382 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4, output_width_div_4) { |
| 2383 | TEST_REQUIRES_ARM_NEON; |
| 2384 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 2385 | DWConv2DMicrokernelTester() |
| 2386 | .input_width(input_width) |
| 2387 | .input_height(4) |
| 2388 | .kernel_height(3) |
| 2389 | .kernel_width(3) |
| 2390 | .subsampling(2) |
| 2391 | .padding_left(1) |
| 2392 | .padding_right(1) |
| 2393 | .padding_top(1) |
| 2394 | .padding_bottom(1) |
| 2395 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4); |
| 2396 | } |
| 2397 | } |
| 2398 | |
| 2399 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4, output_width_lt_4) { |
| 2400 | TEST_REQUIRES_ARM_NEON; |
| 2401 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 2402 | DWConv2DMicrokernelTester() |
| 2403 | .input_width(8) |
| 2404 | .input_height(4) |
| 2405 | .kernel_height(3) |
| 2406 | .kernel_width(3) |
| 2407 | .subsampling(2) |
| 2408 | .padding_left(1) |
| 2409 | .padding_right(1) |
| 2410 | .padding_top(1) |
| 2411 | .padding_bottom(1) |
| 2412 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4); |
| 2413 | } |
| 2414 | } |
| 2415 | |
| 2416 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4, output_width_gt_4) { |
| 2417 | TEST_REQUIRES_ARM_NEON; |
| 2418 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 2419 | DWConv2DMicrokernelTester() |
| 2420 | .input_width(input_width) |
| 2421 | .input_height(4) |
| 2422 | .kernel_height(3) |
| 2423 | .kernel_width(3) |
| 2424 | .subsampling(2) |
| 2425 | .padding_left(1) |
| 2426 | .padding_right(1) |
| 2427 | .padding_top(1) |
| 2428 | .padding_bottom(1) |
| 2429 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4); |
| 2430 | } |
| 2431 | } |
| 2432 | |
| 2433 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4, output_height_eq_2) { |
| 2434 | TEST_REQUIRES_ARM_NEON; |
| 2435 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 2436 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2437 | DWConv2DMicrokernelTester() |
| 2438 | .input_width(input_width) |
| 2439 | .input_height(input_height) |
| 2440 | .kernel_height(3) |
| 2441 | .kernel_width(3) |
| 2442 | .subsampling(2) |
| 2443 | .padding_left(1) |
| 2444 | .padding_right(1) |
| 2445 | .padding_top(1) |
| 2446 | .padding_bottom(1) |
| 2447 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4); |
| 2448 | } |
| 2449 | } |
| 2450 | } |
| 2451 | |
| 2452 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4, output_height_div_2) { |
| 2453 | TEST_REQUIRES_ARM_NEON; |
| 2454 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 2455 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2456 | DWConv2DMicrokernelTester() |
| 2457 | .input_width(input_width) |
| 2458 | .input_height(input_height) |
| 2459 | .kernel_height(3) |
| 2460 | .kernel_width(3) |
| 2461 | .subsampling(2) |
| 2462 | .padding_left(1) |
| 2463 | .padding_right(1) |
| 2464 | .padding_top(1) |
| 2465 | .padding_bottom(1) |
| 2466 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4); |
| 2467 | } |
| 2468 | } |
| 2469 | } |
| 2470 | |
| 2471 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4, output_height_lt_2) { |
| 2472 | TEST_REQUIRES_ARM_NEON; |
| 2473 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 2474 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2475 | DWConv2DMicrokernelTester() |
| 2476 | .input_width(input_width) |
| 2477 | .input_height(input_height) |
| 2478 | .kernel_height(3) |
| 2479 | .kernel_width(3) |
| 2480 | .subsampling(2) |
| 2481 | .padding_left(1) |
| 2482 | .padding_right(1) |
| 2483 | .padding_top(1) |
| 2484 | .padding_bottom(1) |
| 2485 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4); |
| 2486 | } |
| 2487 | } |
| 2488 | } |
| 2489 | |
| 2490 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4, output_height_gt_2) { |
| 2491 | TEST_REQUIRES_ARM_NEON; |
| 2492 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 2493 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2494 | DWConv2DMicrokernelTester() |
| 2495 | .input_width(input_width) |
| 2496 | .input_height(input_height) |
| 2497 | .kernel_height(3) |
| 2498 | .kernel_width(3) |
| 2499 | .subsampling(2) |
| 2500 | .padding_left(1) |
| 2501 | .padding_right(1) |
| 2502 | .padding_top(1) |
| 2503 | .padding_bottom(1) |
| 2504 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4); |
| 2505 | } |
| 2506 | } |
| 2507 | } |
| 2508 | |
| 2509 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4, padding_top_eq_1) { |
| 2510 | TEST_REQUIRES_ARM_NEON; |
| 2511 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 2512 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2513 | DWConv2DMicrokernelTester() |
| 2514 | .input_width(input_width) |
| 2515 | .input_height(input_height) |
| 2516 | .kernel_height(3) |
| 2517 | .kernel_width(3) |
| 2518 | .subsampling(2) |
| 2519 | .padding_left(1) |
| 2520 | .padding_right(1) |
| 2521 | .padding_top(0) |
| 2522 | .padding_bottom(1) |
| 2523 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4); |
| 2524 | } |
| 2525 | } |
| 2526 | } |
| 2527 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2528 | |
| 2529 | |
| 2530 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2531 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_3X4, output_width_eq_4) { |
| 2532 | TEST_REQUIRES_ARM_NEON; |
| 2533 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 2534 | DWConv2DMicrokernelTester() |
| 2535 | .input_width(input_width) |
| 2536 | .input_height(6) |
| 2537 | .kernel_height(3) |
| 2538 | .kernel_width(3) |
| 2539 | .subsampling(2) |
| 2540 | .padding_left(1) |
| 2541 | .padding_right(1) |
| 2542 | .padding_top(1) |
| 2543 | .padding_bottom(1) |
| 2544 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_3x4); |
| 2545 | } |
| 2546 | } |
| 2547 | |
| 2548 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_3X4, output_width_div_4) { |
| 2549 | TEST_REQUIRES_ARM_NEON; |
| 2550 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 2551 | DWConv2DMicrokernelTester() |
| 2552 | .input_width(input_width) |
| 2553 | .input_height(6) |
| 2554 | .kernel_height(3) |
| 2555 | .kernel_width(3) |
| 2556 | .subsampling(2) |
| 2557 | .padding_left(1) |
| 2558 | .padding_right(1) |
| 2559 | .padding_top(1) |
| 2560 | .padding_bottom(1) |
| 2561 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_3x4); |
| 2562 | } |
| 2563 | } |
| 2564 | |
| 2565 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_3X4, output_width_lt_4) { |
| 2566 | TEST_REQUIRES_ARM_NEON; |
| 2567 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 2568 | DWConv2DMicrokernelTester() |
| 2569 | .input_width(8) |
| 2570 | .input_height(6) |
| 2571 | .kernel_height(3) |
| 2572 | .kernel_width(3) |
| 2573 | .subsampling(2) |
| 2574 | .padding_left(1) |
| 2575 | .padding_right(1) |
| 2576 | .padding_top(1) |
| 2577 | .padding_bottom(1) |
| 2578 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_3x4); |
| 2579 | } |
| 2580 | } |
| 2581 | |
| 2582 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_3X4, output_width_gt_4) { |
| 2583 | TEST_REQUIRES_ARM_NEON; |
| 2584 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 2585 | DWConv2DMicrokernelTester() |
| 2586 | .input_width(input_width) |
| 2587 | .input_height(6) |
| 2588 | .kernel_height(3) |
| 2589 | .kernel_width(3) |
| 2590 | .subsampling(2) |
| 2591 | .padding_left(1) |
| 2592 | .padding_right(1) |
| 2593 | .padding_top(1) |
| 2594 | .padding_bottom(1) |
| 2595 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_3x4); |
| 2596 | } |
| 2597 | } |
| 2598 | |
| 2599 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_3X4, output_height_eq_3) { |
| 2600 | TEST_REQUIRES_ARM_NEON; |
| 2601 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 2602 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2603 | DWConv2DMicrokernelTester() |
| 2604 | .input_width(input_width) |
| 2605 | .input_height(input_height) |
| 2606 | .kernel_height(3) |
| 2607 | .kernel_width(3) |
| 2608 | .subsampling(2) |
| 2609 | .padding_left(1) |
| 2610 | .padding_right(1) |
| 2611 | .padding_top(1) |
| 2612 | .padding_bottom(1) |
| 2613 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_3x4); |
| 2614 | } |
| 2615 | } |
| 2616 | } |
| 2617 | |
| 2618 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_3X4, output_height_div_3) { |
| 2619 | TEST_REQUIRES_ARM_NEON; |
| 2620 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 2621 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2622 | DWConv2DMicrokernelTester() |
| 2623 | .input_width(input_width) |
| 2624 | .input_height(input_height) |
| 2625 | .kernel_height(3) |
| 2626 | .kernel_width(3) |
| 2627 | .subsampling(2) |
| 2628 | .padding_left(1) |
| 2629 | .padding_right(1) |
| 2630 | .padding_top(1) |
| 2631 | .padding_bottom(1) |
| 2632 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_3x4); |
| 2633 | } |
| 2634 | } |
| 2635 | } |
| 2636 | |
| 2637 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_3X4, output_height_lt_3) { |
| 2638 | TEST_REQUIRES_ARM_NEON; |
| 2639 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 2640 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2641 | DWConv2DMicrokernelTester() |
| 2642 | .input_width(input_width) |
| 2643 | .input_height(input_height) |
| 2644 | .kernel_height(3) |
| 2645 | .kernel_width(3) |
| 2646 | .subsampling(2) |
| 2647 | .padding_left(1) |
| 2648 | .padding_right(1) |
| 2649 | .padding_top(1) |
| 2650 | .padding_bottom(1) |
| 2651 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_3x4); |
| 2652 | } |
| 2653 | } |
| 2654 | } |
| 2655 | |
| 2656 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_3X4, output_height_gt_3) { |
| 2657 | TEST_REQUIRES_ARM_NEON; |
| 2658 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 2659 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2660 | DWConv2DMicrokernelTester() |
| 2661 | .input_width(input_width) |
| 2662 | .input_height(input_height) |
| 2663 | .kernel_height(3) |
| 2664 | .kernel_width(3) |
| 2665 | .subsampling(2) |
| 2666 | .padding_left(1) |
| 2667 | .padding_right(1) |
| 2668 | .padding_top(1) |
| 2669 | .padding_bottom(1) |
| 2670 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_3x4); |
| 2671 | } |
| 2672 | } |
| 2673 | } |
| 2674 | |
| 2675 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_3X4, padding_top_eq_1) { |
| 2676 | TEST_REQUIRES_ARM_NEON; |
| 2677 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 2678 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2679 | DWConv2DMicrokernelTester() |
| 2680 | .input_width(input_width) |
| 2681 | .input_height(input_height) |
| 2682 | .kernel_height(3) |
| 2683 | .kernel_width(3) |
| 2684 | .subsampling(2) |
| 2685 | .padding_left(1) |
| 2686 | .padding_right(1) |
| 2687 | .padding_top(0) |
| 2688 | .padding_bottom(1) |
| 2689 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_3x4); |
| 2690 | } |
| 2691 | } |
| 2692 | } |
| 2693 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2694 | |
| 2695 | |
| 2696 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2697 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_4X4, output_width_eq_4) { |
| 2698 | TEST_REQUIRES_ARM_NEON; |
| 2699 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 2700 | DWConv2DMicrokernelTester() |
| 2701 | .input_width(input_width) |
| 2702 | .input_height(8) |
| 2703 | .kernel_height(3) |
| 2704 | .kernel_width(3) |
| 2705 | .subsampling(2) |
| 2706 | .padding_left(1) |
| 2707 | .padding_right(1) |
| 2708 | .padding_top(1) |
| 2709 | .padding_bottom(1) |
| 2710 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_4x4); |
| 2711 | } |
| 2712 | } |
| 2713 | |
| 2714 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_4X4, output_width_div_4) { |
| 2715 | TEST_REQUIRES_ARM_NEON; |
| 2716 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 2717 | DWConv2DMicrokernelTester() |
| 2718 | .input_width(input_width) |
| 2719 | .input_height(8) |
| 2720 | .kernel_height(3) |
| 2721 | .kernel_width(3) |
| 2722 | .subsampling(2) |
| 2723 | .padding_left(1) |
| 2724 | .padding_right(1) |
| 2725 | .padding_top(1) |
| 2726 | .padding_bottom(1) |
| 2727 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_4x4); |
| 2728 | } |
| 2729 | } |
| 2730 | |
| 2731 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_4X4, output_width_lt_4) { |
| 2732 | TEST_REQUIRES_ARM_NEON; |
| 2733 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 2734 | DWConv2DMicrokernelTester() |
| 2735 | .input_width(8) |
| 2736 | .input_height(8) |
| 2737 | .kernel_height(3) |
| 2738 | .kernel_width(3) |
| 2739 | .subsampling(2) |
| 2740 | .padding_left(1) |
| 2741 | .padding_right(1) |
| 2742 | .padding_top(1) |
| 2743 | .padding_bottom(1) |
| 2744 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_4x4); |
| 2745 | } |
| 2746 | } |
| 2747 | |
| 2748 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_4X4, output_width_gt_4) { |
| 2749 | TEST_REQUIRES_ARM_NEON; |
| 2750 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 2751 | DWConv2DMicrokernelTester() |
| 2752 | .input_width(input_width) |
| 2753 | .input_height(8) |
| 2754 | .kernel_height(3) |
| 2755 | .kernel_width(3) |
| 2756 | .subsampling(2) |
| 2757 | .padding_left(1) |
| 2758 | .padding_right(1) |
| 2759 | .padding_top(1) |
| 2760 | .padding_bottom(1) |
| 2761 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_4x4); |
| 2762 | } |
| 2763 | } |
| 2764 | |
| 2765 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_4X4, output_height_eq_4) { |
| 2766 | TEST_REQUIRES_ARM_NEON; |
| 2767 | for (size_t input_height = 7; input_height < 9; input_height++) { |
| 2768 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2769 | DWConv2DMicrokernelTester() |
| 2770 | .input_width(input_width) |
| 2771 | .input_height(input_height) |
| 2772 | .kernel_height(3) |
| 2773 | .kernel_width(3) |
| 2774 | .subsampling(2) |
| 2775 | .padding_left(1) |
| 2776 | .padding_right(1) |
| 2777 | .padding_top(1) |
| 2778 | .padding_bottom(1) |
| 2779 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_4x4); |
| 2780 | } |
| 2781 | } |
| 2782 | } |
| 2783 | |
| 2784 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_4X4, output_height_div_4) { |
| 2785 | TEST_REQUIRES_ARM_NEON; |
| 2786 | for (size_t input_height = 16; input_height < 64; input_height += 8) { |
| 2787 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2788 | DWConv2DMicrokernelTester() |
| 2789 | .input_width(input_width) |
| 2790 | .input_height(input_height) |
| 2791 | .kernel_height(3) |
| 2792 | .kernel_width(3) |
| 2793 | .subsampling(2) |
| 2794 | .padding_left(1) |
| 2795 | .padding_right(1) |
| 2796 | .padding_top(1) |
| 2797 | .padding_bottom(1) |
| 2798 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_4x4); |
| 2799 | } |
| 2800 | } |
| 2801 | } |
| 2802 | |
| 2803 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_4X4, output_height_lt_4) { |
| 2804 | TEST_REQUIRES_ARM_NEON; |
| 2805 | for (size_t input_height = 1; input_height < 7; input_height++) { |
| 2806 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2807 | DWConv2DMicrokernelTester() |
| 2808 | .input_width(input_width) |
| 2809 | .input_height(input_height) |
| 2810 | .kernel_height(3) |
| 2811 | .kernel_width(3) |
| 2812 | .subsampling(2) |
| 2813 | .padding_left(1) |
| 2814 | .padding_right(1) |
| 2815 | .padding_top(1) |
| 2816 | .padding_bottom(1) |
| 2817 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_4x4); |
| 2818 | } |
| 2819 | } |
| 2820 | } |
| 2821 | |
| 2822 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_4X4, output_height_gt_4) { |
| 2823 | TEST_REQUIRES_ARM_NEON; |
| 2824 | for (size_t input_height = 9; input_height < 17; input_height++) { |
| 2825 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2826 | DWConv2DMicrokernelTester() |
| 2827 | .input_width(input_width) |
| 2828 | .input_height(input_height) |
| 2829 | .kernel_height(3) |
| 2830 | .kernel_width(3) |
| 2831 | .subsampling(2) |
| 2832 | .padding_left(1) |
| 2833 | .padding_right(1) |
| 2834 | .padding_top(1) |
| 2835 | .padding_bottom(1) |
| 2836 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_4x4); |
| 2837 | } |
| 2838 | } |
| 2839 | } |
| 2840 | |
| 2841 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_4X4, padding_top_eq_1) { |
| 2842 | TEST_REQUIRES_ARM_NEON; |
| 2843 | for (size_t input_height = 2; input_height < 26; input_height++) { |
| 2844 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2845 | DWConv2DMicrokernelTester() |
| 2846 | .input_width(input_width) |
| 2847 | .input_height(input_height) |
| 2848 | .kernel_height(3) |
| 2849 | .kernel_width(3) |
| 2850 | .subsampling(2) |
| 2851 | .padding_left(1) |
| 2852 | .padding_right(1) |
| 2853 | .padding_top(0) |
| 2854 | .padding_bottom(1) |
| 2855 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_4x4); |
| 2856 | } |
| 2857 | } |
| 2858 | } |
| 2859 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2860 | |
| 2861 | |
| 2862 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2863 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC2, output_width_eq_4) { |
| 2864 | TEST_REQUIRES_ARM_NEON; |
| 2865 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 2866 | DWConv2DMicrokernelTester() |
| 2867 | .input_width(input_width) |
| 2868 | .input_height(2) |
| 2869 | .kernel_height(3) |
| 2870 | .kernel_width(3) |
| 2871 | .subsampling(2) |
| 2872 | .padding_left(1) |
| 2873 | .padding_right(1) |
| 2874 | .padding_top(1) |
| 2875 | .padding_bottom(1) |
| 2876 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc2); |
| 2877 | } |
| 2878 | } |
| 2879 | |
| 2880 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC2, output_width_div_4) { |
| 2881 | TEST_REQUIRES_ARM_NEON; |
| 2882 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 2883 | DWConv2DMicrokernelTester() |
| 2884 | .input_width(input_width) |
| 2885 | .input_height(2) |
| 2886 | .kernel_height(3) |
| 2887 | .kernel_width(3) |
| 2888 | .subsampling(2) |
| 2889 | .padding_left(1) |
| 2890 | .padding_right(1) |
| 2891 | .padding_top(1) |
| 2892 | .padding_bottom(1) |
| 2893 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc2); |
| 2894 | } |
| 2895 | } |
| 2896 | |
| 2897 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC2, output_width_lt_4) { |
| 2898 | TEST_REQUIRES_ARM_NEON; |
| 2899 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 2900 | DWConv2DMicrokernelTester() |
| 2901 | .input_width(8) |
| 2902 | .input_height(2) |
| 2903 | .kernel_height(3) |
| 2904 | .kernel_width(3) |
| 2905 | .subsampling(2) |
| 2906 | .padding_left(1) |
| 2907 | .padding_right(1) |
| 2908 | .padding_top(1) |
| 2909 | .padding_bottom(1) |
| 2910 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc2); |
| 2911 | } |
| 2912 | } |
| 2913 | |
| 2914 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC2, output_width_gt_4) { |
| 2915 | TEST_REQUIRES_ARM_NEON; |
| 2916 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 2917 | DWConv2DMicrokernelTester() |
| 2918 | .input_width(input_width) |
| 2919 | .input_height(2) |
| 2920 | .kernel_height(3) |
| 2921 | .kernel_width(3) |
| 2922 | .subsampling(2) |
| 2923 | .padding_left(1) |
| 2924 | .padding_right(1) |
| 2925 | .padding_top(1) |
| 2926 | .padding_bottom(1) |
| 2927 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc2); |
| 2928 | } |
| 2929 | } |
| 2930 | |
| 2931 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC2, output_height_eq_1) { |
| 2932 | TEST_REQUIRES_ARM_NEON; |
| 2933 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 2934 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2935 | DWConv2DMicrokernelTester() |
| 2936 | .input_width(input_width) |
| 2937 | .input_height(input_height) |
| 2938 | .kernel_height(3) |
| 2939 | .kernel_width(3) |
| 2940 | .subsampling(2) |
| 2941 | .padding_left(1) |
| 2942 | .padding_right(1) |
| 2943 | .padding_top(1) |
| 2944 | .padding_bottom(1) |
| 2945 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc2); |
| 2946 | } |
| 2947 | } |
| 2948 | } |
| 2949 | |
| 2950 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC2, output_height_gt_1) { |
| 2951 | TEST_REQUIRES_ARM_NEON; |
| 2952 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 2953 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2954 | DWConv2DMicrokernelTester() |
| 2955 | .input_width(input_width) |
| 2956 | .input_height(input_height) |
| 2957 | .kernel_height(3) |
| 2958 | .kernel_width(3) |
| 2959 | .subsampling(2) |
| 2960 | .padding_left(1) |
| 2961 | .padding_right(1) |
| 2962 | .padding_top(1) |
| 2963 | .padding_bottom(1) |
| 2964 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc2); |
| 2965 | } |
| 2966 | } |
| 2967 | } |
| 2968 | |
| 2969 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC2, padding_top_eq_1) { |
| 2970 | TEST_REQUIRES_ARM_NEON; |
| 2971 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 2972 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 2973 | DWConv2DMicrokernelTester() |
| 2974 | .input_width(input_width) |
| 2975 | .input_height(input_height) |
| 2976 | .kernel_height(3) |
| 2977 | .kernel_width(3) |
| 2978 | .subsampling(2) |
| 2979 | .padding_left(1) |
| 2980 | .padding_right(1) |
| 2981 | .padding_top(0) |
| 2982 | .padding_bottom(1) |
| 2983 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc2); |
| 2984 | } |
| 2985 | } |
| 2986 | } |
| 2987 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2988 | |
| 2989 | |
| 2990 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2991 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC3, output_width_eq_4) { |
| 2992 | TEST_REQUIRES_ARM_NEON; |
| 2993 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 2994 | DWConv2DMicrokernelTester() |
| 2995 | .input_width(input_width) |
| 2996 | .input_height(2) |
| 2997 | .kernel_height(3) |
| 2998 | .kernel_width(3) |
| 2999 | .subsampling(2) |
| 3000 | .padding_left(1) |
| 3001 | .padding_right(1) |
| 3002 | .padding_top(1) |
| 3003 | .padding_bottom(1) |
| 3004 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc3); |
| 3005 | } |
| 3006 | } |
| 3007 | |
| 3008 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC3, output_width_div_4) { |
| 3009 | TEST_REQUIRES_ARM_NEON; |
| 3010 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 3011 | DWConv2DMicrokernelTester() |
| 3012 | .input_width(input_width) |
| 3013 | .input_height(2) |
| 3014 | .kernel_height(3) |
| 3015 | .kernel_width(3) |
| 3016 | .subsampling(2) |
| 3017 | .padding_left(1) |
| 3018 | .padding_right(1) |
| 3019 | .padding_top(1) |
| 3020 | .padding_bottom(1) |
| 3021 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc3); |
| 3022 | } |
| 3023 | } |
| 3024 | |
| 3025 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC3, output_width_lt_4) { |
| 3026 | TEST_REQUIRES_ARM_NEON; |
| 3027 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 3028 | DWConv2DMicrokernelTester() |
| 3029 | .input_width(8) |
| 3030 | .input_height(2) |
| 3031 | .kernel_height(3) |
| 3032 | .kernel_width(3) |
| 3033 | .subsampling(2) |
| 3034 | .padding_left(1) |
| 3035 | .padding_right(1) |
| 3036 | .padding_top(1) |
| 3037 | .padding_bottom(1) |
| 3038 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc3); |
| 3039 | } |
| 3040 | } |
| 3041 | |
| 3042 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC3, output_width_gt_4) { |
| 3043 | TEST_REQUIRES_ARM_NEON; |
| 3044 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 3045 | DWConv2DMicrokernelTester() |
| 3046 | .input_width(input_width) |
| 3047 | .input_height(2) |
| 3048 | .kernel_height(3) |
| 3049 | .kernel_width(3) |
| 3050 | .subsampling(2) |
| 3051 | .padding_left(1) |
| 3052 | .padding_right(1) |
| 3053 | .padding_top(1) |
| 3054 | .padding_bottom(1) |
| 3055 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc3); |
| 3056 | } |
| 3057 | } |
| 3058 | |
| 3059 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC3, output_height_eq_1) { |
| 3060 | TEST_REQUIRES_ARM_NEON; |
| 3061 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 3062 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3063 | DWConv2DMicrokernelTester() |
| 3064 | .input_width(input_width) |
| 3065 | .input_height(input_height) |
| 3066 | .kernel_height(3) |
| 3067 | .kernel_width(3) |
| 3068 | .subsampling(2) |
| 3069 | .padding_left(1) |
| 3070 | .padding_right(1) |
| 3071 | .padding_top(1) |
| 3072 | .padding_bottom(1) |
| 3073 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc3); |
| 3074 | } |
| 3075 | } |
| 3076 | } |
| 3077 | |
| 3078 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC3, output_height_gt_1) { |
| 3079 | TEST_REQUIRES_ARM_NEON; |
| 3080 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 3081 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3082 | DWConv2DMicrokernelTester() |
| 3083 | .input_width(input_width) |
| 3084 | .input_height(input_height) |
| 3085 | .kernel_height(3) |
| 3086 | .kernel_width(3) |
| 3087 | .subsampling(2) |
| 3088 | .padding_left(1) |
| 3089 | .padding_right(1) |
| 3090 | .padding_top(1) |
| 3091 | .padding_bottom(1) |
| 3092 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc3); |
| 3093 | } |
| 3094 | } |
| 3095 | } |
| 3096 | |
| 3097 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC3, padding_top_eq_1) { |
| 3098 | TEST_REQUIRES_ARM_NEON; |
| 3099 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 3100 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3101 | DWConv2DMicrokernelTester() |
| 3102 | .input_width(input_width) |
| 3103 | .input_height(input_height) |
| 3104 | .kernel_height(3) |
| 3105 | .kernel_width(3) |
| 3106 | .subsampling(2) |
| 3107 | .padding_left(1) |
| 3108 | .padding_right(1) |
| 3109 | .padding_top(0) |
| 3110 | .padding_bottom(1) |
| 3111 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc3); |
| 3112 | } |
| 3113 | } |
| 3114 | } |
| 3115 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 3116 | |
| 3117 | |
| 3118 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 3119 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC4, output_width_eq_4) { |
| 3120 | TEST_REQUIRES_ARM_NEON; |
| 3121 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 3122 | DWConv2DMicrokernelTester() |
| 3123 | .input_width(input_width) |
| 3124 | .input_height(2) |
| 3125 | .kernel_height(3) |
| 3126 | .kernel_width(3) |
| 3127 | .subsampling(2) |
| 3128 | .padding_left(1) |
| 3129 | .padding_right(1) |
| 3130 | .padding_top(1) |
| 3131 | .padding_bottom(1) |
| 3132 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc4); |
| 3133 | } |
| 3134 | } |
| 3135 | |
| 3136 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC4, output_width_div_4) { |
| 3137 | TEST_REQUIRES_ARM_NEON; |
| 3138 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 3139 | DWConv2DMicrokernelTester() |
| 3140 | .input_width(input_width) |
| 3141 | .input_height(2) |
| 3142 | .kernel_height(3) |
| 3143 | .kernel_width(3) |
| 3144 | .subsampling(2) |
| 3145 | .padding_left(1) |
| 3146 | .padding_right(1) |
| 3147 | .padding_top(1) |
| 3148 | .padding_bottom(1) |
| 3149 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc4); |
| 3150 | } |
| 3151 | } |
| 3152 | |
| 3153 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC4, output_width_lt_4) { |
| 3154 | TEST_REQUIRES_ARM_NEON; |
| 3155 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 3156 | DWConv2DMicrokernelTester() |
| 3157 | .input_width(8) |
| 3158 | .input_height(2) |
| 3159 | .kernel_height(3) |
| 3160 | .kernel_width(3) |
| 3161 | .subsampling(2) |
| 3162 | .padding_left(1) |
| 3163 | .padding_right(1) |
| 3164 | .padding_top(1) |
| 3165 | .padding_bottom(1) |
| 3166 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc4); |
| 3167 | } |
| 3168 | } |
| 3169 | |
| 3170 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC4, output_width_gt_4) { |
| 3171 | TEST_REQUIRES_ARM_NEON; |
| 3172 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 3173 | DWConv2DMicrokernelTester() |
| 3174 | .input_width(input_width) |
| 3175 | .input_height(2) |
| 3176 | .kernel_height(3) |
| 3177 | .kernel_width(3) |
| 3178 | .subsampling(2) |
| 3179 | .padding_left(1) |
| 3180 | .padding_right(1) |
| 3181 | .padding_top(1) |
| 3182 | .padding_bottom(1) |
| 3183 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc4); |
| 3184 | } |
| 3185 | } |
| 3186 | |
| 3187 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC4, output_height_eq_1) { |
| 3188 | TEST_REQUIRES_ARM_NEON; |
| 3189 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 3190 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3191 | DWConv2DMicrokernelTester() |
| 3192 | .input_width(input_width) |
| 3193 | .input_height(input_height) |
| 3194 | .kernel_height(3) |
| 3195 | .kernel_width(3) |
| 3196 | .subsampling(2) |
| 3197 | .padding_left(1) |
| 3198 | .padding_right(1) |
| 3199 | .padding_top(1) |
| 3200 | .padding_bottom(1) |
| 3201 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc4); |
| 3202 | } |
| 3203 | } |
| 3204 | } |
| 3205 | |
| 3206 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC4, output_height_gt_1) { |
| 3207 | TEST_REQUIRES_ARM_NEON; |
| 3208 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 3209 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3210 | DWConv2DMicrokernelTester() |
| 3211 | .input_width(input_width) |
| 3212 | .input_height(input_height) |
| 3213 | .kernel_height(3) |
| 3214 | .kernel_width(3) |
| 3215 | .subsampling(2) |
| 3216 | .padding_left(1) |
| 3217 | .padding_right(1) |
| 3218 | .padding_top(1) |
| 3219 | .padding_bottom(1) |
| 3220 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc4); |
| 3221 | } |
| 3222 | } |
| 3223 | } |
| 3224 | |
| 3225 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_1X4_ACC4, padding_top_eq_1) { |
| 3226 | TEST_REQUIRES_ARM_NEON; |
| 3227 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 3228 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3229 | DWConv2DMicrokernelTester() |
| 3230 | .input_width(input_width) |
| 3231 | .input_height(input_height) |
| 3232 | .kernel_height(3) |
| 3233 | .kernel_width(3) |
| 3234 | .subsampling(2) |
| 3235 | .padding_left(1) |
| 3236 | .padding_right(1) |
| 3237 | .padding_top(0) |
| 3238 | .padding_bottom(1) |
| 3239 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc4); |
| 3240 | } |
| 3241 | } |
| 3242 | } |
| 3243 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 3244 | |
| 3245 | |
| 3246 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 3247 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4_ACC2, output_width_eq_4) { |
| 3248 | TEST_REQUIRES_ARM_NEON; |
| 3249 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 3250 | DWConv2DMicrokernelTester() |
| 3251 | .input_width(input_width) |
| 3252 | .input_height(4) |
| 3253 | .kernel_height(3) |
| 3254 | .kernel_width(3) |
| 3255 | .subsampling(2) |
| 3256 | .padding_left(1) |
| 3257 | .padding_right(1) |
| 3258 | .padding_top(1) |
| 3259 | .padding_bottom(1) |
| 3260 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4_acc2); |
| 3261 | } |
| 3262 | } |
| 3263 | |
| 3264 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4_ACC2, output_width_div_4) { |
| 3265 | TEST_REQUIRES_ARM_NEON; |
| 3266 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 3267 | DWConv2DMicrokernelTester() |
| 3268 | .input_width(input_width) |
| 3269 | .input_height(4) |
| 3270 | .kernel_height(3) |
| 3271 | .kernel_width(3) |
| 3272 | .subsampling(2) |
| 3273 | .padding_left(1) |
| 3274 | .padding_right(1) |
| 3275 | .padding_top(1) |
| 3276 | .padding_bottom(1) |
| 3277 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4_acc2); |
| 3278 | } |
| 3279 | } |
| 3280 | |
| 3281 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4_ACC2, output_width_lt_4) { |
| 3282 | TEST_REQUIRES_ARM_NEON; |
| 3283 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 3284 | DWConv2DMicrokernelTester() |
| 3285 | .input_width(8) |
| 3286 | .input_height(4) |
| 3287 | .kernel_height(3) |
| 3288 | .kernel_width(3) |
| 3289 | .subsampling(2) |
| 3290 | .padding_left(1) |
| 3291 | .padding_right(1) |
| 3292 | .padding_top(1) |
| 3293 | .padding_bottom(1) |
| 3294 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4_acc2); |
| 3295 | } |
| 3296 | } |
| 3297 | |
| 3298 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4_ACC2, output_width_gt_4) { |
| 3299 | TEST_REQUIRES_ARM_NEON; |
| 3300 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 3301 | DWConv2DMicrokernelTester() |
| 3302 | .input_width(input_width) |
| 3303 | .input_height(4) |
| 3304 | .kernel_height(3) |
| 3305 | .kernel_width(3) |
| 3306 | .subsampling(2) |
| 3307 | .padding_left(1) |
| 3308 | .padding_right(1) |
| 3309 | .padding_top(1) |
| 3310 | .padding_bottom(1) |
| 3311 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4_acc2); |
| 3312 | } |
| 3313 | } |
| 3314 | |
| 3315 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4_ACC2, output_height_eq_2) { |
| 3316 | TEST_REQUIRES_ARM_NEON; |
| 3317 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 3318 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3319 | DWConv2DMicrokernelTester() |
| 3320 | .input_width(input_width) |
| 3321 | .input_height(input_height) |
| 3322 | .kernel_height(3) |
| 3323 | .kernel_width(3) |
| 3324 | .subsampling(2) |
| 3325 | .padding_left(1) |
| 3326 | .padding_right(1) |
| 3327 | .padding_top(1) |
| 3328 | .padding_bottom(1) |
| 3329 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4_acc2); |
| 3330 | } |
| 3331 | } |
| 3332 | } |
| 3333 | |
| 3334 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4_ACC2, output_height_div_2) { |
| 3335 | TEST_REQUIRES_ARM_NEON; |
| 3336 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 3337 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3338 | DWConv2DMicrokernelTester() |
| 3339 | .input_width(input_width) |
| 3340 | .input_height(input_height) |
| 3341 | .kernel_height(3) |
| 3342 | .kernel_width(3) |
| 3343 | .subsampling(2) |
| 3344 | .padding_left(1) |
| 3345 | .padding_right(1) |
| 3346 | .padding_top(1) |
| 3347 | .padding_bottom(1) |
| 3348 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4_acc2); |
| 3349 | } |
| 3350 | } |
| 3351 | } |
| 3352 | |
| 3353 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4_ACC2, output_height_lt_2) { |
| 3354 | TEST_REQUIRES_ARM_NEON; |
| 3355 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 3356 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3357 | DWConv2DMicrokernelTester() |
| 3358 | .input_width(input_width) |
| 3359 | .input_height(input_height) |
| 3360 | .kernel_height(3) |
| 3361 | .kernel_width(3) |
| 3362 | .subsampling(2) |
| 3363 | .padding_left(1) |
| 3364 | .padding_right(1) |
| 3365 | .padding_top(1) |
| 3366 | .padding_bottom(1) |
| 3367 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4_acc2); |
| 3368 | } |
| 3369 | } |
| 3370 | } |
| 3371 | |
| 3372 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4_ACC2, output_height_gt_2) { |
| 3373 | TEST_REQUIRES_ARM_NEON; |
| 3374 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 3375 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3376 | DWConv2DMicrokernelTester() |
| 3377 | .input_width(input_width) |
| 3378 | .input_height(input_height) |
| 3379 | .kernel_height(3) |
| 3380 | .kernel_width(3) |
| 3381 | .subsampling(2) |
| 3382 | .padding_left(1) |
| 3383 | .padding_right(1) |
| 3384 | .padding_top(1) |
| 3385 | .padding_bottom(1) |
| 3386 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4_acc2); |
| 3387 | } |
| 3388 | } |
| 3389 | } |
| 3390 | |
| 3391 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEON_2X4_ACC2, padding_top_eq_1) { |
| 3392 | TEST_REQUIRES_ARM_NEON; |
| 3393 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 3394 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3395 | DWConv2DMicrokernelTester() |
| 3396 | .input_width(input_width) |
| 3397 | .input_height(input_height) |
| 3398 | .kernel_height(3) |
| 3399 | .kernel_width(3) |
| 3400 | .subsampling(2) |
| 3401 | .padding_left(1) |
| 3402 | .padding_right(1) |
| 3403 | .padding_top(0) |
| 3404 | .padding_bottom(1) |
| 3405 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4_acc2); |
| 3406 | } |
| 3407 | } |
| 3408 | } |
| 3409 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 3410 | |
| 3411 | |
| 3412 | #if XNN_ARCH_ARM64 |
| 3413 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4, output_width_eq_4) { |
| 3414 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3415 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 3416 | DWConv2DMicrokernelTester() |
| 3417 | .input_width(input_width) |
| 3418 | .input_height(2) |
| 3419 | .kernel_height(3) |
| 3420 | .kernel_width(3) |
| 3421 | .subsampling(2) |
| 3422 | .padding_left(1) |
| 3423 | .padding_right(1) |
| 3424 | .padding_top(1) |
| 3425 | .padding_bottom(1) |
| 3426 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4); |
| 3427 | } |
| 3428 | } |
| 3429 | |
| 3430 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4, output_width_div_4) { |
| 3431 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3432 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 3433 | DWConv2DMicrokernelTester() |
| 3434 | .input_width(input_width) |
| 3435 | .input_height(2) |
| 3436 | .kernel_height(3) |
| 3437 | .kernel_width(3) |
| 3438 | .subsampling(2) |
| 3439 | .padding_left(1) |
| 3440 | .padding_right(1) |
| 3441 | .padding_top(1) |
| 3442 | .padding_bottom(1) |
| 3443 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4); |
| 3444 | } |
| 3445 | } |
| 3446 | |
| 3447 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4, output_width_lt_4) { |
| 3448 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3449 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 3450 | DWConv2DMicrokernelTester() |
| 3451 | .input_width(8) |
| 3452 | .input_height(2) |
| 3453 | .kernel_height(3) |
| 3454 | .kernel_width(3) |
| 3455 | .subsampling(2) |
| 3456 | .padding_left(1) |
| 3457 | .padding_right(1) |
| 3458 | .padding_top(1) |
| 3459 | .padding_bottom(1) |
| 3460 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4); |
| 3461 | } |
| 3462 | } |
| 3463 | |
| 3464 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4, output_width_gt_4) { |
| 3465 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3466 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 3467 | DWConv2DMicrokernelTester() |
| 3468 | .input_width(input_width) |
| 3469 | .input_height(2) |
| 3470 | .kernel_height(3) |
| 3471 | .kernel_width(3) |
| 3472 | .subsampling(2) |
| 3473 | .padding_left(1) |
| 3474 | .padding_right(1) |
| 3475 | .padding_top(1) |
| 3476 | .padding_bottom(1) |
| 3477 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4); |
| 3478 | } |
| 3479 | } |
| 3480 | |
| 3481 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4, output_height_eq_1) { |
| 3482 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3483 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 3484 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3485 | DWConv2DMicrokernelTester() |
| 3486 | .input_width(input_width) |
| 3487 | .input_height(input_height) |
| 3488 | .kernel_height(3) |
| 3489 | .kernel_width(3) |
| 3490 | .subsampling(2) |
| 3491 | .padding_left(1) |
| 3492 | .padding_right(1) |
| 3493 | .padding_top(1) |
| 3494 | .padding_bottom(1) |
| 3495 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4); |
| 3496 | } |
| 3497 | } |
| 3498 | } |
| 3499 | |
| 3500 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4, output_height_gt_1) { |
| 3501 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3502 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 3503 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3504 | DWConv2DMicrokernelTester() |
| 3505 | .input_width(input_width) |
| 3506 | .input_height(input_height) |
| 3507 | .kernel_height(3) |
| 3508 | .kernel_width(3) |
| 3509 | .subsampling(2) |
| 3510 | .padding_left(1) |
| 3511 | .padding_right(1) |
| 3512 | .padding_top(1) |
| 3513 | .padding_bottom(1) |
| 3514 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4); |
| 3515 | } |
| 3516 | } |
| 3517 | } |
| 3518 | |
| 3519 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4, padding_top_eq_1) { |
| 3520 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3521 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 3522 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3523 | DWConv2DMicrokernelTester() |
| 3524 | .input_width(input_width) |
| 3525 | .input_height(input_height) |
| 3526 | .kernel_height(3) |
| 3527 | .kernel_width(3) |
| 3528 | .subsampling(2) |
| 3529 | .padding_left(1) |
| 3530 | .padding_right(1) |
| 3531 | .padding_top(0) |
| 3532 | .padding_bottom(1) |
| 3533 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4); |
| 3534 | } |
| 3535 | } |
| 3536 | } |
| 3537 | #endif // XNN_ARCH_ARM64 |
| 3538 | |
| 3539 | |
| 3540 | #if XNN_ARCH_ARM64 |
| 3541 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4, output_width_eq_4) { |
| 3542 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3543 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 3544 | DWConv2DMicrokernelTester() |
| 3545 | .input_width(input_width) |
| 3546 | .input_height(4) |
| 3547 | .kernel_height(3) |
| 3548 | .kernel_width(3) |
| 3549 | .subsampling(2) |
| 3550 | .padding_left(1) |
| 3551 | .padding_right(1) |
| 3552 | .padding_top(1) |
| 3553 | .padding_bottom(1) |
| 3554 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4); |
| 3555 | } |
| 3556 | } |
| 3557 | |
| 3558 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4, output_width_div_4) { |
| 3559 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3560 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 3561 | DWConv2DMicrokernelTester() |
| 3562 | .input_width(input_width) |
| 3563 | .input_height(4) |
| 3564 | .kernel_height(3) |
| 3565 | .kernel_width(3) |
| 3566 | .subsampling(2) |
| 3567 | .padding_left(1) |
| 3568 | .padding_right(1) |
| 3569 | .padding_top(1) |
| 3570 | .padding_bottom(1) |
| 3571 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4); |
| 3572 | } |
| 3573 | } |
| 3574 | |
| 3575 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4, output_width_lt_4) { |
| 3576 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3577 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 3578 | DWConv2DMicrokernelTester() |
| 3579 | .input_width(8) |
| 3580 | .input_height(4) |
| 3581 | .kernel_height(3) |
| 3582 | .kernel_width(3) |
| 3583 | .subsampling(2) |
| 3584 | .padding_left(1) |
| 3585 | .padding_right(1) |
| 3586 | .padding_top(1) |
| 3587 | .padding_bottom(1) |
| 3588 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4); |
| 3589 | } |
| 3590 | } |
| 3591 | |
| 3592 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4, output_width_gt_4) { |
| 3593 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3594 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 3595 | DWConv2DMicrokernelTester() |
| 3596 | .input_width(input_width) |
| 3597 | .input_height(4) |
| 3598 | .kernel_height(3) |
| 3599 | .kernel_width(3) |
| 3600 | .subsampling(2) |
| 3601 | .padding_left(1) |
| 3602 | .padding_right(1) |
| 3603 | .padding_top(1) |
| 3604 | .padding_bottom(1) |
| 3605 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4); |
| 3606 | } |
| 3607 | } |
| 3608 | |
| 3609 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4, output_height_eq_2) { |
| 3610 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3611 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 3612 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3613 | DWConv2DMicrokernelTester() |
| 3614 | .input_width(input_width) |
| 3615 | .input_height(input_height) |
| 3616 | .kernel_height(3) |
| 3617 | .kernel_width(3) |
| 3618 | .subsampling(2) |
| 3619 | .padding_left(1) |
| 3620 | .padding_right(1) |
| 3621 | .padding_top(1) |
| 3622 | .padding_bottom(1) |
| 3623 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4); |
| 3624 | } |
| 3625 | } |
| 3626 | } |
| 3627 | |
| 3628 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4, output_height_div_2) { |
| 3629 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3630 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 3631 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3632 | DWConv2DMicrokernelTester() |
| 3633 | .input_width(input_width) |
| 3634 | .input_height(input_height) |
| 3635 | .kernel_height(3) |
| 3636 | .kernel_width(3) |
| 3637 | .subsampling(2) |
| 3638 | .padding_left(1) |
| 3639 | .padding_right(1) |
| 3640 | .padding_top(1) |
| 3641 | .padding_bottom(1) |
| 3642 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4); |
| 3643 | } |
| 3644 | } |
| 3645 | } |
| 3646 | |
| 3647 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4, output_height_lt_2) { |
| 3648 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3649 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 3650 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3651 | DWConv2DMicrokernelTester() |
| 3652 | .input_width(input_width) |
| 3653 | .input_height(input_height) |
| 3654 | .kernel_height(3) |
| 3655 | .kernel_width(3) |
| 3656 | .subsampling(2) |
| 3657 | .padding_left(1) |
| 3658 | .padding_right(1) |
| 3659 | .padding_top(1) |
| 3660 | .padding_bottom(1) |
| 3661 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4); |
| 3662 | } |
| 3663 | } |
| 3664 | } |
| 3665 | |
| 3666 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4, output_height_gt_2) { |
| 3667 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3668 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 3669 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3670 | DWConv2DMicrokernelTester() |
| 3671 | .input_width(input_width) |
| 3672 | .input_height(input_height) |
| 3673 | .kernel_height(3) |
| 3674 | .kernel_width(3) |
| 3675 | .subsampling(2) |
| 3676 | .padding_left(1) |
| 3677 | .padding_right(1) |
| 3678 | .padding_top(1) |
| 3679 | .padding_bottom(1) |
| 3680 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4); |
| 3681 | } |
| 3682 | } |
| 3683 | } |
| 3684 | |
| 3685 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4, padding_top_eq_1) { |
| 3686 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3687 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 3688 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3689 | DWConv2DMicrokernelTester() |
| 3690 | .input_width(input_width) |
| 3691 | .input_height(input_height) |
| 3692 | .kernel_height(3) |
| 3693 | .kernel_width(3) |
| 3694 | .subsampling(2) |
| 3695 | .padding_left(1) |
| 3696 | .padding_right(1) |
| 3697 | .padding_top(0) |
| 3698 | .padding_bottom(1) |
| 3699 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4); |
| 3700 | } |
| 3701 | } |
| 3702 | } |
| 3703 | #endif // XNN_ARCH_ARM64 |
| 3704 | |
| 3705 | |
| 3706 | #if XNN_ARCH_ARM64 |
| 3707 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_3X4, output_width_eq_4) { |
| 3708 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3709 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 3710 | DWConv2DMicrokernelTester() |
| 3711 | .input_width(input_width) |
| 3712 | .input_height(6) |
| 3713 | .kernel_height(3) |
| 3714 | .kernel_width(3) |
| 3715 | .subsampling(2) |
| 3716 | .padding_left(1) |
| 3717 | .padding_right(1) |
| 3718 | .padding_top(1) |
| 3719 | .padding_bottom(1) |
| 3720 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_3x4); |
| 3721 | } |
| 3722 | } |
| 3723 | |
| 3724 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_3X4, output_width_div_4) { |
| 3725 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3726 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 3727 | DWConv2DMicrokernelTester() |
| 3728 | .input_width(input_width) |
| 3729 | .input_height(6) |
| 3730 | .kernel_height(3) |
| 3731 | .kernel_width(3) |
| 3732 | .subsampling(2) |
| 3733 | .padding_left(1) |
| 3734 | .padding_right(1) |
| 3735 | .padding_top(1) |
| 3736 | .padding_bottom(1) |
| 3737 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_3x4); |
| 3738 | } |
| 3739 | } |
| 3740 | |
| 3741 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_3X4, output_width_lt_4) { |
| 3742 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3743 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 3744 | DWConv2DMicrokernelTester() |
| 3745 | .input_width(8) |
| 3746 | .input_height(6) |
| 3747 | .kernel_height(3) |
| 3748 | .kernel_width(3) |
| 3749 | .subsampling(2) |
| 3750 | .padding_left(1) |
| 3751 | .padding_right(1) |
| 3752 | .padding_top(1) |
| 3753 | .padding_bottom(1) |
| 3754 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_3x4); |
| 3755 | } |
| 3756 | } |
| 3757 | |
| 3758 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_3X4, output_width_gt_4) { |
| 3759 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3760 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 3761 | DWConv2DMicrokernelTester() |
| 3762 | .input_width(input_width) |
| 3763 | .input_height(6) |
| 3764 | .kernel_height(3) |
| 3765 | .kernel_width(3) |
| 3766 | .subsampling(2) |
| 3767 | .padding_left(1) |
| 3768 | .padding_right(1) |
| 3769 | .padding_top(1) |
| 3770 | .padding_bottom(1) |
| 3771 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_3x4); |
| 3772 | } |
| 3773 | } |
| 3774 | |
| 3775 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_3X4, output_height_eq_3) { |
| 3776 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3777 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 3778 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3779 | DWConv2DMicrokernelTester() |
| 3780 | .input_width(input_width) |
| 3781 | .input_height(input_height) |
| 3782 | .kernel_height(3) |
| 3783 | .kernel_width(3) |
| 3784 | .subsampling(2) |
| 3785 | .padding_left(1) |
| 3786 | .padding_right(1) |
| 3787 | .padding_top(1) |
| 3788 | .padding_bottom(1) |
| 3789 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_3x4); |
| 3790 | } |
| 3791 | } |
| 3792 | } |
| 3793 | |
| 3794 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_3X4, output_height_div_3) { |
| 3795 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3796 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 3797 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3798 | DWConv2DMicrokernelTester() |
| 3799 | .input_width(input_width) |
| 3800 | .input_height(input_height) |
| 3801 | .kernel_height(3) |
| 3802 | .kernel_width(3) |
| 3803 | .subsampling(2) |
| 3804 | .padding_left(1) |
| 3805 | .padding_right(1) |
| 3806 | .padding_top(1) |
| 3807 | .padding_bottom(1) |
| 3808 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_3x4); |
| 3809 | } |
| 3810 | } |
| 3811 | } |
| 3812 | |
| 3813 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_3X4, output_height_lt_3) { |
| 3814 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3815 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 3816 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3817 | DWConv2DMicrokernelTester() |
| 3818 | .input_width(input_width) |
| 3819 | .input_height(input_height) |
| 3820 | .kernel_height(3) |
| 3821 | .kernel_width(3) |
| 3822 | .subsampling(2) |
| 3823 | .padding_left(1) |
| 3824 | .padding_right(1) |
| 3825 | .padding_top(1) |
| 3826 | .padding_bottom(1) |
| 3827 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_3x4); |
| 3828 | } |
| 3829 | } |
| 3830 | } |
| 3831 | |
| 3832 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_3X4, output_height_gt_3) { |
| 3833 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3834 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 3835 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3836 | DWConv2DMicrokernelTester() |
| 3837 | .input_width(input_width) |
| 3838 | .input_height(input_height) |
| 3839 | .kernel_height(3) |
| 3840 | .kernel_width(3) |
| 3841 | .subsampling(2) |
| 3842 | .padding_left(1) |
| 3843 | .padding_right(1) |
| 3844 | .padding_top(1) |
| 3845 | .padding_bottom(1) |
| 3846 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_3x4); |
| 3847 | } |
| 3848 | } |
| 3849 | } |
| 3850 | |
| 3851 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_3X4, padding_top_eq_1) { |
| 3852 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3853 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 3854 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3855 | DWConv2DMicrokernelTester() |
| 3856 | .input_width(input_width) |
| 3857 | .input_height(input_height) |
| 3858 | .kernel_height(3) |
| 3859 | .kernel_width(3) |
| 3860 | .subsampling(2) |
| 3861 | .padding_left(1) |
| 3862 | .padding_right(1) |
| 3863 | .padding_top(0) |
| 3864 | .padding_bottom(1) |
| 3865 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_3x4); |
| 3866 | } |
| 3867 | } |
| 3868 | } |
| 3869 | #endif // XNN_ARCH_ARM64 |
| 3870 | |
| 3871 | |
| 3872 | #if XNN_ARCH_ARM64 |
| 3873 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_4X4, output_width_eq_4) { |
| 3874 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3875 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 3876 | DWConv2DMicrokernelTester() |
| 3877 | .input_width(input_width) |
| 3878 | .input_height(8) |
| 3879 | .kernel_height(3) |
| 3880 | .kernel_width(3) |
| 3881 | .subsampling(2) |
| 3882 | .padding_left(1) |
| 3883 | .padding_right(1) |
| 3884 | .padding_top(1) |
| 3885 | .padding_bottom(1) |
| 3886 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_4x4); |
| 3887 | } |
| 3888 | } |
| 3889 | |
| 3890 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_4X4, output_width_div_4) { |
| 3891 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3892 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 3893 | DWConv2DMicrokernelTester() |
| 3894 | .input_width(input_width) |
| 3895 | .input_height(8) |
| 3896 | .kernel_height(3) |
| 3897 | .kernel_width(3) |
| 3898 | .subsampling(2) |
| 3899 | .padding_left(1) |
| 3900 | .padding_right(1) |
| 3901 | .padding_top(1) |
| 3902 | .padding_bottom(1) |
| 3903 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_4x4); |
| 3904 | } |
| 3905 | } |
| 3906 | |
| 3907 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_4X4, output_width_lt_4) { |
| 3908 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3909 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 3910 | DWConv2DMicrokernelTester() |
| 3911 | .input_width(8) |
| 3912 | .input_height(8) |
| 3913 | .kernel_height(3) |
| 3914 | .kernel_width(3) |
| 3915 | .subsampling(2) |
| 3916 | .padding_left(1) |
| 3917 | .padding_right(1) |
| 3918 | .padding_top(1) |
| 3919 | .padding_bottom(1) |
| 3920 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_4x4); |
| 3921 | } |
| 3922 | } |
| 3923 | |
| 3924 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_4X4, output_width_gt_4) { |
| 3925 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3926 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 3927 | DWConv2DMicrokernelTester() |
| 3928 | .input_width(input_width) |
| 3929 | .input_height(8) |
| 3930 | .kernel_height(3) |
| 3931 | .kernel_width(3) |
| 3932 | .subsampling(2) |
| 3933 | .padding_left(1) |
| 3934 | .padding_right(1) |
| 3935 | .padding_top(1) |
| 3936 | .padding_bottom(1) |
| 3937 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_4x4); |
| 3938 | } |
| 3939 | } |
| 3940 | |
| 3941 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_4X4, output_height_eq_4) { |
| 3942 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3943 | for (size_t input_height = 7; input_height < 9; input_height++) { |
| 3944 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3945 | DWConv2DMicrokernelTester() |
| 3946 | .input_width(input_width) |
| 3947 | .input_height(input_height) |
| 3948 | .kernel_height(3) |
| 3949 | .kernel_width(3) |
| 3950 | .subsampling(2) |
| 3951 | .padding_left(1) |
| 3952 | .padding_right(1) |
| 3953 | .padding_top(1) |
| 3954 | .padding_bottom(1) |
| 3955 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_4x4); |
| 3956 | } |
| 3957 | } |
| 3958 | } |
| 3959 | |
| 3960 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_4X4, output_height_div_4) { |
| 3961 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3962 | for (size_t input_height = 16; input_height < 64; input_height += 8) { |
| 3963 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3964 | DWConv2DMicrokernelTester() |
| 3965 | .input_width(input_width) |
| 3966 | .input_height(input_height) |
| 3967 | .kernel_height(3) |
| 3968 | .kernel_width(3) |
| 3969 | .subsampling(2) |
| 3970 | .padding_left(1) |
| 3971 | .padding_right(1) |
| 3972 | .padding_top(1) |
| 3973 | .padding_bottom(1) |
| 3974 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_4x4); |
| 3975 | } |
| 3976 | } |
| 3977 | } |
| 3978 | |
| 3979 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_4X4, output_height_lt_4) { |
| 3980 | TEST_REQUIRES_ARM_NEON_FMA; |
| 3981 | for (size_t input_height = 1; input_height < 7; input_height++) { |
| 3982 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 3983 | DWConv2DMicrokernelTester() |
| 3984 | .input_width(input_width) |
| 3985 | .input_height(input_height) |
| 3986 | .kernel_height(3) |
| 3987 | .kernel_width(3) |
| 3988 | .subsampling(2) |
| 3989 | .padding_left(1) |
| 3990 | .padding_right(1) |
| 3991 | .padding_top(1) |
| 3992 | .padding_bottom(1) |
| 3993 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_4x4); |
| 3994 | } |
| 3995 | } |
| 3996 | } |
| 3997 | |
| 3998 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_4X4, output_height_gt_4) { |
| 3999 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4000 | for (size_t input_height = 9; input_height < 17; input_height++) { |
| 4001 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 4002 | DWConv2DMicrokernelTester() |
| 4003 | .input_width(input_width) |
| 4004 | .input_height(input_height) |
| 4005 | .kernel_height(3) |
| 4006 | .kernel_width(3) |
| 4007 | .subsampling(2) |
| 4008 | .padding_left(1) |
| 4009 | .padding_right(1) |
| 4010 | .padding_top(1) |
| 4011 | .padding_bottom(1) |
| 4012 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_4x4); |
| 4013 | } |
| 4014 | } |
| 4015 | } |
| 4016 | |
| 4017 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_4X4, padding_top_eq_1) { |
| 4018 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4019 | for (size_t input_height = 2; input_height < 26; input_height++) { |
| 4020 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 4021 | DWConv2DMicrokernelTester() |
| 4022 | .input_width(input_width) |
| 4023 | .input_height(input_height) |
| 4024 | .kernel_height(3) |
| 4025 | .kernel_width(3) |
| 4026 | .subsampling(2) |
| 4027 | .padding_left(1) |
| 4028 | .padding_right(1) |
| 4029 | .padding_top(0) |
| 4030 | .padding_bottom(1) |
| 4031 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_4x4); |
| 4032 | } |
| 4033 | } |
| 4034 | } |
| 4035 | #endif // XNN_ARCH_ARM64 |
| 4036 | |
| 4037 | |
| 4038 | #if XNN_ARCH_ARM64 |
| 4039 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC2, output_width_eq_4) { |
| 4040 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4041 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 4042 | DWConv2DMicrokernelTester() |
| 4043 | .input_width(input_width) |
| 4044 | .input_height(2) |
| 4045 | .kernel_height(3) |
| 4046 | .kernel_width(3) |
| 4047 | .subsampling(2) |
| 4048 | .padding_left(1) |
| 4049 | .padding_right(1) |
| 4050 | .padding_top(1) |
| 4051 | .padding_bottom(1) |
| 4052 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc2); |
| 4053 | } |
| 4054 | } |
| 4055 | |
| 4056 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC2, output_width_div_4) { |
| 4057 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4058 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 4059 | DWConv2DMicrokernelTester() |
| 4060 | .input_width(input_width) |
| 4061 | .input_height(2) |
| 4062 | .kernel_height(3) |
| 4063 | .kernel_width(3) |
| 4064 | .subsampling(2) |
| 4065 | .padding_left(1) |
| 4066 | .padding_right(1) |
| 4067 | .padding_top(1) |
| 4068 | .padding_bottom(1) |
| 4069 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc2); |
| 4070 | } |
| 4071 | } |
| 4072 | |
| 4073 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC2, output_width_lt_4) { |
| 4074 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4075 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 4076 | DWConv2DMicrokernelTester() |
| 4077 | .input_width(8) |
| 4078 | .input_height(2) |
| 4079 | .kernel_height(3) |
| 4080 | .kernel_width(3) |
| 4081 | .subsampling(2) |
| 4082 | .padding_left(1) |
| 4083 | .padding_right(1) |
| 4084 | .padding_top(1) |
| 4085 | .padding_bottom(1) |
| 4086 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc2); |
| 4087 | } |
| 4088 | } |
| 4089 | |
| 4090 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC2, output_width_gt_4) { |
| 4091 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4092 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 4093 | DWConv2DMicrokernelTester() |
| 4094 | .input_width(input_width) |
| 4095 | .input_height(2) |
| 4096 | .kernel_height(3) |
| 4097 | .kernel_width(3) |
| 4098 | .subsampling(2) |
| 4099 | .padding_left(1) |
| 4100 | .padding_right(1) |
| 4101 | .padding_top(1) |
| 4102 | .padding_bottom(1) |
| 4103 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc2); |
| 4104 | } |
| 4105 | } |
| 4106 | |
| 4107 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC2, output_height_eq_1) { |
| 4108 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4109 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 4110 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 4111 | DWConv2DMicrokernelTester() |
| 4112 | .input_width(input_width) |
| 4113 | .input_height(input_height) |
| 4114 | .kernel_height(3) |
| 4115 | .kernel_width(3) |
| 4116 | .subsampling(2) |
| 4117 | .padding_left(1) |
| 4118 | .padding_right(1) |
| 4119 | .padding_top(1) |
| 4120 | .padding_bottom(1) |
| 4121 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc2); |
| 4122 | } |
| 4123 | } |
| 4124 | } |
| 4125 | |
| 4126 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC2, output_height_gt_1) { |
| 4127 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4128 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 4129 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 4130 | DWConv2DMicrokernelTester() |
| 4131 | .input_width(input_width) |
| 4132 | .input_height(input_height) |
| 4133 | .kernel_height(3) |
| 4134 | .kernel_width(3) |
| 4135 | .subsampling(2) |
| 4136 | .padding_left(1) |
| 4137 | .padding_right(1) |
| 4138 | .padding_top(1) |
| 4139 | .padding_bottom(1) |
| 4140 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc2); |
| 4141 | } |
| 4142 | } |
| 4143 | } |
| 4144 | |
| 4145 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC2, padding_top_eq_1) { |
| 4146 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4147 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 4148 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 4149 | DWConv2DMicrokernelTester() |
| 4150 | .input_width(input_width) |
| 4151 | .input_height(input_height) |
| 4152 | .kernel_height(3) |
| 4153 | .kernel_width(3) |
| 4154 | .subsampling(2) |
| 4155 | .padding_left(1) |
| 4156 | .padding_right(1) |
| 4157 | .padding_top(0) |
| 4158 | .padding_bottom(1) |
| 4159 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc2); |
| 4160 | } |
| 4161 | } |
| 4162 | } |
| 4163 | #endif // XNN_ARCH_ARM64 |
| 4164 | |
| 4165 | |
| Marat Dukhan | 1268a24 | 2020-10-24 00:36:32 -0700 | [diff] [blame] | 4166 | #if XNN_ARCH_ARM64 |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4167 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC3, output_width_eq_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4168 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4169 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4170 | DWConv2DMicrokernelTester() |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4171 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4172 | .input_height(2) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4173 | .kernel_height(3) |
| 4174 | .kernel_width(3) |
| 4175 | .subsampling(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 4176 | .padding_left(1) |
| 4177 | .padding_right(1) |
| 4178 | .padding_top(1) |
| 4179 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4180 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc3); |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 4181 | } |
| 4182 | } |
| 4183 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4184 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC3, output_width_div_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4185 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4186 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4187 | DWConv2DMicrokernelTester() |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4188 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4189 | .input_height(2) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4190 | .kernel_height(3) |
| 4191 | .kernel_width(3) |
| 4192 | .subsampling(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 4193 | .padding_left(1) |
| 4194 | .padding_right(1) |
| 4195 | .padding_top(1) |
| 4196 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4197 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc3); |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 4198 | } |
| 4199 | } |
| 4200 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4201 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC3, output_width_lt_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4202 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4203 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4204 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4205 | .input_width(8) |
| 4206 | .input_height(2) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4207 | .kernel_height(3) |
| 4208 | .kernel_width(3) |
| 4209 | .subsampling(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 4210 | .padding_left(1) |
| 4211 | .padding_right(1) |
| 4212 | .padding_top(1) |
| 4213 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4214 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc3); |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 4215 | } |
| 4216 | } |
| 4217 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4218 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC3, output_width_gt_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4219 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4220 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4221 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4222 | .input_width(input_width) |
| 4223 | .input_height(2) |
| 4224 | .kernel_height(3) |
| 4225 | .kernel_width(3) |
| 4226 | .subsampling(2) |
| 4227 | .padding_left(1) |
| 4228 | .padding_right(1) |
| 4229 | .padding_top(1) |
| 4230 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4231 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4232 | } |
| 4233 | } |
| 4234 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4235 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC3, output_height_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4236 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4237 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 4238 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4239 | DWConv2DMicrokernelTester() |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4240 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4241 | .input_height(input_height) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4242 | .kernel_height(3) |
| 4243 | .kernel_width(3) |
| 4244 | .subsampling(2) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4245 | .padding_left(1) |
| 4246 | .padding_right(1) |
| 4247 | .padding_top(1) |
| 4248 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4249 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc3); |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4250 | } |
| 4251 | } |
| 4252 | } |
| 4253 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4254 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC3, output_height_gt_1) { |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 4255 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4256 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 4257 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4258 | DWConv2DMicrokernelTester() |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 4259 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4260 | .input_height(input_height) |
| 4261 | .kernel_height(3) |
| 4262 | .kernel_width(3) |
| 4263 | .subsampling(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 4264 | .padding_left(1) |
| 4265 | .padding_right(1) |
| 4266 | .padding_top(1) |
| 4267 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4268 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4269 | } |
| 4270 | } |
| 4271 | } |
| 4272 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4273 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC3, padding_top_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4274 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4275 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 4276 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4277 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4278 | .input_width(input_width) |
| 4279 | .input_height(input_height) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 4280 | .kernel_height(3) |
| 4281 | .kernel_width(3) |
| 4282 | .subsampling(2) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 4283 | .padding_left(1) |
| 4284 | .padding_right(1) |
| 4285 | .padding_top(0) |
| 4286 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 4287 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc3); |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 4288 | } |
| 4289 | } |
| 4290 | } |
| Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 4291 | #endif // XNN_ARCH_ARM64 |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 4292 | |
| 4293 | |
| Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 4294 | #if XNN_ARCH_ARM64 |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 4295 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC4, output_width_eq_4) { |
| 4296 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4297 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 4298 | DWConv2DMicrokernelTester() |
| 4299 | .input_width(input_width) |
| 4300 | .input_height(2) |
| 4301 | .kernel_height(3) |
| 4302 | .kernel_width(3) |
| 4303 | .subsampling(2) |
| 4304 | .padding_left(1) |
| 4305 | .padding_right(1) |
| 4306 | .padding_top(1) |
| 4307 | .padding_bottom(1) |
| 4308 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc4); |
| 4309 | } |
| 4310 | } |
| 4311 | |
| 4312 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC4, output_width_div_4) { |
| 4313 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4314 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 4315 | DWConv2DMicrokernelTester() |
| 4316 | .input_width(input_width) |
| 4317 | .input_height(2) |
| 4318 | .kernel_height(3) |
| 4319 | .kernel_width(3) |
| 4320 | .subsampling(2) |
| 4321 | .padding_left(1) |
| 4322 | .padding_right(1) |
| 4323 | .padding_top(1) |
| 4324 | .padding_bottom(1) |
| 4325 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc4); |
| 4326 | } |
| 4327 | } |
| 4328 | |
| 4329 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC4, output_width_lt_4) { |
| 4330 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4331 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 4332 | DWConv2DMicrokernelTester() |
| 4333 | .input_width(8) |
| 4334 | .input_height(2) |
| 4335 | .kernel_height(3) |
| 4336 | .kernel_width(3) |
| 4337 | .subsampling(2) |
| 4338 | .padding_left(1) |
| 4339 | .padding_right(1) |
| 4340 | .padding_top(1) |
| 4341 | .padding_bottom(1) |
| 4342 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc4); |
| 4343 | } |
| 4344 | } |
| 4345 | |
| 4346 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC4, output_width_gt_4) { |
| 4347 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4348 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 4349 | DWConv2DMicrokernelTester() |
| 4350 | .input_width(input_width) |
| 4351 | .input_height(2) |
| 4352 | .kernel_height(3) |
| 4353 | .kernel_width(3) |
| 4354 | .subsampling(2) |
| 4355 | .padding_left(1) |
| 4356 | .padding_right(1) |
| 4357 | .padding_top(1) |
| 4358 | .padding_bottom(1) |
| 4359 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc4); |
| 4360 | } |
| 4361 | } |
| 4362 | |
| 4363 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC4, output_height_eq_1) { |
| 4364 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4365 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 4366 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 4367 | DWConv2DMicrokernelTester() |
| 4368 | .input_width(input_width) |
| 4369 | .input_height(input_height) |
| 4370 | .kernel_height(3) |
| 4371 | .kernel_width(3) |
| 4372 | .subsampling(2) |
| 4373 | .padding_left(1) |
| 4374 | .padding_right(1) |
| 4375 | .padding_top(1) |
| 4376 | .padding_bottom(1) |
| 4377 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc4); |
| 4378 | } |
| 4379 | } |
| 4380 | } |
| 4381 | |
| 4382 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC4, output_height_gt_1) { |
| 4383 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4384 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 4385 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 4386 | DWConv2DMicrokernelTester() |
| 4387 | .input_width(input_width) |
| 4388 | .input_height(input_height) |
| 4389 | .kernel_height(3) |
| 4390 | .kernel_width(3) |
| 4391 | .subsampling(2) |
| 4392 | .padding_left(1) |
| 4393 | .padding_right(1) |
| 4394 | .padding_top(1) |
| 4395 | .padding_bottom(1) |
| 4396 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc4); |
| 4397 | } |
| 4398 | } |
| 4399 | } |
| 4400 | |
| 4401 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_1X4_ACC4, padding_top_eq_1) { |
| 4402 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4403 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 4404 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 4405 | DWConv2DMicrokernelTester() |
| 4406 | .input_width(input_width) |
| 4407 | .input_height(input_height) |
| 4408 | .kernel_height(3) |
| 4409 | .kernel_width(3) |
| 4410 | .subsampling(2) |
| 4411 | .padding_left(1) |
| 4412 | .padding_right(1) |
| 4413 | .padding_top(0) |
| 4414 | .padding_bottom(1) |
| 4415 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc4); |
| 4416 | } |
| 4417 | } |
| 4418 | } |
| 4419 | #endif // XNN_ARCH_ARM64 |
| 4420 | |
| 4421 | |
| 4422 | #if XNN_ARCH_ARM64 |
| 4423 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4_ACC2, output_width_eq_4) { |
| 4424 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4425 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 4426 | DWConv2DMicrokernelTester() |
| 4427 | .input_width(input_width) |
| 4428 | .input_height(4) |
| 4429 | .kernel_height(3) |
| 4430 | .kernel_width(3) |
| 4431 | .subsampling(2) |
| 4432 | .padding_left(1) |
| 4433 | .padding_right(1) |
| 4434 | .padding_top(1) |
| 4435 | .padding_bottom(1) |
| 4436 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4_acc2); |
| 4437 | } |
| 4438 | } |
| 4439 | |
| 4440 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4_ACC2, output_width_div_4) { |
| 4441 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4442 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 4443 | DWConv2DMicrokernelTester() |
| 4444 | .input_width(input_width) |
| 4445 | .input_height(4) |
| 4446 | .kernel_height(3) |
| 4447 | .kernel_width(3) |
| 4448 | .subsampling(2) |
| 4449 | .padding_left(1) |
| 4450 | .padding_right(1) |
| 4451 | .padding_top(1) |
| 4452 | .padding_bottom(1) |
| 4453 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4_acc2); |
| 4454 | } |
| 4455 | } |
| 4456 | |
| 4457 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4_ACC2, output_width_lt_4) { |
| 4458 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4459 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 4460 | DWConv2DMicrokernelTester() |
| 4461 | .input_width(8) |
| 4462 | .input_height(4) |
| 4463 | .kernel_height(3) |
| 4464 | .kernel_width(3) |
| 4465 | .subsampling(2) |
| 4466 | .padding_left(1) |
| 4467 | .padding_right(1) |
| 4468 | .padding_top(1) |
| 4469 | .padding_bottom(1) |
| 4470 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4_acc2); |
| 4471 | } |
| 4472 | } |
| 4473 | |
| 4474 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4_ACC2, output_width_gt_4) { |
| 4475 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4476 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 4477 | DWConv2DMicrokernelTester() |
| 4478 | .input_width(input_width) |
| 4479 | .input_height(4) |
| 4480 | .kernel_height(3) |
| 4481 | .kernel_width(3) |
| 4482 | .subsampling(2) |
| 4483 | .padding_left(1) |
| 4484 | .padding_right(1) |
| 4485 | .padding_top(1) |
| 4486 | .padding_bottom(1) |
| 4487 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4_acc2); |
| 4488 | } |
| 4489 | } |
| 4490 | |
| 4491 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4_ACC2, output_height_eq_2) { |
| 4492 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4493 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 4494 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 4495 | DWConv2DMicrokernelTester() |
| 4496 | .input_width(input_width) |
| 4497 | .input_height(input_height) |
| 4498 | .kernel_height(3) |
| 4499 | .kernel_width(3) |
| 4500 | .subsampling(2) |
| 4501 | .padding_left(1) |
| 4502 | .padding_right(1) |
| 4503 | .padding_top(1) |
| 4504 | .padding_bottom(1) |
| 4505 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4_acc2); |
| 4506 | } |
| 4507 | } |
| 4508 | } |
| 4509 | |
| 4510 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4_ACC2, output_height_div_2) { |
| 4511 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4512 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 4513 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 4514 | DWConv2DMicrokernelTester() |
| 4515 | .input_width(input_width) |
| 4516 | .input_height(input_height) |
| 4517 | .kernel_height(3) |
| 4518 | .kernel_width(3) |
| 4519 | .subsampling(2) |
| 4520 | .padding_left(1) |
| 4521 | .padding_right(1) |
| 4522 | .padding_top(1) |
| 4523 | .padding_bottom(1) |
| 4524 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4_acc2); |
| 4525 | } |
| 4526 | } |
| 4527 | } |
| 4528 | |
| 4529 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4_ACC2, output_height_lt_2) { |
| 4530 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4531 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 4532 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 4533 | DWConv2DMicrokernelTester() |
| 4534 | .input_width(input_width) |
| 4535 | .input_height(input_height) |
| 4536 | .kernel_height(3) |
| 4537 | .kernel_width(3) |
| 4538 | .subsampling(2) |
| 4539 | .padding_left(1) |
| 4540 | .padding_right(1) |
| 4541 | .padding_top(1) |
| 4542 | .padding_bottom(1) |
| 4543 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4_acc2); |
| 4544 | } |
| 4545 | } |
| 4546 | } |
| 4547 | |
| 4548 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4_ACC2, output_height_gt_2) { |
| 4549 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4550 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 4551 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 4552 | DWConv2DMicrokernelTester() |
| 4553 | .input_width(input_width) |
| 4554 | .input_height(input_height) |
| 4555 | .kernel_height(3) |
| 4556 | .kernel_width(3) |
| 4557 | .subsampling(2) |
| 4558 | .padding_left(1) |
| 4559 | .padding_right(1) |
| 4560 | .padding_top(1) |
| 4561 | .padding_bottom(1) |
| 4562 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4_acc2); |
| 4563 | } |
| 4564 | } |
| 4565 | } |
| 4566 | |
| 4567 | TEST(F32_DWCONV2D_CHW_3X3S2P1__NEONFMA_2X4_ACC2, padding_top_eq_1) { |
| 4568 | TEST_REQUIRES_ARM_NEON_FMA; |
| 4569 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 4570 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 4571 | DWConv2DMicrokernelTester() |
| 4572 | .input_width(input_width) |
| 4573 | .input_height(input_height) |
| 4574 | .kernel_height(3) |
| 4575 | .kernel_width(3) |
| 4576 | .subsampling(2) |
| 4577 | .padding_left(1) |
| 4578 | .padding_right(1) |
| 4579 | .padding_top(0) |
| 4580 | .padding_bottom(1) |
| 4581 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4_acc2); |
| 4582 | } |
| 4583 | } |
| 4584 | } |
| 4585 | #endif // XNN_ARCH_ARM64 |
| 4586 | |
| 4587 | |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 4588 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 4589 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4, output_width_eq_4) { |
| 4590 | TEST_REQUIRES_ARM_NEON; |
| 4591 | DWConv2DMicrokernelTester() |
| 4592 | .input_width(4) |
| 4593 | .input_height(1) |
| 4594 | .kernel_height(5) |
| 4595 | .kernel_width(5) |
| 4596 | .subsampling(1) |
| 4597 | .padding_left(2) |
| 4598 | .padding_right(2) |
| 4599 | .padding_top(2) |
| 4600 | .padding_bottom(2) |
| 4601 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4); |
| 4602 | } |
| 4603 | |
| 4604 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4, output_width_div_4) { |
| 4605 | TEST_REQUIRES_ARM_NEON; |
| 4606 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 4607 | DWConv2DMicrokernelTester() |
| 4608 | .input_width(input_width) |
| 4609 | .input_height(1) |
| 4610 | .kernel_height(5) |
| 4611 | .kernel_width(5) |
| 4612 | .subsampling(1) |
| 4613 | .padding_left(2) |
| 4614 | .padding_right(2) |
| 4615 | .padding_top(2) |
| 4616 | .padding_bottom(2) |
| 4617 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4); |
| 4618 | } |
| 4619 | } |
| 4620 | |
| 4621 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4, output_width_lt_4) { |
| 4622 | TEST_REQUIRES_ARM_NEON; |
| 4623 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 4624 | DWConv2DMicrokernelTester() |
| 4625 | .input_width(4) |
| 4626 | .input_height(1) |
| 4627 | .kernel_height(5) |
| 4628 | .kernel_width(5) |
| 4629 | .subsampling(1) |
| 4630 | .padding_left(2) |
| 4631 | .padding_right(2) |
| 4632 | .padding_top(2) |
| 4633 | .padding_bottom(2) |
| 4634 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4); |
| 4635 | } |
| 4636 | } |
| 4637 | |
| 4638 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4, output_width_gt_4) { |
| 4639 | TEST_REQUIRES_ARM_NEON; |
| 4640 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 4641 | DWConv2DMicrokernelTester() |
| 4642 | .input_width(input_width) |
| 4643 | .input_height(1) |
| 4644 | .kernel_height(5) |
| 4645 | .kernel_width(5) |
| 4646 | .subsampling(1) |
| 4647 | .padding_left(2) |
| 4648 | .padding_right(2) |
| 4649 | .padding_top(2) |
| 4650 | .padding_bottom(2) |
| 4651 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4); |
| 4652 | } |
| 4653 | } |
| 4654 | |
| 4655 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4, output_height_gt_1) { |
| 4656 | TEST_REQUIRES_ARM_NEON; |
| 4657 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 4658 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 4659 | DWConv2DMicrokernelTester() |
| 4660 | .input_width(input_width) |
| 4661 | .input_height(input_height) |
| 4662 | .kernel_height(5) |
| 4663 | .kernel_width(5) |
| 4664 | .subsampling(1) |
| 4665 | .padding_left(2) |
| 4666 | .padding_right(2) |
| 4667 | .padding_top(2) |
| 4668 | .padding_bottom(2) |
| 4669 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4); |
| 4670 | } |
| 4671 | } |
| 4672 | } |
| 4673 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 4674 | |
| 4675 | |
| 4676 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 4677 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4, output_width_eq_4) { |
| 4678 | TEST_REQUIRES_ARM_NEON; |
| 4679 | DWConv2DMicrokernelTester() |
| 4680 | .input_width(4) |
| 4681 | .input_height(2) |
| 4682 | .kernel_height(5) |
| 4683 | .kernel_width(5) |
| 4684 | .subsampling(1) |
| 4685 | .padding_left(2) |
| 4686 | .padding_right(2) |
| 4687 | .padding_top(2) |
| 4688 | .padding_bottom(2) |
| 4689 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4); |
| 4690 | } |
| 4691 | |
| 4692 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4, output_width_div_4) { |
| 4693 | TEST_REQUIRES_ARM_NEON; |
| 4694 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 4695 | DWConv2DMicrokernelTester() |
| 4696 | .input_width(input_width) |
| 4697 | .input_height(2) |
| 4698 | .kernel_height(5) |
| 4699 | .kernel_width(5) |
| 4700 | .subsampling(1) |
| 4701 | .padding_left(2) |
| 4702 | .padding_right(2) |
| 4703 | .padding_top(2) |
| 4704 | .padding_bottom(2) |
| 4705 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4); |
| 4706 | } |
| 4707 | } |
| 4708 | |
| 4709 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4, output_width_lt_4) { |
| 4710 | TEST_REQUIRES_ARM_NEON; |
| 4711 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 4712 | DWConv2DMicrokernelTester() |
| 4713 | .input_width(4) |
| 4714 | .input_height(2) |
| 4715 | .kernel_height(5) |
| 4716 | .kernel_width(5) |
| 4717 | .subsampling(1) |
| 4718 | .padding_left(2) |
| 4719 | .padding_right(2) |
| 4720 | .padding_top(2) |
| 4721 | .padding_bottom(2) |
| 4722 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4); |
| 4723 | } |
| 4724 | } |
| 4725 | |
| 4726 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4, output_width_gt_4) { |
| 4727 | TEST_REQUIRES_ARM_NEON; |
| 4728 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 4729 | DWConv2DMicrokernelTester() |
| 4730 | .input_width(input_width) |
| 4731 | .input_height(2) |
| 4732 | .kernel_height(5) |
| 4733 | .kernel_width(5) |
| 4734 | .subsampling(1) |
| 4735 | .padding_left(2) |
| 4736 | .padding_right(2) |
| 4737 | .padding_top(2) |
| 4738 | .padding_bottom(2) |
| 4739 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4); |
| 4740 | } |
| 4741 | } |
| 4742 | |
| 4743 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4, output_height_div_2) { |
| 4744 | TEST_REQUIRES_ARM_NEON; |
| 4745 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 4746 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 4747 | DWConv2DMicrokernelTester() |
| 4748 | .input_width(input_width) |
| 4749 | .input_height(input_height) |
| 4750 | .kernel_height(5) |
| 4751 | .kernel_width(5) |
| 4752 | .subsampling(1) |
| 4753 | .padding_left(2) |
| 4754 | .padding_right(2) |
| 4755 | .padding_top(2) |
| 4756 | .padding_bottom(2) |
| 4757 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4); |
| 4758 | } |
| 4759 | } |
| 4760 | } |
| 4761 | |
| 4762 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4, output_height_lt_2) { |
| 4763 | TEST_REQUIRES_ARM_NEON; |
| 4764 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 4765 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 4766 | DWConv2DMicrokernelTester() |
| 4767 | .input_width(input_width) |
| 4768 | .input_height(input_height) |
| 4769 | .kernel_height(5) |
| 4770 | .kernel_width(5) |
| 4771 | .subsampling(1) |
| 4772 | .padding_left(2) |
| 4773 | .padding_right(2) |
| 4774 | .padding_top(2) |
| 4775 | .padding_bottom(2) |
| 4776 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4); |
| 4777 | } |
| 4778 | } |
| 4779 | } |
| 4780 | |
| 4781 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4, output_height_gt_2) { |
| 4782 | TEST_REQUIRES_ARM_NEON; |
| 4783 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 4784 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 4785 | DWConv2DMicrokernelTester() |
| 4786 | .input_width(input_width) |
| 4787 | .input_height(input_height) |
| 4788 | .kernel_height(5) |
| 4789 | .kernel_width(5) |
| 4790 | .subsampling(1) |
| 4791 | .padding_left(2) |
| 4792 | .padding_right(2) |
| 4793 | .padding_top(2) |
| 4794 | .padding_bottom(2) |
| 4795 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4); |
| 4796 | } |
| 4797 | } |
| 4798 | } |
| 4799 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 4800 | |
| 4801 | |
| 4802 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 4803 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4, output_width_eq_4) { |
| 4804 | TEST_REQUIRES_ARM_NEON; |
| 4805 | DWConv2DMicrokernelTester() |
| 4806 | .input_width(4) |
| 4807 | .input_height(3) |
| 4808 | .kernel_height(5) |
| 4809 | .kernel_width(5) |
| 4810 | .subsampling(1) |
| 4811 | .padding_left(2) |
| 4812 | .padding_right(2) |
| 4813 | .padding_top(2) |
| 4814 | .padding_bottom(2) |
| 4815 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4); |
| 4816 | } |
| 4817 | |
| 4818 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4, output_width_div_4) { |
| 4819 | TEST_REQUIRES_ARM_NEON; |
| 4820 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 4821 | DWConv2DMicrokernelTester() |
| 4822 | .input_width(input_width) |
| 4823 | .input_height(3) |
| 4824 | .kernel_height(5) |
| 4825 | .kernel_width(5) |
| 4826 | .subsampling(1) |
| 4827 | .padding_left(2) |
| 4828 | .padding_right(2) |
| 4829 | .padding_top(2) |
| 4830 | .padding_bottom(2) |
| 4831 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4); |
| 4832 | } |
| 4833 | } |
| 4834 | |
| 4835 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4, output_width_lt_4) { |
| 4836 | TEST_REQUIRES_ARM_NEON; |
| 4837 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 4838 | DWConv2DMicrokernelTester() |
| 4839 | .input_width(4) |
| 4840 | .input_height(3) |
| 4841 | .kernel_height(5) |
| 4842 | .kernel_width(5) |
| 4843 | .subsampling(1) |
| 4844 | .padding_left(2) |
| 4845 | .padding_right(2) |
| 4846 | .padding_top(2) |
| 4847 | .padding_bottom(2) |
| 4848 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4); |
| 4849 | } |
| 4850 | } |
| 4851 | |
| 4852 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4, output_width_gt_4) { |
| 4853 | TEST_REQUIRES_ARM_NEON; |
| 4854 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 4855 | DWConv2DMicrokernelTester() |
| 4856 | .input_width(input_width) |
| 4857 | .input_height(3) |
| 4858 | .kernel_height(5) |
| 4859 | .kernel_width(5) |
| 4860 | .subsampling(1) |
| 4861 | .padding_left(2) |
| 4862 | .padding_right(2) |
| 4863 | .padding_top(2) |
| 4864 | .padding_bottom(2) |
| 4865 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4); |
| 4866 | } |
| 4867 | } |
| 4868 | |
| 4869 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4, output_height_div_3) { |
| 4870 | TEST_REQUIRES_ARM_NEON; |
| 4871 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 4872 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 4873 | DWConv2DMicrokernelTester() |
| 4874 | .input_width(input_width) |
| 4875 | .input_height(input_height) |
| 4876 | .kernel_height(5) |
| 4877 | .kernel_width(5) |
| 4878 | .subsampling(1) |
| 4879 | .padding_left(2) |
| 4880 | .padding_right(2) |
| 4881 | .padding_top(2) |
| 4882 | .padding_bottom(2) |
| 4883 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4); |
| 4884 | } |
| 4885 | } |
| 4886 | } |
| 4887 | |
| 4888 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4, output_height_lt_3) { |
| 4889 | TEST_REQUIRES_ARM_NEON; |
| 4890 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 4891 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 4892 | DWConv2DMicrokernelTester() |
| 4893 | .input_width(input_width) |
| 4894 | .input_height(input_height) |
| 4895 | .kernel_height(5) |
| 4896 | .kernel_width(5) |
| 4897 | .subsampling(1) |
| 4898 | .padding_left(2) |
| 4899 | .padding_right(2) |
| 4900 | .padding_top(2) |
| 4901 | .padding_bottom(2) |
| 4902 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4); |
| 4903 | } |
| 4904 | } |
| 4905 | } |
| 4906 | |
| 4907 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4, output_height_gt_3) { |
| 4908 | TEST_REQUIRES_ARM_NEON; |
| 4909 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 4910 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 4911 | DWConv2DMicrokernelTester() |
| 4912 | .input_width(input_width) |
| 4913 | .input_height(input_height) |
| 4914 | .kernel_height(5) |
| 4915 | .kernel_width(5) |
| 4916 | .subsampling(1) |
| 4917 | .padding_left(2) |
| 4918 | .padding_right(2) |
| 4919 | .padding_top(2) |
| 4920 | .padding_bottom(2) |
| 4921 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4); |
| 4922 | } |
| 4923 | } |
| 4924 | } |
| 4925 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 4926 | |
| 4927 | |
| 4928 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 4929 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4, output_width_eq_4) { |
| 4930 | TEST_REQUIRES_ARM_NEON; |
| 4931 | DWConv2DMicrokernelTester() |
| 4932 | .input_width(4) |
| 4933 | .input_height(4) |
| 4934 | .kernel_height(5) |
| 4935 | .kernel_width(5) |
| 4936 | .subsampling(1) |
| 4937 | .padding_left(2) |
| 4938 | .padding_right(2) |
| 4939 | .padding_top(2) |
| 4940 | .padding_bottom(2) |
| 4941 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4); |
| 4942 | } |
| 4943 | |
| 4944 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4, output_width_div_4) { |
| 4945 | TEST_REQUIRES_ARM_NEON; |
| 4946 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 4947 | DWConv2DMicrokernelTester() |
| 4948 | .input_width(input_width) |
| 4949 | .input_height(4) |
| 4950 | .kernel_height(5) |
| 4951 | .kernel_width(5) |
| 4952 | .subsampling(1) |
| 4953 | .padding_left(2) |
| 4954 | .padding_right(2) |
| 4955 | .padding_top(2) |
| 4956 | .padding_bottom(2) |
| 4957 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4); |
| 4958 | } |
| 4959 | } |
| 4960 | |
| 4961 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4, output_width_lt_4) { |
| 4962 | TEST_REQUIRES_ARM_NEON; |
| 4963 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 4964 | DWConv2DMicrokernelTester() |
| 4965 | .input_width(4) |
| 4966 | .input_height(4) |
| 4967 | .kernel_height(5) |
| 4968 | .kernel_width(5) |
| 4969 | .subsampling(1) |
| 4970 | .padding_left(2) |
| 4971 | .padding_right(2) |
| 4972 | .padding_top(2) |
| 4973 | .padding_bottom(2) |
| 4974 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4); |
| 4975 | } |
| 4976 | } |
| 4977 | |
| 4978 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4, output_width_gt_4) { |
| 4979 | TEST_REQUIRES_ARM_NEON; |
| 4980 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 4981 | DWConv2DMicrokernelTester() |
| 4982 | .input_width(input_width) |
| 4983 | .input_height(4) |
| 4984 | .kernel_height(5) |
| 4985 | .kernel_width(5) |
| 4986 | .subsampling(1) |
| 4987 | .padding_left(2) |
| 4988 | .padding_right(2) |
| 4989 | .padding_top(2) |
| 4990 | .padding_bottom(2) |
| 4991 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4); |
| 4992 | } |
| 4993 | } |
| 4994 | |
| 4995 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4, output_height_div_4) { |
| 4996 | TEST_REQUIRES_ARM_NEON; |
| 4997 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 4998 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 4999 | DWConv2DMicrokernelTester() |
| 5000 | .input_width(input_width) |
| 5001 | .input_height(input_height) |
| 5002 | .kernel_height(5) |
| 5003 | .kernel_width(5) |
| 5004 | .subsampling(1) |
| 5005 | .padding_left(2) |
| 5006 | .padding_right(2) |
| 5007 | .padding_top(2) |
| 5008 | .padding_bottom(2) |
| 5009 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4); |
| 5010 | } |
| 5011 | } |
| 5012 | } |
| 5013 | |
| 5014 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4, output_height_lt_4) { |
| 5015 | TEST_REQUIRES_ARM_NEON; |
| 5016 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 5017 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5018 | DWConv2DMicrokernelTester() |
| 5019 | .input_width(input_width) |
| 5020 | .input_height(input_height) |
| 5021 | .kernel_height(5) |
| 5022 | .kernel_width(5) |
| 5023 | .subsampling(1) |
| 5024 | .padding_left(2) |
| 5025 | .padding_right(2) |
| 5026 | .padding_top(2) |
| 5027 | .padding_bottom(2) |
| 5028 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4); |
| 5029 | } |
| 5030 | } |
| 5031 | } |
| 5032 | |
| 5033 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4, output_height_gt_4) { |
| 5034 | TEST_REQUIRES_ARM_NEON; |
| 5035 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 5036 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5037 | DWConv2DMicrokernelTester() |
| 5038 | .input_width(input_width) |
| 5039 | .input_height(input_height) |
| 5040 | .kernel_height(5) |
| 5041 | .kernel_width(5) |
| 5042 | .subsampling(1) |
| 5043 | .padding_left(2) |
| 5044 | .padding_right(2) |
| 5045 | .padding_top(2) |
| 5046 | .padding_bottom(2) |
| 5047 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4); |
| 5048 | } |
| 5049 | } |
| 5050 | } |
| 5051 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5052 | |
| 5053 | |
| 5054 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5055 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_5X4, output_width_eq_4) { |
| 5056 | TEST_REQUIRES_ARM_NEON; |
| 5057 | DWConv2DMicrokernelTester() |
| 5058 | .input_width(4) |
| 5059 | .input_height(5) |
| 5060 | .kernel_height(5) |
| 5061 | .kernel_width(5) |
| 5062 | .subsampling(1) |
| 5063 | .padding_left(2) |
| 5064 | .padding_right(2) |
| 5065 | .padding_top(2) |
| 5066 | .padding_bottom(2) |
| 5067 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_5x4); |
| 5068 | } |
| 5069 | |
| 5070 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_5X4, output_width_div_4) { |
| 5071 | TEST_REQUIRES_ARM_NEON; |
| 5072 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 5073 | DWConv2DMicrokernelTester() |
| 5074 | .input_width(input_width) |
| 5075 | .input_height(5) |
| 5076 | .kernel_height(5) |
| 5077 | .kernel_width(5) |
| 5078 | .subsampling(1) |
| 5079 | .padding_left(2) |
| 5080 | .padding_right(2) |
| 5081 | .padding_top(2) |
| 5082 | .padding_bottom(2) |
| 5083 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_5x4); |
| 5084 | } |
| 5085 | } |
| 5086 | |
| 5087 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_5X4, output_width_lt_4) { |
| 5088 | TEST_REQUIRES_ARM_NEON; |
| 5089 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 5090 | DWConv2DMicrokernelTester() |
| 5091 | .input_width(4) |
| 5092 | .input_height(5) |
| 5093 | .kernel_height(5) |
| 5094 | .kernel_width(5) |
| 5095 | .subsampling(1) |
| 5096 | .padding_left(2) |
| 5097 | .padding_right(2) |
| 5098 | .padding_top(2) |
| 5099 | .padding_bottom(2) |
| 5100 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_5x4); |
| 5101 | } |
| 5102 | } |
| 5103 | |
| 5104 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_5X4, output_width_gt_4) { |
| 5105 | TEST_REQUIRES_ARM_NEON; |
| 5106 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 5107 | DWConv2DMicrokernelTester() |
| 5108 | .input_width(input_width) |
| 5109 | .input_height(5) |
| 5110 | .kernel_height(5) |
| 5111 | .kernel_width(5) |
| 5112 | .subsampling(1) |
| 5113 | .padding_left(2) |
| 5114 | .padding_right(2) |
| 5115 | .padding_top(2) |
| 5116 | .padding_bottom(2) |
| 5117 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_5x4); |
| 5118 | } |
| 5119 | } |
| 5120 | |
| 5121 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_5X4, output_height_div_5) { |
| 5122 | TEST_REQUIRES_ARM_NEON; |
| 5123 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 5124 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5125 | DWConv2DMicrokernelTester() |
| 5126 | .input_width(input_width) |
| 5127 | .input_height(input_height) |
| 5128 | .kernel_height(5) |
| 5129 | .kernel_width(5) |
| 5130 | .subsampling(1) |
| 5131 | .padding_left(2) |
| 5132 | .padding_right(2) |
| 5133 | .padding_top(2) |
| 5134 | .padding_bottom(2) |
| 5135 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_5x4); |
| 5136 | } |
| 5137 | } |
| 5138 | } |
| 5139 | |
| 5140 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_5X4, output_height_lt_5) { |
| 5141 | TEST_REQUIRES_ARM_NEON; |
| 5142 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 5143 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5144 | DWConv2DMicrokernelTester() |
| 5145 | .input_width(input_width) |
| 5146 | .input_height(input_height) |
| 5147 | .kernel_height(5) |
| 5148 | .kernel_width(5) |
| 5149 | .subsampling(1) |
| 5150 | .padding_left(2) |
| 5151 | .padding_right(2) |
| 5152 | .padding_top(2) |
| 5153 | .padding_bottom(2) |
| 5154 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_5x4); |
| 5155 | } |
| 5156 | } |
| 5157 | } |
| 5158 | |
| 5159 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_5X4, output_height_gt_5) { |
| 5160 | TEST_REQUIRES_ARM_NEON; |
| 5161 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 5162 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5163 | DWConv2DMicrokernelTester() |
| 5164 | .input_width(input_width) |
| 5165 | .input_height(input_height) |
| 5166 | .kernel_height(5) |
| 5167 | .kernel_width(5) |
| 5168 | .subsampling(1) |
| 5169 | .padding_left(2) |
| 5170 | .padding_right(2) |
| 5171 | .padding_top(2) |
| 5172 | .padding_bottom(2) |
| 5173 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_5x4); |
| 5174 | } |
| 5175 | } |
| 5176 | } |
| 5177 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5178 | |
| 5179 | |
| 5180 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5181 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC2, output_width_eq_4) { |
| 5182 | TEST_REQUIRES_ARM_NEON; |
| 5183 | DWConv2DMicrokernelTester() |
| 5184 | .input_width(4) |
| 5185 | .input_height(1) |
| 5186 | .kernel_height(5) |
| 5187 | .kernel_width(5) |
| 5188 | .subsampling(1) |
| 5189 | .padding_left(2) |
| 5190 | .padding_right(2) |
| 5191 | .padding_top(2) |
| 5192 | .padding_bottom(2) |
| 5193 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2); |
| 5194 | } |
| 5195 | |
| 5196 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC2, output_width_div_4) { |
| 5197 | TEST_REQUIRES_ARM_NEON; |
| 5198 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 5199 | DWConv2DMicrokernelTester() |
| 5200 | .input_width(input_width) |
| 5201 | .input_height(1) |
| 5202 | .kernel_height(5) |
| 5203 | .kernel_width(5) |
| 5204 | .subsampling(1) |
| 5205 | .padding_left(2) |
| 5206 | .padding_right(2) |
| 5207 | .padding_top(2) |
| 5208 | .padding_bottom(2) |
| 5209 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2); |
| 5210 | } |
| 5211 | } |
| 5212 | |
| 5213 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC2, output_width_lt_4) { |
| 5214 | TEST_REQUIRES_ARM_NEON; |
| 5215 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 5216 | DWConv2DMicrokernelTester() |
| 5217 | .input_width(4) |
| 5218 | .input_height(1) |
| 5219 | .kernel_height(5) |
| 5220 | .kernel_width(5) |
| 5221 | .subsampling(1) |
| 5222 | .padding_left(2) |
| 5223 | .padding_right(2) |
| 5224 | .padding_top(2) |
| 5225 | .padding_bottom(2) |
| 5226 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2); |
| 5227 | } |
| 5228 | } |
| 5229 | |
| 5230 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC2, output_width_gt_4) { |
| 5231 | TEST_REQUIRES_ARM_NEON; |
| 5232 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 5233 | DWConv2DMicrokernelTester() |
| 5234 | .input_width(input_width) |
| 5235 | .input_height(1) |
| 5236 | .kernel_height(5) |
| 5237 | .kernel_width(5) |
| 5238 | .subsampling(1) |
| 5239 | .padding_left(2) |
| 5240 | .padding_right(2) |
| 5241 | .padding_top(2) |
| 5242 | .padding_bottom(2) |
| 5243 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2); |
| 5244 | } |
| 5245 | } |
| 5246 | |
| 5247 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC2, output_height_gt_1) { |
| 5248 | TEST_REQUIRES_ARM_NEON; |
| 5249 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 5250 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5251 | DWConv2DMicrokernelTester() |
| 5252 | .input_width(input_width) |
| 5253 | .input_height(input_height) |
| 5254 | .kernel_height(5) |
| 5255 | .kernel_width(5) |
| 5256 | .subsampling(1) |
| 5257 | .padding_left(2) |
| 5258 | .padding_right(2) |
| 5259 | .padding_top(2) |
| 5260 | .padding_bottom(2) |
| 5261 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2); |
| 5262 | } |
| 5263 | } |
| 5264 | } |
| 5265 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5266 | |
| 5267 | |
| 5268 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5269 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC3, output_width_eq_4) { |
| 5270 | TEST_REQUIRES_ARM_NEON; |
| 5271 | DWConv2DMicrokernelTester() |
| 5272 | .input_width(4) |
| 5273 | .input_height(1) |
| 5274 | .kernel_height(5) |
| 5275 | .kernel_width(5) |
| 5276 | .subsampling(1) |
| 5277 | .padding_left(2) |
| 5278 | .padding_right(2) |
| 5279 | .padding_top(2) |
| 5280 | .padding_bottom(2) |
| 5281 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3); |
| 5282 | } |
| 5283 | |
| 5284 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC3, output_width_div_4) { |
| 5285 | TEST_REQUIRES_ARM_NEON; |
| 5286 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 5287 | DWConv2DMicrokernelTester() |
| 5288 | .input_width(input_width) |
| 5289 | .input_height(1) |
| 5290 | .kernel_height(5) |
| 5291 | .kernel_width(5) |
| 5292 | .subsampling(1) |
| 5293 | .padding_left(2) |
| 5294 | .padding_right(2) |
| 5295 | .padding_top(2) |
| 5296 | .padding_bottom(2) |
| 5297 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3); |
| 5298 | } |
| 5299 | } |
| 5300 | |
| 5301 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC3, output_width_lt_4) { |
| 5302 | TEST_REQUIRES_ARM_NEON; |
| 5303 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 5304 | DWConv2DMicrokernelTester() |
| 5305 | .input_width(4) |
| 5306 | .input_height(1) |
| 5307 | .kernel_height(5) |
| 5308 | .kernel_width(5) |
| 5309 | .subsampling(1) |
| 5310 | .padding_left(2) |
| 5311 | .padding_right(2) |
| 5312 | .padding_top(2) |
| 5313 | .padding_bottom(2) |
| 5314 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3); |
| 5315 | } |
| 5316 | } |
| 5317 | |
| 5318 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC3, output_width_gt_4) { |
| 5319 | TEST_REQUIRES_ARM_NEON; |
| 5320 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 5321 | DWConv2DMicrokernelTester() |
| 5322 | .input_width(input_width) |
| 5323 | .input_height(1) |
| 5324 | .kernel_height(5) |
| 5325 | .kernel_width(5) |
| 5326 | .subsampling(1) |
| 5327 | .padding_left(2) |
| 5328 | .padding_right(2) |
| 5329 | .padding_top(2) |
| 5330 | .padding_bottom(2) |
| 5331 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3); |
| 5332 | } |
| 5333 | } |
| 5334 | |
| 5335 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC3, output_height_gt_1) { |
| 5336 | TEST_REQUIRES_ARM_NEON; |
| 5337 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 5338 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5339 | DWConv2DMicrokernelTester() |
| 5340 | .input_width(input_width) |
| 5341 | .input_height(input_height) |
| 5342 | .kernel_height(5) |
| 5343 | .kernel_width(5) |
| 5344 | .subsampling(1) |
| 5345 | .padding_left(2) |
| 5346 | .padding_right(2) |
| 5347 | .padding_top(2) |
| 5348 | .padding_bottom(2) |
| 5349 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3); |
| 5350 | } |
| 5351 | } |
| 5352 | } |
| 5353 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5354 | |
| 5355 | |
| 5356 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5357 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC4, output_width_eq_4) { |
| 5358 | TEST_REQUIRES_ARM_NEON; |
| 5359 | DWConv2DMicrokernelTester() |
| 5360 | .input_width(4) |
| 5361 | .input_height(1) |
| 5362 | .kernel_height(5) |
| 5363 | .kernel_width(5) |
| 5364 | .subsampling(1) |
| 5365 | .padding_left(2) |
| 5366 | .padding_right(2) |
| 5367 | .padding_top(2) |
| 5368 | .padding_bottom(2) |
| 5369 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4); |
| 5370 | } |
| 5371 | |
| 5372 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC4, output_width_div_4) { |
| 5373 | TEST_REQUIRES_ARM_NEON; |
| 5374 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 5375 | DWConv2DMicrokernelTester() |
| 5376 | .input_width(input_width) |
| 5377 | .input_height(1) |
| 5378 | .kernel_height(5) |
| 5379 | .kernel_width(5) |
| 5380 | .subsampling(1) |
| 5381 | .padding_left(2) |
| 5382 | .padding_right(2) |
| 5383 | .padding_top(2) |
| 5384 | .padding_bottom(2) |
| 5385 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4); |
| 5386 | } |
| 5387 | } |
| 5388 | |
| 5389 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC4, output_width_lt_4) { |
| 5390 | TEST_REQUIRES_ARM_NEON; |
| 5391 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 5392 | DWConv2DMicrokernelTester() |
| 5393 | .input_width(4) |
| 5394 | .input_height(1) |
| 5395 | .kernel_height(5) |
| 5396 | .kernel_width(5) |
| 5397 | .subsampling(1) |
| 5398 | .padding_left(2) |
| 5399 | .padding_right(2) |
| 5400 | .padding_top(2) |
| 5401 | .padding_bottom(2) |
| 5402 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4); |
| 5403 | } |
| 5404 | } |
| 5405 | |
| 5406 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC4, output_width_gt_4) { |
| 5407 | TEST_REQUIRES_ARM_NEON; |
| 5408 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 5409 | DWConv2DMicrokernelTester() |
| 5410 | .input_width(input_width) |
| 5411 | .input_height(1) |
| 5412 | .kernel_height(5) |
| 5413 | .kernel_width(5) |
| 5414 | .subsampling(1) |
| 5415 | .padding_left(2) |
| 5416 | .padding_right(2) |
| 5417 | .padding_top(2) |
| 5418 | .padding_bottom(2) |
| 5419 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4); |
| 5420 | } |
| 5421 | } |
| 5422 | |
| 5423 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC4, output_height_gt_1) { |
| 5424 | TEST_REQUIRES_ARM_NEON; |
| 5425 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 5426 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5427 | DWConv2DMicrokernelTester() |
| 5428 | .input_width(input_width) |
| 5429 | .input_height(input_height) |
| 5430 | .kernel_height(5) |
| 5431 | .kernel_width(5) |
| 5432 | .subsampling(1) |
| 5433 | .padding_left(2) |
| 5434 | .padding_right(2) |
| 5435 | .padding_top(2) |
| 5436 | .padding_bottom(2) |
| 5437 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4); |
| 5438 | } |
| 5439 | } |
| 5440 | } |
| 5441 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5442 | |
| 5443 | |
| 5444 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5445 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC5, output_width_eq_4) { |
| 5446 | TEST_REQUIRES_ARM_NEON; |
| 5447 | DWConv2DMicrokernelTester() |
| 5448 | .input_width(4) |
| 5449 | .input_height(1) |
| 5450 | .kernel_height(5) |
| 5451 | .kernel_width(5) |
| 5452 | .subsampling(1) |
| 5453 | .padding_left(2) |
| 5454 | .padding_right(2) |
| 5455 | .padding_top(2) |
| 5456 | .padding_bottom(2) |
| 5457 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5); |
| 5458 | } |
| 5459 | |
| 5460 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC5, output_width_div_4) { |
| 5461 | TEST_REQUIRES_ARM_NEON; |
| 5462 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 5463 | DWConv2DMicrokernelTester() |
| 5464 | .input_width(input_width) |
| 5465 | .input_height(1) |
| 5466 | .kernel_height(5) |
| 5467 | .kernel_width(5) |
| 5468 | .subsampling(1) |
| 5469 | .padding_left(2) |
| 5470 | .padding_right(2) |
| 5471 | .padding_top(2) |
| 5472 | .padding_bottom(2) |
| 5473 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5); |
| 5474 | } |
| 5475 | } |
| 5476 | |
| 5477 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC5, output_width_lt_4) { |
| 5478 | TEST_REQUIRES_ARM_NEON; |
| 5479 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 5480 | DWConv2DMicrokernelTester() |
| 5481 | .input_width(4) |
| 5482 | .input_height(1) |
| 5483 | .kernel_height(5) |
| 5484 | .kernel_width(5) |
| 5485 | .subsampling(1) |
| 5486 | .padding_left(2) |
| 5487 | .padding_right(2) |
| 5488 | .padding_top(2) |
| 5489 | .padding_bottom(2) |
| 5490 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5); |
| 5491 | } |
| 5492 | } |
| 5493 | |
| 5494 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC5, output_width_gt_4) { |
| 5495 | TEST_REQUIRES_ARM_NEON; |
| 5496 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 5497 | DWConv2DMicrokernelTester() |
| 5498 | .input_width(input_width) |
| 5499 | .input_height(1) |
| 5500 | .kernel_height(5) |
| 5501 | .kernel_width(5) |
| 5502 | .subsampling(1) |
| 5503 | .padding_left(2) |
| 5504 | .padding_right(2) |
| 5505 | .padding_top(2) |
| 5506 | .padding_bottom(2) |
| 5507 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5); |
| 5508 | } |
| 5509 | } |
| 5510 | |
| 5511 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_1X4_ACC5, output_height_gt_1) { |
| 5512 | TEST_REQUIRES_ARM_NEON; |
| 5513 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 5514 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5515 | DWConv2DMicrokernelTester() |
| 5516 | .input_width(input_width) |
| 5517 | .input_height(input_height) |
| 5518 | .kernel_height(5) |
| 5519 | .kernel_width(5) |
| 5520 | .subsampling(1) |
| 5521 | .padding_left(2) |
| 5522 | .padding_right(2) |
| 5523 | .padding_top(2) |
| 5524 | .padding_bottom(2) |
| 5525 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5); |
| 5526 | } |
| 5527 | } |
| 5528 | } |
| 5529 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5530 | |
| 5531 | |
| 5532 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5533 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC2, output_width_eq_4) { |
| 5534 | TEST_REQUIRES_ARM_NEON; |
| 5535 | DWConv2DMicrokernelTester() |
| 5536 | .input_width(4) |
| 5537 | .input_height(2) |
| 5538 | .kernel_height(5) |
| 5539 | .kernel_width(5) |
| 5540 | .subsampling(1) |
| 5541 | .padding_left(2) |
| 5542 | .padding_right(2) |
| 5543 | .padding_top(2) |
| 5544 | .padding_bottom(2) |
| 5545 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc2); |
| 5546 | } |
| 5547 | |
| 5548 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC2, output_width_div_4) { |
| 5549 | TEST_REQUIRES_ARM_NEON; |
| 5550 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 5551 | DWConv2DMicrokernelTester() |
| 5552 | .input_width(input_width) |
| 5553 | .input_height(2) |
| 5554 | .kernel_height(5) |
| 5555 | .kernel_width(5) |
| 5556 | .subsampling(1) |
| 5557 | .padding_left(2) |
| 5558 | .padding_right(2) |
| 5559 | .padding_top(2) |
| 5560 | .padding_bottom(2) |
| 5561 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc2); |
| 5562 | } |
| 5563 | } |
| 5564 | |
| 5565 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC2, output_width_lt_4) { |
| 5566 | TEST_REQUIRES_ARM_NEON; |
| 5567 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 5568 | DWConv2DMicrokernelTester() |
| 5569 | .input_width(4) |
| 5570 | .input_height(2) |
| 5571 | .kernel_height(5) |
| 5572 | .kernel_width(5) |
| 5573 | .subsampling(1) |
| 5574 | .padding_left(2) |
| 5575 | .padding_right(2) |
| 5576 | .padding_top(2) |
| 5577 | .padding_bottom(2) |
| 5578 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc2); |
| 5579 | } |
| 5580 | } |
| 5581 | |
| 5582 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC2, output_width_gt_4) { |
| 5583 | TEST_REQUIRES_ARM_NEON; |
| 5584 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 5585 | DWConv2DMicrokernelTester() |
| 5586 | .input_width(input_width) |
| 5587 | .input_height(2) |
| 5588 | .kernel_height(5) |
| 5589 | .kernel_width(5) |
| 5590 | .subsampling(1) |
| 5591 | .padding_left(2) |
| 5592 | .padding_right(2) |
| 5593 | .padding_top(2) |
| 5594 | .padding_bottom(2) |
| 5595 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc2); |
| 5596 | } |
| 5597 | } |
| 5598 | |
| 5599 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC2, output_height_div_2) { |
| 5600 | TEST_REQUIRES_ARM_NEON; |
| 5601 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 5602 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5603 | DWConv2DMicrokernelTester() |
| 5604 | .input_width(input_width) |
| 5605 | .input_height(input_height) |
| 5606 | .kernel_height(5) |
| 5607 | .kernel_width(5) |
| 5608 | .subsampling(1) |
| 5609 | .padding_left(2) |
| 5610 | .padding_right(2) |
| 5611 | .padding_top(2) |
| 5612 | .padding_bottom(2) |
| 5613 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc2); |
| 5614 | } |
| 5615 | } |
| 5616 | } |
| 5617 | |
| 5618 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC2, output_height_lt_2) { |
| 5619 | TEST_REQUIRES_ARM_NEON; |
| 5620 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 5621 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5622 | DWConv2DMicrokernelTester() |
| 5623 | .input_width(input_width) |
| 5624 | .input_height(input_height) |
| 5625 | .kernel_height(5) |
| 5626 | .kernel_width(5) |
| 5627 | .subsampling(1) |
| 5628 | .padding_left(2) |
| 5629 | .padding_right(2) |
| 5630 | .padding_top(2) |
| 5631 | .padding_bottom(2) |
| 5632 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc2); |
| 5633 | } |
| 5634 | } |
| 5635 | } |
| 5636 | |
| 5637 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC2, output_height_gt_2) { |
| 5638 | TEST_REQUIRES_ARM_NEON; |
| 5639 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 5640 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5641 | DWConv2DMicrokernelTester() |
| 5642 | .input_width(input_width) |
| 5643 | .input_height(input_height) |
| 5644 | .kernel_height(5) |
| 5645 | .kernel_width(5) |
| 5646 | .subsampling(1) |
| 5647 | .padding_left(2) |
| 5648 | .padding_right(2) |
| 5649 | .padding_top(2) |
| 5650 | .padding_bottom(2) |
| 5651 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc2); |
| 5652 | } |
| 5653 | } |
| 5654 | } |
| 5655 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5656 | |
| 5657 | |
| 5658 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5659 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC3, output_width_eq_4) { |
| 5660 | TEST_REQUIRES_ARM_NEON; |
| 5661 | DWConv2DMicrokernelTester() |
| 5662 | .input_width(4) |
| 5663 | .input_height(2) |
| 5664 | .kernel_height(5) |
| 5665 | .kernel_width(5) |
| 5666 | .subsampling(1) |
| 5667 | .padding_left(2) |
| 5668 | .padding_right(2) |
| 5669 | .padding_top(2) |
| 5670 | .padding_bottom(2) |
| 5671 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc3); |
| 5672 | } |
| 5673 | |
| 5674 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC3, output_width_div_4) { |
| 5675 | TEST_REQUIRES_ARM_NEON; |
| 5676 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 5677 | DWConv2DMicrokernelTester() |
| 5678 | .input_width(input_width) |
| 5679 | .input_height(2) |
| 5680 | .kernel_height(5) |
| 5681 | .kernel_width(5) |
| 5682 | .subsampling(1) |
| 5683 | .padding_left(2) |
| 5684 | .padding_right(2) |
| 5685 | .padding_top(2) |
| 5686 | .padding_bottom(2) |
| 5687 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc3); |
| 5688 | } |
| 5689 | } |
| 5690 | |
| 5691 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC3, output_width_lt_4) { |
| 5692 | TEST_REQUIRES_ARM_NEON; |
| 5693 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 5694 | DWConv2DMicrokernelTester() |
| 5695 | .input_width(4) |
| 5696 | .input_height(2) |
| 5697 | .kernel_height(5) |
| 5698 | .kernel_width(5) |
| 5699 | .subsampling(1) |
| 5700 | .padding_left(2) |
| 5701 | .padding_right(2) |
| 5702 | .padding_top(2) |
| 5703 | .padding_bottom(2) |
| 5704 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc3); |
| 5705 | } |
| 5706 | } |
| 5707 | |
| 5708 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC3, output_width_gt_4) { |
| 5709 | TEST_REQUIRES_ARM_NEON; |
| 5710 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 5711 | DWConv2DMicrokernelTester() |
| 5712 | .input_width(input_width) |
| 5713 | .input_height(2) |
| 5714 | .kernel_height(5) |
| 5715 | .kernel_width(5) |
| 5716 | .subsampling(1) |
| 5717 | .padding_left(2) |
| 5718 | .padding_right(2) |
| 5719 | .padding_top(2) |
| 5720 | .padding_bottom(2) |
| 5721 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc3); |
| 5722 | } |
| 5723 | } |
| 5724 | |
| 5725 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC3, output_height_div_2) { |
| 5726 | TEST_REQUIRES_ARM_NEON; |
| 5727 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 5728 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5729 | DWConv2DMicrokernelTester() |
| 5730 | .input_width(input_width) |
| 5731 | .input_height(input_height) |
| 5732 | .kernel_height(5) |
| 5733 | .kernel_width(5) |
| 5734 | .subsampling(1) |
| 5735 | .padding_left(2) |
| 5736 | .padding_right(2) |
| 5737 | .padding_top(2) |
| 5738 | .padding_bottom(2) |
| 5739 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc3); |
| 5740 | } |
| 5741 | } |
| 5742 | } |
| 5743 | |
| 5744 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC3, output_height_lt_2) { |
| 5745 | TEST_REQUIRES_ARM_NEON; |
| 5746 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 5747 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5748 | DWConv2DMicrokernelTester() |
| 5749 | .input_width(input_width) |
| 5750 | .input_height(input_height) |
| 5751 | .kernel_height(5) |
| 5752 | .kernel_width(5) |
| 5753 | .subsampling(1) |
| 5754 | .padding_left(2) |
| 5755 | .padding_right(2) |
| 5756 | .padding_top(2) |
| 5757 | .padding_bottom(2) |
| 5758 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc3); |
| 5759 | } |
| 5760 | } |
| 5761 | } |
| 5762 | |
| 5763 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_2X4_ACC3, output_height_gt_2) { |
| 5764 | TEST_REQUIRES_ARM_NEON; |
| 5765 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 5766 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5767 | DWConv2DMicrokernelTester() |
| 5768 | .input_width(input_width) |
| 5769 | .input_height(input_height) |
| 5770 | .kernel_height(5) |
| 5771 | .kernel_width(5) |
| 5772 | .subsampling(1) |
| 5773 | .padding_left(2) |
| 5774 | .padding_right(2) |
| 5775 | .padding_top(2) |
| 5776 | .padding_bottom(2) |
| 5777 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc3); |
| 5778 | } |
| 5779 | } |
| 5780 | } |
| 5781 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5782 | |
| 5783 | |
| 5784 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5785 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4_ACC2, output_width_eq_4) { |
| 5786 | TEST_REQUIRES_ARM_NEON; |
| 5787 | DWConv2DMicrokernelTester() |
| 5788 | .input_width(4) |
| 5789 | .input_height(3) |
| 5790 | .kernel_height(5) |
| 5791 | .kernel_width(5) |
| 5792 | .subsampling(1) |
| 5793 | .padding_left(2) |
| 5794 | .padding_right(2) |
| 5795 | .padding_top(2) |
| 5796 | .padding_bottom(2) |
| 5797 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4_acc2); |
| 5798 | } |
| 5799 | |
| 5800 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4_ACC2, output_width_div_4) { |
| 5801 | TEST_REQUIRES_ARM_NEON; |
| 5802 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 5803 | DWConv2DMicrokernelTester() |
| 5804 | .input_width(input_width) |
| 5805 | .input_height(3) |
| 5806 | .kernel_height(5) |
| 5807 | .kernel_width(5) |
| 5808 | .subsampling(1) |
| 5809 | .padding_left(2) |
| 5810 | .padding_right(2) |
| 5811 | .padding_top(2) |
| 5812 | .padding_bottom(2) |
| 5813 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4_acc2); |
| 5814 | } |
| 5815 | } |
| 5816 | |
| 5817 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4_ACC2, output_width_lt_4) { |
| 5818 | TEST_REQUIRES_ARM_NEON; |
| 5819 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 5820 | DWConv2DMicrokernelTester() |
| 5821 | .input_width(4) |
| 5822 | .input_height(3) |
| 5823 | .kernel_height(5) |
| 5824 | .kernel_width(5) |
| 5825 | .subsampling(1) |
| 5826 | .padding_left(2) |
| 5827 | .padding_right(2) |
| 5828 | .padding_top(2) |
| 5829 | .padding_bottom(2) |
| 5830 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4_acc2); |
| 5831 | } |
| 5832 | } |
| 5833 | |
| 5834 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4_ACC2, output_width_gt_4) { |
| 5835 | TEST_REQUIRES_ARM_NEON; |
| 5836 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 5837 | DWConv2DMicrokernelTester() |
| 5838 | .input_width(input_width) |
| 5839 | .input_height(3) |
| 5840 | .kernel_height(5) |
| 5841 | .kernel_width(5) |
| 5842 | .subsampling(1) |
| 5843 | .padding_left(2) |
| 5844 | .padding_right(2) |
| 5845 | .padding_top(2) |
| 5846 | .padding_bottom(2) |
| 5847 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4_acc2); |
| 5848 | } |
| 5849 | } |
| 5850 | |
| 5851 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4_ACC2, output_height_div_3) { |
| 5852 | TEST_REQUIRES_ARM_NEON; |
| 5853 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 5854 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5855 | DWConv2DMicrokernelTester() |
| 5856 | .input_width(input_width) |
| 5857 | .input_height(input_height) |
| 5858 | .kernel_height(5) |
| 5859 | .kernel_width(5) |
| 5860 | .subsampling(1) |
| 5861 | .padding_left(2) |
| 5862 | .padding_right(2) |
| 5863 | .padding_top(2) |
| 5864 | .padding_bottom(2) |
| 5865 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4_acc2); |
| 5866 | } |
| 5867 | } |
| 5868 | } |
| 5869 | |
| 5870 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4_ACC2, output_height_lt_3) { |
| 5871 | TEST_REQUIRES_ARM_NEON; |
| 5872 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 5873 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5874 | DWConv2DMicrokernelTester() |
| 5875 | .input_width(input_width) |
| 5876 | .input_height(input_height) |
| 5877 | .kernel_height(5) |
| 5878 | .kernel_width(5) |
| 5879 | .subsampling(1) |
| 5880 | .padding_left(2) |
| 5881 | .padding_right(2) |
| 5882 | .padding_top(2) |
| 5883 | .padding_bottom(2) |
| 5884 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4_acc2); |
| 5885 | } |
| 5886 | } |
| 5887 | } |
| 5888 | |
| 5889 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_3X4_ACC2, output_height_gt_3) { |
| 5890 | TEST_REQUIRES_ARM_NEON; |
| 5891 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 5892 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5893 | DWConv2DMicrokernelTester() |
| 5894 | .input_width(input_width) |
| 5895 | .input_height(input_height) |
| 5896 | .kernel_height(5) |
| 5897 | .kernel_width(5) |
| 5898 | .subsampling(1) |
| 5899 | .padding_left(2) |
| 5900 | .padding_right(2) |
| 5901 | .padding_top(2) |
| 5902 | .padding_bottom(2) |
| 5903 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4_acc2); |
| 5904 | } |
| 5905 | } |
| 5906 | } |
| 5907 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5908 | |
| 5909 | |
| 5910 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 5911 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4_ACC2, output_width_eq_4) { |
| 5912 | TEST_REQUIRES_ARM_NEON; |
| 5913 | DWConv2DMicrokernelTester() |
| 5914 | .input_width(4) |
| 5915 | .input_height(4) |
| 5916 | .kernel_height(5) |
| 5917 | .kernel_width(5) |
| 5918 | .subsampling(1) |
| 5919 | .padding_left(2) |
| 5920 | .padding_right(2) |
| 5921 | .padding_top(2) |
| 5922 | .padding_bottom(2) |
| 5923 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4_acc2); |
| 5924 | } |
| 5925 | |
| 5926 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4_ACC2, output_width_div_4) { |
| 5927 | TEST_REQUIRES_ARM_NEON; |
| 5928 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 5929 | DWConv2DMicrokernelTester() |
| 5930 | .input_width(input_width) |
| 5931 | .input_height(4) |
| 5932 | .kernel_height(5) |
| 5933 | .kernel_width(5) |
| 5934 | .subsampling(1) |
| 5935 | .padding_left(2) |
| 5936 | .padding_right(2) |
| 5937 | .padding_top(2) |
| 5938 | .padding_bottom(2) |
| 5939 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4_acc2); |
| 5940 | } |
| 5941 | } |
| 5942 | |
| 5943 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4_ACC2, output_width_lt_4) { |
| 5944 | TEST_REQUIRES_ARM_NEON; |
| 5945 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 5946 | DWConv2DMicrokernelTester() |
| 5947 | .input_width(4) |
| 5948 | .input_height(4) |
| 5949 | .kernel_height(5) |
| 5950 | .kernel_width(5) |
| 5951 | .subsampling(1) |
| 5952 | .padding_left(2) |
| 5953 | .padding_right(2) |
| 5954 | .padding_top(2) |
| 5955 | .padding_bottom(2) |
| 5956 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4_acc2); |
| 5957 | } |
| 5958 | } |
| 5959 | |
| 5960 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4_ACC2, output_width_gt_4) { |
| 5961 | TEST_REQUIRES_ARM_NEON; |
| 5962 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 5963 | DWConv2DMicrokernelTester() |
| 5964 | .input_width(input_width) |
| 5965 | .input_height(4) |
| 5966 | .kernel_height(5) |
| 5967 | .kernel_width(5) |
| 5968 | .subsampling(1) |
| 5969 | .padding_left(2) |
| 5970 | .padding_right(2) |
| 5971 | .padding_top(2) |
| 5972 | .padding_bottom(2) |
| 5973 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4_acc2); |
| 5974 | } |
| 5975 | } |
| 5976 | |
| 5977 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4_ACC2, output_height_div_4) { |
| 5978 | TEST_REQUIRES_ARM_NEON; |
| 5979 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 5980 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 5981 | DWConv2DMicrokernelTester() |
| 5982 | .input_width(input_width) |
| 5983 | .input_height(input_height) |
| 5984 | .kernel_height(5) |
| 5985 | .kernel_width(5) |
| 5986 | .subsampling(1) |
| 5987 | .padding_left(2) |
| 5988 | .padding_right(2) |
| 5989 | .padding_top(2) |
| 5990 | .padding_bottom(2) |
| 5991 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4_acc2); |
| 5992 | } |
| 5993 | } |
| 5994 | } |
| 5995 | |
| 5996 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4_ACC2, output_height_lt_4) { |
| 5997 | TEST_REQUIRES_ARM_NEON; |
| 5998 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 5999 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6000 | DWConv2DMicrokernelTester() |
| 6001 | .input_width(input_width) |
| 6002 | .input_height(input_height) |
| 6003 | .kernel_height(5) |
| 6004 | .kernel_width(5) |
| 6005 | .subsampling(1) |
| 6006 | .padding_left(2) |
| 6007 | .padding_right(2) |
| 6008 | .padding_top(2) |
| 6009 | .padding_bottom(2) |
| 6010 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4_acc2); |
| 6011 | } |
| 6012 | } |
| 6013 | } |
| 6014 | |
| 6015 | TEST(F32_DWCONV2D_CHW_5X5P2__NEON_4X4_ACC2, output_height_gt_4) { |
| 6016 | TEST_REQUIRES_ARM_NEON; |
| 6017 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 6018 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6019 | DWConv2DMicrokernelTester() |
| 6020 | .input_width(input_width) |
| 6021 | .input_height(input_height) |
| 6022 | .kernel_height(5) |
| 6023 | .kernel_width(5) |
| 6024 | .subsampling(1) |
| 6025 | .padding_left(2) |
| 6026 | .padding_right(2) |
| 6027 | .padding_top(2) |
| 6028 | .padding_bottom(2) |
| 6029 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4_acc2); |
| 6030 | } |
| 6031 | } |
| 6032 | } |
| 6033 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 6034 | |
| 6035 | |
| 6036 | #if XNN_ARCH_ARM64 |
| 6037 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4, output_width_eq_4) { |
| 6038 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6039 | DWConv2DMicrokernelTester() |
| 6040 | .input_width(4) |
| 6041 | .input_height(1) |
| 6042 | .kernel_height(5) |
| 6043 | .kernel_width(5) |
| 6044 | .subsampling(1) |
| 6045 | .padding_left(2) |
| 6046 | .padding_right(2) |
| 6047 | .padding_top(2) |
| 6048 | .padding_bottom(2) |
| 6049 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4); |
| 6050 | } |
| 6051 | |
| 6052 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4, output_width_div_4) { |
| 6053 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6054 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 6055 | DWConv2DMicrokernelTester() |
| 6056 | .input_width(input_width) |
| 6057 | .input_height(1) |
| 6058 | .kernel_height(5) |
| 6059 | .kernel_width(5) |
| 6060 | .subsampling(1) |
| 6061 | .padding_left(2) |
| 6062 | .padding_right(2) |
| 6063 | .padding_top(2) |
| 6064 | .padding_bottom(2) |
| 6065 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4); |
| 6066 | } |
| 6067 | } |
| 6068 | |
| 6069 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4, output_width_lt_4) { |
| 6070 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6071 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 6072 | DWConv2DMicrokernelTester() |
| 6073 | .input_width(4) |
| 6074 | .input_height(1) |
| 6075 | .kernel_height(5) |
| 6076 | .kernel_width(5) |
| 6077 | .subsampling(1) |
| 6078 | .padding_left(2) |
| 6079 | .padding_right(2) |
| 6080 | .padding_top(2) |
| 6081 | .padding_bottom(2) |
| 6082 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4); |
| 6083 | } |
| 6084 | } |
| 6085 | |
| 6086 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4, output_width_gt_4) { |
| 6087 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6088 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 6089 | DWConv2DMicrokernelTester() |
| 6090 | .input_width(input_width) |
| 6091 | .input_height(1) |
| 6092 | .kernel_height(5) |
| 6093 | .kernel_width(5) |
| 6094 | .subsampling(1) |
| 6095 | .padding_left(2) |
| 6096 | .padding_right(2) |
| 6097 | .padding_top(2) |
| 6098 | .padding_bottom(2) |
| 6099 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4); |
| 6100 | } |
| 6101 | } |
| 6102 | |
| 6103 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4, output_height_gt_1) { |
| 6104 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6105 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 6106 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6107 | DWConv2DMicrokernelTester() |
| 6108 | .input_width(input_width) |
| 6109 | .input_height(input_height) |
| 6110 | .kernel_height(5) |
| 6111 | .kernel_width(5) |
| 6112 | .subsampling(1) |
| 6113 | .padding_left(2) |
| 6114 | .padding_right(2) |
| 6115 | .padding_top(2) |
| 6116 | .padding_bottom(2) |
| 6117 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4); |
| 6118 | } |
| 6119 | } |
| 6120 | } |
| 6121 | #endif // XNN_ARCH_ARM64 |
| 6122 | |
| 6123 | |
| 6124 | #if XNN_ARCH_ARM64 |
| 6125 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4, output_width_eq_4) { |
| 6126 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6127 | DWConv2DMicrokernelTester() |
| 6128 | .input_width(4) |
| 6129 | .input_height(2) |
| 6130 | .kernel_height(5) |
| 6131 | .kernel_width(5) |
| 6132 | .subsampling(1) |
| 6133 | .padding_left(2) |
| 6134 | .padding_right(2) |
| 6135 | .padding_top(2) |
| 6136 | .padding_bottom(2) |
| 6137 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4); |
| 6138 | } |
| 6139 | |
| 6140 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4, output_width_div_4) { |
| 6141 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6142 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 6143 | DWConv2DMicrokernelTester() |
| 6144 | .input_width(input_width) |
| 6145 | .input_height(2) |
| 6146 | .kernel_height(5) |
| 6147 | .kernel_width(5) |
| 6148 | .subsampling(1) |
| 6149 | .padding_left(2) |
| 6150 | .padding_right(2) |
| 6151 | .padding_top(2) |
| 6152 | .padding_bottom(2) |
| 6153 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4); |
| 6154 | } |
| 6155 | } |
| 6156 | |
| 6157 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4, output_width_lt_4) { |
| 6158 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6159 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 6160 | DWConv2DMicrokernelTester() |
| 6161 | .input_width(4) |
| 6162 | .input_height(2) |
| 6163 | .kernel_height(5) |
| 6164 | .kernel_width(5) |
| 6165 | .subsampling(1) |
| 6166 | .padding_left(2) |
| 6167 | .padding_right(2) |
| 6168 | .padding_top(2) |
| 6169 | .padding_bottom(2) |
| 6170 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4); |
| 6171 | } |
| 6172 | } |
| 6173 | |
| 6174 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4, output_width_gt_4) { |
| 6175 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6176 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 6177 | DWConv2DMicrokernelTester() |
| 6178 | .input_width(input_width) |
| 6179 | .input_height(2) |
| 6180 | .kernel_height(5) |
| 6181 | .kernel_width(5) |
| 6182 | .subsampling(1) |
| 6183 | .padding_left(2) |
| 6184 | .padding_right(2) |
| 6185 | .padding_top(2) |
| 6186 | .padding_bottom(2) |
| 6187 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4); |
| 6188 | } |
| 6189 | } |
| 6190 | |
| 6191 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4, output_height_div_2) { |
| 6192 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6193 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 6194 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6195 | DWConv2DMicrokernelTester() |
| 6196 | .input_width(input_width) |
| 6197 | .input_height(input_height) |
| 6198 | .kernel_height(5) |
| 6199 | .kernel_width(5) |
| 6200 | .subsampling(1) |
| 6201 | .padding_left(2) |
| 6202 | .padding_right(2) |
| 6203 | .padding_top(2) |
| 6204 | .padding_bottom(2) |
| 6205 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4); |
| 6206 | } |
| 6207 | } |
| 6208 | } |
| 6209 | |
| 6210 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4, output_height_lt_2) { |
| 6211 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6212 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 6213 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6214 | DWConv2DMicrokernelTester() |
| 6215 | .input_width(input_width) |
| 6216 | .input_height(input_height) |
| 6217 | .kernel_height(5) |
| 6218 | .kernel_width(5) |
| 6219 | .subsampling(1) |
| 6220 | .padding_left(2) |
| 6221 | .padding_right(2) |
| 6222 | .padding_top(2) |
| 6223 | .padding_bottom(2) |
| 6224 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4); |
| 6225 | } |
| 6226 | } |
| 6227 | } |
| 6228 | |
| 6229 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4, output_height_gt_2) { |
| 6230 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6231 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 6232 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6233 | DWConv2DMicrokernelTester() |
| 6234 | .input_width(input_width) |
| 6235 | .input_height(input_height) |
| 6236 | .kernel_height(5) |
| 6237 | .kernel_width(5) |
| 6238 | .subsampling(1) |
| 6239 | .padding_left(2) |
| 6240 | .padding_right(2) |
| 6241 | .padding_top(2) |
| 6242 | .padding_bottom(2) |
| 6243 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4); |
| 6244 | } |
| 6245 | } |
| 6246 | } |
| 6247 | #endif // XNN_ARCH_ARM64 |
| 6248 | |
| 6249 | |
| Marat Dukhan | 82f0c32 | 2020-10-25 19:17:35 -0700 | [diff] [blame] | 6250 | #if XNN_ARCH_ARM64 |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6251 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4, output_width_eq_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6252 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6253 | DWConv2DMicrokernelTester() |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6254 | .input_width(4) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6255 | .input_height(3) |
| 6256 | .kernel_height(5) |
| 6257 | .kernel_width(5) |
| 6258 | .subsampling(1) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6259 | .padding_left(2) |
| 6260 | .padding_right(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 6261 | .padding_top(2) |
| 6262 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6263 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4); |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6264 | } |
| 6265 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6266 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4, output_width_div_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6267 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6268 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6269 | DWConv2DMicrokernelTester() |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6270 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6271 | .input_height(3) |
| 6272 | .kernel_height(5) |
| 6273 | .kernel_width(5) |
| 6274 | .subsampling(1) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6275 | .padding_left(2) |
| 6276 | .padding_right(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 6277 | .padding_top(2) |
| 6278 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6279 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4); |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6280 | } |
| 6281 | } |
| 6282 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6283 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4, output_width_lt_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6284 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6285 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6286 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6287 | .input_width(4) |
| 6288 | .input_height(3) |
| 6289 | .kernel_height(5) |
| 6290 | .kernel_width(5) |
| 6291 | .subsampling(1) |
| 6292 | .padding_left(2) |
| 6293 | .padding_right(2) |
| 6294 | .padding_top(2) |
| 6295 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6296 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6297 | } |
| 6298 | } |
| 6299 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6300 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4, output_width_gt_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6301 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6302 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6303 | DWConv2DMicrokernelTester() |
| Erich Elsen | 4ad5115 | 2019-11-19 13:11:53 -0800 | [diff] [blame] | 6304 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6305 | .input_height(3) |
| 6306 | .kernel_height(5) |
| 6307 | .kernel_width(5) |
| 6308 | .subsampling(1) |
| Erich Elsen | 4ad5115 | 2019-11-19 13:11:53 -0800 | [diff] [blame] | 6309 | .padding_left(2) |
| 6310 | .padding_right(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 6311 | .padding_top(2) |
| 6312 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6313 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4); |
| Erich Elsen | 4ad5115 | 2019-11-19 13:11:53 -0800 | [diff] [blame] | 6314 | } |
| 6315 | } |
| 6316 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6317 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4, output_height_div_3) { |
| Erich Elsen | 4ad5115 | 2019-11-19 13:11:53 -0800 | [diff] [blame] | 6318 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6319 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 6320 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6321 | DWConv2DMicrokernelTester() |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6322 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6323 | .input_height(input_height) |
| 6324 | .kernel_height(5) |
| 6325 | .kernel_width(5) |
| 6326 | .subsampling(1) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6327 | .padding_left(2) |
| 6328 | .padding_right(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 6329 | .padding_top(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 6330 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6331 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6332 | } |
| 6333 | } |
| 6334 | } |
| 6335 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6336 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4, output_height_lt_3) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6337 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6338 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 6339 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6340 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6341 | .input_width(input_width) |
| 6342 | .input_height(input_height) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6343 | .kernel_height(5) |
| 6344 | .kernel_width(5) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6345 | .subsampling(1) |
| 6346 | .padding_left(2) |
| 6347 | .padding_right(2) |
| 6348 | .padding_top(2) |
| 6349 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6350 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6351 | } |
| 6352 | } |
| 6353 | } |
| 6354 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6355 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4, output_height_gt_3) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6356 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6357 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 6358 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6359 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 6360 | .input_width(input_width) |
| 6361 | .input_height(input_height) |
| 6362 | .kernel_height(5) |
| 6363 | .kernel_width(5) |
| 6364 | .subsampling(1) |
| 6365 | .padding_left(2) |
| 6366 | .padding_right(2) |
| 6367 | .padding_top(2) |
| 6368 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 6369 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4); |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6370 | } |
| 6371 | } |
| 6372 | } |
| Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 6373 | #endif // XNN_ARCH_ARM64 |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 6374 | |
| 6375 | |
| Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 6376 | #if XNN_ARCH_ARM64 |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 6377 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4, output_width_eq_4) { |
| 6378 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6379 | DWConv2DMicrokernelTester() |
| 6380 | .input_width(4) |
| 6381 | .input_height(4) |
| 6382 | .kernel_height(5) |
| 6383 | .kernel_width(5) |
| 6384 | .subsampling(1) |
| 6385 | .padding_left(2) |
| 6386 | .padding_right(2) |
| 6387 | .padding_top(2) |
| 6388 | .padding_bottom(2) |
| 6389 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4); |
| 6390 | } |
| 6391 | |
| 6392 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4, output_width_div_4) { |
| 6393 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6394 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 6395 | DWConv2DMicrokernelTester() |
| 6396 | .input_width(input_width) |
| 6397 | .input_height(4) |
| 6398 | .kernel_height(5) |
| 6399 | .kernel_width(5) |
| 6400 | .subsampling(1) |
| 6401 | .padding_left(2) |
| 6402 | .padding_right(2) |
| 6403 | .padding_top(2) |
| 6404 | .padding_bottom(2) |
| 6405 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4); |
| 6406 | } |
| 6407 | } |
| 6408 | |
| 6409 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4, output_width_lt_4) { |
| 6410 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6411 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 6412 | DWConv2DMicrokernelTester() |
| 6413 | .input_width(4) |
| 6414 | .input_height(4) |
| 6415 | .kernel_height(5) |
| 6416 | .kernel_width(5) |
| 6417 | .subsampling(1) |
| 6418 | .padding_left(2) |
| 6419 | .padding_right(2) |
| 6420 | .padding_top(2) |
| 6421 | .padding_bottom(2) |
| 6422 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4); |
| 6423 | } |
| 6424 | } |
| 6425 | |
| 6426 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4, output_width_gt_4) { |
| 6427 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6428 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 6429 | DWConv2DMicrokernelTester() |
| 6430 | .input_width(input_width) |
| 6431 | .input_height(4) |
| 6432 | .kernel_height(5) |
| 6433 | .kernel_width(5) |
| 6434 | .subsampling(1) |
| 6435 | .padding_left(2) |
| 6436 | .padding_right(2) |
| 6437 | .padding_top(2) |
| 6438 | .padding_bottom(2) |
| 6439 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4); |
| 6440 | } |
| 6441 | } |
| 6442 | |
| 6443 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4, output_height_div_4) { |
| 6444 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6445 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 6446 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6447 | DWConv2DMicrokernelTester() |
| 6448 | .input_width(input_width) |
| 6449 | .input_height(input_height) |
| 6450 | .kernel_height(5) |
| 6451 | .kernel_width(5) |
| 6452 | .subsampling(1) |
| 6453 | .padding_left(2) |
| 6454 | .padding_right(2) |
| 6455 | .padding_top(2) |
| 6456 | .padding_bottom(2) |
| 6457 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4); |
| 6458 | } |
| 6459 | } |
| 6460 | } |
| 6461 | |
| 6462 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4, output_height_lt_4) { |
| 6463 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6464 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 6465 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6466 | DWConv2DMicrokernelTester() |
| 6467 | .input_width(input_width) |
| 6468 | .input_height(input_height) |
| 6469 | .kernel_height(5) |
| 6470 | .kernel_width(5) |
| 6471 | .subsampling(1) |
| 6472 | .padding_left(2) |
| 6473 | .padding_right(2) |
| 6474 | .padding_top(2) |
| 6475 | .padding_bottom(2) |
| 6476 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4); |
| 6477 | } |
| 6478 | } |
| 6479 | } |
| 6480 | |
| 6481 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4, output_height_gt_4) { |
| 6482 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6483 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 6484 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6485 | DWConv2DMicrokernelTester() |
| 6486 | .input_width(input_width) |
| 6487 | .input_height(input_height) |
| 6488 | .kernel_height(5) |
| 6489 | .kernel_width(5) |
| 6490 | .subsampling(1) |
| 6491 | .padding_left(2) |
| 6492 | .padding_right(2) |
| 6493 | .padding_top(2) |
| 6494 | .padding_bottom(2) |
| 6495 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4); |
| 6496 | } |
| 6497 | } |
| 6498 | } |
| 6499 | #endif // XNN_ARCH_ARM64 |
| 6500 | |
| 6501 | |
| 6502 | #if XNN_ARCH_ARM64 |
| 6503 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_5X4, output_width_eq_4) { |
| 6504 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6505 | DWConv2DMicrokernelTester() |
| 6506 | .input_width(4) |
| 6507 | .input_height(5) |
| 6508 | .kernel_height(5) |
| 6509 | .kernel_width(5) |
| 6510 | .subsampling(1) |
| 6511 | .padding_left(2) |
| 6512 | .padding_right(2) |
| 6513 | .padding_top(2) |
| 6514 | .padding_bottom(2) |
| 6515 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_5x4); |
| 6516 | } |
| 6517 | |
| 6518 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_5X4, output_width_div_4) { |
| 6519 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6520 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 6521 | DWConv2DMicrokernelTester() |
| 6522 | .input_width(input_width) |
| 6523 | .input_height(5) |
| 6524 | .kernel_height(5) |
| 6525 | .kernel_width(5) |
| 6526 | .subsampling(1) |
| 6527 | .padding_left(2) |
| 6528 | .padding_right(2) |
| 6529 | .padding_top(2) |
| 6530 | .padding_bottom(2) |
| 6531 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_5x4); |
| 6532 | } |
| 6533 | } |
| 6534 | |
| 6535 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_5X4, output_width_lt_4) { |
| 6536 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6537 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 6538 | DWConv2DMicrokernelTester() |
| 6539 | .input_width(4) |
| 6540 | .input_height(5) |
| 6541 | .kernel_height(5) |
| 6542 | .kernel_width(5) |
| 6543 | .subsampling(1) |
| 6544 | .padding_left(2) |
| 6545 | .padding_right(2) |
| 6546 | .padding_top(2) |
| 6547 | .padding_bottom(2) |
| 6548 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_5x4); |
| 6549 | } |
| 6550 | } |
| 6551 | |
| 6552 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_5X4, output_width_gt_4) { |
| 6553 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6554 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 6555 | DWConv2DMicrokernelTester() |
| 6556 | .input_width(input_width) |
| 6557 | .input_height(5) |
| 6558 | .kernel_height(5) |
| 6559 | .kernel_width(5) |
| 6560 | .subsampling(1) |
| 6561 | .padding_left(2) |
| 6562 | .padding_right(2) |
| 6563 | .padding_top(2) |
| 6564 | .padding_bottom(2) |
| 6565 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_5x4); |
| 6566 | } |
| 6567 | } |
| 6568 | |
| 6569 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_5X4, output_height_div_5) { |
| 6570 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6571 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 6572 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6573 | DWConv2DMicrokernelTester() |
| 6574 | .input_width(input_width) |
| 6575 | .input_height(input_height) |
| 6576 | .kernel_height(5) |
| 6577 | .kernel_width(5) |
| 6578 | .subsampling(1) |
| 6579 | .padding_left(2) |
| 6580 | .padding_right(2) |
| 6581 | .padding_top(2) |
| 6582 | .padding_bottom(2) |
| 6583 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_5x4); |
| 6584 | } |
| 6585 | } |
| 6586 | } |
| 6587 | |
| 6588 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_5X4, output_height_lt_5) { |
| 6589 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6590 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 6591 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6592 | DWConv2DMicrokernelTester() |
| 6593 | .input_width(input_width) |
| 6594 | .input_height(input_height) |
| 6595 | .kernel_height(5) |
| 6596 | .kernel_width(5) |
| 6597 | .subsampling(1) |
| 6598 | .padding_left(2) |
| 6599 | .padding_right(2) |
| 6600 | .padding_top(2) |
| 6601 | .padding_bottom(2) |
| 6602 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_5x4); |
| 6603 | } |
| 6604 | } |
| 6605 | } |
| 6606 | |
| 6607 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_5X4, output_height_gt_5) { |
| 6608 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6609 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 6610 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6611 | DWConv2DMicrokernelTester() |
| 6612 | .input_width(input_width) |
| 6613 | .input_height(input_height) |
| 6614 | .kernel_height(5) |
| 6615 | .kernel_width(5) |
| 6616 | .subsampling(1) |
| 6617 | .padding_left(2) |
| 6618 | .padding_right(2) |
| 6619 | .padding_top(2) |
| 6620 | .padding_bottom(2) |
| 6621 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_5x4); |
| 6622 | } |
| 6623 | } |
| 6624 | } |
| 6625 | #endif // XNN_ARCH_ARM64 |
| 6626 | |
| 6627 | |
| 6628 | #if XNN_ARCH_ARM64 |
| 6629 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC2, output_width_eq_4) { |
| 6630 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6631 | DWConv2DMicrokernelTester() |
| 6632 | .input_width(4) |
| 6633 | .input_height(1) |
| 6634 | .kernel_height(5) |
| 6635 | .kernel_width(5) |
| 6636 | .subsampling(1) |
| 6637 | .padding_left(2) |
| 6638 | .padding_right(2) |
| 6639 | .padding_top(2) |
| 6640 | .padding_bottom(2) |
| 6641 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2); |
| 6642 | } |
| 6643 | |
| 6644 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC2, output_width_div_4) { |
| 6645 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6646 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 6647 | DWConv2DMicrokernelTester() |
| 6648 | .input_width(input_width) |
| 6649 | .input_height(1) |
| 6650 | .kernel_height(5) |
| 6651 | .kernel_width(5) |
| 6652 | .subsampling(1) |
| 6653 | .padding_left(2) |
| 6654 | .padding_right(2) |
| 6655 | .padding_top(2) |
| 6656 | .padding_bottom(2) |
| 6657 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2); |
| 6658 | } |
| 6659 | } |
| 6660 | |
| 6661 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC2, output_width_lt_4) { |
| 6662 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6663 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 6664 | DWConv2DMicrokernelTester() |
| 6665 | .input_width(4) |
| 6666 | .input_height(1) |
| 6667 | .kernel_height(5) |
| 6668 | .kernel_width(5) |
| 6669 | .subsampling(1) |
| 6670 | .padding_left(2) |
| 6671 | .padding_right(2) |
| 6672 | .padding_top(2) |
| 6673 | .padding_bottom(2) |
| 6674 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2); |
| 6675 | } |
| 6676 | } |
| 6677 | |
| 6678 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC2, output_width_gt_4) { |
| 6679 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6680 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 6681 | DWConv2DMicrokernelTester() |
| 6682 | .input_width(input_width) |
| 6683 | .input_height(1) |
| 6684 | .kernel_height(5) |
| 6685 | .kernel_width(5) |
| 6686 | .subsampling(1) |
| 6687 | .padding_left(2) |
| 6688 | .padding_right(2) |
| 6689 | .padding_top(2) |
| 6690 | .padding_bottom(2) |
| 6691 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2); |
| 6692 | } |
| 6693 | } |
| 6694 | |
| 6695 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC2, output_height_gt_1) { |
| 6696 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6697 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 6698 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6699 | DWConv2DMicrokernelTester() |
| 6700 | .input_width(input_width) |
| 6701 | .input_height(input_height) |
| 6702 | .kernel_height(5) |
| 6703 | .kernel_width(5) |
| 6704 | .subsampling(1) |
| 6705 | .padding_left(2) |
| 6706 | .padding_right(2) |
| 6707 | .padding_top(2) |
| 6708 | .padding_bottom(2) |
| 6709 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2); |
| 6710 | } |
| 6711 | } |
| 6712 | } |
| 6713 | #endif // XNN_ARCH_ARM64 |
| 6714 | |
| 6715 | |
| 6716 | #if XNN_ARCH_ARM64 |
| 6717 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC3, output_width_eq_4) { |
| 6718 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6719 | DWConv2DMicrokernelTester() |
| 6720 | .input_width(4) |
| 6721 | .input_height(1) |
| 6722 | .kernel_height(5) |
| 6723 | .kernel_width(5) |
| 6724 | .subsampling(1) |
| 6725 | .padding_left(2) |
| 6726 | .padding_right(2) |
| 6727 | .padding_top(2) |
| 6728 | .padding_bottom(2) |
| 6729 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3); |
| 6730 | } |
| 6731 | |
| 6732 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC3, output_width_div_4) { |
| 6733 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6734 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 6735 | DWConv2DMicrokernelTester() |
| 6736 | .input_width(input_width) |
| 6737 | .input_height(1) |
| 6738 | .kernel_height(5) |
| 6739 | .kernel_width(5) |
| 6740 | .subsampling(1) |
| 6741 | .padding_left(2) |
| 6742 | .padding_right(2) |
| 6743 | .padding_top(2) |
| 6744 | .padding_bottom(2) |
| 6745 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3); |
| 6746 | } |
| 6747 | } |
| 6748 | |
| 6749 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC3, output_width_lt_4) { |
| 6750 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6751 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 6752 | DWConv2DMicrokernelTester() |
| 6753 | .input_width(4) |
| 6754 | .input_height(1) |
| 6755 | .kernel_height(5) |
| 6756 | .kernel_width(5) |
| 6757 | .subsampling(1) |
| 6758 | .padding_left(2) |
| 6759 | .padding_right(2) |
| 6760 | .padding_top(2) |
| 6761 | .padding_bottom(2) |
| 6762 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3); |
| 6763 | } |
| 6764 | } |
| 6765 | |
| 6766 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC3, output_width_gt_4) { |
| 6767 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6768 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 6769 | DWConv2DMicrokernelTester() |
| 6770 | .input_width(input_width) |
| 6771 | .input_height(1) |
| 6772 | .kernel_height(5) |
| 6773 | .kernel_width(5) |
| 6774 | .subsampling(1) |
| 6775 | .padding_left(2) |
| 6776 | .padding_right(2) |
| 6777 | .padding_top(2) |
| 6778 | .padding_bottom(2) |
| 6779 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3); |
| 6780 | } |
| 6781 | } |
| 6782 | |
| 6783 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC3, output_height_gt_1) { |
| 6784 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6785 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 6786 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6787 | DWConv2DMicrokernelTester() |
| 6788 | .input_width(input_width) |
| 6789 | .input_height(input_height) |
| 6790 | .kernel_height(5) |
| 6791 | .kernel_width(5) |
| 6792 | .subsampling(1) |
| 6793 | .padding_left(2) |
| 6794 | .padding_right(2) |
| 6795 | .padding_top(2) |
| 6796 | .padding_bottom(2) |
| 6797 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3); |
| 6798 | } |
| 6799 | } |
| 6800 | } |
| 6801 | #endif // XNN_ARCH_ARM64 |
| 6802 | |
| 6803 | |
| 6804 | #if XNN_ARCH_ARM64 |
| 6805 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC4, output_width_eq_4) { |
| 6806 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6807 | DWConv2DMicrokernelTester() |
| 6808 | .input_width(4) |
| 6809 | .input_height(1) |
| 6810 | .kernel_height(5) |
| 6811 | .kernel_width(5) |
| 6812 | .subsampling(1) |
| 6813 | .padding_left(2) |
| 6814 | .padding_right(2) |
| 6815 | .padding_top(2) |
| 6816 | .padding_bottom(2) |
| 6817 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4); |
| 6818 | } |
| 6819 | |
| 6820 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC4, output_width_div_4) { |
| 6821 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6822 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 6823 | DWConv2DMicrokernelTester() |
| 6824 | .input_width(input_width) |
| 6825 | .input_height(1) |
| 6826 | .kernel_height(5) |
| 6827 | .kernel_width(5) |
| 6828 | .subsampling(1) |
| 6829 | .padding_left(2) |
| 6830 | .padding_right(2) |
| 6831 | .padding_top(2) |
| 6832 | .padding_bottom(2) |
| 6833 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4); |
| 6834 | } |
| 6835 | } |
| 6836 | |
| 6837 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC4, output_width_lt_4) { |
| 6838 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6839 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 6840 | DWConv2DMicrokernelTester() |
| 6841 | .input_width(4) |
| 6842 | .input_height(1) |
| 6843 | .kernel_height(5) |
| 6844 | .kernel_width(5) |
| 6845 | .subsampling(1) |
| 6846 | .padding_left(2) |
| 6847 | .padding_right(2) |
| 6848 | .padding_top(2) |
| 6849 | .padding_bottom(2) |
| 6850 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4); |
| 6851 | } |
| 6852 | } |
| 6853 | |
| 6854 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC4, output_width_gt_4) { |
| 6855 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6856 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 6857 | DWConv2DMicrokernelTester() |
| 6858 | .input_width(input_width) |
| 6859 | .input_height(1) |
| 6860 | .kernel_height(5) |
| 6861 | .kernel_width(5) |
| 6862 | .subsampling(1) |
| 6863 | .padding_left(2) |
| 6864 | .padding_right(2) |
| 6865 | .padding_top(2) |
| 6866 | .padding_bottom(2) |
| 6867 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4); |
| 6868 | } |
| 6869 | } |
| 6870 | |
| 6871 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC4, output_height_gt_1) { |
| 6872 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6873 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 6874 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6875 | DWConv2DMicrokernelTester() |
| 6876 | .input_width(input_width) |
| 6877 | .input_height(input_height) |
| 6878 | .kernel_height(5) |
| 6879 | .kernel_width(5) |
| 6880 | .subsampling(1) |
| 6881 | .padding_left(2) |
| 6882 | .padding_right(2) |
| 6883 | .padding_top(2) |
| 6884 | .padding_bottom(2) |
| 6885 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4); |
| 6886 | } |
| 6887 | } |
| 6888 | } |
| 6889 | #endif // XNN_ARCH_ARM64 |
| 6890 | |
| 6891 | |
| 6892 | #if XNN_ARCH_ARM64 |
| 6893 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC5, output_width_eq_4) { |
| 6894 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6895 | DWConv2DMicrokernelTester() |
| 6896 | .input_width(4) |
| 6897 | .input_height(1) |
| 6898 | .kernel_height(5) |
| 6899 | .kernel_width(5) |
| 6900 | .subsampling(1) |
| 6901 | .padding_left(2) |
| 6902 | .padding_right(2) |
| 6903 | .padding_top(2) |
| 6904 | .padding_bottom(2) |
| 6905 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5); |
| 6906 | } |
| 6907 | |
| 6908 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC5, output_width_div_4) { |
| 6909 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6910 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 6911 | DWConv2DMicrokernelTester() |
| 6912 | .input_width(input_width) |
| 6913 | .input_height(1) |
| 6914 | .kernel_height(5) |
| 6915 | .kernel_width(5) |
| 6916 | .subsampling(1) |
| 6917 | .padding_left(2) |
| 6918 | .padding_right(2) |
| 6919 | .padding_top(2) |
| 6920 | .padding_bottom(2) |
| 6921 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5); |
| 6922 | } |
| 6923 | } |
| 6924 | |
| 6925 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC5, output_width_lt_4) { |
| 6926 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6927 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 6928 | DWConv2DMicrokernelTester() |
| 6929 | .input_width(4) |
| 6930 | .input_height(1) |
| 6931 | .kernel_height(5) |
| 6932 | .kernel_width(5) |
| 6933 | .subsampling(1) |
| 6934 | .padding_left(2) |
| 6935 | .padding_right(2) |
| 6936 | .padding_top(2) |
| 6937 | .padding_bottom(2) |
| 6938 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5); |
| 6939 | } |
| 6940 | } |
| 6941 | |
| 6942 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC5, output_width_gt_4) { |
| 6943 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6944 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 6945 | DWConv2DMicrokernelTester() |
| 6946 | .input_width(input_width) |
| 6947 | .input_height(1) |
| 6948 | .kernel_height(5) |
| 6949 | .kernel_width(5) |
| 6950 | .subsampling(1) |
| 6951 | .padding_left(2) |
| 6952 | .padding_right(2) |
| 6953 | .padding_top(2) |
| 6954 | .padding_bottom(2) |
| 6955 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5); |
| 6956 | } |
| 6957 | } |
| 6958 | |
| 6959 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_1X4_ACC5, output_height_gt_1) { |
| 6960 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6961 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 6962 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 6963 | DWConv2DMicrokernelTester() |
| 6964 | .input_width(input_width) |
| 6965 | .input_height(input_height) |
| 6966 | .kernel_height(5) |
| 6967 | .kernel_width(5) |
| 6968 | .subsampling(1) |
| 6969 | .padding_left(2) |
| 6970 | .padding_right(2) |
| 6971 | .padding_top(2) |
| 6972 | .padding_bottom(2) |
| 6973 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5); |
| 6974 | } |
| 6975 | } |
| 6976 | } |
| 6977 | #endif // XNN_ARCH_ARM64 |
| 6978 | |
| 6979 | |
| 6980 | #if XNN_ARCH_ARM64 |
| 6981 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC2, output_width_eq_4) { |
| 6982 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6983 | DWConv2DMicrokernelTester() |
| 6984 | .input_width(4) |
| 6985 | .input_height(2) |
| 6986 | .kernel_height(5) |
| 6987 | .kernel_width(5) |
| 6988 | .subsampling(1) |
| 6989 | .padding_left(2) |
| 6990 | .padding_right(2) |
| 6991 | .padding_top(2) |
| 6992 | .padding_bottom(2) |
| 6993 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc2); |
| 6994 | } |
| 6995 | |
| 6996 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC2, output_width_div_4) { |
| 6997 | TEST_REQUIRES_ARM_NEON_FMA; |
| 6998 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 6999 | DWConv2DMicrokernelTester() |
| 7000 | .input_width(input_width) |
| 7001 | .input_height(2) |
| 7002 | .kernel_height(5) |
| 7003 | .kernel_width(5) |
| 7004 | .subsampling(1) |
| 7005 | .padding_left(2) |
| 7006 | .padding_right(2) |
| 7007 | .padding_top(2) |
| 7008 | .padding_bottom(2) |
| 7009 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc2); |
| 7010 | } |
| 7011 | } |
| 7012 | |
| 7013 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC2, output_width_lt_4) { |
| 7014 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7015 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 7016 | DWConv2DMicrokernelTester() |
| 7017 | .input_width(4) |
| 7018 | .input_height(2) |
| 7019 | .kernel_height(5) |
| 7020 | .kernel_width(5) |
| 7021 | .subsampling(1) |
| 7022 | .padding_left(2) |
| 7023 | .padding_right(2) |
| 7024 | .padding_top(2) |
| 7025 | .padding_bottom(2) |
| 7026 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc2); |
| 7027 | } |
| 7028 | } |
| 7029 | |
| 7030 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC2, output_width_gt_4) { |
| 7031 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7032 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 7033 | DWConv2DMicrokernelTester() |
| 7034 | .input_width(input_width) |
| 7035 | .input_height(2) |
| 7036 | .kernel_height(5) |
| 7037 | .kernel_width(5) |
| 7038 | .subsampling(1) |
| 7039 | .padding_left(2) |
| 7040 | .padding_right(2) |
| 7041 | .padding_top(2) |
| 7042 | .padding_bottom(2) |
| 7043 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc2); |
| 7044 | } |
| 7045 | } |
| 7046 | |
| 7047 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC2, output_height_div_2) { |
| 7048 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7049 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 7050 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 7051 | DWConv2DMicrokernelTester() |
| 7052 | .input_width(input_width) |
| 7053 | .input_height(input_height) |
| 7054 | .kernel_height(5) |
| 7055 | .kernel_width(5) |
| 7056 | .subsampling(1) |
| 7057 | .padding_left(2) |
| 7058 | .padding_right(2) |
| 7059 | .padding_top(2) |
| 7060 | .padding_bottom(2) |
| 7061 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc2); |
| 7062 | } |
| 7063 | } |
| 7064 | } |
| 7065 | |
| 7066 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC2, output_height_lt_2) { |
| 7067 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7068 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 7069 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 7070 | DWConv2DMicrokernelTester() |
| 7071 | .input_width(input_width) |
| 7072 | .input_height(input_height) |
| 7073 | .kernel_height(5) |
| 7074 | .kernel_width(5) |
| 7075 | .subsampling(1) |
| 7076 | .padding_left(2) |
| 7077 | .padding_right(2) |
| 7078 | .padding_top(2) |
| 7079 | .padding_bottom(2) |
| 7080 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc2); |
| 7081 | } |
| 7082 | } |
| 7083 | } |
| 7084 | |
| 7085 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC2, output_height_gt_2) { |
| 7086 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7087 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 7088 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 7089 | DWConv2DMicrokernelTester() |
| 7090 | .input_width(input_width) |
| 7091 | .input_height(input_height) |
| 7092 | .kernel_height(5) |
| 7093 | .kernel_width(5) |
| 7094 | .subsampling(1) |
| 7095 | .padding_left(2) |
| 7096 | .padding_right(2) |
| 7097 | .padding_top(2) |
| 7098 | .padding_bottom(2) |
| 7099 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc2); |
| 7100 | } |
| 7101 | } |
| 7102 | } |
| 7103 | #endif // XNN_ARCH_ARM64 |
| 7104 | |
| 7105 | |
| 7106 | #if XNN_ARCH_ARM64 |
| 7107 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC3, output_width_eq_4) { |
| 7108 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7109 | DWConv2DMicrokernelTester() |
| 7110 | .input_width(4) |
| 7111 | .input_height(2) |
| 7112 | .kernel_height(5) |
| 7113 | .kernel_width(5) |
| 7114 | .subsampling(1) |
| 7115 | .padding_left(2) |
| 7116 | .padding_right(2) |
| 7117 | .padding_top(2) |
| 7118 | .padding_bottom(2) |
| 7119 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc3); |
| 7120 | } |
| 7121 | |
| 7122 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC3, output_width_div_4) { |
| 7123 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7124 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 7125 | DWConv2DMicrokernelTester() |
| 7126 | .input_width(input_width) |
| 7127 | .input_height(2) |
| 7128 | .kernel_height(5) |
| 7129 | .kernel_width(5) |
| 7130 | .subsampling(1) |
| 7131 | .padding_left(2) |
| 7132 | .padding_right(2) |
| 7133 | .padding_top(2) |
| 7134 | .padding_bottom(2) |
| 7135 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc3); |
| 7136 | } |
| 7137 | } |
| 7138 | |
| 7139 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC3, output_width_lt_4) { |
| 7140 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7141 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 7142 | DWConv2DMicrokernelTester() |
| 7143 | .input_width(4) |
| 7144 | .input_height(2) |
| 7145 | .kernel_height(5) |
| 7146 | .kernel_width(5) |
| 7147 | .subsampling(1) |
| 7148 | .padding_left(2) |
| 7149 | .padding_right(2) |
| 7150 | .padding_top(2) |
| 7151 | .padding_bottom(2) |
| 7152 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc3); |
| 7153 | } |
| 7154 | } |
| 7155 | |
| 7156 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC3, output_width_gt_4) { |
| 7157 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7158 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 7159 | DWConv2DMicrokernelTester() |
| 7160 | .input_width(input_width) |
| 7161 | .input_height(2) |
| 7162 | .kernel_height(5) |
| 7163 | .kernel_width(5) |
| 7164 | .subsampling(1) |
| 7165 | .padding_left(2) |
| 7166 | .padding_right(2) |
| 7167 | .padding_top(2) |
| 7168 | .padding_bottom(2) |
| 7169 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc3); |
| 7170 | } |
| 7171 | } |
| 7172 | |
| 7173 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC3, output_height_div_2) { |
| 7174 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7175 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 7176 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 7177 | DWConv2DMicrokernelTester() |
| 7178 | .input_width(input_width) |
| 7179 | .input_height(input_height) |
| 7180 | .kernel_height(5) |
| 7181 | .kernel_width(5) |
| 7182 | .subsampling(1) |
| 7183 | .padding_left(2) |
| 7184 | .padding_right(2) |
| 7185 | .padding_top(2) |
| 7186 | .padding_bottom(2) |
| 7187 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc3); |
| 7188 | } |
| 7189 | } |
| 7190 | } |
| 7191 | |
| 7192 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC3, output_height_lt_2) { |
| 7193 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7194 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 7195 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 7196 | DWConv2DMicrokernelTester() |
| 7197 | .input_width(input_width) |
| 7198 | .input_height(input_height) |
| 7199 | .kernel_height(5) |
| 7200 | .kernel_width(5) |
| 7201 | .subsampling(1) |
| 7202 | .padding_left(2) |
| 7203 | .padding_right(2) |
| 7204 | .padding_top(2) |
| 7205 | .padding_bottom(2) |
| 7206 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc3); |
| 7207 | } |
| 7208 | } |
| 7209 | } |
| 7210 | |
| 7211 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_2X4_ACC3, output_height_gt_2) { |
| 7212 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7213 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 7214 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 7215 | DWConv2DMicrokernelTester() |
| 7216 | .input_width(input_width) |
| 7217 | .input_height(input_height) |
| 7218 | .kernel_height(5) |
| 7219 | .kernel_width(5) |
| 7220 | .subsampling(1) |
| 7221 | .padding_left(2) |
| 7222 | .padding_right(2) |
| 7223 | .padding_top(2) |
| 7224 | .padding_bottom(2) |
| 7225 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc3); |
| 7226 | } |
| 7227 | } |
| 7228 | } |
| 7229 | #endif // XNN_ARCH_ARM64 |
| 7230 | |
| 7231 | |
| 7232 | #if XNN_ARCH_ARM64 |
| 7233 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4_ACC2, output_width_eq_4) { |
| 7234 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7235 | DWConv2DMicrokernelTester() |
| 7236 | .input_width(4) |
| 7237 | .input_height(3) |
| 7238 | .kernel_height(5) |
| 7239 | .kernel_width(5) |
| 7240 | .subsampling(1) |
| 7241 | .padding_left(2) |
| 7242 | .padding_right(2) |
| 7243 | .padding_top(2) |
| 7244 | .padding_bottom(2) |
| 7245 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4_acc2); |
| 7246 | } |
| 7247 | |
| 7248 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4_ACC2, output_width_div_4) { |
| 7249 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7250 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 7251 | DWConv2DMicrokernelTester() |
| 7252 | .input_width(input_width) |
| 7253 | .input_height(3) |
| 7254 | .kernel_height(5) |
| 7255 | .kernel_width(5) |
| 7256 | .subsampling(1) |
| 7257 | .padding_left(2) |
| 7258 | .padding_right(2) |
| 7259 | .padding_top(2) |
| 7260 | .padding_bottom(2) |
| 7261 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4_acc2); |
| 7262 | } |
| 7263 | } |
| 7264 | |
| 7265 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4_ACC2, output_width_lt_4) { |
| 7266 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7267 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 7268 | DWConv2DMicrokernelTester() |
| 7269 | .input_width(4) |
| 7270 | .input_height(3) |
| 7271 | .kernel_height(5) |
| 7272 | .kernel_width(5) |
| 7273 | .subsampling(1) |
| 7274 | .padding_left(2) |
| 7275 | .padding_right(2) |
| 7276 | .padding_top(2) |
| 7277 | .padding_bottom(2) |
| 7278 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4_acc2); |
| 7279 | } |
| 7280 | } |
| 7281 | |
| 7282 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4_ACC2, output_width_gt_4) { |
| 7283 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7284 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 7285 | DWConv2DMicrokernelTester() |
| 7286 | .input_width(input_width) |
| 7287 | .input_height(3) |
| 7288 | .kernel_height(5) |
| 7289 | .kernel_width(5) |
| 7290 | .subsampling(1) |
| 7291 | .padding_left(2) |
| 7292 | .padding_right(2) |
| 7293 | .padding_top(2) |
| 7294 | .padding_bottom(2) |
| 7295 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4_acc2); |
| 7296 | } |
| 7297 | } |
| 7298 | |
| 7299 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4_ACC2, output_height_div_3) { |
| 7300 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7301 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 7302 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 7303 | DWConv2DMicrokernelTester() |
| 7304 | .input_width(input_width) |
| 7305 | .input_height(input_height) |
| 7306 | .kernel_height(5) |
| 7307 | .kernel_width(5) |
| 7308 | .subsampling(1) |
| 7309 | .padding_left(2) |
| 7310 | .padding_right(2) |
| 7311 | .padding_top(2) |
| 7312 | .padding_bottom(2) |
| 7313 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4_acc2); |
| 7314 | } |
| 7315 | } |
| 7316 | } |
| 7317 | |
| 7318 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4_ACC2, output_height_lt_3) { |
| 7319 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7320 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 7321 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 7322 | DWConv2DMicrokernelTester() |
| 7323 | .input_width(input_width) |
| 7324 | .input_height(input_height) |
| 7325 | .kernel_height(5) |
| 7326 | .kernel_width(5) |
| 7327 | .subsampling(1) |
| 7328 | .padding_left(2) |
| 7329 | .padding_right(2) |
| 7330 | .padding_top(2) |
| 7331 | .padding_bottom(2) |
| 7332 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4_acc2); |
| 7333 | } |
| 7334 | } |
| 7335 | } |
| 7336 | |
| 7337 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_3X4_ACC2, output_height_gt_3) { |
| 7338 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7339 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 7340 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 7341 | DWConv2DMicrokernelTester() |
| 7342 | .input_width(input_width) |
| 7343 | .input_height(input_height) |
| 7344 | .kernel_height(5) |
| 7345 | .kernel_width(5) |
| 7346 | .subsampling(1) |
| 7347 | .padding_left(2) |
| 7348 | .padding_right(2) |
| 7349 | .padding_top(2) |
| 7350 | .padding_bottom(2) |
| 7351 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4_acc2); |
| 7352 | } |
| 7353 | } |
| 7354 | } |
| 7355 | #endif // XNN_ARCH_ARM64 |
| 7356 | |
| 7357 | |
| 7358 | #if XNN_ARCH_ARM64 |
| 7359 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4_ACC2, output_width_eq_4) { |
| 7360 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7361 | DWConv2DMicrokernelTester() |
| 7362 | .input_width(4) |
| 7363 | .input_height(4) |
| 7364 | .kernel_height(5) |
| 7365 | .kernel_width(5) |
| 7366 | .subsampling(1) |
| 7367 | .padding_left(2) |
| 7368 | .padding_right(2) |
| 7369 | .padding_top(2) |
| 7370 | .padding_bottom(2) |
| 7371 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4_acc2); |
| 7372 | } |
| 7373 | |
| 7374 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4_ACC2, output_width_div_4) { |
| 7375 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7376 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 7377 | DWConv2DMicrokernelTester() |
| 7378 | .input_width(input_width) |
| 7379 | .input_height(4) |
| 7380 | .kernel_height(5) |
| 7381 | .kernel_width(5) |
| 7382 | .subsampling(1) |
| 7383 | .padding_left(2) |
| 7384 | .padding_right(2) |
| 7385 | .padding_top(2) |
| 7386 | .padding_bottom(2) |
| 7387 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4_acc2); |
| 7388 | } |
| 7389 | } |
| 7390 | |
| 7391 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4_ACC2, output_width_lt_4) { |
| 7392 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7393 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 7394 | DWConv2DMicrokernelTester() |
| 7395 | .input_width(4) |
| 7396 | .input_height(4) |
| 7397 | .kernel_height(5) |
| 7398 | .kernel_width(5) |
| 7399 | .subsampling(1) |
| 7400 | .padding_left(2) |
| 7401 | .padding_right(2) |
| 7402 | .padding_top(2) |
| 7403 | .padding_bottom(2) |
| 7404 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4_acc2); |
| 7405 | } |
| 7406 | } |
| 7407 | |
| 7408 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4_ACC2, output_width_gt_4) { |
| 7409 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7410 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 7411 | DWConv2DMicrokernelTester() |
| 7412 | .input_width(input_width) |
| 7413 | .input_height(4) |
| 7414 | .kernel_height(5) |
| 7415 | .kernel_width(5) |
| 7416 | .subsampling(1) |
| 7417 | .padding_left(2) |
| 7418 | .padding_right(2) |
| 7419 | .padding_top(2) |
| 7420 | .padding_bottom(2) |
| 7421 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4_acc2); |
| 7422 | } |
| 7423 | } |
| 7424 | |
| 7425 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4_ACC2, output_height_div_4) { |
| 7426 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7427 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 7428 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 7429 | DWConv2DMicrokernelTester() |
| 7430 | .input_width(input_width) |
| 7431 | .input_height(input_height) |
| 7432 | .kernel_height(5) |
| 7433 | .kernel_width(5) |
| 7434 | .subsampling(1) |
| 7435 | .padding_left(2) |
| 7436 | .padding_right(2) |
| 7437 | .padding_top(2) |
| 7438 | .padding_bottom(2) |
| 7439 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4_acc2); |
| 7440 | } |
| 7441 | } |
| 7442 | } |
| 7443 | |
| 7444 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4_ACC2, output_height_lt_4) { |
| 7445 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7446 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 7447 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 7448 | DWConv2DMicrokernelTester() |
| 7449 | .input_width(input_width) |
| 7450 | .input_height(input_height) |
| 7451 | .kernel_height(5) |
| 7452 | .kernel_width(5) |
| 7453 | .subsampling(1) |
| 7454 | .padding_left(2) |
| 7455 | .padding_right(2) |
| 7456 | .padding_top(2) |
| 7457 | .padding_bottom(2) |
| 7458 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4_acc2); |
| 7459 | } |
| 7460 | } |
| 7461 | } |
| 7462 | |
| 7463 | TEST(F32_DWCONV2D_CHW_5X5P2__NEONFMA_4X4_ACC2, output_height_gt_4) { |
| 7464 | TEST_REQUIRES_ARM_NEON_FMA; |
| 7465 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 7466 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 7467 | DWConv2DMicrokernelTester() |
| 7468 | .input_width(input_width) |
| 7469 | .input_height(input_height) |
| 7470 | .kernel_height(5) |
| 7471 | .kernel_width(5) |
| 7472 | .subsampling(1) |
| 7473 | .padding_left(2) |
| 7474 | .padding_right(2) |
| 7475 | .padding_top(2) |
| 7476 | .padding_bottom(2) |
| 7477 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4_acc2); |
| 7478 | } |
| 7479 | } |
| 7480 | } |
| 7481 | #endif // XNN_ARCH_ARM64 |
| 7482 | |
| 7483 | |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 7484 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 7485 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4, output_width_eq_4) { |
| 7486 | TEST_REQUIRES_ARM_NEON; |
| 7487 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 7488 | DWConv2DMicrokernelTester() |
| 7489 | .input_width(input_width) |
| 7490 | .input_height(2) |
| 7491 | .kernel_height(5) |
| 7492 | .kernel_width(5) |
| 7493 | .subsampling(2) |
| 7494 | .padding_left(2) |
| 7495 | .padding_right(2) |
| 7496 | .padding_top(2) |
| 7497 | .padding_bottom(2) |
| 7498 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4); |
| 7499 | } |
| 7500 | } |
| 7501 | |
| 7502 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4, output_width_div_4) { |
| 7503 | TEST_REQUIRES_ARM_NEON; |
| 7504 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 7505 | DWConv2DMicrokernelTester() |
| 7506 | .input_width(input_width) |
| 7507 | .input_height(2) |
| 7508 | .kernel_height(5) |
| 7509 | .kernel_width(5) |
| 7510 | .subsampling(2) |
| 7511 | .padding_left(2) |
| 7512 | .padding_right(2) |
| 7513 | .padding_top(2) |
| 7514 | .padding_bottom(2) |
| 7515 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4); |
| 7516 | } |
| 7517 | } |
| 7518 | |
| 7519 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4, output_width_lt_4) { |
| 7520 | TEST_REQUIRES_ARM_NEON; |
| 7521 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 7522 | DWConv2DMicrokernelTester() |
| 7523 | .input_width(8) |
| 7524 | .input_height(2) |
| 7525 | .kernel_height(5) |
| 7526 | .kernel_width(5) |
| 7527 | .subsampling(2) |
| 7528 | .padding_left(2) |
| 7529 | .padding_right(2) |
| 7530 | .padding_top(2) |
| 7531 | .padding_bottom(2) |
| 7532 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4); |
| 7533 | } |
| 7534 | } |
| 7535 | |
| 7536 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4, output_width_gt_4) { |
| 7537 | TEST_REQUIRES_ARM_NEON; |
| 7538 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 7539 | DWConv2DMicrokernelTester() |
| 7540 | .input_width(input_width) |
| 7541 | .input_height(2) |
| 7542 | .kernel_height(5) |
| 7543 | .kernel_width(5) |
| 7544 | .subsampling(2) |
| 7545 | .padding_left(2) |
| 7546 | .padding_right(2) |
| 7547 | .padding_top(2) |
| 7548 | .padding_bottom(2) |
| 7549 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4); |
| 7550 | } |
| 7551 | } |
| 7552 | |
| 7553 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4, output_height_eq_1) { |
| 7554 | TEST_REQUIRES_ARM_NEON; |
| 7555 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 7556 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 7557 | DWConv2DMicrokernelTester() |
| 7558 | .input_width(input_width) |
| 7559 | .input_height(input_height) |
| 7560 | .kernel_height(5) |
| 7561 | .kernel_width(5) |
| 7562 | .subsampling(2) |
| 7563 | .padding_left(2) |
| 7564 | .padding_right(2) |
| 7565 | .padding_top(2) |
| 7566 | .padding_bottom(2) |
| 7567 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4); |
| 7568 | } |
| 7569 | } |
| 7570 | } |
| 7571 | |
| 7572 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4, output_height_gt_1) { |
| 7573 | TEST_REQUIRES_ARM_NEON; |
| 7574 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 7575 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 7576 | DWConv2DMicrokernelTester() |
| 7577 | .input_width(input_width) |
| 7578 | .input_height(input_height) |
| 7579 | .kernel_height(5) |
| 7580 | .kernel_width(5) |
| 7581 | .subsampling(2) |
| 7582 | .padding_left(2) |
| 7583 | .padding_right(2) |
| 7584 | .padding_top(2) |
| 7585 | .padding_bottom(2) |
| 7586 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4); |
| 7587 | } |
| 7588 | } |
| 7589 | } |
| 7590 | |
| 7591 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4, padding_top_eq_1) { |
| 7592 | TEST_REQUIRES_ARM_NEON; |
| 7593 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 7594 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 7595 | DWConv2DMicrokernelTester() |
| 7596 | .input_width(input_width) |
| 7597 | .input_height(input_height) |
| 7598 | .kernel_height(5) |
| 7599 | .kernel_width(5) |
| 7600 | .subsampling(2) |
| 7601 | .padding_left(2) |
| 7602 | .padding_right(2) |
| 7603 | .padding_top(1) |
| 7604 | .padding_bottom(2) |
| 7605 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4); |
| 7606 | } |
| 7607 | } |
| 7608 | } |
| 7609 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 7610 | |
| 7611 | |
| 7612 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 7613 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4, output_width_eq_4) { |
| 7614 | TEST_REQUIRES_ARM_NEON; |
| 7615 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 7616 | DWConv2DMicrokernelTester() |
| 7617 | .input_width(input_width) |
| 7618 | .input_height(4) |
| 7619 | .kernel_height(5) |
| 7620 | .kernel_width(5) |
| 7621 | .subsampling(2) |
| 7622 | .padding_left(2) |
| 7623 | .padding_right(2) |
| 7624 | .padding_top(2) |
| 7625 | .padding_bottom(2) |
| 7626 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4); |
| 7627 | } |
| 7628 | } |
| 7629 | |
| 7630 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4, output_width_div_4) { |
| 7631 | TEST_REQUIRES_ARM_NEON; |
| 7632 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 7633 | DWConv2DMicrokernelTester() |
| 7634 | .input_width(input_width) |
| 7635 | .input_height(4) |
| 7636 | .kernel_height(5) |
| 7637 | .kernel_width(5) |
| 7638 | .subsampling(2) |
| 7639 | .padding_left(2) |
| 7640 | .padding_right(2) |
| 7641 | .padding_top(2) |
| 7642 | .padding_bottom(2) |
| 7643 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4); |
| 7644 | } |
| 7645 | } |
| 7646 | |
| 7647 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4, output_width_lt_4) { |
| 7648 | TEST_REQUIRES_ARM_NEON; |
| 7649 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 7650 | DWConv2DMicrokernelTester() |
| 7651 | .input_width(8) |
| 7652 | .input_height(4) |
| 7653 | .kernel_height(5) |
| 7654 | .kernel_width(5) |
| 7655 | .subsampling(2) |
| 7656 | .padding_left(2) |
| 7657 | .padding_right(2) |
| 7658 | .padding_top(2) |
| 7659 | .padding_bottom(2) |
| 7660 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4); |
| 7661 | } |
| 7662 | } |
| 7663 | |
| 7664 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4, output_width_gt_4) { |
| 7665 | TEST_REQUIRES_ARM_NEON; |
| 7666 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 7667 | DWConv2DMicrokernelTester() |
| 7668 | .input_width(input_width) |
| 7669 | .input_height(4) |
| 7670 | .kernel_height(5) |
| 7671 | .kernel_width(5) |
| 7672 | .subsampling(2) |
| 7673 | .padding_left(2) |
| 7674 | .padding_right(2) |
| 7675 | .padding_top(2) |
| 7676 | .padding_bottom(2) |
| 7677 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4); |
| 7678 | } |
| 7679 | } |
| 7680 | |
| 7681 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4, output_height_eq_2) { |
| 7682 | TEST_REQUIRES_ARM_NEON; |
| 7683 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 7684 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 7685 | DWConv2DMicrokernelTester() |
| 7686 | .input_width(input_width) |
| 7687 | .input_height(input_height) |
| 7688 | .kernel_height(5) |
| 7689 | .kernel_width(5) |
| 7690 | .subsampling(2) |
| 7691 | .padding_left(2) |
| 7692 | .padding_right(2) |
| 7693 | .padding_top(2) |
| 7694 | .padding_bottom(2) |
| 7695 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4); |
| 7696 | } |
| 7697 | } |
| 7698 | } |
| 7699 | |
| 7700 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4, output_height_div_2) { |
| 7701 | TEST_REQUIRES_ARM_NEON; |
| 7702 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 7703 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 7704 | DWConv2DMicrokernelTester() |
| 7705 | .input_width(input_width) |
| 7706 | .input_height(input_height) |
| 7707 | .kernel_height(5) |
| 7708 | .kernel_width(5) |
| 7709 | .subsampling(2) |
| 7710 | .padding_left(2) |
| 7711 | .padding_right(2) |
| 7712 | .padding_top(2) |
| 7713 | .padding_bottom(2) |
| 7714 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4); |
| 7715 | } |
| 7716 | } |
| 7717 | } |
| 7718 | |
| 7719 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4, output_height_lt_2) { |
| 7720 | TEST_REQUIRES_ARM_NEON; |
| 7721 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 7722 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 7723 | DWConv2DMicrokernelTester() |
| 7724 | .input_width(input_width) |
| 7725 | .input_height(input_height) |
| 7726 | .kernel_height(5) |
| 7727 | .kernel_width(5) |
| 7728 | .subsampling(2) |
| 7729 | .padding_left(2) |
| 7730 | .padding_right(2) |
| 7731 | .padding_top(2) |
| 7732 | .padding_bottom(2) |
| 7733 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4); |
| 7734 | } |
| 7735 | } |
| 7736 | } |
| 7737 | |
| 7738 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4, output_height_gt_2) { |
| 7739 | TEST_REQUIRES_ARM_NEON; |
| 7740 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 7741 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 7742 | DWConv2DMicrokernelTester() |
| 7743 | .input_width(input_width) |
| 7744 | .input_height(input_height) |
| 7745 | .kernel_height(5) |
| 7746 | .kernel_width(5) |
| 7747 | .subsampling(2) |
| 7748 | .padding_left(2) |
| 7749 | .padding_right(2) |
| 7750 | .padding_top(2) |
| 7751 | .padding_bottom(2) |
| 7752 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4); |
| 7753 | } |
| 7754 | } |
| 7755 | } |
| 7756 | |
| 7757 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4, padding_top_eq_1) { |
| 7758 | TEST_REQUIRES_ARM_NEON; |
| 7759 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 7760 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 7761 | DWConv2DMicrokernelTester() |
| 7762 | .input_width(input_width) |
| 7763 | .input_height(input_height) |
| 7764 | .kernel_height(5) |
| 7765 | .kernel_width(5) |
| 7766 | .subsampling(2) |
| 7767 | .padding_left(2) |
| 7768 | .padding_right(2) |
| 7769 | .padding_top(1) |
| 7770 | .padding_bottom(2) |
| 7771 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4); |
| 7772 | } |
| 7773 | } |
| 7774 | } |
| 7775 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 7776 | |
| 7777 | |
| 7778 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 7779 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4, output_width_eq_4) { |
| 7780 | TEST_REQUIRES_ARM_NEON; |
| 7781 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 7782 | DWConv2DMicrokernelTester() |
| 7783 | .input_width(input_width) |
| 7784 | .input_height(6) |
| 7785 | .kernel_height(5) |
| 7786 | .kernel_width(5) |
| 7787 | .subsampling(2) |
| 7788 | .padding_left(2) |
| 7789 | .padding_right(2) |
| 7790 | .padding_top(2) |
| 7791 | .padding_bottom(2) |
| 7792 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4); |
| 7793 | } |
| 7794 | } |
| 7795 | |
| 7796 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4, output_width_div_4) { |
| 7797 | TEST_REQUIRES_ARM_NEON; |
| 7798 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 7799 | DWConv2DMicrokernelTester() |
| 7800 | .input_width(input_width) |
| 7801 | .input_height(6) |
| 7802 | .kernel_height(5) |
| 7803 | .kernel_width(5) |
| 7804 | .subsampling(2) |
| 7805 | .padding_left(2) |
| 7806 | .padding_right(2) |
| 7807 | .padding_top(2) |
| 7808 | .padding_bottom(2) |
| 7809 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4); |
| 7810 | } |
| 7811 | } |
| 7812 | |
| 7813 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4, output_width_lt_4) { |
| 7814 | TEST_REQUIRES_ARM_NEON; |
| 7815 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 7816 | DWConv2DMicrokernelTester() |
| 7817 | .input_width(8) |
| 7818 | .input_height(6) |
| 7819 | .kernel_height(5) |
| 7820 | .kernel_width(5) |
| 7821 | .subsampling(2) |
| 7822 | .padding_left(2) |
| 7823 | .padding_right(2) |
| 7824 | .padding_top(2) |
| 7825 | .padding_bottom(2) |
| 7826 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4); |
| 7827 | } |
| 7828 | } |
| 7829 | |
| 7830 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4, output_width_gt_4) { |
| 7831 | TEST_REQUIRES_ARM_NEON; |
| 7832 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 7833 | DWConv2DMicrokernelTester() |
| 7834 | .input_width(input_width) |
| 7835 | .input_height(6) |
| 7836 | .kernel_height(5) |
| 7837 | .kernel_width(5) |
| 7838 | .subsampling(2) |
| 7839 | .padding_left(2) |
| 7840 | .padding_right(2) |
| 7841 | .padding_top(2) |
| 7842 | .padding_bottom(2) |
| 7843 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4); |
| 7844 | } |
| 7845 | } |
| 7846 | |
| 7847 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4, output_height_eq_3) { |
| 7848 | TEST_REQUIRES_ARM_NEON; |
| 7849 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 7850 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 7851 | DWConv2DMicrokernelTester() |
| 7852 | .input_width(input_width) |
| 7853 | .input_height(input_height) |
| 7854 | .kernel_height(5) |
| 7855 | .kernel_width(5) |
| 7856 | .subsampling(2) |
| 7857 | .padding_left(2) |
| 7858 | .padding_right(2) |
| 7859 | .padding_top(2) |
| 7860 | .padding_bottom(2) |
| 7861 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4); |
| 7862 | } |
| 7863 | } |
| 7864 | } |
| 7865 | |
| 7866 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4, output_height_div_3) { |
| 7867 | TEST_REQUIRES_ARM_NEON; |
| 7868 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 7869 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 7870 | DWConv2DMicrokernelTester() |
| 7871 | .input_width(input_width) |
| 7872 | .input_height(input_height) |
| 7873 | .kernel_height(5) |
| 7874 | .kernel_width(5) |
| 7875 | .subsampling(2) |
| 7876 | .padding_left(2) |
| 7877 | .padding_right(2) |
| 7878 | .padding_top(2) |
| 7879 | .padding_bottom(2) |
| 7880 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4); |
| 7881 | } |
| 7882 | } |
| 7883 | } |
| 7884 | |
| 7885 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4, output_height_lt_3) { |
| 7886 | TEST_REQUIRES_ARM_NEON; |
| 7887 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 7888 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 7889 | DWConv2DMicrokernelTester() |
| 7890 | .input_width(input_width) |
| 7891 | .input_height(input_height) |
| 7892 | .kernel_height(5) |
| 7893 | .kernel_width(5) |
| 7894 | .subsampling(2) |
| 7895 | .padding_left(2) |
| 7896 | .padding_right(2) |
| 7897 | .padding_top(2) |
| 7898 | .padding_bottom(2) |
| 7899 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4); |
| 7900 | } |
| 7901 | } |
| 7902 | } |
| 7903 | |
| 7904 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4, output_height_gt_3) { |
| 7905 | TEST_REQUIRES_ARM_NEON; |
| 7906 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 7907 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 7908 | DWConv2DMicrokernelTester() |
| 7909 | .input_width(input_width) |
| 7910 | .input_height(input_height) |
| 7911 | .kernel_height(5) |
| 7912 | .kernel_width(5) |
| 7913 | .subsampling(2) |
| 7914 | .padding_left(2) |
| 7915 | .padding_right(2) |
| 7916 | .padding_top(2) |
| 7917 | .padding_bottom(2) |
| 7918 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4); |
| 7919 | } |
| 7920 | } |
| 7921 | } |
| 7922 | |
| 7923 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4, padding_top_eq_1) { |
| 7924 | TEST_REQUIRES_ARM_NEON; |
| 7925 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 7926 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 7927 | DWConv2DMicrokernelTester() |
| 7928 | .input_width(input_width) |
| 7929 | .input_height(input_height) |
| 7930 | .kernel_height(5) |
| 7931 | .kernel_width(5) |
| 7932 | .subsampling(2) |
| 7933 | .padding_left(2) |
| 7934 | .padding_right(2) |
| 7935 | .padding_top(1) |
| 7936 | .padding_bottom(2) |
| 7937 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4); |
| 7938 | } |
| 7939 | } |
| 7940 | } |
| 7941 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 7942 | |
| 7943 | |
| 7944 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 7945 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC2, output_width_eq_4) { |
| 7946 | TEST_REQUIRES_ARM_NEON; |
| 7947 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 7948 | DWConv2DMicrokernelTester() |
| 7949 | .input_width(input_width) |
| 7950 | .input_height(2) |
| 7951 | .kernel_height(5) |
| 7952 | .kernel_width(5) |
| 7953 | .subsampling(2) |
| 7954 | .padding_left(2) |
| 7955 | .padding_right(2) |
| 7956 | .padding_top(2) |
| 7957 | .padding_bottom(2) |
| 7958 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc2); |
| 7959 | } |
| 7960 | } |
| 7961 | |
| 7962 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC2, output_width_div_4) { |
| 7963 | TEST_REQUIRES_ARM_NEON; |
| 7964 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 7965 | DWConv2DMicrokernelTester() |
| 7966 | .input_width(input_width) |
| 7967 | .input_height(2) |
| 7968 | .kernel_height(5) |
| 7969 | .kernel_width(5) |
| 7970 | .subsampling(2) |
| 7971 | .padding_left(2) |
| 7972 | .padding_right(2) |
| 7973 | .padding_top(2) |
| 7974 | .padding_bottom(2) |
| 7975 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc2); |
| 7976 | } |
| 7977 | } |
| 7978 | |
| 7979 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC2, output_width_lt_4) { |
| 7980 | TEST_REQUIRES_ARM_NEON; |
| 7981 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 7982 | DWConv2DMicrokernelTester() |
| 7983 | .input_width(8) |
| 7984 | .input_height(2) |
| 7985 | .kernel_height(5) |
| 7986 | .kernel_width(5) |
| 7987 | .subsampling(2) |
| 7988 | .padding_left(2) |
| 7989 | .padding_right(2) |
| 7990 | .padding_top(2) |
| 7991 | .padding_bottom(2) |
| 7992 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc2); |
| 7993 | } |
| 7994 | } |
| 7995 | |
| 7996 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC2, output_width_gt_4) { |
| 7997 | TEST_REQUIRES_ARM_NEON; |
| 7998 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 7999 | DWConv2DMicrokernelTester() |
| 8000 | .input_width(input_width) |
| 8001 | .input_height(2) |
| 8002 | .kernel_height(5) |
| 8003 | .kernel_width(5) |
| 8004 | .subsampling(2) |
| 8005 | .padding_left(2) |
| 8006 | .padding_right(2) |
| 8007 | .padding_top(2) |
| 8008 | .padding_bottom(2) |
| 8009 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc2); |
| 8010 | } |
| 8011 | } |
| 8012 | |
| 8013 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC2, output_height_eq_1) { |
| 8014 | TEST_REQUIRES_ARM_NEON; |
| 8015 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 8016 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8017 | DWConv2DMicrokernelTester() |
| 8018 | .input_width(input_width) |
| 8019 | .input_height(input_height) |
| 8020 | .kernel_height(5) |
| 8021 | .kernel_width(5) |
| 8022 | .subsampling(2) |
| 8023 | .padding_left(2) |
| 8024 | .padding_right(2) |
| 8025 | .padding_top(2) |
| 8026 | .padding_bottom(2) |
| 8027 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc2); |
| 8028 | } |
| 8029 | } |
| 8030 | } |
| 8031 | |
| 8032 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC2, output_height_gt_1) { |
| 8033 | TEST_REQUIRES_ARM_NEON; |
| 8034 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 8035 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8036 | DWConv2DMicrokernelTester() |
| 8037 | .input_width(input_width) |
| 8038 | .input_height(input_height) |
| 8039 | .kernel_height(5) |
| 8040 | .kernel_width(5) |
| 8041 | .subsampling(2) |
| 8042 | .padding_left(2) |
| 8043 | .padding_right(2) |
| 8044 | .padding_top(2) |
| 8045 | .padding_bottom(2) |
| 8046 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc2); |
| 8047 | } |
| 8048 | } |
| 8049 | } |
| 8050 | |
| 8051 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC2, padding_top_eq_1) { |
| 8052 | TEST_REQUIRES_ARM_NEON; |
| 8053 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 8054 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8055 | DWConv2DMicrokernelTester() |
| 8056 | .input_width(input_width) |
| 8057 | .input_height(input_height) |
| 8058 | .kernel_height(5) |
| 8059 | .kernel_width(5) |
| 8060 | .subsampling(2) |
| 8061 | .padding_left(2) |
| 8062 | .padding_right(2) |
| 8063 | .padding_top(1) |
| 8064 | .padding_bottom(2) |
| 8065 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc2); |
| 8066 | } |
| 8067 | } |
| 8068 | } |
| 8069 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 8070 | |
| 8071 | |
| 8072 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 8073 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC3, output_width_eq_4) { |
| 8074 | TEST_REQUIRES_ARM_NEON; |
| 8075 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 8076 | DWConv2DMicrokernelTester() |
| 8077 | .input_width(input_width) |
| 8078 | .input_height(2) |
| 8079 | .kernel_height(5) |
| 8080 | .kernel_width(5) |
| 8081 | .subsampling(2) |
| 8082 | .padding_left(2) |
| 8083 | .padding_right(2) |
| 8084 | .padding_top(2) |
| 8085 | .padding_bottom(2) |
| 8086 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc3); |
| 8087 | } |
| 8088 | } |
| 8089 | |
| 8090 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC3, output_width_div_4) { |
| 8091 | TEST_REQUIRES_ARM_NEON; |
| 8092 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 8093 | DWConv2DMicrokernelTester() |
| 8094 | .input_width(input_width) |
| 8095 | .input_height(2) |
| 8096 | .kernel_height(5) |
| 8097 | .kernel_width(5) |
| 8098 | .subsampling(2) |
| 8099 | .padding_left(2) |
| 8100 | .padding_right(2) |
| 8101 | .padding_top(2) |
| 8102 | .padding_bottom(2) |
| 8103 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc3); |
| 8104 | } |
| 8105 | } |
| 8106 | |
| 8107 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC3, output_width_lt_4) { |
| 8108 | TEST_REQUIRES_ARM_NEON; |
| 8109 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 8110 | DWConv2DMicrokernelTester() |
| 8111 | .input_width(8) |
| 8112 | .input_height(2) |
| 8113 | .kernel_height(5) |
| 8114 | .kernel_width(5) |
| 8115 | .subsampling(2) |
| 8116 | .padding_left(2) |
| 8117 | .padding_right(2) |
| 8118 | .padding_top(2) |
| 8119 | .padding_bottom(2) |
| 8120 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc3); |
| 8121 | } |
| 8122 | } |
| 8123 | |
| 8124 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC3, output_width_gt_4) { |
| 8125 | TEST_REQUIRES_ARM_NEON; |
| 8126 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 8127 | DWConv2DMicrokernelTester() |
| 8128 | .input_width(input_width) |
| 8129 | .input_height(2) |
| 8130 | .kernel_height(5) |
| 8131 | .kernel_width(5) |
| 8132 | .subsampling(2) |
| 8133 | .padding_left(2) |
| 8134 | .padding_right(2) |
| 8135 | .padding_top(2) |
| 8136 | .padding_bottom(2) |
| 8137 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc3); |
| 8138 | } |
| 8139 | } |
| 8140 | |
| 8141 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC3, output_height_eq_1) { |
| 8142 | TEST_REQUIRES_ARM_NEON; |
| 8143 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 8144 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8145 | DWConv2DMicrokernelTester() |
| 8146 | .input_width(input_width) |
| 8147 | .input_height(input_height) |
| 8148 | .kernel_height(5) |
| 8149 | .kernel_width(5) |
| 8150 | .subsampling(2) |
| 8151 | .padding_left(2) |
| 8152 | .padding_right(2) |
| 8153 | .padding_top(2) |
| 8154 | .padding_bottom(2) |
| 8155 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc3); |
| 8156 | } |
| 8157 | } |
| 8158 | } |
| 8159 | |
| 8160 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC3, output_height_gt_1) { |
| 8161 | TEST_REQUIRES_ARM_NEON; |
| 8162 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 8163 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8164 | DWConv2DMicrokernelTester() |
| 8165 | .input_width(input_width) |
| 8166 | .input_height(input_height) |
| 8167 | .kernel_height(5) |
| 8168 | .kernel_width(5) |
| 8169 | .subsampling(2) |
| 8170 | .padding_left(2) |
| 8171 | .padding_right(2) |
| 8172 | .padding_top(2) |
| 8173 | .padding_bottom(2) |
| 8174 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc3); |
| 8175 | } |
| 8176 | } |
| 8177 | } |
| 8178 | |
| 8179 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC3, padding_top_eq_1) { |
| 8180 | TEST_REQUIRES_ARM_NEON; |
| 8181 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 8182 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8183 | DWConv2DMicrokernelTester() |
| 8184 | .input_width(input_width) |
| 8185 | .input_height(input_height) |
| 8186 | .kernel_height(5) |
| 8187 | .kernel_width(5) |
| 8188 | .subsampling(2) |
| 8189 | .padding_left(2) |
| 8190 | .padding_right(2) |
| 8191 | .padding_top(1) |
| 8192 | .padding_bottom(2) |
| 8193 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc3); |
| 8194 | } |
| 8195 | } |
| 8196 | } |
| 8197 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 8198 | |
| 8199 | |
| 8200 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 8201 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC4, output_width_eq_4) { |
| 8202 | TEST_REQUIRES_ARM_NEON; |
| 8203 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 8204 | DWConv2DMicrokernelTester() |
| 8205 | .input_width(input_width) |
| 8206 | .input_height(2) |
| 8207 | .kernel_height(5) |
| 8208 | .kernel_width(5) |
| 8209 | .subsampling(2) |
| 8210 | .padding_left(2) |
| 8211 | .padding_right(2) |
| 8212 | .padding_top(2) |
| 8213 | .padding_bottom(2) |
| 8214 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc4); |
| 8215 | } |
| 8216 | } |
| 8217 | |
| 8218 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC4, output_width_div_4) { |
| 8219 | TEST_REQUIRES_ARM_NEON; |
| 8220 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 8221 | DWConv2DMicrokernelTester() |
| 8222 | .input_width(input_width) |
| 8223 | .input_height(2) |
| 8224 | .kernel_height(5) |
| 8225 | .kernel_width(5) |
| 8226 | .subsampling(2) |
| 8227 | .padding_left(2) |
| 8228 | .padding_right(2) |
| 8229 | .padding_top(2) |
| 8230 | .padding_bottom(2) |
| 8231 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc4); |
| 8232 | } |
| 8233 | } |
| 8234 | |
| 8235 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC4, output_width_lt_4) { |
| 8236 | TEST_REQUIRES_ARM_NEON; |
| 8237 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 8238 | DWConv2DMicrokernelTester() |
| 8239 | .input_width(8) |
| 8240 | .input_height(2) |
| 8241 | .kernel_height(5) |
| 8242 | .kernel_width(5) |
| 8243 | .subsampling(2) |
| 8244 | .padding_left(2) |
| 8245 | .padding_right(2) |
| 8246 | .padding_top(2) |
| 8247 | .padding_bottom(2) |
| 8248 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc4); |
| 8249 | } |
| 8250 | } |
| 8251 | |
| 8252 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC4, output_width_gt_4) { |
| 8253 | TEST_REQUIRES_ARM_NEON; |
| 8254 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 8255 | DWConv2DMicrokernelTester() |
| 8256 | .input_width(input_width) |
| 8257 | .input_height(2) |
| 8258 | .kernel_height(5) |
| 8259 | .kernel_width(5) |
| 8260 | .subsampling(2) |
| 8261 | .padding_left(2) |
| 8262 | .padding_right(2) |
| 8263 | .padding_top(2) |
| 8264 | .padding_bottom(2) |
| 8265 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc4); |
| 8266 | } |
| 8267 | } |
| 8268 | |
| 8269 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC4, output_height_eq_1) { |
| 8270 | TEST_REQUIRES_ARM_NEON; |
| 8271 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 8272 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8273 | DWConv2DMicrokernelTester() |
| 8274 | .input_width(input_width) |
| 8275 | .input_height(input_height) |
| 8276 | .kernel_height(5) |
| 8277 | .kernel_width(5) |
| 8278 | .subsampling(2) |
| 8279 | .padding_left(2) |
| 8280 | .padding_right(2) |
| 8281 | .padding_top(2) |
| 8282 | .padding_bottom(2) |
| 8283 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc4); |
| 8284 | } |
| 8285 | } |
| 8286 | } |
| 8287 | |
| 8288 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC4, output_height_gt_1) { |
| 8289 | TEST_REQUIRES_ARM_NEON; |
| 8290 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 8291 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8292 | DWConv2DMicrokernelTester() |
| 8293 | .input_width(input_width) |
| 8294 | .input_height(input_height) |
| 8295 | .kernel_height(5) |
| 8296 | .kernel_width(5) |
| 8297 | .subsampling(2) |
| 8298 | .padding_left(2) |
| 8299 | .padding_right(2) |
| 8300 | .padding_top(2) |
| 8301 | .padding_bottom(2) |
| 8302 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc4); |
| 8303 | } |
| 8304 | } |
| 8305 | } |
| 8306 | |
| 8307 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC4, padding_top_eq_1) { |
| 8308 | TEST_REQUIRES_ARM_NEON; |
| 8309 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 8310 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8311 | DWConv2DMicrokernelTester() |
| 8312 | .input_width(input_width) |
| 8313 | .input_height(input_height) |
| 8314 | .kernel_height(5) |
| 8315 | .kernel_width(5) |
| 8316 | .subsampling(2) |
| 8317 | .padding_left(2) |
| 8318 | .padding_right(2) |
| 8319 | .padding_top(1) |
| 8320 | .padding_bottom(2) |
| 8321 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc4); |
| 8322 | } |
| 8323 | } |
| 8324 | } |
| 8325 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 8326 | |
| 8327 | |
| 8328 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 8329 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC5, output_width_eq_4) { |
| 8330 | TEST_REQUIRES_ARM_NEON; |
| 8331 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 8332 | DWConv2DMicrokernelTester() |
| 8333 | .input_width(input_width) |
| 8334 | .input_height(2) |
| 8335 | .kernel_height(5) |
| 8336 | .kernel_width(5) |
| 8337 | .subsampling(2) |
| 8338 | .padding_left(2) |
| 8339 | .padding_right(2) |
| 8340 | .padding_top(2) |
| 8341 | .padding_bottom(2) |
| 8342 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc5); |
| 8343 | } |
| 8344 | } |
| 8345 | |
| 8346 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC5, output_width_div_4) { |
| 8347 | TEST_REQUIRES_ARM_NEON; |
| 8348 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 8349 | DWConv2DMicrokernelTester() |
| 8350 | .input_width(input_width) |
| 8351 | .input_height(2) |
| 8352 | .kernel_height(5) |
| 8353 | .kernel_width(5) |
| 8354 | .subsampling(2) |
| 8355 | .padding_left(2) |
| 8356 | .padding_right(2) |
| 8357 | .padding_top(2) |
| 8358 | .padding_bottom(2) |
| 8359 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc5); |
| 8360 | } |
| 8361 | } |
| 8362 | |
| 8363 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC5, output_width_lt_4) { |
| 8364 | TEST_REQUIRES_ARM_NEON; |
| 8365 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 8366 | DWConv2DMicrokernelTester() |
| 8367 | .input_width(8) |
| 8368 | .input_height(2) |
| 8369 | .kernel_height(5) |
| 8370 | .kernel_width(5) |
| 8371 | .subsampling(2) |
| 8372 | .padding_left(2) |
| 8373 | .padding_right(2) |
| 8374 | .padding_top(2) |
| 8375 | .padding_bottom(2) |
| 8376 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc5); |
| 8377 | } |
| 8378 | } |
| 8379 | |
| 8380 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC5, output_width_gt_4) { |
| 8381 | TEST_REQUIRES_ARM_NEON; |
| 8382 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 8383 | DWConv2DMicrokernelTester() |
| 8384 | .input_width(input_width) |
| 8385 | .input_height(2) |
| 8386 | .kernel_height(5) |
| 8387 | .kernel_width(5) |
| 8388 | .subsampling(2) |
| 8389 | .padding_left(2) |
| 8390 | .padding_right(2) |
| 8391 | .padding_top(2) |
| 8392 | .padding_bottom(2) |
| 8393 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc5); |
| 8394 | } |
| 8395 | } |
| 8396 | |
| 8397 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC5, output_height_eq_1) { |
| 8398 | TEST_REQUIRES_ARM_NEON; |
| 8399 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 8400 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8401 | DWConv2DMicrokernelTester() |
| 8402 | .input_width(input_width) |
| 8403 | .input_height(input_height) |
| 8404 | .kernel_height(5) |
| 8405 | .kernel_width(5) |
| 8406 | .subsampling(2) |
| 8407 | .padding_left(2) |
| 8408 | .padding_right(2) |
| 8409 | .padding_top(2) |
| 8410 | .padding_bottom(2) |
| 8411 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc5); |
| 8412 | } |
| 8413 | } |
| 8414 | } |
| 8415 | |
| 8416 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC5, output_height_gt_1) { |
| 8417 | TEST_REQUIRES_ARM_NEON; |
| 8418 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 8419 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8420 | DWConv2DMicrokernelTester() |
| 8421 | .input_width(input_width) |
| 8422 | .input_height(input_height) |
| 8423 | .kernel_height(5) |
| 8424 | .kernel_width(5) |
| 8425 | .subsampling(2) |
| 8426 | .padding_left(2) |
| 8427 | .padding_right(2) |
| 8428 | .padding_top(2) |
| 8429 | .padding_bottom(2) |
| 8430 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc5); |
| 8431 | } |
| 8432 | } |
| 8433 | } |
| 8434 | |
| 8435 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_1X4_ACC5, padding_top_eq_1) { |
| 8436 | TEST_REQUIRES_ARM_NEON; |
| 8437 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 8438 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8439 | DWConv2DMicrokernelTester() |
| 8440 | .input_width(input_width) |
| 8441 | .input_height(input_height) |
| 8442 | .kernel_height(5) |
| 8443 | .kernel_width(5) |
| 8444 | .subsampling(2) |
| 8445 | .padding_left(2) |
| 8446 | .padding_right(2) |
| 8447 | .padding_top(1) |
| 8448 | .padding_bottom(2) |
| 8449 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc5); |
| 8450 | } |
| 8451 | } |
| 8452 | } |
| 8453 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 8454 | |
| 8455 | |
| 8456 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 8457 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC2, output_width_eq_4) { |
| 8458 | TEST_REQUIRES_ARM_NEON; |
| 8459 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 8460 | DWConv2DMicrokernelTester() |
| 8461 | .input_width(input_width) |
| 8462 | .input_height(4) |
| 8463 | .kernel_height(5) |
| 8464 | .kernel_width(5) |
| 8465 | .subsampling(2) |
| 8466 | .padding_left(2) |
| 8467 | .padding_right(2) |
| 8468 | .padding_top(2) |
| 8469 | .padding_bottom(2) |
| 8470 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc2); |
| 8471 | } |
| 8472 | } |
| 8473 | |
| 8474 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC2, output_width_div_4) { |
| 8475 | TEST_REQUIRES_ARM_NEON; |
| 8476 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 8477 | DWConv2DMicrokernelTester() |
| 8478 | .input_width(input_width) |
| 8479 | .input_height(4) |
| 8480 | .kernel_height(5) |
| 8481 | .kernel_width(5) |
| 8482 | .subsampling(2) |
| 8483 | .padding_left(2) |
| 8484 | .padding_right(2) |
| 8485 | .padding_top(2) |
| 8486 | .padding_bottom(2) |
| 8487 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc2); |
| 8488 | } |
| 8489 | } |
| 8490 | |
| 8491 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC2, output_width_lt_4) { |
| 8492 | TEST_REQUIRES_ARM_NEON; |
| 8493 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 8494 | DWConv2DMicrokernelTester() |
| 8495 | .input_width(8) |
| 8496 | .input_height(4) |
| 8497 | .kernel_height(5) |
| 8498 | .kernel_width(5) |
| 8499 | .subsampling(2) |
| 8500 | .padding_left(2) |
| 8501 | .padding_right(2) |
| 8502 | .padding_top(2) |
| 8503 | .padding_bottom(2) |
| 8504 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc2); |
| 8505 | } |
| 8506 | } |
| 8507 | |
| 8508 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC2, output_width_gt_4) { |
| 8509 | TEST_REQUIRES_ARM_NEON; |
| 8510 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 8511 | DWConv2DMicrokernelTester() |
| 8512 | .input_width(input_width) |
| 8513 | .input_height(4) |
| 8514 | .kernel_height(5) |
| 8515 | .kernel_width(5) |
| 8516 | .subsampling(2) |
| 8517 | .padding_left(2) |
| 8518 | .padding_right(2) |
| 8519 | .padding_top(2) |
| 8520 | .padding_bottom(2) |
| 8521 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc2); |
| 8522 | } |
| 8523 | } |
| 8524 | |
| 8525 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC2, output_height_eq_2) { |
| 8526 | TEST_REQUIRES_ARM_NEON; |
| 8527 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 8528 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8529 | DWConv2DMicrokernelTester() |
| 8530 | .input_width(input_width) |
| 8531 | .input_height(input_height) |
| 8532 | .kernel_height(5) |
| 8533 | .kernel_width(5) |
| 8534 | .subsampling(2) |
| 8535 | .padding_left(2) |
| 8536 | .padding_right(2) |
| 8537 | .padding_top(2) |
| 8538 | .padding_bottom(2) |
| 8539 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc2); |
| 8540 | } |
| 8541 | } |
| 8542 | } |
| 8543 | |
| 8544 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC2, output_height_div_2) { |
| 8545 | TEST_REQUIRES_ARM_NEON; |
| 8546 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 8547 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8548 | DWConv2DMicrokernelTester() |
| 8549 | .input_width(input_width) |
| 8550 | .input_height(input_height) |
| 8551 | .kernel_height(5) |
| 8552 | .kernel_width(5) |
| 8553 | .subsampling(2) |
| 8554 | .padding_left(2) |
| 8555 | .padding_right(2) |
| 8556 | .padding_top(2) |
| 8557 | .padding_bottom(2) |
| 8558 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc2); |
| 8559 | } |
| 8560 | } |
| 8561 | } |
| 8562 | |
| 8563 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC2, output_height_lt_2) { |
| 8564 | TEST_REQUIRES_ARM_NEON; |
| 8565 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 8566 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8567 | DWConv2DMicrokernelTester() |
| 8568 | .input_width(input_width) |
| 8569 | .input_height(input_height) |
| 8570 | .kernel_height(5) |
| 8571 | .kernel_width(5) |
| 8572 | .subsampling(2) |
| 8573 | .padding_left(2) |
| 8574 | .padding_right(2) |
| 8575 | .padding_top(2) |
| 8576 | .padding_bottom(2) |
| 8577 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc2); |
| 8578 | } |
| 8579 | } |
| 8580 | } |
| 8581 | |
| 8582 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC2, output_height_gt_2) { |
| 8583 | TEST_REQUIRES_ARM_NEON; |
| 8584 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 8585 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8586 | DWConv2DMicrokernelTester() |
| 8587 | .input_width(input_width) |
| 8588 | .input_height(input_height) |
| 8589 | .kernel_height(5) |
| 8590 | .kernel_width(5) |
| 8591 | .subsampling(2) |
| 8592 | .padding_left(2) |
| 8593 | .padding_right(2) |
| 8594 | .padding_top(2) |
| 8595 | .padding_bottom(2) |
| 8596 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc2); |
| 8597 | } |
| 8598 | } |
| 8599 | } |
| 8600 | |
| 8601 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC2, padding_top_eq_1) { |
| 8602 | TEST_REQUIRES_ARM_NEON; |
| 8603 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 8604 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8605 | DWConv2DMicrokernelTester() |
| 8606 | .input_width(input_width) |
| 8607 | .input_height(input_height) |
| 8608 | .kernel_height(5) |
| 8609 | .kernel_width(5) |
| 8610 | .subsampling(2) |
| 8611 | .padding_left(2) |
| 8612 | .padding_right(2) |
| 8613 | .padding_top(1) |
| 8614 | .padding_bottom(2) |
| 8615 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc2); |
| 8616 | } |
| 8617 | } |
| 8618 | } |
| 8619 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 8620 | |
| 8621 | |
| 8622 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 8623 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC3, output_width_eq_4) { |
| 8624 | TEST_REQUIRES_ARM_NEON; |
| 8625 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 8626 | DWConv2DMicrokernelTester() |
| 8627 | .input_width(input_width) |
| 8628 | .input_height(4) |
| 8629 | .kernel_height(5) |
| 8630 | .kernel_width(5) |
| 8631 | .subsampling(2) |
| 8632 | .padding_left(2) |
| 8633 | .padding_right(2) |
| 8634 | .padding_top(2) |
| 8635 | .padding_bottom(2) |
| 8636 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc3); |
| 8637 | } |
| 8638 | } |
| 8639 | |
| 8640 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC3, output_width_div_4) { |
| 8641 | TEST_REQUIRES_ARM_NEON; |
| 8642 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 8643 | DWConv2DMicrokernelTester() |
| 8644 | .input_width(input_width) |
| 8645 | .input_height(4) |
| 8646 | .kernel_height(5) |
| 8647 | .kernel_width(5) |
| 8648 | .subsampling(2) |
| 8649 | .padding_left(2) |
| 8650 | .padding_right(2) |
| 8651 | .padding_top(2) |
| 8652 | .padding_bottom(2) |
| 8653 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc3); |
| 8654 | } |
| 8655 | } |
| 8656 | |
| 8657 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC3, output_width_lt_4) { |
| 8658 | TEST_REQUIRES_ARM_NEON; |
| 8659 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 8660 | DWConv2DMicrokernelTester() |
| 8661 | .input_width(8) |
| 8662 | .input_height(4) |
| 8663 | .kernel_height(5) |
| 8664 | .kernel_width(5) |
| 8665 | .subsampling(2) |
| 8666 | .padding_left(2) |
| 8667 | .padding_right(2) |
| 8668 | .padding_top(2) |
| 8669 | .padding_bottom(2) |
| 8670 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc3); |
| 8671 | } |
| 8672 | } |
| 8673 | |
| 8674 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC3, output_width_gt_4) { |
| 8675 | TEST_REQUIRES_ARM_NEON; |
| 8676 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 8677 | DWConv2DMicrokernelTester() |
| 8678 | .input_width(input_width) |
| 8679 | .input_height(4) |
| 8680 | .kernel_height(5) |
| 8681 | .kernel_width(5) |
| 8682 | .subsampling(2) |
| 8683 | .padding_left(2) |
| 8684 | .padding_right(2) |
| 8685 | .padding_top(2) |
| 8686 | .padding_bottom(2) |
| 8687 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc3); |
| 8688 | } |
| 8689 | } |
| 8690 | |
| 8691 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC3, output_height_eq_2) { |
| 8692 | TEST_REQUIRES_ARM_NEON; |
| 8693 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 8694 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8695 | DWConv2DMicrokernelTester() |
| 8696 | .input_width(input_width) |
| 8697 | .input_height(input_height) |
| 8698 | .kernel_height(5) |
| 8699 | .kernel_width(5) |
| 8700 | .subsampling(2) |
| 8701 | .padding_left(2) |
| 8702 | .padding_right(2) |
| 8703 | .padding_top(2) |
| 8704 | .padding_bottom(2) |
| 8705 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc3); |
| 8706 | } |
| 8707 | } |
| 8708 | } |
| 8709 | |
| 8710 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC3, output_height_div_2) { |
| 8711 | TEST_REQUIRES_ARM_NEON; |
| 8712 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 8713 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8714 | DWConv2DMicrokernelTester() |
| 8715 | .input_width(input_width) |
| 8716 | .input_height(input_height) |
| 8717 | .kernel_height(5) |
| 8718 | .kernel_width(5) |
| 8719 | .subsampling(2) |
| 8720 | .padding_left(2) |
| 8721 | .padding_right(2) |
| 8722 | .padding_top(2) |
| 8723 | .padding_bottom(2) |
| 8724 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc3); |
| 8725 | } |
| 8726 | } |
| 8727 | } |
| 8728 | |
| 8729 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC3, output_height_lt_2) { |
| 8730 | TEST_REQUIRES_ARM_NEON; |
| 8731 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 8732 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8733 | DWConv2DMicrokernelTester() |
| 8734 | .input_width(input_width) |
| 8735 | .input_height(input_height) |
| 8736 | .kernel_height(5) |
| 8737 | .kernel_width(5) |
| 8738 | .subsampling(2) |
| 8739 | .padding_left(2) |
| 8740 | .padding_right(2) |
| 8741 | .padding_top(2) |
| 8742 | .padding_bottom(2) |
| 8743 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc3); |
| 8744 | } |
| 8745 | } |
| 8746 | } |
| 8747 | |
| 8748 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC3, output_height_gt_2) { |
| 8749 | TEST_REQUIRES_ARM_NEON; |
| 8750 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 8751 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8752 | DWConv2DMicrokernelTester() |
| 8753 | .input_width(input_width) |
| 8754 | .input_height(input_height) |
| 8755 | .kernel_height(5) |
| 8756 | .kernel_width(5) |
| 8757 | .subsampling(2) |
| 8758 | .padding_left(2) |
| 8759 | .padding_right(2) |
| 8760 | .padding_top(2) |
| 8761 | .padding_bottom(2) |
| 8762 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc3); |
| 8763 | } |
| 8764 | } |
| 8765 | } |
| 8766 | |
| 8767 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_2X4_ACC3, padding_top_eq_1) { |
| 8768 | TEST_REQUIRES_ARM_NEON; |
| 8769 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 8770 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8771 | DWConv2DMicrokernelTester() |
| 8772 | .input_width(input_width) |
| 8773 | .input_height(input_height) |
| 8774 | .kernel_height(5) |
| 8775 | .kernel_width(5) |
| 8776 | .subsampling(2) |
| 8777 | .padding_left(2) |
| 8778 | .padding_right(2) |
| 8779 | .padding_top(1) |
| 8780 | .padding_bottom(2) |
| 8781 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc3); |
| 8782 | } |
| 8783 | } |
| 8784 | } |
| 8785 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 8786 | |
| 8787 | |
| 8788 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 8789 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4_ACC2, output_width_eq_4) { |
| 8790 | TEST_REQUIRES_ARM_NEON; |
| 8791 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 8792 | DWConv2DMicrokernelTester() |
| 8793 | .input_width(input_width) |
| 8794 | .input_height(6) |
| 8795 | .kernel_height(5) |
| 8796 | .kernel_width(5) |
| 8797 | .subsampling(2) |
| 8798 | .padding_left(2) |
| 8799 | .padding_right(2) |
| 8800 | .padding_top(2) |
| 8801 | .padding_bottom(2) |
| 8802 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4_acc2); |
| 8803 | } |
| 8804 | } |
| 8805 | |
| 8806 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4_ACC2, output_width_div_4) { |
| 8807 | TEST_REQUIRES_ARM_NEON; |
| 8808 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 8809 | DWConv2DMicrokernelTester() |
| 8810 | .input_width(input_width) |
| 8811 | .input_height(6) |
| 8812 | .kernel_height(5) |
| 8813 | .kernel_width(5) |
| 8814 | .subsampling(2) |
| 8815 | .padding_left(2) |
| 8816 | .padding_right(2) |
| 8817 | .padding_top(2) |
| 8818 | .padding_bottom(2) |
| 8819 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4_acc2); |
| 8820 | } |
| 8821 | } |
| 8822 | |
| 8823 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4_ACC2, output_width_lt_4) { |
| 8824 | TEST_REQUIRES_ARM_NEON; |
| 8825 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 8826 | DWConv2DMicrokernelTester() |
| 8827 | .input_width(8) |
| 8828 | .input_height(6) |
| 8829 | .kernel_height(5) |
| 8830 | .kernel_width(5) |
| 8831 | .subsampling(2) |
| 8832 | .padding_left(2) |
| 8833 | .padding_right(2) |
| 8834 | .padding_top(2) |
| 8835 | .padding_bottom(2) |
| 8836 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4_acc2); |
| 8837 | } |
| 8838 | } |
| 8839 | |
| 8840 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4_ACC2, output_width_gt_4) { |
| 8841 | TEST_REQUIRES_ARM_NEON; |
| 8842 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 8843 | DWConv2DMicrokernelTester() |
| 8844 | .input_width(input_width) |
| 8845 | .input_height(6) |
| 8846 | .kernel_height(5) |
| 8847 | .kernel_width(5) |
| 8848 | .subsampling(2) |
| 8849 | .padding_left(2) |
| 8850 | .padding_right(2) |
| 8851 | .padding_top(2) |
| 8852 | .padding_bottom(2) |
| 8853 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4_acc2); |
| 8854 | } |
| 8855 | } |
| 8856 | |
| 8857 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4_ACC2, output_height_eq_3) { |
| 8858 | TEST_REQUIRES_ARM_NEON; |
| 8859 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 8860 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8861 | DWConv2DMicrokernelTester() |
| 8862 | .input_width(input_width) |
| 8863 | .input_height(input_height) |
| 8864 | .kernel_height(5) |
| 8865 | .kernel_width(5) |
| 8866 | .subsampling(2) |
| 8867 | .padding_left(2) |
| 8868 | .padding_right(2) |
| 8869 | .padding_top(2) |
| 8870 | .padding_bottom(2) |
| 8871 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4_acc2); |
| 8872 | } |
| 8873 | } |
| 8874 | } |
| 8875 | |
| 8876 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4_ACC2, output_height_div_3) { |
| 8877 | TEST_REQUIRES_ARM_NEON; |
| 8878 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 8879 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8880 | DWConv2DMicrokernelTester() |
| 8881 | .input_width(input_width) |
| 8882 | .input_height(input_height) |
| 8883 | .kernel_height(5) |
| 8884 | .kernel_width(5) |
| 8885 | .subsampling(2) |
| 8886 | .padding_left(2) |
| 8887 | .padding_right(2) |
| 8888 | .padding_top(2) |
| 8889 | .padding_bottom(2) |
| 8890 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4_acc2); |
| 8891 | } |
| 8892 | } |
| 8893 | } |
| 8894 | |
| 8895 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4_ACC2, output_height_lt_3) { |
| 8896 | TEST_REQUIRES_ARM_NEON; |
| 8897 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 8898 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8899 | DWConv2DMicrokernelTester() |
| 8900 | .input_width(input_width) |
| 8901 | .input_height(input_height) |
| 8902 | .kernel_height(5) |
| 8903 | .kernel_width(5) |
| 8904 | .subsampling(2) |
| 8905 | .padding_left(2) |
| 8906 | .padding_right(2) |
| 8907 | .padding_top(2) |
| 8908 | .padding_bottom(2) |
| 8909 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4_acc2); |
| 8910 | } |
| 8911 | } |
| 8912 | } |
| 8913 | |
| 8914 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4_ACC2, output_height_gt_3) { |
| 8915 | TEST_REQUIRES_ARM_NEON; |
| 8916 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 8917 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8918 | DWConv2DMicrokernelTester() |
| 8919 | .input_width(input_width) |
| 8920 | .input_height(input_height) |
| 8921 | .kernel_height(5) |
| 8922 | .kernel_width(5) |
| 8923 | .subsampling(2) |
| 8924 | .padding_left(2) |
| 8925 | .padding_right(2) |
| 8926 | .padding_top(2) |
| 8927 | .padding_bottom(2) |
| 8928 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4_acc2); |
| 8929 | } |
| 8930 | } |
| 8931 | } |
| 8932 | |
| 8933 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEON_3X4_ACC2, padding_top_eq_1) { |
| 8934 | TEST_REQUIRES_ARM_NEON; |
| 8935 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 8936 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 8937 | DWConv2DMicrokernelTester() |
| 8938 | .input_width(input_width) |
| 8939 | .input_height(input_height) |
| 8940 | .kernel_height(5) |
| 8941 | .kernel_width(5) |
| 8942 | .subsampling(2) |
| 8943 | .padding_left(2) |
| 8944 | .padding_right(2) |
| 8945 | .padding_top(1) |
| 8946 | .padding_bottom(2) |
| 8947 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4_acc2); |
| 8948 | } |
| 8949 | } |
| 8950 | } |
| 8951 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 8952 | |
| 8953 | |
| 8954 | #if XNN_ARCH_ARM64 |
| 8955 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4, output_width_eq_4) { |
| 8956 | TEST_REQUIRES_ARM_NEON_FMA; |
| 8957 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 8958 | DWConv2DMicrokernelTester() |
| 8959 | .input_width(input_width) |
| 8960 | .input_height(2) |
| 8961 | .kernel_height(5) |
| 8962 | .kernel_width(5) |
| 8963 | .subsampling(2) |
| 8964 | .padding_left(2) |
| 8965 | .padding_right(2) |
| 8966 | .padding_top(2) |
| 8967 | .padding_bottom(2) |
| 8968 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4); |
| 8969 | } |
| 8970 | } |
| 8971 | |
| 8972 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4, output_width_div_4) { |
| 8973 | TEST_REQUIRES_ARM_NEON_FMA; |
| 8974 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 8975 | DWConv2DMicrokernelTester() |
| 8976 | .input_width(input_width) |
| 8977 | .input_height(2) |
| 8978 | .kernel_height(5) |
| 8979 | .kernel_width(5) |
| 8980 | .subsampling(2) |
| 8981 | .padding_left(2) |
| 8982 | .padding_right(2) |
| 8983 | .padding_top(2) |
| 8984 | .padding_bottom(2) |
| 8985 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4); |
| 8986 | } |
| 8987 | } |
| 8988 | |
| 8989 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4, output_width_lt_4) { |
| 8990 | TEST_REQUIRES_ARM_NEON_FMA; |
| 8991 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 8992 | DWConv2DMicrokernelTester() |
| 8993 | .input_width(8) |
| 8994 | .input_height(2) |
| 8995 | .kernel_height(5) |
| 8996 | .kernel_width(5) |
| 8997 | .subsampling(2) |
| 8998 | .padding_left(2) |
| 8999 | .padding_right(2) |
| 9000 | .padding_top(2) |
| 9001 | .padding_bottom(2) |
| 9002 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4); |
| 9003 | } |
| 9004 | } |
| 9005 | |
| 9006 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4, output_width_gt_4) { |
| 9007 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9008 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 9009 | DWConv2DMicrokernelTester() |
| 9010 | .input_width(input_width) |
| 9011 | .input_height(2) |
| 9012 | .kernel_height(5) |
| 9013 | .kernel_width(5) |
| 9014 | .subsampling(2) |
| 9015 | .padding_left(2) |
| 9016 | .padding_right(2) |
| 9017 | .padding_top(2) |
| 9018 | .padding_bottom(2) |
| 9019 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4); |
| 9020 | } |
| 9021 | } |
| 9022 | |
| 9023 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4, output_height_eq_1) { |
| 9024 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9025 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 9026 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9027 | DWConv2DMicrokernelTester() |
| 9028 | .input_width(input_width) |
| 9029 | .input_height(input_height) |
| 9030 | .kernel_height(5) |
| 9031 | .kernel_width(5) |
| 9032 | .subsampling(2) |
| 9033 | .padding_left(2) |
| 9034 | .padding_right(2) |
| 9035 | .padding_top(2) |
| 9036 | .padding_bottom(2) |
| 9037 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4); |
| 9038 | } |
| 9039 | } |
| 9040 | } |
| 9041 | |
| 9042 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4, output_height_gt_1) { |
| 9043 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9044 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 9045 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9046 | DWConv2DMicrokernelTester() |
| 9047 | .input_width(input_width) |
| 9048 | .input_height(input_height) |
| 9049 | .kernel_height(5) |
| 9050 | .kernel_width(5) |
| 9051 | .subsampling(2) |
| 9052 | .padding_left(2) |
| 9053 | .padding_right(2) |
| 9054 | .padding_top(2) |
| 9055 | .padding_bottom(2) |
| 9056 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4); |
| 9057 | } |
| 9058 | } |
| 9059 | } |
| 9060 | |
| 9061 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4, padding_top_eq_1) { |
| 9062 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9063 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 9064 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9065 | DWConv2DMicrokernelTester() |
| 9066 | .input_width(input_width) |
| 9067 | .input_height(input_height) |
| 9068 | .kernel_height(5) |
| 9069 | .kernel_width(5) |
| 9070 | .subsampling(2) |
| 9071 | .padding_left(2) |
| 9072 | .padding_right(2) |
| 9073 | .padding_top(1) |
| 9074 | .padding_bottom(2) |
| 9075 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4); |
| 9076 | } |
| 9077 | } |
| 9078 | } |
| 9079 | #endif // XNN_ARCH_ARM64 |
| 9080 | |
| 9081 | |
| 9082 | #if XNN_ARCH_ARM64 |
| 9083 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4, output_width_eq_4) { |
| 9084 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9085 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 9086 | DWConv2DMicrokernelTester() |
| 9087 | .input_width(input_width) |
| 9088 | .input_height(4) |
| 9089 | .kernel_height(5) |
| 9090 | .kernel_width(5) |
| 9091 | .subsampling(2) |
| 9092 | .padding_left(2) |
| 9093 | .padding_right(2) |
| 9094 | .padding_top(2) |
| 9095 | .padding_bottom(2) |
| 9096 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4); |
| 9097 | } |
| 9098 | } |
| 9099 | |
| 9100 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4, output_width_div_4) { |
| 9101 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9102 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 9103 | DWConv2DMicrokernelTester() |
| 9104 | .input_width(input_width) |
| 9105 | .input_height(4) |
| 9106 | .kernel_height(5) |
| 9107 | .kernel_width(5) |
| 9108 | .subsampling(2) |
| 9109 | .padding_left(2) |
| 9110 | .padding_right(2) |
| 9111 | .padding_top(2) |
| 9112 | .padding_bottom(2) |
| 9113 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4); |
| 9114 | } |
| 9115 | } |
| 9116 | |
| 9117 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4, output_width_lt_4) { |
| 9118 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9119 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 9120 | DWConv2DMicrokernelTester() |
| 9121 | .input_width(8) |
| 9122 | .input_height(4) |
| 9123 | .kernel_height(5) |
| 9124 | .kernel_width(5) |
| 9125 | .subsampling(2) |
| 9126 | .padding_left(2) |
| 9127 | .padding_right(2) |
| 9128 | .padding_top(2) |
| 9129 | .padding_bottom(2) |
| 9130 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4); |
| 9131 | } |
| 9132 | } |
| 9133 | |
| 9134 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4, output_width_gt_4) { |
| 9135 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9136 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 9137 | DWConv2DMicrokernelTester() |
| 9138 | .input_width(input_width) |
| 9139 | .input_height(4) |
| 9140 | .kernel_height(5) |
| 9141 | .kernel_width(5) |
| 9142 | .subsampling(2) |
| 9143 | .padding_left(2) |
| 9144 | .padding_right(2) |
| 9145 | .padding_top(2) |
| 9146 | .padding_bottom(2) |
| 9147 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4); |
| 9148 | } |
| 9149 | } |
| 9150 | |
| 9151 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4, output_height_eq_2) { |
| 9152 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9153 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 9154 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9155 | DWConv2DMicrokernelTester() |
| 9156 | .input_width(input_width) |
| 9157 | .input_height(input_height) |
| 9158 | .kernel_height(5) |
| 9159 | .kernel_width(5) |
| 9160 | .subsampling(2) |
| 9161 | .padding_left(2) |
| 9162 | .padding_right(2) |
| 9163 | .padding_top(2) |
| 9164 | .padding_bottom(2) |
| 9165 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4); |
| 9166 | } |
| 9167 | } |
| 9168 | } |
| 9169 | |
| 9170 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4, output_height_div_2) { |
| 9171 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9172 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 9173 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9174 | DWConv2DMicrokernelTester() |
| 9175 | .input_width(input_width) |
| 9176 | .input_height(input_height) |
| 9177 | .kernel_height(5) |
| 9178 | .kernel_width(5) |
| 9179 | .subsampling(2) |
| 9180 | .padding_left(2) |
| 9181 | .padding_right(2) |
| 9182 | .padding_top(2) |
| 9183 | .padding_bottom(2) |
| 9184 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4); |
| 9185 | } |
| 9186 | } |
| 9187 | } |
| 9188 | |
| 9189 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4, output_height_lt_2) { |
| 9190 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9191 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 9192 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9193 | DWConv2DMicrokernelTester() |
| 9194 | .input_width(input_width) |
| 9195 | .input_height(input_height) |
| 9196 | .kernel_height(5) |
| 9197 | .kernel_width(5) |
| 9198 | .subsampling(2) |
| 9199 | .padding_left(2) |
| 9200 | .padding_right(2) |
| 9201 | .padding_top(2) |
| 9202 | .padding_bottom(2) |
| 9203 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4); |
| 9204 | } |
| 9205 | } |
| 9206 | } |
| 9207 | |
| 9208 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4, output_height_gt_2) { |
| 9209 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9210 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 9211 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9212 | DWConv2DMicrokernelTester() |
| 9213 | .input_width(input_width) |
| 9214 | .input_height(input_height) |
| 9215 | .kernel_height(5) |
| 9216 | .kernel_width(5) |
| 9217 | .subsampling(2) |
| 9218 | .padding_left(2) |
| 9219 | .padding_right(2) |
| 9220 | .padding_top(2) |
| 9221 | .padding_bottom(2) |
| 9222 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4); |
| 9223 | } |
| 9224 | } |
| 9225 | } |
| 9226 | |
| 9227 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4, padding_top_eq_1) { |
| 9228 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9229 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 9230 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9231 | DWConv2DMicrokernelTester() |
| 9232 | .input_width(input_width) |
| 9233 | .input_height(input_height) |
| 9234 | .kernel_height(5) |
| 9235 | .kernel_width(5) |
| 9236 | .subsampling(2) |
| 9237 | .padding_left(2) |
| 9238 | .padding_right(2) |
| 9239 | .padding_top(1) |
| 9240 | .padding_bottom(2) |
| 9241 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4); |
| 9242 | } |
| 9243 | } |
| 9244 | } |
| 9245 | #endif // XNN_ARCH_ARM64 |
| 9246 | |
| 9247 | |
| 9248 | #if XNN_ARCH_ARM64 |
| 9249 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4, output_width_eq_4) { |
| 9250 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9251 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 9252 | DWConv2DMicrokernelTester() |
| 9253 | .input_width(input_width) |
| 9254 | .input_height(6) |
| 9255 | .kernel_height(5) |
| 9256 | .kernel_width(5) |
| 9257 | .subsampling(2) |
| 9258 | .padding_left(2) |
| 9259 | .padding_right(2) |
| 9260 | .padding_top(2) |
| 9261 | .padding_bottom(2) |
| 9262 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4); |
| 9263 | } |
| 9264 | } |
| 9265 | |
| 9266 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4, output_width_div_4) { |
| 9267 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9268 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 9269 | DWConv2DMicrokernelTester() |
| 9270 | .input_width(input_width) |
| 9271 | .input_height(6) |
| 9272 | .kernel_height(5) |
| 9273 | .kernel_width(5) |
| 9274 | .subsampling(2) |
| 9275 | .padding_left(2) |
| 9276 | .padding_right(2) |
| 9277 | .padding_top(2) |
| 9278 | .padding_bottom(2) |
| 9279 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4); |
| 9280 | } |
| 9281 | } |
| 9282 | |
| 9283 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4, output_width_lt_4) { |
| 9284 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9285 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 9286 | DWConv2DMicrokernelTester() |
| 9287 | .input_width(8) |
| 9288 | .input_height(6) |
| 9289 | .kernel_height(5) |
| 9290 | .kernel_width(5) |
| 9291 | .subsampling(2) |
| 9292 | .padding_left(2) |
| 9293 | .padding_right(2) |
| 9294 | .padding_top(2) |
| 9295 | .padding_bottom(2) |
| 9296 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4); |
| 9297 | } |
| 9298 | } |
| 9299 | |
| 9300 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4, output_width_gt_4) { |
| 9301 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9302 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 9303 | DWConv2DMicrokernelTester() |
| 9304 | .input_width(input_width) |
| 9305 | .input_height(6) |
| 9306 | .kernel_height(5) |
| 9307 | .kernel_width(5) |
| 9308 | .subsampling(2) |
| 9309 | .padding_left(2) |
| 9310 | .padding_right(2) |
| 9311 | .padding_top(2) |
| 9312 | .padding_bottom(2) |
| 9313 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4); |
| 9314 | } |
| 9315 | } |
| 9316 | |
| 9317 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4, output_height_eq_3) { |
| 9318 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9319 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 9320 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9321 | DWConv2DMicrokernelTester() |
| 9322 | .input_width(input_width) |
| 9323 | .input_height(input_height) |
| 9324 | .kernel_height(5) |
| 9325 | .kernel_width(5) |
| 9326 | .subsampling(2) |
| 9327 | .padding_left(2) |
| 9328 | .padding_right(2) |
| 9329 | .padding_top(2) |
| 9330 | .padding_bottom(2) |
| 9331 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4); |
| 9332 | } |
| 9333 | } |
| 9334 | } |
| 9335 | |
| 9336 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4, output_height_div_3) { |
| 9337 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9338 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 9339 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9340 | DWConv2DMicrokernelTester() |
| 9341 | .input_width(input_width) |
| 9342 | .input_height(input_height) |
| 9343 | .kernel_height(5) |
| 9344 | .kernel_width(5) |
| 9345 | .subsampling(2) |
| 9346 | .padding_left(2) |
| 9347 | .padding_right(2) |
| 9348 | .padding_top(2) |
| 9349 | .padding_bottom(2) |
| 9350 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4); |
| 9351 | } |
| 9352 | } |
| 9353 | } |
| 9354 | |
| 9355 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4, output_height_lt_3) { |
| 9356 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9357 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 9358 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9359 | DWConv2DMicrokernelTester() |
| 9360 | .input_width(input_width) |
| 9361 | .input_height(input_height) |
| 9362 | .kernel_height(5) |
| 9363 | .kernel_width(5) |
| 9364 | .subsampling(2) |
| 9365 | .padding_left(2) |
| 9366 | .padding_right(2) |
| 9367 | .padding_top(2) |
| 9368 | .padding_bottom(2) |
| 9369 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4); |
| 9370 | } |
| 9371 | } |
| 9372 | } |
| 9373 | |
| 9374 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4, output_height_gt_3) { |
| 9375 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9376 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 9377 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9378 | DWConv2DMicrokernelTester() |
| 9379 | .input_width(input_width) |
| 9380 | .input_height(input_height) |
| 9381 | .kernel_height(5) |
| 9382 | .kernel_width(5) |
| 9383 | .subsampling(2) |
| 9384 | .padding_left(2) |
| 9385 | .padding_right(2) |
| 9386 | .padding_top(2) |
| 9387 | .padding_bottom(2) |
| 9388 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4); |
| 9389 | } |
| 9390 | } |
| 9391 | } |
| 9392 | |
| 9393 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4, padding_top_eq_1) { |
| 9394 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9395 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 9396 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9397 | DWConv2DMicrokernelTester() |
| 9398 | .input_width(input_width) |
| 9399 | .input_height(input_height) |
| 9400 | .kernel_height(5) |
| 9401 | .kernel_width(5) |
| 9402 | .subsampling(2) |
| 9403 | .padding_left(2) |
| 9404 | .padding_right(2) |
| 9405 | .padding_top(1) |
| 9406 | .padding_bottom(2) |
| 9407 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4); |
| 9408 | } |
| 9409 | } |
| 9410 | } |
| 9411 | #endif // XNN_ARCH_ARM64 |
| 9412 | |
| 9413 | |
| Marat Dukhan | 149f0ea | 2020-10-26 12:50:33 -0700 | [diff] [blame] | 9414 | #if XNN_ARCH_ARM64 |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9415 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC2, output_width_eq_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9416 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9417 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9418 | DWConv2DMicrokernelTester() |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9419 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9420 | .input_height(2) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9421 | .kernel_height(5) |
| 9422 | .kernel_width(5) |
| 9423 | .subsampling(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 9424 | .padding_left(2) |
| 9425 | .padding_right(2) |
| 9426 | .padding_top(2) |
| 9427 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9428 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc2); |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 9429 | } |
| 9430 | } |
| 9431 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9432 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC2, output_width_div_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9433 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9434 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9435 | DWConv2DMicrokernelTester() |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9436 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9437 | .input_height(2) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9438 | .kernel_height(5) |
| 9439 | .kernel_width(5) |
| 9440 | .subsampling(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 9441 | .padding_left(2) |
| 9442 | .padding_right(2) |
| 9443 | .padding_top(2) |
| 9444 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9445 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc2); |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 9446 | } |
| 9447 | } |
| 9448 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9449 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC2, output_width_lt_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9450 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9451 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9452 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9453 | .input_width(8) |
| 9454 | .input_height(2) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9455 | .kernel_height(5) |
| 9456 | .kernel_width(5) |
| 9457 | .subsampling(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 9458 | .padding_left(2) |
| 9459 | .padding_right(2) |
| 9460 | .padding_top(2) |
| 9461 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9462 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc2); |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 9463 | } |
| 9464 | } |
| 9465 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9466 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC2, output_width_gt_4) { |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9467 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9468 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9469 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9470 | .input_width(input_width) |
| 9471 | .input_height(2) |
| 9472 | .kernel_height(5) |
| 9473 | .kernel_width(5) |
| 9474 | .subsampling(2) |
| 9475 | .padding_left(2) |
| 9476 | .padding_right(2) |
| 9477 | .padding_top(2) |
| 9478 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9479 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc2); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9480 | } |
| 9481 | } |
| 9482 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9483 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC2, output_height_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9484 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9485 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 9486 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9487 | DWConv2DMicrokernelTester() |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9488 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9489 | .input_height(input_height) |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9490 | .kernel_height(5) |
| 9491 | .kernel_width(5) |
| 9492 | .subsampling(2) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9493 | .padding_left(2) |
| 9494 | .padding_right(2) |
| 9495 | .padding_top(2) |
| 9496 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9497 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc2); |
| XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 9498 | } |
| 9499 | } |
| 9500 | } |
| 9501 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9502 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC2, output_height_gt_1) { |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 9503 | TEST_REQUIRES_ARM_NEON_FMA; |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9504 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 9505 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9506 | DWConv2DMicrokernelTester() |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 9507 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9508 | .input_height(input_height) |
| 9509 | .kernel_height(5) |
| 9510 | .kernel_width(5) |
| 9511 | .subsampling(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 9512 | .padding_left(2) |
| 9513 | .padding_right(2) |
| 9514 | .padding_top(2) |
| 9515 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9516 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc2); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9517 | } |
| 9518 | } |
| 9519 | } |
| 9520 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9521 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC2, padding_top_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9522 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9523 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 9524 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9525 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9526 | .input_width(input_width) |
| 9527 | .input_height(input_height) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 9528 | .kernel_height(5) |
| 9529 | .kernel_width(5) |
| 9530 | .subsampling(2) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 9531 | .padding_left(2) |
| 9532 | .padding_right(2) |
| 9533 | .padding_top(1) |
| 9534 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 9535 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc2); |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 9536 | } |
| 9537 | } |
| 9538 | } |
| Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 9539 | #endif // XNN_ARCH_ARM64 |
| Erich Elsen | 0cc2c53 | 2019-10-15 04:44:18 -0700 | [diff] [blame] | 9540 | |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 9541 | |
| Marat Dukhan | 30d4b25 | 2020-10-29 16:33:22 -0700 | [diff] [blame] | 9542 | #if XNN_ARCH_ARM64 |
| 9543 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC3, output_width_eq_4) { |
| 9544 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9545 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 9546 | DWConv2DMicrokernelTester() |
| 9547 | .input_width(input_width) |
| 9548 | .input_height(2) |
| 9549 | .kernel_height(5) |
| 9550 | .kernel_width(5) |
| 9551 | .subsampling(2) |
| 9552 | .padding_left(2) |
| 9553 | .padding_right(2) |
| 9554 | .padding_top(2) |
| 9555 | .padding_bottom(2) |
| 9556 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc3); |
| 9557 | } |
| 9558 | } |
| 9559 | |
| 9560 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC3, output_width_div_4) { |
| 9561 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9562 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 9563 | DWConv2DMicrokernelTester() |
| 9564 | .input_width(input_width) |
| 9565 | .input_height(2) |
| 9566 | .kernel_height(5) |
| 9567 | .kernel_width(5) |
| 9568 | .subsampling(2) |
| 9569 | .padding_left(2) |
| 9570 | .padding_right(2) |
| 9571 | .padding_top(2) |
| 9572 | .padding_bottom(2) |
| 9573 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc3); |
| 9574 | } |
| 9575 | } |
| 9576 | |
| 9577 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC3, output_width_lt_4) { |
| 9578 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9579 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 9580 | DWConv2DMicrokernelTester() |
| 9581 | .input_width(8) |
| 9582 | .input_height(2) |
| 9583 | .kernel_height(5) |
| 9584 | .kernel_width(5) |
| 9585 | .subsampling(2) |
| 9586 | .padding_left(2) |
| 9587 | .padding_right(2) |
| 9588 | .padding_top(2) |
| 9589 | .padding_bottom(2) |
| 9590 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc3); |
| 9591 | } |
| 9592 | } |
| 9593 | |
| 9594 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC3, output_width_gt_4) { |
| 9595 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9596 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 9597 | DWConv2DMicrokernelTester() |
| 9598 | .input_width(input_width) |
| 9599 | .input_height(2) |
| 9600 | .kernel_height(5) |
| 9601 | .kernel_width(5) |
| 9602 | .subsampling(2) |
| 9603 | .padding_left(2) |
| 9604 | .padding_right(2) |
| 9605 | .padding_top(2) |
| 9606 | .padding_bottom(2) |
| 9607 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc3); |
| 9608 | } |
| 9609 | } |
| 9610 | |
| 9611 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC3, output_height_eq_1) { |
| 9612 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9613 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 9614 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9615 | DWConv2DMicrokernelTester() |
| 9616 | .input_width(input_width) |
| 9617 | .input_height(input_height) |
| 9618 | .kernel_height(5) |
| 9619 | .kernel_width(5) |
| 9620 | .subsampling(2) |
| 9621 | .padding_left(2) |
| 9622 | .padding_right(2) |
| 9623 | .padding_top(2) |
| 9624 | .padding_bottom(2) |
| 9625 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc3); |
| 9626 | } |
| 9627 | } |
| 9628 | } |
| 9629 | |
| 9630 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC3, output_height_gt_1) { |
| 9631 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9632 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 9633 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9634 | DWConv2DMicrokernelTester() |
| 9635 | .input_width(input_width) |
| 9636 | .input_height(input_height) |
| 9637 | .kernel_height(5) |
| 9638 | .kernel_width(5) |
| 9639 | .subsampling(2) |
| 9640 | .padding_left(2) |
| 9641 | .padding_right(2) |
| 9642 | .padding_top(2) |
| 9643 | .padding_bottom(2) |
| 9644 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc3); |
| 9645 | } |
| 9646 | } |
| 9647 | } |
| 9648 | |
| 9649 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC3, padding_top_eq_1) { |
| 9650 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9651 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 9652 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9653 | DWConv2DMicrokernelTester() |
| 9654 | .input_width(input_width) |
| 9655 | .input_height(input_height) |
| 9656 | .kernel_height(5) |
| 9657 | .kernel_width(5) |
| 9658 | .subsampling(2) |
| 9659 | .padding_left(2) |
| 9660 | .padding_right(2) |
| 9661 | .padding_top(1) |
| 9662 | .padding_bottom(2) |
| 9663 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc3); |
| 9664 | } |
| 9665 | } |
| 9666 | } |
| 9667 | #endif // XNN_ARCH_ARM64 |
| 9668 | |
| 9669 | |
| 9670 | #if XNN_ARCH_ARM64 |
| 9671 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC4, output_width_eq_4) { |
| 9672 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9673 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 9674 | DWConv2DMicrokernelTester() |
| 9675 | .input_width(input_width) |
| 9676 | .input_height(2) |
| 9677 | .kernel_height(5) |
| 9678 | .kernel_width(5) |
| 9679 | .subsampling(2) |
| 9680 | .padding_left(2) |
| 9681 | .padding_right(2) |
| 9682 | .padding_top(2) |
| 9683 | .padding_bottom(2) |
| 9684 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc4); |
| 9685 | } |
| 9686 | } |
| 9687 | |
| 9688 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC4, output_width_div_4) { |
| 9689 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9690 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 9691 | DWConv2DMicrokernelTester() |
| 9692 | .input_width(input_width) |
| 9693 | .input_height(2) |
| 9694 | .kernel_height(5) |
| 9695 | .kernel_width(5) |
| 9696 | .subsampling(2) |
| 9697 | .padding_left(2) |
| 9698 | .padding_right(2) |
| 9699 | .padding_top(2) |
| 9700 | .padding_bottom(2) |
| 9701 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc4); |
| 9702 | } |
| 9703 | } |
| 9704 | |
| 9705 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC4, output_width_lt_4) { |
| 9706 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9707 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 9708 | DWConv2DMicrokernelTester() |
| 9709 | .input_width(8) |
| 9710 | .input_height(2) |
| 9711 | .kernel_height(5) |
| 9712 | .kernel_width(5) |
| 9713 | .subsampling(2) |
| 9714 | .padding_left(2) |
| 9715 | .padding_right(2) |
| 9716 | .padding_top(2) |
| 9717 | .padding_bottom(2) |
| 9718 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc4); |
| 9719 | } |
| 9720 | } |
| 9721 | |
| 9722 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC4, output_width_gt_4) { |
| 9723 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9724 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 9725 | DWConv2DMicrokernelTester() |
| 9726 | .input_width(input_width) |
| 9727 | .input_height(2) |
| 9728 | .kernel_height(5) |
| 9729 | .kernel_width(5) |
| 9730 | .subsampling(2) |
| 9731 | .padding_left(2) |
| 9732 | .padding_right(2) |
| 9733 | .padding_top(2) |
| 9734 | .padding_bottom(2) |
| 9735 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc4); |
| 9736 | } |
| 9737 | } |
| 9738 | |
| 9739 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC4, output_height_eq_1) { |
| 9740 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9741 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 9742 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9743 | DWConv2DMicrokernelTester() |
| 9744 | .input_width(input_width) |
| 9745 | .input_height(input_height) |
| 9746 | .kernel_height(5) |
| 9747 | .kernel_width(5) |
| 9748 | .subsampling(2) |
| 9749 | .padding_left(2) |
| 9750 | .padding_right(2) |
| 9751 | .padding_top(2) |
| 9752 | .padding_bottom(2) |
| 9753 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc4); |
| 9754 | } |
| 9755 | } |
| 9756 | } |
| 9757 | |
| 9758 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC4, output_height_gt_1) { |
| 9759 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9760 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 9761 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9762 | DWConv2DMicrokernelTester() |
| 9763 | .input_width(input_width) |
| 9764 | .input_height(input_height) |
| 9765 | .kernel_height(5) |
| 9766 | .kernel_width(5) |
| 9767 | .subsampling(2) |
| 9768 | .padding_left(2) |
| 9769 | .padding_right(2) |
| 9770 | .padding_top(2) |
| 9771 | .padding_bottom(2) |
| 9772 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc4); |
| 9773 | } |
| 9774 | } |
| 9775 | } |
| 9776 | |
| 9777 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC4, padding_top_eq_1) { |
| 9778 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9779 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 9780 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9781 | DWConv2DMicrokernelTester() |
| 9782 | .input_width(input_width) |
| 9783 | .input_height(input_height) |
| 9784 | .kernel_height(5) |
| 9785 | .kernel_width(5) |
| 9786 | .subsampling(2) |
| 9787 | .padding_left(2) |
| 9788 | .padding_right(2) |
| 9789 | .padding_top(1) |
| 9790 | .padding_bottom(2) |
| 9791 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc4); |
| 9792 | } |
| 9793 | } |
| 9794 | } |
| 9795 | #endif // XNN_ARCH_ARM64 |
| 9796 | |
| 9797 | |
| 9798 | #if XNN_ARCH_ARM64 |
| 9799 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC5, output_width_eq_4) { |
| 9800 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9801 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 9802 | DWConv2DMicrokernelTester() |
| 9803 | .input_width(input_width) |
| 9804 | .input_height(2) |
| 9805 | .kernel_height(5) |
| 9806 | .kernel_width(5) |
| 9807 | .subsampling(2) |
| 9808 | .padding_left(2) |
| 9809 | .padding_right(2) |
| 9810 | .padding_top(2) |
| 9811 | .padding_bottom(2) |
| 9812 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc5); |
| 9813 | } |
| 9814 | } |
| 9815 | |
| 9816 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC5, output_width_div_4) { |
| 9817 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9818 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 9819 | DWConv2DMicrokernelTester() |
| 9820 | .input_width(input_width) |
| 9821 | .input_height(2) |
| 9822 | .kernel_height(5) |
| 9823 | .kernel_width(5) |
| 9824 | .subsampling(2) |
| 9825 | .padding_left(2) |
| 9826 | .padding_right(2) |
| 9827 | .padding_top(2) |
| 9828 | .padding_bottom(2) |
| 9829 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc5); |
| 9830 | } |
| 9831 | } |
| 9832 | |
| 9833 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC5, output_width_lt_4) { |
| 9834 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9835 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 9836 | DWConv2DMicrokernelTester() |
| 9837 | .input_width(8) |
| 9838 | .input_height(2) |
| 9839 | .kernel_height(5) |
| 9840 | .kernel_width(5) |
| 9841 | .subsampling(2) |
| 9842 | .padding_left(2) |
| 9843 | .padding_right(2) |
| 9844 | .padding_top(2) |
| 9845 | .padding_bottom(2) |
| 9846 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc5); |
| 9847 | } |
| 9848 | } |
| 9849 | |
| 9850 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC5, output_width_gt_4) { |
| 9851 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9852 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 9853 | DWConv2DMicrokernelTester() |
| 9854 | .input_width(input_width) |
| 9855 | .input_height(2) |
| 9856 | .kernel_height(5) |
| 9857 | .kernel_width(5) |
| 9858 | .subsampling(2) |
| 9859 | .padding_left(2) |
| 9860 | .padding_right(2) |
| 9861 | .padding_top(2) |
| 9862 | .padding_bottom(2) |
| 9863 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc5); |
| 9864 | } |
| 9865 | } |
| 9866 | |
| 9867 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC5, output_height_eq_1) { |
| 9868 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9869 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 9870 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9871 | DWConv2DMicrokernelTester() |
| 9872 | .input_width(input_width) |
| 9873 | .input_height(input_height) |
| 9874 | .kernel_height(5) |
| 9875 | .kernel_width(5) |
| 9876 | .subsampling(2) |
| 9877 | .padding_left(2) |
| 9878 | .padding_right(2) |
| 9879 | .padding_top(2) |
| 9880 | .padding_bottom(2) |
| 9881 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc5); |
| 9882 | } |
| 9883 | } |
| 9884 | } |
| 9885 | |
| 9886 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC5, output_height_gt_1) { |
| 9887 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9888 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 9889 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9890 | DWConv2DMicrokernelTester() |
| 9891 | .input_width(input_width) |
| 9892 | .input_height(input_height) |
| 9893 | .kernel_height(5) |
| 9894 | .kernel_width(5) |
| 9895 | .subsampling(2) |
| 9896 | .padding_left(2) |
| 9897 | .padding_right(2) |
| 9898 | .padding_top(2) |
| 9899 | .padding_bottom(2) |
| 9900 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc5); |
| 9901 | } |
| 9902 | } |
| 9903 | } |
| 9904 | |
| 9905 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_1X4_ACC5, padding_top_eq_1) { |
| 9906 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9907 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 9908 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9909 | DWConv2DMicrokernelTester() |
| 9910 | .input_width(input_width) |
| 9911 | .input_height(input_height) |
| 9912 | .kernel_height(5) |
| 9913 | .kernel_width(5) |
| 9914 | .subsampling(2) |
| 9915 | .padding_left(2) |
| 9916 | .padding_right(2) |
| 9917 | .padding_top(1) |
| 9918 | .padding_bottom(2) |
| 9919 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc5); |
| 9920 | } |
| 9921 | } |
| 9922 | } |
| 9923 | #endif // XNN_ARCH_ARM64 |
| 9924 | |
| 9925 | |
| 9926 | #if XNN_ARCH_ARM64 |
| 9927 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC2, output_width_eq_4) { |
| 9928 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9929 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 9930 | DWConv2DMicrokernelTester() |
| 9931 | .input_width(input_width) |
| 9932 | .input_height(4) |
| 9933 | .kernel_height(5) |
| 9934 | .kernel_width(5) |
| 9935 | .subsampling(2) |
| 9936 | .padding_left(2) |
| 9937 | .padding_right(2) |
| 9938 | .padding_top(2) |
| 9939 | .padding_bottom(2) |
| 9940 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc2); |
| 9941 | } |
| 9942 | } |
| 9943 | |
| 9944 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC2, output_width_div_4) { |
| 9945 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9946 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 9947 | DWConv2DMicrokernelTester() |
| 9948 | .input_width(input_width) |
| 9949 | .input_height(4) |
| 9950 | .kernel_height(5) |
| 9951 | .kernel_width(5) |
| 9952 | .subsampling(2) |
| 9953 | .padding_left(2) |
| 9954 | .padding_right(2) |
| 9955 | .padding_top(2) |
| 9956 | .padding_bottom(2) |
| 9957 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc2); |
| 9958 | } |
| 9959 | } |
| 9960 | |
| 9961 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC2, output_width_lt_4) { |
| 9962 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9963 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 9964 | DWConv2DMicrokernelTester() |
| 9965 | .input_width(8) |
| 9966 | .input_height(4) |
| 9967 | .kernel_height(5) |
| 9968 | .kernel_width(5) |
| 9969 | .subsampling(2) |
| 9970 | .padding_left(2) |
| 9971 | .padding_right(2) |
| 9972 | .padding_top(2) |
| 9973 | .padding_bottom(2) |
| 9974 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc2); |
| 9975 | } |
| 9976 | } |
| 9977 | |
| 9978 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC2, output_width_gt_4) { |
| 9979 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9980 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 9981 | DWConv2DMicrokernelTester() |
| 9982 | .input_width(input_width) |
| 9983 | .input_height(4) |
| 9984 | .kernel_height(5) |
| 9985 | .kernel_width(5) |
| 9986 | .subsampling(2) |
| 9987 | .padding_left(2) |
| 9988 | .padding_right(2) |
| 9989 | .padding_top(2) |
| 9990 | .padding_bottom(2) |
| 9991 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc2); |
| 9992 | } |
| 9993 | } |
| 9994 | |
| 9995 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC2, output_height_eq_2) { |
| 9996 | TEST_REQUIRES_ARM_NEON_FMA; |
| 9997 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 9998 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 9999 | DWConv2DMicrokernelTester() |
| 10000 | .input_width(input_width) |
| 10001 | .input_height(input_height) |
| 10002 | .kernel_height(5) |
| 10003 | .kernel_width(5) |
| 10004 | .subsampling(2) |
| 10005 | .padding_left(2) |
| 10006 | .padding_right(2) |
| 10007 | .padding_top(2) |
| 10008 | .padding_bottom(2) |
| 10009 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc2); |
| 10010 | } |
| 10011 | } |
| 10012 | } |
| 10013 | |
| 10014 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC2, output_height_div_2) { |
| 10015 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10016 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 10017 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10018 | DWConv2DMicrokernelTester() |
| 10019 | .input_width(input_width) |
| 10020 | .input_height(input_height) |
| 10021 | .kernel_height(5) |
| 10022 | .kernel_width(5) |
| 10023 | .subsampling(2) |
| 10024 | .padding_left(2) |
| 10025 | .padding_right(2) |
| 10026 | .padding_top(2) |
| 10027 | .padding_bottom(2) |
| 10028 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc2); |
| 10029 | } |
| 10030 | } |
| 10031 | } |
| 10032 | |
| 10033 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC2, output_height_lt_2) { |
| 10034 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10035 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 10036 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10037 | DWConv2DMicrokernelTester() |
| 10038 | .input_width(input_width) |
| 10039 | .input_height(input_height) |
| 10040 | .kernel_height(5) |
| 10041 | .kernel_width(5) |
| 10042 | .subsampling(2) |
| 10043 | .padding_left(2) |
| 10044 | .padding_right(2) |
| 10045 | .padding_top(2) |
| 10046 | .padding_bottom(2) |
| 10047 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc2); |
| 10048 | } |
| 10049 | } |
| 10050 | } |
| 10051 | |
| 10052 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC2, output_height_gt_2) { |
| 10053 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10054 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 10055 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10056 | DWConv2DMicrokernelTester() |
| 10057 | .input_width(input_width) |
| 10058 | .input_height(input_height) |
| 10059 | .kernel_height(5) |
| 10060 | .kernel_width(5) |
| 10061 | .subsampling(2) |
| 10062 | .padding_left(2) |
| 10063 | .padding_right(2) |
| 10064 | .padding_top(2) |
| 10065 | .padding_bottom(2) |
| 10066 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc2); |
| 10067 | } |
| 10068 | } |
| 10069 | } |
| 10070 | |
| 10071 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC2, padding_top_eq_1) { |
| 10072 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10073 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 10074 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10075 | DWConv2DMicrokernelTester() |
| 10076 | .input_width(input_width) |
| 10077 | .input_height(input_height) |
| 10078 | .kernel_height(5) |
| 10079 | .kernel_width(5) |
| 10080 | .subsampling(2) |
| 10081 | .padding_left(2) |
| 10082 | .padding_right(2) |
| 10083 | .padding_top(1) |
| 10084 | .padding_bottom(2) |
| 10085 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc2); |
| 10086 | } |
| 10087 | } |
| 10088 | } |
| 10089 | #endif // XNN_ARCH_ARM64 |
| 10090 | |
| 10091 | |
| 10092 | #if XNN_ARCH_ARM64 |
| 10093 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC3, output_width_eq_4) { |
| 10094 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10095 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 10096 | DWConv2DMicrokernelTester() |
| 10097 | .input_width(input_width) |
| 10098 | .input_height(4) |
| 10099 | .kernel_height(5) |
| 10100 | .kernel_width(5) |
| 10101 | .subsampling(2) |
| 10102 | .padding_left(2) |
| 10103 | .padding_right(2) |
| 10104 | .padding_top(2) |
| 10105 | .padding_bottom(2) |
| 10106 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc3); |
| 10107 | } |
| 10108 | } |
| 10109 | |
| 10110 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC3, output_width_div_4) { |
| 10111 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10112 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 10113 | DWConv2DMicrokernelTester() |
| 10114 | .input_width(input_width) |
| 10115 | .input_height(4) |
| 10116 | .kernel_height(5) |
| 10117 | .kernel_width(5) |
| 10118 | .subsampling(2) |
| 10119 | .padding_left(2) |
| 10120 | .padding_right(2) |
| 10121 | .padding_top(2) |
| 10122 | .padding_bottom(2) |
| 10123 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc3); |
| 10124 | } |
| 10125 | } |
| 10126 | |
| 10127 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC3, output_width_lt_4) { |
| 10128 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10129 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 10130 | DWConv2DMicrokernelTester() |
| 10131 | .input_width(8) |
| 10132 | .input_height(4) |
| 10133 | .kernel_height(5) |
| 10134 | .kernel_width(5) |
| 10135 | .subsampling(2) |
| 10136 | .padding_left(2) |
| 10137 | .padding_right(2) |
| 10138 | .padding_top(2) |
| 10139 | .padding_bottom(2) |
| 10140 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc3); |
| 10141 | } |
| 10142 | } |
| 10143 | |
| 10144 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC3, output_width_gt_4) { |
| 10145 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10146 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 10147 | DWConv2DMicrokernelTester() |
| 10148 | .input_width(input_width) |
| 10149 | .input_height(4) |
| 10150 | .kernel_height(5) |
| 10151 | .kernel_width(5) |
| 10152 | .subsampling(2) |
| 10153 | .padding_left(2) |
| 10154 | .padding_right(2) |
| 10155 | .padding_top(2) |
| 10156 | .padding_bottom(2) |
| 10157 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc3); |
| 10158 | } |
| 10159 | } |
| 10160 | |
| 10161 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC3, output_height_eq_2) { |
| 10162 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10163 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 10164 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10165 | DWConv2DMicrokernelTester() |
| 10166 | .input_width(input_width) |
| 10167 | .input_height(input_height) |
| 10168 | .kernel_height(5) |
| 10169 | .kernel_width(5) |
| 10170 | .subsampling(2) |
| 10171 | .padding_left(2) |
| 10172 | .padding_right(2) |
| 10173 | .padding_top(2) |
| 10174 | .padding_bottom(2) |
| 10175 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc3); |
| 10176 | } |
| 10177 | } |
| 10178 | } |
| 10179 | |
| 10180 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC3, output_height_div_2) { |
| 10181 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10182 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 10183 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10184 | DWConv2DMicrokernelTester() |
| 10185 | .input_width(input_width) |
| 10186 | .input_height(input_height) |
| 10187 | .kernel_height(5) |
| 10188 | .kernel_width(5) |
| 10189 | .subsampling(2) |
| 10190 | .padding_left(2) |
| 10191 | .padding_right(2) |
| 10192 | .padding_top(2) |
| 10193 | .padding_bottom(2) |
| 10194 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc3); |
| 10195 | } |
| 10196 | } |
| 10197 | } |
| 10198 | |
| 10199 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC3, output_height_lt_2) { |
| 10200 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10201 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 10202 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10203 | DWConv2DMicrokernelTester() |
| 10204 | .input_width(input_width) |
| 10205 | .input_height(input_height) |
| 10206 | .kernel_height(5) |
| 10207 | .kernel_width(5) |
| 10208 | .subsampling(2) |
| 10209 | .padding_left(2) |
| 10210 | .padding_right(2) |
| 10211 | .padding_top(2) |
| 10212 | .padding_bottom(2) |
| 10213 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc3); |
| 10214 | } |
| 10215 | } |
| 10216 | } |
| 10217 | |
| 10218 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC3, output_height_gt_2) { |
| 10219 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10220 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 10221 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10222 | DWConv2DMicrokernelTester() |
| 10223 | .input_width(input_width) |
| 10224 | .input_height(input_height) |
| 10225 | .kernel_height(5) |
| 10226 | .kernel_width(5) |
| 10227 | .subsampling(2) |
| 10228 | .padding_left(2) |
| 10229 | .padding_right(2) |
| 10230 | .padding_top(2) |
| 10231 | .padding_bottom(2) |
| 10232 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc3); |
| 10233 | } |
| 10234 | } |
| 10235 | } |
| 10236 | |
| 10237 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_2X4_ACC3, padding_top_eq_1) { |
| 10238 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10239 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 10240 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10241 | DWConv2DMicrokernelTester() |
| 10242 | .input_width(input_width) |
| 10243 | .input_height(input_height) |
| 10244 | .kernel_height(5) |
| 10245 | .kernel_width(5) |
| 10246 | .subsampling(2) |
| 10247 | .padding_left(2) |
| 10248 | .padding_right(2) |
| 10249 | .padding_top(1) |
| 10250 | .padding_bottom(2) |
| 10251 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc3); |
| 10252 | } |
| 10253 | } |
| 10254 | } |
| 10255 | #endif // XNN_ARCH_ARM64 |
| 10256 | |
| 10257 | |
| 10258 | #if XNN_ARCH_ARM64 |
| 10259 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4_ACC2, output_width_eq_4) { |
| 10260 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10261 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 10262 | DWConv2DMicrokernelTester() |
| 10263 | .input_width(input_width) |
| 10264 | .input_height(6) |
| 10265 | .kernel_height(5) |
| 10266 | .kernel_width(5) |
| 10267 | .subsampling(2) |
| 10268 | .padding_left(2) |
| 10269 | .padding_right(2) |
| 10270 | .padding_top(2) |
| 10271 | .padding_bottom(2) |
| 10272 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4_acc2); |
| 10273 | } |
| 10274 | } |
| 10275 | |
| 10276 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4_ACC2, output_width_div_4) { |
| 10277 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10278 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 10279 | DWConv2DMicrokernelTester() |
| 10280 | .input_width(input_width) |
| 10281 | .input_height(6) |
| 10282 | .kernel_height(5) |
| 10283 | .kernel_width(5) |
| 10284 | .subsampling(2) |
| 10285 | .padding_left(2) |
| 10286 | .padding_right(2) |
| 10287 | .padding_top(2) |
| 10288 | .padding_bottom(2) |
| 10289 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4_acc2); |
| 10290 | } |
| 10291 | } |
| 10292 | |
| 10293 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4_ACC2, output_width_lt_4) { |
| 10294 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10295 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 10296 | DWConv2DMicrokernelTester() |
| 10297 | .input_width(8) |
| 10298 | .input_height(6) |
| 10299 | .kernel_height(5) |
| 10300 | .kernel_width(5) |
| 10301 | .subsampling(2) |
| 10302 | .padding_left(2) |
| 10303 | .padding_right(2) |
| 10304 | .padding_top(2) |
| 10305 | .padding_bottom(2) |
| 10306 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4_acc2); |
| 10307 | } |
| 10308 | } |
| 10309 | |
| 10310 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4_ACC2, output_width_gt_4) { |
| 10311 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10312 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 10313 | DWConv2DMicrokernelTester() |
| 10314 | .input_width(input_width) |
| 10315 | .input_height(6) |
| 10316 | .kernel_height(5) |
| 10317 | .kernel_width(5) |
| 10318 | .subsampling(2) |
| 10319 | .padding_left(2) |
| 10320 | .padding_right(2) |
| 10321 | .padding_top(2) |
| 10322 | .padding_bottom(2) |
| 10323 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4_acc2); |
| 10324 | } |
| 10325 | } |
| 10326 | |
| 10327 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4_ACC2, output_height_eq_3) { |
| 10328 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10329 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 10330 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10331 | DWConv2DMicrokernelTester() |
| 10332 | .input_width(input_width) |
| 10333 | .input_height(input_height) |
| 10334 | .kernel_height(5) |
| 10335 | .kernel_width(5) |
| 10336 | .subsampling(2) |
| 10337 | .padding_left(2) |
| 10338 | .padding_right(2) |
| 10339 | .padding_top(2) |
| 10340 | .padding_bottom(2) |
| 10341 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4_acc2); |
| 10342 | } |
| 10343 | } |
| 10344 | } |
| 10345 | |
| 10346 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4_ACC2, output_height_div_3) { |
| 10347 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10348 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 10349 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10350 | DWConv2DMicrokernelTester() |
| 10351 | .input_width(input_width) |
| 10352 | .input_height(input_height) |
| 10353 | .kernel_height(5) |
| 10354 | .kernel_width(5) |
| 10355 | .subsampling(2) |
| 10356 | .padding_left(2) |
| 10357 | .padding_right(2) |
| 10358 | .padding_top(2) |
| 10359 | .padding_bottom(2) |
| 10360 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4_acc2); |
| 10361 | } |
| 10362 | } |
| 10363 | } |
| 10364 | |
| 10365 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4_ACC2, output_height_lt_3) { |
| 10366 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10367 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 10368 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10369 | DWConv2DMicrokernelTester() |
| 10370 | .input_width(input_width) |
| 10371 | .input_height(input_height) |
| 10372 | .kernel_height(5) |
| 10373 | .kernel_width(5) |
| 10374 | .subsampling(2) |
| 10375 | .padding_left(2) |
| 10376 | .padding_right(2) |
| 10377 | .padding_top(2) |
| 10378 | .padding_bottom(2) |
| 10379 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4_acc2); |
| 10380 | } |
| 10381 | } |
| 10382 | } |
| 10383 | |
| 10384 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4_ACC2, output_height_gt_3) { |
| 10385 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10386 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 10387 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10388 | DWConv2DMicrokernelTester() |
| 10389 | .input_width(input_width) |
| 10390 | .input_height(input_height) |
| 10391 | .kernel_height(5) |
| 10392 | .kernel_width(5) |
| 10393 | .subsampling(2) |
| 10394 | .padding_left(2) |
| 10395 | .padding_right(2) |
| 10396 | .padding_top(2) |
| 10397 | .padding_bottom(2) |
| 10398 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4_acc2); |
| 10399 | } |
| 10400 | } |
| 10401 | } |
| 10402 | |
| 10403 | TEST(F32_DWCONV2D_CHW_5X5S2P2__NEONFMA_3X4_ACC2, padding_top_eq_1) { |
| 10404 | TEST_REQUIRES_ARM_NEON_FMA; |
| 10405 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 10406 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 10407 | DWConv2DMicrokernelTester() |
| 10408 | .input_width(input_width) |
| 10409 | .input_height(input_height) |
| 10410 | .kernel_height(5) |
| 10411 | .kernel_width(5) |
| 10412 | .subsampling(2) |
| 10413 | .padding_left(2) |
| 10414 | .padding_right(2) |
| 10415 | .padding_top(1) |
| 10416 | .padding_bottom(2) |
| 10417 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4_acc2); |
| 10418 | } |
| 10419 | } |
| 10420 | } |
| 10421 | #endif // XNN_ARCH_ARM64 |
| 10422 | |
| 10423 | |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 10424 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| Marat Dukhan | 470078a | 2020-10-23 22:36:52 -0700 | [diff] [blame] | 10425 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4, output_width_eq_4) { |
| 10426 | TEST_REQUIRES_X86_SSE; |
| 10427 | DWConv2DMicrokernelTester() |
| 10428 | .input_width(4) |
| 10429 | .input_height(1) |
| 10430 | .kernel_height(3) |
| 10431 | .kernel_width(3) |
| 10432 | .subsampling(1) |
| 10433 | .padding_left(1) |
| 10434 | .padding_right(1) |
| 10435 | .padding_top(1) |
| 10436 | .padding_bottom(1) |
| 10437 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4); |
| 10438 | } |
| 10439 | |
| 10440 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4, output_width_div_4) { |
| 10441 | TEST_REQUIRES_X86_SSE; |
| 10442 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 10443 | DWConv2DMicrokernelTester() |
| 10444 | .input_width(input_width) |
| 10445 | .input_height(1) |
| 10446 | .kernel_height(3) |
| 10447 | .kernel_width(3) |
| 10448 | .subsampling(1) |
| 10449 | .padding_left(1) |
| 10450 | .padding_right(1) |
| 10451 | .padding_top(1) |
| 10452 | .padding_bottom(1) |
| 10453 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4); |
| 10454 | } |
| 10455 | } |
| 10456 | |
| 10457 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4, output_width_lt_4) { |
| 10458 | TEST_REQUIRES_X86_SSE; |
| 10459 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 10460 | DWConv2DMicrokernelTester() |
| 10461 | .input_width(4) |
| 10462 | .input_height(1) |
| 10463 | .kernel_height(3) |
| 10464 | .kernel_width(3) |
| 10465 | .subsampling(1) |
| 10466 | .padding_left(1) |
| 10467 | .padding_right(1) |
| 10468 | .padding_top(1) |
| 10469 | .padding_bottom(1) |
| 10470 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4); |
| 10471 | } |
| 10472 | } |
| 10473 | |
| 10474 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4, output_width_gt_4) { |
| 10475 | TEST_REQUIRES_X86_SSE; |
| 10476 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 10477 | DWConv2DMicrokernelTester() |
| 10478 | .input_width(input_width) |
| 10479 | .input_height(1) |
| 10480 | .kernel_height(3) |
| 10481 | .kernel_width(3) |
| 10482 | .subsampling(1) |
| 10483 | .padding_left(1) |
| 10484 | .padding_right(1) |
| 10485 | .padding_top(1) |
| 10486 | .padding_bottom(1) |
| 10487 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4); |
| 10488 | } |
| 10489 | } |
| 10490 | |
| 10491 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4, output_height_gt_1) { |
| 10492 | TEST_REQUIRES_X86_SSE; |
| 10493 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 10494 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 10495 | DWConv2DMicrokernelTester() |
| 10496 | .input_width(input_width) |
| 10497 | .input_height(input_height) |
| 10498 | .kernel_height(3) |
| 10499 | .kernel_width(3) |
| 10500 | .subsampling(1) |
| 10501 | .padding_left(1) |
| 10502 | .padding_right(1) |
| 10503 | .padding_top(1) |
| 10504 | .padding_bottom(1) |
| 10505 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4); |
| 10506 | } |
| 10507 | } |
| 10508 | } |
| 10509 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 10510 | |
| 10511 | |
| 10512 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 10513 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4, output_width_eq_4) { |
| 10514 | TEST_REQUIRES_X86_SSE; |
| 10515 | DWConv2DMicrokernelTester() |
| 10516 | .input_width(4) |
| 10517 | .input_height(2) |
| 10518 | .kernel_height(3) |
| 10519 | .kernel_width(3) |
| 10520 | .subsampling(1) |
| 10521 | .padding_left(1) |
| 10522 | .padding_right(1) |
| 10523 | .padding_top(1) |
| 10524 | .padding_bottom(1) |
| 10525 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4); |
| 10526 | } |
| 10527 | |
| 10528 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4, output_width_div_4) { |
| 10529 | TEST_REQUIRES_X86_SSE; |
| 10530 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 10531 | DWConv2DMicrokernelTester() |
| 10532 | .input_width(input_width) |
| 10533 | .input_height(2) |
| 10534 | .kernel_height(3) |
| 10535 | .kernel_width(3) |
| 10536 | .subsampling(1) |
| 10537 | .padding_left(1) |
| 10538 | .padding_right(1) |
| 10539 | .padding_top(1) |
| 10540 | .padding_bottom(1) |
| 10541 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4); |
| 10542 | } |
| 10543 | } |
| 10544 | |
| 10545 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4, output_width_lt_4) { |
| 10546 | TEST_REQUIRES_X86_SSE; |
| 10547 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 10548 | DWConv2DMicrokernelTester() |
| 10549 | .input_width(4) |
| 10550 | .input_height(2) |
| 10551 | .kernel_height(3) |
| 10552 | .kernel_width(3) |
| 10553 | .subsampling(1) |
| 10554 | .padding_left(1) |
| 10555 | .padding_right(1) |
| 10556 | .padding_top(1) |
| 10557 | .padding_bottom(1) |
| 10558 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4); |
| 10559 | } |
| 10560 | } |
| 10561 | |
| 10562 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4, output_width_gt_4) { |
| 10563 | TEST_REQUIRES_X86_SSE; |
| 10564 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 10565 | DWConv2DMicrokernelTester() |
| 10566 | .input_width(input_width) |
| 10567 | .input_height(2) |
| 10568 | .kernel_height(3) |
| 10569 | .kernel_width(3) |
| 10570 | .subsampling(1) |
| 10571 | .padding_left(1) |
| 10572 | .padding_right(1) |
| 10573 | .padding_top(1) |
| 10574 | .padding_bottom(1) |
| 10575 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4); |
| 10576 | } |
| 10577 | } |
| 10578 | |
| 10579 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4, output_height_div_2) { |
| 10580 | TEST_REQUIRES_X86_SSE; |
| 10581 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 10582 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 10583 | DWConv2DMicrokernelTester() |
| 10584 | .input_width(input_width) |
| 10585 | .input_height(input_height) |
| 10586 | .kernel_height(3) |
| 10587 | .kernel_width(3) |
| 10588 | .subsampling(1) |
| 10589 | .padding_left(1) |
| 10590 | .padding_right(1) |
| 10591 | .padding_top(1) |
| 10592 | .padding_bottom(1) |
| 10593 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4); |
| 10594 | } |
| 10595 | } |
| 10596 | } |
| 10597 | |
| 10598 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4, output_height_lt_2) { |
| 10599 | TEST_REQUIRES_X86_SSE; |
| 10600 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 10601 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 10602 | DWConv2DMicrokernelTester() |
| 10603 | .input_width(input_width) |
| 10604 | .input_height(input_height) |
| 10605 | .kernel_height(3) |
| 10606 | .kernel_width(3) |
| 10607 | .subsampling(1) |
| 10608 | .padding_left(1) |
| 10609 | .padding_right(1) |
| 10610 | .padding_top(1) |
| 10611 | .padding_bottom(1) |
| 10612 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4); |
| 10613 | } |
| 10614 | } |
| 10615 | } |
| 10616 | |
| 10617 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4, output_height_gt_2) { |
| 10618 | TEST_REQUIRES_X86_SSE; |
| 10619 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 10620 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 10621 | DWConv2DMicrokernelTester() |
| 10622 | .input_width(input_width) |
| 10623 | .input_height(input_height) |
| 10624 | .kernel_height(3) |
| 10625 | .kernel_width(3) |
| 10626 | .subsampling(1) |
| 10627 | .padding_left(1) |
| 10628 | .padding_right(1) |
| 10629 | .padding_top(1) |
| 10630 | .padding_bottom(1) |
| 10631 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4); |
| 10632 | } |
| 10633 | } |
| 10634 | } |
| 10635 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 10636 | |
| 10637 | |
| 10638 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 10639 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_3X4, output_width_eq_4) { |
| 10640 | TEST_REQUIRES_X86_SSE; |
| 10641 | DWConv2DMicrokernelTester() |
| 10642 | .input_width(4) |
| 10643 | .input_height(3) |
| 10644 | .kernel_height(3) |
| 10645 | .kernel_width(3) |
| 10646 | .subsampling(1) |
| 10647 | .padding_left(1) |
| 10648 | .padding_right(1) |
| 10649 | .padding_top(1) |
| 10650 | .padding_bottom(1) |
| 10651 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_3x4); |
| 10652 | } |
| 10653 | |
| 10654 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_3X4, output_width_div_4) { |
| 10655 | TEST_REQUIRES_X86_SSE; |
| 10656 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 10657 | DWConv2DMicrokernelTester() |
| 10658 | .input_width(input_width) |
| 10659 | .input_height(3) |
| 10660 | .kernel_height(3) |
| 10661 | .kernel_width(3) |
| 10662 | .subsampling(1) |
| 10663 | .padding_left(1) |
| 10664 | .padding_right(1) |
| 10665 | .padding_top(1) |
| 10666 | .padding_bottom(1) |
| 10667 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_3x4); |
| 10668 | } |
| 10669 | } |
| 10670 | |
| 10671 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_3X4, output_width_lt_4) { |
| 10672 | TEST_REQUIRES_X86_SSE; |
| 10673 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 10674 | DWConv2DMicrokernelTester() |
| 10675 | .input_width(4) |
| 10676 | .input_height(3) |
| 10677 | .kernel_height(3) |
| 10678 | .kernel_width(3) |
| 10679 | .subsampling(1) |
| 10680 | .padding_left(1) |
| 10681 | .padding_right(1) |
| 10682 | .padding_top(1) |
| 10683 | .padding_bottom(1) |
| 10684 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_3x4); |
| 10685 | } |
| 10686 | } |
| 10687 | |
| 10688 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_3X4, output_width_gt_4) { |
| 10689 | TEST_REQUIRES_X86_SSE; |
| 10690 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 10691 | DWConv2DMicrokernelTester() |
| 10692 | .input_width(input_width) |
| 10693 | .input_height(3) |
| 10694 | .kernel_height(3) |
| 10695 | .kernel_width(3) |
| 10696 | .subsampling(1) |
| 10697 | .padding_left(1) |
| 10698 | .padding_right(1) |
| 10699 | .padding_top(1) |
| 10700 | .padding_bottom(1) |
| 10701 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_3x4); |
| 10702 | } |
| 10703 | } |
| 10704 | |
| 10705 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_3X4, output_height_div_3) { |
| 10706 | TEST_REQUIRES_X86_SSE; |
| 10707 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 10708 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 10709 | DWConv2DMicrokernelTester() |
| 10710 | .input_width(input_width) |
| 10711 | .input_height(input_height) |
| 10712 | .kernel_height(3) |
| 10713 | .kernel_width(3) |
| 10714 | .subsampling(1) |
| 10715 | .padding_left(1) |
| 10716 | .padding_right(1) |
| 10717 | .padding_top(1) |
| 10718 | .padding_bottom(1) |
| 10719 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_3x4); |
| 10720 | } |
| 10721 | } |
| 10722 | } |
| 10723 | |
| 10724 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_3X4, output_height_lt_3) { |
| 10725 | TEST_REQUIRES_X86_SSE; |
| 10726 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 10727 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 10728 | DWConv2DMicrokernelTester() |
| 10729 | .input_width(input_width) |
| 10730 | .input_height(input_height) |
| 10731 | .kernel_height(3) |
| 10732 | .kernel_width(3) |
| 10733 | .subsampling(1) |
| 10734 | .padding_left(1) |
| 10735 | .padding_right(1) |
| 10736 | .padding_top(1) |
| 10737 | .padding_bottom(1) |
| 10738 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_3x4); |
| 10739 | } |
| 10740 | } |
| 10741 | } |
| 10742 | |
| 10743 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_3X4, output_height_gt_3) { |
| 10744 | TEST_REQUIRES_X86_SSE; |
| 10745 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 10746 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 10747 | DWConv2DMicrokernelTester() |
| 10748 | .input_width(input_width) |
| 10749 | .input_height(input_height) |
| 10750 | .kernel_height(3) |
| 10751 | .kernel_width(3) |
| 10752 | .subsampling(1) |
| 10753 | .padding_left(1) |
| 10754 | .padding_right(1) |
| 10755 | .padding_top(1) |
| 10756 | .padding_bottom(1) |
| 10757 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_3x4); |
| 10758 | } |
| 10759 | } |
| 10760 | } |
| 10761 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 10762 | |
| 10763 | |
| 10764 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 10765 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_4X4, output_width_eq_4) { |
| 10766 | TEST_REQUIRES_X86_SSE; |
| 10767 | DWConv2DMicrokernelTester() |
| 10768 | .input_width(4) |
| 10769 | .input_height(4) |
| 10770 | .kernel_height(3) |
| 10771 | .kernel_width(3) |
| 10772 | .subsampling(1) |
| 10773 | .padding_left(1) |
| 10774 | .padding_right(1) |
| 10775 | .padding_top(1) |
| 10776 | .padding_bottom(1) |
| 10777 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_4x4); |
| 10778 | } |
| 10779 | |
| 10780 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_4X4, output_width_div_4) { |
| 10781 | TEST_REQUIRES_X86_SSE; |
| 10782 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 10783 | DWConv2DMicrokernelTester() |
| 10784 | .input_width(input_width) |
| 10785 | .input_height(4) |
| 10786 | .kernel_height(3) |
| 10787 | .kernel_width(3) |
| 10788 | .subsampling(1) |
| 10789 | .padding_left(1) |
| 10790 | .padding_right(1) |
| 10791 | .padding_top(1) |
| 10792 | .padding_bottom(1) |
| 10793 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_4x4); |
| 10794 | } |
| 10795 | } |
| 10796 | |
| 10797 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_4X4, output_width_lt_4) { |
| 10798 | TEST_REQUIRES_X86_SSE; |
| 10799 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 10800 | DWConv2DMicrokernelTester() |
| 10801 | .input_width(4) |
| 10802 | .input_height(4) |
| 10803 | .kernel_height(3) |
| 10804 | .kernel_width(3) |
| 10805 | .subsampling(1) |
| 10806 | .padding_left(1) |
| 10807 | .padding_right(1) |
| 10808 | .padding_top(1) |
| 10809 | .padding_bottom(1) |
| 10810 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_4x4); |
| 10811 | } |
| 10812 | } |
| 10813 | |
| 10814 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_4X4, output_width_gt_4) { |
| 10815 | TEST_REQUIRES_X86_SSE; |
| 10816 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 10817 | DWConv2DMicrokernelTester() |
| 10818 | .input_width(input_width) |
| 10819 | .input_height(4) |
| 10820 | .kernel_height(3) |
| 10821 | .kernel_width(3) |
| 10822 | .subsampling(1) |
| 10823 | .padding_left(1) |
| 10824 | .padding_right(1) |
| 10825 | .padding_top(1) |
| 10826 | .padding_bottom(1) |
| 10827 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_4x4); |
| 10828 | } |
| 10829 | } |
| 10830 | |
| 10831 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_4X4, output_height_div_4) { |
| 10832 | TEST_REQUIRES_X86_SSE; |
| 10833 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 10834 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 10835 | DWConv2DMicrokernelTester() |
| 10836 | .input_width(input_width) |
| 10837 | .input_height(input_height) |
| 10838 | .kernel_height(3) |
| 10839 | .kernel_width(3) |
| 10840 | .subsampling(1) |
| 10841 | .padding_left(1) |
| 10842 | .padding_right(1) |
| 10843 | .padding_top(1) |
| 10844 | .padding_bottom(1) |
| 10845 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_4x4); |
| 10846 | } |
| 10847 | } |
| 10848 | } |
| 10849 | |
| 10850 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_4X4, output_height_lt_4) { |
| 10851 | TEST_REQUIRES_X86_SSE; |
| 10852 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 10853 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 10854 | DWConv2DMicrokernelTester() |
| 10855 | .input_width(input_width) |
| 10856 | .input_height(input_height) |
| 10857 | .kernel_height(3) |
| 10858 | .kernel_width(3) |
| 10859 | .subsampling(1) |
| 10860 | .padding_left(1) |
| 10861 | .padding_right(1) |
| 10862 | .padding_top(1) |
| 10863 | .padding_bottom(1) |
| 10864 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_4x4); |
| 10865 | } |
| 10866 | } |
| 10867 | } |
| 10868 | |
| 10869 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_4X4, output_height_gt_4) { |
| 10870 | TEST_REQUIRES_X86_SSE; |
| 10871 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 10872 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 10873 | DWConv2DMicrokernelTester() |
| 10874 | .input_width(input_width) |
| 10875 | .input_height(input_height) |
| 10876 | .kernel_height(3) |
| 10877 | .kernel_width(3) |
| 10878 | .subsampling(1) |
| 10879 | .padding_left(1) |
| 10880 | .padding_right(1) |
| 10881 | .padding_top(1) |
| 10882 | .padding_bottom(1) |
| 10883 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_4x4); |
| 10884 | } |
| 10885 | } |
| 10886 | } |
| 10887 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 10888 | |
| 10889 | |
| 10890 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 10891 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_5X4, output_width_eq_4) { |
| 10892 | TEST_REQUIRES_X86_SSE; |
| 10893 | DWConv2DMicrokernelTester() |
| 10894 | .input_width(4) |
| 10895 | .input_height(5) |
| 10896 | .kernel_height(3) |
| 10897 | .kernel_width(3) |
| 10898 | .subsampling(1) |
| 10899 | .padding_left(1) |
| 10900 | .padding_right(1) |
| 10901 | .padding_top(1) |
| 10902 | .padding_bottom(1) |
| 10903 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_5x4); |
| 10904 | } |
| 10905 | |
| 10906 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_5X4, output_width_div_4) { |
| 10907 | TEST_REQUIRES_X86_SSE; |
| 10908 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 10909 | DWConv2DMicrokernelTester() |
| 10910 | .input_width(input_width) |
| 10911 | .input_height(5) |
| 10912 | .kernel_height(3) |
| 10913 | .kernel_width(3) |
| 10914 | .subsampling(1) |
| 10915 | .padding_left(1) |
| 10916 | .padding_right(1) |
| 10917 | .padding_top(1) |
| 10918 | .padding_bottom(1) |
| 10919 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_5x4); |
| 10920 | } |
| 10921 | } |
| 10922 | |
| 10923 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_5X4, output_width_lt_4) { |
| 10924 | TEST_REQUIRES_X86_SSE; |
| 10925 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 10926 | DWConv2DMicrokernelTester() |
| 10927 | .input_width(4) |
| 10928 | .input_height(5) |
| 10929 | .kernel_height(3) |
| 10930 | .kernel_width(3) |
| 10931 | .subsampling(1) |
| 10932 | .padding_left(1) |
| 10933 | .padding_right(1) |
| 10934 | .padding_top(1) |
| 10935 | .padding_bottom(1) |
| 10936 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_5x4); |
| 10937 | } |
| 10938 | } |
| 10939 | |
| 10940 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_5X4, output_width_gt_4) { |
| 10941 | TEST_REQUIRES_X86_SSE; |
| 10942 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 10943 | DWConv2DMicrokernelTester() |
| 10944 | .input_width(input_width) |
| 10945 | .input_height(5) |
| 10946 | .kernel_height(3) |
| 10947 | .kernel_width(3) |
| 10948 | .subsampling(1) |
| 10949 | .padding_left(1) |
| 10950 | .padding_right(1) |
| 10951 | .padding_top(1) |
| 10952 | .padding_bottom(1) |
| 10953 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_5x4); |
| 10954 | } |
| 10955 | } |
| 10956 | |
| 10957 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_5X4, output_height_div_5) { |
| 10958 | TEST_REQUIRES_X86_SSE; |
| 10959 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 10960 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 10961 | DWConv2DMicrokernelTester() |
| 10962 | .input_width(input_width) |
| 10963 | .input_height(input_height) |
| 10964 | .kernel_height(3) |
| 10965 | .kernel_width(3) |
| 10966 | .subsampling(1) |
| 10967 | .padding_left(1) |
| 10968 | .padding_right(1) |
| 10969 | .padding_top(1) |
| 10970 | .padding_bottom(1) |
| 10971 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_5x4); |
| 10972 | } |
| 10973 | } |
| 10974 | } |
| 10975 | |
| 10976 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_5X4, output_height_lt_5) { |
| 10977 | TEST_REQUIRES_X86_SSE; |
| 10978 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 10979 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 10980 | DWConv2DMicrokernelTester() |
| 10981 | .input_width(input_width) |
| 10982 | .input_height(input_height) |
| 10983 | .kernel_height(3) |
| 10984 | .kernel_width(3) |
| 10985 | .subsampling(1) |
| 10986 | .padding_left(1) |
| 10987 | .padding_right(1) |
| 10988 | .padding_top(1) |
| 10989 | .padding_bottom(1) |
| 10990 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_5x4); |
| 10991 | } |
| 10992 | } |
| 10993 | } |
| 10994 | |
| 10995 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_5X4, output_height_gt_5) { |
| 10996 | TEST_REQUIRES_X86_SSE; |
| 10997 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 10998 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 10999 | DWConv2DMicrokernelTester() |
| 11000 | .input_width(input_width) |
| 11001 | .input_height(input_height) |
| 11002 | .kernel_height(3) |
| 11003 | .kernel_width(3) |
| 11004 | .subsampling(1) |
| 11005 | .padding_left(1) |
| 11006 | .padding_right(1) |
| 11007 | .padding_top(1) |
| 11008 | .padding_bottom(1) |
| 11009 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_5x4); |
| 11010 | } |
| 11011 | } |
| 11012 | } |
| 11013 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11014 | |
| 11015 | |
| 11016 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11017 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_6X4, output_width_eq_4) { |
| 11018 | TEST_REQUIRES_X86_SSE; |
| 11019 | DWConv2DMicrokernelTester() |
| 11020 | .input_width(4) |
| 11021 | .input_height(6) |
| 11022 | .kernel_height(3) |
| 11023 | .kernel_width(3) |
| 11024 | .subsampling(1) |
| 11025 | .padding_left(1) |
| 11026 | .padding_right(1) |
| 11027 | .padding_top(1) |
| 11028 | .padding_bottom(1) |
| 11029 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_6x4); |
| 11030 | } |
| 11031 | |
| 11032 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_6X4, output_width_div_4) { |
| 11033 | TEST_REQUIRES_X86_SSE; |
| 11034 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 11035 | DWConv2DMicrokernelTester() |
| 11036 | .input_width(input_width) |
| 11037 | .input_height(6) |
| 11038 | .kernel_height(3) |
| 11039 | .kernel_width(3) |
| 11040 | .subsampling(1) |
| 11041 | .padding_left(1) |
| 11042 | .padding_right(1) |
| 11043 | .padding_top(1) |
| 11044 | .padding_bottom(1) |
| 11045 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_6x4); |
| 11046 | } |
| 11047 | } |
| 11048 | |
| 11049 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_6X4, output_width_lt_4) { |
| 11050 | TEST_REQUIRES_X86_SSE; |
| 11051 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 11052 | DWConv2DMicrokernelTester() |
| 11053 | .input_width(4) |
| 11054 | .input_height(6) |
| 11055 | .kernel_height(3) |
| 11056 | .kernel_width(3) |
| 11057 | .subsampling(1) |
| 11058 | .padding_left(1) |
| 11059 | .padding_right(1) |
| 11060 | .padding_top(1) |
| 11061 | .padding_bottom(1) |
| 11062 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_6x4); |
| 11063 | } |
| 11064 | } |
| 11065 | |
| 11066 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_6X4, output_width_gt_4) { |
| 11067 | TEST_REQUIRES_X86_SSE; |
| 11068 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 11069 | DWConv2DMicrokernelTester() |
| 11070 | .input_width(input_width) |
| 11071 | .input_height(6) |
| 11072 | .kernel_height(3) |
| 11073 | .kernel_width(3) |
| 11074 | .subsampling(1) |
| 11075 | .padding_left(1) |
| 11076 | .padding_right(1) |
| 11077 | .padding_top(1) |
| 11078 | .padding_bottom(1) |
| 11079 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_6x4); |
| 11080 | } |
| 11081 | } |
| 11082 | |
| 11083 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_6X4, output_height_div_6) { |
| 11084 | TEST_REQUIRES_X86_SSE; |
| 11085 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 11086 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 11087 | DWConv2DMicrokernelTester() |
| 11088 | .input_width(input_width) |
| 11089 | .input_height(input_height) |
| 11090 | .kernel_height(3) |
| 11091 | .kernel_width(3) |
| 11092 | .subsampling(1) |
| 11093 | .padding_left(1) |
| 11094 | .padding_right(1) |
| 11095 | .padding_top(1) |
| 11096 | .padding_bottom(1) |
| 11097 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_6x4); |
| 11098 | } |
| 11099 | } |
| 11100 | } |
| 11101 | |
| 11102 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_6X4, output_height_lt_6) { |
| 11103 | TEST_REQUIRES_X86_SSE; |
| 11104 | for (size_t input_height = 1; input_height < 6; input_height++) { |
| 11105 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 11106 | DWConv2DMicrokernelTester() |
| 11107 | .input_width(input_width) |
| 11108 | .input_height(input_height) |
| 11109 | .kernel_height(3) |
| 11110 | .kernel_width(3) |
| 11111 | .subsampling(1) |
| 11112 | .padding_left(1) |
| 11113 | .padding_right(1) |
| 11114 | .padding_top(1) |
| 11115 | .padding_bottom(1) |
| 11116 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_6x4); |
| 11117 | } |
| 11118 | } |
| 11119 | } |
| 11120 | |
| 11121 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_6X4, output_height_gt_6) { |
| 11122 | TEST_REQUIRES_X86_SSE; |
| 11123 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 11124 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 11125 | DWConv2DMicrokernelTester() |
| 11126 | .input_width(input_width) |
| 11127 | .input_height(input_height) |
| 11128 | .kernel_height(3) |
| 11129 | .kernel_width(3) |
| 11130 | .subsampling(1) |
| 11131 | .padding_left(1) |
| 11132 | .padding_right(1) |
| 11133 | .padding_top(1) |
| 11134 | .padding_bottom(1) |
| 11135 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_6x4); |
| 11136 | } |
| 11137 | } |
| 11138 | } |
| 11139 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11140 | |
| 11141 | |
| 11142 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11143 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC2, output_width_eq_4) { |
| 11144 | TEST_REQUIRES_X86_SSE; |
| 11145 | DWConv2DMicrokernelTester() |
| 11146 | .input_width(4) |
| 11147 | .input_height(1) |
| 11148 | .kernel_height(3) |
| 11149 | .kernel_width(3) |
| 11150 | .subsampling(1) |
| 11151 | .padding_left(1) |
| 11152 | .padding_right(1) |
| 11153 | .padding_top(1) |
| 11154 | .padding_bottom(1) |
| 11155 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc2); |
| 11156 | } |
| 11157 | |
| 11158 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC2, output_width_div_4) { |
| 11159 | TEST_REQUIRES_X86_SSE; |
| 11160 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 11161 | DWConv2DMicrokernelTester() |
| 11162 | .input_width(input_width) |
| 11163 | .input_height(1) |
| 11164 | .kernel_height(3) |
| 11165 | .kernel_width(3) |
| 11166 | .subsampling(1) |
| 11167 | .padding_left(1) |
| 11168 | .padding_right(1) |
| 11169 | .padding_top(1) |
| 11170 | .padding_bottom(1) |
| 11171 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc2); |
| 11172 | } |
| 11173 | } |
| 11174 | |
| 11175 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC2, output_width_lt_4) { |
| 11176 | TEST_REQUIRES_X86_SSE; |
| 11177 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 11178 | DWConv2DMicrokernelTester() |
| 11179 | .input_width(4) |
| 11180 | .input_height(1) |
| 11181 | .kernel_height(3) |
| 11182 | .kernel_width(3) |
| 11183 | .subsampling(1) |
| 11184 | .padding_left(1) |
| 11185 | .padding_right(1) |
| 11186 | .padding_top(1) |
| 11187 | .padding_bottom(1) |
| 11188 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc2); |
| 11189 | } |
| 11190 | } |
| 11191 | |
| 11192 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC2, output_width_gt_4) { |
| 11193 | TEST_REQUIRES_X86_SSE; |
| 11194 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 11195 | DWConv2DMicrokernelTester() |
| 11196 | .input_width(input_width) |
| 11197 | .input_height(1) |
| 11198 | .kernel_height(3) |
| 11199 | .kernel_width(3) |
| 11200 | .subsampling(1) |
| 11201 | .padding_left(1) |
| 11202 | .padding_right(1) |
| 11203 | .padding_top(1) |
| 11204 | .padding_bottom(1) |
| 11205 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc2); |
| 11206 | } |
| 11207 | } |
| 11208 | |
| 11209 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC2, output_height_gt_1) { |
| 11210 | TEST_REQUIRES_X86_SSE; |
| 11211 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 11212 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 11213 | DWConv2DMicrokernelTester() |
| 11214 | .input_width(input_width) |
| 11215 | .input_height(input_height) |
| 11216 | .kernel_height(3) |
| 11217 | .kernel_width(3) |
| 11218 | .subsampling(1) |
| 11219 | .padding_left(1) |
| 11220 | .padding_right(1) |
| 11221 | .padding_top(1) |
| 11222 | .padding_bottom(1) |
| 11223 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc2); |
| 11224 | } |
| 11225 | } |
| 11226 | } |
| 11227 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11228 | |
| 11229 | |
| 11230 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11231 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC3, output_width_eq_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11232 | TEST_REQUIRES_X86_SSE; |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11233 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11234 | .input_width(4) |
| 11235 | .input_height(1) |
| 11236 | .kernel_height(3) |
| 11237 | .kernel_width(3) |
| 11238 | .subsampling(1) |
| Erich Elsen | 0cc2c53 | 2019-10-15 04:44:18 -0700 | [diff] [blame] | 11239 | .padding_left(1) |
| 11240 | .padding_right(1) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 11241 | .padding_top(1) |
| 11242 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11243 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11244 | } |
| 11245 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11246 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC3, output_width_div_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11247 | TEST_REQUIRES_X86_SSE; |
| 11248 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11249 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11250 | .input_width(input_width) |
| 11251 | .input_height(1) |
| 11252 | .kernel_height(3) |
| 11253 | .kernel_width(3) |
| 11254 | .subsampling(1) |
| 11255 | .padding_left(1) |
| 11256 | .padding_right(1) |
| 11257 | .padding_top(1) |
| 11258 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11259 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11260 | } |
| 11261 | } |
| 11262 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11263 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC3, output_width_lt_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11264 | TEST_REQUIRES_X86_SSE; |
| 11265 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11266 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11267 | .input_width(4) |
| 11268 | .input_height(1) |
| 11269 | .kernel_height(3) |
| 11270 | .kernel_width(3) |
| 11271 | .subsampling(1) |
| 11272 | .padding_left(1) |
| 11273 | .padding_right(1) |
| 11274 | .padding_top(1) |
| 11275 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11276 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11277 | } |
| 11278 | } |
| 11279 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11280 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC3, output_width_gt_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11281 | TEST_REQUIRES_X86_SSE; |
| 11282 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11283 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11284 | .input_width(input_width) |
| 11285 | .input_height(1) |
| 11286 | .kernel_height(3) |
| 11287 | .kernel_width(3) |
| 11288 | .subsampling(1) |
| 11289 | .padding_left(1) |
| 11290 | .padding_right(1) |
| 11291 | .padding_top(1) |
| 11292 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11293 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11294 | } |
| 11295 | } |
| 11296 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11297 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC3, output_height_gt_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11298 | TEST_REQUIRES_X86_SSE; |
| 11299 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 11300 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11301 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11302 | .input_width(input_width) |
| 11303 | .input_height(input_height) |
| 11304 | .kernel_height(3) |
| 11305 | .kernel_width(3) |
| 11306 | .subsampling(1) |
| 11307 | .padding_left(1) |
| 11308 | .padding_right(1) |
| 11309 | .padding_top(1) |
| 11310 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 11311 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 11312 | } |
| 11313 | } |
| 11314 | } |
| 11315 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11316 | |
| 11317 | |
| 11318 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| Marat Dukhan | 470078a | 2020-10-23 22:36:52 -0700 | [diff] [blame] | 11319 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC4, output_width_eq_4) { |
| 11320 | TEST_REQUIRES_X86_SSE; |
| 11321 | DWConv2DMicrokernelTester() |
| 11322 | .input_width(4) |
| 11323 | .input_height(1) |
| 11324 | .kernel_height(3) |
| 11325 | .kernel_width(3) |
| 11326 | .subsampling(1) |
| 11327 | .padding_left(1) |
| 11328 | .padding_right(1) |
| 11329 | .padding_top(1) |
| 11330 | .padding_bottom(1) |
| 11331 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc4); |
| 11332 | } |
| 11333 | |
| 11334 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC4, output_width_div_4) { |
| 11335 | TEST_REQUIRES_X86_SSE; |
| 11336 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 11337 | DWConv2DMicrokernelTester() |
| 11338 | .input_width(input_width) |
| 11339 | .input_height(1) |
| 11340 | .kernel_height(3) |
| 11341 | .kernel_width(3) |
| 11342 | .subsampling(1) |
| 11343 | .padding_left(1) |
| 11344 | .padding_right(1) |
| 11345 | .padding_top(1) |
| 11346 | .padding_bottom(1) |
| 11347 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc4); |
| 11348 | } |
| 11349 | } |
| 11350 | |
| 11351 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC4, output_width_lt_4) { |
| 11352 | TEST_REQUIRES_X86_SSE; |
| 11353 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 11354 | DWConv2DMicrokernelTester() |
| 11355 | .input_width(4) |
| 11356 | .input_height(1) |
| 11357 | .kernel_height(3) |
| 11358 | .kernel_width(3) |
| 11359 | .subsampling(1) |
| 11360 | .padding_left(1) |
| 11361 | .padding_right(1) |
| 11362 | .padding_top(1) |
| 11363 | .padding_bottom(1) |
| 11364 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc4); |
| 11365 | } |
| 11366 | } |
| 11367 | |
| 11368 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC4, output_width_gt_4) { |
| 11369 | TEST_REQUIRES_X86_SSE; |
| 11370 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 11371 | DWConv2DMicrokernelTester() |
| 11372 | .input_width(input_width) |
| 11373 | .input_height(1) |
| 11374 | .kernel_height(3) |
| 11375 | .kernel_width(3) |
| 11376 | .subsampling(1) |
| 11377 | .padding_left(1) |
| 11378 | .padding_right(1) |
| 11379 | .padding_top(1) |
| 11380 | .padding_bottom(1) |
| 11381 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc4); |
| 11382 | } |
| 11383 | } |
| 11384 | |
| 11385 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_1X4_ACC4, output_height_gt_1) { |
| 11386 | TEST_REQUIRES_X86_SSE; |
| 11387 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 11388 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 11389 | DWConv2DMicrokernelTester() |
| 11390 | .input_width(input_width) |
| 11391 | .input_height(input_height) |
| 11392 | .kernel_height(3) |
| 11393 | .kernel_width(3) |
| 11394 | .subsampling(1) |
| 11395 | .padding_left(1) |
| 11396 | .padding_right(1) |
| 11397 | .padding_top(1) |
| 11398 | .padding_bottom(1) |
| 11399 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc4); |
| 11400 | } |
| 11401 | } |
| 11402 | } |
| 11403 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11404 | |
| 11405 | |
| 11406 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11407 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4_ACC2, output_width_eq_4) { |
| 11408 | TEST_REQUIRES_X86_SSE; |
| 11409 | DWConv2DMicrokernelTester() |
| 11410 | .input_width(4) |
| 11411 | .input_height(2) |
| 11412 | .kernel_height(3) |
| 11413 | .kernel_width(3) |
| 11414 | .subsampling(1) |
| 11415 | .padding_left(1) |
| 11416 | .padding_right(1) |
| 11417 | .padding_top(1) |
| 11418 | .padding_bottom(1) |
| 11419 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4_acc2); |
| 11420 | } |
| 11421 | |
| 11422 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4_ACC2, output_width_div_4) { |
| 11423 | TEST_REQUIRES_X86_SSE; |
| 11424 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 11425 | DWConv2DMicrokernelTester() |
| 11426 | .input_width(input_width) |
| 11427 | .input_height(2) |
| 11428 | .kernel_height(3) |
| 11429 | .kernel_width(3) |
| 11430 | .subsampling(1) |
| 11431 | .padding_left(1) |
| 11432 | .padding_right(1) |
| 11433 | .padding_top(1) |
| 11434 | .padding_bottom(1) |
| 11435 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4_acc2); |
| 11436 | } |
| 11437 | } |
| 11438 | |
| 11439 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4_ACC2, output_width_lt_4) { |
| 11440 | TEST_REQUIRES_X86_SSE; |
| 11441 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 11442 | DWConv2DMicrokernelTester() |
| 11443 | .input_width(4) |
| 11444 | .input_height(2) |
| 11445 | .kernel_height(3) |
| 11446 | .kernel_width(3) |
| 11447 | .subsampling(1) |
| 11448 | .padding_left(1) |
| 11449 | .padding_right(1) |
| 11450 | .padding_top(1) |
| 11451 | .padding_bottom(1) |
| 11452 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4_acc2); |
| 11453 | } |
| 11454 | } |
| 11455 | |
| 11456 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4_ACC2, output_width_gt_4) { |
| 11457 | TEST_REQUIRES_X86_SSE; |
| 11458 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 11459 | DWConv2DMicrokernelTester() |
| 11460 | .input_width(input_width) |
| 11461 | .input_height(2) |
| 11462 | .kernel_height(3) |
| 11463 | .kernel_width(3) |
| 11464 | .subsampling(1) |
| 11465 | .padding_left(1) |
| 11466 | .padding_right(1) |
| 11467 | .padding_top(1) |
| 11468 | .padding_bottom(1) |
| 11469 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4_acc2); |
| 11470 | } |
| 11471 | } |
| 11472 | |
| 11473 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4_ACC2, output_height_div_2) { |
| 11474 | TEST_REQUIRES_X86_SSE; |
| 11475 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 11476 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 11477 | DWConv2DMicrokernelTester() |
| 11478 | .input_width(input_width) |
| 11479 | .input_height(input_height) |
| 11480 | .kernel_height(3) |
| 11481 | .kernel_width(3) |
| 11482 | .subsampling(1) |
| 11483 | .padding_left(1) |
| 11484 | .padding_right(1) |
| 11485 | .padding_top(1) |
| 11486 | .padding_bottom(1) |
| 11487 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4_acc2); |
| 11488 | } |
| 11489 | } |
| 11490 | } |
| 11491 | |
| 11492 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4_ACC2, output_height_lt_2) { |
| 11493 | TEST_REQUIRES_X86_SSE; |
| 11494 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 11495 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 11496 | DWConv2DMicrokernelTester() |
| 11497 | .input_width(input_width) |
| 11498 | .input_height(input_height) |
| 11499 | .kernel_height(3) |
| 11500 | .kernel_width(3) |
| 11501 | .subsampling(1) |
| 11502 | .padding_left(1) |
| 11503 | .padding_right(1) |
| 11504 | .padding_top(1) |
| 11505 | .padding_bottom(1) |
| 11506 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4_acc2); |
| 11507 | } |
| 11508 | } |
| 11509 | } |
| 11510 | |
| 11511 | TEST(F32_DWCONV2D_CHW_3X3P1__SSE_2X4_ACC2, output_height_gt_2) { |
| 11512 | TEST_REQUIRES_X86_SSE; |
| 11513 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 11514 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 11515 | DWConv2DMicrokernelTester() |
| 11516 | .input_width(input_width) |
| 11517 | .input_height(input_height) |
| 11518 | .kernel_height(3) |
| 11519 | .kernel_width(3) |
| 11520 | .subsampling(1) |
| 11521 | .padding_left(1) |
| 11522 | .padding_right(1) |
| 11523 | .padding_top(1) |
| 11524 | .padding_bottom(1) |
| 11525 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4_acc2); |
| 11526 | } |
| 11527 | } |
| 11528 | } |
| 11529 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11530 | |
| 11531 | |
| 11532 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| Marat Dukhan | 0ff9718 | 2020-10-25 19:14:03 -0700 | [diff] [blame] | 11533 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4, output_width_eq_4) { |
| 11534 | TEST_REQUIRES_X86_SSE; |
| 11535 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 11536 | DWConv2DMicrokernelTester() |
| 11537 | .input_width(input_width) |
| 11538 | .input_height(2) |
| 11539 | .kernel_height(3) |
| 11540 | .kernel_width(3) |
| 11541 | .subsampling(2) |
| 11542 | .padding_left(1) |
| 11543 | .padding_right(1) |
| 11544 | .padding_top(1) |
| 11545 | .padding_bottom(1) |
| 11546 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4); |
| 11547 | } |
| 11548 | } |
| 11549 | |
| 11550 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4, output_width_div_4) { |
| 11551 | TEST_REQUIRES_X86_SSE; |
| 11552 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 11553 | DWConv2DMicrokernelTester() |
| 11554 | .input_width(input_width) |
| 11555 | .input_height(2) |
| 11556 | .kernel_height(3) |
| 11557 | .kernel_width(3) |
| 11558 | .subsampling(2) |
| 11559 | .padding_left(1) |
| 11560 | .padding_right(1) |
| 11561 | .padding_top(1) |
| 11562 | .padding_bottom(1) |
| 11563 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4); |
| 11564 | } |
| 11565 | } |
| 11566 | |
| 11567 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4, output_width_lt_4) { |
| 11568 | TEST_REQUIRES_X86_SSE; |
| 11569 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 11570 | DWConv2DMicrokernelTester() |
| 11571 | .input_width(8) |
| 11572 | .input_height(2) |
| 11573 | .kernel_height(3) |
| 11574 | .kernel_width(3) |
| 11575 | .subsampling(2) |
| 11576 | .padding_left(1) |
| 11577 | .padding_right(1) |
| 11578 | .padding_top(1) |
| 11579 | .padding_bottom(1) |
| 11580 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4); |
| 11581 | } |
| 11582 | } |
| 11583 | |
| 11584 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4, output_width_gt_4) { |
| 11585 | TEST_REQUIRES_X86_SSE; |
| 11586 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 11587 | DWConv2DMicrokernelTester() |
| 11588 | .input_width(input_width) |
| 11589 | .input_height(2) |
| 11590 | .kernel_height(3) |
| 11591 | .kernel_width(3) |
| 11592 | .subsampling(2) |
| 11593 | .padding_left(1) |
| 11594 | .padding_right(1) |
| 11595 | .padding_top(1) |
| 11596 | .padding_bottom(1) |
| 11597 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4); |
| 11598 | } |
| 11599 | } |
| 11600 | |
| 11601 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4, output_height_eq_1) { |
| 11602 | TEST_REQUIRES_X86_SSE; |
| 11603 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 11604 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 11605 | DWConv2DMicrokernelTester() |
| 11606 | .input_width(input_width) |
| 11607 | .input_height(input_height) |
| 11608 | .kernel_height(3) |
| 11609 | .kernel_width(3) |
| 11610 | .subsampling(2) |
| 11611 | .padding_left(1) |
| 11612 | .padding_right(1) |
| 11613 | .padding_top(1) |
| 11614 | .padding_bottom(1) |
| 11615 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4); |
| 11616 | } |
| 11617 | } |
| 11618 | } |
| 11619 | |
| 11620 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4, output_height_gt_1) { |
| 11621 | TEST_REQUIRES_X86_SSE; |
| 11622 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 11623 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 11624 | DWConv2DMicrokernelTester() |
| 11625 | .input_width(input_width) |
| 11626 | .input_height(input_height) |
| 11627 | .kernel_height(3) |
| 11628 | .kernel_width(3) |
| 11629 | .subsampling(2) |
| 11630 | .padding_left(1) |
| 11631 | .padding_right(1) |
| 11632 | .padding_top(1) |
| 11633 | .padding_bottom(1) |
| 11634 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4); |
| 11635 | } |
| 11636 | } |
| 11637 | } |
| 11638 | |
| 11639 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4, padding_top_eq_1) { |
| 11640 | TEST_REQUIRES_X86_SSE; |
| 11641 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 11642 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 11643 | DWConv2DMicrokernelTester() |
| 11644 | .input_width(input_width) |
| 11645 | .input_height(input_height) |
| 11646 | .kernel_height(3) |
| 11647 | .kernel_width(3) |
| 11648 | .subsampling(2) |
| 11649 | .padding_left(1) |
| 11650 | .padding_right(1) |
| 11651 | .padding_top(0) |
| 11652 | .padding_bottom(1) |
| 11653 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4); |
| 11654 | } |
| 11655 | } |
| 11656 | } |
| 11657 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11658 | |
| 11659 | |
| 11660 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11661 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4, output_width_eq_4) { |
| 11662 | TEST_REQUIRES_X86_SSE; |
| 11663 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 11664 | DWConv2DMicrokernelTester() |
| 11665 | .input_width(input_width) |
| 11666 | .input_height(4) |
| 11667 | .kernel_height(3) |
| 11668 | .kernel_width(3) |
| 11669 | .subsampling(2) |
| 11670 | .padding_left(1) |
| 11671 | .padding_right(1) |
| 11672 | .padding_top(1) |
| 11673 | .padding_bottom(1) |
| 11674 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4); |
| 11675 | } |
| 11676 | } |
| 11677 | |
| 11678 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4, output_width_div_4) { |
| 11679 | TEST_REQUIRES_X86_SSE; |
| 11680 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 11681 | DWConv2DMicrokernelTester() |
| 11682 | .input_width(input_width) |
| 11683 | .input_height(4) |
| 11684 | .kernel_height(3) |
| 11685 | .kernel_width(3) |
| 11686 | .subsampling(2) |
| 11687 | .padding_left(1) |
| 11688 | .padding_right(1) |
| 11689 | .padding_top(1) |
| 11690 | .padding_bottom(1) |
| 11691 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4); |
| 11692 | } |
| 11693 | } |
| 11694 | |
| 11695 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4, output_width_lt_4) { |
| 11696 | TEST_REQUIRES_X86_SSE; |
| 11697 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 11698 | DWConv2DMicrokernelTester() |
| 11699 | .input_width(8) |
| 11700 | .input_height(4) |
| 11701 | .kernel_height(3) |
| 11702 | .kernel_width(3) |
| 11703 | .subsampling(2) |
| 11704 | .padding_left(1) |
| 11705 | .padding_right(1) |
| 11706 | .padding_top(1) |
| 11707 | .padding_bottom(1) |
| 11708 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4); |
| 11709 | } |
| 11710 | } |
| 11711 | |
| 11712 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4, output_width_gt_4) { |
| 11713 | TEST_REQUIRES_X86_SSE; |
| 11714 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 11715 | DWConv2DMicrokernelTester() |
| 11716 | .input_width(input_width) |
| 11717 | .input_height(4) |
| 11718 | .kernel_height(3) |
| 11719 | .kernel_width(3) |
| 11720 | .subsampling(2) |
| 11721 | .padding_left(1) |
| 11722 | .padding_right(1) |
| 11723 | .padding_top(1) |
| 11724 | .padding_bottom(1) |
| 11725 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4); |
| 11726 | } |
| 11727 | } |
| 11728 | |
| 11729 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4, output_height_eq_2) { |
| 11730 | TEST_REQUIRES_X86_SSE; |
| 11731 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 11732 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 11733 | DWConv2DMicrokernelTester() |
| 11734 | .input_width(input_width) |
| 11735 | .input_height(input_height) |
| 11736 | .kernel_height(3) |
| 11737 | .kernel_width(3) |
| 11738 | .subsampling(2) |
| 11739 | .padding_left(1) |
| 11740 | .padding_right(1) |
| 11741 | .padding_top(1) |
| 11742 | .padding_bottom(1) |
| 11743 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4); |
| 11744 | } |
| 11745 | } |
| 11746 | } |
| 11747 | |
| 11748 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4, output_height_div_2) { |
| 11749 | TEST_REQUIRES_X86_SSE; |
| 11750 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 11751 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 11752 | DWConv2DMicrokernelTester() |
| 11753 | .input_width(input_width) |
| 11754 | .input_height(input_height) |
| 11755 | .kernel_height(3) |
| 11756 | .kernel_width(3) |
| 11757 | .subsampling(2) |
| 11758 | .padding_left(1) |
| 11759 | .padding_right(1) |
| 11760 | .padding_top(1) |
| 11761 | .padding_bottom(1) |
| 11762 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4); |
| 11763 | } |
| 11764 | } |
| 11765 | } |
| 11766 | |
| 11767 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4, output_height_lt_2) { |
| 11768 | TEST_REQUIRES_X86_SSE; |
| 11769 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 11770 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 11771 | DWConv2DMicrokernelTester() |
| 11772 | .input_width(input_width) |
| 11773 | .input_height(input_height) |
| 11774 | .kernel_height(3) |
| 11775 | .kernel_width(3) |
| 11776 | .subsampling(2) |
| 11777 | .padding_left(1) |
| 11778 | .padding_right(1) |
| 11779 | .padding_top(1) |
| 11780 | .padding_bottom(1) |
| 11781 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4); |
| 11782 | } |
| 11783 | } |
| 11784 | } |
| 11785 | |
| 11786 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4, output_height_gt_2) { |
| 11787 | TEST_REQUIRES_X86_SSE; |
| 11788 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 11789 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 11790 | DWConv2DMicrokernelTester() |
| 11791 | .input_width(input_width) |
| 11792 | .input_height(input_height) |
| 11793 | .kernel_height(3) |
| 11794 | .kernel_width(3) |
| 11795 | .subsampling(2) |
| 11796 | .padding_left(1) |
| 11797 | .padding_right(1) |
| 11798 | .padding_top(1) |
| 11799 | .padding_bottom(1) |
| 11800 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4); |
| 11801 | } |
| 11802 | } |
| 11803 | } |
| 11804 | |
| 11805 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4, padding_top_eq_1) { |
| 11806 | TEST_REQUIRES_X86_SSE; |
| 11807 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 11808 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 11809 | DWConv2DMicrokernelTester() |
| 11810 | .input_width(input_width) |
| 11811 | .input_height(input_height) |
| 11812 | .kernel_height(3) |
| 11813 | .kernel_width(3) |
| 11814 | .subsampling(2) |
| 11815 | .padding_left(1) |
| 11816 | .padding_right(1) |
| 11817 | .padding_top(0) |
| 11818 | .padding_bottom(1) |
| 11819 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4); |
| 11820 | } |
| 11821 | } |
| 11822 | } |
| 11823 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11824 | |
| 11825 | |
| 11826 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11827 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_3X4, output_width_eq_4) { |
| 11828 | TEST_REQUIRES_X86_SSE; |
| 11829 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 11830 | DWConv2DMicrokernelTester() |
| 11831 | .input_width(input_width) |
| 11832 | .input_height(6) |
| 11833 | .kernel_height(3) |
| 11834 | .kernel_width(3) |
| 11835 | .subsampling(2) |
| 11836 | .padding_left(1) |
| 11837 | .padding_right(1) |
| 11838 | .padding_top(1) |
| 11839 | .padding_bottom(1) |
| 11840 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_3x4); |
| 11841 | } |
| 11842 | } |
| 11843 | |
| 11844 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_3X4, output_width_div_4) { |
| 11845 | TEST_REQUIRES_X86_SSE; |
| 11846 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 11847 | DWConv2DMicrokernelTester() |
| 11848 | .input_width(input_width) |
| 11849 | .input_height(6) |
| 11850 | .kernel_height(3) |
| 11851 | .kernel_width(3) |
| 11852 | .subsampling(2) |
| 11853 | .padding_left(1) |
| 11854 | .padding_right(1) |
| 11855 | .padding_top(1) |
| 11856 | .padding_bottom(1) |
| 11857 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_3x4); |
| 11858 | } |
| 11859 | } |
| 11860 | |
| 11861 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_3X4, output_width_lt_4) { |
| 11862 | TEST_REQUIRES_X86_SSE; |
| 11863 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 11864 | DWConv2DMicrokernelTester() |
| 11865 | .input_width(8) |
| 11866 | .input_height(6) |
| 11867 | .kernel_height(3) |
| 11868 | .kernel_width(3) |
| 11869 | .subsampling(2) |
| 11870 | .padding_left(1) |
| 11871 | .padding_right(1) |
| 11872 | .padding_top(1) |
| 11873 | .padding_bottom(1) |
| 11874 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_3x4); |
| 11875 | } |
| 11876 | } |
| 11877 | |
| 11878 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_3X4, output_width_gt_4) { |
| 11879 | TEST_REQUIRES_X86_SSE; |
| 11880 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 11881 | DWConv2DMicrokernelTester() |
| 11882 | .input_width(input_width) |
| 11883 | .input_height(6) |
| 11884 | .kernel_height(3) |
| 11885 | .kernel_width(3) |
| 11886 | .subsampling(2) |
| 11887 | .padding_left(1) |
| 11888 | .padding_right(1) |
| 11889 | .padding_top(1) |
| 11890 | .padding_bottom(1) |
| 11891 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_3x4); |
| 11892 | } |
| 11893 | } |
| 11894 | |
| 11895 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_3X4, output_height_eq_3) { |
| 11896 | TEST_REQUIRES_X86_SSE; |
| 11897 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 11898 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 11899 | DWConv2DMicrokernelTester() |
| 11900 | .input_width(input_width) |
| 11901 | .input_height(input_height) |
| 11902 | .kernel_height(3) |
| 11903 | .kernel_width(3) |
| 11904 | .subsampling(2) |
| 11905 | .padding_left(1) |
| 11906 | .padding_right(1) |
| 11907 | .padding_top(1) |
| 11908 | .padding_bottom(1) |
| 11909 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_3x4); |
| 11910 | } |
| 11911 | } |
| 11912 | } |
| 11913 | |
| 11914 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_3X4, output_height_div_3) { |
| 11915 | TEST_REQUIRES_X86_SSE; |
| 11916 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 11917 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 11918 | DWConv2DMicrokernelTester() |
| 11919 | .input_width(input_width) |
| 11920 | .input_height(input_height) |
| 11921 | .kernel_height(3) |
| 11922 | .kernel_width(3) |
| 11923 | .subsampling(2) |
| 11924 | .padding_left(1) |
| 11925 | .padding_right(1) |
| 11926 | .padding_top(1) |
| 11927 | .padding_bottom(1) |
| 11928 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_3x4); |
| 11929 | } |
| 11930 | } |
| 11931 | } |
| 11932 | |
| 11933 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_3X4, output_height_lt_3) { |
| 11934 | TEST_REQUIRES_X86_SSE; |
| 11935 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 11936 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 11937 | DWConv2DMicrokernelTester() |
| 11938 | .input_width(input_width) |
| 11939 | .input_height(input_height) |
| 11940 | .kernel_height(3) |
| 11941 | .kernel_width(3) |
| 11942 | .subsampling(2) |
| 11943 | .padding_left(1) |
| 11944 | .padding_right(1) |
| 11945 | .padding_top(1) |
| 11946 | .padding_bottom(1) |
| 11947 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_3x4); |
| 11948 | } |
| 11949 | } |
| 11950 | } |
| 11951 | |
| 11952 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_3X4, output_height_gt_3) { |
| 11953 | TEST_REQUIRES_X86_SSE; |
| 11954 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 11955 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 11956 | DWConv2DMicrokernelTester() |
| 11957 | .input_width(input_width) |
| 11958 | .input_height(input_height) |
| 11959 | .kernel_height(3) |
| 11960 | .kernel_width(3) |
| 11961 | .subsampling(2) |
| 11962 | .padding_left(1) |
| 11963 | .padding_right(1) |
| 11964 | .padding_top(1) |
| 11965 | .padding_bottom(1) |
| 11966 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_3x4); |
| 11967 | } |
| 11968 | } |
| 11969 | } |
| 11970 | |
| 11971 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_3X4, padding_top_eq_1) { |
| 11972 | TEST_REQUIRES_X86_SSE; |
| 11973 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 11974 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 11975 | DWConv2DMicrokernelTester() |
| 11976 | .input_width(input_width) |
| 11977 | .input_height(input_height) |
| 11978 | .kernel_height(3) |
| 11979 | .kernel_width(3) |
| 11980 | .subsampling(2) |
| 11981 | .padding_left(1) |
| 11982 | .padding_right(1) |
| 11983 | .padding_top(0) |
| 11984 | .padding_bottom(1) |
| 11985 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_3x4); |
| 11986 | } |
| 11987 | } |
| 11988 | } |
| 11989 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11990 | |
| 11991 | |
| 11992 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 11993 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_4X4, output_width_eq_4) { |
| 11994 | TEST_REQUIRES_X86_SSE; |
| 11995 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 11996 | DWConv2DMicrokernelTester() |
| 11997 | .input_width(input_width) |
| 11998 | .input_height(8) |
| 11999 | .kernel_height(3) |
| 12000 | .kernel_width(3) |
| 12001 | .subsampling(2) |
| 12002 | .padding_left(1) |
| 12003 | .padding_right(1) |
| 12004 | .padding_top(1) |
| 12005 | .padding_bottom(1) |
| 12006 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_4x4); |
| 12007 | } |
| 12008 | } |
| 12009 | |
| 12010 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_4X4, output_width_div_4) { |
| 12011 | TEST_REQUIRES_X86_SSE; |
| 12012 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 12013 | DWConv2DMicrokernelTester() |
| 12014 | .input_width(input_width) |
| 12015 | .input_height(8) |
| 12016 | .kernel_height(3) |
| 12017 | .kernel_width(3) |
| 12018 | .subsampling(2) |
| 12019 | .padding_left(1) |
| 12020 | .padding_right(1) |
| 12021 | .padding_top(1) |
| 12022 | .padding_bottom(1) |
| 12023 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_4x4); |
| 12024 | } |
| 12025 | } |
| 12026 | |
| 12027 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_4X4, output_width_lt_4) { |
| 12028 | TEST_REQUIRES_X86_SSE; |
| 12029 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 12030 | DWConv2DMicrokernelTester() |
| 12031 | .input_width(8) |
| 12032 | .input_height(8) |
| 12033 | .kernel_height(3) |
| 12034 | .kernel_width(3) |
| 12035 | .subsampling(2) |
| 12036 | .padding_left(1) |
| 12037 | .padding_right(1) |
| 12038 | .padding_top(1) |
| 12039 | .padding_bottom(1) |
| 12040 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_4x4); |
| 12041 | } |
| 12042 | } |
| 12043 | |
| 12044 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_4X4, output_width_gt_4) { |
| 12045 | TEST_REQUIRES_X86_SSE; |
| 12046 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 12047 | DWConv2DMicrokernelTester() |
| 12048 | .input_width(input_width) |
| 12049 | .input_height(8) |
| 12050 | .kernel_height(3) |
| 12051 | .kernel_width(3) |
| 12052 | .subsampling(2) |
| 12053 | .padding_left(1) |
| 12054 | .padding_right(1) |
| 12055 | .padding_top(1) |
| 12056 | .padding_bottom(1) |
| 12057 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_4x4); |
| 12058 | } |
| 12059 | } |
| 12060 | |
| 12061 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_4X4, output_height_eq_4) { |
| 12062 | TEST_REQUIRES_X86_SSE; |
| 12063 | for (size_t input_height = 7; input_height < 9; input_height++) { |
| 12064 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12065 | DWConv2DMicrokernelTester() |
| 12066 | .input_width(input_width) |
| 12067 | .input_height(input_height) |
| 12068 | .kernel_height(3) |
| 12069 | .kernel_width(3) |
| 12070 | .subsampling(2) |
| 12071 | .padding_left(1) |
| 12072 | .padding_right(1) |
| 12073 | .padding_top(1) |
| 12074 | .padding_bottom(1) |
| 12075 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_4x4); |
| 12076 | } |
| 12077 | } |
| 12078 | } |
| 12079 | |
| 12080 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_4X4, output_height_div_4) { |
| 12081 | TEST_REQUIRES_X86_SSE; |
| 12082 | for (size_t input_height = 16; input_height < 64; input_height += 8) { |
| 12083 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12084 | DWConv2DMicrokernelTester() |
| 12085 | .input_width(input_width) |
| 12086 | .input_height(input_height) |
| 12087 | .kernel_height(3) |
| 12088 | .kernel_width(3) |
| 12089 | .subsampling(2) |
| 12090 | .padding_left(1) |
| 12091 | .padding_right(1) |
| 12092 | .padding_top(1) |
| 12093 | .padding_bottom(1) |
| 12094 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_4x4); |
| 12095 | } |
| 12096 | } |
| 12097 | } |
| 12098 | |
| 12099 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_4X4, output_height_lt_4) { |
| 12100 | TEST_REQUIRES_X86_SSE; |
| 12101 | for (size_t input_height = 1; input_height < 7; input_height++) { |
| 12102 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12103 | DWConv2DMicrokernelTester() |
| 12104 | .input_width(input_width) |
| 12105 | .input_height(input_height) |
| 12106 | .kernel_height(3) |
| 12107 | .kernel_width(3) |
| 12108 | .subsampling(2) |
| 12109 | .padding_left(1) |
| 12110 | .padding_right(1) |
| 12111 | .padding_top(1) |
| 12112 | .padding_bottom(1) |
| 12113 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_4x4); |
| 12114 | } |
| 12115 | } |
| 12116 | } |
| 12117 | |
| 12118 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_4X4, output_height_gt_4) { |
| 12119 | TEST_REQUIRES_X86_SSE; |
| 12120 | for (size_t input_height = 9; input_height < 17; input_height++) { |
| 12121 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12122 | DWConv2DMicrokernelTester() |
| 12123 | .input_width(input_width) |
| 12124 | .input_height(input_height) |
| 12125 | .kernel_height(3) |
| 12126 | .kernel_width(3) |
| 12127 | .subsampling(2) |
| 12128 | .padding_left(1) |
| 12129 | .padding_right(1) |
| 12130 | .padding_top(1) |
| 12131 | .padding_bottom(1) |
| 12132 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_4x4); |
| 12133 | } |
| 12134 | } |
| 12135 | } |
| 12136 | |
| 12137 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_4X4, padding_top_eq_1) { |
| 12138 | TEST_REQUIRES_X86_SSE; |
| 12139 | for (size_t input_height = 2; input_height < 26; input_height++) { |
| 12140 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12141 | DWConv2DMicrokernelTester() |
| 12142 | .input_width(input_width) |
| 12143 | .input_height(input_height) |
| 12144 | .kernel_height(3) |
| 12145 | .kernel_width(3) |
| 12146 | .subsampling(2) |
| 12147 | .padding_left(1) |
| 12148 | .padding_right(1) |
| 12149 | .padding_top(0) |
| 12150 | .padding_bottom(1) |
| 12151 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_4x4); |
| 12152 | } |
| 12153 | } |
| 12154 | } |
| 12155 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 12156 | |
| 12157 | |
| 12158 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 12159 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC2, output_width_eq_4) { |
| 12160 | TEST_REQUIRES_X86_SSE; |
| 12161 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 12162 | DWConv2DMicrokernelTester() |
| 12163 | .input_width(input_width) |
| 12164 | .input_height(2) |
| 12165 | .kernel_height(3) |
| 12166 | .kernel_width(3) |
| 12167 | .subsampling(2) |
| 12168 | .padding_left(1) |
| 12169 | .padding_right(1) |
| 12170 | .padding_top(1) |
| 12171 | .padding_bottom(1) |
| 12172 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc2); |
| 12173 | } |
| 12174 | } |
| 12175 | |
| 12176 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC2, output_width_div_4) { |
| 12177 | TEST_REQUIRES_X86_SSE; |
| 12178 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 12179 | DWConv2DMicrokernelTester() |
| 12180 | .input_width(input_width) |
| 12181 | .input_height(2) |
| 12182 | .kernel_height(3) |
| 12183 | .kernel_width(3) |
| 12184 | .subsampling(2) |
| 12185 | .padding_left(1) |
| 12186 | .padding_right(1) |
| 12187 | .padding_top(1) |
| 12188 | .padding_bottom(1) |
| 12189 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc2); |
| 12190 | } |
| 12191 | } |
| 12192 | |
| 12193 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC2, output_width_lt_4) { |
| 12194 | TEST_REQUIRES_X86_SSE; |
| 12195 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 12196 | DWConv2DMicrokernelTester() |
| 12197 | .input_width(8) |
| 12198 | .input_height(2) |
| 12199 | .kernel_height(3) |
| 12200 | .kernel_width(3) |
| 12201 | .subsampling(2) |
| 12202 | .padding_left(1) |
| 12203 | .padding_right(1) |
| 12204 | .padding_top(1) |
| 12205 | .padding_bottom(1) |
| 12206 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc2); |
| 12207 | } |
| 12208 | } |
| 12209 | |
| 12210 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC2, output_width_gt_4) { |
| 12211 | TEST_REQUIRES_X86_SSE; |
| 12212 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 12213 | DWConv2DMicrokernelTester() |
| 12214 | .input_width(input_width) |
| 12215 | .input_height(2) |
| 12216 | .kernel_height(3) |
| 12217 | .kernel_width(3) |
| 12218 | .subsampling(2) |
| 12219 | .padding_left(1) |
| 12220 | .padding_right(1) |
| 12221 | .padding_top(1) |
| 12222 | .padding_bottom(1) |
| 12223 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc2); |
| 12224 | } |
| 12225 | } |
| 12226 | |
| 12227 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC2, output_height_eq_1) { |
| 12228 | TEST_REQUIRES_X86_SSE; |
| 12229 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 12230 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12231 | DWConv2DMicrokernelTester() |
| 12232 | .input_width(input_width) |
| 12233 | .input_height(input_height) |
| 12234 | .kernel_height(3) |
| 12235 | .kernel_width(3) |
| 12236 | .subsampling(2) |
| 12237 | .padding_left(1) |
| 12238 | .padding_right(1) |
| 12239 | .padding_top(1) |
| 12240 | .padding_bottom(1) |
| 12241 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc2); |
| 12242 | } |
| 12243 | } |
| 12244 | } |
| 12245 | |
| 12246 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC2, output_height_gt_1) { |
| 12247 | TEST_REQUIRES_X86_SSE; |
| 12248 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 12249 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12250 | DWConv2DMicrokernelTester() |
| 12251 | .input_width(input_width) |
| 12252 | .input_height(input_height) |
| 12253 | .kernel_height(3) |
| 12254 | .kernel_width(3) |
| 12255 | .subsampling(2) |
| 12256 | .padding_left(1) |
| 12257 | .padding_right(1) |
| 12258 | .padding_top(1) |
| 12259 | .padding_bottom(1) |
| 12260 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc2); |
| 12261 | } |
| 12262 | } |
| 12263 | } |
| 12264 | |
| 12265 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC2, padding_top_eq_1) { |
| 12266 | TEST_REQUIRES_X86_SSE; |
| 12267 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 12268 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12269 | DWConv2DMicrokernelTester() |
| 12270 | .input_width(input_width) |
| 12271 | .input_height(input_height) |
| 12272 | .kernel_height(3) |
| 12273 | .kernel_width(3) |
| 12274 | .subsampling(2) |
| 12275 | .padding_left(1) |
| 12276 | .padding_right(1) |
| 12277 | .padding_top(0) |
| 12278 | .padding_bottom(1) |
| 12279 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc2); |
| 12280 | } |
| 12281 | } |
| 12282 | } |
| 12283 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 12284 | |
| 12285 | |
| 12286 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 12287 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC3, output_width_eq_4) { |
| 12288 | TEST_REQUIRES_X86_SSE; |
| 12289 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 12290 | DWConv2DMicrokernelTester() |
| 12291 | .input_width(input_width) |
| 12292 | .input_height(2) |
| 12293 | .kernel_height(3) |
| 12294 | .kernel_width(3) |
| 12295 | .subsampling(2) |
| 12296 | .padding_left(1) |
| 12297 | .padding_right(1) |
| 12298 | .padding_top(1) |
| 12299 | .padding_bottom(1) |
| 12300 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc3); |
| 12301 | } |
| 12302 | } |
| 12303 | |
| 12304 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC3, output_width_div_4) { |
| 12305 | TEST_REQUIRES_X86_SSE; |
| 12306 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 12307 | DWConv2DMicrokernelTester() |
| 12308 | .input_width(input_width) |
| 12309 | .input_height(2) |
| 12310 | .kernel_height(3) |
| 12311 | .kernel_width(3) |
| 12312 | .subsampling(2) |
| 12313 | .padding_left(1) |
| 12314 | .padding_right(1) |
| 12315 | .padding_top(1) |
| 12316 | .padding_bottom(1) |
| 12317 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc3); |
| 12318 | } |
| 12319 | } |
| 12320 | |
| 12321 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC3, output_width_lt_4) { |
| 12322 | TEST_REQUIRES_X86_SSE; |
| 12323 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 12324 | DWConv2DMicrokernelTester() |
| 12325 | .input_width(8) |
| 12326 | .input_height(2) |
| 12327 | .kernel_height(3) |
| 12328 | .kernel_width(3) |
| 12329 | .subsampling(2) |
| 12330 | .padding_left(1) |
| 12331 | .padding_right(1) |
| 12332 | .padding_top(1) |
| 12333 | .padding_bottom(1) |
| 12334 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc3); |
| 12335 | } |
| 12336 | } |
| 12337 | |
| 12338 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC3, output_width_gt_4) { |
| 12339 | TEST_REQUIRES_X86_SSE; |
| 12340 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 12341 | DWConv2DMicrokernelTester() |
| 12342 | .input_width(input_width) |
| 12343 | .input_height(2) |
| 12344 | .kernel_height(3) |
| 12345 | .kernel_width(3) |
| 12346 | .subsampling(2) |
| 12347 | .padding_left(1) |
| 12348 | .padding_right(1) |
| 12349 | .padding_top(1) |
| 12350 | .padding_bottom(1) |
| 12351 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc3); |
| 12352 | } |
| 12353 | } |
| 12354 | |
| 12355 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC3, output_height_eq_1) { |
| 12356 | TEST_REQUIRES_X86_SSE; |
| 12357 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 12358 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12359 | DWConv2DMicrokernelTester() |
| 12360 | .input_width(input_width) |
| 12361 | .input_height(input_height) |
| 12362 | .kernel_height(3) |
| 12363 | .kernel_width(3) |
| 12364 | .subsampling(2) |
| 12365 | .padding_left(1) |
| 12366 | .padding_right(1) |
| 12367 | .padding_top(1) |
| 12368 | .padding_bottom(1) |
| 12369 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc3); |
| 12370 | } |
| 12371 | } |
| 12372 | } |
| 12373 | |
| 12374 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC3, output_height_gt_1) { |
| 12375 | TEST_REQUIRES_X86_SSE; |
| 12376 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 12377 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12378 | DWConv2DMicrokernelTester() |
| 12379 | .input_width(input_width) |
| 12380 | .input_height(input_height) |
| 12381 | .kernel_height(3) |
| 12382 | .kernel_width(3) |
| 12383 | .subsampling(2) |
| 12384 | .padding_left(1) |
| 12385 | .padding_right(1) |
| 12386 | .padding_top(1) |
| 12387 | .padding_bottom(1) |
| 12388 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc3); |
| 12389 | } |
| 12390 | } |
| 12391 | } |
| 12392 | |
| 12393 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC3, padding_top_eq_1) { |
| 12394 | TEST_REQUIRES_X86_SSE; |
| 12395 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 12396 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12397 | DWConv2DMicrokernelTester() |
| 12398 | .input_width(input_width) |
| 12399 | .input_height(input_height) |
| 12400 | .kernel_height(3) |
| 12401 | .kernel_width(3) |
| 12402 | .subsampling(2) |
| 12403 | .padding_left(1) |
| 12404 | .padding_right(1) |
| 12405 | .padding_top(0) |
| 12406 | .padding_bottom(1) |
| 12407 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc3); |
| 12408 | } |
| 12409 | } |
| 12410 | } |
| 12411 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 12412 | |
| 12413 | |
| 12414 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 12415 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC4, output_width_eq_4) { |
| 12416 | TEST_REQUIRES_X86_SSE; |
| 12417 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 12418 | DWConv2DMicrokernelTester() |
| 12419 | .input_width(input_width) |
| 12420 | .input_height(2) |
| 12421 | .kernel_height(3) |
| 12422 | .kernel_width(3) |
| 12423 | .subsampling(2) |
| 12424 | .padding_left(1) |
| 12425 | .padding_right(1) |
| 12426 | .padding_top(1) |
| 12427 | .padding_bottom(1) |
| 12428 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc4); |
| 12429 | } |
| 12430 | } |
| 12431 | |
| 12432 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC4, output_width_div_4) { |
| 12433 | TEST_REQUIRES_X86_SSE; |
| 12434 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 12435 | DWConv2DMicrokernelTester() |
| 12436 | .input_width(input_width) |
| 12437 | .input_height(2) |
| 12438 | .kernel_height(3) |
| 12439 | .kernel_width(3) |
| 12440 | .subsampling(2) |
| 12441 | .padding_left(1) |
| 12442 | .padding_right(1) |
| 12443 | .padding_top(1) |
| 12444 | .padding_bottom(1) |
| 12445 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc4); |
| 12446 | } |
| 12447 | } |
| 12448 | |
| 12449 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC4, output_width_lt_4) { |
| 12450 | TEST_REQUIRES_X86_SSE; |
| 12451 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 12452 | DWConv2DMicrokernelTester() |
| 12453 | .input_width(8) |
| 12454 | .input_height(2) |
| 12455 | .kernel_height(3) |
| 12456 | .kernel_width(3) |
| 12457 | .subsampling(2) |
| 12458 | .padding_left(1) |
| 12459 | .padding_right(1) |
| 12460 | .padding_top(1) |
| 12461 | .padding_bottom(1) |
| 12462 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc4); |
| 12463 | } |
| 12464 | } |
| 12465 | |
| 12466 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC4, output_width_gt_4) { |
| 12467 | TEST_REQUIRES_X86_SSE; |
| 12468 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 12469 | DWConv2DMicrokernelTester() |
| 12470 | .input_width(input_width) |
| 12471 | .input_height(2) |
| 12472 | .kernel_height(3) |
| 12473 | .kernel_width(3) |
| 12474 | .subsampling(2) |
| 12475 | .padding_left(1) |
| 12476 | .padding_right(1) |
| 12477 | .padding_top(1) |
| 12478 | .padding_bottom(1) |
| 12479 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc4); |
| 12480 | } |
| 12481 | } |
| 12482 | |
| 12483 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC4, output_height_eq_1) { |
| 12484 | TEST_REQUIRES_X86_SSE; |
| 12485 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 12486 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12487 | DWConv2DMicrokernelTester() |
| 12488 | .input_width(input_width) |
| 12489 | .input_height(input_height) |
| 12490 | .kernel_height(3) |
| 12491 | .kernel_width(3) |
| 12492 | .subsampling(2) |
| 12493 | .padding_left(1) |
| 12494 | .padding_right(1) |
| 12495 | .padding_top(1) |
| 12496 | .padding_bottom(1) |
| 12497 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc4); |
| 12498 | } |
| 12499 | } |
| 12500 | } |
| 12501 | |
| 12502 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC4, output_height_gt_1) { |
| 12503 | TEST_REQUIRES_X86_SSE; |
| 12504 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 12505 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12506 | DWConv2DMicrokernelTester() |
| 12507 | .input_width(input_width) |
| 12508 | .input_height(input_height) |
| 12509 | .kernel_height(3) |
| 12510 | .kernel_width(3) |
| 12511 | .subsampling(2) |
| 12512 | .padding_left(1) |
| 12513 | .padding_right(1) |
| 12514 | .padding_top(1) |
| 12515 | .padding_bottom(1) |
| 12516 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc4); |
| 12517 | } |
| 12518 | } |
| 12519 | } |
| 12520 | |
| 12521 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_1X4_ACC4, padding_top_eq_1) { |
| 12522 | TEST_REQUIRES_X86_SSE; |
| 12523 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 12524 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12525 | DWConv2DMicrokernelTester() |
| 12526 | .input_width(input_width) |
| 12527 | .input_height(input_height) |
| 12528 | .kernel_height(3) |
| 12529 | .kernel_width(3) |
| 12530 | .subsampling(2) |
| 12531 | .padding_left(1) |
| 12532 | .padding_right(1) |
| 12533 | .padding_top(0) |
| 12534 | .padding_bottom(1) |
| 12535 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc4); |
| 12536 | } |
| 12537 | } |
| 12538 | } |
| 12539 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 12540 | |
| 12541 | |
| 12542 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 12543 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4_ACC2, output_width_eq_4) { |
| 12544 | TEST_REQUIRES_X86_SSE; |
| 12545 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 12546 | DWConv2DMicrokernelTester() |
| 12547 | .input_width(input_width) |
| 12548 | .input_height(4) |
| 12549 | .kernel_height(3) |
| 12550 | .kernel_width(3) |
| 12551 | .subsampling(2) |
| 12552 | .padding_left(1) |
| 12553 | .padding_right(1) |
| 12554 | .padding_top(1) |
| 12555 | .padding_bottom(1) |
| 12556 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4_acc2); |
| 12557 | } |
| 12558 | } |
| 12559 | |
| 12560 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4_ACC2, output_width_div_4) { |
| 12561 | TEST_REQUIRES_X86_SSE; |
| 12562 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 12563 | DWConv2DMicrokernelTester() |
| 12564 | .input_width(input_width) |
| 12565 | .input_height(4) |
| 12566 | .kernel_height(3) |
| 12567 | .kernel_width(3) |
| 12568 | .subsampling(2) |
| 12569 | .padding_left(1) |
| 12570 | .padding_right(1) |
| 12571 | .padding_top(1) |
| 12572 | .padding_bottom(1) |
| 12573 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4_acc2); |
| 12574 | } |
| 12575 | } |
| 12576 | |
| 12577 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4_ACC2, output_width_lt_4) { |
| 12578 | TEST_REQUIRES_X86_SSE; |
| 12579 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 12580 | DWConv2DMicrokernelTester() |
| 12581 | .input_width(8) |
| 12582 | .input_height(4) |
| 12583 | .kernel_height(3) |
| 12584 | .kernel_width(3) |
| 12585 | .subsampling(2) |
| 12586 | .padding_left(1) |
| 12587 | .padding_right(1) |
| 12588 | .padding_top(1) |
| 12589 | .padding_bottom(1) |
| 12590 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4_acc2); |
| 12591 | } |
| 12592 | } |
| 12593 | |
| 12594 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4_ACC2, output_width_gt_4) { |
| 12595 | TEST_REQUIRES_X86_SSE; |
| 12596 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 12597 | DWConv2DMicrokernelTester() |
| 12598 | .input_width(input_width) |
| 12599 | .input_height(4) |
| 12600 | .kernel_height(3) |
| 12601 | .kernel_width(3) |
| 12602 | .subsampling(2) |
| 12603 | .padding_left(1) |
| 12604 | .padding_right(1) |
| 12605 | .padding_top(1) |
| 12606 | .padding_bottom(1) |
| 12607 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4_acc2); |
| 12608 | } |
| 12609 | } |
| 12610 | |
| 12611 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4_ACC2, output_height_eq_2) { |
| 12612 | TEST_REQUIRES_X86_SSE; |
| 12613 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 12614 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12615 | DWConv2DMicrokernelTester() |
| 12616 | .input_width(input_width) |
| 12617 | .input_height(input_height) |
| 12618 | .kernel_height(3) |
| 12619 | .kernel_width(3) |
| 12620 | .subsampling(2) |
| 12621 | .padding_left(1) |
| 12622 | .padding_right(1) |
| 12623 | .padding_top(1) |
| 12624 | .padding_bottom(1) |
| 12625 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4_acc2); |
| 12626 | } |
| 12627 | } |
| 12628 | } |
| 12629 | |
| 12630 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4_ACC2, output_height_div_2) { |
| 12631 | TEST_REQUIRES_X86_SSE; |
| 12632 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 12633 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12634 | DWConv2DMicrokernelTester() |
| 12635 | .input_width(input_width) |
| 12636 | .input_height(input_height) |
| 12637 | .kernel_height(3) |
| 12638 | .kernel_width(3) |
| 12639 | .subsampling(2) |
| 12640 | .padding_left(1) |
| 12641 | .padding_right(1) |
| 12642 | .padding_top(1) |
| 12643 | .padding_bottom(1) |
| 12644 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4_acc2); |
| 12645 | } |
| 12646 | } |
| 12647 | } |
| 12648 | |
| 12649 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4_ACC2, output_height_lt_2) { |
| 12650 | TEST_REQUIRES_X86_SSE; |
| 12651 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 12652 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12653 | DWConv2DMicrokernelTester() |
| 12654 | .input_width(input_width) |
| 12655 | .input_height(input_height) |
| 12656 | .kernel_height(3) |
| 12657 | .kernel_width(3) |
| 12658 | .subsampling(2) |
| 12659 | .padding_left(1) |
| 12660 | .padding_right(1) |
| 12661 | .padding_top(1) |
| 12662 | .padding_bottom(1) |
| 12663 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4_acc2); |
| 12664 | } |
| 12665 | } |
| 12666 | } |
| 12667 | |
| 12668 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4_ACC2, output_height_gt_2) { |
| 12669 | TEST_REQUIRES_X86_SSE; |
| 12670 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 12671 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12672 | DWConv2DMicrokernelTester() |
| 12673 | .input_width(input_width) |
| 12674 | .input_height(input_height) |
| 12675 | .kernel_height(3) |
| 12676 | .kernel_width(3) |
| 12677 | .subsampling(2) |
| 12678 | .padding_left(1) |
| 12679 | .padding_right(1) |
| 12680 | .padding_top(1) |
| 12681 | .padding_bottom(1) |
| 12682 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4_acc2); |
| 12683 | } |
| 12684 | } |
| 12685 | } |
| 12686 | |
| 12687 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SSE_2X4_ACC2, padding_top_eq_1) { |
| 12688 | TEST_REQUIRES_X86_SSE; |
| 12689 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 12690 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 12691 | DWConv2DMicrokernelTester() |
| 12692 | .input_width(input_width) |
| 12693 | .input_height(input_height) |
| 12694 | .kernel_height(3) |
| 12695 | .kernel_width(3) |
| 12696 | .subsampling(2) |
| 12697 | .padding_left(1) |
| 12698 | .padding_right(1) |
| 12699 | .padding_top(0) |
| 12700 | .padding_bottom(1) |
| 12701 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4_acc2); |
| 12702 | } |
| 12703 | } |
| 12704 | } |
| 12705 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 12706 | |
| 12707 | |
| 12708 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| Marat Dukhan | d050389 | 2020-10-30 08:22:04 -0700 | [diff] [blame] | 12709 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4, output_width_eq_4) { |
| 12710 | TEST_REQUIRES_X86_SSE; |
| 12711 | DWConv2DMicrokernelTester() |
| 12712 | .input_width(4) |
| 12713 | .input_height(1) |
| 12714 | .kernel_height(5) |
| 12715 | .kernel_width(5) |
| 12716 | .subsampling(1) |
| 12717 | .padding_left(2) |
| 12718 | .padding_right(2) |
| 12719 | .padding_top(2) |
| 12720 | .padding_bottom(2) |
| 12721 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4); |
| 12722 | } |
| 12723 | |
| 12724 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4, output_width_div_4) { |
| 12725 | TEST_REQUIRES_X86_SSE; |
| 12726 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 12727 | DWConv2DMicrokernelTester() |
| 12728 | .input_width(input_width) |
| 12729 | .input_height(1) |
| 12730 | .kernel_height(5) |
| 12731 | .kernel_width(5) |
| 12732 | .subsampling(1) |
| 12733 | .padding_left(2) |
| 12734 | .padding_right(2) |
| 12735 | .padding_top(2) |
| 12736 | .padding_bottom(2) |
| 12737 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4); |
| 12738 | } |
| 12739 | } |
| 12740 | |
| 12741 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4, output_width_lt_4) { |
| 12742 | TEST_REQUIRES_X86_SSE; |
| 12743 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 12744 | DWConv2DMicrokernelTester() |
| 12745 | .input_width(4) |
| 12746 | .input_height(1) |
| 12747 | .kernel_height(5) |
| 12748 | .kernel_width(5) |
| 12749 | .subsampling(1) |
| 12750 | .padding_left(2) |
| 12751 | .padding_right(2) |
| 12752 | .padding_top(2) |
| 12753 | .padding_bottom(2) |
| 12754 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4); |
| 12755 | } |
| 12756 | } |
| 12757 | |
| 12758 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4, output_width_gt_4) { |
| 12759 | TEST_REQUIRES_X86_SSE; |
| 12760 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 12761 | DWConv2DMicrokernelTester() |
| 12762 | .input_width(input_width) |
| 12763 | .input_height(1) |
| 12764 | .kernel_height(5) |
| 12765 | .kernel_width(5) |
| 12766 | .subsampling(1) |
| 12767 | .padding_left(2) |
| 12768 | .padding_right(2) |
| 12769 | .padding_top(2) |
| 12770 | .padding_bottom(2) |
| 12771 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4); |
| 12772 | } |
| 12773 | } |
| 12774 | |
| 12775 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4, output_height_gt_1) { |
| 12776 | TEST_REQUIRES_X86_SSE; |
| 12777 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 12778 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 12779 | DWConv2DMicrokernelTester() |
| 12780 | .input_width(input_width) |
| 12781 | .input_height(input_height) |
| 12782 | .kernel_height(5) |
| 12783 | .kernel_width(5) |
| 12784 | .subsampling(1) |
| 12785 | .padding_left(2) |
| 12786 | .padding_right(2) |
| 12787 | .padding_top(2) |
| 12788 | .padding_bottom(2) |
| 12789 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4); |
| 12790 | } |
| 12791 | } |
| 12792 | } |
| 12793 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 12794 | |
| 12795 | |
| 12796 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 12797 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4, output_width_eq_4) { |
| 12798 | TEST_REQUIRES_X86_SSE; |
| 12799 | DWConv2DMicrokernelTester() |
| 12800 | .input_width(4) |
| 12801 | .input_height(2) |
| 12802 | .kernel_height(5) |
| 12803 | .kernel_width(5) |
| 12804 | .subsampling(1) |
| 12805 | .padding_left(2) |
| 12806 | .padding_right(2) |
| 12807 | .padding_top(2) |
| 12808 | .padding_bottom(2) |
| 12809 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4); |
| 12810 | } |
| 12811 | |
| 12812 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4, output_width_div_4) { |
| 12813 | TEST_REQUIRES_X86_SSE; |
| 12814 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 12815 | DWConv2DMicrokernelTester() |
| 12816 | .input_width(input_width) |
| 12817 | .input_height(2) |
| 12818 | .kernel_height(5) |
| 12819 | .kernel_width(5) |
| 12820 | .subsampling(1) |
| 12821 | .padding_left(2) |
| 12822 | .padding_right(2) |
| 12823 | .padding_top(2) |
| 12824 | .padding_bottom(2) |
| 12825 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4); |
| 12826 | } |
| 12827 | } |
| 12828 | |
| 12829 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4, output_width_lt_4) { |
| 12830 | TEST_REQUIRES_X86_SSE; |
| 12831 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 12832 | DWConv2DMicrokernelTester() |
| 12833 | .input_width(4) |
| 12834 | .input_height(2) |
| 12835 | .kernel_height(5) |
| 12836 | .kernel_width(5) |
| 12837 | .subsampling(1) |
| 12838 | .padding_left(2) |
| 12839 | .padding_right(2) |
| 12840 | .padding_top(2) |
| 12841 | .padding_bottom(2) |
| 12842 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4); |
| 12843 | } |
| 12844 | } |
| 12845 | |
| 12846 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4, output_width_gt_4) { |
| 12847 | TEST_REQUIRES_X86_SSE; |
| 12848 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 12849 | DWConv2DMicrokernelTester() |
| 12850 | .input_width(input_width) |
| 12851 | .input_height(2) |
| 12852 | .kernel_height(5) |
| 12853 | .kernel_width(5) |
| 12854 | .subsampling(1) |
| 12855 | .padding_left(2) |
| 12856 | .padding_right(2) |
| 12857 | .padding_top(2) |
| 12858 | .padding_bottom(2) |
| 12859 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4); |
| 12860 | } |
| 12861 | } |
| 12862 | |
| 12863 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4, output_height_div_2) { |
| 12864 | TEST_REQUIRES_X86_SSE; |
| 12865 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 12866 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 12867 | DWConv2DMicrokernelTester() |
| 12868 | .input_width(input_width) |
| 12869 | .input_height(input_height) |
| 12870 | .kernel_height(5) |
| 12871 | .kernel_width(5) |
| 12872 | .subsampling(1) |
| 12873 | .padding_left(2) |
| 12874 | .padding_right(2) |
| 12875 | .padding_top(2) |
| 12876 | .padding_bottom(2) |
| 12877 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4); |
| 12878 | } |
| 12879 | } |
| 12880 | } |
| 12881 | |
| 12882 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4, output_height_lt_2) { |
| 12883 | TEST_REQUIRES_X86_SSE; |
| 12884 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 12885 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 12886 | DWConv2DMicrokernelTester() |
| 12887 | .input_width(input_width) |
| 12888 | .input_height(input_height) |
| 12889 | .kernel_height(5) |
| 12890 | .kernel_width(5) |
| 12891 | .subsampling(1) |
| 12892 | .padding_left(2) |
| 12893 | .padding_right(2) |
| 12894 | .padding_top(2) |
| 12895 | .padding_bottom(2) |
| 12896 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4); |
| 12897 | } |
| 12898 | } |
| 12899 | } |
| 12900 | |
| 12901 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4, output_height_gt_2) { |
| 12902 | TEST_REQUIRES_X86_SSE; |
| 12903 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 12904 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 12905 | DWConv2DMicrokernelTester() |
| 12906 | .input_width(input_width) |
| 12907 | .input_height(input_height) |
| 12908 | .kernel_height(5) |
| 12909 | .kernel_width(5) |
| 12910 | .subsampling(1) |
| 12911 | .padding_left(2) |
| 12912 | .padding_right(2) |
| 12913 | .padding_top(2) |
| 12914 | .padding_bottom(2) |
| 12915 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4); |
| 12916 | } |
| 12917 | } |
| 12918 | } |
| 12919 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 12920 | |
| 12921 | |
| 12922 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 12923 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4, output_width_eq_4) { |
| 12924 | TEST_REQUIRES_X86_SSE; |
| 12925 | DWConv2DMicrokernelTester() |
| 12926 | .input_width(4) |
| 12927 | .input_height(3) |
| 12928 | .kernel_height(5) |
| 12929 | .kernel_width(5) |
| 12930 | .subsampling(1) |
| 12931 | .padding_left(2) |
| 12932 | .padding_right(2) |
| 12933 | .padding_top(2) |
| 12934 | .padding_bottom(2) |
| 12935 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4); |
| 12936 | } |
| 12937 | |
| 12938 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4, output_width_div_4) { |
| 12939 | TEST_REQUIRES_X86_SSE; |
| 12940 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 12941 | DWConv2DMicrokernelTester() |
| 12942 | .input_width(input_width) |
| 12943 | .input_height(3) |
| 12944 | .kernel_height(5) |
| 12945 | .kernel_width(5) |
| 12946 | .subsampling(1) |
| 12947 | .padding_left(2) |
| 12948 | .padding_right(2) |
| 12949 | .padding_top(2) |
| 12950 | .padding_bottom(2) |
| 12951 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4); |
| 12952 | } |
| 12953 | } |
| 12954 | |
| 12955 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4, output_width_lt_4) { |
| 12956 | TEST_REQUIRES_X86_SSE; |
| 12957 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 12958 | DWConv2DMicrokernelTester() |
| 12959 | .input_width(4) |
| 12960 | .input_height(3) |
| 12961 | .kernel_height(5) |
| 12962 | .kernel_width(5) |
| 12963 | .subsampling(1) |
| 12964 | .padding_left(2) |
| 12965 | .padding_right(2) |
| 12966 | .padding_top(2) |
| 12967 | .padding_bottom(2) |
| 12968 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4); |
| 12969 | } |
| 12970 | } |
| 12971 | |
| 12972 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4, output_width_gt_4) { |
| 12973 | TEST_REQUIRES_X86_SSE; |
| 12974 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 12975 | DWConv2DMicrokernelTester() |
| 12976 | .input_width(input_width) |
| 12977 | .input_height(3) |
| 12978 | .kernel_height(5) |
| 12979 | .kernel_width(5) |
| 12980 | .subsampling(1) |
| 12981 | .padding_left(2) |
| 12982 | .padding_right(2) |
| 12983 | .padding_top(2) |
| 12984 | .padding_bottom(2) |
| 12985 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4); |
| 12986 | } |
| 12987 | } |
| 12988 | |
| 12989 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4, output_height_div_3) { |
| 12990 | TEST_REQUIRES_X86_SSE; |
| 12991 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 12992 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 12993 | DWConv2DMicrokernelTester() |
| 12994 | .input_width(input_width) |
| 12995 | .input_height(input_height) |
| 12996 | .kernel_height(5) |
| 12997 | .kernel_width(5) |
| 12998 | .subsampling(1) |
| 12999 | .padding_left(2) |
| 13000 | .padding_right(2) |
| 13001 | .padding_top(2) |
| 13002 | .padding_bottom(2) |
| 13003 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4); |
| 13004 | } |
| 13005 | } |
| 13006 | } |
| 13007 | |
| 13008 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4, output_height_lt_3) { |
| 13009 | TEST_REQUIRES_X86_SSE; |
| 13010 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 13011 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13012 | DWConv2DMicrokernelTester() |
| 13013 | .input_width(input_width) |
| 13014 | .input_height(input_height) |
| 13015 | .kernel_height(5) |
| 13016 | .kernel_width(5) |
| 13017 | .subsampling(1) |
| 13018 | .padding_left(2) |
| 13019 | .padding_right(2) |
| 13020 | .padding_top(2) |
| 13021 | .padding_bottom(2) |
| 13022 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4); |
| 13023 | } |
| 13024 | } |
| 13025 | } |
| 13026 | |
| 13027 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4, output_height_gt_3) { |
| 13028 | TEST_REQUIRES_X86_SSE; |
| 13029 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 13030 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13031 | DWConv2DMicrokernelTester() |
| 13032 | .input_width(input_width) |
| 13033 | .input_height(input_height) |
| 13034 | .kernel_height(5) |
| 13035 | .kernel_width(5) |
| 13036 | .subsampling(1) |
| 13037 | .padding_left(2) |
| 13038 | .padding_right(2) |
| 13039 | .padding_top(2) |
| 13040 | .padding_bottom(2) |
| 13041 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4); |
| 13042 | } |
| 13043 | } |
| 13044 | } |
| 13045 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13046 | |
| 13047 | |
| 13048 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13049 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4, output_width_eq_4) { |
| 13050 | TEST_REQUIRES_X86_SSE; |
| 13051 | DWConv2DMicrokernelTester() |
| 13052 | .input_width(4) |
| 13053 | .input_height(4) |
| 13054 | .kernel_height(5) |
| 13055 | .kernel_width(5) |
| 13056 | .subsampling(1) |
| 13057 | .padding_left(2) |
| 13058 | .padding_right(2) |
| 13059 | .padding_top(2) |
| 13060 | .padding_bottom(2) |
| 13061 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4); |
| 13062 | } |
| 13063 | |
| 13064 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4, output_width_div_4) { |
| 13065 | TEST_REQUIRES_X86_SSE; |
| 13066 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 13067 | DWConv2DMicrokernelTester() |
| 13068 | .input_width(input_width) |
| 13069 | .input_height(4) |
| 13070 | .kernel_height(5) |
| 13071 | .kernel_width(5) |
| 13072 | .subsampling(1) |
| 13073 | .padding_left(2) |
| 13074 | .padding_right(2) |
| 13075 | .padding_top(2) |
| 13076 | .padding_bottom(2) |
| 13077 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4); |
| 13078 | } |
| 13079 | } |
| 13080 | |
| 13081 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4, output_width_lt_4) { |
| 13082 | TEST_REQUIRES_X86_SSE; |
| 13083 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 13084 | DWConv2DMicrokernelTester() |
| 13085 | .input_width(4) |
| 13086 | .input_height(4) |
| 13087 | .kernel_height(5) |
| 13088 | .kernel_width(5) |
| 13089 | .subsampling(1) |
| 13090 | .padding_left(2) |
| 13091 | .padding_right(2) |
| 13092 | .padding_top(2) |
| 13093 | .padding_bottom(2) |
| 13094 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4); |
| 13095 | } |
| 13096 | } |
| 13097 | |
| 13098 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4, output_width_gt_4) { |
| 13099 | TEST_REQUIRES_X86_SSE; |
| 13100 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 13101 | DWConv2DMicrokernelTester() |
| 13102 | .input_width(input_width) |
| 13103 | .input_height(4) |
| 13104 | .kernel_height(5) |
| 13105 | .kernel_width(5) |
| 13106 | .subsampling(1) |
| 13107 | .padding_left(2) |
| 13108 | .padding_right(2) |
| 13109 | .padding_top(2) |
| 13110 | .padding_bottom(2) |
| 13111 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4); |
| 13112 | } |
| 13113 | } |
| 13114 | |
| 13115 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4, output_height_div_4) { |
| 13116 | TEST_REQUIRES_X86_SSE; |
| 13117 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 13118 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13119 | DWConv2DMicrokernelTester() |
| 13120 | .input_width(input_width) |
| 13121 | .input_height(input_height) |
| 13122 | .kernel_height(5) |
| 13123 | .kernel_width(5) |
| 13124 | .subsampling(1) |
| 13125 | .padding_left(2) |
| 13126 | .padding_right(2) |
| 13127 | .padding_top(2) |
| 13128 | .padding_bottom(2) |
| 13129 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4); |
| 13130 | } |
| 13131 | } |
| 13132 | } |
| 13133 | |
| 13134 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4, output_height_lt_4) { |
| 13135 | TEST_REQUIRES_X86_SSE; |
| 13136 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 13137 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13138 | DWConv2DMicrokernelTester() |
| 13139 | .input_width(input_width) |
| 13140 | .input_height(input_height) |
| 13141 | .kernel_height(5) |
| 13142 | .kernel_width(5) |
| 13143 | .subsampling(1) |
| 13144 | .padding_left(2) |
| 13145 | .padding_right(2) |
| 13146 | .padding_top(2) |
| 13147 | .padding_bottom(2) |
| 13148 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4); |
| 13149 | } |
| 13150 | } |
| 13151 | } |
| 13152 | |
| 13153 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4, output_height_gt_4) { |
| 13154 | TEST_REQUIRES_X86_SSE; |
| 13155 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 13156 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13157 | DWConv2DMicrokernelTester() |
| 13158 | .input_width(input_width) |
| 13159 | .input_height(input_height) |
| 13160 | .kernel_height(5) |
| 13161 | .kernel_width(5) |
| 13162 | .subsampling(1) |
| 13163 | .padding_left(2) |
| 13164 | .padding_right(2) |
| 13165 | .padding_top(2) |
| 13166 | .padding_bottom(2) |
| 13167 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4); |
| 13168 | } |
| 13169 | } |
| 13170 | } |
| 13171 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13172 | |
| 13173 | |
| 13174 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13175 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_5X4, output_width_eq_4) { |
| 13176 | TEST_REQUIRES_X86_SSE; |
| 13177 | DWConv2DMicrokernelTester() |
| 13178 | .input_width(4) |
| 13179 | .input_height(5) |
| 13180 | .kernel_height(5) |
| 13181 | .kernel_width(5) |
| 13182 | .subsampling(1) |
| 13183 | .padding_left(2) |
| 13184 | .padding_right(2) |
| 13185 | .padding_top(2) |
| 13186 | .padding_bottom(2) |
| 13187 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_5x4); |
| 13188 | } |
| 13189 | |
| 13190 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_5X4, output_width_div_4) { |
| 13191 | TEST_REQUIRES_X86_SSE; |
| 13192 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 13193 | DWConv2DMicrokernelTester() |
| 13194 | .input_width(input_width) |
| 13195 | .input_height(5) |
| 13196 | .kernel_height(5) |
| 13197 | .kernel_width(5) |
| 13198 | .subsampling(1) |
| 13199 | .padding_left(2) |
| 13200 | .padding_right(2) |
| 13201 | .padding_top(2) |
| 13202 | .padding_bottom(2) |
| 13203 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_5x4); |
| 13204 | } |
| 13205 | } |
| 13206 | |
| 13207 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_5X4, output_width_lt_4) { |
| 13208 | TEST_REQUIRES_X86_SSE; |
| 13209 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 13210 | DWConv2DMicrokernelTester() |
| 13211 | .input_width(4) |
| 13212 | .input_height(5) |
| 13213 | .kernel_height(5) |
| 13214 | .kernel_width(5) |
| 13215 | .subsampling(1) |
| 13216 | .padding_left(2) |
| 13217 | .padding_right(2) |
| 13218 | .padding_top(2) |
| 13219 | .padding_bottom(2) |
| 13220 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_5x4); |
| 13221 | } |
| 13222 | } |
| 13223 | |
| 13224 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_5X4, output_width_gt_4) { |
| 13225 | TEST_REQUIRES_X86_SSE; |
| 13226 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 13227 | DWConv2DMicrokernelTester() |
| 13228 | .input_width(input_width) |
| 13229 | .input_height(5) |
| 13230 | .kernel_height(5) |
| 13231 | .kernel_width(5) |
| 13232 | .subsampling(1) |
| 13233 | .padding_left(2) |
| 13234 | .padding_right(2) |
| 13235 | .padding_top(2) |
| 13236 | .padding_bottom(2) |
| 13237 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_5x4); |
| 13238 | } |
| 13239 | } |
| 13240 | |
| 13241 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_5X4, output_height_div_5) { |
| 13242 | TEST_REQUIRES_X86_SSE; |
| 13243 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 13244 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13245 | DWConv2DMicrokernelTester() |
| 13246 | .input_width(input_width) |
| 13247 | .input_height(input_height) |
| 13248 | .kernel_height(5) |
| 13249 | .kernel_width(5) |
| 13250 | .subsampling(1) |
| 13251 | .padding_left(2) |
| 13252 | .padding_right(2) |
| 13253 | .padding_top(2) |
| 13254 | .padding_bottom(2) |
| 13255 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_5x4); |
| 13256 | } |
| 13257 | } |
| 13258 | } |
| 13259 | |
| 13260 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_5X4, output_height_lt_5) { |
| 13261 | TEST_REQUIRES_X86_SSE; |
| 13262 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 13263 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13264 | DWConv2DMicrokernelTester() |
| 13265 | .input_width(input_width) |
| 13266 | .input_height(input_height) |
| 13267 | .kernel_height(5) |
| 13268 | .kernel_width(5) |
| 13269 | .subsampling(1) |
| 13270 | .padding_left(2) |
| 13271 | .padding_right(2) |
| 13272 | .padding_top(2) |
| 13273 | .padding_bottom(2) |
| 13274 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_5x4); |
| 13275 | } |
| 13276 | } |
| 13277 | } |
| 13278 | |
| 13279 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_5X4, output_height_gt_5) { |
| 13280 | TEST_REQUIRES_X86_SSE; |
| 13281 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 13282 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13283 | DWConv2DMicrokernelTester() |
| 13284 | .input_width(input_width) |
| 13285 | .input_height(input_height) |
| 13286 | .kernel_height(5) |
| 13287 | .kernel_width(5) |
| 13288 | .subsampling(1) |
| 13289 | .padding_left(2) |
| 13290 | .padding_right(2) |
| 13291 | .padding_top(2) |
| 13292 | .padding_bottom(2) |
| 13293 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_5x4); |
| 13294 | } |
| 13295 | } |
| 13296 | } |
| 13297 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13298 | |
| 13299 | |
| 13300 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13301 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC2, output_width_eq_4) { |
| 13302 | TEST_REQUIRES_X86_SSE; |
| 13303 | DWConv2DMicrokernelTester() |
| 13304 | .input_width(4) |
| 13305 | .input_height(1) |
| 13306 | .kernel_height(5) |
| 13307 | .kernel_width(5) |
| 13308 | .subsampling(1) |
| 13309 | .padding_left(2) |
| 13310 | .padding_right(2) |
| 13311 | .padding_top(2) |
| 13312 | .padding_bottom(2) |
| 13313 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc2); |
| 13314 | } |
| 13315 | |
| 13316 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC2, output_width_div_4) { |
| 13317 | TEST_REQUIRES_X86_SSE; |
| 13318 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 13319 | DWConv2DMicrokernelTester() |
| 13320 | .input_width(input_width) |
| 13321 | .input_height(1) |
| 13322 | .kernel_height(5) |
| 13323 | .kernel_width(5) |
| 13324 | .subsampling(1) |
| 13325 | .padding_left(2) |
| 13326 | .padding_right(2) |
| 13327 | .padding_top(2) |
| 13328 | .padding_bottom(2) |
| 13329 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc2); |
| 13330 | } |
| 13331 | } |
| 13332 | |
| 13333 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC2, output_width_lt_4) { |
| 13334 | TEST_REQUIRES_X86_SSE; |
| 13335 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 13336 | DWConv2DMicrokernelTester() |
| 13337 | .input_width(4) |
| 13338 | .input_height(1) |
| 13339 | .kernel_height(5) |
| 13340 | .kernel_width(5) |
| 13341 | .subsampling(1) |
| 13342 | .padding_left(2) |
| 13343 | .padding_right(2) |
| 13344 | .padding_top(2) |
| 13345 | .padding_bottom(2) |
| 13346 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc2); |
| 13347 | } |
| 13348 | } |
| 13349 | |
| 13350 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC2, output_width_gt_4) { |
| 13351 | TEST_REQUIRES_X86_SSE; |
| 13352 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 13353 | DWConv2DMicrokernelTester() |
| 13354 | .input_width(input_width) |
| 13355 | .input_height(1) |
| 13356 | .kernel_height(5) |
| 13357 | .kernel_width(5) |
| 13358 | .subsampling(1) |
| 13359 | .padding_left(2) |
| 13360 | .padding_right(2) |
| 13361 | .padding_top(2) |
| 13362 | .padding_bottom(2) |
| 13363 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc2); |
| 13364 | } |
| 13365 | } |
| 13366 | |
| 13367 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC2, output_height_gt_1) { |
| 13368 | TEST_REQUIRES_X86_SSE; |
| 13369 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 13370 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13371 | DWConv2DMicrokernelTester() |
| 13372 | .input_width(input_width) |
| 13373 | .input_height(input_height) |
| 13374 | .kernel_height(5) |
| 13375 | .kernel_width(5) |
| 13376 | .subsampling(1) |
| 13377 | .padding_left(2) |
| 13378 | .padding_right(2) |
| 13379 | .padding_top(2) |
| 13380 | .padding_bottom(2) |
| 13381 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc2); |
| 13382 | } |
| 13383 | } |
| 13384 | } |
| 13385 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13386 | |
| 13387 | |
| 13388 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13389 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC3, output_width_eq_4) { |
| 13390 | TEST_REQUIRES_X86_SSE; |
| 13391 | DWConv2DMicrokernelTester() |
| 13392 | .input_width(4) |
| 13393 | .input_height(1) |
| 13394 | .kernel_height(5) |
| 13395 | .kernel_width(5) |
| 13396 | .subsampling(1) |
| 13397 | .padding_left(2) |
| 13398 | .padding_right(2) |
| 13399 | .padding_top(2) |
| 13400 | .padding_bottom(2) |
| 13401 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc3); |
| 13402 | } |
| 13403 | |
| 13404 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC3, output_width_div_4) { |
| 13405 | TEST_REQUIRES_X86_SSE; |
| 13406 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 13407 | DWConv2DMicrokernelTester() |
| 13408 | .input_width(input_width) |
| 13409 | .input_height(1) |
| 13410 | .kernel_height(5) |
| 13411 | .kernel_width(5) |
| 13412 | .subsampling(1) |
| 13413 | .padding_left(2) |
| 13414 | .padding_right(2) |
| 13415 | .padding_top(2) |
| 13416 | .padding_bottom(2) |
| 13417 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc3); |
| 13418 | } |
| 13419 | } |
| 13420 | |
| 13421 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC3, output_width_lt_4) { |
| 13422 | TEST_REQUIRES_X86_SSE; |
| 13423 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 13424 | DWConv2DMicrokernelTester() |
| 13425 | .input_width(4) |
| 13426 | .input_height(1) |
| 13427 | .kernel_height(5) |
| 13428 | .kernel_width(5) |
| 13429 | .subsampling(1) |
| 13430 | .padding_left(2) |
| 13431 | .padding_right(2) |
| 13432 | .padding_top(2) |
| 13433 | .padding_bottom(2) |
| 13434 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc3); |
| 13435 | } |
| 13436 | } |
| 13437 | |
| 13438 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC3, output_width_gt_4) { |
| 13439 | TEST_REQUIRES_X86_SSE; |
| 13440 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 13441 | DWConv2DMicrokernelTester() |
| 13442 | .input_width(input_width) |
| 13443 | .input_height(1) |
| 13444 | .kernel_height(5) |
| 13445 | .kernel_width(5) |
| 13446 | .subsampling(1) |
| 13447 | .padding_left(2) |
| 13448 | .padding_right(2) |
| 13449 | .padding_top(2) |
| 13450 | .padding_bottom(2) |
| 13451 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc3); |
| 13452 | } |
| 13453 | } |
| 13454 | |
| 13455 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC3, output_height_gt_1) { |
| 13456 | TEST_REQUIRES_X86_SSE; |
| 13457 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 13458 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13459 | DWConv2DMicrokernelTester() |
| 13460 | .input_width(input_width) |
| 13461 | .input_height(input_height) |
| 13462 | .kernel_height(5) |
| 13463 | .kernel_width(5) |
| 13464 | .subsampling(1) |
| 13465 | .padding_left(2) |
| 13466 | .padding_right(2) |
| 13467 | .padding_top(2) |
| 13468 | .padding_bottom(2) |
| 13469 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc3); |
| 13470 | } |
| 13471 | } |
| 13472 | } |
| 13473 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13474 | |
| 13475 | |
| 13476 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13477 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC4, output_width_eq_4) { |
| 13478 | TEST_REQUIRES_X86_SSE; |
| 13479 | DWConv2DMicrokernelTester() |
| 13480 | .input_width(4) |
| 13481 | .input_height(1) |
| 13482 | .kernel_height(5) |
| 13483 | .kernel_width(5) |
| 13484 | .subsampling(1) |
| 13485 | .padding_left(2) |
| 13486 | .padding_right(2) |
| 13487 | .padding_top(2) |
| 13488 | .padding_bottom(2) |
| 13489 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc4); |
| 13490 | } |
| 13491 | |
| 13492 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC4, output_width_div_4) { |
| 13493 | TEST_REQUIRES_X86_SSE; |
| 13494 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 13495 | DWConv2DMicrokernelTester() |
| 13496 | .input_width(input_width) |
| 13497 | .input_height(1) |
| 13498 | .kernel_height(5) |
| 13499 | .kernel_width(5) |
| 13500 | .subsampling(1) |
| 13501 | .padding_left(2) |
| 13502 | .padding_right(2) |
| 13503 | .padding_top(2) |
| 13504 | .padding_bottom(2) |
| 13505 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc4); |
| 13506 | } |
| 13507 | } |
| 13508 | |
| 13509 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC4, output_width_lt_4) { |
| 13510 | TEST_REQUIRES_X86_SSE; |
| 13511 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 13512 | DWConv2DMicrokernelTester() |
| 13513 | .input_width(4) |
| 13514 | .input_height(1) |
| 13515 | .kernel_height(5) |
| 13516 | .kernel_width(5) |
| 13517 | .subsampling(1) |
| 13518 | .padding_left(2) |
| 13519 | .padding_right(2) |
| 13520 | .padding_top(2) |
| 13521 | .padding_bottom(2) |
| 13522 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc4); |
| 13523 | } |
| 13524 | } |
| 13525 | |
| 13526 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC4, output_width_gt_4) { |
| 13527 | TEST_REQUIRES_X86_SSE; |
| 13528 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 13529 | DWConv2DMicrokernelTester() |
| 13530 | .input_width(input_width) |
| 13531 | .input_height(1) |
| 13532 | .kernel_height(5) |
| 13533 | .kernel_width(5) |
| 13534 | .subsampling(1) |
| 13535 | .padding_left(2) |
| 13536 | .padding_right(2) |
| 13537 | .padding_top(2) |
| 13538 | .padding_bottom(2) |
| 13539 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc4); |
| 13540 | } |
| 13541 | } |
| 13542 | |
| 13543 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC4, output_height_gt_1) { |
| 13544 | TEST_REQUIRES_X86_SSE; |
| 13545 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 13546 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13547 | DWConv2DMicrokernelTester() |
| 13548 | .input_width(input_width) |
| 13549 | .input_height(input_height) |
| 13550 | .kernel_height(5) |
| 13551 | .kernel_width(5) |
| 13552 | .subsampling(1) |
| 13553 | .padding_left(2) |
| 13554 | .padding_right(2) |
| 13555 | .padding_top(2) |
| 13556 | .padding_bottom(2) |
| 13557 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc4); |
| 13558 | } |
| 13559 | } |
| 13560 | } |
| 13561 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13562 | |
| 13563 | |
| 13564 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13565 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC5, output_width_eq_4) { |
| 13566 | TEST_REQUIRES_X86_SSE; |
| 13567 | DWConv2DMicrokernelTester() |
| 13568 | .input_width(4) |
| 13569 | .input_height(1) |
| 13570 | .kernel_height(5) |
| 13571 | .kernel_width(5) |
| 13572 | .subsampling(1) |
| 13573 | .padding_left(2) |
| 13574 | .padding_right(2) |
| 13575 | .padding_top(2) |
| 13576 | .padding_bottom(2) |
| 13577 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc5); |
| 13578 | } |
| 13579 | |
| 13580 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC5, output_width_div_4) { |
| 13581 | TEST_REQUIRES_X86_SSE; |
| 13582 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 13583 | DWConv2DMicrokernelTester() |
| 13584 | .input_width(input_width) |
| 13585 | .input_height(1) |
| 13586 | .kernel_height(5) |
| 13587 | .kernel_width(5) |
| 13588 | .subsampling(1) |
| 13589 | .padding_left(2) |
| 13590 | .padding_right(2) |
| 13591 | .padding_top(2) |
| 13592 | .padding_bottom(2) |
| 13593 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc5); |
| 13594 | } |
| 13595 | } |
| 13596 | |
| 13597 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC5, output_width_lt_4) { |
| 13598 | TEST_REQUIRES_X86_SSE; |
| 13599 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 13600 | DWConv2DMicrokernelTester() |
| 13601 | .input_width(4) |
| 13602 | .input_height(1) |
| 13603 | .kernel_height(5) |
| 13604 | .kernel_width(5) |
| 13605 | .subsampling(1) |
| 13606 | .padding_left(2) |
| 13607 | .padding_right(2) |
| 13608 | .padding_top(2) |
| 13609 | .padding_bottom(2) |
| 13610 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc5); |
| 13611 | } |
| 13612 | } |
| 13613 | |
| 13614 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC5, output_width_gt_4) { |
| 13615 | TEST_REQUIRES_X86_SSE; |
| 13616 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 13617 | DWConv2DMicrokernelTester() |
| 13618 | .input_width(input_width) |
| 13619 | .input_height(1) |
| 13620 | .kernel_height(5) |
| 13621 | .kernel_width(5) |
| 13622 | .subsampling(1) |
| 13623 | .padding_left(2) |
| 13624 | .padding_right(2) |
| 13625 | .padding_top(2) |
| 13626 | .padding_bottom(2) |
| 13627 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc5); |
| 13628 | } |
| 13629 | } |
| 13630 | |
| 13631 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_1X4_ACC5, output_height_gt_1) { |
| 13632 | TEST_REQUIRES_X86_SSE; |
| 13633 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 13634 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13635 | DWConv2DMicrokernelTester() |
| 13636 | .input_width(input_width) |
| 13637 | .input_height(input_height) |
| 13638 | .kernel_height(5) |
| 13639 | .kernel_width(5) |
| 13640 | .subsampling(1) |
| 13641 | .padding_left(2) |
| 13642 | .padding_right(2) |
| 13643 | .padding_top(2) |
| 13644 | .padding_bottom(2) |
| 13645 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc5); |
| 13646 | } |
| 13647 | } |
| 13648 | } |
| 13649 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13650 | |
| 13651 | |
| 13652 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13653 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC2, output_width_eq_4) { |
| 13654 | TEST_REQUIRES_X86_SSE; |
| 13655 | DWConv2DMicrokernelTester() |
| 13656 | .input_width(4) |
| 13657 | .input_height(2) |
| 13658 | .kernel_height(5) |
| 13659 | .kernel_width(5) |
| 13660 | .subsampling(1) |
| 13661 | .padding_left(2) |
| 13662 | .padding_right(2) |
| 13663 | .padding_top(2) |
| 13664 | .padding_bottom(2) |
| 13665 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc2); |
| 13666 | } |
| 13667 | |
| 13668 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC2, output_width_div_4) { |
| 13669 | TEST_REQUIRES_X86_SSE; |
| 13670 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 13671 | DWConv2DMicrokernelTester() |
| 13672 | .input_width(input_width) |
| 13673 | .input_height(2) |
| 13674 | .kernel_height(5) |
| 13675 | .kernel_width(5) |
| 13676 | .subsampling(1) |
| 13677 | .padding_left(2) |
| 13678 | .padding_right(2) |
| 13679 | .padding_top(2) |
| 13680 | .padding_bottom(2) |
| 13681 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc2); |
| 13682 | } |
| 13683 | } |
| 13684 | |
| 13685 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC2, output_width_lt_4) { |
| 13686 | TEST_REQUIRES_X86_SSE; |
| 13687 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 13688 | DWConv2DMicrokernelTester() |
| 13689 | .input_width(4) |
| 13690 | .input_height(2) |
| 13691 | .kernel_height(5) |
| 13692 | .kernel_width(5) |
| 13693 | .subsampling(1) |
| 13694 | .padding_left(2) |
| 13695 | .padding_right(2) |
| 13696 | .padding_top(2) |
| 13697 | .padding_bottom(2) |
| 13698 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc2); |
| 13699 | } |
| 13700 | } |
| 13701 | |
| 13702 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC2, output_width_gt_4) { |
| 13703 | TEST_REQUIRES_X86_SSE; |
| 13704 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 13705 | DWConv2DMicrokernelTester() |
| 13706 | .input_width(input_width) |
| 13707 | .input_height(2) |
| 13708 | .kernel_height(5) |
| 13709 | .kernel_width(5) |
| 13710 | .subsampling(1) |
| 13711 | .padding_left(2) |
| 13712 | .padding_right(2) |
| 13713 | .padding_top(2) |
| 13714 | .padding_bottom(2) |
| 13715 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc2); |
| 13716 | } |
| 13717 | } |
| 13718 | |
| 13719 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC2, output_height_div_2) { |
| 13720 | TEST_REQUIRES_X86_SSE; |
| 13721 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 13722 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13723 | DWConv2DMicrokernelTester() |
| 13724 | .input_width(input_width) |
| 13725 | .input_height(input_height) |
| 13726 | .kernel_height(5) |
| 13727 | .kernel_width(5) |
| 13728 | .subsampling(1) |
| 13729 | .padding_left(2) |
| 13730 | .padding_right(2) |
| 13731 | .padding_top(2) |
| 13732 | .padding_bottom(2) |
| 13733 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc2); |
| 13734 | } |
| 13735 | } |
| 13736 | } |
| 13737 | |
| 13738 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC2, output_height_lt_2) { |
| 13739 | TEST_REQUIRES_X86_SSE; |
| 13740 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 13741 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13742 | DWConv2DMicrokernelTester() |
| 13743 | .input_width(input_width) |
| 13744 | .input_height(input_height) |
| 13745 | .kernel_height(5) |
| 13746 | .kernel_width(5) |
| 13747 | .subsampling(1) |
| 13748 | .padding_left(2) |
| 13749 | .padding_right(2) |
| 13750 | .padding_top(2) |
| 13751 | .padding_bottom(2) |
| 13752 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc2); |
| 13753 | } |
| 13754 | } |
| 13755 | } |
| 13756 | |
| 13757 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC2, output_height_gt_2) { |
| 13758 | TEST_REQUIRES_X86_SSE; |
| 13759 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 13760 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13761 | DWConv2DMicrokernelTester() |
| 13762 | .input_width(input_width) |
| 13763 | .input_height(input_height) |
| 13764 | .kernel_height(5) |
| 13765 | .kernel_width(5) |
| 13766 | .subsampling(1) |
| 13767 | .padding_left(2) |
| 13768 | .padding_right(2) |
| 13769 | .padding_top(2) |
| 13770 | .padding_bottom(2) |
| 13771 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc2); |
| 13772 | } |
| 13773 | } |
| 13774 | } |
| 13775 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13776 | |
| 13777 | |
| 13778 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13779 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC3, output_width_eq_4) { |
| 13780 | TEST_REQUIRES_X86_SSE; |
| 13781 | DWConv2DMicrokernelTester() |
| 13782 | .input_width(4) |
| 13783 | .input_height(2) |
| 13784 | .kernel_height(5) |
| 13785 | .kernel_width(5) |
| 13786 | .subsampling(1) |
| 13787 | .padding_left(2) |
| 13788 | .padding_right(2) |
| 13789 | .padding_top(2) |
| 13790 | .padding_bottom(2) |
| 13791 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc3); |
| 13792 | } |
| 13793 | |
| 13794 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC3, output_width_div_4) { |
| 13795 | TEST_REQUIRES_X86_SSE; |
| 13796 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 13797 | DWConv2DMicrokernelTester() |
| 13798 | .input_width(input_width) |
| 13799 | .input_height(2) |
| 13800 | .kernel_height(5) |
| 13801 | .kernel_width(5) |
| 13802 | .subsampling(1) |
| 13803 | .padding_left(2) |
| 13804 | .padding_right(2) |
| 13805 | .padding_top(2) |
| 13806 | .padding_bottom(2) |
| 13807 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc3); |
| 13808 | } |
| 13809 | } |
| 13810 | |
| 13811 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC3, output_width_lt_4) { |
| 13812 | TEST_REQUIRES_X86_SSE; |
| 13813 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 13814 | DWConv2DMicrokernelTester() |
| 13815 | .input_width(4) |
| 13816 | .input_height(2) |
| 13817 | .kernel_height(5) |
| 13818 | .kernel_width(5) |
| 13819 | .subsampling(1) |
| 13820 | .padding_left(2) |
| 13821 | .padding_right(2) |
| 13822 | .padding_top(2) |
| 13823 | .padding_bottom(2) |
| 13824 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc3); |
| 13825 | } |
| 13826 | } |
| 13827 | |
| 13828 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC3, output_width_gt_4) { |
| 13829 | TEST_REQUIRES_X86_SSE; |
| 13830 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 13831 | DWConv2DMicrokernelTester() |
| 13832 | .input_width(input_width) |
| 13833 | .input_height(2) |
| 13834 | .kernel_height(5) |
| 13835 | .kernel_width(5) |
| 13836 | .subsampling(1) |
| 13837 | .padding_left(2) |
| 13838 | .padding_right(2) |
| 13839 | .padding_top(2) |
| 13840 | .padding_bottom(2) |
| 13841 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc3); |
| 13842 | } |
| 13843 | } |
| 13844 | |
| 13845 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC3, output_height_div_2) { |
| 13846 | TEST_REQUIRES_X86_SSE; |
| 13847 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 13848 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13849 | DWConv2DMicrokernelTester() |
| 13850 | .input_width(input_width) |
| 13851 | .input_height(input_height) |
| 13852 | .kernel_height(5) |
| 13853 | .kernel_width(5) |
| 13854 | .subsampling(1) |
| 13855 | .padding_left(2) |
| 13856 | .padding_right(2) |
| 13857 | .padding_top(2) |
| 13858 | .padding_bottom(2) |
| 13859 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc3); |
| 13860 | } |
| 13861 | } |
| 13862 | } |
| 13863 | |
| 13864 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC3, output_height_lt_2) { |
| 13865 | TEST_REQUIRES_X86_SSE; |
| 13866 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 13867 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13868 | DWConv2DMicrokernelTester() |
| 13869 | .input_width(input_width) |
| 13870 | .input_height(input_height) |
| 13871 | .kernel_height(5) |
| 13872 | .kernel_width(5) |
| 13873 | .subsampling(1) |
| 13874 | .padding_left(2) |
| 13875 | .padding_right(2) |
| 13876 | .padding_top(2) |
| 13877 | .padding_bottom(2) |
| 13878 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc3); |
| 13879 | } |
| 13880 | } |
| 13881 | } |
| 13882 | |
| 13883 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_2X4_ACC3, output_height_gt_2) { |
| 13884 | TEST_REQUIRES_X86_SSE; |
| 13885 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 13886 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13887 | DWConv2DMicrokernelTester() |
| 13888 | .input_width(input_width) |
| 13889 | .input_height(input_height) |
| 13890 | .kernel_height(5) |
| 13891 | .kernel_width(5) |
| 13892 | .subsampling(1) |
| 13893 | .padding_left(2) |
| 13894 | .padding_right(2) |
| 13895 | .padding_top(2) |
| 13896 | .padding_bottom(2) |
| 13897 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc3); |
| 13898 | } |
| 13899 | } |
| 13900 | } |
| 13901 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13902 | |
| 13903 | |
| 13904 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 13905 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4_ACC2, output_width_eq_4) { |
| 13906 | TEST_REQUIRES_X86_SSE; |
| 13907 | DWConv2DMicrokernelTester() |
| 13908 | .input_width(4) |
| 13909 | .input_height(3) |
| 13910 | .kernel_height(5) |
| 13911 | .kernel_width(5) |
| 13912 | .subsampling(1) |
| 13913 | .padding_left(2) |
| 13914 | .padding_right(2) |
| 13915 | .padding_top(2) |
| 13916 | .padding_bottom(2) |
| 13917 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4_acc2); |
| 13918 | } |
| 13919 | |
| 13920 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4_ACC2, output_width_div_4) { |
| 13921 | TEST_REQUIRES_X86_SSE; |
| 13922 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 13923 | DWConv2DMicrokernelTester() |
| 13924 | .input_width(input_width) |
| 13925 | .input_height(3) |
| 13926 | .kernel_height(5) |
| 13927 | .kernel_width(5) |
| 13928 | .subsampling(1) |
| 13929 | .padding_left(2) |
| 13930 | .padding_right(2) |
| 13931 | .padding_top(2) |
| 13932 | .padding_bottom(2) |
| 13933 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4_acc2); |
| 13934 | } |
| 13935 | } |
| 13936 | |
| 13937 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4_ACC2, output_width_lt_4) { |
| 13938 | TEST_REQUIRES_X86_SSE; |
| 13939 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 13940 | DWConv2DMicrokernelTester() |
| 13941 | .input_width(4) |
| 13942 | .input_height(3) |
| 13943 | .kernel_height(5) |
| 13944 | .kernel_width(5) |
| 13945 | .subsampling(1) |
| 13946 | .padding_left(2) |
| 13947 | .padding_right(2) |
| 13948 | .padding_top(2) |
| 13949 | .padding_bottom(2) |
| 13950 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4_acc2); |
| 13951 | } |
| 13952 | } |
| 13953 | |
| 13954 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4_ACC2, output_width_gt_4) { |
| 13955 | TEST_REQUIRES_X86_SSE; |
| 13956 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 13957 | DWConv2DMicrokernelTester() |
| 13958 | .input_width(input_width) |
| 13959 | .input_height(3) |
| 13960 | .kernel_height(5) |
| 13961 | .kernel_width(5) |
| 13962 | .subsampling(1) |
| 13963 | .padding_left(2) |
| 13964 | .padding_right(2) |
| 13965 | .padding_top(2) |
| 13966 | .padding_bottom(2) |
| 13967 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4_acc2); |
| 13968 | } |
| 13969 | } |
| 13970 | |
| 13971 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4_ACC2, output_height_div_3) { |
| 13972 | TEST_REQUIRES_X86_SSE; |
| 13973 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 13974 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13975 | DWConv2DMicrokernelTester() |
| 13976 | .input_width(input_width) |
| 13977 | .input_height(input_height) |
| 13978 | .kernel_height(5) |
| 13979 | .kernel_width(5) |
| 13980 | .subsampling(1) |
| 13981 | .padding_left(2) |
| 13982 | .padding_right(2) |
| 13983 | .padding_top(2) |
| 13984 | .padding_bottom(2) |
| 13985 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4_acc2); |
| 13986 | } |
| 13987 | } |
| 13988 | } |
| 13989 | |
| 13990 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4_ACC2, output_height_lt_3) { |
| 13991 | TEST_REQUIRES_X86_SSE; |
| 13992 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 13993 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 13994 | DWConv2DMicrokernelTester() |
| 13995 | .input_width(input_width) |
| 13996 | .input_height(input_height) |
| 13997 | .kernel_height(5) |
| 13998 | .kernel_width(5) |
| 13999 | .subsampling(1) |
| 14000 | .padding_left(2) |
| 14001 | .padding_right(2) |
| 14002 | .padding_top(2) |
| 14003 | .padding_bottom(2) |
| 14004 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4_acc2); |
| 14005 | } |
| 14006 | } |
| 14007 | } |
| 14008 | |
| 14009 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_3X4_ACC2, output_height_gt_3) { |
| 14010 | TEST_REQUIRES_X86_SSE; |
| 14011 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 14012 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 14013 | DWConv2DMicrokernelTester() |
| 14014 | .input_width(input_width) |
| 14015 | .input_height(input_height) |
| 14016 | .kernel_height(5) |
| 14017 | .kernel_width(5) |
| 14018 | .subsampling(1) |
| 14019 | .padding_left(2) |
| 14020 | .padding_right(2) |
| 14021 | .padding_top(2) |
| 14022 | .padding_bottom(2) |
| 14023 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4_acc2); |
| 14024 | } |
| 14025 | } |
| 14026 | } |
| 14027 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14028 | |
| 14029 | |
| 14030 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14031 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4_ACC2, output_width_eq_4) { |
| 14032 | TEST_REQUIRES_X86_SSE; |
| 14033 | DWConv2DMicrokernelTester() |
| 14034 | .input_width(4) |
| 14035 | .input_height(4) |
| 14036 | .kernel_height(5) |
| 14037 | .kernel_width(5) |
| 14038 | .subsampling(1) |
| 14039 | .padding_left(2) |
| 14040 | .padding_right(2) |
| 14041 | .padding_top(2) |
| 14042 | .padding_bottom(2) |
| 14043 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4_acc2); |
| 14044 | } |
| 14045 | |
| 14046 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4_ACC2, output_width_div_4) { |
| 14047 | TEST_REQUIRES_X86_SSE; |
| 14048 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 14049 | DWConv2DMicrokernelTester() |
| 14050 | .input_width(input_width) |
| 14051 | .input_height(4) |
| 14052 | .kernel_height(5) |
| 14053 | .kernel_width(5) |
| 14054 | .subsampling(1) |
| 14055 | .padding_left(2) |
| 14056 | .padding_right(2) |
| 14057 | .padding_top(2) |
| 14058 | .padding_bottom(2) |
| 14059 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4_acc2); |
| 14060 | } |
| 14061 | } |
| 14062 | |
| 14063 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4_ACC2, output_width_lt_4) { |
| 14064 | TEST_REQUIRES_X86_SSE; |
| 14065 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 14066 | DWConv2DMicrokernelTester() |
| 14067 | .input_width(4) |
| 14068 | .input_height(4) |
| 14069 | .kernel_height(5) |
| 14070 | .kernel_width(5) |
| 14071 | .subsampling(1) |
| 14072 | .padding_left(2) |
| 14073 | .padding_right(2) |
| 14074 | .padding_top(2) |
| 14075 | .padding_bottom(2) |
| 14076 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4_acc2); |
| 14077 | } |
| 14078 | } |
| 14079 | |
| 14080 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4_ACC2, output_width_gt_4) { |
| 14081 | TEST_REQUIRES_X86_SSE; |
| 14082 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 14083 | DWConv2DMicrokernelTester() |
| 14084 | .input_width(input_width) |
| 14085 | .input_height(4) |
| 14086 | .kernel_height(5) |
| 14087 | .kernel_width(5) |
| 14088 | .subsampling(1) |
| 14089 | .padding_left(2) |
| 14090 | .padding_right(2) |
| 14091 | .padding_top(2) |
| 14092 | .padding_bottom(2) |
| 14093 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4_acc2); |
| 14094 | } |
| 14095 | } |
| 14096 | |
| 14097 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4_ACC2, output_height_div_4) { |
| 14098 | TEST_REQUIRES_X86_SSE; |
| 14099 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 14100 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 14101 | DWConv2DMicrokernelTester() |
| 14102 | .input_width(input_width) |
| 14103 | .input_height(input_height) |
| 14104 | .kernel_height(5) |
| 14105 | .kernel_width(5) |
| 14106 | .subsampling(1) |
| 14107 | .padding_left(2) |
| 14108 | .padding_right(2) |
| 14109 | .padding_top(2) |
| 14110 | .padding_bottom(2) |
| 14111 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4_acc2); |
| 14112 | } |
| 14113 | } |
| 14114 | } |
| 14115 | |
| 14116 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4_ACC2, output_height_lt_4) { |
| 14117 | TEST_REQUIRES_X86_SSE; |
| 14118 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 14119 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 14120 | DWConv2DMicrokernelTester() |
| 14121 | .input_width(input_width) |
| 14122 | .input_height(input_height) |
| 14123 | .kernel_height(5) |
| 14124 | .kernel_width(5) |
| 14125 | .subsampling(1) |
| 14126 | .padding_left(2) |
| 14127 | .padding_right(2) |
| 14128 | .padding_top(2) |
| 14129 | .padding_bottom(2) |
| 14130 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4_acc2); |
| 14131 | } |
| 14132 | } |
| 14133 | } |
| 14134 | |
| 14135 | TEST(F32_DWCONV2D_CHW_5X5P2__SSE_4X4_ACC2, output_height_gt_4) { |
| 14136 | TEST_REQUIRES_X86_SSE; |
| 14137 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 14138 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 14139 | DWConv2DMicrokernelTester() |
| 14140 | .input_width(input_width) |
| 14141 | .input_height(input_height) |
| 14142 | .kernel_height(5) |
| 14143 | .kernel_width(5) |
| 14144 | .subsampling(1) |
| 14145 | .padding_left(2) |
| 14146 | .padding_right(2) |
| 14147 | .padding_top(2) |
| 14148 | .padding_bottom(2) |
| 14149 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4_acc2); |
| 14150 | } |
| 14151 | } |
| 14152 | } |
| 14153 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14154 | |
| 14155 | |
| 14156 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| Marat Dukhan | ccca214 | 2020-10-30 17:32:45 -0700 | [diff] [blame] | 14157 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4, output_width_eq_4) { |
| 14158 | TEST_REQUIRES_X86_SSE; |
| 14159 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 14160 | DWConv2DMicrokernelTester() |
| 14161 | .input_width(input_width) |
| 14162 | .input_height(2) |
| 14163 | .kernel_height(5) |
| 14164 | .kernel_width(5) |
| 14165 | .subsampling(2) |
| 14166 | .padding_left(2) |
| 14167 | .padding_right(2) |
| 14168 | .padding_top(2) |
| 14169 | .padding_bottom(2) |
| 14170 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4); |
| 14171 | } |
| 14172 | } |
| 14173 | |
| 14174 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4, output_width_div_4) { |
| 14175 | TEST_REQUIRES_X86_SSE; |
| 14176 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 14177 | DWConv2DMicrokernelTester() |
| 14178 | .input_width(input_width) |
| 14179 | .input_height(2) |
| 14180 | .kernel_height(5) |
| 14181 | .kernel_width(5) |
| 14182 | .subsampling(2) |
| 14183 | .padding_left(2) |
| 14184 | .padding_right(2) |
| 14185 | .padding_top(2) |
| 14186 | .padding_bottom(2) |
| 14187 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4); |
| 14188 | } |
| 14189 | } |
| 14190 | |
| 14191 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4, output_width_lt_4) { |
| 14192 | TEST_REQUIRES_X86_SSE; |
| 14193 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 14194 | DWConv2DMicrokernelTester() |
| 14195 | .input_width(8) |
| 14196 | .input_height(2) |
| 14197 | .kernel_height(5) |
| 14198 | .kernel_width(5) |
| 14199 | .subsampling(2) |
| 14200 | .padding_left(2) |
| 14201 | .padding_right(2) |
| 14202 | .padding_top(2) |
| 14203 | .padding_bottom(2) |
| 14204 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4); |
| 14205 | } |
| 14206 | } |
| 14207 | |
| 14208 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4, output_width_gt_4) { |
| 14209 | TEST_REQUIRES_X86_SSE; |
| 14210 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 14211 | DWConv2DMicrokernelTester() |
| 14212 | .input_width(input_width) |
| 14213 | .input_height(2) |
| 14214 | .kernel_height(5) |
| 14215 | .kernel_width(5) |
| 14216 | .subsampling(2) |
| 14217 | .padding_left(2) |
| 14218 | .padding_right(2) |
| 14219 | .padding_top(2) |
| 14220 | .padding_bottom(2) |
| 14221 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4); |
| 14222 | } |
| 14223 | } |
| 14224 | |
| 14225 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4, output_height_eq_1) { |
| 14226 | TEST_REQUIRES_X86_SSE; |
| 14227 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 14228 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14229 | DWConv2DMicrokernelTester() |
| 14230 | .input_width(input_width) |
| 14231 | .input_height(input_height) |
| 14232 | .kernel_height(5) |
| 14233 | .kernel_width(5) |
| 14234 | .subsampling(2) |
| 14235 | .padding_left(2) |
| 14236 | .padding_right(2) |
| 14237 | .padding_top(2) |
| 14238 | .padding_bottom(2) |
| 14239 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4); |
| 14240 | } |
| 14241 | } |
| 14242 | } |
| 14243 | |
| 14244 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4, output_height_gt_1) { |
| 14245 | TEST_REQUIRES_X86_SSE; |
| 14246 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 14247 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14248 | DWConv2DMicrokernelTester() |
| 14249 | .input_width(input_width) |
| 14250 | .input_height(input_height) |
| 14251 | .kernel_height(5) |
| 14252 | .kernel_width(5) |
| 14253 | .subsampling(2) |
| 14254 | .padding_left(2) |
| 14255 | .padding_right(2) |
| 14256 | .padding_top(2) |
| 14257 | .padding_bottom(2) |
| 14258 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4); |
| 14259 | } |
| 14260 | } |
| 14261 | } |
| 14262 | |
| 14263 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4, padding_top_eq_1) { |
| 14264 | TEST_REQUIRES_X86_SSE; |
| 14265 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 14266 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14267 | DWConv2DMicrokernelTester() |
| 14268 | .input_width(input_width) |
| 14269 | .input_height(input_height) |
| 14270 | .kernel_height(5) |
| 14271 | .kernel_width(5) |
| 14272 | .subsampling(2) |
| 14273 | .padding_left(2) |
| 14274 | .padding_right(2) |
| 14275 | .padding_top(1) |
| 14276 | .padding_bottom(2) |
| 14277 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4); |
| 14278 | } |
| 14279 | } |
| 14280 | } |
| 14281 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14282 | |
| 14283 | |
| 14284 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14285 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4, output_width_eq_4) { |
| 14286 | TEST_REQUIRES_X86_SSE; |
| 14287 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 14288 | DWConv2DMicrokernelTester() |
| 14289 | .input_width(input_width) |
| 14290 | .input_height(4) |
| 14291 | .kernel_height(5) |
| 14292 | .kernel_width(5) |
| 14293 | .subsampling(2) |
| 14294 | .padding_left(2) |
| 14295 | .padding_right(2) |
| 14296 | .padding_top(2) |
| 14297 | .padding_bottom(2) |
| 14298 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4); |
| 14299 | } |
| 14300 | } |
| 14301 | |
| 14302 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4, output_width_div_4) { |
| 14303 | TEST_REQUIRES_X86_SSE; |
| 14304 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 14305 | DWConv2DMicrokernelTester() |
| 14306 | .input_width(input_width) |
| 14307 | .input_height(4) |
| 14308 | .kernel_height(5) |
| 14309 | .kernel_width(5) |
| 14310 | .subsampling(2) |
| 14311 | .padding_left(2) |
| 14312 | .padding_right(2) |
| 14313 | .padding_top(2) |
| 14314 | .padding_bottom(2) |
| 14315 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4); |
| 14316 | } |
| 14317 | } |
| 14318 | |
| 14319 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4, output_width_lt_4) { |
| 14320 | TEST_REQUIRES_X86_SSE; |
| 14321 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 14322 | DWConv2DMicrokernelTester() |
| 14323 | .input_width(8) |
| 14324 | .input_height(4) |
| 14325 | .kernel_height(5) |
| 14326 | .kernel_width(5) |
| 14327 | .subsampling(2) |
| 14328 | .padding_left(2) |
| 14329 | .padding_right(2) |
| 14330 | .padding_top(2) |
| 14331 | .padding_bottom(2) |
| 14332 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4); |
| 14333 | } |
| 14334 | } |
| 14335 | |
| 14336 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4, output_width_gt_4) { |
| 14337 | TEST_REQUIRES_X86_SSE; |
| 14338 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 14339 | DWConv2DMicrokernelTester() |
| 14340 | .input_width(input_width) |
| 14341 | .input_height(4) |
| 14342 | .kernel_height(5) |
| 14343 | .kernel_width(5) |
| 14344 | .subsampling(2) |
| 14345 | .padding_left(2) |
| 14346 | .padding_right(2) |
| 14347 | .padding_top(2) |
| 14348 | .padding_bottom(2) |
| 14349 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4); |
| 14350 | } |
| 14351 | } |
| 14352 | |
| 14353 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4, output_height_eq_2) { |
| 14354 | TEST_REQUIRES_X86_SSE; |
| 14355 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 14356 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14357 | DWConv2DMicrokernelTester() |
| 14358 | .input_width(input_width) |
| 14359 | .input_height(input_height) |
| 14360 | .kernel_height(5) |
| 14361 | .kernel_width(5) |
| 14362 | .subsampling(2) |
| 14363 | .padding_left(2) |
| 14364 | .padding_right(2) |
| 14365 | .padding_top(2) |
| 14366 | .padding_bottom(2) |
| 14367 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4); |
| 14368 | } |
| 14369 | } |
| 14370 | } |
| 14371 | |
| 14372 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4, output_height_div_2) { |
| 14373 | TEST_REQUIRES_X86_SSE; |
| 14374 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 14375 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14376 | DWConv2DMicrokernelTester() |
| 14377 | .input_width(input_width) |
| 14378 | .input_height(input_height) |
| 14379 | .kernel_height(5) |
| 14380 | .kernel_width(5) |
| 14381 | .subsampling(2) |
| 14382 | .padding_left(2) |
| 14383 | .padding_right(2) |
| 14384 | .padding_top(2) |
| 14385 | .padding_bottom(2) |
| 14386 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4); |
| 14387 | } |
| 14388 | } |
| 14389 | } |
| 14390 | |
| 14391 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4, output_height_lt_2) { |
| 14392 | TEST_REQUIRES_X86_SSE; |
| 14393 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 14394 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14395 | DWConv2DMicrokernelTester() |
| 14396 | .input_width(input_width) |
| 14397 | .input_height(input_height) |
| 14398 | .kernel_height(5) |
| 14399 | .kernel_width(5) |
| 14400 | .subsampling(2) |
| 14401 | .padding_left(2) |
| 14402 | .padding_right(2) |
| 14403 | .padding_top(2) |
| 14404 | .padding_bottom(2) |
| 14405 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4); |
| 14406 | } |
| 14407 | } |
| 14408 | } |
| 14409 | |
| 14410 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4, output_height_gt_2) { |
| 14411 | TEST_REQUIRES_X86_SSE; |
| 14412 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 14413 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14414 | DWConv2DMicrokernelTester() |
| 14415 | .input_width(input_width) |
| 14416 | .input_height(input_height) |
| 14417 | .kernel_height(5) |
| 14418 | .kernel_width(5) |
| 14419 | .subsampling(2) |
| 14420 | .padding_left(2) |
| 14421 | .padding_right(2) |
| 14422 | .padding_top(2) |
| 14423 | .padding_bottom(2) |
| 14424 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4); |
| 14425 | } |
| 14426 | } |
| 14427 | } |
| 14428 | |
| 14429 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4, padding_top_eq_1) { |
| 14430 | TEST_REQUIRES_X86_SSE; |
| 14431 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 14432 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14433 | DWConv2DMicrokernelTester() |
| 14434 | .input_width(input_width) |
| 14435 | .input_height(input_height) |
| 14436 | .kernel_height(5) |
| 14437 | .kernel_width(5) |
| 14438 | .subsampling(2) |
| 14439 | .padding_left(2) |
| 14440 | .padding_right(2) |
| 14441 | .padding_top(1) |
| 14442 | .padding_bottom(2) |
| 14443 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4); |
| 14444 | } |
| 14445 | } |
| 14446 | } |
| 14447 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14448 | |
| 14449 | |
| 14450 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14451 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4, output_width_eq_4) { |
| 14452 | TEST_REQUIRES_X86_SSE; |
| 14453 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 14454 | DWConv2DMicrokernelTester() |
| 14455 | .input_width(input_width) |
| 14456 | .input_height(6) |
| 14457 | .kernel_height(5) |
| 14458 | .kernel_width(5) |
| 14459 | .subsampling(2) |
| 14460 | .padding_left(2) |
| 14461 | .padding_right(2) |
| 14462 | .padding_top(2) |
| 14463 | .padding_bottom(2) |
| 14464 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4); |
| 14465 | } |
| 14466 | } |
| 14467 | |
| 14468 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4, output_width_div_4) { |
| 14469 | TEST_REQUIRES_X86_SSE; |
| 14470 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 14471 | DWConv2DMicrokernelTester() |
| 14472 | .input_width(input_width) |
| 14473 | .input_height(6) |
| 14474 | .kernel_height(5) |
| 14475 | .kernel_width(5) |
| 14476 | .subsampling(2) |
| 14477 | .padding_left(2) |
| 14478 | .padding_right(2) |
| 14479 | .padding_top(2) |
| 14480 | .padding_bottom(2) |
| 14481 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4); |
| 14482 | } |
| 14483 | } |
| 14484 | |
| 14485 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4, output_width_lt_4) { |
| 14486 | TEST_REQUIRES_X86_SSE; |
| 14487 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 14488 | DWConv2DMicrokernelTester() |
| 14489 | .input_width(8) |
| 14490 | .input_height(6) |
| 14491 | .kernel_height(5) |
| 14492 | .kernel_width(5) |
| 14493 | .subsampling(2) |
| 14494 | .padding_left(2) |
| 14495 | .padding_right(2) |
| 14496 | .padding_top(2) |
| 14497 | .padding_bottom(2) |
| 14498 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4); |
| 14499 | } |
| 14500 | } |
| 14501 | |
| 14502 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4, output_width_gt_4) { |
| 14503 | TEST_REQUIRES_X86_SSE; |
| 14504 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 14505 | DWConv2DMicrokernelTester() |
| 14506 | .input_width(input_width) |
| 14507 | .input_height(6) |
| 14508 | .kernel_height(5) |
| 14509 | .kernel_width(5) |
| 14510 | .subsampling(2) |
| 14511 | .padding_left(2) |
| 14512 | .padding_right(2) |
| 14513 | .padding_top(2) |
| 14514 | .padding_bottom(2) |
| 14515 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4); |
| 14516 | } |
| 14517 | } |
| 14518 | |
| 14519 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4, output_height_eq_3) { |
| 14520 | TEST_REQUIRES_X86_SSE; |
| 14521 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 14522 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14523 | DWConv2DMicrokernelTester() |
| 14524 | .input_width(input_width) |
| 14525 | .input_height(input_height) |
| 14526 | .kernel_height(5) |
| 14527 | .kernel_width(5) |
| 14528 | .subsampling(2) |
| 14529 | .padding_left(2) |
| 14530 | .padding_right(2) |
| 14531 | .padding_top(2) |
| 14532 | .padding_bottom(2) |
| 14533 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4); |
| 14534 | } |
| 14535 | } |
| 14536 | } |
| 14537 | |
| 14538 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4, output_height_div_3) { |
| 14539 | TEST_REQUIRES_X86_SSE; |
| 14540 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 14541 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14542 | DWConv2DMicrokernelTester() |
| 14543 | .input_width(input_width) |
| 14544 | .input_height(input_height) |
| 14545 | .kernel_height(5) |
| 14546 | .kernel_width(5) |
| 14547 | .subsampling(2) |
| 14548 | .padding_left(2) |
| 14549 | .padding_right(2) |
| 14550 | .padding_top(2) |
| 14551 | .padding_bottom(2) |
| 14552 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4); |
| 14553 | } |
| 14554 | } |
| 14555 | } |
| 14556 | |
| 14557 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4, output_height_lt_3) { |
| 14558 | TEST_REQUIRES_X86_SSE; |
| 14559 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 14560 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14561 | DWConv2DMicrokernelTester() |
| 14562 | .input_width(input_width) |
| 14563 | .input_height(input_height) |
| 14564 | .kernel_height(5) |
| 14565 | .kernel_width(5) |
| 14566 | .subsampling(2) |
| 14567 | .padding_left(2) |
| 14568 | .padding_right(2) |
| 14569 | .padding_top(2) |
| 14570 | .padding_bottom(2) |
| 14571 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4); |
| 14572 | } |
| 14573 | } |
| 14574 | } |
| 14575 | |
| 14576 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4, output_height_gt_3) { |
| 14577 | TEST_REQUIRES_X86_SSE; |
| 14578 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 14579 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14580 | DWConv2DMicrokernelTester() |
| 14581 | .input_width(input_width) |
| 14582 | .input_height(input_height) |
| 14583 | .kernel_height(5) |
| 14584 | .kernel_width(5) |
| 14585 | .subsampling(2) |
| 14586 | .padding_left(2) |
| 14587 | .padding_right(2) |
| 14588 | .padding_top(2) |
| 14589 | .padding_bottom(2) |
| 14590 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4); |
| 14591 | } |
| 14592 | } |
| 14593 | } |
| 14594 | |
| 14595 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4, padding_top_eq_1) { |
| 14596 | TEST_REQUIRES_X86_SSE; |
| 14597 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 14598 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14599 | DWConv2DMicrokernelTester() |
| 14600 | .input_width(input_width) |
| 14601 | .input_height(input_height) |
| 14602 | .kernel_height(5) |
| 14603 | .kernel_width(5) |
| 14604 | .subsampling(2) |
| 14605 | .padding_left(2) |
| 14606 | .padding_right(2) |
| 14607 | .padding_top(1) |
| 14608 | .padding_bottom(2) |
| 14609 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4); |
| 14610 | } |
| 14611 | } |
| 14612 | } |
| 14613 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14614 | |
| 14615 | |
| 14616 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14617 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC2, output_width_eq_4) { |
| 14618 | TEST_REQUIRES_X86_SSE; |
| 14619 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 14620 | DWConv2DMicrokernelTester() |
| 14621 | .input_width(input_width) |
| 14622 | .input_height(2) |
| 14623 | .kernel_height(5) |
| 14624 | .kernel_width(5) |
| 14625 | .subsampling(2) |
| 14626 | .padding_left(2) |
| 14627 | .padding_right(2) |
| 14628 | .padding_top(2) |
| 14629 | .padding_bottom(2) |
| 14630 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc2); |
| 14631 | } |
| 14632 | } |
| 14633 | |
| 14634 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC2, output_width_div_4) { |
| 14635 | TEST_REQUIRES_X86_SSE; |
| 14636 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 14637 | DWConv2DMicrokernelTester() |
| 14638 | .input_width(input_width) |
| 14639 | .input_height(2) |
| 14640 | .kernel_height(5) |
| 14641 | .kernel_width(5) |
| 14642 | .subsampling(2) |
| 14643 | .padding_left(2) |
| 14644 | .padding_right(2) |
| 14645 | .padding_top(2) |
| 14646 | .padding_bottom(2) |
| 14647 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc2); |
| 14648 | } |
| 14649 | } |
| 14650 | |
| 14651 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC2, output_width_lt_4) { |
| 14652 | TEST_REQUIRES_X86_SSE; |
| 14653 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 14654 | DWConv2DMicrokernelTester() |
| 14655 | .input_width(8) |
| 14656 | .input_height(2) |
| 14657 | .kernel_height(5) |
| 14658 | .kernel_width(5) |
| 14659 | .subsampling(2) |
| 14660 | .padding_left(2) |
| 14661 | .padding_right(2) |
| 14662 | .padding_top(2) |
| 14663 | .padding_bottom(2) |
| 14664 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc2); |
| 14665 | } |
| 14666 | } |
| 14667 | |
| 14668 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC2, output_width_gt_4) { |
| 14669 | TEST_REQUIRES_X86_SSE; |
| 14670 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 14671 | DWConv2DMicrokernelTester() |
| 14672 | .input_width(input_width) |
| 14673 | .input_height(2) |
| 14674 | .kernel_height(5) |
| 14675 | .kernel_width(5) |
| 14676 | .subsampling(2) |
| 14677 | .padding_left(2) |
| 14678 | .padding_right(2) |
| 14679 | .padding_top(2) |
| 14680 | .padding_bottom(2) |
| 14681 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc2); |
| 14682 | } |
| 14683 | } |
| 14684 | |
| 14685 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC2, output_height_eq_1) { |
| 14686 | TEST_REQUIRES_X86_SSE; |
| 14687 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 14688 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14689 | DWConv2DMicrokernelTester() |
| 14690 | .input_width(input_width) |
| 14691 | .input_height(input_height) |
| 14692 | .kernel_height(5) |
| 14693 | .kernel_width(5) |
| 14694 | .subsampling(2) |
| 14695 | .padding_left(2) |
| 14696 | .padding_right(2) |
| 14697 | .padding_top(2) |
| 14698 | .padding_bottom(2) |
| 14699 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc2); |
| 14700 | } |
| 14701 | } |
| 14702 | } |
| 14703 | |
| 14704 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC2, output_height_gt_1) { |
| 14705 | TEST_REQUIRES_X86_SSE; |
| 14706 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 14707 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14708 | DWConv2DMicrokernelTester() |
| 14709 | .input_width(input_width) |
| 14710 | .input_height(input_height) |
| 14711 | .kernel_height(5) |
| 14712 | .kernel_width(5) |
| 14713 | .subsampling(2) |
| 14714 | .padding_left(2) |
| 14715 | .padding_right(2) |
| 14716 | .padding_top(2) |
| 14717 | .padding_bottom(2) |
| 14718 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc2); |
| 14719 | } |
| 14720 | } |
| 14721 | } |
| 14722 | |
| 14723 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC2, padding_top_eq_1) { |
| 14724 | TEST_REQUIRES_X86_SSE; |
| 14725 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 14726 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14727 | DWConv2DMicrokernelTester() |
| 14728 | .input_width(input_width) |
| 14729 | .input_height(input_height) |
| 14730 | .kernel_height(5) |
| 14731 | .kernel_width(5) |
| 14732 | .subsampling(2) |
| 14733 | .padding_left(2) |
| 14734 | .padding_right(2) |
| 14735 | .padding_top(1) |
| 14736 | .padding_bottom(2) |
| 14737 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc2); |
| 14738 | } |
| 14739 | } |
| 14740 | } |
| 14741 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14742 | |
| 14743 | |
| 14744 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14745 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC3, output_width_eq_4) { |
| 14746 | TEST_REQUIRES_X86_SSE; |
| 14747 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 14748 | DWConv2DMicrokernelTester() |
| 14749 | .input_width(input_width) |
| 14750 | .input_height(2) |
| 14751 | .kernel_height(5) |
| 14752 | .kernel_width(5) |
| 14753 | .subsampling(2) |
| 14754 | .padding_left(2) |
| 14755 | .padding_right(2) |
| 14756 | .padding_top(2) |
| 14757 | .padding_bottom(2) |
| 14758 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc3); |
| 14759 | } |
| 14760 | } |
| 14761 | |
| 14762 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC3, output_width_div_4) { |
| 14763 | TEST_REQUIRES_X86_SSE; |
| 14764 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 14765 | DWConv2DMicrokernelTester() |
| 14766 | .input_width(input_width) |
| 14767 | .input_height(2) |
| 14768 | .kernel_height(5) |
| 14769 | .kernel_width(5) |
| 14770 | .subsampling(2) |
| 14771 | .padding_left(2) |
| 14772 | .padding_right(2) |
| 14773 | .padding_top(2) |
| 14774 | .padding_bottom(2) |
| 14775 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc3); |
| 14776 | } |
| 14777 | } |
| 14778 | |
| 14779 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC3, output_width_lt_4) { |
| 14780 | TEST_REQUIRES_X86_SSE; |
| 14781 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 14782 | DWConv2DMicrokernelTester() |
| 14783 | .input_width(8) |
| 14784 | .input_height(2) |
| 14785 | .kernel_height(5) |
| 14786 | .kernel_width(5) |
| 14787 | .subsampling(2) |
| 14788 | .padding_left(2) |
| 14789 | .padding_right(2) |
| 14790 | .padding_top(2) |
| 14791 | .padding_bottom(2) |
| 14792 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc3); |
| 14793 | } |
| 14794 | } |
| 14795 | |
| 14796 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC3, output_width_gt_4) { |
| 14797 | TEST_REQUIRES_X86_SSE; |
| 14798 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 14799 | DWConv2DMicrokernelTester() |
| 14800 | .input_width(input_width) |
| 14801 | .input_height(2) |
| 14802 | .kernel_height(5) |
| 14803 | .kernel_width(5) |
| 14804 | .subsampling(2) |
| 14805 | .padding_left(2) |
| 14806 | .padding_right(2) |
| 14807 | .padding_top(2) |
| 14808 | .padding_bottom(2) |
| 14809 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc3); |
| 14810 | } |
| 14811 | } |
| 14812 | |
| 14813 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC3, output_height_eq_1) { |
| 14814 | TEST_REQUIRES_X86_SSE; |
| 14815 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 14816 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14817 | DWConv2DMicrokernelTester() |
| 14818 | .input_width(input_width) |
| 14819 | .input_height(input_height) |
| 14820 | .kernel_height(5) |
| 14821 | .kernel_width(5) |
| 14822 | .subsampling(2) |
| 14823 | .padding_left(2) |
| 14824 | .padding_right(2) |
| 14825 | .padding_top(2) |
| 14826 | .padding_bottom(2) |
| 14827 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc3); |
| 14828 | } |
| 14829 | } |
| 14830 | } |
| 14831 | |
| 14832 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC3, output_height_gt_1) { |
| 14833 | TEST_REQUIRES_X86_SSE; |
| 14834 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 14835 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14836 | DWConv2DMicrokernelTester() |
| 14837 | .input_width(input_width) |
| 14838 | .input_height(input_height) |
| 14839 | .kernel_height(5) |
| 14840 | .kernel_width(5) |
| 14841 | .subsampling(2) |
| 14842 | .padding_left(2) |
| 14843 | .padding_right(2) |
| 14844 | .padding_top(2) |
| 14845 | .padding_bottom(2) |
| 14846 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc3); |
| 14847 | } |
| 14848 | } |
| 14849 | } |
| 14850 | |
| 14851 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC3, padding_top_eq_1) { |
| 14852 | TEST_REQUIRES_X86_SSE; |
| 14853 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 14854 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14855 | DWConv2DMicrokernelTester() |
| 14856 | .input_width(input_width) |
| 14857 | .input_height(input_height) |
| 14858 | .kernel_height(5) |
| 14859 | .kernel_width(5) |
| 14860 | .subsampling(2) |
| 14861 | .padding_left(2) |
| 14862 | .padding_right(2) |
| 14863 | .padding_top(1) |
| 14864 | .padding_bottom(2) |
| 14865 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc3); |
| 14866 | } |
| 14867 | } |
| 14868 | } |
| 14869 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14870 | |
| 14871 | |
| 14872 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14873 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC4, output_width_eq_4) { |
| 14874 | TEST_REQUIRES_X86_SSE; |
| 14875 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 14876 | DWConv2DMicrokernelTester() |
| 14877 | .input_width(input_width) |
| 14878 | .input_height(2) |
| 14879 | .kernel_height(5) |
| 14880 | .kernel_width(5) |
| 14881 | .subsampling(2) |
| 14882 | .padding_left(2) |
| 14883 | .padding_right(2) |
| 14884 | .padding_top(2) |
| 14885 | .padding_bottom(2) |
| 14886 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4); |
| 14887 | } |
| 14888 | } |
| 14889 | |
| 14890 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC4, output_width_div_4) { |
| 14891 | TEST_REQUIRES_X86_SSE; |
| 14892 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 14893 | DWConv2DMicrokernelTester() |
| 14894 | .input_width(input_width) |
| 14895 | .input_height(2) |
| 14896 | .kernel_height(5) |
| 14897 | .kernel_width(5) |
| 14898 | .subsampling(2) |
| 14899 | .padding_left(2) |
| 14900 | .padding_right(2) |
| 14901 | .padding_top(2) |
| 14902 | .padding_bottom(2) |
| 14903 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4); |
| 14904 | } |
| 14905 | } |
| 14906 | |
| 14907 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC4, output_width_lt_4) { |
| 14908 | TEST_REQUIRES_X86_SSE; |
| 14909 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 14910 | DWConv2DMicrokernelTester() |
| 14911 | .input_width(8) |
| 14912 | .input_height(2) |
| 14913 | .kernel_height(5) |
| 14914 | .kernel_width(5) |
| 14915 | .subsampling(2) |
| 14916 | .padding_left(2) |
| 14917 | .padding_right(2) |
| 14918 | .padding_top(2) |
| 14919 | .padding_bottom(2) |
| 14920 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4); |
| 14921 | } |
| 14922 | } |
| 14923 | |
| 14924 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC4, output_width_gt_4) { |
| 14925 | TEST_REQUIRES_X86_SSE; |
| 14926 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 14927 | DWConv2DMicrokernelTester() |
| 14928 | .input_width(input_width) |
| 14929 | .input_height(2) |
| 14930 | .kernel_height(5) |
| 14931 | .kernel_width(5) |
| 14932 | .subsampling(2) |
| 14933 | .padding_left(2) |
| 14934 | .padding_right(2) |
| 14935 | .padding_top(2) |
| 14936 | .padding_bottom(2) |
| 14937 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4); |
| 14938 | } |
| 14939 | } |
| 14940 | |
| 14941 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC4, output_height_eq_1) { |
| 14942 | TEST_REQUIRES_X86_SSE; |
| 14943 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 14944 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14945 | DWConv2DMicrokernelTester() |
| 14946 | .input_width(input_width) |
| 14947 | .input_height(input_height) |
| 14948 | .kernel_height(5) |
| 14949 | .kernel_width(5) |
| 14950 | .subsampling(2) |
| 14951 | .padding_left(2) |
| 14952 | .padding_right(2) |
| 14953 | .padding_top(2) |
| 14954 | .padding_bottom(2) |
| 14955 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4); |
| 14956 | } |
| 14957 | } |
| 14958 | } |
| 14959 | |
| 14960 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC4, output_height_gt_1) { |
| 14961 | TEST_REQUIRES_X86_SSE; |
| 14962 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 14963 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14964 | DWConv2DMicrokernelTester() |
| 14965 | .input_width(input_width) |
| 14966 | .input_height(input_height) |
| 14967 | .kernel_height(5) |
| 14968 | .kernel_width(5) |
| 14969 | .subsampling(2) |
| 14970 | .padding_left(2) |
| 14971 | .padding_right(2) |
| 14972 | .padding_top(2) |
| 14973 | .padding_bottom(2) |
| 14974 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4); |
| 14975 | } |
| 14976 | } |
| 14977 | } |
| 14978 | |
| 14979 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC4, padding_top_eq_1) { |
| 14980 | TEST_REQUIRES_X86_SSE; |
| 14981 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 14982 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 14983 | DWConv2DMicrokernelTester() |
| 14984 | .input_width(input_width) |
| 14985 | .input_height(input_height) |
| 14986 | .kernel_height(5) |
| 14987 | .kernel_width(5) |
| 14988 | .subsampling(2) |
| 14989 | .padding_left(2) |
| 14990 | .padding_right(2) |
| 14991 | .padding_top(1) |
| 14992 | .padding_bottom(2) |
| 14993 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4); |
| 14994 | } |
| 14995 | } |
| 14996 | } |
| 14997 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 14998 | |
| 14999 | |
| 15000 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15001 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC5, output_width_eq_4) { |
| 15002 | TEST_REQUIRES_X86_SSE; |
| 15003 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 15004 | DWConv2DMicrokernelTester() |
| 15005 | .input_width(input_width) |
| 15006 | .input_height(2) |
| 15007 | .kernel_height(5) |
| 15008 | .kernel_width(5) |
| 15009 | .subsampling(2) |
| 15010 | .padding_left(2) |
| 15011 | .padding_right(2) |
| 15012 | .padding_top(2) |
| 15013 | .padding_bottom(2) |
| 15014 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc5); |
| 15015 | } |
| 15016 | } |
| 15017 | |
| 15018 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC5, output_width_div_4) { |
| 15019 | TEST_REQUIRES_X86_SSE; |
| 15020 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 15021 | DWConv2DMicrokernelTester() |
| 15022 | .input_width(input_width) |
| 15023 | .input_height(2) |
| 15024 | .kernel_height(5) |
| 15025 | .kernel_width(5) |
| 15026 | .subsampling(2) |
| 15027 | .padding_left(2) |
| 15028 | .padding_right(2) |
| 15029 | .padding_top(2) |
| 15030 | .padding_bottom(2) |
| 15031 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc5); |
| 15032 | } |
| 15033 | } |
| 15034 | |
| 15035 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC5, output_width_lt_4) { |
| 15036 | TEST_REQUIRES_X86_SSE; |
| 15037 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 15038 | DWConv2DMicrokernelTester() |
| 15039 | .input_width(8) |
| 15040 | .input_height(2) |
| 15041 | .kernel_height(5) |
| 15042 | .kernel_width(5) |
| 15043 | .subsampling(2) |
| 15044 | .padding_left(2) |
| 15045 | .padding_right(2) |
| 15046 | .padding_top(2) |
| 15047 | .padding_bottom(2) |
| 15048 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc5); |
| 15049 | } |
| 15050 | } |
| 15051 | |
| 15052 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC5, output_width_gt_4) { |
| 15053 | TEST_REQUIRES_X86_SSE; |
| 15054 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 15055 | DWConv2DMicrokernelTester() |
| 15056 | .input_width(input_width) |
| 15057 | .input_height(2) |
| 15058 | .kernel_height(5) |
| 15059 | .kernel_width(5) |
| 15060 | .subsampling(2) |
| 15061 | .padding_left(2) |
| 15062 | .padding_right(2) |
| 15063 | .padding_top(2) |
| 15064 | .padding_bottom(2) |
| 15065 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc5); |
| 15066 | } |
| 15067 | } |
| 15068 | |
| 15069 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC5, output_height_eq_1) { |
| 15070 | TEST_REQUIRES_X86_SSE; |
| 15071 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 15072 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15073 | DWConv2DMicrokernelTester() |
| 15074 | .input_width(input_width) |
| 15075 | .input_height(input_height) |
| 15076 | .kernel_height(5) |
| 15077 | .kernel_width(5) |
| 15078 | .subsampling(2) |
| 15079 | .padding_left(2) |
| 15080 | .padding_right(2) |
| 15081 | .padding_top(2) |
| 15082 | .padding_bottom(2) |
| 15083 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc5); |
| 15084 | } |
| 15085 | } |
| 15086 | } |
| 15087 | |
| 15088 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC5, output_height_gt_1) { |
| 15089 | TEST_REQUIRES_X86_SSE; |
| 15090 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 15091 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15092 | DWConv2DMicrokernelTester() |
| 15093 | .input_width(input_width) |
| 15094 | .input_height(input_height) |
| 15095 | .kernel_height(5) |
| 15096 | .kernel_width(5) |
| 15097 | .subsampling(2) |
| 15098 | .padding_left(2) |
| 15099 | .padding_right(2) |
| 15100 | .padding_top(2) |
| 15101 | .padding_bottom(2) |
| 15102 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc5); |
| 15103 | } |
| 15104 | } |
| 15105 | } |
| 15106 | |
| 15107 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_1X4_ACC5, padding_top_eq_1) { |
| 15108 | TEST_REQUIRES_X86_SSE; |
| 15109 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 15110 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15111 | DWConv2DMicrokernelTester() |
| 15112 | .input_width(input_width) |
| 15113 | .input_height(input_height) |
| 15114 | .kernel_height(5) |
| 15115 | .kernel_width(5) |
| 15116 | .subsampling(2) |
| 15117 | .padding_left(2) |
| 15118 | .padding_right(2) |
| 15119 | .padding_top(1) |
| 15120 | .padding_bottom(2) |
| 15121 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc5); |
| 15122 | } |
| 15123 | } |
| 15124 | } |
| 15125 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15126 | |
| 15127 | |
| 15128 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15129 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC2, output_width_eq_4) { |
| 15130 | TEST_REQUIRES_X86_SSE; |
| 15131 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 15132 | DWConv2DMicrokernelTester() |
| 15133 | .input_width(input_width) |
| 15134 | .input_height(4) |
| 15135 | .kernel_height(5) |
| 15136 | .kernel_width(5) |
| 15137 | .subsampling(2) |
| 15138 | .padding_left(2) |
| 15139 | .padding_right(2) |
| 15140 | .padding_top(2) |
| 15141 | .padding_bottom(2) |
| 15142 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc2); |
| 15143 | } |
| 15144 | } |
| 15145 | |
| 15146 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC2, output_width_div_4) { |
| 15147 | TEST_REQUIRES_X86_SSE; |
| 15148 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 15149 | DWConv2DMicrokernelTester() |
| 15150 | .input_width(input_width) |
| 15151 | .input_height(4) |
| 15152 | .kernel_height(5) |
| 15153 | .kernel_width(5) |
| 15154 | .subsampling(2) |
| 15155 | .padding_left(2) |
| 15156 | .padding_right(2) |
| 15157 | .padding_top(2) |
| 15158 | .padding_bottom(2) |
| 15159 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc2); |
| 15160 | } |
| 15161 | } |
| 15162 | |
| 15163 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC2, output_width_lt_4) { |
| 15164 | TEST_REQUIRES_X86_SSE; |
| 15165 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 15166 | DWConv2DMicrokernelTester() |
| 15167 | .input_width(8) |
| 15168 | .input_height(4) |
| 15169 | .kernel_height(5) |
| 15170 | .kernel_width(5) |
| 15171 | .subsampling(2) |
| 15172 | .padding_left(2) |
| 15173 | .padding_right(2) |
| 15174 | .padding_top(2) |
| 15175 | .padding_bottom(2) |
| 15176 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc2); |
| 15177 | } |
| 15178 | } |
| 15179 | |
| 15180 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC2, output_width_gt_4) { |
| 15181 | TEST_REQUIRES_X86_SSE; |
| 15182 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 15183 | DWConv2DMicrokernelTester() |
| 15184 | .input_width(input_width) |
| 15185 | .input_height(4) |
| 15186 | .kernel_height(5) |
| 15187 | .kernel_width(5) |
| 15188 | .subsampling(2) |
| 15189 | .padding_left(2) |
| 15190 | .padding_right(2) |
| 15191 | .padding_top(2) |
| 15192 | .padding_bottom(2) |
| 15193 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc2); |
| 15194 | } |
| 15195 | } |
| 15196 | |
| 15197 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC2, output_height_eq_2) { |
| 15198 | TEST_REQUIRES_X86_SSE; |
| 15199 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 15200 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15201 | DWConv2DMicrokernelTester() |
| 15202 | .input_width(input_width) |
| 15203 | .input_height(input_height) |
| 15204 | .kernel_height(5) |
| 15205 | .kernel_width(5) |
| 15206 | .subsampling(2) |
| 15207 | .padding_left(2) |
| 15208 | .padding_right(2) |
| 15209 | .padding_top(2) |
| 15210 | .padding_bottom(2) |
| 15211 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc2); |
| 15212 | } |
| 15213 | } |
| 15214 | } |
| 15215 | |
| 15216 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC2, output_height_div_2) { |
| 15217 | TEST_REQUIRES_X86_SSE; |
| 15218 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 15219 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15220 | DWConv2DMicrokernelTester() |
| 15221 | .input_width(input_width) |
| 15222 | .input_height(input_height) |
| 15223 | .kernel_height(5) |
| 15224 | .kernel_width(5) |
| 15225 | .subsampling(2) |
| 15226 | .padding_left(2) |
| 15227 | .padding_right(2) |
| 15228 | .padding_top(2) |
| 15229 | .padding_bottom(2) |
| 15230 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc2); |
| 15231 | } |
| 15232 | } |
| 15233 | } |
| 15234 | |
| 15235 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC2, output_height_lt_2) { |
| 15236 | TEST_REQUIRES_X86_SSE; |
| 15237 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 15238 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15239 | DWConv2DMicrokernelTester() |
| 15240 | .input_width(input_width) |
| 15241 | .input_height(input_height) |
| 15242 | .kernel_height(5) |
| 15243 | .kernel_width(5) |
| 15244 | .subsampling(2) |
| 15245 | .padding_left(2) |
| 15246 | .padding_right(2) |
| 15247 | .padding_top(2) |
| 15248 | .padding_bottom(2) |
| 15249 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc2); |
| 15250 | } |
| 15251 | } |
| 15252 | } |
| 15253 | |
| 15254 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC2, output_height_gt_2) { |
| 15255 | TEST_REQUIRES_X86_SSE; |
| 15256 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 15257 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15258 | DWConv2DMicrokernelTester() |
| 15259 | .input_width(input_width) |
| 15260 | .input_height(input_height) |
| 15261 | .kernel_height(5) |
| 15262 | .kernel_width(5) |
| 15263 | .subsampling(2) |
| 15264 | .padding_left(2) |
| 15265 | .padding_right(2) |
| 15266 | .padding_top(2) |
| 15267 | .padding_bottom(2) |
| 15268 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc2); |
| 15269 | } |
| 15270 | } |
| 15271 | } |
| 15272 | |
| 15273 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC2, padding_top_eq_1) { |
| 15274 | TEST_REQUIRES_X86_SSE; |
| 15275 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 15276 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15277 | DWConv2DMicrokernelTester() |
| 15278 | .input_width(input_width) |
| 15279 | .input_height(input_height) |
| 15280 | .kernel_height(5) |
| 15281 | .kernel_width(5) |
| 15282 | .subsampling(2) |
| 15283 | .padding_left(2) |
| 15284 | .padding_right(2) |
| 15285 | .padding_top(1) |
| 15286 | .padding_bottom(2) |
| 15287 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc2); |
| 15288 | } |
| 15289 | } |
| 15290 | } |
| 15291 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15292 | |
| 15293 | |
| 15294 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15295 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC3, output_width_eq_4) { |
| 15296 | TEST_REQUIRES_X86_SSE; |
| 15297 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 15298 | DWConv2DMicrokernelTester() |
| 15299 | .input_width(input_width) |
| 15300 | .input_height(4) |
| 15301 | .kernel_height(5) |
| 15302 | .kernel_width(5) |
| 15303 | .subsampling(2) |
| 15304 | .padding_left(2) |
| 15305 | .padding_right(2) |
| 15306 | .padding_top(2) |
| 15307 | .padding_bottom(2) |
| 15308 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3); |
| 15309 | } |
| 15310 | } |
| 15311 | |
| 15312 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC3, output_width_div_4) { |
| 15313 | TEST_REQUIRES_X86_SSE; |
| 15314 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 15315 | DWConv2DMicrokernelTester() |
| 15316 | .input_width(input_width) |
| 15317 | .input_height(4) |
| 15318 | .kernel_height(5) |
| 15319 | .kernel_width(5) |
| 15320 | .subsampling(2) |
| 15321 | .padding_left(2) |
| 15322 | .padding_right(2) |
| 15323 | .padding_top(2) |
| 15324 | .padding_bottom(2) |
| 15325 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3); |
| 15326 | } |
| 15327 | } |
| 15328 | |
| 15329 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC3, output_width_lt_4) { |
| 15330 | TEST_REQUIRES_X86_SSE; |
| 15331 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 15332 | DWConv2DMicrokernelTester() |
| 15333 | .input_width(8) |
| 15334 | .input_height(4) |
| 15335 | .kernel_height(5) |
| 15336 | .kernel_width(5) |
| 15337 | .subsampling(2) |
| 15338 | .padding_left(2) |
| 15339 | .padding_right(2) |
| 15340 | .padding_top(2) |
| 15341 | .padding_bottom(2) |
| 15342 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3); |
| 15343 | } |
| 15344 | } |
| 15345 | |
| 15346 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC3, output_width_gt_4) { |
| 15347 | TEST_REQUIRES_X86_SSE; |
| 15348 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 15349 | DWConv2DMicrokernelTester() |
| 15350 | .input_width(input_width) |
| 15351 | .input_height(4) |
| 15352 | .kernel_height(5) |
| 15353 | .kernel_width(5) |
| 15354 | .subsampling(2) |
| 15355 | .padding_left(2) |
| 15356 | .padding_right(2) |
| 15357 | .padding_top(2) |
| 15358 | .padding_bottom(2) |
| 15359 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3); |
| 15360 | } |
| 15361 | } |
| 15362 | |
| 15363 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC3, output_height_eq_2) { |
| 15364 | TEST_REQUIRES_X86_SSE; |
| 15365 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 15366 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15367 | DWConv2DMicrokernelTester() |
| 15368 | .input_width(input_width) |
| 15369 | .input_height(input_height) |
| 15370 | .kernel_height(5) |
| 15371 | .kernel_width(5) |
| 15372 | .subsampling(2) |
| 15373 | .padding_left(2) |
| 15374 | .padding_right(2) |
| 15375 | .padding_top(2) |
| 15376 | .padding_bottom(2) |
| 15377 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3); |
| 15378 | } |
| 15379 | } |
| 15380 | } |
| 15381 | |
| 15382 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC3, output_height_div_2) { |
| 15383 | TEST_REQUIRES_X86_SSE; |
| 15384 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 15385 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15386 | DWConv2DMicrokernelTester() |
| 15387 | .input_width(input_width) |
| 15388 | .input_height(input_height) |
| 15389 | .kernel_height(5) |
| 15390 | .kernel_width(5) |
| 15391 | .subsampling(2) |
| 15392 | .padding_left(2) |
| 15393 | .padding_right(2) |
| 15394 | .padding_top(2) |
| 15395 | .padding_bottom(2) |
| 15396 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3); |
| 15397 | } |
| 15398 | } |
| 15399 | } |
| 15400 | |
| 15401 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC3, output_height_lt_2) { |
| 15402 | TEST_REQUIRES_X86_SSE; |
| 15403 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 15404 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15405 | DWConv2DMicrokernelTester() |
| 15406 | .input_width(input_width) |
| 15407 | .input_height(input_height) |
| 15408 | .kernel_height(5) |
| 15409 | .kernel_width(5) |
| 15410 | .subsampling(2) |
| 15411 | .padding_left(2) |
| 15412 | .padding_right(2) |
| 15413 | .padding_top(2) |
| 15414 | .padding_bottom(2) |
| 15415 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3); |
| 15416 | } |
| 15417 | } |
| 15418 | } |
| 15419 | |
| 15420 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC3, output_height_gt_2) { |
| 15421 | TEST_REQUIRES_X86_SSE; |
| 15422 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 15423 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15424 | DWConv2DMicrokernelTester() |
| 15425 | .input_width(input_width) |
| 15426 | .input_height(input_height) |
| 15427 | .kernel_height(5) |
| 15428 | .kernel_width(5) |
| 15429 | .subsampling(2) |
| 15430 | .padding_left(2) |
| 15431 | .padding_right(2) |
| 15432 | .padding_top(2) |
| 15433 | .padding_bottom(2) |
| 15434 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3); |
| 15435 | } |
| 15436 | } |
| 15437 | } |
| 15438 | |
| 15439 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_2X4_ACC3, padding_top_eq_1) { |
| 15440 | TEST_REQUIRES_X86_SSE; |
| 15441 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 15442 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15443 | DWConv2DMicrokernelTester() |
| 15444 | .input_width(input_width) |
| 15445 | .input_height(input_height) |
| 15446 | .kernel_height(5) |
| 15447 | .kernel_width(5) |
| 15448 | .subsampling(2) |
| 15449 | .padding_left(2) |
| 15450 | .padding_right(2) |
| 15451 | .padding_top(1) |
| 15452 | .padding_bottom(2) |
| 15453 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3); |
| 15454 | } |
| 15455 | } |
| 15456 | } |
| 15457 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15458 | |
| 15459 | |
| 15460 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15461 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4_ACC2, output_width_eq_4) { |
| 15462 | TEST_REQUIRES_X86_SSE; |
| 15463 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 15464 | DWConv2DMicrokernelTester() |
| 15465 | .input_width(input_width) |
| 15466 | .input_height(6) |
| 15467 | .kernel_height(5) |
| 15468 | .kernel_width(5) |
| 15469 | .subsampling(2) |
| 15470 | .padding_left(2) |
| 15471 | .padding_right(2) |
| 15472 | .padding_top(2) |
| 15473 | .padding_bottom(2) |
| 15474 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4_acc2); |
| 15475 | } |
| 15476 | } |
| 15477 | |
| 15478 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4_ACC2, output_width_div_4) { |
| 15479 | TEST_REQUIRES_X86_SSE; |
| 15480 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 15481 | DWConv2DMicrokernelTester() |
| 15482 | .input_width(input_width) |
| 15483 | .input_height(6) |
| 15484 | .kernel_height(5) |
| 15485 | .kernel_width(5) |
| 15486 | .subsampling(2) |
| 15487 | .padding_left(2) |
| 15488 | .padding_right(2) |
| 15489 | .padding_top(2) |
| 15490 | .padding_bottom(2) |
| 15491 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4_acc2); |
| 15492 | } |
| 15493 | } |
| 15494 | |
| 15495 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4_ACC2, output_width_lt_4) { |
| 15496 | TEST_REQUIRES_X86_SSE; |
| 15497 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 15498 | DWConv2DMicrokernelTester() |
| 15499 | .input_width(8) |
| 15500 | .input_height(6) |
| 15501 | .kernel_height(5) |
| 15502 | .kernel_width(5) |
| 15503 | .subsampling(2) |
| 15504 | .padding_left(2) |
| 15505 | .padding_right(2) |
| 15506 | .padding_top(2) |
| 15507 | .padding_bottom(2) |
| 15508 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4_acc2); |
| 15509 | } |
| 15510 | } |
| 15511 | |
| 15512 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4_ACC2, output_width_gt_4) { |
| 15513 | TEST_REQUIRES_X86_SSE; |
| 15514 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 15515 | DWConv2DMicrokernelTester() |
| 15516 | .input_width(input_width) |
| 15517 | .input_height(6) |
| 15518 | .kernel_height(5) |
| 15519 | .kernel_width(5) |
| 15520 | .subsampling(2) |
| 15521 | .padding_left(2) |
| 15522 | .padding_right(2) |
| 15523 | .padding_top(2) |
| 15524 | .padding_bottom(2) |
| 15525 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4_acc2); |
| 15526 | } |
| 15527 | } |
| 15528 | |
| 15529 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4_ACC2, output_height_eq_3) { |
| 15530 | TEST_REQUIRES_X86_SSE; |
| 15531 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 15532 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15533 | DWConv2DMicrokernelTester() |
| 15534 | .input_width(input_width) |
| 15535 | .input_height(input_height) |
| 15536 | .kernel_height(5) |
| 15537 | .kernel_width(5) |
| 15538 | .subsampling(2) |
| 15539 | .padding_left(2) |
| 15540 | .padding_right(2) |
| 15541 | .padding_top(2) |
| 15542 | .padding_bottom(2) |
| 15543 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4_acc2); |
| 15544 | } |
| 15545 | } |
| 15546 | } |
| 15547 | |
| 15548 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4_ACC2, output_height_div_3) { |
| 15549 | TEST_REQUIRES_X86_SSE; |
| 15550 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 15551 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15552 | DWConv2DMicrokernelTester() |
| 15553 | .input_width(input_width) |
| 15554 | .input_height(input_height) |
| 15555 | .kernel_height(5) |
| 15556 | .kernel_width(5) |
| 15557 | .subsampling(2) |
| 15558 | .padding_left(2) |
| 15559 | .padding_right(2) |
| 15560 | .padding_top(2) |
| 15561 | .padding_bottom(2) |
| 15562 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4_acc2); |
| 15563 | } |
| 15564 | } |
| 15565 | } |
| 15566 | |
| 15567 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4_ACC2, output_height_lt_3) { |
| 15568 | TEST_REQUIRES_X86_SSE; |
| 15569 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 15570 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15571 | DWConv2DMicrokernelTester() |
| 15572 | .input_width(input_width) |
| 15573 | .input_height(input_height) |
| 15574 | .kernel_height(5) |
| 15575 | .kernel_width(5) |
| 15576 | .subsampling(2) |
| 15577 | .padding_left(2) |
| 15578 | .padding_right(2) |
| 15579 | .padding_top(2) |
| 15580 | .padding_bottom(2) |
| 15581 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4_acc2); |
| 15582 | } |
| 15583 | } |
| 15584 | } |
| 15585 | |
| 15586 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4_ACC2, output_height_gt_3) { |
| 15587 | TEST_REQUIRES_X86_SSE; |
| 15588 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 15589 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15590 | DWConv2DMicrokernelTester() |
| 15591 | .input_width(input_width) |
| 15592 | .input_height(input_height) |
| 15593 | .kernel_height(5) |
| 15594 | .kernel_width(5) |
| 15595 | .subsampling(2) |
| 15596 | .padding_left(2) |
| 15597 | .padding_right(2) |
| 15598 | .padding_top(2) |
| 15599 | .padding_bottom(2) |
| 15600 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4_acc2); |
| 15601 | } |
| 15602 | } |
| 15603 | } |
| 15604 | |
| 15605 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SSE_3X4_ACC2, padding_top_eq_1) { |
| 15606 | TEST_REQUIRES_X86_SSE; |
| 15607 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 15608 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 15609 | DWConv2DMicrokernelTester() |
| 15610 | .input_width(input_width) |
| 15611 | .input_height(input_height) |
| 15612 | .kernel_height(5) |
| 15613 | .kernel_width(5) |
| 15614 | .subsampling(2) |
| 15615 | .padding_left(2) |
| 15616 | .padding_right(2) |
| 15617 | .padding_top(1) |
| 15618 | .padding_bottom(2) |
| 15619 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4_acc2); |
| 15620 | } |
| 15621 | } |
| 15622 | } |
| 15623 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15624 | |
| 15625 | |
| 15626 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| Marat Dukhan | 98f2eeb | 2020-10-23 23:13:41 -0700 | [diff] [blame] | 15627 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4, output_width_eq_4) { |
| 15628 | TEST_REQUIRES_X86_SSSE3; |
| 15629 | DWConv2DMicrokernelTester() |
| 15630 | .input_width(4) |
| 15631 | .input_height(1) |
| 15632 | .kernel_height(3) |
| 15633 | .kernel_width(3) |
| 15634 | .subsampling(1) |
| 15635 | .padding_left(1) |
| 15636 | .padding_right(1) |
| 15637 | .padding_top(1) |
| 15638 | .padding_bottom(1) |
| 15639 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4); |
| 15640 | } |
| 15641 | |
| 15642 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4, output_width_div_4) { |
| 15643 | TEST_REQUIRES_X86_SSSE3; |
| 15644 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 15645 | DWConv2DMicrokernelTester() |
| 15646 | .input_width(input_width) |
| 15647 | .input_height(1) |
| 15648 | .kernel_height(3) |
| 15649 | .kernel_width(3) |
| 15650 | .subsampling(1) |
| 15651 | .padding_left(1) |
| 15652 | .padding_right(1) |
| 15653 | .padding_top(1) |
| 15654 | .padding_bottom(1) |
| 15655 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4); |
| 15656 | } |
| 15657 | } |
| 15658 | |
| 15659 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4, output_width_lt_4) { |
| 15660 | TEST_REQUIRES_X86_SSSE3; |
| 15661 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 15662 | DWConv2DMicrokernelTester() |
| 15663 | .input_width(4) |
| 15664 | .input_height(1) |
| 15665 | .kernel_height(3) |
| 15666 | .kernel_width(3) |
| 15667 | .subsampling(1) |
| 15668 | .padding_left(1) |
| 15669 | .padding_right(1) |
| 15670 | .padding_top(1) |
| 15671 | .padding_bottom(1) |
| 15672 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4); |
| 15673 | } |
| 15674 | } |
| 15675 | |
| 15676 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4, output_width_gt_4) { |
| 15677 | TEST_REQUIRES_X86_SSSE3; |
| 15678 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 15679 | DWConv2DMicrokernelTester() |
| 15680 | .input_width(input_width) |
| 15681 | .input_height(1) |
| 15682 | .kernel_height(3) |
| 15683 | .kernel_width(3) |
| 15684 | .subsampling(1) |
| 15685 | .padding_left(1) |
| 15686 | .padding_right(1) |
| 15687 | .padding_top(1) |
| 15688 | .padding_bottom(1) |
| 15689 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4); |
| 15690 | } |
| 15691 | } |
| 15692 | |
| 15693 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4, output_height_gt_1) { |
| 15694 | TEST_REQUIRES_X86_SSSE3; |
| 15695 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 15696 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 15697 | DWConv2DMicrokernelTester() |
| 15698 | .input_width(input_width) |
| 15699 | .input_height(input_height) |
| 15700 | .kernel_height(3) |
| 15701 | .kernel_width(3) |
| 15702 | .subsampling(1) |
| 15703 | .padding_left(1) |
| 15704 | .padding_right(1) |
| 15705 | .padding_top(1) |
| 15706 | .padding_bottom(1) |
| 15707 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4); |
| 15708 | } |
| 15709 | } |
| 15710 | } |
| 15711 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15712 | |
| 15713 | |
| 15714 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15715 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4, output_width_eq_4) { |
| 15716 | TEST_REQUIRES_X86_SSSE3; |
| 15717 | DWConv2DMicrokernelTester() |
| 15718 | .input_width(4) |
| 15719 | .input_height(2) |
| 15720 | .kernel_height(3) |
| 15721 | .kernel_width(3) |
| 15722 | .subsampling(1) |
| 15723 | .padding_left(1) |
| 15724 | .padding_right(1) |
| 15725 | .padding_top(1) |
| 15726 | .padding_bottom(1) |
| 15727 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4); |
| 15728 | } |
| 15729 | |
| 15730 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4, output_width_div_4) { |
| 15731 | TEST_REQUIRES_X86_SSSE3; |
| 15732 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 15733 | DWConv2DMicrokernelTester() |
| 15734 | .input_width(input_width) |
| 15735 | .input_height(2) |
| 15736 | .kernel_height(3) |
| 15737 | .kernel_width(3) |
| 15738 | .subsampling(1) |
| 15739 | .padding_left(1) |
| 15740 | .padding_right(1) |
| 15741 | .padding_top(1) |
| 15742 | .padding_bottom(1) |
| 15743 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4); |
| 15744 | } |
| 15745 | } |
| 15746 | |
| 15747 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4, output_width_lt_4) { |
| 15748 | TEST_REQUIRES_X86_SSSE3; |
| 15749 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 15750 | DWConv2DMicrokernelTester() |
| 15751 | .input_width(4) |
| 15752 | .input_height(2) |
| 15753 | .kernel_height(3) |
| 15754 | .kernel_width(3) |
| 15755 | .subsampling(1) |
| 15756 | .padding_left(1) |
| 15757 | .padding_right(1) |
| 15758 | .padding_top(1) |
| 15759 | .padding_bottom(1) |
| 15760 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4); |
| 15761 | } |
| 15762 | } |
| 15763 | |
| 15764 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4, output_width_gt_4) { |
| 15765 | TEST_REQUIRES_X86_SSSE3; |
| 15766 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 15767 | DWConv2DMicrokernelTester() |
| 15768 | .input_width(input_width) |
| 15769 | .input_height(2) |
| 15770 | .kernel_height(3) |
| 15771 | .kernel_width(3) |
| 15772 | .subsampling(1) |
| 15773 | .padding_left(1) |
| 15774 | .padding_right(1) |
| 15775 | .padding_top(1) |
| 15776 | .padding_bottom(1) |
| 15777 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4); |
| 15778 | } |
| 15779 | } |
| 15780 | |
| 15781 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4, output_height_div_2) { |
| 15782 | TEST_REQUIRES_X86_SSSE3; |
| 15783 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 15784 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 15785 | DWConv2DMicrokernelTester() |
| 15786 | .input_width(input_width) |
| 15787 | .input_height(input_height) |
| 15788 | .kernel_height(3) |
| 15789 | .kernel_width(3) |
| 15790 | .subsampling(1) |
| 15791 | .padding_left(1) |
| 15792 | .padding_right(1) |
| 15793 | .padding_top(1) |
| 15794 | .padding_bottom(1) |
| 15795 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4); |
| 15796 | } |
| 15797 | } |
| 15798 | } |
| 15799 | |
| 15800 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4, output_height_lt_2) { |
| 15801 | TEST_REQUIRES_X86_SSSE3; |
| 15802 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 15803 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 15804 | DWConv2DMicrokernelTester() |
| 15805 | .input_width(input_width) |
| 15806 | .input_height(input_height) |
| 15807 | .kernel_height(3) |
| 15808 | .kernel_width(3) |
| 15809 | .subsampling(1) |
| 15810 | .padding_left(1) |
| 15811 | .padding_right(1) |
| 15812 | .padding_top(1) |
| 15813 | .padding_bottom(1) |
| 15814 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4); |
| 15815 | } |
| 15816 | } |
| 15817 | } |
| 15818 | |
| 15819 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4, output_height_gt_2) { |
| 15820 | TEST_REQUIRES_X86_SSSE3; |
| 15821 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 15822 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 15823 | DWConv2DMicrokernelTester() |
| 15824 | .input_width(input_width) |
| 15825 | .input_height(input_height) |
| 15826 | .kernel_height(3) |
| 15827 | .kernel_width(3) |
| 15828 | .subsampling(1) |
| 15829 | .padding_left(1) |
| 15830 | .padding_right(1) |
| 15831 | .padding_top(1) |
| 15832 | .padding_bottom(1) |
| 15833 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4); |
| 15834 | } |
| 15835 | } |
| 15836 | } |
| 15837 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15838 | |
| 15839 | |
| 15840 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15841 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_3X4, output_width_eq_4) { |
| 15842 | TEST_REQUIRES_X86_SSSE3; |
| 15843 | DWConv2DMicrokernelTester() |
| 15844 | .input_width(4) |
| 15845 | .input_height(3) |
| 15846 | .kernel_height(3) |
| 15847 | .kernel_width(3) |
| 15848 | .subsampling(1) |
| 15849 | .padding_left(1) |
| 15850 | .padding_right(1) |
| 15851 | .padding_top(1) |
| 15852 | .padding_bottom(1) |
| 15853 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_3x4); |
| 15854 | } |
| 15855 | |
| 15856 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_3X4, output_width_div_4) { |
| 15857 | TEST_REQUIRES_X86_SSSE3; |
| 15858 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 15859 | DWConv2DMicrokernelTester() |
| 15860 | .input_width(input_width) |
| 15861 | .input_height(3) |
| 15862 | .kernel_height(3) |
| 15863 | .kernel_width(3) |
| 15864 | .subsampling(1) |
| 15865 | .padding_left(1) |
| 15866 | .padding_right(1) |
| 15867 | .padding_top(1) |
| 15868 | .padding_bottom(1) |
| 15869 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_3x4); |
| 15870 | } |
| 15871 | } |
| 15872 | |
| 15873 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_3X4, output_width_lt_4) { |
| 15874 | TEST_REQUIRES_X86_SSSE3; |
| 15875 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 15876 | DWConv2DMicrokernelTester() |
| 15877 | .input_width(4) |
| 15878 | .input_height(3) |
| 15879 | .kernel_height(3) |
| 15880 | .kernel_width(3) |
| 15881 | .subsampling(1) |
| 15882 | .padding_left(1) |
| 15883 | .padding_right(1) |
| 15884 | .padding_top(1) |
| 15885 | .padding_bottom(1) |
| 15886 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_3x4); |
| 15887 | } |
| 15888 | } |
| 15889 | |
| 15890 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_3X4, output_width_gt_4) { |
| 15891 | TEST_REQUIRES_X86_SSSE3; |
| 15892 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 15893 | DWConv2DMicrokernelTester() |
| 15894 | .input_width(input_width) |
| 15895 | .input_height(3) |
| 15896 | .kernel_height(3) |
| 15897 | .kernel_width(3) |
| 15898 | .subsampling(1) |
| 15899 | .padding_left(1) |
| 15900 | .padding_right(1) |
| 15901 | .padding_top(1) |
| 15902 | .padding_bottom(1) |
| 15903 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_3x4); |
| 15904 | } |
| 15905 | } |
| 15906 | |
| 15907 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_3X4, output_height_div_3) { |
| 15908 | TEST_REQUIRES_X86_SSSE3; |
| 15909 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 15910 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 15911 | DWConv2DMicrokernelTester() |
| 15912 | .input_width(input_width) |
| 15913 | .input_height(input_height) |
| 15914 | .kernel_height(3) |
| 15915 | .kernel_width(3) |
| 15916 | .subsampling(1) |
| 15917 | .padding_left(1) |
| 15918 | .padding_right(1) |
| 15919 | .padding_top(1) |
| 15920 | .padding_bottom(1) |
| 15921 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_3x4); |
| 15922 | } |
| 15923 | } |
| 15924 | } |
| 15925 | |
| 15926 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_3X4, output_height_lt_3) { |
| 15927 | TEST_REQUIRES_X86_SSSE3; |
| 15928 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 15929 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 15930 | DWConv2DMicrokernelTester() |
| 15931 | .input_width(input_width) |
| 15932 | .input_height(input_height) |
| 15933 | .kernel_height(3) |
| 15934 | .kernel_width(3) |
| 15935 | .subsampling(1) |
| 15936 | .padding_left(1) |
| 15937 | .padding_right(1) |
| 15938 | .padding_top(1) |
| 15939 | .padding_bottom(1) |
| 15940 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_3x4); |
| 15941 | } |
| 15942 | } |
| 15943 | } |
| 15944 | |
| 15945 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_3X4, output_height_gt_3) { |
| 15946 | TEST_REQUIRES_X86_SSSE3; |
| 15947 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 15948 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 15949 | DWConv2DMicrokernelTester() |
| 15950 | .input_width(input_width) |
| 15951 | .input_height(input_height) |
| 15952 | .kernel_height(3) |
| 15953 | .kernel_width(3) |
| 15954 | .subsampling(1) |
| 15955 | .padding_left(1) |
| 15956 | .padding_right(1) |
| 15957 | .padding_top(1) |
| 15958 | .padding_bottom(1) |
| 15959 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_3x4); |
| 15960 | } |
| 15961 | } |
| 15962 | } |
| 15963 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15964 | |
| 15965 | |
| 15966 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 15967 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_4X4, output_width_eq_4) { |
| 15968 | TEST_REQUIRES_X86_SSSE3; |
| 15969 | DWConv2DMicrokernelTester() |
| 15970 | .input_width(4) |
| 15971 | .input_height(4) |
| 15972 | .kernel_height(3) |
| 15973 | .kernel_width(3) |
| 15974 | .subsampling(1) |
| 15975 | .padding_left(1) |
| 15976 | .padding_right(1) |
| 15977 | .padding_top(1) |
| 15978 | .padding_bottom(1) |
| 15979 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_4x4); |
| 15980 | } |
| 15981 | |
| 15982 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_4X4, output_width_div_4) { |
| 15983 | TEST_REQUIRES_X86_SSSE3; |
| 15984 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 15985 | DWConv2DMicrokernelTester() |
| 15986 | .input_width(input_width) |
| 15987 | .input_height(4) |
| 15988 | .kernel_height(3) |
| 15989 | .kernel_width(3) |
| 15990 | .subsampling(1) |
| 15991 | .padding_left(1) |
| 15992 | .padding_right(1) |
| 15993 | .padding_top(1) |
| 15994 | .padding_bottom(1) |
| 15995 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_4x4); |
| 15996 | } |
| 15997 | } |
| 15998 | |
| 15999 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_4X4, output_width_lt_4) { |
| 16000 | TEST_REQUIRES_X86_SSSE3; |
| 16001 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 16002 | DWConv2DMicrokernelTester() |
| 16003 | .input_width(4) |
| 16004 | .input_height(4) |
| 16005 | .kernel_height(3) |
| 16006 | .kernel_width(3) |
| 16007 | .subsampling(1) |
| 16008 | .padding_left(1) |
| 16009 | .padding_right(1) |
| 16010 | .padding_top(1) |
| 16011 | .padding_bottom(1) |
| 16012 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_4x4); |
| 16013 | } |
| 16014 | } |
| 16015 | |
| 16016 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_4X4, output_width_gt_4) { |
| 16017 | TEST_REQUIRES_X86_SSSE3; |
| 16018 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 16019 | DWConv2DMicrokernelTester() |
| 16020 | .input_width(input_width) |
| 16021 | .input_height(4) |
| 16022 | .kernel_height(3) |
| 16023 | .kernel_width(3) |
| 16024 | .subsampling(1) |
| 16025 | .padding_left(1) |
| 16026 | .padding_right(1) |
| 16027 | .padding_top(1) |
| 16028 | .padding_bottom(1) |
| 16029 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_4x4); |
| 16030 | } |
| 16031 | } |
| 16032 | |
| 16033 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_4X4, output_height_div_4) { |
| 16034 | TEST_REQUIRES_X86_SSSE3; |
| 16035 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 16036 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16037 | DWConv2DMicrokernelTester() |
| 16038 | .input_width(input_width) |
| 16039 | .input_height(input_height) |
| 16040 | .kernel_height(3) |
| 16041 | .kernel_width(3) |
| 16042 | .subsampling(1) |
| 16043 | .padding_left(1) |
| 16044 | .padding_right(1) |
| 16045 | .padding_top(1) |
| 16046 | .padding_bottom(1) |
| 16047 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_4x4); |
| 16048 | } |
| 16049 | } |
| 16050 | } |
| 16051 | |
| 16052 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_4X4, output_height_lt_4) { |
| 16053 | TEST_REQUIRES_X86_SSSE3; |
| 16054 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 16055 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16056 | DWConv2DMicrokernelTester() |
| 16057 | .input_width(input_width) |
| 16058 | .input_height(input_height) |
| 16059 | .kernel_height(3) |
| 16060 | .kernel_width(3) |
| 16061 | .subsampling(1) |
| 16062 | .padding_left(1) |
| 16063 | .padding_right(1) |
| 16064 | .padding_top(1) |
| 16065 | .padding_bottom(1) |
| 16066 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_4x4); |
| 16067 | } |
| 16068 | } |
| 16069 | } |
| 16070 | |
| 16071 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_4X4, output_height_gt_4) { |
| 16072 | TEST_REQUIRES_X86_SSSE3; |
| 16073 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 16074 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16075 | DWConv2DMicrokernelTester() |
| 16076 | .input_width(input_width) |
| 16077 | .input_height(input_height) |
| 16078 | .kernel_height(3) |
| 16079 | .kernel_width(3) |
| 16080 | .subsampling(1) |
| 16081 | .padding_left(1) |
| 16082 | .padding_right(1) |
| 16083 | .padding_top(1) |
| 16084 | .padding_bottom(1) |
| 16085 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_4x4); |
| 16086 | } |
| 16087 | } |
| 16088 | } |
| 16089 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 16090 | |
| 16091 | |
| 16092 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 16093 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_5X4, output_width_eq_4) { |
| 16094 | TEST_REQUIRES_X86_SSSE3; |
| 16095 | DWConv2DMicrokernelTester() |
| 16096 | .input_width(4) |
| 16097 | .input_height(5) |
| 16098 | .kernel_height(3) |
| 16099 | .kernel_width(3) |
| 16100 | .subsampling(1) |
| 16101 | .padding_left(1) |
| 16102 | .padding_right(1) |
| 16103 | .padding_top(1) |
| 16104 | .padding_bottom(1) |
| 16105 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_5x4); |
| 16106 | } |
| 16107 | |
| 16108 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_5X4, output_width_div_4) { |
| 16109 | TEST_REQUIRES_X86_SSSE3; |
| 16110 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 16111 | DWConv2DMicrokernelTester() |
| 16112 | .input_width(input_width) |
| 16113 | .input_height(5) |
| 16114 | .kernel_height(3) |
| 16115 | .kernel_width(3) |
| 16116 | .subsampling(1) |
| 16117 | .padding_left(1) |
| 16118 | .padding_right(1) |
| 16119 | .padding_top(1) |
| 16120 | .padding_bottom(1) |
| 16121 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_5x4); |
| 16122 | } |
| 16123 | } |
| 16124 | |
| 16125 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_5X4, output_width_lt_4) { |
| 16126 | TEST_REQUIRES_X86_SSSE3; |
| 16127 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 16128 | DWConv2DMicrokernelTester() |
| 16129 | .input_width(4) |
| 16130 | .input_height(5) |
| 16131 | .kernel_height(3) |
| 16132 | .kernel_width(3) |
| 16133 | .subsampling(1) |
| 16134 | .padding_left(1) |
| 16135 | .padding_right(1) |
| 16136 | .padding_top(1) |
| 16137 | .padding_bottom(1) |
| 16138 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_5x4); |
| 16139 | } |
| 16140 | } |
| 16141 | |
| 16142 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_5X4, output_width_gt_4) { |
| 16143 | TEST_REQUIRES_X86_SSSE3; |
| 16144 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 16145 | DWConv2DMicrokernelTester() |
| 16146 | .input_width(input_width) |
| 16147 | .input_height(5) |
| 16148 | .kernel_height(3) |
| 16149 | .kernel_width(3) |
| 16150 | .subsampling(1) |
| 16151 | .padding_left(1) |
| 16152 | .padding_right(1) |
| 16153 | .padding_top(1) |
| 16154 | .padding_bottom(1) |
| 16155 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_5x4); |
| 16156 | } |
| 16157 | } |
| 16158 | |
| 16159 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_5X4, output_height_div_5) { |
| 16160 | TEST_REQUIRES_X86_SSSE3; |
| 16161 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 16162 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16163 | DWConv2DMicrokernelTester() |
| 16164 | .input_width(input_width) |
| 16165 | .input_height(input_height) |
| 16166 | .kernel_height(3) |
| 16167 | .kernel_width(3) |
| 16168 | .subsampling(1) |
| 16169 | .padding_left(1) |
| 16170 | .padding_right(1) |
| 16171 | .padding_top(1) |
| 16172 | .padding_bottom(1) |
| 16173 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_5x4); |
| 16174 | } |
| 16175 | } |
| 16176 | } |
| 16177 | |
| 16178 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_5X4, output_height_lt_5) { |
| 16179 | TEST_REQUIRES_X86_SSSE3; |
| 16180 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 16181 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16182 | DWConv2DMicrokernelTester() |
| 16183 | .input_width(input_width) |
| 16184 | .input_height(input_height) |
| 16185 | .kernel_height(3) |
| 16186 | .kernel_width(3) |
| 16187 | .subsampling(1) |
| 16188 | .padding_left(1) |
| 16189 | .padding_right(1) |
| 16190 | .padding_top(1) |
| 16191 | .padding_bottom(1) |
| 16192 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_5x4); |
| 16193 | } |
| 16194 | } |
| 16195 | } |
| 16196 | |
| 16197 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_5X4, output_height_gt_5) { |
| 16198 | TEST_REQUIRES_X86_SSSE3; |
| 16199 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 16200 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16201 | DWConv2DMicrokernelTester() |
| 16202 | .input_width(input_width) |
| 16203 | .input_height(input_height) |
| 16204 | .kernel_height(3) |
| 16205 | .kernel_width(3) |
| 16206 | .subsampling(1) |
| 16207 | .padding_left(1) |
| 16208 | .padding_right(1) |
| 16209 | .padding_top(1) |
| 16210 | .padding_bottom(1) |
| 16211 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_5x4); |
| 16212 | } |
| 16213 | } |
| 16214 | } |
| 16215 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 16216 | |
| 16217 | |
| 16218 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 16219 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_6X4, output_width_eq_4) { |
| 16220 | TEST_REQUIRES_X86_SSSE3; |
| 16221 | DWConv2DMicrokernelTester() |
| 16222 | .input_width(4) |
| 16223 | .input_height(6) |
| 16224 | .kernel_height(3) |
| 16225 | .kernel_width(3) |
| 16226 | .subsampling(1) |
| 16227 | .padding_left(1) |
| 16228 | .padding_right(1) |
| 16229 | .padding_top(1) |
| 16230 | .padding_bottom(1) |
| 16231 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_6x4); |
| 16232 | } |
| 16233 | |
| 16234 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_6X4, output_width_div_4) { |
| 16235 | TEST_REQUIRES_X86_SSSE3; |
| 16236 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 16237 | DWConv2DMicrokernelTester() |
| 16238 | .input_width(input_width) |
| 16239 | .input_height(6) |
| 16240 | .kernel_height(3) |
| 16241 | .kernel_width(3) |
| 16242 | .subsampling(1) |
| 16243 | .padding_left(1) |
| 16244 | .padding_right(1) |
| 16245 | .padding_top(1) |
| 16246 | .padding_bottom(1) |
| 16247 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_6x4); |
| 16248 | } |
| 16249 | } |
| 16250 | |
| 16251 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_6X4, output_width_lt_4) { |
| 16252 | TEST_REQUIRES_X86_SSSE3; |
| 16253 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 16254 | DWConv2DMicrokernelTester() |
| 16255 | .input_width(4) |
| 16256 | .input_height(6) |
| 16257 | .kernel_height(3) |
| 16258 | .kernel_width(3) |
| 16259 | .subsampling(1) |
| 16260 | .padding_left(1) |
| 16261 | .padding_right(1) |
| 16262 | .padding_top(1) |
| 16263 | .padding_bottom(1) |
| 16264 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_6x4); |
| 16265 | } |
| 16266 | } |
| 16267 | |
| 16268 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_6X4, output_width_gt_4) { |
| 16269 | TEST_REQUIRES_X86_SSSE3; |
| 16270 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 16271 | DWConv2DMicrokernelTester() |
| 16272 | .input_width(input_width) |
| 16273 | .input_height(6) |
| 16274 | .kernel_height(3) |
| 16275 | .kernel_width(3) |
| 16276 | .subsampling(1) |
| 16277 | .padding_left(1) |
| 16278 | .padding_right(1) |
| 16279 | .padding_top(1) |
| 16280 | .padding_bottom(1) |
| 16281 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_6x4); |
| 16282 | } |
| 16283 | } |
| 16284 | |
| 16285 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_6X4, output_height_div_6) { |
| 16286 | TEST_REQUIRES_X86_SSSE3; |
| 16287 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 16288 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16289 | DWConv2DMicrokernelTester() |
| 16290 | .input_width(input_width) |
| 16291 | .input_height(input_height) |
| 16292 | .kernel_height(3) |
| 16293 | .kernel_width(3) |
| 16294 | .subsampling(1) |
| 16295 | .padding_left(1) |
| 16296 | .padding_right(1) |
| 16297 | .padding_top(1) |
| 16298 | .padding_bottom(1) |
| 16299 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_6x4); |
| 16300 | } |
| 16301 | } |
| 16302 | } |
| 16303 | |
| 16304 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_6X4, output_height_lt_6) { |
| 16305 | TEST_REQUIRES_X86_SSSE3; |
| 16306 | for (size_t input_height = 1; input_height < 6; input_height++) { |
| 16307 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16308 | DWConv2DMicrokernelTester() |
| 16309 | .input_width(input_width) |
| 16310 | .input_height(input_height) |
| 16311 | .kernel_height(3) |
| 16312 | .kernel_width(3) |
| 16313 | .subsampling(1) |
| 16314 | .padding_left(1) |
| 16315 | .padding_right(1) |
| 16316 | .padding_top(1) |
| 16317 | .padding_bottom(1) |
| 16318 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_6x4); |
| 16319 | } |
| 16320 | } |
| 16321 | } |
| 16322 | |
| 16323 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_6X4, output_height_gt_6) { |
| 16324 | TEST_REQUIRES_X86_SSSE3; |
| 16325 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 16326 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16327 | DWConv2DMicrokernelTester() |
| 16328 | .input_width(input_width) |
| 16329 | .input_height(input_height) |
| 16330 | .kernel_height(3) |
| 16331 | .kernel_width(3) |
| 16332 | .subsampling(1) |
| 16333 | .padding_left(1) |
| 16334 | .padding_right(1) |
| 16335 | .padding_top(1) |
| 16336 | .padding_bottom(1) |
| 16337 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_6x4); |
| 16338 | } |
| 16339 | } |
| 16340 | } |
| 16341 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 16342 | |
| 16343 | |
| 16344 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 16345 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC2, output_width_eq_4) { |
| 16346 | TEST_REQUIRES_X86_SSSE3; |
| 16347 | DWConv2DMicrokernelTester() |
| 16348 | .input_width(4) |
| 16349 | .input_height(1) |
| 16350 | .kernel_height(3) |
| 16351 | .kernel_width(3) |
| 16352 | .subsampling(1) |
| 16353 | .padding_left(1) |
| 16354 | .padding_right(1) |
| 16355 | .padding_top(1) |
| 16356 | .padding_bottom(1) |
| 16357 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc2); |
| 16358 | } |
| 16359 | |
| 16360 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC2, output_width_div_4) { |
| 16361 | TEST_REQUIRES_X86_SSSE3; |
| 16362 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 16363 | DWConv2DMicrokernelTester() |
| 16364 | .input_width(input_width) |
| 16365 | .input_height(1) |
| 16366 | .kernel_height(3) |
| 16367 | .kernel_width(3) |
| 16368 | .subsampling(1) |
| 16369 | .padding_left(1) |
| 16370 | .padding_right(1) |
| 16371 | .padding_top(1) |
| 16372 | .padding_bottom(1) |
| 16373 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc2); |
| 16374 | } |
| 16375 | } |
| 16376 | |
| 16377 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC2, output_width_lt_4) { |
| 16378 | TEST_REQUIRES_X86_SSSE3; |
| 16379 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 16380 | DWConv2DMicrokernelTester() |
| 16381 | .input_width(4) |
| 16382 | .input_height(1) |
| 16383 | .kernel_height(3) |
| 16384 | .kernel_width(3) |
| 16385 | .subsampling(1) |
| 16386 | .padding_left(1) |
| 16387 | .padding_right(1) |
| 16388 | .padding_top(1) |
| 16389 | .padding_bottom(1) |
| 16390 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc2); |
| 16391 | } |
| 16392 | } |
| 16393 | |
| 16394 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC2, output_width_gt_4) { |
| 16395 | TEST_REQUIRES_X86_SSSE3; |
| 16396 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 16397 | DWConv2DMicrokernelTester() |
| 16398 | .input_width(input_width) |
| 16399 | .input_height(1) |
| 16400 | .kernel_height(3) |
| 16401 | .kernel_width(3) |
| 16402 | .subsampling(1) |
| 16403 | .padding_left(1) |
| 16404 | .padding_right(1) |
| 16405 | .padding_top(1) |
| 16406 | .padding_bottom(1) |
| 16407 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc2); |
| 16408 | } |
| 16409 | } |
| 16410 | |
| 16411 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC2, output_height_gt_1) { |
| 16412 | TEST_REQUIRES_X86_SSSE3; |
| 16413 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 16414 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16415 | DWConv2DMicrokernelTester() |
| 16416 | .input_width(input_width) |
| 16417 | .input_height(input_height) |
| 16418 | .kernel_height(3) |
| 16419 | .kernel_width(3) |
| 16420 | .subsampling(1) |
| 16421 | .padding_left(1) |
| 16422 | .padding_right(1) |
| 16423 | .padding_top(1) |
| 16424 | .padding_bottom(1) |
| 16425 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc2); |
| 16426 | } |
| 16427 | } |
| 16428 | } |
| 16429 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 16430 | |
| 16431 | |
| 16432 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 16433 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC3, output_width_eq_4) { |
| 16434 | TEST_REQUIRES_X86_SSSE3; |
| 16435 | DWConv2DMicrokernelTester() |
| 16436 | .input_width(4) |
| 16437 | .input_height(1) |
| 16438 | .kernel_height(3) |
| 16439 | .kernel_width(3) |
| 16440 | .subsampling(1) |
| 16441 | .padding_left(1) |
| 16442 | .padding_right(1) |
| 16443 | .padding_top(1) |
| 16444 | .padding_bottom(1) |
| 16445 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc3); |
| 16446 | } |
| 16447 | |
| 16448 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC3, output_width_div_4) { |
| 16449 | TEST_REQUIRES_X86_SSSE3; |
| 16450 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 16451 | DWConv2DMicrokernelTester() |
| 16452 | .input_width(input_width) |
| 16453 | .input_height(1) |
| 16454 | .kernel_height(3) |
| 16455 | .kernel_width(3) |
| 16456 | .subsampling(1) |
| 16457 | .padding_left(1) |
| 16458 | .padding_right(1) |
| 16459 | .padding_top(1) |
| 16460 | .padding_bottom(1) |
| 16461 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc3); |
| 16462 | } |
| 16463 | } |
| 16464 | |
| 16465 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC3, output_width_lt_4) { |
| 16466 | TEST_REQUIRES_X86_SSSE3; |
| 16467 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 16468 | DWConv2DMicrokernelTester() |
| 16469 | .input_width(4) |
| 16470 | .input_height(1) |
| 16471 | .kernel_height(3) |
| 16472 | .kernel_width(3) |
| 16473 | .subsampling(1) |
| 16474 | .padding_left(1) |
| 16475 | .padding_right(1) |
| 16476 | .padding_top(1) |
| 16477 | .padding_bottom(1) |
| 16478 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc3); |
| 16479 | } |
| 16480 | } |
| 16481 | |
| 16482 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC3, output_width_gt_4) { |
| 16483 | TEST_REQUIRES_X86_SSSE3; |
| 16484 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 16485 | DWConv2DMicrokernelTester() |
| 16486 | .input_width(input_width) |
| 16487 | .input_height(1) |
| 16488 | .kernel_height(3) |
| 16489 | .kernel_width(3) |
| 16490 | .subsampling(1) |
| 16491 | .padding_left(1) |
| 16492 | .padding_right(1) |
| 16493 | .padding_top(1) |
| 16494 | .padding_bottom(1) |
| 16495 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc3); |
| 16496 | } |
| 16497 | } |
| 16498 | |
| 16499 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC3, output_height_gt_1) { |
| 16500 | TEST_REQUIRES_X86_SSSE3; |
| 16501 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 16502 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16503 | DWConv2DMicrokernelTester() |
| 16504 | .input_width(input_width) |
| 16505 | .input_height(input_height) |
| 16506 | .kernel_height(3) |
| 16507 | .kernel_width(3) |
| 16508 | .subsampling(1) |
| 16509 | .padding_left(1) |
| 16510 | .padding_right(1) |
| 16511 | .padding_top(1) |
| 16512 | .padding_bottom(1) |
| 16513 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc3); |
| 16514 | } |
| 16515 | } |
| 16516 | } |
| 16517 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 16518 | |
| 16519 | |
| 16520 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 16521 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC4, output_width_eq_4) { |
| 16522 | TEST_REQUIRES_X86_SSSE3; |
| 16523 | DWConv2DMicrokernelTester() |
| 16524 | .input_width(4) |
| 16525 | .input_height(1) |
| 16526 | .kernel_height(3) |
| 16527 | .kernel_width(3) |
| 16528 | .subsampling(1) |
| 16529 | .padding_left(1) |
| 16530 | .padding_right(1) |
| 16531 | .padding_top(1) |
| 16532 | .padding_bottom(1) |
| 16533 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc4); |
| 16534 | } |
| 16535 | |
| 16536 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC4, output_width_div_4) { |
| 16537 | TEST_REQUIRES_X86_SSSE3; |
| 16538 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 16539 | DWConv2DMicrokernelTester() |
| 16540 | .input_width(input_width) |
| 16541 | .input_height(1) |
| 16542 | .kernel_height(3) |
| 16543 | .kernel_width(3) |
| 16544 | .subsampling(1) |
| 16545 | .padding_left(1) |
| 16546 | .padding_right(1) |
| 16547 | .padding_top(1) |
| 16548 | .padding_bottom(1) |
| 16549 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc4); |
| 16550 | } |
| 16551 | } |
| 16552 | |
| 16553 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC4, output_width_lt_4) { |
| 16554 | TEST_REQUIRES_X86_SSSE3; |
| 16555 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 16556 | DWConv2DMicrokernelTester() |
| 16557 | .input_width(4) |
| 16558 | .input_height(1) |
| 16559 | .kernel_height(3) |
| 16560 | .kernel_width(3) |
| 16561 | .subsampling(1) |
| 16562 | .padding_left(1) |
| 16563 | .padding_right(1) |
| 16564 | .padding_top(1) |
| 16565 | .padding_bottom(1) |
| 16566 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc4); |
| 16567 | } |
| 16568 | } |
| 16569 | |
| 16570 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC4, output_width_gt_4) { |
| 16571 | TEST_REQUIRES_X86_SSSE3; |
| 16572 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 16573 | DWConv2DMicrokernelTester() |
| 16574 | .input_width(input_width) |
| 16575 | .input_height(1) |
| 16576 | .kernel_height(3) |
| 16577 | .kernel_width(3) |
| 16578 | .subsampling(1) |
| 16579 | .padding_left(1) |
| 16580 | .padding_right(1) |
| 16581 | .padding_top(1) |
| 16582 | .padding_bottom(1) |
| 16583 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc4); |
| 16584 | } |
| 16585 | } |
| 16586 | |
| 16587 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_1X4_ACC4, output_height_gt_1) { |
| 16588 | TEST_REQUIRES_X86_SSSE3; |
| 16589 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 16590 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16591 | DWConv2DMicrokernelTester() |
| 16592 | .input_width(input_width) |
| 16593 | .input_height(input_height) |
| 16594 | .kernel_height(3) |
| 16595 | .kernel_width(3) |
| 16596 | .subsampling(1) |
| 16597 | .padding_left(1) |
| 16598 | .padding_right(1) |
| 16599 | .padding_top(1) |
| 16600 | .padding_bottom(1) |
| 16601 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc4); |
| 16602 | } |
| 16603 | } |
| 16604 | } |
| 16605 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 16606 | |
| 16607 | |
| 16608 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 16609 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4_ACC2, output_width_eq_4) { |
| 16610 | TEST_REQUIRES_X86_SSSE3; |
| 16611 | DWConv2DMicrokernelTester() |
| 16612 | .input_width(4) |
| 16613 | .input_height(2) |
| 16614 | .kernel_height(3) |
| 16615 | .kernel_width(3) |
| 16616 | .subsampling(1) |
| 16617 | .padding_left(1) |
| 16618 | .padding_right(1) |
| 16619 | .padding_top(1) |
| 16620 | .padding_bottom(1) |
| 16621 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4_acc2); |
| 16622 | } |
| 16623 | |
| 16624 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4_ACC2, output_width_div_4) { |
| 16625 | TEST_REQUIRES_X86_SSSE3; |
| 16626 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 16627 | DWConv2DMicrokernelTester() |
| 16628 | .input_width(input_width) |
| 16629 | .input_height(2) |
| 16630 | .kernel_height(3) |
| 16631 | .kernel_width(3) |
| 16632 | .subsampling(1) |
| 16633 | .padding_left(1) |
| 16634 | .padding_right(1) |
| 16635 | .padding_top(1) |
| 16636 | .padding_bottom(1) |
| 16637 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4_acc2); |
| 16638 | } |
| 16639 | } |
| 16640 | |
| 16641 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4_ACC2, output_width_lt_4) { |
| 16642 | TEST_REQUIRES_X86_SSSE3; |
| 16643 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 16644 | DWConv2DMicrokernelTester() |
| 16645 | .input_width(4) |
| 16646 | .input_height(2) |
| 16647 | .kernel_height(3) |
| 16648 | .kernel_width(3) |
| 16649 | .subsampling(1) |
| 16650 | .padding_left(1) |
| 16651 | .padding_right(1) |
| 16652 | .padding_top(1) |
| 16653 | .padding_bottom(1) |
| 16654 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4_acc2); |
| 16655 | } |
| 16656 | } |
| 16657 | |
| 16658 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4_ACC2, output_width_gt_4) { |
| 16659 | TEST_REQUIRES_X86_SSSE3; |
| 16660 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 16661 | DWConv2DMicrokernelTester() |
| 16662 | .input_width(input_width) |
| 16663 | .input_height(2) |
| 16664 | .kernel_height(3) |
| 16665 | .kernel_width(3) |
| 16666 | .subsampling(1) |
| 16667 | .padding_left(1) |
| 16668 | .padding_right(1) |
| 16669 | .padding_top(1) |
| 16670 | .padding_bottom(1) |
| 16671 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4_acc2); |
| 16672 | } |
| 16673 | } |
| 16674 | |
| 16675 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4_ACC2, output_height_div_2) { |
| 16676 | TEST_REQUIRES_X86_SSSE3; |
| 16677 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 16678 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16679 | DWConv2DMicrokernelTester() |
| 16680 | .input_width(input_width) |
| 16681 | .input_height(input_height) |
| 16682 | .kernel_height(3) |
| 16683 | .kernel_width(3) |
| 16684 | .subsampling(1) |
| 16685 | .padding_left(1) |
| 16686 | .padding_right(1) |
| 16687 | .padding_top(1) |
| 16688 | .padding_bottom(1) |
| 16689 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4_acc2); |
| 16690 | } |
| 16691 | } |
| 16692 | } |
| 16693 | |
| 16694 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4_ACC2, output_height_lt_2) { |
| 16695 | TEST_REQUIRES_X86_SSSE3; |
| 16696 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 16697 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16698 | DWConv2DMicrokernelTester() |
| 16699 | .input_width(input_width) |
| 16700 | .input_height(input_height) |
| 16701 | .kernel_height(3) |
| 16702 | .kernel_width(3) |
| 16703 | .subsampling(1) |
| 16704 | .padding_left(1) |
| 16705 | .padding_right(1) |
| 16706 | .padding_top(1) |
| 16707 | .padding_bottom(1) |
| 16708 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4_acc2); |
| 16709 | } |
| 16710 | } |
| 16711 | } |
| 16712 | |
| 16713 | TEST(F32_DWCONV2D_CHW_3X3P1__SSSE3_2X4_ACC2, output_height_gt_2) { |
| 16714 | TEST_REQUIRES_X86_SSSE3; |
| 16715 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 16716 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16717 | DWConv2DMicrokernelTester() |
| 16718 | .input_width(input_width) |
| 16719 | .input_height(input_height) |
| 16720 | .kernel_height(3) |
| 16721 | .kernel_width(3) |
| 16722 | .subsampling(1) |
| 16723 | .padding_left(1) |
| 16724 | .padding_right(1) |
| 16725 | .padding_top(1) |
| 16726 | .padding_bottom(1) |
| 16727 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4_acc2); |
| 16728 | } |
| 16729 | } |
| 16730 | } |
| 16731 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 16732 | |
| 16733 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 16734 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 16735 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4, output_width_eq_4) { |
| 16736 | DWConv2DMicrokernelTester() |
| 16737 | .input_width(4) |
| 16738 | .input_height(1) |
| 16739 | .kernel_height(3) |
| 16740 | .kernel_width(3) |
| 16741 | .subsampling(1) |
| 16742 | .padding_left(1) |
| 16743 | .padding_right(1) |
| 16744 | .padding_top(1) |
| 16745 | .padding_bottom(1) |
| 16746 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4); |
| 16747 | } |
| 16748 | |
| 16749 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4, output_width_div_4) { |
| 16750 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 16751 | DWConv2DMicrokernelTester() |
| 16752 | .input_width(input_width) |
| 16753 | .input_height(1) |
| 16754 | .kernel_height(3) |
| 16755 | .kernel_width(3) |
| 16756 | .subsampling(1) |
| 16757 | .padding_left(1) |
| 16758 | .padding_right(1) |
| 16759 | .padding_top(1) |
| 16760 | .padding_bottom(1) |
| 16761 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4); |
| 16762 | } |
| 16763 | } |
| 16764 | |
| 16765 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4, output_width_lt_4) { |
| 16766 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 16767 | DWConv2DMicrokernelTester() |
| 16768 | .input_width(4) |
| 16769 | .input_height(1) |
| 16770 | .kernel_height(3) |
| 16771 | .kernel_width(3) |
| 16772 | .subsampling(1) |
| 16773 | .padding_left(1) |
| 16774 | .padding_right(1) |
| 16775 | .padding_top(1) |
| 16776 | .padding_bottom(1) |
| 16777 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4); |
| 16778 | } |
| 16779 | } |
| 16780 | |
| 16781 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4, output_width_gt_4) { |
| 16782 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 16783 | DWConv2DMicrokernelTester() |
| 16784 | .input_width(input_width) |
| 16785 | .input_height(1) |
| 16786 | .kernel_height(3) |
| 16787 | .kernel_width(3) |
| 16788 | .subsampling(1) |
| 16789 | .padding_left(1) |
| 16790 | .padding_right(1) |
| 16791 | .padding_top(1) |
| 16792 | .padding_bottom(1) |
| 16793 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4); |
| 16794 | } |
| 16795 | } |
| 16796 | |
| 16797 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4, output_height_gt_1) { |
| 16798 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 16799 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16800 | DWConv2DMicrokernelTester() |
| 16801 | .input_width(input_width) |
| 16802 | .input_height(input_height) |
| 16803 | .kernel_height(3) |
| 16804 | .kernel_width(3) |
| 16805 | .subsampling(1) |
| 16806 | .padding_left(1) |
| 16807 | .padding_right(1) |
| 16808 | .padding_top(1) |
| 16809 | .padding_bottom(1) |
| 16810 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4); |
| 16811 | } |
| 16812 | } |
| 16813 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 16814 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 16815 | |
| 16816 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 16817 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 16818 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4, output_width_eq_4) { |
| 16819 | DWConv2DMicrokernelTester() |
| 16820 | .input_width(4) |
| 16821 | .input_height(2) |
| 16822 | .kernel_height(3) |
| 16823 | .kernel_width(3) |
| 16824 | .subsampling(1) |
| 16825 | .padding_left(1) |
| 16826 | .padding_right(1) |
| 16827 | .padding_top(1) |
| 16828 | .padding_bottom(1) |
| 16829 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4); |
| 16830 | } |
| 16831 | |
| 16832 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4, output_width_div_4) { |
| 16833 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 16834 | DWConv2DMicrokernelTester() |
| 16835 | .input_width(input_width) |
| 16836 | .input_height(2) |
| 16837 | .kernel_height(3) |
| 16838 | .kernel_width(3) |
| 16839 | .subsampling(1) |
| 16840 | .padding_left(1) |
| 16841 | .padding_right(1) |
| 16842 | .padding_top(1) |
| 16843 | .padding_bottom(1) |
| 16844 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4); |
| 16845 | } |
| 16846 | } |
| 16847 | |
| 16848 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4, output_width_lt_4) { |
| 16849 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 16850 | DWConv2DMicrokernelTester() |
| 16851 | .input_width(4) |
| 16852 | .input_height(2) |
| 16853 | .kernel_height(3) |
| 16854 | .kernel_width(3) |
| 16855 | .subsampling(1) |
| 16856 | .padding_left(1) |
| 16857 | .padding_right(1) |
| 16858 | .padding_top(1) |
| 16859 | .padding_bottom(1) |
| 16860 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4); |
| 16861 | } |
| 16862 | } |
| 16863 | |
| 16864 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4, output_width_gt_4) { |
| 16865 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 16866 | DWConv2DMicrokernelTester() |
| 16867 | .input_width(input_width) |
| 16868 | .input_height(2) |
| 16869 | .kernel_height(3) |
| 16870 | .kernel_width(3) |
| 16871 | .subsampling(1) |
| 16872 | .padding_left(1) |
| 16873 | .padding_right(1) |
| 16874 | .padding_top(1) |
| 16875 | .padding_bottom(1) |
| 16876 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4); |
| 16877 | } |
| 16878 | } |
| 16879 | |
| 16880 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4, output_height_div_2) { |
| 16881 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 16882 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16883 | DWConv2DMicrokernelTester() |
| 16884 | .input_width(input_width) |
| 16885 | .input_height(input_height) |
| 16886 | .kernel_height(3) |
| 16887 | .kernel_width(3) |
| 16888 | .subsampling(1) |
| 16889 | .padding_left(1) |
| 16890 | .padding_right(1) |
| 16891 | .padding_top(1) |
| 16892 | .padding_bottom(1) |
| 16893 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4); |
| 16894 | } |
| 16895 | } |
| 16896 | } |
| 16897 | |
| 16898 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4, output_height_lt_2) { |
| 16899 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 16900 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16901 | DWConv2DMicrokernelTester() |
| 16902 | .input_width(input_width) |
| 16903 | .input_height(input_height) |
| 16904 | .kernel_height(3) |
| 16905 | .kernel_width(3) |
| 16906 | .subsampling(1) |
| 16907 | .padding_left(1) |
| 16908 | .padding_right(1) |
| 16909 | .padding_top(1) |
| 16910 | .padding_bottom(1) |
| 16911 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4); |
| 16912 | } |
| 16913 | } |
| 16914 | } |
| 16915 | |
| 16916 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4, output_height_gt_2) { |
| 16917 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 16918 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 16919 | DWConv2DMicrokernelTester() |
| 16920 | .input_width(input_width) |
| 16921 | .input_height(input_height) |
| 16922 | .kernel_height(3) |
| 16923 | .kernel_width(3) |
| 16924 | .subsampling(1) |
| 16925 | .padding_left(1) |
| 16926 | .padding_right(1) |
| 16927 | .padding_top(1) |
| 16928 | .padding_bottom(1) |
| 16929 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4); |
| 16930 | } |
| 16931 | } |
| 16932 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 16933 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 16934 | |
| 16935 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 16936 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 16937 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_3X4, output_width_eq_4) { |
| 16938 | DWConv2DMicrokernelTester() |
| 16939 | .input_width(4) |
| 16940 | .input_height(3) |
| 16941 | .kernel_height(3) |
| 16942 | .kernel_width(3) |
| 16943 | .subsampling(1) |
| 16944 | .padding_left(1) |
| 16945 | .padding_right(1) |
| 16946 | .padding_top(1) |
| 16947 | .padding_bottom(1) |
| 16948 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_3x4); |
| 16949 | } |
| 16950 | |
| 16951 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_3X4, output_width_div_4) { |
| 16952 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 16953 | DWConv2DMicrokernelTester() |
| 16954 | .input_width(input_width) |
| 16955 | .input_height(3) |
| 16956 | .kernel_height(3) |
| 16957 | .kernel_width(3) |
| 16958 | .subsampling(1) |
| 16959 | .padding_left(1) |
| 16960 | .padding_right(1) |
| 16961 | .padding_top(1) |
| 16962 | .padding_bottom(1) |
| 16963 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_3x4); |
| 16964 | } |
| 16965 | } |
| 16966 | |
| 16967 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_3X4, output_width_lt_4) { |
| 16968 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 16969 | DWConv2DMicrokernelTester() |
| 16970 | .input_width(4) |
| 16971 | .input_height(3) |
| 16972 | .kernel_height(3) |
| 16973 | .kernel_width(3) |
| 16974 | .subsampling(1) |
| 16975 | .padding_left(1) |
| 16976 | .padding_right(1) |
| 16977 | .padding_top(1) |
| 16978 | .padding_bottom(1) |
| 16979 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_3x4); |
| 16980 | } |
| 16981 | } |
| 16982 | |
| 16983 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_3X4, output_width_gt_4) { |
| 16984 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 16985 | DWConv2DMicrokernelTester() |
| 16986 | .input_width(input_width) |
| 16987 | .input_height(3) |
| 16988 | .kernel_height(3) |
| 16989 | .kernel_width(3) |
| 16990 | .subsampling(1) |
| 16991 | .padding_left(1) |
| 16992 | .padding_right(1) |
| 16993 | .padding_top(1) |
| 16994 | .padding_bottom(1) |
| 16995 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_3x4); |
| 16996 | } |
| 16997 | } |
| 16998 | |
| 16999 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_3X4, output_height_div_3) { |
| 17000 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 17001 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17002 | DWConv2DMicrokernelTester() |
| 17003 | .input_width(input_width) |
| 17004 | .input_height(input_height) |
| 17005 | .kernel_height(3) |
| 17006 | .kernel_width(3) |
| 17007 | .subsampling(1) |
| 17008 | .padding_left(1) |
| 17009 | .padding_right(1) |
| 17010 | .padding_top(1) |
| 17011 | .padding_bottom(1) |
| 17012 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_3x4); |
| 17013 | } |
| 17014 | } |
| 17015 | } |
| 17016 | |
| 17017 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_3X4, output_height_lt_3) { |
| 17018 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 17019 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17020 | DWConv2DMicrokernelTester() |
| 17021 | .input_width(input_width) |
| 17022 | .input_height(input_height) |
| 17023 | .kernel_height(3) |
| 17024 | .kernel_width(3) |
| 17025 | .subsampling(1) |
| 17026 | .padding_left(1) |
| 17027 | .padding_right(1) |
| 17028 | .padding_top(1) |
| 17029 | .padding_bottom(1) |
| 17030 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_3x4); |
| 17031 | } |
| 17032 | } |
| 17033 | } |
| 17034 | |
| 17035 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_3X4, output_height_gt_3) { |
| 17036 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 17037 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17038 | DWConv2DMicrokernelTester() |
| 17039 | .input_width(input_width) |
| 17040 | .input_height(input_height) |
| 17041 | .kernel_height(3) |
| 17042 | .kernel_width(3) |
| 17043 | .subsampling(1) |
| 17044 | .padding_left(1) |
| 17045 | .padding_right(1) |
| 17046 | .padding_top(1) |
| 17047 | .padding_bottom(1) |
| 17048 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_3x4); |
| 17049 | } |
| 17050 | } |
| 17051 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17052 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17053 | |
| 17054 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17055 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17056 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_4X4, output_width_eq_4) { |
| 17057 | DWConv2DMicrokernelTester() |
| 17058 | .input_width(4) |
| 17059 | .input_height(4) |
| 17060 | .kernel_height(3) |
| 17061 | .kernel_width(3) |
| 17062 | .subsampling(1) |
| 17063 | .padding_left(1) |
| 17064 | .padding_right(1) |
| 17065 | .padding_top(1) |
| 17066 | .padding_bottom(1) |
| 17067 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_4x4); |
| 17068 | } |
| 17069 | |
| 17070 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_4X4, output_width_div_4) { |
| 17071 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 17072 | DWConv2DMicrokernelTester() |
| 17073 | .input_width(input_width) |
| 17074 | .input_height(4) |
| 17075 | .kernel_height(3) |
| 17076 | .kernel_width(3) |
| 17077 | .subsampling(1) |
| 17078 | .padding_left(1) |
| 17079 | .padding_right(1) |
| 17080 | .padding_top(1) |
| 17081 | .padding_bottom(1) |
| 17082 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_4x4); |
| 17083 | } |
| 17084 | } |
| 17085 | |
| 17086 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_4X4, output_width_lt_4) { |
| 17087 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 17088 | DWConv2DMicrokernelTester() |
| 17089 | .input_width(4) |
| 17090 | .input_height(4) |
| 17091 | .kernel_height(3) |
| 17092 | .kernel_width(3) |
| 17093 | .subsampling(1) |
| 17094 | .padding_left(1) |
| 17095 | .padding_right(1) |
| 17096 | .padding_top(1) |
| 17097 | .padding_bottom(1) |
| 17098 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_4x4); |
| 17099 | } |
| 17100 | } |
| 17101 | |
| 17102 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_4X4, output_width_gt_4) { |
| 17103 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 17104 | DWConv2DMicrokernelTester() |
| 17105 | .input_width(input_width) |
| 17106 | .input_height(4) |
| 17107 | .kernel_height(3) |
| 17108 | .kernel_width(3) |
| 17109 | .subsampling(1) |
| 17110 | .padding_left(1) |
| 17111 | .padding_right(1) |
| 17112 | .padding_top(1) |
| 17113 | .padding_bottom(1) |
| 17114 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_4x4); |
| 17115 | } |
| 17116 | } |
| 17117 | |
| 17118 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_4X4, output_height_div_4) { |
| 17119 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 17120 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17121 | DWConv2DMicrokernelTester() |
| 17122 | .input_width(input_width) |
| 17123 | .input_height(input_height) |
| 17124 | .kernel_height(3) |
| 17125 | .kernel_width(3) |
| 17126 | .subsampling(1) |
| 17127 | .padding_left(1) |
| 17128 | .padding_right(1) |
| 17129 | .padding_top(1) |
| 17130 | .padding_bottom(1) |
| 17131 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_4x4); |
| 17132 | } |
| 17133 | } |
| 17134 | } |
| 17135 | |
| 17136 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_4X4, output_height_lt_4) { |
| 17137 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 17138 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17139 | DWConv2DMicrokernelTester() |
| 17140 | .input_width(input_width) |
| 17141 | .input_height(input_height) |
| 17142 | .kernel_height(3) |
| 17143 | .kernel_width(3) |
| 17144 | .subsampling(1) |
| 17145 | .padding_left(1) |
| 17146 | .padding_right(1) |
| 17147 | .padding_top(1) |
| 17148 | .padding_bottom(1) |
| 17149 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_4x4); |
| 17150 | } |
| 17151 | } |
| 17152 | } |
| 17153 | |
| 17154 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_4X4, output_height_gt_4) { |
| 17155 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 17156 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17157 | DWConv2DMicrokernelTester() |
| 17158 | .input_width(input_width) |
| 17159 | .input_height(input_height) |
| 17160 | .kernel_height(3) |
| 17161 | .kernel_width(3) |
| 17162 | .subsampling(1) |
| 17163 | .padding_left(1) |
| 17164 | .padding_right(1) |
| 17165 | .padding_top(1) |
| 17166 | .padding_bottom(1) |
| 17167 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_4x4); |
| 17168 | } |
| 17169 | } |
| 17170 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17171 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17172 | |
| 17173 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17174 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17175 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_5X4, output_width_eq_4) { |
| 17176 | DWConv2DMicrokernelTester() |
| 17177 | .input_width(4) |
| 17178 | .input_height(5) |
| 17179 | .kernel_height(3) |
| 17180 | .kernel_width(3) |
| 17181 | .subsampling(1) |
| 17182 | .padding_left(1) |
| 17183 | .padding_right(1) |
| 17184 | .padding_top(1) |
| 17185 | .padding_bottom(1) |
| 17186 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_5x4); |
| 17187 | } |
| 17188 | |
| 17189 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_5X4, output_width_div_4) { |
| 17190 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 17191 | DWConv2DMicrokernelTester() |
| 17192 | .input_width(input_width) |
| 17193 | .input_height(5) |
| 17194 | .kernel_height(3) |
| 17195 | .kernel_width(3) |
| 17196 | .subsampling(1) |
| 17197 | .padding_left(1) |
| 17198 | .padding_right(1) |
| 17199 | .padding_top(1) |
| 17200 | .padding_bottom(1) |
| 17201 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_5x4); |
| 17202 | } |
| 17203 | } |
| 17204 | |
| 17205 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_5X4, output_width_lt_4) { |
| 17206 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 17207 | DWConv2DMicrokernelTester() |
| 17208 | .input_width(4) |
| 17209 | .input_height(5) |
| 17210 | .kernel_height(3) |
| 17211 | .kernel_width(3) |
| 17212 | .subsampling(1) |
| 17213 | .padding_left(1) |
| 17214 | .padding_right(1) |
| 17215 | .padding_top(1) |
| 17216 | .padding_bottom(1) |
| 17217 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_5x4); |
| 17218 | } |
| 17219 | } |
| 17220 | |
| 17221 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_5X4, output_width_gt_4) { |
| 17222 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 17223 | DWConv2DMicrokernelTester() |
| 17224 | .input_width(input_width) |
| 17225 | .input_height(5) |
| 17226 | .kernel_height(3) |
| 17227 | .kernel_width(3) |
| 17228 | .subsampling(1) |
| 17229 | .padding_left(1) |
| 17230 | .padding_right(1) |
| 17231 | .padding_top(1) |
| 17232 | .padding_bottom(1) |
| 17233 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_5x4); |
| 17234 | } |
| 17235 | } |
| 17236 | |
| 17237 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_5X4, output_height_div_5) { |
| 17238 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 17239 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17240 | DWConv2DMicrokernelTester() |
| 17241 | .input_width(input_width) |
| 17242 | .input_height(input_height) |
| 17243 | .kernel_height(3) |
| 17244 | .kernel_width(3) |
| 17245 | .subsampling(1) |
| 17246 | .padding_left(1) |
| 17247 | .padding_right(1) |
| 17248 | .padding_top(1) |
| 17249 | .padding_bottom(1) |
| 17250 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_5x4); |
| 17251 | } |
| 17252 | } |
| 17253 | } |
| 17254 | |
| 17255 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_5X4, output_height_lt_5) { |
| 17256 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 17257 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17258 | DWConv2DMicrokernelTester() |
| 17259 | .input_width(input_width) |
| 17260 | .input_height(input_height) |
| 17261 | .kernel_height(3) |
| 17262 | .kernel_width(3) |
| 17263 | .subsampling(1) |
| 17264 | .padding_left(1) |
| 17265 | .padding_right(1) |
| 17266 | .padding_top(1) |
| 17267 | .padding_bottom(1) |
| 17268 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_5x4); |
| 17269 | } |
| 17270 | } |
| 17271 | } |
| 17272 | |
| 17273 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_5X4, output_height_gt_5) { |
| 17274 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 17275 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17276 | DWConv2DMicrokernelTester() |
| 17277 | .input_width(input_width) |
| 17278 | .input_height(input_height) |
| 17279 | .kernel_height(3) |
| 17280 | .kernel_width(3) |
| 17281 | .subsampling(1) |
| 17282 | .padding_left(1) |
| 17283 | .padding_right(1) |
| 17284 | .padding_top(1) |
| 17285 | .padding_bottom(1) |
| 17286 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_5x4); |
| 17287 | } |
| 17288 | } |
| 17289 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17290 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17291 | |
| 17292 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17293 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17294 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_6X4, output_width_eq_4) { |
| 17295 | DWConv2DMicrokernelTester() |
| 17296 | .input_width(4) |
| 17297 | .input_height(6) |
| 17298 | .kernel_height(3) |
| 17299 | .kernel_width(3) |
| 17300 | .subsampling(1) |
| 17301 | .padding_left(1) |
| 17302 | .padding_right(1) |
| 17303 | .padding_top(1) |
| 17304 | .padding_bottom(1) |
| 17305 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_6x4); |
| 17306 | } |
| 17307 | |
| 17308 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_6X4, output_width_div_4) { |
| 17309 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 17310 | DWConv2DMicrokernelTester() |
| 17311 | .input_width(input_width) |
| 17312 | .input_height(6) |
| 17313 | .kernel_height(3) |
| 17314 | .kernel_width(3) |
| 17315 | .subsampling(1) |
| 17316 | .padding_left(1) |
| 17317 | .padding_right(1) |
| 17318 | .padding_top(1) |
| 17319 | .padding_bottom(1) |
| 17320 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_6x4); |
| 17321 | } |
| 17322 | } |
| 17323 | |
| 17324 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_6X4, output_width_lt_4) { |
| 17325 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 17326 | DWConv2DMicrokernelTester() |
| 17327 | .input_width(4) |
| 17328 | .input_height(6) |
| 17329 | .kernel_height(3) |
| 17330 | .kernel_width(3) |
| 17331 | .subsampling(1) |
| 17332 | .padding_left(1) |
| 17333 | .padding_right(1) |
| 17334 | .padding_top(1) |
| 17335 | .padding_bottom(1) |
| 17336 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_6x4); |
| 17337 | } |
| 17338 | } |
| 17339 | |
| 17340 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_6X4, output_width_gt_4) { |
| 17341 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 17342 | DWConv2DMicrokernelTester() |
| 17343 | .input_width(input_width) |
| 17344 | .input_height(6) |
| 17345 | .kernel_height(3) |
| 17346 | .kernel_width(3) |
| 17347 | .subsampling(1) |
| 17348 | .padding_left(1) |
| 17349 | .padding_right(1) |
| 17350 | .padding_top(1) |
| 17351 | .padding_bottom(1) |
| 17352 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_6x4); |
| 17353 | } |
| 17354 | } |
| 17355 | |
| 17356 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_6X4, output_height_div_6) { |
| 17357 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 17358 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17359 | DWConv2DMicrokernelTester() |
| 17360 | .input_width(input_width) |
| 17361 | .input_height(input_height) |
| 17362 | .kernel_height(3) |
| 17363 | .kernel_width(3) |
| 17364 | .subsampling(1) |
| 17365 | .padding_left(1) |
| 17366 | .padding_right(1) |
| 17367 | .padding_top(1) |
| 17368 | .padding_bottom(1) |
| 17369 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_6x4); |
| 17370 | } |
| 17371 | } |
| 17372 | } |
| 17373 | |
| 17374 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_6X4, output_height_lt_6) { |
| 17375 | for (size_t input_height = 1; input_height < 6; input_height++) { |
| 17376 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17377 | DWConv2DMicrokernelTester() |
| 17378 | .input_width(input_width) |
| 17379 | .input_height(input_height) |
| 17380 | .kernel_height(3) |
| 17381 | .kernel_width(3) |
| 17382 | .subsampling(1) |
| 17383 | .padding_left(1) |
| 17384 | .padding_right(1) |
| 17385 | .padding_top(1) |
| 17386 | .padding_bottom(1) |
| 17387 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_6x4); |
| 17388 | } |
| 17389 | } |
| 17390 | } |
| 17391 | |
| 17392 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_6X4, output_height_gt_6) { |
| 17393 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 17394 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17395 | DWConv2DMicrokernelTester() |
| 17396 | .input_width(input_width) |
| 17397 | .input_height(input_height) |
| 17398 | .kernel_height(3) |
| 17399 | .kernel_width(3) |
| 17400 | .subsampling(1) |
| 17401 | .padding_left(1) |
| 17402 | .padding_right(1) |
| 17403 | .padding_top(1) |
| 17404 | .padding_bottom(1) |
| 17405 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_6x4); |
| 17406 | } |
| 17407 | } |
| 17408 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17409 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17410 | |
| 17411 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17412 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17413 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_eq_4) { |
| 17414 | DWConv2DMicrokernelTester() |
| 17415 | .input_width(4) |
| 17416 | .input_height(1) |
| 17417 | .kernel_height(3) |
| 17418 | .kernel_width(3) |
| 17419 | .subsampling(1) |
| 17420 | .padding_left(1) |
| 17421 | .padding_right(1) |
| 17422 | .padding_top(1) |
| 17423 | .padding_bottom(1) |
| 17424 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc2); |
| 17425 | } |
| 17426 | |
| 17427 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_div_4) { |
| 17428 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 17429 | DWConv2DMicrokernelTester() |
| 17430 | .input_width(input_width) |
| 17431 | .input_height(1) |
| 17432 | .kernel_height(3) |
| 17433 | .kernel_width(3) |
| 17434 | .subsampling(1) |
| 17435 | .padding_left(1) |
| 17436 | .padding_right(1) |
| 17437 | .padding_top(1) |
| 17438 | .padding_bottom(1) |
| 17439 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc2); |
| 17440 | } |
| 17441 | } |
| 17442 | |
| 17443 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_lt_4) { |
| 17444 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 17445 | DWConv2DMicrokernelTester() |
| 17446 | .input_width(4) |
| 17447 | .input_height(1) |
| 17448 | .kernel_height(3) |
| 17449 | .kernel_width(3) |
| 17450 | .subsampling(1) |
| 17451 | .padding_left(1) |
| 17452 | .padding_right(1) |
| 17453 | .padding_top(1) |
| 17454 | .padding_bottom(1) |
| 17455 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc2); |
| 17456 | } |
| 17457 | } |
| 17458 | |
| 17459 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_gt_4) { |
| 17460 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 17461 | DWConv2DMicrokernelTester() |
| 17462 | .input_width(input_width) |
| 17463 | .input_height(1) |
| 17464 | .kernel_height(3) |
| 17465 | .kernel_width(3) |
| 17466 | .subsampling(1) |
| 17467 | .padding_left(1) |
| 17468 | .padding_right(1) |
| 17469 | .padding_top(1) |
| 17470 | .padding_bottom(1) |
| 17471 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc2); |
| 17472 | } |
| 17473 | } |
| 17474 | |
| 17475 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_height_gt_1) { |
| 17476 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 17477 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17478 | DWConv2DMicrokernelTester() |
| 17479 | .input_width(input_width) |
| 17480 | .input_height(input_height) |
| 17481 | .kernel_height(3) |
| 17482 | .kernel_width(3) |
| 17483 | .subsampling(1) |
| 17484 | .padding_left(1) |
| 17485 | .padding_right(1) |
| 17486 | .padding_top(1) |
| 17487 | .padding_bottom(1) |
| 17488 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc2); |
| 17489 | } |
| 17490 | } |
| 17491 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17492 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17493 | |
| 17494 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17495 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17496 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_eq_4) { |
| 17497 | DWConv2DMicrokernelTester() |
| 17498 | .input_width(4) |
| 17499 | .input_height(1) |
| 17500 | .kernel_height(3) |
| 17501 | .kernel_width(3) |
| 17502 | .subsampling(1) |
| 17503 | .padding_left(1) |
| 17504 | .padding_right(1) |
| 17505 | .padding_top(1) |
| 17506 | .padding_bottom(1) |
| 17507 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc3); |
| 17508 | } |
| 17509 | |
| 17510 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_div_4) { |
| 17511 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 17512 | DWConv2DMicrokernelTester() |
| 17513 | .input_width(input_width) |
| 17514 | .input_height(1) |
| 17515 | .kernel_height(3) |
| 17516 | .kernel_width(3) |
| 17517 | .subsampling(1) |
| 17518 | .padding_left(1) |
| 17519 | .padding_right(1) |
| 17520 | .padding_top(1) |
| 17521 | .padding_bottom(1) |
| 17522 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc3); |
| 17523 | } |
| 17524 | } |
| 17525 | |
| 17526 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_lt_4) { |
| 17527 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 17528 | DWConv2DMicrokernelTester() |
| 17529 | .input_width(4) |
| 17530 | .input_height(1) |
| 17531 | .kernel_height(3) |
| 17532 | .kernel_width(3) |
| 17533 | .subsampling(1) |
| 17534 | .padding_left(1) |
| 17535 | .padding_right(1) |
| 17536 | .padding_top(1) |
| 17537 | .padding_bottom(1) |
| 17538 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc3); |
| 17539 | } |
| 17540 | } |
| 17541 | |
| 17542 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_gt_4) { |
| 17543 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 17544 | DWConv2DMicrokernelTester() |
| 17545 | .input_width(input_width) |
| 17546 | .input_height(1) |
| 17547 | .kernel_height(3) |
| 17548 | .kernel_width(3) |
| 17549 | .subsampling(1) |
| 17550 | .padding_left(1) |
| 17551 | .padding_right(1) |
| 17552 | .padding_top(1) |
| 17553 | .padding_bottom(1) |
| 17554 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc3); |
| 17555 | } |
| 17556 | } |
| 17557 | |
| 17558 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_height_gt_1) { |
| 17559 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 17560 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17561 | DWConv2DMicrokernelTester() |
| 17562 | .input_width(input_width) |
| 17563 | .input_height(input_height) |
| 17564 | .kernel_height(3) |
| 17565 | .kernel_width(3) |
| 17566 | .subsampling(1) |
| 17567 | .padding_left(1) |
| 17568 | .padding_right(1) |
| 17569 | .padding_top(1) |
| 17570 | .padding_bottom(1) |
| 17571 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc3); |
| 17572 | } |
| 17573 | } |
| 17574 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17575 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17576 | |
| 17577 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17578 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17579 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_eq_4) { |
| 17580 | DWConv2DMicrokernelTester() |
| 17581 | .input_width(4) |
| 17582 | .input_height(1) |
| 17583 | .kernel_height(3) |
| 17584 | .kernel_width(3) |
| 17585 | .subsampling(1) |
| 17586 | .padding_left(1) |
| 17587 | .padding_right(1) |
| 17588 | .padding_top(1) |
| 17589 | .padding_bottom(1) |
| 17590 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc4); |
| 17591 | } |
| 17592 | |
| 17593 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_div_4) { |
| 17594 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 17595 | DWConv2DMicrokernelTester() |
| 17596 | .input_width(input_width) |
| 17597 | .input_height(1) |
| 17598 | .kernel_height(3) |
| 17599 | .kernel_width(3) |
| 17600 | .subsampling(1) |
| 17601 | .padding_left(1) |
| 17602 | .padding_right(1) |
| 17603 | .padding_top(1) |
| 17604 | .padding_bottom(1) |
| 17605 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc4); |
| 17606 | } |
| 17607 | } |
| 17608 | |
| 17609 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_lt_4) { |
| 17610 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 17611 | DWConv2DMicrokernelTester() |
| 17612 | .input_width(4) |
| 17613 | .input_height(1) |
| 17614 | .kernel_height(3) |
| 17615 | .kernel_width(3) |
| 17616 | .subsampling(1) |
| 17617 | .padding_left(1) |
| 17618 | .padding_right(1) |
| 17619 | .padding_top(1) |
| 17620 | .padding_bottom(1) |
| 17621 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc4); |
| 17622 | } |
| 17623 | } |
| 17624 | |
| 17625 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_gt_4) { |
| 17626 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 17627 | DWConv2DMicrokernelTester() |
| 17628 | .input_width(input_width) |
| 17629 | .input_height(1) |
| 17630 | .kernel_height(3) |
| 17631 | .kernel_width(3) |
| 17632 | .subsampling(1) |
| 17633 | .padding_left(1) |
| 17634 | .padding_right(1) |
| 17635 | .padding_top(1) |
| 17636 | .padding_bottom(1) |
| 17637 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc4); |
| 17638 | } |
| 17639 | } |
| 17640 | |
| 17641 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_height_gt_1) { |
| 17642 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 17643 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17644 | DWConv2DMicrokernelTester() |
| 17645 | .input_width(input_width) |
| 17646 | .input_height(input_height) |
| 17647 | .kernel_height(3) |
| 17648 | .kernel_width(3) |
| 17649 | .subsampling(1) |
| 17650 | .padding_left(1) |
| 17651 | .padding_right(1) |
| 17652 | .padding_top(1) |
| 17653 | .padding_bottom(1) |
| 17654 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc4); |
| 17655 | } |
| 17656 | } |
| 17657 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17658 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17659 | |
| 17660 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17661 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17662 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_eq_4) { |
| 17663 | DWConv2DMicrokernelTester() |
| 17664 | .input_width(4) |
| 17665 | .input_height(2) |
| 17666 | .kernel_height(3) |
| 17667 | .kernel_width(3) |
| 17668 | .subsampling(1) |
| 17669 | .padding_left(1) |
| 17670 | .padding_right(1) |
| 17671 | .padding_top(1) |
| 17672 | .padding_bottom(1) |
| 17673 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4_acc2); |
| 17674 | } |
| 17675 | |
| 17676 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_div_4) { |
| 17677 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 17678 | DWConv2DMicrokernelTester() |
| 17679 | .input_width(input_width) |
| 17680 | .input_height(2) |
| 17681 | .kernel_height(3) |
| 17682 | .kernel_width(3) |
| 17683 | .subsampling(1) |
| 17684 | .padding_left(1) |
| 17685 | .padding_right(1) |
| 17686 | .padding_top(1) |
| 17687 | .padding_bottom(1) |
| 17688 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4_acc2); |
| 17689 | } |
| 17690 | } |
| 17691 | |
| 17692 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_lt_4) { |
| 17693 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 17694 | DWConv2DMicrokernelTester() |
| 17695 | .input_width(4) |
| 17696 | .input_height(2) |
| 17697 | .kernel_height(3) |
| 17698 | .kernel_width(3) |
| 17699 | .subsampling(1) |
| 17700 | .padding_left(1) |
| 17701 | .padding_right(1) |
| 17702 | .padding_top(1) |
| 17703 | .padding_bottom(1) |
| 17704 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4_acc2); |
| 17705 | } |
| 17706 | } |
| 17707 | |
| 17708 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_gt_4) { |
| 17709 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 17710 | DWConv2DMicrokernelTester() |
| 17711 | .input_width(input_width) |
| 17712 | .input_height(2) |
| 17713 | .kernel_height(3) |
| 17714 | .kernel_width(3) |
| 17715 | .subsampling(1) |
| 17716 | .padding_left(1) |
| 17717 | .padding_right(1) |
| 17718 | .padding_top(1) |
| 17719 | .padding_bottom(1) |
| 17720 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4_acc2); |
| 17721 | } |
| 17722 | } |
| 17723 | |
| 17724 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_div_2) { |
| 17725 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 17726 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17727 | DWConv2DMicrokernelTester() |
| 17728 | .input_width(input_width) |
| 17729 | .input_height(input_height) |
| 17730 | .kernel_height(3) |
| 17731 | .kernel_width(3) |
| 17732 | .subsampling(1) |
| 17733 | .padding_left(1) |
| 17734 | .padding_right(1) |
| 17735 | .padding_top(1) |
| 17736 | .padding_bottom(1) |
| 17737 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4_acc2); |
| 17738 | } |
| 17739 | } |
| 17740 | } |
| 17741 | |
| 17742 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_lt_2) { |
| 17743 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 17744 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17745 | DWConv2DMicrokernelTester() |
| 17746 | .input_width(input_width) |
| 17747 | .input_height(input_height) |
| 17748 | .kernel_height(3) |
| 17749 | .kernel_width(3) |
| 17750 | .subsampling(1) |
| 17751 | .padding_left(1) |
| 17752 | .padding_right(1) |
| 17753 | .padding_top(1) |
| 17754 | .padding_bottom(1) |
| 17755 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4_acc2); |
| 17756 | } |
| 17757 | } |
| 17758 | } |
| 17759 | |
| 17760 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_gt_2) { |
| 17761 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 17762 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17763 | DWConv2DMicrokernelTester() |
| 17764 | .input_width(input_width) |
| 17765 | .input_height(input_height) |
| 17766 | .kernel_height(3) |
| 17767 | .kernel_width(3) |
| 17768 | .subsampling(1) |
| 17769 | .padding_left(1) |
| 17770 | .padding_right(1) |
| 17771 | .padding_top(1) |
| 17772 | .padding_bottom(1) |
| 17773 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4_acc2); |
| 17774 | } |
| 17775 | } |
| 17776 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17777 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17778 | |
| 17779 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17780 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17781 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4, output_width_eq_4) { |
| 17782 | DWConv2DMicrokernelTester() |
| 17783 | .input_width(4) |
| 17784 | .input_height(1) |
| 17785 | .kernel_height(3) |
| 17786 | .kernel_width(3) |
| 17787 | .subsampling(1) |
| 17788 | .padding_left(1) |
| 17789 | .padding_right(1) |
| 17790 | .padding_top(1) |
| 17791 | .padding_bottom(1) |
| 17792 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4); |
| 17793 | } |
| 17794 | |
| 17795 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4, output_width_div_4) { |
| 17796 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 17797 | DWConv2DMicrokernelTester() |
| 17798 | .input_width(input_width) |
| 17799 | .input_height(1) |
| 17800 | .kernel_height(3) |
| 17801 | .kernel_width(3) |
| 17802 | .subsampling(1) |
| 17803 | .padding_left(1) |
| 17804 | .padding_right(1) |
| 17805 | .padding_top(1) |
| 17806 | .padding_bottom(1) |
| 17807 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4); |
| 17808 | } |
| 17809 | } |
| 17810 | |
| 17811 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4, output_width_lt_4) { |
| 17812 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 17813 | DWConv2DMicrokernelTester() |
| 17814 | .input_width(4) |
| 17815 | .input_height(1) |
| 17816 | .kernel_height(3) |
| 17817 | .kernel_width(3) |
| 17818 | .subsampling(1) |
| 17819 | .padding_left(1) |
| 17820 | .padding_right(1) |
| 17821 | .padding_top(1) |
| 17822 | .padding_bottom(1) |
| 17823 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4); |
| 17824 | } |
| 17825 | } |
| 17826 | |
| 17827 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4, output_width_gt_4) { |
| 17828 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 17829 | DWConv2DMicrokernelTester() |
| 17830 | .input_width(input_width) |
| 17831 | .input_height(1) |
| 17832 | .kernel_height(3) |
| 17833 | .kernel_width(3) |
| 17834 | .subsampling(1) |
| 17835 | .padding_left(1) |
| 17836 | .padding_right(1) |
| 17837 | .padding_top(1) |
| 17838 | .padding_bottom(1) |
| 17839 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4); |
| 17840 | } |
| 17841 | } |
| 17842 | |
| 17843 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4, output_height_gt_1) { |
| 17844 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 17845 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17846 | DWConv2DMicrokernelTester() |
| 17847 | .input_width(input_width) |
| 17848 | .input_height(input_height) |
| 17849 | .kernel_height(3) |
| 17850 | .kernel_width(3) |
| 17851 | .subsampling(1) |
| 17852 | .padding_left(1) |
| 17853 | .padding_right(1) |
| 17854 | .padding_top(1) |
| 17855 | .padding_bottom(1) |
| 17856 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4); |
| 17857 | } |
| 17858 | } |
| 17859 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17860 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17861 | |
| 17862 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17863 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17864 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4, output_width_eq_4) { |
| 17865 | DWConv2DMicrokernelTester() |
| 17866 | .input_width(4) |
| 17867 | .input_height(2) |
| 17868 | .kernel_height(3) |
| 17869 | .kernel_width(3) |
| 17870 | .subsampling(1) |
| 17871 | .padding_left(1) |
| 17872 | .padding_right(1) |
| 17873 | .padding_top(1) |
| 17874 | .padding_bottom(1) |
| 17875 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4); |
| 17876 | } |
| 17877 | |
| 17878 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4, output_width_div_4) { |
| 17879 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 17880 | DWConv2DMicrokernelTester() |
| 17881 | .input_width(input_width) |
| 17882 | .input_height(2) |
| 17883 | .kernel_height(3) |
| 17884 | .kernel_width(3) |
| 17885 | .subsampling(1) |
| 17886 | .padding_left(1) |
| 17887 | .padding_right(1) |
| 17888 | .padding_top(1) |
| 17889 | .padding_bottom(1) |
| 17890 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4); |
| 17891 | } |
| 17892 | } |
| 17893 | |
| 17894 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4, output_width_lt_4) { |
| 17895 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 17896 | DWConv2DMicrokernelTester() |
| 17897 | .input_width(4) |
| 17898 | .input_height(2) |
| 17899 | .kernel_height(3) |
| 17900 | .kernel_width(3) |
| 17901 | .subsampling(1) |
| 17902 | .padding_left(1) |
| 17903 | .padding_right(1) |
| 17904 | .padding_top(1) |
| 17905 | .padding_bottom(1) |
| 17906 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4); |
| 17907 | } |
| 17908 | } |
| 17909 | |
| 17910 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4, output_width_gt_4) { |
| 17911 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 17912 | DWConv2DMicrokernelTester() |
| 17913 | .input_width(input_width) |
| 17914 | .input_height(2) |
| 17915 | .kernel_height(3) |
| 17916 | .kernel_width(3) |
| 17917 | .subsampling(1) |
| 17918 | .padding_left(1) |
| 17919 | .padding_right(1) |
| 17920 | .padding_top(1) |
| 17921 | .padding_bottom(1) |
| 17922 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4); |
| 17923 | } |
| 17924 | } |
| 17925 | |
| 17926 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4, output_height_div_2) { |
| 17927 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 17928 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17929 | DWConv2DMicrokernelTester() |
| 17930 | .input_width(input_width) |
| 17931 | .input_height(input_height) |
| 17932 | .kernel_height(3) |
| 17933 | .kernel_width(3) |
| 17934 | .subsampling(1) |
| 17935 | .padding_left(1) |
| 17936 | .padding_right(1) |
| 17937 | .padding_top(1) |
| 17938 | .padding_bottom(1) |
| 17939 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4); |
| 17940 | } |
| 17941 | } |
| 17942 | } |
| 17943 | |
| 17944 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4, output_height_lt_2) { |
| 17945 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 17946 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17947 | DWConv2DMicrokernelTester() |
| 17948 | .input_width(input_width) |
| 17949 | .input_height(input_height) |
| 17950 | .kernel_height(3) |
| 17951 | .kernel_width(3) |
| 17952 | .subsampling(1) |
| 17953 | .padding_left(1) |
| 17954 | .padding_right(1) |
| 17955 | .padding_top(1) |
| 17956 | .padding_bottom(1) |
| 17957 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4); |
| 17958 | } |
| 17959 | } |
| 17960 | } |
| 17961 | |
| 17962 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4, output_height_gt_2) { |
| 17963 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 17964 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 17965 | DWConv2DMicrokernelTester() |
| 17966 | .input_width(input_width) |
| 17967 | .input_height(input_height) |
| 17968 | .kernel_height(3) |
| 17969 | .kernel_width(3) |
| 17970 | .subsampling(1) |
| 17971 | .padding_left(1) |
| 17972 | .padding_right(1) |
| 17973 | .padding_top(1) |
| 17974 | .padding_bottom(1) |
| 17975 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4); |
| 17976 | } |
| 17977 | } |
| 17978 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17979 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17980 | |
| 17981 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 17982 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 17983 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_3X4, output_width_eq_4) { |
| 17984 | DWConv2DMicrokernelTester() |
| 17985 | .input_width(4) |
| 17986 | .input_height(3) |
| 17987 | .kernel_height(3) |
| 17988 | .kernel_width(3) |
| 17989 | .subsampling(1) |
| 17990 | .padding_left(1) |
| 17991 | .padding_right(1) |
| 17992 | .padding_top(1) |
| 17993 | .padding_bottom(1) |
| 17994 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_3x4); |
| 17995 | } |
| 17996 | |
| 17997 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_3X4, output_width_div_4) { |
| 17998 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 17999 | DWConv2DMicrokernelTester() |
| 18000 | .input_width(input_width) |
| 18001 | .input_height(3) |
| 18002 | .kernel_height(3) |
| 18003 | .kernel_width(3) |
| 18004 | .subsampling(1) |
| 18005 | .padding_left(1) |
| 18006 | .padding_right(1) |
| 18007 | .padding_top(1) |
| 18008 | .padding_bottom(1) |
| 18009 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_3x4); |
| 18010 | } |
| 18011 | } |
| 18012 | |
| 18013 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_3X4, output_width_lt_4) { |
| 18014 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 18015 | DWConv2DMicrokernelTester() |
| 18016 | .input_width(4) |
| 18017 | .input_height(3) |
| 18018 | .kernel_height(3) |
| 18019 | .kernel_width(3) |
| 18020 | .subsampling(1) |
| 18021 | .padding_left(1) |
| 18022 | .padding_right(1) |
| 18023 | .padding_top(1) |
| 18024 | .padding_bottom(1) |
| 18025 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_3x4); |
| 18026 | } |
| 18027 | } |
| 18028 | |
| 18029 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_3X4, output_width_gt_4) { |
| 18030 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 18031 | DWConv2DMicrokernelTester() |
| 18032 | .input_width(input_width) |
| 18033 | .input_height(3) |
| 18034 | .kernel_height(3) |
| 18035 | .kernel_width(3) |
| 18036 | .subsampling(1) |
| 18037 | .padding_left(1) |
| 18038 | .padding_right(1) |
| 18039 | .padding_top(1) |
| 18040 | .padding_bottom(1) |
| 18041 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_3x4); |
| 18042 | } |
| 18043 | } |
| 18044 | |
| 18045 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_3X4, output_height_div_3) { |
| 18046 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 18047 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18048 | DWConv2DMicrokernelTester() |
| 18049 | .input_width(input_width) |
| 18050 | .input_height(input_height) |
| 18051 | .kernel_height(3) |
| 18052 | .kernel_width(3) |
| 18053 | .subsampling(1) |
| 18054 | .padding_left(1) |
| 18055 | .padding_right(1) |
| 18056 | .padding_top(1) |
| 18057 | .padding_bottom(1) |
| 18058 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_3x4); |
| 18059 | } |
| 18060 | } |
| 18061 | } |
| 18062 | |
| 18063 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_3X4, output_height_lt_3) { |
| 18064 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 18065 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18066 | DWConv2DMicrokernelTester() |
| 18067 | .input_width(input_width) |
| 18068 | .input_height(input_height) |
| 18069 | .kernel_height(3) |
| 18070 | .kernel_width(3) |
| 18071 | .subsampling(1) |
| 18072 | .padding_left(1) |
| 18073 | .padding_right(1) |
| 18074 | .padding_top(1) |
| 18075 | .padding_bottom(1) |
| 18076 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_3x4); |
| 18077 | } |
| 18078 | } |
| 18079 | } |
| 18080 | |
| 18081 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_3X4, output_height_gt_3) { |
| 18082 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 18083 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18084 | DWConv2DMicrokernelTester() |
| 18085 | .input_width(input_width) |
| 18086 | .input_height(input_height) |
| 18087 | .kernel_height(3) |
| 18088 | .kernel_width(3) |
| 18089 | .subsampling(1) |
| 18090 | .padding_left(1) |
| 18091 | .padding_right(1) |
| 18092 | .padding_top(1) |
| 18093 | .padding_bottom(1) |
| 18094 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_3x4); |
| 18095 | } |
| 18096 | } |
| 18097 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18098 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18099 | |
| 18100 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18101 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18102 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_4X4, output_width_eq_4) { |
| 18103 | DWConv2DMicrokernelTester() |
| 18104 | .input_width(4) |
| 18105 | .input_height(4) |
| 18106 | .kernel_height(3) |
| 18107 | .kernel_width(3) |
| 18108 | .subsampling(1) |
| 18109 | .padding_left(1) |
| 18110 | .padding_right(1) |
| 18111 | .padding_top(1) |
| 18112 | .padding_bottom(1) |
| 18113 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_4x4); |
| 18114 | } |
| 18115 | |
| 18116 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_4X4, output_width_div_4) { |
| 18117 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 18118 | DWConv2DMicrokernelTester() |
| 18119 | .input_width(input_width) |
| 18120 | .input_height(4) |
| 18121 | .kernel_height(3) |
| 18122 | .kernel_width(3) |
| 18123 | .subsampling(1) |
| 18124 | .padding_left(1) |
| 18125 | .padding_right(1) |
| 18126 | .padding_top(1) |
| 18127 | .padding_bottom(1) |
| 18128 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_4x4); |
| 18129 | } |
| 18130 | } |
| 18131 | |
| 18132 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_4X4, output_width_lt_4) { |
| 18133 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 18134 | DWConv2DMicrokernelTester() |
| 18135 | .input_width(4) |
| 18136 | .input_height(4) |
| 18137 | .kernel_height(3) |
| 18138 | .kernel_width(3) |
| 18139 | .subsampling(1) |
| 18140 | .padding_left(1) |
| 18141 | .padding_right(1) |
| 18142 | .padding_top(1) |
| 18143 | .padding_bottom(1) |
| 18144 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_4x4); |
| 18145 | } |
| 18146 | } |
| 18147 | |
| 18148 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_4X4, output_width_gt_4) { |
| 18149 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 18150 | DWConv2DMicrokernelTester() |
| 18151 | .input_width(input_width) |
| 18152 | .input_height(4) |
| 18153 | .kernel_height(3) |
| 18154 | .kernel_width(3) |
| 18155 | .subsampling(1) |
| 18156 | .padding_left(1) |
| 18157 | .padding_right(1) |
| 18158 | .padding_top(1) |
| 18159 | .padding_bottom(1) |
| 18160 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_4x4); |
| 18161 | } |
| 18162 | } |
| 18163 | |
| 18164 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_4X4, output_height_div_4) { |
| 18165 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 18166 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18167 | DWConv2DMicrokernelTester() |
| 18168 | .input_width(input_width) |
| 18169 | .input_height(input_height) |
| 18170 | .kernel_height(3) |
| 18171 | .kernel_width(3) |
| 18172 | .subsampling(1) |
| 18173 | .padding_left(1) |
| 18174 | .padding_right(1) |
| 18175 | .padding_top(1) |
| 18176 | .padding_bottom(1) |
| 18177 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_4x4); |
| 18178 | } |
| 18179 | } |
| 18180 | } |
| 18181 | |
| 18182 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_4X4, output_height_lt_4) { |
| 18183 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 18184 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18185 | DWConv2DMicrokernelTester() |
| 18186 | .input_width(input_width) |
| 18187 | .input_height(input_height) |
| 18188 | .kernel_height(3) |
| 18189 | .kernel_width(3) |
| 18190 | .subsampling(1) |
| 18191 | .padding_left(1) |
| 18192 | .padding_right(1) |
| 18193 | .padding_top(1) |
| 18194 | .padding_bottom(1) |
| 18195 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_4x4); |
| 18196 | } |
| 18197 | } |
| 18198 | } |
| 18199 | |
| 18200 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_4X4, output_height_gt_4) { |
| 18201 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 18202 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18203 | DWConv2DMicrokernelTester() |
| 18204 | .input_width(input_width) |
| 18205 | .input_height(input_height) |
| 18206 | .kernel_height(3) |
| 18207 | .kernel_width(3) |
| 18208 | .subsampling(1) |
| 18209 | .padding_left(1) |
| 18210 | .padding_right(1) |
| 18211 | .padding_top(1) |
| 18212 | .padding_bottom(1) |
| 18213 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_4x4); |
| 18214 | } |
| 18215 | } |
| 18216 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18217 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18218 | |
| 18219 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18220 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18221 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_5X4, output_width_eq_4) { |
| 18222 | DWConv2DMicrokernelTester() |
| 18223 | .input_width(4) |
| 18224 | .input_height(5) |
| 18225 | .kernel_height(3) |
| 18226 | .kernel_width(3) |
| 18227 | .subsampling(1) |
| 18228 | .padding_left(1) |
| 18229 | .padding_right(1) |
| 18230 | .padding_top(1) |
| 18231 | .padding_bottom(1) |
| 18232 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_5x4); |
| 18233 | } |
| 18234 | |
| 18235 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_5X4, output_width_div_4) { |
| 18236 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 18237 | DWConv2DMicrokernelTester() |
| 18238 | .input_width(input_width) |
| 18239 | .input_height(5) |
| 18240 | .kernel_height(3) |
| 18241 | .kernel_width(3) |
| 18242 | .subsampling(1) |
| 18243 | .padding_left(1) |
| 18244 | .padding_right(1) |
| 18245 | .padding_top(1) |
| 18246 | .padding_bottom(1) |
| 18247 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_5x4); |
| 18248 | } |
| 18249 | } |
| 18250 | |
| 18251 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_5X4, output_width_lt_4) { |
| 18252 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 18253 | DWConv2DMicrokernelTester() |
| 18254 | .input_width(4) |
| 18255 | .input_height(5) |
| 18256 | .kernel_height(3) |
| 18257 | .kernel_width(3) |
| 18258 | .subsampling(1) |
| 18259 | .padding_left(1) |
| 18260 | .padding_right(1) |
| 18261 | .padding_top(1) |
| 18262 | .padding_bottom(1) |
| 18263 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_5x4); |
| 18264 | } |
| 18265 | } |
| 18266 | |
| 18267 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_5X4, output_width_gt_4) { |
| 18268 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 18269 | DWConv2DMicrokernelTester() |
| 18270 | .input_width(input_width) |
| 18271 | .input_height(5) |
| 18272 | .kernel_height(3) |
| 18273 | .kernel_width(3) |
| 18274 | .subsampling(1) |
| 18275 | .padding_left(1) |
| 18276 | .padding_right(1) |
| 18277 | .padding_top(1) |
| 18278 | .padding_bottom(1) |
| 18279 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_5x4); |
| 18280 | } |
| 18281 | } |
| 18282 | |
| 18283 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_5X4, output_height_div_5) { |
| 18284 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 18285 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18286 | DWConv2DMicrokernelTester() |
| 18287 | .input_width(input_width) |
| 18288 | .input_height(input_height) |
| 18289 | .kernel_height(3) |
| 18290 | .kernel_width(3) |
| 18291 | .subsampling(1) |
| 18292 | .padding_left(1) |
| 18293 | .padding_right(1) |
| 18294 | .padding_top(1) |
| 18295 | .padding_bottom(1) |
| 18296 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_5x4); |
| 18297 | } |
| 18298 | } |
| 18299 | } |
| 18300 | |
| 18301 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_5X4, output_height_lt_5) { |
| 18302 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 18303 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18304 | DWConv2DMicrokernelTester() |
| 18305 | .input_width(input_width) |
| 18306 | .input_height(input_height) |
| 18307 | .kernel_height(3) |
| 18308 | .kernel_width(3) |
| 18309 | .subsampling(1) |
| 18310 | .padding_left(1) |
| 18311 | .padding_right(1) |
| 18312 | .padding_top(1) |
| 18313 | .padding_bottom(1) |
| 18314 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_5x4); |
| 18315 | } |
| 18316 | } |
| 18317 | } |
| 18318 | |
| 18319 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_5X4, output_height_gt_5) { |
| 18320 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 18321 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18322 | DWConv2DMicrokernelTester() |
| 18323 | .input_width(input_width) |
| 18324 | .input_height(input_height) |
| 18325 | .kernel_height(3) |
| 18326 | .kernel_width(3) |
| 18327 | .subsampling(1) |
| 18328 | .padding_left(1) |
| 18329 | .padding_right(1) |
| 18330 | .padding_top(1) |
| 18331 | .padding_bottom(1) |
| 18332 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_5x4); |
| 18333 | } |
| 18334 | } |
| 18335 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18336 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18337 | |
| 18338 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18339 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18340 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_6X4, output_width_eq_4) { |
| 18341 | DWConv2DMicrokernelTester() |
| 18342 | .input_width(4) |
| 18343 | .input_height(6) |
| 18344 | .kernel_height(3) |
| 18345 | .kernel_width(3) |
| 18346 | .subsampling(1) |
| 18347 | .padding_left(1) |
| 18348 | .padding_right(1) |
| 18349 | .padding_top(1) |
| 18350 | .padding_bottom(1) |
| 18351 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_6x4); |
| 18352 | } |
| 18353 | |
| 18354 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_6X4, output_width_div_4) { |
| 18355 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 18356 | DWConv2DMicrokernelTester() |
| 18357 | .input_width(input_width) |
| 18358 | .input_height(6) |
| 18359 | .kernel_height(3) |
| 18360 | .kernel_width(3) |
| 18361 | .subsampling(1) |
| 18362 | .padding_left(1) |
| 18363 | .padding_right(1) |
| 18364 | .padding_top(1) |
| 18365 | .padding_bottom(1) |
| 18366 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_6x4); |
| 18367 | } |
| 18368 | } |
| 18369 | |
| 18370 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_6X4, output_width_lt_4) { |
| 18371 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 18372 | DWConv2DMicrokernelTester() |
| 18373 | .input_width(4) |
| 18374 | .input_height(6) |
| 18375 | .kernel_height(3) |
| 18376 | .kernel_width(3) |
| 18377 | .subsampling(1) |
| 18378 | .padding_left(1) |
| 18379 | .padding_right(1) |
| 18380 | .padding_top(1) |
| 18381 | .padding_bottom(1) |
| 18382 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_6x4); |
| 18383 | } |
| 18384 | } |
| 18385 | |
| 18386 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_6X4, output_width_gt_4) { |
| 18387 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 18388 | DWConv2DMicrokernelTester() |
| 18389 | .input_width(input_width) |
| 18390 | .input_height(6) |
| 18391 | .kernel_height(3) |
| 18392 | .kernel_width(3) |
| 18393 | .subsampling(1) |
| 18394 | .padding_left(1) |
| 18395 | .padding_right(1) |
| 18396 | .padding_top(1) |
| 18397 | .padding_bottom(1) |
| 18398 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_6x4); |
| 18399 | } |
| 18400 | } |
| 18401 | |
| 18402 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_6X4, output_height_div_6) { |
| 18403 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 18404 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18405 | DWConv2DMicrokernelTester() |
| 18406 | .input_width(input_width) |
| 18407 | .input_height(input_height) |
| 18408 | .kernel_height(3) |
| 18409 | .kernel_width(3) |
| 18410 | .subsampling(1) |
| 18411 | .padding_left(1) |
| 18412 | .padding_right(1) |
| 18413 | .padding_top(1) |
| 18414 | .padding_bottom(1) |
| 18415 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_6x4); |
| 18416 | } |
| 18417 | } |
| 18418 | } |
| 18419 | |
| 18420 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_6X4, output_height_lt_6) { |
| 18421 | for (size_t input_height = 1; input_height < 6; input_height++) { |
| 18422 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18423 | DWConv2DMicrokernelTester() |
| 18424 | .input_width(input_width) |
| 18425 | .input_height(input_height) |
| 18426 | .kernel_height(3) |
| 18427 | .kernel_width(3) |
| 18428 | .subsampling(1) |
| 18429 | .padding_left(1) |
| 18430 | .padding_right(1) |
| 18431 | .padding_top(1) |
| 18432 | .padding_bottom(1) |
| 18433 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_6x4); |
| 18434 | } |
| 18435 | } |
| 18436 | } |
| 18437 | |
| 18438 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_6X4, output_height_gt_6) { |
| 18439 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 18440 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18441 | DWConv2DMicrokernelTester() |
| 18442 | .input_width(input_width) |
| 18443 | .input_height(input_height) |
| 18444 | .kernel_height(3) |
| 18445 | .kernel_width(3) |
| 18446 | .subsampling(1) |
| 18447 | .padding_left(1) |
| 18448 | .padding_right(1) |
| 18449 | .padding_top(1) |
| 18450 | .padding_bottom(1) |
| 18451 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_6x4); |
| 18452 | } |
| 18453 | } |
| 18454 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18455 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18456 | |
| 18457 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18458 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18459 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_eq_4) { |
| 18460 | DWConv2DMicrokernelTester() |
| 18461 | .input_width(4) |
| 18462 | .input_height(1) |
| 18463 | .kernel_height(3) |
| 18464 | .kernel_width(3) |
| 18465 | .subsampling(1) |
| 18466 | .padding_left(1) |
| 18467 | .padding_right(1) |
| 18468 | .padding_top(1) |
| 18469 | .padding_bottom(1) |
| 18470 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc2); |
| 18471 | } |
| 18472 | |
| 18473 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_div_4) { |
| 18474 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 18475 | DWConv2DMicrokernelTester() |
| 18476 | .input_width(input_width) |
| 18477 | .input_height(1) |
| 18478 | .kernel_height(3) |
| 18479 | .kernel_width(3) |
| 18480 | .subsampling(1) |
| 18481 | .padding_left(1) |
| 18482 | .padding_right(1) |
| 18483 | .padding_top(1) |
| 18484 | .padding_bottom(1) |
| 18485 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc2); |
| 18486 | } |
| 18487 | } |
| 18488 | |
| 18489 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_lt_4) { |
| 18490 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 18491 | DWConv2DMicrokernelTester() |
| 18492 | .input_width(4) |
| 18493 | .input_height(1) |
| 18494 | .kernel_height(3) |
| 18495 | .kernel_width(3) |
| 18496 | .subsampling(1) |
| 18497 | .padding_left(1) |
| 18498 | .padding_right(1) |
| 18499 | .padding_top(1) |
| 18500 | .padding_bottom(1) |
| 18501 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc2); |
| 18502 | } |
| 18503 | } |
| 18504 | |
| 18505 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_gt_4) { |
| 18506 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 18507 | DWConv2DMicrokernelTester() |
| 18508 | .input_width(input_width) |
| 18509 | .input_height(1) |
| 18510 | .kernel_height(3) |
| 18511 | .kernel_width(3) |
| 18512 | .subsampling(1) |
| 18513 | .padding_left(1) |
| 18514 | .padding_right(1) |
| 18515 | .padding_top(1) |
| 18516 | .padding_bottom(1) |
| 18517 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc2); |
| 18518 | } |
| 18519 | } |
| 18520 | |
| 18521 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC2, output_height_gt_1) { |
| 18522 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 18523 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18524 | DWConv2DMicrokernelTester() |
| 18525 | .input_width(input_width) |
| 18526 | .input_height(input_height) |
| 18527 | .kernel_height(3) |
| 18528 | .kernel_width(3) |
| 18529 | .subsampling(1) |
| 18530 | .padding_left(1) |
| 18531 | .padding_right(1) |
| 18532 | .padding_top(1) |
| 18533 | .padding_bottom(1) |
| 18534 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc2); |
| 18535 | } |
| 18536 | } |
| 18537 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18538 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18539 | |
| 18540 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18541 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18542 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_eq_4) { |
| 18543 | DWConv2DMicrokernelTester() |
| 18544 | .input_width(4) |
| 18545 | .input_height(1) |
| 18546 | .kernel_height(3) |
| 18547 | .kernel_width(3) |
| 18548 | .subsampling(1) |
| 18549 | .padding_left(1) |
| 18550 | .padding_right(1) |
| 18551 | .padding_top(1) |
| 18552 | .padding_bottom(1) |
| 18553 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc3); |
| 18554 | } |
| 18555 | |
| 18556 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_div_4) { |
| 18557 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 18558 | DWConv2DMicrokernelTester() |
| 18559 | .input_width(input_width) |
| 18560 | .input_height(1) |
| 18561 | .kernel_height(3) |
| 18562 | .kernel_width(3) |
| 18563 | .subsampling(1) |
| 18564 | .padding_left(1) |
| 18565 | .padding_right(1) |
| 18566 | .padding_top(1) |
| 18567 | .padding_bottom(1) |
| 18568 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc3); |
| 18569 | } |
| 18570 | } |
| 18571 | |
| 18572 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_lt_4) { |
| 18573 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 18574 | DWConv2DMicrokernelTester() |
| 18575 | .input_width(4) |
| 18576 | .input_height(1) |
| 18577 | .kernel_height(3) |
| 18578 | .kernel_width(3) |
| 18579 | .subsampling(1) |
| 18580 | .padding_left(1) |
| 18581 | .padding_right(1) |
| 18582 | .padding_top(1) |
| 18583 | .padding_bottom(1) |
| 18584 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc3); |
| 18585 | } |
| 18586 | } |
| 18587 | |
| 18588 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_gt_4) { |
| 18589 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 18590 | DWConv2DMicrokernelTester() |
| 18591 | .input_width(input_width) |
| 18592 | .input_height(1) |
| 18593 | .kernel_height(3) |
| 18594 | .kernel_width(3) |
| 18595 | .subsampling(1) |
| 18596 | .padding_left(1) |
| 18597 | .padding_right(1) |
| 18598 | .padding_top(1) |
| 18599 | .padding_bottom(1) |
| 18600 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc3); |
| 18601 | } |
| 18602 | } |
| 18603 | |
| 18604 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC3, output_height_gt_1) { |
| 18605 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 18606 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18607 | DWConv2DMicrokernelTester() |
| 18608 | .input_width(input_width) |
| 18609 | .input_height(input_height) |
| 18610 | .kernel_height(3) |
| 18611 | .kernel_width(3) |
| 18612 | .subsampling(1) |
| 18613 | .padding_left(1) |
| 18614 | .padding_right(1) |
| 18615 | .padding_top(1) |
| 18616 | .padding_bottom(1) |
| 18617 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc3); |
| 18618 | } |
| 18619 | } |
| 18620 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18621 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18622 | |
| 18623 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18624 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18625 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_eq_4) { |
| 18626 | DWConv2DMicrokernelTester() |
| 18627 | .input_width(4) |
| 18628 | .input_height(1) |
| 18629 | .kernel_height(3) |
| 18630 | .kernel_width(3) |
| 18631 | .subsampling(1) |
| 18632 | .padding_left(1) |
| 18633 | .padding_right(1) |
| 18634 | .padding_top(1) |
| 18635 | .padding_bottom(1) |
| 18636 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc4); |
| 18637 | } |
| 18638 | |
| 18639 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_div_4) { |
| 18640 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 18641 | DWConv2DMicrokernelTester() |
| 18642 | .input_width(input_width) |
| 18643 | .input_height(1) |
| 18644 | .kernel_height(3) |
| 18645 | .kernel_width(3) |
| 18646 | .subsampling(1) |
| 18647 | .padding_left(1) |
| 18648 | .padding_right(1) |
| 18649 | .padding_top(1) |
| 18650 | .padding_bottom(1) |
| 18651 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc4); |
| 18652 | } |
| 18653 | } |
| 18654 | |
| 18655 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_lt_4) { |
| 18656 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 18657 | DWConv2DMicrokernelTester() |
| 18658 | .input_width(4) |
| 18659 | .input_height(1) |
| 18660 | .kernel_height(3) |
| 18661 | .kernel_width(3) |
| 18662 | .subsampling(1) |
| 18663 | .padding_left(1) |
| 18664 | .padding_right(1) |
| 18665 | .padding_top(1) |
| 18666 | .padding_bottom(1) |
| 18667 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc4); |
| 18668 | } |
| 18669 | } |
| 18670 | |
| 18671 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_gt_4) { |
| 18672 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 18673 | DWConv2DMicrokernelTester() |
| 18674 | .input_width(input_width) |
| 18675 | .input_height(1) |
| 18676 | .kernel_height(3) |
| 18677 | .kernel_width(3) |
| 18678 | .subsampling(1) |
| 18679 | .padding_left(1) |
| 18680 | .padding_right(1) |
| 18681 | .padding_top(1) |
| 18682 | .padding_bottom(1) |
| 18683 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc4); |
| 18684 | } |
| 18685 | } |
| 18686 | |
| 18687 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_1X4_ACC4, output_height_gt_1) { |
| 18688 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 18689 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18690 | DWConv2DMicrokernelTester() |
| 18691 | .input_width(input_width) |
| 18692 | .input_height(input_height) |
| 18693 | .kernel_height(3) |
| 18694 | .kernel_width(3) |
| 18695 | .subsampling(1) |
| 18696 | .padding_left(1) |
| 18697 | .padding_right(1) |
| 18698 | .padding_top(1) |
| 18699 | .padding_bottom(1) |
| 18700 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc4); |
| 18701 | } |
| 18702 | } |
| 18703 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18704 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18705 | |
| 18706 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18707 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18708 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_eq_4) { |
| 18709 | DWConv2DMicrokernelTester() |
| 18710 | .input_width(4) |
| 18711 | .input_height(2) |
| 18712 | .kernel_height(3) |
| 18713 | .kernel_width(3) |
| 18714 | .subsampling(1) |
| 18715 | .padding_left(1) |
| 18716 | .padding_right(1) |
| 18717 | .padding_top(1) |
| 18718 | .padding_bottom(1) |
| 18719 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4_acc2); |
| 18720 | } |
| 18721 | |
| 18722 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_div_4) { |
| 18723 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 18724 | DWConv2DMicrokernelTester() |
| 18725 | .input_width(input_width) |
| 18726 | .input_height(2) |
| 18727 | .kernel_height(3) |
| 18728 | .kernel_width(3) |
| 18729 | .subsampling(1) |
| 18730 | .padding_left(1) |
| 18731 | .padding_right(1) |
| 18732 | .padding_top(1) |
| 18733 | .padding_bottom(1) |
| 18734 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4_acc2); |
| 18735 | } |
| 18736 | } |
| 18737 | |
| 18738 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_lt_4) { |
| 18739 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 18740 | DWConv2DMicrokernelTester() |
| 18741 | .input_width(4) |
| 18742 | .input_height(2) |
| 18743 | .kernel_height(3) |
| 18744 | .kernel_width(3) |
| 18745 | .subsampling(1) |
| 18746 | .padding_left(1) |
| 18747 | .padding_right(1) |
| 18748 | .padding_top(1) |
| 18749 | .padding_bottom(1) |
| 18750 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4_acc2); |
| 18751 | } |
| 18752 | } |
| 18753 | |
| 18754 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_gt_4) { |
| 18755 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 18756 | DWConv2DMicrokernelTester() |
| 18757 | .input_width(input_width) |
| 18758 | .input_height(2) |
| 18759 | .kernel_height(3) |
| 18760 | .kernel_width(3) |
| 18761 | .subsampling(1) |
| 18762 | .padding_left(1) |
| 18763 | .padding_right(1) |
| 18764 | .padding_top(1) |
| 18765 | .padding_bottom(1) |
| 18766 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4_acc2); |
| 18767 | } |
| 18768 | } |
| 18769 | |
| 18770 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_div_2) { |
| 18771 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 18772 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18773 | DWConv2DMicrokernelTester() |
| 18774 | .input_width(input_width) |
| 18775 | .input_height(input_height) |
| 18776 | .kernel_height(3) |
| 18777 | .kernel_width(3) |
| 18778 | .subsampling(1) |
| 18779 | .padding_left(1) |
| 18780 | .padding_right(1) |
| 18781 | .padding_top(1) |
| 18782 | .padding_bottom(1) |
| 18783 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4_acc2); |
| 18784 | } |
| 18785 | } |
| 18786 | } |
| 18787 | |
| 18788 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_lt_2) { |
| 18789 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 18790 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18791 | DWConv2DMicrokernelTester() |
| 18792 | .input_width(input_width) |
| 18793 | .input_height(input_height) |
| 18794 | .kernel_height(3) |
| 18795 | .kernel_width(3) |
| 18796 | .subsampling(1) |
| 18797 | .padding_left(1) |
| 18798 | .padding_right(1) |
| 18799 | .padding_top(1) |
| 18800 | .padding_bottom(1) |
| 18801 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4_acc2); |
| 18802 | } |
| 18803 | } |
| 18804 | } |
| 18805 | |
| 18806 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_gt_2) { |
| 18807 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 18808 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18809 | DWConv2DMicrokernelTester() |
| 18810 | .input_width(input_width) |
| 18811 | .input_height(input_height) |
| 18812 | .kernel_height(3) |
| 18813 | .kernel_width(3) |
| 18814 | .subsampling(1) |
| 18815 | .padding_left(1) |
| 18816 | .padding_right(1) |
| 18817 | .padding_top(1) |
| 18818 | .padding_bottom(1) |
| 18819 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4_acc2); |
| 18820 | } |
| 18821 | } |
| 18822 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18823 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 02bb429 | 2020-12-15 18:25:32 -0800 | [diff] [blame] | 18824 | |
| 18825 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18826 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18827 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18828 | DWConv2DMicrokernelTester() |
| 18829 | .input_width(4) |
| 18830 | .input_height(1) |
| 18831 | .kernel_height(3) |
| 18832 | .kernel_width(3) |
| 18833 | .subsampling(1) |
| 18834 | .padding_left(1) |
| 18835 | .padding_right(1) |
| 18836 | .padding_top(1) |
| 18837 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18838 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18839 | } |
| 18840 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18841 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18842 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 18843 | DWConv2DMicrokernelTester() |
| 18844 | .input_width(input_width) |
| 18845 | .input_height(1) |
| 18846 | .kernel_height(3) |
| 18847 | .kernel_width(3) |
| 18848 | .subsampling(1) |
| 18849 | .padding_left(1) |
| 18850 | .padding_right(1) |
| 18851 | .padding_top(1) |
| 18852 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18853 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18854 | } |
| 18855 | } |
| 18856 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18857 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18858 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 18859 | DWConv2DMicrokernelTester() |
| 18860 | .input_width(4) |
| 18861 | .input_height(1) |
| 18862 | .kernel_height(3) |
| 18863 | .kernel_width(3) |
| 18864 | .subsampling(1) |
| 18865 | .padding_left(1) |
| 18866 | .padding_right(1) |
| 18867 | .padding_top(1) |
| 18868 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18869 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18870 | } |
| 18871 | } |
| 18872 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18873 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18874 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 18875 | DWConv2DMicrokernelTester() |
| 18876 | .input_width(input_width) |
| 18877 | .input_height(1) |
| 18878 | .kernel_height(3) |
| 18879 | .kernel_width(3) |
| 18880 | .subsampling(1) |
| 18881 | .padding_left(1) |
| 18882 | .padding_right(1) |
| 18883 | .padding_top(1) |
| 18884 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18885 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18886 | } |
| 18887 | } |
| 18888 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18889 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4, output_height_gt_1) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18890 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 18891 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18892 | DWConv2DMicrokernelTester() |
| 18893 | .input_width(input_width) |
| 18894 | .input_height(input_height) |
| 18895 | .kernel_height(3) |
| 18896 | .kernel_width(3) |
| 18897 | .subsampling(1) |
| 18898 | .padding_left(1) |
| 18899 | .padding_right(1) |
| 18900 | .padding_top(1) |
| 18901 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18902 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18903 | } |
| 18904 | } |
| 18905 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18906 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18907 | |
| 18908 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 18909 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18910 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18911 | DWConv2DMicrokernelTester() |
| 18912 | .input_width(4) |
| 18913 | .input_height(2) |
| 18914 | .kernel_height(3) |
| 18915 | .kernel_width(3) |
| 18916 | .subsampling(1) |
| 18917 | .padding_left(1) |
| 18918 | .padding_right(1) |
| 18919 | .padding_top(1) |
| 18920 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18921 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18922 | } |
| 18923 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18924 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18925 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 18926 | DWConv2DMicrokernelTester() |
| 18927 | .input_width(input_width) |
| 18928 | .input_height(2) |
| 18929 | .kernel_height(3) |
| 18930 | .kernel_width(3) |
| 18931 | .subsampling(1) |
| 18932 | .padding_left(1) |
| 18933 | .padding_right(1) |
| 18934 | .padding_top(1) |
| 18935 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18936 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18937 | } |
| 18938 | } |
| 18939 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18940 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18941 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 18942 | DWConv2DMicrokernelTester() |
| 18943 | .input_width(4) |
| 18944 | .input_height(2) |
| 18945 | .kernel_height(3) |
| 18946 | .kernel_width(3) |
| 18947 | .subsampling(1) |
| 18948 | .padding_left(1) |
| 18949 | .padding_right(1) |
| 18950 | .padding_top(1) |
| 18951 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18952 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18953 | } |
| 18954 | } |
| 18955 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18956 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18957 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 18958 | DWConv2DMicrokernelTester() |
| 18959 | .input_width(input_width) |
| 18960 | .input_height(2) |
| 18961 | .kernel_height(3) |
| 18962 | .kernel_width(3) |
| 18963 | .subsampling(1) |
| 18964 | .padding_left(1) |
| 18965 | .padding_right(1) |
| 18966 | .padding_top(1) |
| 18967 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18968 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18969 | } |
| 18970 | } |
| 18971 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18972 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_div_2) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18973 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 18974 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18975 | DWConv2DMicrokernelTester() |
| 18976 | .input_width(input_width) |
| 18977 | .input_height(input_height) |
| 18978 | .kernel_height(3) |
| 18979 | .kernel_width(3) |
| 18980 | .subsampling(1) |
| 18981 | .padding_left(1) |
| 18982 | .padding_right(1) |
| 18983 | .padding_top(1) |
| 18984 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18985 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18986 | } |
| 18987 | } |
| 18988 | } |
| 18989 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 18990 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_lt_2) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 18991 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 18992 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 18993 | DWConv2DMicrokernelTester() |
| 18994 | .input_width(input_width) |
| 18995 | .input_height(input_height) |
| 18996 | .kernel_height(3) |
| 18997 | .kernel_width(3) |
| 18998 | .subsampling(1) |
| 18999 | .padding_left(1) |
| 19000 | .padding_right(1) |
| 19001 | .padding_top(1) |
| 19002 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19003 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19004 | } |
| 19005 | } |
| 19006 | } |
| 19007 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19008 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_gt_2) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19009 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 19010 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19011 | DWConv2DMicrokernelTester() |
| 19012 | .input_width(input_width) |
| 19013 | .input_height(input_height) |
| 19014 | .kernel_height(3) |
| 19015 | .kernel_width(3) |
| 19016 | .subsampling(1) |
| 19017 | .padding_left(1) |
| 19018 | .padding_right(1) |
| 19019 | .padding_top(1) |
| 19020 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19021 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19022 | } |
| 19023 | } |
| 19024 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19025 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19026 | |
| 19027 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19028 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19029 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19030 | DWConv2DMicrokernelTester() |
| 19031 | .input_width(4) |
| 19032 | .input_height(3) |
| 19033 | .kernel_height(3) |
| 19034 | .kernel_width(3) |
| 19035 | .subsampling(1) |
| 19036 | .padding_left(1) |
| 19037 | .padding_right(1) |
| 19038 | .padding_top(1) |
| 19039 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19040 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19041 | } |
| 19042 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19043 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19044 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 19045 | DWConv2DMicrokernelTester() |
| 19046 | .input_width(input_width) |
| 19047 | .input_height(3) |
| 19048 | .kernel_height(3) |
| 19049 | .kernel_width(3) |
| 19050 | .subsampling(1) |
| 19051 | .padding_left(1) |
| 19052 | .padding_right(1) |
| 19053 | .padding_top(1) |
| 19054 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19055 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19056 | } |
| 19057 | } |
| 19058 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19059 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19060 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 19061 | DWConv2DMicrokernelTester() |
| 19062 | .input_width(4) |
| 19063 | .input_height(3) |
| 19064 | .kernel_height(3) |
| 19065 | .kernel_width(3) |
| 19066 | .subsampling(1) |
| 19067 | .padding_left(1) |
| 19068 | .padding_right(1) |
| 19069 | .padding_top(1) |
| 19070 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19071 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19072 | } |
| 19073 | } |
| 19074 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19075 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19076 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 19077 | DWConv2DMicrokernelTester() |
| 19078 | .input_width(input_width) |
| 19079 | .input_height(3) |
| 19080 | .kernel_height(3) |
| 19081 | .kernel_width(3) |
| 19082 | .subsampling(1) |
| 19083 | .padding_left(1) |
| 19084 | .padding_right(1) |
| 19085 | .padding_top(1) |
| 19086 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19087 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19088 | } |
| 19089 | } |
| 19090 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19091 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_div_3) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19092 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 19093 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19094 | DWConv2DMicrokernelTester() |
| 19095 | .input_width(input_width) |
| 19096 | .input_height(input_height) |
| 19097 | .kernel_height(3) |
| 19098 | .kernel_width(3) |
| 19099 | .subsampling(1) |
| 19100 | .padding_left(1) |
| 19101 | .padding_right(1) |
| 19102 | .padding_top(1) |
| 19103 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19104 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19105 | } |
| 19106 | } |
| 19107 | } |
| 19108 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19109 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_lt_3) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19110 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 19111 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19112 | DWConv2DMicrokernelTester() |
| 19113 | .input_width(input_width) |
| 19114 | .input_height(input_height) |
| 19115 | .kernel_height(3) |
| 19116 | .kernel_width(3) |
| 19117 | .subsampling(1) |
| 19118 | .padding_left(1) |
| 19119 | .padding_right(1) |
| 19120 | .padding_top(1) |
| 19121 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19122 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19123 | } |
| 19124 | } |
| 19125 | } |
| 19126 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19127 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_gt_3) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19128 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 19129 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19130 | DWConv2DMicrokernelTester() |
| 19131 | .input_width(input_width) |
| 19132 | .input_height(input_height) |
| 19133 | .kernel_height(3) |
| 19134 | .kernel_width(3) |
| 19135 | .subsampling(1) |
| 19136 | .padding_left(1) |
| 19137 | .padding_right(1) |
| 19138 | .padding_top(1) |
| 19139 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19140 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19141 | } |
| 19142 | } |
| 19143 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19144 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19145 | |
| 19146 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19147 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19148 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19149 | DWConv2DMicrokernelTester() |
| 19150 | .input_width(4) |
| 19151 | .input_height(4) |
| 19152 | .kernel_height(3) |
| 19153 | .kernel_width(3) |
| 19154 | .subsampling(1) |
| 19155 | .padding_left(1) |
| 19156 | .padding_right(1) |
| 19157 | .padding_top(1) |
| 19158 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19159 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19160 | } |
| 19161 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19162 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19163 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 19164 | DWConv2DMicrokernelTester() |
| 19165 | .input_width(input_width) |
| 19166 | .input_height(4) |
| 19167 | .kernel_height(3) |
| 19168 | .kernel_width(3) |
| 19169 | .subsampling(1) |
| 19170 | .padding_left(1) |
| 19171 | .padding_right(1) |
| 19172 | .padding_top(1) |
| 19173 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19174 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19175 | } |
| 19176 | } |
| 19177 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19178 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19179 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 19180 | DWConv2DMicrokernelTester() |
| 19181 | .input_width(4) |
| 19182 | .input_height(4) |
| 19183 | .kernel_height(3) |
| 19184 | .kernel_width(3) |
| 19185 | .subsampling(1) |
| 19186 | .padding_left(1) |
| 19187 | .padding_right(1) |
| 19188 | .padding_top(1) |
| 19189 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19190 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19191 | } |
| 19192 | } |
| 19193 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19194 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19195 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 19196 | DWConv2DMicrokernelTester() |
| 19197 | .input_width(input_width) |
| 19198 | .input_height(4) |
| 19199 | .kernel_height(3) |
| 19200 | .kernel_width(3) |
| 19201 | .subsampling(1) |
| 19202 | .padding_left(1) |
| 19203 | .padding_right(1) |
| 19204 | .padding_top(1) |
| 19205 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19206 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19207 | } |
| 19208 | } |
| 19209 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19210 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_height_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19211 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 19212 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19213 | DWConv2DMicrokernelTester() |
| 19214 | .input_width(input_width) |
| 19215 | .input_height(input_height) |
| 19216 | .kernel_height(3) |
| 19217 | .kernel_width(3) |
| 19218 | .subsampling(1) |
| 19219 | .padding_left(1) |
| 19220 | .padding_right(1) |
| 19221 | .padding_top(1) |
| 19222 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19223 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19224 | } |
| 19225 | } |
| 19226 | } |
| 19227 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19228 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_height_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19229 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 19230 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19231 | DWConv2DMicrokernelTester() |
| 19232 | .input_width(input_width) |
| 19233 | .input_height(input_height) |
| 19234 | .kernel_height(3) |
| 19235 | .kernel_width(3) |
| 19236 | .subsampling(1) |
| 19237 | .padding_left(1) |
| 19238 | .padding_right(1) |
| 19239 | .padding_top(1) |
| 19240 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19241 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19242 | } |
| 19243 | } |
| 19244 | } |
| 19245 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19246 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_height_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19247 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 19248 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19249 | DWConv2DMicrokernelTester() |
| 19250 | .input_width(input_width) |
| 19251 | .input_height(input_height) |
| 19252 | .kernel_height(3) |
| 19253 | .kernel_width(3) |
| 19254 | .subsampling(1) |
| 19255 | .padding_left(1) |
| 19256 | .padding_right(1) |
| 19257 | .padding_top(1) |
| 19258 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19259 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19260 | } |
| 19261 | } |
| 19262 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19263 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19264 | |
| 19265 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19266 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19267 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_5X4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19268 | DWConv2DMicrokernelTester() |
| 19269 | .input_width(4) |
| 19270 | .input_height(5) |
| 19271 | .kernel_height(3) |
| 19272 | .kernel_width(3) |
| 19273 | .subsampling(1) |
| 19274 | .padding_left(1) |
| 19275 | .padding_right(1) |
| 19276 | .padding_top(1) |
| 19277 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19278 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19279 | } |
| 19280 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19281 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_5X4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19282 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 19283 | DWConv2DMicrokernelTester() |
| 19284 | .input_width(input_width) |
| 19285 | .input_height(5) |
| 19286 | .kernel_height(3) |
| 19287 | .kernel_width(3) |
| 19288 | .subsampling(1) |
| 19289 | .padding_left(1) |
| 19290 | .padding_right(1) |
| 19291 | .padding_top(1) |
| 19292 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19293 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19294 | } |
| 19295 | } |
| 19296 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19297 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_5X4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19298 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 19299 | DWConv2DMicrokernelTester() |
| 19300 | .input_width(4) |
| 19301 | .input_height(5) |
| 19302 | .kernel_height(3) |
| 19303 | .kernel_width(3) |
| 19304 | .subsampling(1) |
| 19305 | .padding_left(1) |
| 19306 | .padding_right(1) |
| 19307 | .padding_top(1) |
| 19308 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19309 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19310 | } |
| 19311 | } |
| 19312 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19313 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_5X4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19314 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 19315 | DWConv2DMicrokernelTester() |
| 19316 | .input_width(input_width) |
| 19317 | .input_height(5) |
| 19318 | .kernel_height(3) |
| 19319 | .kernel_width(3) |
| 19320 | .subsampling(1) |
| 19321 | .padding_left(1) |
| 19322 | .padding_right(1) |
| 19323 | .padding_top(1) |
| 19324 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19325 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19326 | } |
| 19327 | } |
| 19328 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19329 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_5X4, output_height_div_5) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19330 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 19331 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19332 | DWConv2DMicrokernelTester() |
| 19333 | .input_width(input_width) |
| 19334 | .input_height(input_height) |
| 19335 | .kernel_height(3) |
| 19336 | .kernel_width(3) |
| 19337 | .subsampling(1) |
| 19338 | .padding_left(1) |
| 19339 | .padding_right(1) |
| 19340 | .padding_top(1) |
| 19341 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19342 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19343 | } |
| 19344 | } |
| 19345 | } |
| 19346 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19347 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_5X4, output_height_lt_5) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19348 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 19349 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19350 | DWConv2DMicrokernelTester() |
| 19351 | .input_width(input_width) |
| 19352 | .input_height(input_height) |
| 19353 | .kernel_height(3) |
| 19354 | .kernel_width(3) |
| 19355 | .subsampling(1) |
| 19356 | .padding_left(1) |
| 19357 | .padding_right(1) |
| 19358 | .padding_top(1) |
| 19359 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19360 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19361 | } |
| 19362 | } |
| 19363 | } |
| 19364 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19365 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_5X4, output_height_gt_5) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19366 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 19367 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19368 | DWConv2DMicrokernelTester() |
| 19369 | .input_width(input_width) |
| 19370 | .input_height(input_height) |
| 19371 | .kernel_height(3) |
| 19372 | .kernel_width(3) |
| 19373 | .subsampling(1) |
| 19374 | .padding_left(1) |
| 19375 | .padding_right(1) |
| 19376 | .padding_top(1) |
| 19377 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19378 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19379 | } |
| 19380 | } |
| 19381 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19382 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19383 | |
| 19384 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19385 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19386 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_6X4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19387 | DWConv2DMicrokernelTester() |
| 19388 | .input_width(4) |
| 19389 | .input_height(6) |
| 19390 | .kernel_height(3) |
| 19391 | .kernel_width(3) |
| 19392 | .subsampling(1) |
| 19393 | .padding_left(1) |
| 19394 | .padding_right(1) |
| 19395 | .padding_top(1) |
| 19396 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19397 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19398 | } |
| 19399 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19400 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_6X4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19401 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 19402 | DWConv2DMicrokernelTester() |
| 19403 | .input_width(input_width) |
| 19404 | .input_height(6) |
| 19405 | .kernel_height(3) |
| 19406 | .kernel_width(3) |
| 19407 | .subsampling(1) |
| 19408 | .padding_left(1) |
| 19409 | .padding_right(1) |
| 19410 | .padding_top(1) |
| 19411 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19412 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19413 | } |
| 19414 | } |
| 19415 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19416 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_6X4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19417 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 19418 | DWConv2DMicrokernelTester() |
| 19419 | .input_width(4) |
| 19420 | .input_height(6) |
| 19421 | .kernel_height(3) |
| 19422 | .kernel_width(3) |
| 19423 | .subsampling(1) |
| 19424 | .padding_left(1) |
| 19425 | .padding_right(1) |
| 19426 | .padding_top(1) |
| 19427 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19428 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19429 | } |
| 19430 | } |
| 19431 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19432 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_6X4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19433 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 19434 | DWConv2DMicrokernelTester() |
| 19435 | .input_width(input_width) |
| 19436 | .input_height(6) |
| 19437 | .kernel_height(3) |
| 19438 | .kernel_width(3) |
| 19439 | .subsampling(1) |
| 19440 | .padding_left(1) |
| 19441 | .padding_right(1) |
| 19442 | .padding_top(1) |
| 19443 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19444 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19445 | } |
| 19446 | } |
| 19447 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19448 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_6X4, output_height_div_6) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19449 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 19450 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19451 | DWConv2DMicrokernelTester() |
| 19452 | .input_width(input_width) |
| 19453 | .input_height(input_height) |
| 19454 | .kernel_height(3) |
| 19455 | .kernel_width(3) |
| 19456 | .subsampling(1) |
| 19457 | .padding_left(1) |
| 19458 | .padding_right(1) |
| 19459 | .padding_top(1) |
| 19460 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19461 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19462 | } |
| 19463 | } |
| 19464 | } |
| 19465 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19466 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_6X4, output_height_lt_6) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19467 | for (size_t input_height = 1; input_height < 6; input_height++) { |
| 19468 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19469 | DWConv2DMicrokernelTester() |
| 19470 | .input_width(input_width) |
| 19471 | .input_height(input_height) |
| 19472 | .kernel_height(3) |
| 19473 | .kernel_width(3) |
| 19474 | .subsampling(1) |
| 19475 | .padding_left(1) |
| 19476 | .padding_right(1) |
| 19477 | .padding_top(1) |
| 19478 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19479 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19480 | } |
| 19481 | } |
| 19482 | } |
| 19483 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19484 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_6X4, output_height_gt_6) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19485 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 19486 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19487 | DWConv2DMicrokernelTester() |
| 19488 | .input_width(input_width) |
| 19489 | .input_height(input_height) |
| 19490 | .kernel_height(3) |
| 19491 | .kernel_width(3) |
| 19492 | .subsampling(1) |
| 19493 | .padding_left(1) |
| 19494 | .padding_right(1) |
| 19495 | .padding_top(1) |
| 19496 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19497 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19498 | } |
| 19499 | } |
| 19500 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19501 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19502 | |
| 19503 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19504 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19505 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19506 | DWConv2DMicrokernelTester() |
| 19507 | .input_width(4) |
| 19508 | .input_height(1) |
| 19509 | .kernel_height(3) |
| 19510 | .kernel_width(3) |
| 19511 | .subsampling(1) |
| 19512 | .padding_left(1) |
| 19513 | .padding_right(1) |
| 19514 | .padding_top(1) |
| 19515 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19516 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19517 | } |
| 19518 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19519 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19520 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 19521 | DWConv2DMicrokernelTester() |
| 19522 | .input_width(input_width) |
| 19523 | .input_height(1) |
| 19524 | .kernel_height(3) |
| 19525 | .kernel_width(3) |
| 19526 | .subsampling(1) |
| 19527 | .padding_left(1) |
| 19528 | .padding_right(1) |
| 19529 | .padding_top(1) |
| 19530 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19531 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19532 | } |
| 19533 | } |
| 19534 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19535 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19536 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 19537 | DWConv2DMicrokernelTester() |
| 19538 | .input_width(4) |
| 19539 | .input_height(1) |
| 19540 | .kernel_height(3) |
| 19541 | .kernel_width(3) |
| 19542 | .subsampling(1) |
| 19543 | .padding_left(1) |
| 19544 | .padding_right(1) |
| 19545 | .padding_top(1) |
| 19546 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19547 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19548 | } |
| 19549 | } |
| 19550 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19551 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19552 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 19553 | DWConv2DMicrokernelTester() |
| 19554 | .input_width(input_width) |
| 19555 | .input_height(1) |
| 19556 | .kernel_height(3) |
| 19557 | .kernel_width(3) |
| 19558 | .subsampling(1) |
| 19559 | .padding_left(1) |
| 19560 | .padding_right(1) |
| 19561 | .padding_top(1) |
| 19562 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19563 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19564 | } |
| 19565 | } |
| 19566 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19567 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_height_gt_1) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19568 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 19569 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19570 | DWConv2DMicrokernelTester() |
| 19571 | .input_width(input_width) |
| 19572 | .input_height(input_height) |
| 19573 | .kernel_height(3) |
| 19574 | .kernel_width(3) |
| 19575 | .subsampling(1) |
| 19576 | .padding_left(1) |
| 19577 | .padding_right(1) |
| 19578 | .padding_top(1) |
| 19579 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19580 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19581 | } |
| 19582 | } |
| 19583 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19584 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19585 | |
| 19586 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19587 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19588 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_eq_4) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 19589 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19590 | .input_width(4) |
| 19591 | .input_height(1) |
| Erich Elsen | 0cc2c53 | 2019-10-15 04:44:18 -0700 | [diff] [blame] | 19592 | .kernel_height(3) |
| 19593 | .kernel_width(3) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19594 | .subsampling(1) |
| 19595 | .padding_left(1) |
| 19596 | .padding_right(1) |
| 19597 | .padding_top(1) |
| 19598 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19599 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19600 | } |
| 19601 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19602 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_div_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19603 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 19604 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19605 | .input_width(input_width) |
| 19606 | .input_height(1) |
| 19607 | .kernel_height(3) |
| 19608 | .kernel_width(3) |
| 19609 | .subsampling(1) |
| 19610 | .padding_left(1) |
| 19611 | .padding_right(1) |
| 19612 | .padding_top(1) |
| 19613 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19614 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19615 | } |
| 19616 | } |
| 19617 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19618 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_lt_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19619 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 19620 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19621 | .input_width(4) |
| 19622 | .input_height(1) |
| 19623 | .kernel_height(3) |
| 19624 | .kernel_width(3) |
| 19625 | .subsampling(1) |
| 19626 | .padding_left(1) |
| 19627 | .padding_right(1) |
| 19628 | .padding_top(1) |
| 19629 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19630 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19631 | } |
| 19632 | } |
| 19633 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19634 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_gt_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19635 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 19636 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19637 | .input_width(input_width) |
| 19638 | .input_height(1) |
| 19639 | .kernel_height(3) |
| 19640 | .kernel_width(3) |
| 19641 | .subsampling(1) |
| 19642 | .padding_left(1) |
| 19643 | .padding_right(1) |
| 19644 | .padding_top(1) |
| 19645 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19646 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19647 | } |
| 19648 | } |
| 19649 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19650 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_height_gt_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19651 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 19652 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 19653 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19654 | .input_width(input_width) |
| 19655 | .input_height(input_height) |
| 19656 | .kernel_height(3) |
| 19657 | .kernel_width(3) |
| 19658 | .subsampling(1) |
| 19659 | .padding_left(1) |
| 19660 | .padding_right(1) |
| 19661 | .padding_top(1) |
| 19662 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19663 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19664 | } |
| 19665 | } |
| 19666 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19667 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 19668 | |
| 19669 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19670 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19671 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19672 | DWConv2DMicrokernelTester() |
| 19673 | .input_width(4) |
| 19674 | .input_height(1) |
| 19675 | .kernel_height(3) |
| 19676 | .kernel_width(3) |
| 19677 | .subsampling(1) |
| 19678 | .padding_left(1) |
| 19679 | .padding_right(1) |
| 19680 | .padding_top(1) |
| 19681 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19682 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19683 | } |
| 19684 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19685 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19686 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 19687 | DWConv2DMicrokernelTester() |
| 19688 | .input_width(input_width) |
| 19689 | .input_height(1) |
| 19690 | .kernel_height(3) |
| 19691 | .kernel_width(3) |
| 19692 | .subsampling(1) |
| 19693 | .padding_left(1) |
| 19694 | .padding_right(1) |
| 19695 | .padding_top(1) |
| 19696 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19697 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19698 | } |
| 19699 | } |
| 19700 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19701 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19702 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 19703 | DWConv2DMicrokernelTester() |
| 19704 | .input_width(4) |
| 19705 | .input_height(1) |
| 19706 | .kernel_height(3) |
| 19707 | .kernel_width(3) |
| 19708 | .subsampling(1) |
| 19709 | .padding_left(1) |
| 19710 | .padding_right(1) |
| 19711 | .padding_top(1) |
| 19712 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19713 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19714 | } |
| 19715 | } |
| 19716 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19717 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19718 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 19719 | DWConv2DMicrokernelTester() |
| 19720 | .input_width(input_width) |
| 19721 | .input_height(1) |
| 19722 | .kernel_height(3) |
| 19723 | .kernel_width(3) |
| 19724 | .subsampling(1) |
| 19725 | .padding_left(1) |
| 19726 | .padding_right(1) |
| 19727 | .padding_top(1) |
| 19728 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19729 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19730 | } |
| 19731 | } |
| 19732 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19733 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_height_gt_1) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19734 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 19735 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19736 | DWConv2DMicrokernelTester() |
| 19737 | .input_width(input_width) |
| 19738 | .input_height(input_height) |
| 19739 | .kernel_height(3) |
| 19740 | .kernel_width(3) |
| 19741 | .subsampling(1) |
| 19742 | .padding_left(1) |
| 19743 | .padding_right(1) |
| 19744 | .padding_top(1) |
| 19745 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19746 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19747 | } |
| 19748 | } |
| 19749 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19750 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19751 | |
| 19752 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19753 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19754 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19755 | DWConv2DMicrokernelTester() |
| 19756 | .input_width(4) |
| 19757 | .input_height(2) |
| 19758 | .kernel_height(3) |
| 19759 | .kernel_width(3) |
| 19760 | .subsampling(1) |
| 19761 | .padding_left(1) |
| 19762 | .padding_right(1) |
| 19763 | .padding_top(1) |
| 19764 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19765 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19766 | } |
| 19767 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19768 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19769 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 19770 | DWConv2DMicrokernelTester() |
| 19771 | .input_width(input_width) |
| 19772 | .input_height(2) |
| 19773 | .kernel_height(3) |
| 19774 | .kernel_width(3) |
| 19775 | .subsampling(1) |
| 19776 | .padding_left(1) |
| 19777 | .padding_right(1) |
| 19778 | .padding_top(1) |
| 19779 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19780 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19781 | } |
| 19782 | } |
| 19783 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19784 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19785 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 19786 | DWConv2DMicrokernelTester() |
| 19787 | .input_width(4) |
| 19788 | .input_height(2) |
| 19789 | .kernel_height(3) |
| 19790 | .kernel_width(3) |
| 19791 | .subsampling(1) |
| 19792 | .padding_left(1) |
| 19793 | .padding_right(1) |
| 19794 | .padding_top(1) |
| 19795 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19796 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19797 | } |
| 19798 | } |
| 19799 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19800 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19801 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 19802 | DWConv2DMicrokernelTester() |
| 19803 | .input_width(input_width) |
| 19804 | .input_height(2) |
| 19805 | .kernel_height(3) |
| 19806 | .kernel_width(3) |
| 19807 | .subsampling(1) |
| 19808 | .padding_left(1) |
| 19809 | .padding_right(1) |
| 19810 | .padding_top(1) |
| 19811 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19812 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19813 | } |
| 19814 | } |
| 19815 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19816 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_div_2) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19817 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 19818 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19819 | DWConv2DMicrokernelTester() |
| 19820 | .input_width(input_width) |
| 19821 | .input_height(input_height) |
| 19822 | .kernel_height(3) |
| 19823 | .kernel_width(3) |
| 19824 | .subsampling(1) |
| 19825 | .padding_left(1) |
| 19826 | .padding_right(1) |
| 19827 | .padding_top(1) |
| 19828 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19829 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19830 | } |
| 19831 | } |
| 19832 | } |
| 19833 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19834 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_lt_2) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19835 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 19836 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19837 | DWConv2DMicrokernelTester() |
| 19838 | .input_width(input_width) |
| 19839 | .input_height(input_height) |
| 19840 | .kernel_height(3) |
| 19841 | .kernel_width(3) |
| 19842 | .subsampling(1) |
| 19843 | .padding_left(1) |
| 19844 | .padding_right(1) |
| 19845 | .padding_top(1) |
| 19846 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19847 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19848 | } |
| 19849 | } |
| 19850 | } |
| 19851 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19852 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_gt_2) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19853 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 19854 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19855 | DWConv2DMicrokernelTester() |
| 19856 | .input_width(input_width) |
| 19857 | .input_height(input_height) |
| 19858 | .kernel_height(3) |
| 19859 | .kernel_width(3) |
| 19860 | .subsampling(1) |
| 19861 | .padding_left(1) |
| 19862 | .padding_right(1) |
| 19863 | .padding_top(1) |
| 19864 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19865 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19866 | } |
| 19867 | } |
| 19868 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19869 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19870 | |
| 19871 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19872 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19873 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19874 | DWConv2DMicrokernelTester() |
| 19875 | .input_width(4) |
| 19876 | .input_height(1) |
| 19877 | .kernel_height(3) |
| 19878 | .kernel_width(3) |
| 19879 | .subsampling(1) |
| 19880 | .padding_left(1) |
| 19881 | .padding_right(1) |
| 19882 | .padding_top(1) |
| 19883 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19884 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19885 | } |
| 19886 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19887 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19888 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 19889 | DWConv2DMicrokernelTester() |
| 19890 | .input_width(input_width) |
| 19891 | .input_height(1) |
| 19892 | .kernel_height(3) |
| 19893 | .kernel_width(3) |
| 19894 | .subsampling(1) |
| 19895 | .padding_left(1) |
| 19896 | .padding_right(1) |
| 19897 | .padding_top(1) |
| 19898 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19899 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19900 | } |
| 19901 | } |
| 19902 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19903 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19904 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 19905 | DWConv2DMicrokernelTester() |
| 19906 | .input_width(4) |
| 19907 | .input_height(1) |
| 19908 | .kernel_height(3) |
| 19909 | .kernel_width(3) |
| 19910 | .subsampling(1) |
| 19911 | .padding_left(1) |
| 19912 | .padding_right(1) |
| 19913 | .padding_top(1) |
| 19914 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19915 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19916 | } |
| 19917 | } |
| 19918 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19919 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19920 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 19921 | DWConv2DMicrokernelTester() |
| 19922 | .input_width(input_width) |
| 19923 | .input_height(1) |
| 19924 | .kernel_height(3) |
| 19925 | .kernel_width(3) |
| 19926 | .subsampling(1) |
| 19927 | .padding_left(1) |
| 19928 | .padding_right(1) |
| 19929 | .padding_top(1) |
| 19930 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19931 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19932 | } |
| 19933 | } |
| 19934 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19935 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4, output_height_gt_1) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19936 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 19937 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 19938 | DWConv2DMicrokernelTester() |
| 19939 | .input_width(input_width) |
| 19940 | .input_height(input_height) |
| 19941 | .kernel_height(3) |
| 19942 | .kernel_width(3) |
| 19943 | .subsampling(1) |
| 19944 | .padding_left(1) |
| 19945 | .padding_right(1) |
| 19946 | .padding_top(1) |
| 19947 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19948 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19949 | } |
| 19950 | } |
| 19951 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19952 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19953 | |
| 19954 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 19955 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19956 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19957 | DWConv2DMicrokernelTester() |
| 19958 | .input_width(4) |
| 19959 | .input_height(2) |
| 19960 | .kernel_height(3) |
| 19961 | .kernel_width(3) |
| 19962 | .subsampling(1) |
| 19963 | .padding_left(1) |
| 19964 | .padding_right(1) |
| 19965 | .padding_top(1) |
| 19966 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19967 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19968 | } |
| 19969 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19970 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19971 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 19972 | DWConv2DMicrokernelTester() |
| 19973 | .input_width(input_width) |
| 19974 | .input_height(2) |
| 19975 | .kernel_height(3) |
| 19976 | .kernel_width(3) |
| 19977 | .subsampling(1) |
| 19978 | .padding_left(1) |
| 19979 | .padding_right(1) |
| 19980 | .padding_top(1) |
| 19981 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19982 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19983 | } |
| 19984 | } |
| 19985 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19986 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19987 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 19988 | DWConv2DMicrokernelTester() |
| 19989 | .input_width(4) |
| 19990 | .input_height(2) |
| 19991 | .kernel_height(3) |
| 19992 | .kernel_width(3) |
| 19993 | .subsampling(1) |
| 19994 | .padding_left(1) |
| 19995 | .padding_right(1) |
| 19996 | .padding_top(1) |
| 19997 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 19998 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 19999 | } |
| 20000 | } |
| 20001 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20002 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20003 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 20004 | DWConv2DMicrokernelTester() |
| 20005 | .input_width(input_width) |
| 20006 | .input_height(2) |
| 20007 | .kernel_height(3) |
| 20008 | .kernel_width(3) |
| 20009 | .subsampling(1) |
| 20010 | .padding_left(1) |
| 20011 | .padding_right(1) |
| 20012 | .padding_top(1) |
| 20013 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20014 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20015 | } |
| 20016 | } |
| 20017 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20018 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4, output_height_div_2) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20019 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 20020 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20021 | DWConv2DMicrokernelTester() |
| 20022 | .input_width(input_width) |
| 20023 | .input_height(input_height) |
| 20024 | .kernel_height(3) |
| 20025 | .kernel_width(3) |
| 20026 | .subsampling(1) |
| 20027 | .padding_left(1) |
| 20028 | .padding_right(1) |
| 20029 | .padding_top(1) |
| 20030 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20031 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20032 | } |
| 20033 | } |
| 20034 | } |
| 20035 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20036 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4, output_height_lt_2) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20037 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 20038 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20039 | DWConv2DMicrokernelTester() |
| 20040 | .input_width(input_width) |
| 20041 | .input_height(input_height) |
| 20042 | .kernel_height(3) |
| 20043 | .kernel_width(3) |
| 20044 | .subsampling(1) |
| 20045 | .padding_left(1) |
| 20046 | .padding_right(1) |
| 20047 | .padding_top(1) |
| 20048 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20049 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20050 | } |
| 20051 | } |
| 20052 | } |
| 20053 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20054 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4, output_height_gt_2) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20055 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 20056 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20057 | DWConv2DMicrokernelTester() |
| 20058 | .input_width(input_width) |
| 20059 | .input_height(input_height) |
| 20060 | .kernel_height(3) |
| 20061 | .kernel_width(3) |
| 20062 | .subsampling(1) |
| 20063 | .padding_left(1) |
| 20064 | .padding_right(1) |
| 20065 | .padding_top(1) |
| 20066 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20067 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20068 | } |
| 20069 | } |
| 20070 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20071 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20072 | |
| 20073 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20074 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20075 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_3X4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20076 | DWConv2DMicrokernelTester() |
| 20077 | .input_width(4) |
| 20078 | .input_height(3) |
| 20079 | .kernel_height(3) |
| 20080 | .kernel_width(3) |
| 20081 | .subsampling(1) |
| 20082 | .padding_left(1) |
| 20083 | .padding_right(1) |
| 20084 | .padding_top(1) |
| 20085 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20086 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20087 | } |
| 20088 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20089 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_3X4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20090 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 20091 | DWConv2DMicrokernelTester() |
| 20092 | .input_width(input_width) |
| 20093 | .input_height(3) |
| 20094 | .kernel_height(3) |
| 20095 | .kernel_width(3) |
| 20096 | .subsampling(1) |
| 20097 | .padding_left(1) |
| 20098 | .padding_right(1) |
| 20099 | .padding_top(1) |
| 20100 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20101 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20102 | } |
| 20103 | } |
| 20104 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20105 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_3X4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20106 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 20107 | DWConv2DMicrokernelTester() |
| 20108 | .input_width(4) |
| 20109 | .input_height(3) |
| 20110 | .kernel_height(3) |
| 20111 | .kernel_width(3) |
| 20112 | .subsampling(1) |
| 20113 | .padding_left(1) |
| 20114 | .padding_right(1) |
| 20115 | .padding_top(1) |
| 20116 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20117 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20118 | } |
| 20119 | } |
| 20120 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20121 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_3X4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20122 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 20123 | DWConv2DMicrokernelTester() |
| 20124 | .input_width(input_width) |
| 20125 | .input_height(3) |
| 20126 | .kernel_height(3) |
| 20127 | .kernel_width(3) |
| 20128 | .subsampling(1) |
| 20129 | .padding_left(1) |
| 20130 | .padding_right(1) |
| 20131 | .padding_top(1) |
| 20132 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20133 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20134 | } |
| 20135 | } |
| 20136 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20137 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_3X4, output_height_div_3) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20138 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 20139 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20140 | DWConv2DMicrokernelTester() |
| 20141 | .input_width(input_width) |
| 20142 | .input_height(input_height) |
| 20143 | .kernel_height(3) |
| 20144 | .kernel_width(3) |
| 20145 | .subsampling(1) |
| 20146 | .padding_left(1) |
| 20147 | .padding_right(1) |
| 20148 | .padding_top(1) |
| 20149 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20150 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20151 | } |
| 20152 | } |
| 20153 | } |
| 20154 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20155 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_3X4, output_height_lt_3) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20156 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 20157 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20158 | DWConv2DMicrokernelTester() |
| 20159 | .input_width(input_width) |
| 20160 | .input_height(input_height) |
| 20161 | .kernel_height(3) |
| 20162 | .kernel_width(3) |
| 20163 | .subsampling(1) |
| 20164 | .padding_left(1) |
| 20165 | .padding_right(1) |
| 20166 | .padding_top(1) |
| 20167 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20168 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20169 | } |
| 20170 | } |
| 20171 | } |
| 20172 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20173 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_3X4, output_height_gt_3) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20174 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 20175 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20176 | DWConv2DMicrokernelTester() |
| 20177 | .input_width(input_width) |
| 20178 | .input_height(input_height) |
| 20179 | .kernel_height(3) |
| 20180 | .kernel_width(3) |
| 20181 | .subsampling(1) |
| 20182 | .padding_left(1) |
| 20183 | .padding_right(1) |
| 20184 | .padding_top(1) |
| 20185 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20186 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_3x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20187 | } |
| 20188 | } |
| 20189 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20190 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20191 | |
| 20192 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20193 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20194 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_4X4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20195 | DWConv2DMicrokernelTester() |
| 20196 | .input_width(4) |
| 20197 | .input_height(4) |
| 20198 | .kernel_height(3) |
| 20199 | .kernel_width(3) |
| 20200 | .subsampling(1) |
| 20201 | .padding_left(1) |
| 20202 | .padding_right(1) |
| 20203 | .padding_top(1) |
| 20204 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20205 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20206 | } |
| 20207 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20208 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_4X4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20209 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 20210 | DWConv2DMicrokernelTester() |
| 20211 | .input_width(input_width) |
| 20212 | .input_height(4) |
| 20213 | .kernel_height(3) |
| 20214 | .kernel_width(3) |
| 20215 | .subsampling(1) |
| 20216 | .padding_left(1) |
| 20217 | .padding_right(1) |
| 20218 | .padding_top(1) |
| 20219 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20220 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20221 | } |
| 20222 | } |
| 20223 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20224 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_4X4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20225 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 20226 | DWConv2DMicrokernelTester() |
| 20227 | .input_width(4) |
| 20228 | .input_height(4) |
| 20229 | .kernel_height(3) |
| 20230 | .kernel_width(3) |
| 20231 | .subsampling(1) |
| 20232 | .padding_left(1) |
| 20233 | .padding_right(1) |
| 20234 | .padding_top(1) |
| 20235 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20236 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20237 | } |
| 20238 | } |
| 20239 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20240 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_4X4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20241 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 20242 | DWConv2DMicrokernelTester() |
| 20243 | .input_width(input_width) |
| 20244 | .input_height(4) |
| 20245 | .kernel_height(3) |
| 20246 | .kernel_width(3) |
| 20247 | .subsampling(1) |
| 20248 | .padding_left(1) |
| 20249 | .padding_right(1) |
| 20250 | .padding_top(1) |
| 20251 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20252 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20253 | } |
| 20254 | } |
| 20255 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20256 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_4X4, output_height_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20257 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 20258 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20259 | DWConv2DMicrokernelTester() |
| 20260 | .input_width(input_width) |
| 20261 | .input_height(input_height) |
| 20262 | .kernel_height(3) |
| 20263 | .kernel_width(3) |
| 20264 | .subsampling(1) |
| 20265 | .padding_left(1) |
| 20266 | .padding_right(1) |
| 20267 | .padding_top(1) |
| 20268 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20269 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20270 | } |
| 20271 | } |
| 20272 | } |
| 20273 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20274 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_4X4, output_height_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20275 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 20276 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20277 | DWConv2DMicrokernelTester() |
| 20278 | .input_width(input_width) |
| 20279 | .input_height(input_height) |
| 20280 | .kernel_height(3) |
| 20281 | .kernel_width(3) |
| 20282 | .subsampling(1) |
| 20283 | .padding_left(1) |
| 20284 | .padding_right(1) |
| 20285 | .padding_top(1) |
| 20286 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20287 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20288 | } |
| 20289 | } |
| 20290 | } |
| 20291 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20292 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_4X4, output_height_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20293 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 20294 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20295 | DWConv2DMicrokernelTester() |
| 20296 | .input_width(input_width) |
| 20297 | .input_height(input_height) |
| 20298 | .kernel_height(3) |
| 20299 | .kernel_width(3) |
| 20300 | .subsampling(1) |
| 20301 | .padding_left(1) |
| 20302 | .padding_right(1) |
| 20303 | .padding_top(1) |
| 20304 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20305 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_4x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20306 | } |
| 20307 | } |
| 20308 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20309 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20310 | |
| 20311 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20312 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20313 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_5X4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20314 | DWConv2DMicrokernelTester() |
| 20315 | .input_width(4) |
| 20316 | .input_height(5) |
| 20317 | .kernel_height(3) |
| 20318 | .kernel_width(3) |
| 20319 | .subsampling(1) |
| 20320 | .padding_left(1) |
| 20321 | .padding_right(1) |
| 20322 | .padding_top(1) |
| 20323 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20324 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20325 | } |
| 20326 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20327 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_5X4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20328 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 20329 | DWConv2DMicrokernelTester() |
| 20330 | .input_width(input_width) |
| 20331 | .input_height(5) |
| 20332 | .kernel_height(3) |
| 20333 | .kernel_width(3) |
| 20334 | .subsampling(1) |
| 20335 | .padding_left(1) |
| 20336 | .padding_right(1) |
| 20337 | .padding_top(1) |
| 20338 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20339 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20340 | } |
| 20341 | } |
| 20342 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20343 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_5X4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20344 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 20345 | DWConv2DMicrokernelTester() |
| 20346 | .input_width(4) |
| 20347 | .input_height(5) |
| 20348 | .kernel_height(3) |
| 20349 | .kernel_width(3) |
| 20350 | .subsampling(1) |
| 20351 | .padding_left(1) |
| 20352 | .padding_right(1) |
| 20353 | .padding_top(1) |
| 20354 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20355 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20356 | } |
| 20357 | } |
| 20358 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20359 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_5X4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20360 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 20361 | DWConv2DMicrokernelTester() |
| 20362 | .input_width(input_width) |
| 20363 | .input_height(5) |
| 20364 | .kernel_height(3) |
| 20365 | .kernel_width(3) |
| 20366 | .subsampling(1) |
| 20367 | .padding_left(1) |
| 20368 | .padding_right(1) |
| 20369 | .padding_top(1) |
| 20370 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20371 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20372 | } |
| 20373 | } |
| 20374 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20375 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_5X4, output_height_div_5) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20376 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 20377 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20378 | DWConv2DMicrokernelTester() |
| 20379 | .input_width(input_width) |
| 20380 | .input_height(input_height) |
| 20381 | .kernel_height(3) |
| 20382 | .kernel_width(3) |
| 20383 | .subsampling(1) |
| 20384 | .padding_left(1) |
| 20385 | .padding_right(1) |
| 20386 | .padding_top(1) |
| 20387 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20388 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20389 | } |
| 20390 | } |
| 20391 | } |
| 20392 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20393 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_5X4, output_height_lt_5) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20394 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 20395 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20396 | DWConv2DMicrokernelTester() |
| 20397 | .input_width(input_width) |
| 20398 | .input_height(input_height) |
| 20399 | .kernel_height(3) |
| 20400 | .kernel_width(3) |
| 20401 | .subsampling(1) |
| 20402 | .padding_left(1) |
| 20403 | .padding_right(1) |
| 20404 | .padding_top(1) |
| 20405 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20406 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20407 | } |
| 20408 | } |
| 20409 | } |
| 20410 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20411 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_5X4, output_height_gt_5) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20412 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 20413 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20414 | DWConv2DMicrokernelTester() |
| 20415 | .input_width(input_width) |
| 20416 | .input_height(input_height) |
| 20417 | .kernel_height(3) |
| 20418 | .kernel_width(3) |
| 20419 | .subsampling(1) |
| 20420 | .padding_left(1) |
| 20421 | .padding_right(1) |
| 20422 | .padding_top(1) |
| 20423 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20424 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_5x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20425 | } |
| 20426 | } |
| 20427 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20428 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20429 | |
| 20430 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20431 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20432 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_6X4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20433 | DWConv2DMicrokernelTester() |
| 20434 | .input_width(4) |
| 20435 | .input_height(6) |
| 20436 | .kernel_height(3) |
| 20437 | .kernel_width(3) |
| 20438 | .subsampling(1) |
| 20439 | .padding_left(1) |
| 20440 | .padding_right(1) |
| 20441 | .padding_top(1) |
| 20442 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20443 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20444 | } |
| 20445 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20446 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_6X4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20447 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 20448 | DWConv2DMicrokernelTester() |
| 20449 | .input_width(input_width) |
| 20450 | .input_height(6) |
| 20451 | .kernel_height(3) |
| 20452 | .kernel_width(3) |
| 20453 | .subsampling(1) |
| 20454 | .padding_left(1) |
| 20455 | .padding_right(1) |
| 20456 | .padding_top(1) |
| 20457 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20458 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20459 | } |
| 20460 | } |
| 20461 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20462 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_6X4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20463 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 20464 | DWConv2DMicrokernelTester() |
| 20465 | .input_width(4) |
| 20466 | .input_height(6) |
| 20467 | .kernel_height(3) |
| 20468 | .kernel_width(3) |
| 20469 | .subsampling(1) |
| 20470 | .padding_left(1) |
| 20471 | .padding_right(1) |
| 20472 | .padding_top(1) |
| 20473 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20474 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20475 | } |
| 20476 | } |
| 20477 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20478 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_6X4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20479 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 20480 | DWConv2DMicrokernelTester() |
| 20481 | .input_width(input_width) |
| 20482 | .input_height(6) |
| 20483 | .kernel_height(3) |
| 20484 | .kernel_width(3) |
| 20485 | .subsampling(1) |
| 20486 | .padding_left(1) |
| 20487 | .padding_right(1) |
| 20488 | .padding_top(1) |
| 20489 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20490 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20491 | } |
| 20492 | } |
| 20493 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20494 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_6X4, output_height_div_6) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20495 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 20496 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20497 | DWConv2DMicrokernelTester() |
| 20498 | .input_width(input_width) |
| 20499 | .input_height(input_height) |
| 20500 | .kernel_height(3) |
| 20501 | .kernel_width(3) |
| 20502 | .subsampling(1) |
| 20503 | .padding_left(1) |
| 20504 | .padding_right(1) |
| 20505 | .padding_top(1) |
| 20506 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20507 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20508 | } |
| 20509 | } |
| 20510 | } |
| 20511 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20512 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_6X4, output_height_lt_6) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20513 | for (size_t input_height = 1; input_height < 6; input_height++) { |
| 20514 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20515 | DWConv2DMicrokernelTester() |
| 20516 | .input_width(input_width) |
| 20517 | .input_height(input_height) |
| 20518 | .kernel_height(3) |
| 20519 | .kernel_width(3) |
| 20520 | .subsampling(1) |
| 20521 | .padding_left(1) |
| 20522 | .padding_right(1) |
| 20523 | .padding_top(1) |
| 20524 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20525 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20526 | } |
| 20527 | } |
| 20528 | } |
| 20529 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20530 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_6X4, output_height_gt_6) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20531 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 20532 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20533 | DWConv2DMicrokernelTester() |
| 20534 | .input_width(input_width) |
| 20535 | .input_height(input_height) |
| 20536 | .kernel_height(3) |
| 20537 | .kernel_width(3) |
| 20538 | .subsampling(1) |
| 20539 | .padding_left(1) |
| 20540 | .padding_right(1) |
| 20541 | .padding_top(1) |
| 20542 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20543 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_6x4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20544 | } |
| 20545 | } |
| 20546 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20547 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20548 | |
| 20549 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20550 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20551 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20552 | DWConv2DMicrokernelTester() |
| 20553 | .input_width(4) |
| 20554 | .input_height(1) |
| 20555 | .kernel_height(3) |
| 20556 | .kernel_width(3) |
| 20557 | .subsampling(1) |
| 20558 | .padding_left(1) |
| 20559 | .padding_right(1) |
| 20560 | .padding_top(1) |
| 20561 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20562 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20563 | } |
| 20564 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20565 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20566 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 20567 | DWConv2DMicrokernelTester() |
| 20568 | .input_width(input_width) |
| 20569 | .input_height(1) |
| 20570 | .kernel_height(3) |
| 20571 | .kernel_width(3) |
| 20572 | .subsampling(1) |
| 20573 | .padding_left(1) |
| 20574 | .padding_right(1) |
| 20575 | .padding_top(1) |
| 20576 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20577 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20578 | } |
| 20579 | } |
| 20580 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20581 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20582 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 20583 | DWConv2DMicrokernelTester() |
| 20584 | .input_width(4) |
| 20585 | .input_height(1) |
| 20586 | .kernel_height(3) |
| 20587 | .kernel_width(3) |
| 20588 | .subsampling(1) |
| 20589 | .padding_left(1) |
| 20590 | .padding_right(1) |
| 20591 | .padding_top(1) |
| 20592 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20593 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20594 | } |
| 20595 | } |
| 20596 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20597 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20598 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 20599 | DWConv2DMicrokernelTester() |
| 20600 | .input_width(input_width) |
| 20601 | .input_height(1) |
| 20602 | .kernel_height(3) |
| 20603 | .kernel_width(3) |
| 20604 | .subsampling(1) |
| 20605 | .padding_left(1) |
| 20606 | .padding_right(1) |
| 20607 | .padding_top(1) |
| 20608 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20609 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20610 | } |
| 20611 | } |
| 20612 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20613 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_height_gt_1) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20614 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 20615 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20616 | DWConv2DMicrokernelTester() |
| 20617 | .input_width(input_width) |
| 20618 | .input_height(input_height) |
| 20619 | .kernel_height(3) |
| 20620 | .kernel_width(3) |
| 20621 | .subsampling(1) |
| 20622 | .padding_left(1) |
| 20623 | .padding_right(1) |
| 20624 | .padding_top(1) |
| 20625 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20626 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20627 | } |
| 20628 | } |
| 20629 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20630 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20631 | |
| 20632 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20633 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20634 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20635 | DWConv2DMicrokernelTester() |
| 20636 | .input_width(4) |
| 20637 | .input_height(1) |
| 20638 | .kernel_height(3) |
| 20639 | .kernel_width(3) |
| 20640 | .subsampling(1) |
| 20641 | .padding_left(1) |
| 20642 | .padding_right(1) |
| 20643 | .padding_top(1) |
| 20644 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20645 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc3); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20646 | } |
| 20647 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20648 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20649 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 20650 | DWConv2DMicrokernelTester() |
| 20651 | .input_width(input_width) |
| 20652 | .input_height(1) |
| 20653 | .kernel_height(3) |
| 20654 | .kernel_width(3) |
| 20655 | .subsampling(1) |
| 20656 | .padding_left(1) |
| 20657 | .padding_right(1) |
| 20658 | .padding_top(1) |
| 20659 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20660 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc3); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20661 | } |
| 20662 | } |
| 20663 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20664 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20665 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 20666 | DWConv2DMicrokernelTester() |
| 20667 | .input_width(4) |
| 20668 | .input_height(1) |
| 20669 | .kernel_height(3) |
| 20670 | .kernel_width(3) |
| 20671 | .subsampling(1) |
| 20672 | .padding_left(1) |
| 20673 | .padding_right(1) |
| 20674 | .padding_top(1) |
| 20675 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20676 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc3); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20677 | } |
| 20678 | } |
| 20679 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20680 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20681 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 20682 | DWConv2DMicrokernelTester() |
| 20683 | .input_width(input_width) |
| 20684 | .input_height(1) |
| 20685 | .kernel_height(3) |
| 20686 | .kernel_width(3) |
| 20687 | .subsampling(1) |
| 20688 | .padding_left(1) |
| 20689 | .padding_right(1) |
| 20690 | .padding_top(1) |
| 20691 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20692 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc3); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20693 | } |
| 20694 | } |
| 20695 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20696 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_height_gt_1) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20697 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 20698 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20699 | DWConv2DMicrokernelTester() |
| 20700 | .input_width(input_width) |
| 20701 | .input_height(input_height) |
| 20702 | .kernel_height(3) |
| 20703 | .kernel_width(3) |
| 20704 | .subsampling(1) |
| 20705 | .padding_left(1) |
| 20706 | .padding_right(1) |
| 20707 | .padding_top(1) |
| 20708 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20709 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc3); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20710 | } |
| 20711 | } |
| 20712 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20713 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20714 | |
| 20715 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20716 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20717 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20718 | DWConv2DMicrokernelTester() |
| 20719 | .input_width(4) |
| 20720 | .input_height(1) |
| 20721 | .kernel_height(3) |
| 20722 | .kernel_width(3) |
| 20723 | .subsampling(1) |
| 20724 | .padding_left(1) |
| 20725 | .padding_right(1) |
| 20726 | .padding_top(1) |
| 20727 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20728 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20729 | } |
| 20730 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20731 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20732 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 20733 | DWConv2DMicrokernelTester() |
| 20734 | .input_width(input_width) |
| 20735 | .input_height(1) |
| 20736 | .kernel_height(3) |
| 20737 | .kernel_width(3) |
| 20738 | .subsampling(1) |
| 20739 | .padding_left(1) |
| 20740 | .padding_right(1) |
| 20741 | .padding_top(1) |
| 20742 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20743 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20744 | } |
| 20745 | } |
| 20746 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20747 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20748 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 20749 | DWConv2DMicrokernelTester() |
| 20750 | .input_width(4) |
| 20751 | .input_height(1) |
| 20752 | .kernel_height(3) |
| 20753 | .kernel_width(3) |
| 20754 | .subsampling(1) |
| 20755 | .padding_left(1) |
| 20756 | .padding_right(1) |
| 20757 | .padding_top(1) |
| 20758 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20759 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20760 | } |
| 20761 | } |
| 20762 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20763 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20764 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 20765 | DWConv2DMicrokernelTester() |
| 20766 | .input_width(input_width) |
| 20767 | .input_height(1) |
| 20768 | .kernel_height(3) |
| 20769 | .kernel_width(3) |
| 20770 | .subsampling(1) |
| 20771 | .padding_left(1) |
| 20772 | .padding_right(1) |
| 20773 | .padding_top(1) |
| 20774 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20775 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20776 | } |
| 20777 | } |
| 20778 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20779 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_height_gt_1) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20780 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 20781 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20782 | DWConv2DMicrokernelTester() |
| 20783 | .input_width(input_width) |
| 20784 | .input_height(input_height) |
| 20785 | .kernel_height(3) |
| 20786 | .kernel_width(3) |
| 20787 | .subsampling(1) |
| 20788 | .padding_left(1) |
| 20789 | .padding_right(1) |
| 20790 | .padding_top(1) |
| 20791 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20792 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc4); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20793 | } |
| 20794 | } |
| 20795 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20796 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20797 | |
| 20798 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20799 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20800 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_eq_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20801 | DWConv2DMicrokernelTester() |
| 20802 | .input_width(4) |
| 20803 | .input_height(2) |
| 20804 | .kernel_height(3) |
| 20805 | .kernel_width(3) |
| 20806 | .subsampling(1) |
| 20807 | .padding_left(1) |
| 20808 | .padding_right(1) |
| 20809 | .padding_top(1) |
| 20810 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20811 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20812 | } |
| 20813 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20814 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_div_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20815 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 20816 | DWConv2DMicrokernelTester() |
| 20817 | .input_width(input_width) |
| 20818 | .input_height(2) |
| 20819 | .kernel_height(3) |
| 20820 | .kernel_width(3) |
| 20821 | .subsampling(1) |
| 20822 | .padding_left(1) |
| 20823 | .padding_right(1) |
| 20824 | .padding_top(1) |
| 20825 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20826 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20827 | } |
| 20828 | } |
| 20829 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20830 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_lt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20831 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 20832 | DWConv2DMicrokernelTester() |
| 20833 | .input_width(4) |
| 20834 | .input_height(2) |
| 20835 | .kernel_height(3) |
| 20836 | .kernel_width(3) |
| 20837 | .subsampling(1) |
| 20838 | .padding_left(1) |
| 20839 | .padding_right(1) |
| 20840 | .padding_top(1) |
| 20841 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20842 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20843 | } |
| 20844 | } |
| 20845 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20846 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_gt_4) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20847 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 20848 | DWConv2DMicrokernelTester() |
| 20849 | .input_width(input_width) |
| 20850 | .input_height(2) |
| 20851 | .kernel_height(3) |
| 20852 | .kernel_width(3) |
| 20853 | .subsampling(1) |
| 20854 | .padding_left(1) |
| 20855 | .padding_right(1) |
| 20856 | .padding_top(1) |
| 20857 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20858 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20859 | } |
| 20860 | } |
| 20861 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20862 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_div_2) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20863 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 20864 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20865 | DWConv2DMicrokernelTester() |
| 20866 | .input_width(input_width) |
| 20867 | .input_height(input_height) |
| 20868 | .kernel_height(3) |
| 20869 | .kernel_width(3) |
| 20870 | .subsampling(1) |
| 20871 | .padding_left(1) |
| 20872 | .padding_right(1) |
| 20873 | .padding_top(1) |
| 20874 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20875 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20876 | } |
| 20877 | } |
| 20878 | } |
| 20879 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20880 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_lt_2) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20881 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 20882 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20883 | DWConv2DMicrokernelTester() |
| 20884 | .input_width(input_width) |
| 20885 | .input_height(input_height) |
| 20886 | .kernel_height(3) |
| 20887 | .kernel_width(3) |
| 20888 | .subsampling(1) |
| 20889 | .padding_left(1) |
| 20890 | .padding_right(1) |
| 20891 | .padding_top(1) |
| 20892 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20893 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20894 | } |
| 20895 | } |
| 20896 | } |
| 20897 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20898 | TEST(F32_DWCONV2D_CHW_3X3P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_gt_2) { |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20899 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 20900 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 20901 | DWConv2DMicrokernelTester() |
| 20902 | .input_width(input_width) |
| 20903 | .input_height(input_height) |
| 20904 | .kernel_height(3) |
| 20905 | .kernel_width(3) |
| 20906 | .subsampling(1) |
| 20907 | .padding_left(1) |
| 20908 | .padding_right(1) |
| 20909 | .padding_top(1) |
| 20910 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 20911 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20912 | } |
| 20913 | } |
| 20914 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20915 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 3b80045 | 2020-11-22 12:12:35 -0800 | [diff] [blame] | 20916 | |
| 20917 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 20918 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 20919 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_eq_4) { |
| 20920 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 20921 | DWConv2DMicrokernelTester() |
| 20922 | .input_width(input_width) |
| 20923 | .input_height(2) |
| 20924 | .kernel_height(3) |
| 20925 | .kernel_width(3) |
| 20926 | .subsampling(2) |
| 20927 | .padding_left(1) |
| 20928 | .padding_right(1) |
| 20929 | .padding_top(1) |
| 20930 | .padding_bottom(1) |
| 20931 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4); |
| 20932 | } |
| 20933 | } |
| 20934 | |
| 20935 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_div_4) { |
| 20936 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 20937 | DWConv2DMicrokernelTester() |
| 20938 | .input_width(input_width) |
| 20939 | .input_height(2) |
| 20940 | .kernel_height(3) |
| 20941 | .kernel_width(3) |
| 20942 | .subsampling(2) |
| 20943 | .padding_left(1) |
| 20944 | .padding_right(1) |
| 20945 | .padding_top(1) |
| 20946 | .padding_bottom(1) |
| 20947 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4); |
| 20948 | } |
| 20949 | } |
| 20950 | |
| 20951 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_lt_4) { |
| 20952 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 20953 | DWConv2DMicrokernelTester() |
| 20954 | .input_width(8) |
| 20955 | .input_height(2) |
| 20956 | .kernel_height(3) |
| 20957 | .kernel_width(3) |
| 20958 | .subsampling(2) |
| 20959 | .padding_left(1) |
| 20960 | .padding_right(1) |
| 20961 | .padding_top(1) |
| 20962 | .padding_bottom(1) |
| 20963 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4); |
| 20964 | } |
| 20965 | } |
| 20966 | |
| 20967 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_gt_4) { |
| 20968 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 20969 | DWConv2DMicrokernelTester() |
| 20970 | .input_width(input_width) |
| 20971 | .input_height(2) |
| 20972 | .kernel_height(3) |
| 20973 | .kernel_width(3) |
| 20974 | .subsampling(2) |
| 20975 | .padding_left(1) |
| 20976 | .padding_right(1) |
| 20977 | .padding_top(1) |
| 20978 | .padding_bottom(1) |
| 20979 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4); |
| 20980 | } |
| 20981 | } |
| 20982 | |
| 20983 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4, output_height_eq_1) { |
| 20984 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 20985 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 20986 | DWConv2DMicrokernelTester() |
| 20987 | .input_width(input_width) |
| 20988 | .input_height(input_height) |
| 20989 | .kernel_height(3) |
| 20990 | .kernel_width(3) |
| 20991 | .subsampling(2) |
| 20992 | .padding_left(1) |
| 20993 | .padding_right(1) |
| 20994 | .padding_top(1) |
| 20995 | .padding_bottom(1) |
| 20996 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4); |
| 20997 | } |
| 20998 | } |
| 20999 | } |
| 21000 | |
| 21001 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4, output_height_gt_1) { |
| 21002 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 21003 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21004 | DWConv2DMicrokernelTester() |
| 21005 | .input_width(input_width) |
| 21006 | .input_height(input_height) |
| 21007 | .kernel_height(3) |
| 21008 | .kernel_width(3) |
| 21009 | .subsampling(2) |
| 21010 | .padding_left(1) |
| 21011 | .padding_right(1) |
| 21012 | .padding_top(1) |
| 21013 | .padding_bottom(1) |
| 21014 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4); |
| 21015 | } |
| 21016 | } |
| 21017 | } |
| 21018 | |
| 21019 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4, padding_top_eq_1) { |
| 21020 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 21021 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21022 | DWConv2DMicrokernelTester() |
| 21023 | .input_width(input_width) |
| 21024 | .input_height(input_height) |
| 21025 | .kernel_height(3) |
| 21026 | .kernel_width(3) |
| 21027 | .subsampling(2) |
| 21028 | .padding_left(1) |
| 21029 | .padding_right(1) |
| 21030 | .padding_top(0) |
| 21031 | .padding_bottom(1) |
| 21032 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4); |
| 21033 | } |
| 21034 | } |
| 21035 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21036 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21037 | |
| 21038 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21039 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21040 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_eq_4) { |
| 21041 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 21042 | DWConv2DMicrokernelTester() |
| 21043 | .input_width(input_width) |
| 21044 | .input_height(4) |
| 21045 | .kernel_height(3) |
| 21046 | .kernel_width(3) |
| 21047 | .subsampling(2) |
| 21048 | .padding_left(1) |
| 21049 | .padding_right(1) |
| 21050 | .padding_top(1) |
| 21051 | .padding_bottom(1) |
| 21052 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4); |
| 21053 | } |
| 21054 | } |
| 21055 | |
| 21056 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_div_4) { |
| 21057 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 21058 | DWConv2DMicrokernelTester() |
| 21059 | .input_width(input_width) |
| 21060 | .input_height(4) |
| 21061 | .kernel_height(3) |
| 21062 | .kernel_width(3) |
| 21063 | .subsampling(2) |
| 21064 | .padding_left(1) |
| 21065 | .padding_right(1) |
| 21066 | .padding_top(1) |
| 21067 | .padding_bottom(1) |
| 21068 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4); |
| 21069 | } |
| 21070 | } |
| 21071 | |
| 21072 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_lt_4) { |
| 21073 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 21074 | DWConv2DMicrokernelTester() |
| 21075 | .input_width(8) |
| 21076 | .input_height(4) |
| 21077 | .kernel_height(3) |
| 21078 | .kernel_width(3) |
| 21079 | .subsampling(2) |
| 21080 | .padding_left(1) |
| 21081 | .padding_right(1) |
| 21082 | .padding_top(1) |
| 21083 | .padding_bottom(1) |
| 21084 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4); |
| 21085 | } |
| 21086 | } |
| 21087 | |
| 21088 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_gt_4) { |
| 21089 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 21090 | DWConv2DMicrokernelTester() |
| 21091 | .input_width(input_width) |
| 21092 | .input_height(4) |
| 21093 | .kernel_height(3) |
| 21094 | .kernel_width(3) |
| 21095 | .subsampling(2) |
| 21096 | .padding_left(1) |
| 21097 | .padding_right(1) |
| 21098 | .padding_top(1) |
| 21099 | .padding_bottom(1) |
| 21100 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4); |
| 21101 | } |
| 21102 | } |
| 21103 | |
| 21104 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_eq_2) { |
| 21105 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 21106 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21107 | DWConv2DMicrokernelTester() |
| 21108 | .input_width(input_width) |
| 21109 | .input_height(input_height) |
| 21110 | .kernel_height(3) |
| 21111 | .kernel_width(3) |
| 21112 | .subsampling(2) |
| 21113 | .padding_left(1) |
| 21114 | .padding_right(1) |
| 21115 | .padding_top(1) |
| 21116 | .padding_bottom(1) |
| 21117 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4); |
| 21118 | } |
| 21119 | } |
| 21120 | } |
| 21121 | |
| 21122 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_div_2) { |
| 21123 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 21124 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21125 | DWConv2DMicrokernelTester() |
| 21126 | .input_width(input_width) |
| 21127 | .input_height(input_height) |
| 21128 | .kernel_height(3) |
| 21129 | .kernel_width(3) |
| 21130 | .subsampling(2) |
| 21131 | .padding_left(1) |
| 21132 | .padding_right(1) |
| 21133 | .padding_top(1) |
| 21134 | .padding_bottom(1) |
| 21135 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4); |
| 21136 | } |
| 21137 | } |
| 21138 | } |
| 21139 | |
| 21140 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_lt_2) { |
| 21141 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 21142 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21143 | DWConv2DMicrokernelTester() |
| 21144 | .input_width(input_width) |
| 21145 | .input_height(input_height) |
| 21146 | .kernel_height(3) |
| 21147 | .kernel_width(3) |
| 21148 | .subsampling(2) |
| 21149 | .padding_left(1) |
| 21150 | .padding_right(1) |
| 21151 | .padding_top(1) |
| 21152 | .padding_bottom(1) |
| 21153 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4); |
| 21154 | } |
| 21155 | } |
| 21156 | } |
| 21157 | |
| 21158 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_gt_2) { |
| 21159 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 21160 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21161 | DWConv2DMicrokernelTester() |
| 21162 | .input_width(input_width) |
| 21163 | .input_height(input_height) |
| 21164 | .kernel_height(3) |
| 21165 | .kernel_width(3) |
| 21166 | .subsampling(2) |
| 21167 | .padding_left(1) |
| 21168 | .padding_right(1) |
| 21169 | .padding_top(1) |
| 21170 | .padding_bottom(1) |
| 21171 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4); |
| 21172 | } |
| 21173 | } |
| 21174 | } |
| 21175 | |
| 21176 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4, padding_top_eq_1) { |
| 21177 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 21178 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21179 | DWConv2DMicrokernelTester() |
| 21180 | .input_width(input_width) |
| 21181 | .input_height(input_height) |
| 21182 | .kernel_height(3) |
| 21183 | .kernel_width(3) |
| 21184 | .subsampling(2) |
| 21185 | .padding_left(1) |
| 21186 | .padding_right(1) |
| 21187 | .padding_top(0) |
| 21188 | .padding_bottom(1) |
| 21189 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4); |
| 21190 | } |
| 21191 | } |
| 21192 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21193 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21194 | |
| 21195 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21196 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21197 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_eq_4) { |
| 21198 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 21199 | DWConv2DMicrokernelTester() |
| 21200 | .input_width(input_width) |
| 21201 | .input_height(6) |
| 21202 | .kernel_height(3) |
| 21203 | .kernel_width(3) |
| 21204 | .subsampling(2) |
| 21205 | .padding_left(1) |
| 21206 | .padding_right(1) |
| 21207 | .padding_top(1) |
| 21208 | .padding_bottom(1) |
| 21209 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_3x4); |
| 21210 | } |
| 21211 | } |
| 21212 | |
| 21213 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_div_4) { |
| 21214 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 21215 | DWConv2DMicrokernelTester() |
| 21216 | .input_width(input_width) |
| 21217 | .input_height(6) |
| 21218 | .kernel_height(3) |
| 21219 | .kernel_width(3) |
| 21220 | .subsampling(2) |
| 21221 | .padding_left(1) |
| 21222 | .padding_right(1) |
| 21223 | .padding_top(1) |
| 21224 | .padding_bottom(1) |
| 21225 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_3x4); |
| 21226 | } |
| 21227 | } |
| 21228 | |
| 21229 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_lt_4) { |
| 21230 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 21231 | DWConv2DMicrokernelTester() |
| 21232 | .input_width(8) |
| 21233 | .input_height(6) |
| 21234 | .kernel_height(3) |
| 21235 | .kernel_width(3) |
| 21236 | .subsampling(2) |
| 21237 | .padding_left(1) |
| 21238 | .padding_right(1) |
| 21239 | .padding_top(1) |
| 21240 | .padding_bottom(1) |
| 21241 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_3x4); |
| 21242 | } |
| 21243 | } |
| 21244 | |
| 21245 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_gt_4) { |
| 21246 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 21247 | DWConv2DMicrokernelTester() |
| 21248 | .input_width(input_width) |
| 21249 | .input_height(6) |
| 21250 | .kernel_height(3) |
| 21251 | .kernel_width(3) |
| 21252 | .subsampling(2) |
| 21253 | .padding_left(1) |
| 21254 | .padding_right(1) |
| 21255 | .padding_top(1) |
| 21256 | .padding_bottom(1) |
| 21257 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_3x4); |
| 21258 | } |
| 21259 | } |
| 21260 | |
| 21261 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_eq_3) { |
| 21262 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 21263 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21264 | DWConv2DMicrokernelTester() |
| 21265 | .input_width(input_width) |
| 21266 | .input_height(input_height) |
| 21267 | .kernel_height(3) |
| 21268 | .kernel_width(3) |
| 21269 | .subsampling(2) |
| 21270 | .padding_left(1) |
| 21271 | .padding_right(1) |
| 21272 | .padding_top(1) |
| 21273 | .padding_bottom(1) |
| 21274 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_3x4); |
| 21275 | } |
| 21276 | } |
| 21277 | } |
| 21278 | |
| 21279 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_div_3) { |
| 21280 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 21281 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21282 | DWConv2DMicrokernelTester() |
| 21283 | .input_width(input_width) |
| 21284 | .input_height(input_height) |
| 21285 | .kernel_height(3) |
| 21286 | .kernel_width(3) |
| 21287 | .subsampling(2) |
| 21288 | .padding_left(1) |
| 21289 | .padding_right(1) |
| 21290 | .padding_top(1) |
| 21291 | .padding_bottom(1) |
| 21292 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_3x4); |
| 21293 | } |
| 21294 | } |
| 21295 | } |
| 21296 | |
| 21297 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_lt_3) { |
| 21298 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 21299 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21300 | DWConv2DMicrokernelTester() |
| 21301 | .input_width(input_width) |
| 21302 | .input_height(input_height) |
| 21303 | .kernel_height(3) |
| 21304 | .kernel_width(3) |
| 21305 | .subsampling(2) |
| 21306 | .padding_left(1) |
| 21307 | .padding_right(1) |
| 21308 | .padding_top(1) |
| 21309 | .padding_bottom(1) |
| 21310 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_3x4); |
| 21311 | } |
| 21312 | } |
| 21313 | } |
| 21314 | |
| 21315 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_gt_3) { |
| 21316 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 21317 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21318 | DWConv2DMicrokernelTester() |
| 21319 | .input_width(input_width) |
| 21320 | .input_height(input_height) |
| 21321 | .kernel_height(3) |
| 21322 | .kernel_width(3) |
| 21323 | .subsampling(2) |
| 21324 | .padding_left(1) |
| 21325 | .padding_right(1) |
| 21326 | .padding_top(1) |
| 21327 | .padding_bottom(1) |
| 21328 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_3x4); |
| 21329 | } |
| 21330 | } |
| 21331 | } |
| 21332 | |
| 21333 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_3X4, padding_top_eq_1) { |
| 21334 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 21335 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21336 | DWConv2DMicrokernelTester() |
| 21337 | .input_width(input_width) |
| 21338 | .input_height(input_height) |
| 21339 | .kernel_height(3) |
| 21340 | .kernel_width(3) |
| 21341 | .subsampling(2) |
| 21342 | .padding_left(1) |
| 21343 | .padding_right(1) |
| 21344 | .padding_top(0) |
| 21345 | .padding_bottom(1) |
| 21346 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_3x4); |
| 21347 | } |
| 21348 | } |
| 21349 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21350 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21351 | |
| 21352 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21353 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21354 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_width_eq_4) { |
| 21355 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 21356 | DWConv2DMicrokernelTester() |
| 21357 | .input_width(input_width) |
| 21358 | .input_height(8) |
| 21359 | .kernel_height(3) |
| 21360 | .kernel_width(3) |
| 21361 | .subsampling(2) |
| 21362 | .padding_left(1) |
| 21363 | .padding_right(1) |
| 21364 | .padding_top(1) |
| 21365 | .padding_bottom(1) |
| 21366 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_4x4); |
| 21367 | } |
| 21368 | } |
| 21369 | |
| 21370 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_width_div_4) { |
| 21371 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 21372 | DWConv2DMicrokernelTester() |
| 21373 | .input_width(input_width) |
| 21374 | .input_height(8) |
| 21375 | .kernel_height(3) |
| 21376 | .kernel_width(3) |
| 21377 | .subsampling(2) |
| 21378 | .padding_left(1) |
| 21379 | .padding_right(1) |
| 21380 | .padding_top(1) |
| 21381 | .padding_bottom(1) |
| 21382 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_4x4); |
| 21383 | } |
| 21384 | } |
| 21385 | |
| 21386 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_width_lt_4) { |
| 21387 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 21388 | DWConv2DMicrokernelTester() |
| 21389 | .input_width(8) |
| 21390 | .input_height(8) |
| 21391 | .kernel_height(3) |
| 21392 | .kernel_width(3) |
| 21393 | .subsampling(2) |
| 21394 | .padding_left(1) |
| 21395 | .padding_right(1) |
| 21396 | .padding_top(1) |
| 21397 | .padding_bottom(1) |
| 21398 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_4x4); |
| 21399 | } |
| 21400 | } |
| 21401 | |
| 21402 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_width_gt_4) { |
| 21403 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 21404 | DWConv2DMicrokernelTester() |
| 21405 | .input_width(input_width) |
| 21406 | .input_height(8) |
| 21407 | .kernel_height(3) |
| 21408 | .kernel_width(3) |
| 21409 | .subsampling(2) |
| 21410 | .padding_left(1) |
| 21411 | .padding_right(1) |
| 21412 | .padding_top(1) |
| 21413 | .padding_bottom(1) |
| 21414 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_4x4); |
| 21415 | } |
| 21416 | } |
| 21417 | |
| 21418 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_height_eq_4) { |
| 21419 | for (size_t input_height = 7; input_height < 9; input_height++) { |
| 21420 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21421 | DWConv2DMicrokernelTester() |
| 21422 | .input_width(input_width) |
| 21423 | .input_height(input_height) |
| 21424 | .kernel_height(3) |
| 21425 | .kernel_width(3) |
| 21426 | .subsampling(2) |
| 21427 | .padding_left(1) |
| 21428 | .padding_right(1) |
| 21429 | .padding_top(1) |
| 21430 | .padding_bottom(1) |
| 21431 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_4x4); |
| 21432 | } |
| 21433 | } |
| 21434 | } |
| 21435 | |
| 21436 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_height_div_4) { |
| 21437 | for (size_t input_height = 16; input_height < 64; input_height += 8) { |
| 21438 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21439 | DWConv2DMicrokernelTester() |
| 21440 | .input_width(input_width) |
| 21441 | .input_height(input_height) |
| 21442 | .kernel_height(3) |
| 21443 | .kernel_width(3) |
| 21444 | .subsampling(2) |
| 21445 | .padding_left(1) |
| 21446 | .padding_right(1) |
| 21447 | .padding_top(1) |
| 21448 | .padding_bottom(1) |
| 21449 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_4x4); |
| 21450 | } |
| 21451 | } |
| 21452 | } |
| 21453 | |
| 21454 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_height_lt_4) { |
| 21455 | for (size_t input_height = 1; input_height < 7; input_height++) { |
| 21456 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21457 | DWConv2DMicrokernelTester() |
| 21458 | .input_width(input_width) |
| 21459 | .input_height(input_height) |
| 21460 | .kernel_height(3) |
| 21461 | .kernel_width(3) |
| 21462 | .subsampling(2) |
| 21463 | .padding_left(1) |
| 21464 | .padding_right(1) |
| 21465 | .padding_top(1) |
| 21466 | .padding_bottom(1) |
| 21467 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_4x4); |
| 21468 | } |
| 21469 | } |
| 21470 | } |
| 21471 | |
| 21472 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_4X4, output_height_gt_4) { |
| 21473 | for (size_t input_height = 9; input_height < 17; input_height++) { |
| 21474 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21475 | DWConv2DMicrokernelTester() |
| 21476 | .input_width(input_width) |
| 21477 | .input_height(input_height) |
| 21478 | .kernel_height(3) |
| 21479 | .kernel_width(3) |
| 21480 | .subsampling(2) |
| 21481 | .padding_left(1) |
| 21482 | .padding_right(1) |
| 21483 | .padding_top(1) |
| 21484 | .padding_bottom(1) |
| 21485 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_4x4); |
| 21486 | } |
| 21487 | } |
| 21488 | } |
| 21489 | |
| 21490 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_4X4, padding_top_eq_1) { |
| 21491 | for (size_t input_height = 2; input_height < 26; input_height++) { |
| 21492 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21493 | DWConv2DMicrokernelTester() |
| 21494 | .input_width(input_width) |
| 21495 | .input_height(input_height) |
| 21496 | .kernel_height(3) |
| 21497 | .kernel_width(3) |
| 21498 | .subsampling(2) |
| 21499 | .padding_left(1) |
| 21500 | .padding_right(1) |
| 21501 | .padding_top(0) |
| 21502 | .padding_bottom(1) |
| 21503 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_4x4); |
| 21504 | } |
| 21505 | } |
| 21506 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21507 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21508 | |
| 21509 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21510 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21511 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_eq_4) { |
| 21512 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 21513 | DWConv2DMicrokernelTester() |
| 21514 | .input_width(input_width) |
| 21515 | .input_height(2) |
| 21516 | .kernel_height(3) |
| 21517 | .kernel_width(3) |
| 21518 | .subsampling(2) |
| 21519 | .padding_left(1) |
| 21520 | .padding_right(1) |
| 21521 | .padding_top(1) |
| 21522 | .padding_bottom(1) |
| 21523 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc2); |
| 21524 | } |
| 21525 | } |
| 21526 | |
| 21527 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_div_4) { |
| 21528 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 21529 | DWConv2DMicrokernelTester() |
| 21530 | .input_width(input_width) |
| 21531 | .input_height(2) |
| 21532 | .kernel_height(3) |
| 21533 | .kernel_width(3) |
| 21534 | .subsampling(2) |
| 21535 | .padding_left(1) |
| 21536 | .padding_right(1) |
| 21537 | .padding_top(1) |
| 21538 | .padding_bottom(1) |
| 21539 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc2); |
| 21540 | } |
| 21541 | } |
| 21542 | |
| 21543 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_lt_4) { |
| 21544 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 21545 | DWConv2DMicrokernelTester() |
| 21546 | .input_width(8) |
| 21547 | .input_height(2) |
| 21548 | .kernel_height(3) |
| 21549 | .kernel_width(3) |
| 21550 | .subsampling(2) |
| 21551 | .padding_left(1) |
| 21552 | .padding_right(1) |
| 21553 | .padding_top(1) |
| 21554 | .padding_bottom(1) |
| 21555 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc2); |
| 21556 | } |
| 21557 | } |
| 21558 | |
| 21559 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_gt_4) { |
| 21560 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 21561 | DWConv2DMicrokernelTester() |
| 21562 | .input_width(input_width) |
| 21563 | .input_height(2) |
| 21564 | .kernel_height(3) |
| 21565 | .kernel_width(3) |
| 21566 | .subsampling(2) |
| 21567 | .padding_left(1) |
| 21568 | .padding_right(1) |
| 21569 | .padding_top(1) |
| 21570 | .padding_bottom(1) |
| 21571 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc2); |
| 21572 | } |
| 21573 | } |
| 21574 | |
| 21575 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_height_eq_1) { |
| 21576 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 21577 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21578 | DWConv2DMicrokernelTester() |
| 21579 | .input_width(input_width) |
| 21580 | .input_height(input_height) |
| 21581 | .kernel_height(3) |
| 21582 | .kernel_width(3) |
| 21583 | .subsampling(2) |
| 21584 | .padding_left(1) |
| 21585 | .padding_right(1) |
| 21586 | .padding_top(1) |
| 21587 | .padding_bottom(1) |
| 21588 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc2); |
| 21589 | } |
| 21590 | } |
| 21591 | } |
| 21592 | |
| 21593 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_height_gt_1) { |
| 21594 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 21595 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21596 | DWConv2DMicrokernelTester() |
| 21597 | .input_width(input_width) |
| 21598 | .input_height(input_height) |
| 21599 | .kernel_height(3) |
| 21600 | .kernel_width(3) |
| 21601 | .subsampling(2) |
| 21602 | .padding_left(1) |
| 21603 | .padding_right(1) |
| 21604 | .padding_top(1) |
| 21605 | .padding_bottom(1) |
| 21606 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc2); |
| 21607 | } |
| 21608 | } |
| 21609 | } |
| 21610 | |
| 21611 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, padding_top_eq_1) { |
| 21612 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 21613 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21614 | DWConv2DMicrokernelTester() |
| 21615 | .input_width(input_width) |
| 21616 | .input_height(input_height) |
| 21617 | .kernel_height(3) |
| 21618 | .kernel_width(3) |
| 21619 | .subsampling(2) |
| 21620 | .padding_left(1) |
| 21621 | .padding_right(1) |
| 21622 | .padding_top(0) |
| 21623 | .padding_bottom(1) |
| 21624 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc2); |
| 21625 | } |
| 21626 | } |
| 21627 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21628 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21629 | |
| 21630 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21631 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21632 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_eq_4) { |
| 21633 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 21634 | DWConv2DMicrokernelTester() |
| 21635 | .input_width(input_width) |
| 21636 | .input_height(2) |
| 21637 | .kernel_height(3) |
| 21638 | .kernel_width(3) |
| 21639 | .subsampling(2) |
| 21640 | .padding_left(1) |
| 21641 | .padding_right(1) |
| 21642 | .padding_top(1) |
| 21643 | .padding_bottom(1) |
| 21644 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc3); |
| 21645 | } |
| 21646 | } |
| 21647 | |
| 21648 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_div_4) { |
| 21649 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 21650 | DWConv2DMicrokernelTester() |
| 21651 | .input_width(input_width) |
| 21652 | .input_height(2) |
| 21653 | .kernel_height(3) |
| 21654 | .kernel_width(3) |
| 21655 | .subsampling(2) |
| 21656 | .padding_left(1) |
| 21657 | .padding_right(1) |
| 21658 | .padding_top(1) |
| 21659 | .padding_bottom(1) |
| 21660 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc3); |
| 21661 | } |
| 21662 | } |
| 21663 | |
| 21664 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_lt_4) { |
| 21665 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 21666 | DWConv2DMicrokernelTester() |
| 21667 | .input_width(8) |
| 21668 | .input_height(2) |
| 21669 | .kernel_height(3) |
| 21670 | .kernel_width(3) |
| 21671 | .subsampling(2) |
| 21672 | .padding_left(1) |
| 21673 | .padding_right(1) |
| 21674 | .padding_top(1) |
| 21675 | .padding_bottom(1) |
| 21676 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc3); |
| 21677 | } |
| 21678 | } |
| 21679 | |
| 21680 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_gt_4) { |
| 21681 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 21682 | DWConv2DMicrokernelTester() |
| 21683 | .input_width(input_width) |
| 21684 | .input_height(2) |
| 21685 | .kernel_height(3) |
| 21686 | .kernel_width(3) |
| 21687 | .subsampling(2) |
| 21688 | .padding_left(1) |
| 21689 | .padding_right(1) |
| 21690 | .padding_top(1) |
| 21691 | .padding_bottom(1) |
| 21692 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc3); |
| 21693 | } |
| 21694 | } |
| 21695 | |
| 21696 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_height_eq_1) { |
| 21697 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 21698 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21699 | DWConv2DMicrokernelTester() |
| 21700 | .input_width(input_width) |
| 21701 | .input_height(input_height) |
| 21702 | .kernel_height(3) |
| 21703 | .kernel_width(3) |
| 21704 | .subsampling(2) |
| 21705 | .padding_left(1) |
| 21706 | .padding_right(1) |
| 21707 | .padding_top(1) |
| 21708 | .padding_bottom(1) |
| 21709 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc3); |
| 21710 | } |
| 21711 | } |
| 21712 | } |
| 21713 | |
| 21714 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_height_gt_1) { |
| 21715 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 21716 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21717 | DWConv2DMicrokernelTester() |
| 21718 | .input_width(input_width) |
| 21719 | .input_height(input_height) |
| 21720 | .kernel_height(3) |
| 21721 | .kernel_width(3) |
| 21722 | .subsampling(2) |
| 21723 | .padding_left(1) |
| 21724 | .padding_right(1) |
| 21725 | .padding_top(1) |
| 21726 | .padding_bottom(1) |
| 21727 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc3); |
| 21728 | } |
| 21729 | } |
| 21730 | } |
| 21731 | |
| 21732 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, padding_top_eq_1) { |
| 21733 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 21734 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21735 | DWConv2DMicrokernelTester() |
| 21736 | .input_width(input_width) |
| 21737 | .input_height(input_height) |
| 21738 | .kernel_height(3) |
| 21739 | .kernel_width(3) |
| 21740 | .subsampling(2) |
| 21741 | .padding_left(1) |
| 21742 | .padding_right(1) |
| 21743 | .padding_top(0) |
| 21744 | .padding_bottom(1) |
| 21745 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc3); |
| 21746 | } |
| 21747 | } |
| 21748 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21749 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21750 | |
| 21751 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21752 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21753 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_eq_4) { |
| 21754 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 21755 | DWConv2DMicrokernelTester() |
| 21756 | .input_width(input_width) |
| 21757 | .input_height(2) |
| 21758 | .kernel_height(3) |
| 21759 | .kernel_width(3) |
| 21760 | .subsampling(2) |
| 21761 | .padding_left(1) |
| 21762 | .padding_right(1) |
| 21763 | .padding_top(1) |
| 21764 | .padding_bottom(1) |
| 21765 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc4); |
| 21766 | } |
| 21767 | } |
| 21768 | |
| 21769 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_div_4) { |
| 21770 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 21771 | DWConv2DMicrokernelTester() |
| 21772 | .input_width(input_width) |
| 21773 | .input_height(2) |
| 21774 | .kernel_height(3) |
| 21775 | .kernel_width(3) |
| 21776 | .subsampling(2) |
| 21777 | .padding_left(1) |
| 21778 | .padding_right(1) |
| 21779 | .padding_top(1) |
| 21780 | .padding_bottom(1) |
| 21781 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc4); |
| 21782 | } |
| 21783 | } |
| 21784 | |
| 21785 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_lt_4) { |
| 21786 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 21787 | DWConv2DMicrokernelTester() |
| 21788 | .input_width(8) |
| 21789 | .input_height(2) |
| 21790 | .kernel_height(3) |
| 21791 | .kernel_width(3) |
| 21792 | .subsampling(2) |
| 21793 | .padding_left(1) |
| 21794 | .padding_right(1) |
| 21795 | .padding_top(1) |
| 21796 | .padding_bottom(1) |
| 21797 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc4); |
| 21798 | } |
| 21799 | } |
| 21800 | |
| 21801 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_gt_4) { |
| 21802 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 21803 | DWConv2DMicrokernelTester() |
| 21804 | .input_width(input_width) |
| 21805 | .input_height(2) |
| 21806 | .kernel_height(3) |
| 21807 | .kernel_width(3) |
| 21808 | .subsampling(2) |
| 21809 | .padding_left(1) |
| 21810 | .padding_right(1) |
| 21811 | .padding_top(1) |
| 21812 | .padding_bottom(1) |
| 21813 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc4); |
| 21814 | } |
| 21815 | } |
| 21816 | |
| 21817 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_height_eq_1) { |
| 21818 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 21819 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21820 | DWConv2DMicrokernelTester() |
| 21821 | .input_width(input_width) |
| 21822 | .input_height(input_height) |
| 21823 | .kernel_height(3) |
| 21824 | .kernel_width(3) |
| 21825 | .subsampling(2) |
| 21826 | .padding_left(1) |
| 21827 | .padding_right(1) |
| 21828 | .padding_top(1) |
| 21829 | .padding_bottom(1) |
| 21830 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc4); |
| 21831 | } |
| 21832 | } |
| 21833 | } |
| 21834 | |
| 21835 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_height_gt_1) { |
| 21836 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 21837 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21838 | DWConv2DMicrokernelTester() |
| 21839 | .input_width(input_width) |
| 21840 | .input_height(input_height) |
| 21841 | .kernel_height(3) |
| 21842 | .kernel_width(3) |
| 21843 | .subsampling(2) |
| 21844 | .padding_left(1) |
| 21845 | .padding_right(1) |
| 21846 | .padding_top(1) |
| 21847 | .padding_bottom(1) |
| 21848 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc4); |
| 21849 | } |
| 21850 | } |
| 21851 | } |
| 21852 | |
| 21853 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, padding_top_eq_1) { |
| 21854 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 21855 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21856 | DWConv2DMicrokernelTester() |
| 21857 | .input_width(input_width) |
| 21858 | .input_height(input_height) |
| 21859 | .kernel_height(3) |
| 21860 | .kernel_width(3) |
| 21861 | .subsampling(2) |
| 21862 | .padding_left(1) |
| 21863 | .padding_right(1) |
| 21864 | .padding_top(0) |
| 21865 | .padding_bottom(1) |
| 21866 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc4); |
| 21867 | } |
| 21868 | } |
| 21869 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21870 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21871 | |
| 21872 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 21873 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 21874 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_eq_4) { |
| 21875 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 21876 | DWConv2DMicrokernelTester() |
| 21877 | .input_width(input_width) |
| 21878 | .input_height(4) |
| 21879 | .kernel_height(3) |
| 21880 | .kernel_width(3) |
| 21881 | .subsampling(2) |
| 21882 | .padding_left(1) |
| 21883 | .padding_right(1) |
| 21884 | .padding_top(1) |
| 21885 | .padding_bottom(1) |
| 21886 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| 21887 | } |
| 21888 | } |
| 21889 | |
| 21890 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_div_4) { |
| 21891 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 21892 | DWConv2DMicrokernelTester() |
| 21893 | .input_width(input_width) |
| 21894 | .input_height(4) |
| 21895 | .kernel_height(3) |
| 21896 | .kernel_width(3) |
| 21897 | .subsampling(2) |
| 21898 | .padding_left(1) |
| 21899 | .padding_right(1) |
| 21900 | .padding_top(1) |
| 21901 | .padding_bottom(1) |
| 21902 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| 21903 | } |
| 21904 | } |
| 21905 | |
| 21906 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_lt_4) { |
| 21907 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 21908 | DWConv2DMicrokernelTester() |
| 21909 | .input_width(8) |
| 21910 | .input_height(4) |
| 21911 | .kernel_height(3) |
| 21912 | .kernel_width(3) |
| 21913 | .subsampling(2) |
| 21914 | .padding_left(1) |
| 21915 | .padding_right(1) |
| 21916 | .padding_top(1) |
| 21917 | .padding_bottom(1) |
| 21918 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| 21919 | } |
| 21920 | } |
| 21921 | |
| 21922 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_gt_4) { |
| 21923 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 21924 | DWConv2DMicrokernelTester() |
| 21925 | .input_width(input_width) |
| 21926 | .input_height(4) |
| 21927 | .kernel_height(3) |
| 21928 | .kernel_width(3) |
| 21929 | .subsampling(2) |
| 21930 | .padding_left(1) |
| 21931 | .padding_right(1) |
| 21932 | .padding_top(1) |
| 21933 | .padding_bottom(1) |
| 21934 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| 21935 | } |
| 21936 | } |
| 21937 | |
| 21938 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_eq_2) { |
| 21939 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 21940 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21941 | DWConv2DMicrokernelTester() |
| 21942 | .input_width(input_width) |
| 21943 | .input_height(input_height) |
| 21944 | .kernel_height(3) |
| 21945 | .kernel_width(3) |
| 21946 | .subsampling(2) |
| 21947 | .padding_left(1) |
| 21948 | .padding_right(1) |
| 21949 | .padding_top(1) |
| 21950 | .padding_bottom(1) |
| 21951 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| 21952 | } |
| 21953 | } |
| 21954 | } |
| 21955 | |
| 21956 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_div_2) { |
| 21957 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 21958 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21959 | DWConv2DMicrokernelTester() |
| 21960 | .input_width(input_width) |
| 21961 | .input_height(input_height) |
| 21962 | .kernel_height(3) |
| 21963 | .kernel_width(3) |
| 21964 | .subsampling(2) |
| 21965 | .padding_left(1) |
| 21966 | .padding_right(1) |
| 21967 | .padding_top(1) |
| 21968 | .padding_bottom(1) |
| 21969 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| 21970 | } |
| 21971 | } |
| 21972 | } |
| 21973 | |
| 21974 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_lt_2) { |
| 21975 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 21976 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21977 | DWConv2DMicrokernelTester() |
| 21978 | .input_width(input_width) |
| 21979 | .input_height(input_height) |
| 21980 | .kernel_height(3) |
| 21981 | .kernel_width(3) |
| 21982 | .subsampling(2) |
| 21983 | .padding_left(1) |
| 21984 | .padding_right(1) |
| 21985 | .padding_top(1) |
| 21986 | .padding_bottom(1) |
| 21987 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| 21988 | } |
| 21989 | } |
| 21990 | } |
| 21991 | |
| 21992 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_gt_2) { |
| 21993 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 21994 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 21995 | DWConv2DMicrokernelTester() |
| 21996 | .input_width(input_width) |
| 21997 | .input_height(input_height) |
| 21998 | .kernel_height(3) |
| 21999 | .kernel_width(3) |
| 22000 | .subsampling(2) |
| 22001 | .padding_left(1) |
| 22002 | .padding_right(1) |
| 22003 | .padding_top(1) |
| 22004 | .padding_bottom(1) |
| 22005 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| 22006 | } |
| 22007 | } |
| 22008 | } |
| 22009 | |
| 22010 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, padding_top_eq_1) { |
| 22011 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 22012 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22013 | DWConv2DMicrokernelTester() |
| 22014 | .input_width(input_width) |
| 22015 | .input_height(input_height) |
| 22016 | .kernel_height(3) |
| 22017 | .kernel_width(3) |
| 22018 | .subsampling(2) |
| 22019 | .padding_left(1) |
| 22020 | .padding_right(1) |
| 22021 | .padding_top(0) |
| 22022 | .padding_bottom(1) |
| 22023 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4_acc2); |
| 22024 | } |
| 22025 | } |
| 22026 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22027 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22028 | |
| 22029 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22030 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22031 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4, output_width_eq_4) { |
| 22032 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 22033 | DWConv2DMicrokernelTester() |
| 22034 | .input_width(input_width) |
| 22035 | .input_height(2) |
| 22036 | .kernel_height(3) |
| 22037 | .kernel_width(3) |
| 22038 | .subsampling(2) |
| 22039 | .padding_left(1) |
| 22040 | .padding_right(1) |
| 22041 | .padding_top(1) |
| 22042 | .padding_bottom(1) |
| 22043 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4); |
| 22044 | } |
| 22045 | } |
| 22046 | |
| 22047 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4, output_width_div_4) { |
| 22048 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 22049 | DWConv2DMicrokernelTester() |
| 22050 | .input_width(input_width) |
| 22051 | .input_height(2) |
| 22052 | .kernel_height(3) |
| 22053 | .kernel_width(3) |
| 22054 | .subsampling(2) |
| 22055 | .padding_left(1) |
| 22056 | .padding_right(1) |
| 22057 | .padding_top(1) |
| 22058 | .padding_bottom(1) |
| 22059 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4); |
| 22060 | } |
| 22061 | } |
| 22062 | |
| 22063 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4, output_width_lt_4) { |
| 22064 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 22065 | DWConv2DMicrokernelTester() |
| 22066 | .input_width(8) |
| 22067 | .input_height(2) |
| 22068 | .kernel_height(3) |
| 22069 | .kernel_width(3) |
| 22070 | .subsampling(2) |
| 22071 | .padding_left(1) |
| 22072 | .padding_right(1) |
| 22073 | .padding_top(1) |
| 22074 | .padding_bottom(1) |
| 22075 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4); |
| 22076 | } |
| 22077 | } |
| 22078 | |
| 22079 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4, output_width_gt_4) { |
| 22080 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 22081 | DWConv2DMicrokernelTester() |
| 22082 | .input_width(input_width) |
| 22083 | .input_height(2) |
| 22084 | .kernel_height(3) |
| 22085 | .kernel_width(3) |
| 22086 | .subsampling(2) |
| 22087 | .padding_left(1) |
| 22088 | .padding_right(1) |
| 22089 | .padding_top(1) |
| 22090 | .padding_bottom(1) |
| 22091 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4); |
| 22092 | } |
| 22093 | } |
| 22094 | |
| 22095 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4, output_height_eq_1) { |
| 22096 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 22097 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22098 | DWConv2DMicrokernelTester() |
| 22099 | .input_width(input_width) |
| 22100 | .input_height(input_height) |
| 22101 | .kernel_height(3) |
| 22102 | .kernel_width(3) |
| 22103 | .subsampling(2) |
| 22104 | .padding_left(1) |
| 22105 | .padding_right(1) |
| 22106 | .padding_top(1) |
| 22107 | .padding_bottom(1) |
| 22108 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4); |
| 22109 | } |
| 22110 | } |
| 22111 | } |
| 22112 | |
| 22113 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4, output_height_gt_1) { |
| 22114 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 22115 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22116 | DWConv2DMicrokernelTester() |
| 22117 | .input_width(input_width) |
| 22118 | .input_height(input_height) |
| 22119 | .kernel_height(3) |
| 22120 | .kernel_width(3) |
| 22121 | .subsampling(2) |
| 22122 | .padding_left(1) |
| 22123 | .padding_right(1) |
| 22124 | .padding_top(1) |
| 22125 | .padding_bottom(1) |
| 22126 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4); |
| 22127 | } |
| 22128 | } |
| 22129 | } |
| 22130 | |
| 22131 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4, padding_top_eq_1) { |
| 22132 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 22133 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22134 | DWConv2DMicrokernelTester() |
| 22135 | .input_width(input_width) |
| 22136 | .input_height(input_height) |
| 22137 | .kernel_height(3) |
| 22138 | .kernel_width(3) |
| 22139 | .subsampling(2) |
| 22140 | .padding_left(1) |
| 22141 | .padding_right(1) |
| 22142 | .padding_top(0) |
| 22143 | .padding_bottom(1) |
| 22144 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4); |
| 22145 | } |
| 22146 | } |
| 22147 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22148 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22149 | |
| 22150 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22151 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22152 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4, output_width_eq_4) { |
| 22153 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 22154 | DWConv2DMicrokernelTester() |
| 22155 | .input_width(input_width) |
| 22156 | .input_height(4) |
| 22157 | .kernel_height(3) |
| 22158 | .kernel_width(3) |
| 22159 | .subsampling(2) |
| 22160 | .padding_left(1) |
| 22161 | .padding_right(1) |
| 22162 | .padding_top(1) |
| 22163 | .padding_bottom(1) |
| 22164 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4); |
| 22165 | } |
| 22166 | } |
| 22167 | |
| 22168 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4, output_width_div_4) { |
| 22169 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 22170 | DWConv2DMicrokernelTester() |
| 22171 | .input_width(input_width) |
| 22172 | .input_height(4) |
| 22173 | .kernel_height(3) |
| 22174 | .kernel_width(3) |
| 22175 | .subsampling(2) |
| 22176 | .padding_left(1) |
| 22177 | .padding_right(1) |
| 22178 | .padding_top(1) |
| 22179 | .padding_bottom(1) |
| 22180 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4); |
| 22181 | } |
| 22182 | } |
| 22183 | |
| 22184 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4, output_width_lt_4) { |
| 22185 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 22186 | DWConv2DMicrokernelTester() |
| 22187 | .input_width(8) |
| 22188 | .input_height(4) |
| 22189 | .kernel_height(3) |
| 22190 | .kernel_width(3) |
| 22191 | .subsampling(2) |
| 22192 | .padding_left(1) |
| 22193 | .padding_right(1) |
| 22194 | .padding_top(1) |
| 22195 | .padding_bottom(1) |
| 22196 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4); |
| 22197 | } |
| 22198 | } |
| 22199 | |
| 22200 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4, output_width_gt_4) { |
| 22201 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 22202 | DWConv2DMicrokernelTester() |
| 22203 | .input_width(input_width) |
| 22204 | .input_height(4) |
| 22205 | .kernel_height(3) |
| 22206 | .kernel_width(3) |
| 22207 | .subsampling(2) |
| 22208 | .padding_left(1) |
| 22209 | .padding_right(1) |
| 22210 | .padding_top(1) |
| 22211 | .padding_bottom(1) |
| 22212 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4); |
| 22213 | } |
| 22214 | } |
| 22215 | |
| 22216 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4, output_height_eq_2) { |
| 22217 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 22218 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22219 | DWConv2DMicrokernelTester() |
| 22220 | .input_width(input_width) |
| 22221 | .input_height(input_height) |
| 22222 | .kernel_height(3) |
| 22223 | .kernel_width(3) |
| 22224 | .subsampling(2) |
| 22225 | .padding_left(1) |
| 22226 | .padding_right(1) |
| 22227 | .padding_top(1) |
| 22228 | .padding_bottom(1) |
| 22229 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4); |
| 22230 | } |
| 22231 | } |
| 22232 | } |
| 22233 | |
| 22234 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4, output_height_div_2) { |
| 22235 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 22236 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22237 | DWConv2DMicrokernelTester() |
| 22238 | .input_width(input_width) |
| 22239 | .input_height(input_height) |
| 22240 | .kernel_height(3) |
| 22241 | .kernel_width(3) |
| 22242 | .subsampling(2) |
| 22243 | .padding_left(1) |
| 22244 | .padding_right(1) |
| 22245 | .padding_top(1) |
| 22246 | .padding_bottom(1) |
| 22247 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4); |
| 22248 | } |
| 22249 | } |
| 22250 | } |
| 22251 | |
| 22252 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4, output_height_lt_2) { |
| 22253 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 22254 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22255 | DWConv2DMicrokernelTester() |
| 22256 | .input_width(input_width) |
| 22257 | .input_height(input_height) |
| 22258 | .kernel_height(3) |
| 22259 | .kernel_width(3) |
| 22260 | .subsampling(2) |
| 22261 | .padding_left(1) |
| 22262 | .padding_right(1) |
| 22263 | .padding_top(1) |
| 22264 | .padding_bottom(1) |
| 22265 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4); |
| 22266 | } |
| 22267 | } |
| 22268 | } |
| 22269 | |
| 22270 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4, output_height_gt_2) { |
| 22271 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 22272 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22273 | DWConv2DMicrokernelTester() |
| 22274 | .input_width(input_width) |
| 22275 | .input_height(input_height) |
| 22276 | .kernel_height(3) |
| 22277 | .kernel_width(3) |
| 22278 | .subsampling(2) |
| 22279 | .padding_left(1) |
| 22280 | .padding_right(1) |
| 22281 | .padding_top(1) |
| 22282 | .padding_bottom(1) |
| 22283 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4); |
| 22284 | } |
| 22285 | } |
| 22286 | } |
| 22287 | |
| 22288 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4, padding_top_eq_1) { |
| 22289 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 22290 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22291 | DWConv2DMicrokernelTester() |
| 22292 | .input_width(input_width) |
| 22293 | .input_height(input_height) |
| 22294 | .kernel_height(3) |
| 22295 | .kernel_width(3) |
| 22296 | .subsampling(2) |
| 22297 | .padding_left(1) |
| 22298 | .padding_right(1) |
| 22299 | .padding_top(0) |
| 22300 | .padding_bottom(1) |
| 22301 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4); |
| 22302 | } |
| 22303 | } |
| 22304 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22305 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22306 | |
| 22307 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22308 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22309 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_3X4, output_width_eq_4) { |
| 22310 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 22311 | DWConv2DMicrokernelTester() |
| 22312 | .input_width(input_width) |
| 22313 | .input_height(6) |
| 22314 | .kernel_height(3) |
| 22315 | .kernel_width(3) |
| 22316 | .subsampling(2) |
| 22317 | .padding_left(1) |
| 22318 | .padding_right(1) |
| 22319 | .padding_top(1) |
| 22320 | .padding_bottom(1) |
| 22321 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_3x4); |
| 22322 | } |
| 22323 | } |
| 22324 | |
| 22325 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_3X4, output_width_div_4) { |
| 22326 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 22327 | DWConv2DMicrokernelTester() |
| 22328 | .input_width(input_width) |
| 22329 | .input_height(6) |
| 22330 | .kernel_height(3) |
| 22331 | .kernel_width(3) |
| 22332 | .subsampling(2) |
| 22333 | .padding_left(1) |
| 22334 | .padding_right(1) |
| 22335 | .padding_top(1) |
| 22336 | .padding_bottom(1) |
| 22337 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_3x4); |
| 22338 | } |
| 22339 | } |
| 22340 | |
| 22341 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_3X4, output_width_lt_4) { |
| 22342 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 22343 | DWConv2DMicrokernelTester() |
| 22344 | .input_width(8) |
| 22345 | .input_height(6) |
| 22346 | .kernel_height(3) |
| 22347 | .kernel_width(3) |
| 22348 | .subsampling(2) |
| 22349 | .padding_left(1) |
| 22350 | .padding_right(1) |
| 22351 | .padding_top(1) |
| 22352 | .padding_bottom(1) |
| 22353 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_3x4); |
| 22354 | } |
| 22355 | } |
| 22356 | |
| 22357 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_3X4, output_width_gt_4) { |
| 22358 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 22359 | DWConv2DMicrokernelTester() |
| 22360 | .input_width(input_width) |
| 22361 | .input_height(6) |
| 22362 | .kernel_height(3) |
| 22363 | .kernel_width(3) |
| 22364 | .subsampling(2) |
| 22365 | .padding_left(1) |
| 22366 | .padding_right(1) |
| 22367 | .padding_top(1) |
| 22368 | .padding_bottom(1) |
| 22369 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_3x4); |
| 22370 | } |
| 22371 | } |
| 22372 | |
| 22373 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_3X4, output_height_eq_3) { |
| 22374 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 22375 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22376 | DWConv2DMicrokernelTester() |
| 22377 | .input_width(input_width) |
| 22378 | .input_height(input_height) |
| 22379 | .kernel_height(3) |
| 22380 | .kernel_width(3) |
| 22381 | .subsampling(2) |
| 22382 | .padding_left(1) |
| 22383 | .padding_right(1) |
| 22384 | .padding_top(1) |
| 22385 | .padding_bottom(1) |
| 22386 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_3x4); |
| 22387 | } |
| 22388 | } |
| 22389 | } |
| 22390 | |
| 22391 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_3X4, output_height_div_3) { |
| 22392 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 22393 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22394 | DWConv2DMicrokernelTester() |
| 22395 | .input_width(input_width) |
| 22396 | .input_height(input_height) |
| 22397 | .kernel_height(3) |
| 22398 | .kernel_width(3) |
| 22399 | .subsampling(2) |
| 22400 | .padding_left(1) |
| 22401 | .padding_right(1) |
| 22402 | .padding_top(1) |
| 22403 | .padding_bottom(1) |
| 22404 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_3x4); |
| 22405 | } |
| 22406 | } |
| 22407 | } |
| 22408 | |
| 22409 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_3X4, output_height_lt_3) { |
| 22410 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 22411 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22412 | DWConv2DMicrokernelTester() |
| 22413 | .input_width(input_width) |
| 22414 | .input_height(input_height) |
| 22415 | .kernel_height(3) |
| 22416 | .kernel_width(3) |
| 22417 | .subsampling(2) |
| 22418 | .padding_left(1) |
| 22419 | .padding_right(1) |
| 22420 | .padding_top(1) |
| 22421 | .padding_bottom(1) |
| 22422 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_3x4); |
| 22423 | } |
| 22424 | } |
| 22425 | } |
| 22426 | |
| 22427 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_3X4, output_height_gt_3) { |
| 22428 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 22429 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22430 | DWConv2DMicrokernelTester() |
| 22431 | .input_width(input_width) |
| 22432 | .input_height(input_height) |
| 22433 | .kernel_height(3) |
| 22434 | .kernel_width(3) |
| 22435 | .subsampling(2) |
| 22436 | .padding_left(1) |
| 22437 | .padding_right(1) |
| 22438 | .padding_top(1) |
| 22439 | .padding_bottom(1) |
| 22440 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_3x4); |
| 22441 | } |
| 22442 | } |
| 22443 | } |
| 22444 | |
| 22445 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_3X4, padding_top_eq_1) { |
| 22446 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 22447 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22448 | DWConv2DMicrokernelTester() |
| 22449 | .input_width(input_width) |
| 22450 | .input_height(input_height) |
| 22451 | .kernel_height(3) |
| 22452 | .kernel_width(3) |
| 22453 | .subsampling(2) |
| 22454 | .padding_left(1) |
| 22455 | .padding_right(1) |
| 22456 | .padding_top(0) |
| 22457 | .padding_bottom(1) |
| 22458 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_3x4); |
| 22459 | } |
| 22460 | } |
| 22461 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22462 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22463 | |
| 22464 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22465 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22466 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_4X4, output_width_eq_4) { |
| 22467 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 22468 | DWConv2DMicrokernelTester() |
| 22469 | .input_width(input_width) |
| 22470 | .input_height(8) |
| 22471 | .kernel_height(3) |
| 22472 | .kernel_width(3) |
| 22473 | .subsampling(2) |
| 22474 | .padding_left(1) |
| 22475 | .padding_right(1) |
| 22476 | .padding_top(1) |
| 22477 | .padding_bottom(1) |
| 22478 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_4x4); |
| 22479 | } |
| 22480 | } |
| 22481 | |
| 22482 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_4X4, output_width_div_4) { |
| 22483 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 22484 | DWConv2DMicrokernelTester() |
| 22485 | .input_width(input_width) |
| 22486 | .input_height(8) |
| 22487 | .kernel_height(3) |
| 22488 | .kernel_width(3) |
| 22489 | .subsampling(2) |
| 22490 | .padding_left(1) |
| 22491 | .padding_right(1) |
| 22492 | .padding_top(1) |
| 22493 | .padding_bottom(1) |
| 22494 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_4x4); |
| 22495 | } |
| 22496 | } |
| 22497 | |
| 22498 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_4X4, output_width_lt_4) { |
| 22499 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 22500 | DWConv2DMicrokernelTester() |
| 22501 | .input_width(8) |
| 22502 | .input_height(8) |
| 22503 | .kernel_height(3) |
| 22504 | .kernel_width(3) |
| 22505 | .subsampling(2) |
| 22506 | .padding_left(1) |
| 22507 | .padding_right(1) |
| 22508 | .padding_top(1) |
| 22509 | .padding_bottom(1) |
| 22510 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_4x4); |
| 22511 | } |
| 22512 | } |
| 22513 | |
| 22514 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_4X4, output_width_gt_4) { |
| 22515 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 22516 | DWConv2DMicrokernelTester() |
| 22517 | .input_width(input_width) |
| 22518 | .input_height(8) |
| 22519 | .kernel_height(3) |
| 22520 | .kernel_width(3) |
| 22521 | .subsampling(2) |
| 22522 | .padding_left(1) |
| 22523 | .padding_right(1) |
| 22524 | .padding_top(1) |
| 22525 | .padding_bottom(1) |
| 22526 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_4x4); |
| 22527 | } |
| 22528 | } |
| 22529 | |
| 22530 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_4X4, output_height_eq_4) { |
| 22531 | for (size_t input_height = 7; input_height < 9; input_height++) { |
| 22532 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22533 | DWConv2DMicrokernelTester() |
| 22534 | .input_width(input_width) |
| 22535 | .input_height(input_height) |
| 22536 | .kernel_height(3) |
| 22537 | .kernel_width(3) |
| 22538 | .subsampling(2) |
| 22539 | .padding_left(1) |
| 22540 | .padding_right(1) |
| 22541 | .padding_top(1) |
| 22542 | .padding_bottom(1) |
| 22543 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_4x4); |
| 22544 | } |
| 22545 | } |
| 22546 | } |
| 22547 | |
| 22548 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_4X4, output_height_div_4) { |
| 22549 | for (size_t input_height = 16; input_height < 64; input_height += 8) { |
| 22550 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22551 | DWConv2DMicrokernelTester() |
| 22552 | .input_width(input_width) |
| 22553 | .input_height(input_height) |
| 22554 | .kernel_height(3) |
| 22555 | .kernel_width(3) |
| 22556 | .subsampling(2) |
| 22557 | .padding_left(1) |
| 22558 | .padding_right(1) |
| 22559 | .padding_top(1) |
| 22560 | .padding_bottom(1) |
| 22561 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_4x4); |
| 22562 | } |
| 22563 | } |
| 22564 | } |
| 22565 | |
| 22566 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_4X4, output_height_lt_4) { |
| 22567 | for (size_t input_height = 1; input_height < 7; input_height++) { |
| 22568 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22569 | DWConv2DMicrokernelTester() |
| 22570 | .input_width(input_width) |
| 22571 | .input_height(input_height) |
| 22572 | .kernel_height(3) |
| 22573 | .kernel_width(3) |
| 22574 | .subsampling(2) |
| 22575 | .padding_left(1) |
| 22576 | .padding_right(1) |
| 22577 | .padding_top(1) |
| 22578 | .padding_bottom(1) |
| 22579 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_4x4); |
| 22580 | } |
| 22581 | } |
| 22582 | } |
| 22583 | |
| 22584 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_4X4, output_height_gt_4) { |
| 22585 | for (size_t input_height = 9; input_height < 17; input_height++) { |
| 22586 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22587 | DWConv2DMicrokernelTester() |
| 22588 | .input_width(input_width) |
| 22589 | .input_height(input_height) |
| 22590 | .kernel_height(3) |
| 22591 | .kernel_width(3) |
| 22592 | .subsampling(2) |
| 22593 | .padding_left(1) |
| 22594 | .padding_right(1) |
| 22595 | .padding_top(1) |
| 22596 | .padding_bottom(1) |
| 22597 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_4x4); |
| 22598 | } |
| 22599 | } |
| 22600 | } |
| 22601 | |
| 22602 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_4X4, padding_top_eq_1) { |
| 22603 | for (size_t input_height = 2; input_height < 26; input_height++) { |
| 22604 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22605 | DWConv2DMicrokernelTester() |
| 22606 | .input_width(input_width) |
| 22607 | .input_height(input_height) |
| 22608 | .kernel_height(3) |
| 22609 | .kernel_width(3) |
| 22610 | .subsampling(2) |
| 22611 | .padding_left(1) |
| 22612 | .padding_right(1) |
| 22613 | .padding_top(0) |
| 22614 | .padding_bottom(1) |
| 22615 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_4x4); |
| 22616 | } |
| 22617 | } |
| 22618 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22619 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22620 | |
| 22621 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22622 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22623 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_eq_4) { |
| 22624 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 22625 | DWConv2DMicrokernelTester() |
| 22626 | .input_width(input_width) |
| 22627 | .input_height(2) |
| 22628 | .kernel_height(3) |
| 22629 | .kernel_width(3) |
| 22630 | .subsampling(2) |
| 22631 | .padding_left(1) |
| 22632 | .padding_right(1) |
| 22633 | .padding_top(1) |
| 22634 | .padding_bottom(1) |
| 22635 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc2); |
| 22636 | } |
| 22637 | } |
| 22638 | |
| 22639 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_div_4) { |
| 22640 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 22641 | DWConv2DMicrokernelTester() |
| 22642 | .input_width(input_width) |
| 22643 | .input_height(2) |
| 22644 | .kernel_height(3) |
| 22645 | .kernel_width(3) |
| 22646 | .subsampling(2) |
| 22647 | .padding_left(1) |
| 22648 | .padding_right(1) |
| 22649 | .padding_top(1) |
| 22650 | .padding_bottom(1) |
| 22651 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc2); |
| 22652 | } |
| 22653 | } |
| 22654 | |
| 22655 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_lt_4) { |
| 22656 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 22657 | DWConv2DMicrokernelTester() |
| 22658 | .input_width(8) |
| 22659 | .input_height(2) |
| 22660 | .kernel_height(3) |
| 22661 | .kernel_width(3) |
| 22662 | .subsampling(2) |
| 22663 | .padding_left(1) |
| 22664 | .padding_right(1) |
| 22665 | .padding_top(1) |
| 22666 | .padding_bottom(1) |
| 22667 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc2); |
| 22668 | } |
| 22669 | } |
| 22670 | |
| 22671 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_gt_4) { |
| 22672 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 22673 | DWConv2DMicrokernelTester() |
| 22674 | .input_width(input_width) |
| 22675 | .input_height(2) |
| 22676 | .kernel_height(3) |
| 22677 | .kernel_width(3) |
| 22678 | .subsampling(2) |
| 22679 | .padding_left(1) |
| 22680 | .padding_right(1) |
| 22681 | .padding_top(1) |
| 22682 | .padding_bottom(1) |
| 22683 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc2); |
| 22684 | } |
| 22685 | } |
| 22686 | |
| 22687 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_height_eq_1) { |
| 22688 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 22689 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22690 | DWConv2DMicrokernelTester() |
| 22691 | .input_width(input_width) |
| 22692 | .input_height(input_height) |
| 22693 | .kernel_height(3) |
| 22694 | .kernel_width(3) |
| 22695 | .subsampling(2) |
| 22696 | .padding_left(1) |
| 22697 | .padding_right(1) |
| 22698 | .padding_top(1) |
| 22699 | .padding_bottom(1) |
| 22700 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc2); |
| 22701 | } |
| 22702 | } |
| 22703 | } |
| 22704 | |
| 22705 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_height_gt_1) { |
| 22706 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 22707 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22708 | DWConv2DMicrokernelTester() |
| 22709 | .input_width(input_width) |
| 22710 | .input_height(input_height) |
| 22711 | .kernel_height(3) |
| 22712 | .kernel_width(3) |
| 22713 | .subsampling(2) |
| 22714 | .padding_left(1) |
| 22715 | .padding_right(1) |
| 22716 | .padding_top(1) |
| 22717 | .padding_bottom(1) |
| 22718 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc2); |
| 22719 | } |
| 22720 | } |
| 22721 | } |
| 22722 | |
| 22723 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, padding_top_eq_1) { |
| 22724 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 22725 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22726 | DWConv2DMicrokernelTester() |
| 22727 | .input_width(input_width) |
| 22728 | .input_height(input_height) |
| 22729 | .kernel_height(3) |
| 22730 | .kernel_width(3) |
| 22731 | .subsampling(2) |
| 22732 | .padding_left(1) |
| 22733 | .padding_right(1) |
| 22734 | .padding_top(0) |
| 22735 | .padding_bottom(1) |
| 22736 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc2); |
| 22737 | } |
| 22738 | } |
| 22739 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22740 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22741 | |
| 22742 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22743 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22744 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_eq_4) { |
| 22745 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 22746 | DWConv2DMicrokernelTester() |
| 22747 | .input_width(input_width) |
| 22748 | .input_height(2) |
| 22749 | .kernel_height(3) |
| 22750 | .kernel_width(3) |
| 22751 | .subsampling(2) |
| 22752 | .padding_left(1) |
| 22753 | .padding_right(1) |
| 22754 | .padding_top(1) |
| 22755 | .padding_bottom(1) |
| 22756 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc3); |
| 22757 | } |
| 22758 | } |
| 22759 | |
| 22760 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_div_4) { |
| 22761 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 22762 | DWConv2DMicrokernelTester() |
| 22763 | .input_width(input_width) |
| 22764 | .input_height(2) |
| 22765 | .kernel_height(3) |
| 22766 | .kernel_width(3) |
| 22767 | .subsampling(2) |
| 22768 | .padding_left(1) |
| 22769 | .padding_right(1) |
| 22770 | .padding_top(1) |
| 22771 | .padding_bottom(1) |
| 22772 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc3); |
| 22773 | } |
| 22774 | } |
| 22775 | |
| 22776 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_lt_4) { |
| 22777 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 22778 | DWConv2DMicrokernelTester() |
| 22779 | .input_width(8) |
| 22780 | .input_height(2) |
| 22781 | .kernel_height(3) |
| 22782 | .kernel_width(3) |
| 22783 | .subsampling(2) |
| 22784 | .padding_left(1) |
| 22785 | .padding_right(1) |
| 22786 | .padding_top(1) |
| 22787 | .padding_bottom(1) |
| 22788 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc3); |
| 22789 | } |
| 22790 | } |
| 22791 | |
| 22792 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_gt_4) { |
| 22793 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 22794 | DWConv2DMicrokernelTester() |
| 22795 | .input_width(input_width) |
| 22796 | .input_height(2) |
| 22797 | .kernel_height(3) |
| 22798 | .kernel_width(3) |
| 22799 | .subsampling(2) |
| 22800 | .padding_left(1) |
| 22801 | .padding_right(1) |
| 22802 | .padding_top(1) |
| 22803 | .padding_bottom(1) |
| 22804 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc3); |
| 22805 | } |
| 22806 | } |
| 22807 | |
| 22808 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_height_eq_1) { |
| 22809 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 22810 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22811 | DWConv2DMicrokernelTester() |
| 22812 | .input_width(input_width) |
| 22813 | .input_height(input_height) |
| 22814 | .kernel_height(3) |
| 22815 | .kernel_width(3) |
| 22816 | .subsampling(2) |
| 22817 | .padding_left(1) |
| 22818 | .padding_right(1) |
| 22819 | .padding_top(1) |
| 22820 | .padding_bottom(1) |
| 22821 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc3); |
| 22822 | } |
| 22823 | } |
| 22824 | } |
| 22825 | |
| 22826 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_height_gt_1) { |
| 22827 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 22828 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22829 | DWConv2DMicrokernelTester() |
| 22830 | .input_width(input_width) |
| 22831 | .input_height(input_height) |
| 22832 | .kernel_height(3) |
| 22833 | .kernel_width(3) |
| 22834 | .subsampling(2) |
| 22835 | .padding_left(1) |
| 22836 | .padding_right(1) |
| 22837 | .padding_top(1) |
| 22838 | .padding_bottom(1) |
| 22839 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc3); |
| 22840 | } |
| 22841 | } |
| 22842 | } |
| 22843 | |
| 22844 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, padding_top_eq_1) { |
| 22845 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 22846 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22847 | DWConv2DMicrokernelTester() |
| 22848 | .input_width(input_width) |
| 22849 | .input_height(input_height) |
| 22850 | .kernel_height(3) |
| 22851 | .kernel_width(3) |
| 22852 | .subsampling(2) |
| 22853 | .padding_left(1) |
| 22854 | .padding_right(1) |
| 22855 | .padding_top(0) |
| 22856 | .padding_bottom(1) |
| 22857 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc3); |
| 22858 | } |
| 22859 | } |
| 22860 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22861 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22862 | |
| 22863 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22864 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22865 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_eq_4) { |
| 22866 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 22867 | DWConv2DMicrokernelTester() |
| 22868 | .input_width(input_width) |
| 22869 | .input_height(2) |
| 22870 | .kernel_height(3) |
| 22871 | .kernel_width(3) |
| 22872 | .subsampling(2) |
| 22873 | .padding_left(1) |
| 22874 | .padding_right(1) |
| 22875 | .padding_top(1) |
| 22876 | .padding_bottom(1) |
| 22877 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc4); |
| 22878 | } |
| 22879 | } |
| 22880 | |
| 22881 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_div_4) { |
| 22882 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 22883 | DWConv2DMicrokernelTester() |
| 22884 | .input_width(input_width) |
| 22885 | .input_height(2) |
| 22886 | .kernel_height(3) |
| 22887 | .kernel_width(3) |
| 22888 | .subsampling(2) |
| 22889 | .padding_left(1) |
| 22890 | .padding_right(1) |
| 22891 | .padding_top(1) |
| 22892 | .padding_bottom(1) |
| 22893 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc4); |
| 22894 | } |
| 22895 | } |
| 22896 | |
| 22897 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_lt_4) { |
| 22898 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 22899 | DWConv2DMicrokernelTester() |
| 22900 | .input_width(8) |
| 22901 | .input_height(2) |
| 22902 | .kernel_height(3) |
| 22903 | .kernel_width(3) |
| 22904 | .subsampling(2) |
| 22905 | .padding_left(1) |
| 22906 | .padding_right(1) |
| 22907 | .padding_top(1) |
| 22908 | .padding_bottom(1) |
| 22909 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc4); |
| 22910 | } |
| 22911 | } |
| 22912 | |
| 22913 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_gt_4) { |
| 22914 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 22915 | DWConv2DMicrokernelTester() |
| 22916 | .input_width(input_width) |
| 22917 | .input_height(2) |
| 22918 | .kernel_height(3) |
| 22919 | .kernel_width(3) |
| 22920 | .subsampling(2) |
| 22921 | .padding_left(1) |
| 22922 | .padding_right(1) |
| 22923 | .padding_top(1) |
| 22924 | .padding_bottom(1) |
| 22925 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc4); |
| 22926 | } |
| 22927 | } |
| 22928 | |
| 22929 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_height_eq_1) { |
| 22930 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 22931 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22932 | DWConv2DMicrokernelTester() |
| 22933 | .input_width(input_width) |
| 22934 | .input_height(input_height) |
| 22935 | .kernel_height(3) |
| 22936 | .kernel_width(3) |
| 22937 | .subsampling(2) |
| 22938 | .padding_left(1) |
| 22939 | .padding_right(1) |
| 22940 | .padding_top(1) |
| 22941 | .padding_bottom(1) |
| 22942 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc4); |
| 22943 | } |
| 22944 | } |
| 22945 | } |
| 22946 | |
| 22947 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_height_gt_1) { |
| 22948 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 22949 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22950 | DWConv2DMicrokernelTester() |
| 22951 | .input_width(input_width) |
| 22952 | .input_height(input_height) |
| 22953 | .kernel_height(3) |
| 22954 | .kernel_width(3) |
| 22955 | .subsampling(2) |
| 22956 | .padding_left(1) |
| 22957 | .padding_right(1) |
| 22958 | .padding_top(1) |
| 22959 | .padding_bottom(1) |
| 22960 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc4); |
| 22961 | } |
| 22962 | } |
| 22963 | } |
| 22964 | |
| 22965 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, padding_top_eq_1) { |
| 22966 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 22967 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 22968 | DWConv2DMicrokernelTester() |
| 22969 | .input_width(input_width) |
| 22970 | .input_height(input_height) |
| 22971 | .kernel_height(3) |
| 22972 | .kernel_width(3) |
| 22973 | .subsampling(2) |
| 22974 | .padding_left(1) |
| 22975 | .padding_right(1) |
| 22976 | .padding_top(0) |
| 22977 | .padding_bottom(1) |
| 22978 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc4); |
| 22979 | } |
| 22980 | } |
| 22981 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22982 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22983 | |
| 22984 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 22985 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 22986 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_eq_4) { |
| 22987 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 22988 | DWConv2DMicrokernelTester() |
| 22989 | .input_width(input_width) |
| 22990 | .input_height(4) |
| 22991 | .kernel_height(3) |
| 22992 | .kernel_width(3) |
| 22993 | .subsampling(2) |
| 22994 | .padding_left(1) |
| 22995 | .padding_right(1) |
| 22996 | .padding_top(1) |
| 22997 | .padding_bottom(1) |
| 22998 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| 22999 | } |
| 23000 | } |
| 23001 | |
| 23002 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_div_4) { |
| 23003 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 23004 | DWConv2DMicrokernelTester() |
| 23005 | .input_width(input_width) |
| 23006 | .input_height(4) |
| 23007 | .kernel_height(3) |
| 23008 | .kernel_width(3) |
| 23009 | .subsampling(2) |
| 23010 | .padding_left(1) |
| 23011 | .padding_right(1) |
| 23012 | .padding_top(1) |
| 23013 | .padding_bottom(1) |
| 23014 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| 23015 | } |
| 23016 | } |
| 23017 | |
| 23018 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_lt_4) { |
| 23019 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 23020 | DWConv2DMicrokernelTester() |
| 23021 | .input_width(8) |
| 23022 | .input_height(4) |
| 23023 | .kernel_height(3) |
| 23024 | .kernel_width(3) |
| 23025 | .subsampling(2) |
| 23026 | .padding_left(1) |
| 23027 | .padding_right(1) |
| 23028 | .padding_top(1) |
| 23029 | .padding_bottom(1) |
| 23030 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| 23031 | } |
| 23032 | } |
| 23033 | |
| 23034 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_gt_4) { |
| 23035 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 23036 | DWConv2DMicrokernelTester() |
| 23037 | .input_width(input_width) |
| 23038 | .input_height(4) |
| 23039 | .kernel_height(3) |
| 23040 | .kernel_width(3) |
| 23041 | .subsampling(2) |
| 23042 | .padding_left(1) |
| 23043 | .padding_right(1) |
| 23044 | .padding_top(1) |
| 23045 | .padding_bottom(1) |
| 23046 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| 23047 | } |
| 23048 | } |
| 23049 | |
| 23050 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_eq_2) { |
| 23051 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 23052 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23053 | DWConv2DMicrokernelTester() |
| 23054 | .input_width(input_width) |
| 23055 | .input_height(input_height) |
| 23056 | .kernel_height(3) |
| 23057 | .kernel_width(3) |
| 23058 | .subsampling(2) |
| 23059 | .padding_left(1) |
| 23060 | .padding_right(1) |
| 23061 | .padding_top(1) |
| 23062 | .padding_bottom(1) |
| 23063 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| 23064 | } |
| 23065 | } |
| 23066 | } |
| 23067 | |
| 23068 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_div_2) { |
| 23069 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 23070 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23071 | DWConv2DMicrokernelTester() |
| 23072 | .input_width(input_width) |
| 23073 | .input_height(input_height) |
| 23074 | .kernel_height(3) |
| 23075 | .kernel_width(3) |
| 23076 | .subsampling(2) |
| 23077 | .padding_left(1) |
| 23078 | .padding_right(1) |
| 23079 | .padding_top(1) |
| 23080 | .padding_bottom(1) |
| 23081 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| 23082 | } |
| 23083 | } |
| 23084 | } |
| 23085 | |
| 23086 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_lt_2) { |
| 23087 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 23088 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23089 | DWConv2DMicrokernelTester() |
| 23090 | .input_width(input_width) |
| 23091 | .input_height(input_height) |
| 23092 | .kernel_height(3) |
| 23093 | .kernel_width(3) |
| 23094 | .subsampling(2) |
| 23095 | .padding_left(1) |
| 23096 | .padding_right(1) |
| 23097 | .padding_top(1) |
| 23098 | .padding_bottom(1) |
| 23099 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| 23100 | } |
| 23101 | } |
| 23102 | } |
| 23103 | |
| 23104 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_gt_2) { |
| 23105 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 23106 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23107 | DWConv2DMicrokernelTester() |
| 23108 | .input_width(input_width) |
| 23109 | .input_height(input_height) |
| 23110 | .kernel_height(3) |
| 23111 | .kernel_width(3) |
| 23112 | .subsampling(2) |
| 23113 | .padding_left(1) |
| 23114 | .padding_right(1) |
| 23115 | .padding_top(1) |
| 23116 | .padding_bottom(1) |
| 23117 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| 23118 | } |
| 23119 | } |
| 23120 | } |
| 23121 | |
| 23122 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, padding_top_eq_1) { |
| 23123 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 23124 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23125 | DWConv2DMicrokernelTester() |
| 23126 | .input_width(input_width) |
| 23127 | .input_height(input_height) |
| 23128 | .kernel_height(3) |
| 23129 | .kernel_width(3) |
| 23130 | .subsampling(2) |
| 23131 | .padding_left(1) |
| 23132 | .padding_right(1) |
| 23133 | .padding_top(0) |
| 23134 | .padding_bottom(1) |
| 23135 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4_acc2); |
| 23136 | } |
| 23137 | } |
| 23138 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23139 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c5704bf | 2020-12-21 23:09:00 -0800 | [diff] [blame] | 23140 | |
| 23141 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23142 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23143 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4, output_width_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23144 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 23145 | DWConv2DMicrokernelTester() |
| 23146 | .input_width(input_width) |
| 23147 | .input_height(2) |
| 23148 | .kernel_height(3) |
| 23149 | .kernel_width(3) |
| 23150 | .subsampling(2) |
| 23151 | .padding_left(1) |
| 23152 | .padding_right(1) |
| 23153 | .padding_top(1) |
| 23154 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23155 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23156 | } |
| 23157 | } |
| 23158 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23159 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4, output_width_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23160 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 23161 | DWConv2DMicrokernelTester() |
| 23162 | .input_width(input_width) |
| 23163 | .input_height(2) |
| 23164 | .kernel_height(3) |
| 23165 | .kernel_width(3) |
| 23166 | .subsampling(2) |
| 23167 | .padding_left(1) |
| 23168 | .padding_right(1) |
| 23169 | .padding_top(1) |
| 23170 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23171 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23172 | } |
| 23173 | } |
| 23174 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23175 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4, output_width_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23176 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 23177 | DWConv2DMicrokernelTester() |
| 23178 | .input_width(8) |
| 23179 | .input_height(2) |
| 23180 | .kernel_height(3) |
| 23181 | .kernel_width(3) |
| 23182 | .subsampling(2) |
| 23183 | .padding_left(1) |
| 23184 | .padding_right(1) |
| 23185 | .padding_top(1) |
| 23186 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23187 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23188 | } |
| 23189 | } |
| 23190 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23191 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4, output_width_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23192 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 23193 | DWConv2DMicrokernelTester() |
| 23194 | .input_width(input_width) |
| 23195 | .input_height(2) |
| 23196 | .kernel_height(3) |
| 23197 | .kernel_width(3) |
| 23198 | .subsampling(2) |
| 23199 | .padding_left(1) |
| 23200 | .padding_right(1) |
| 23201 | .padding_top(1) |
| 23202 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23203 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23204 | } |
| 23205 | } |
| 23206 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23207 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4, output_height_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23208 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 23209 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23210 | DWConv2DMicrokernelTester() |
| 23211 | .input_width(input_width) |
| 23212 | .input_height(input_height) |
| 23213 | .kernel_height(3) |
| 23214 | .kernel_width(3) |
| 23215 | .subsampling(2) |
| 23216 | .padding_left(1) |
| 23217 | .padding_right(1) |
| 23218 | .padding_top(1) |
| 23219 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23220 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23221 | } |
| 23222 | } |
| 23223 | } |
| 23224 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23225 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4, output_height_gt_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23226 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 23227 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23228 | DWConv2DMicrokernelTester() |
| 23229 | .input_width(input_width) |
| 23230 | .input_height(input_height) |
| 23231 | .kernel_height(3) |
| 23232 | .kernel_width(3) |
| 23233 | .subsampling(2) |
| 23234 | .padding_left(1) |
| 23235 | .padding_right(1) |
| 23236 | .padding_top(1) |
| 23237 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23238 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23239 | } |
| 23240 | } |
| 23241 | } |
| 23242 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23243 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4, padding_top_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23244 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 23245 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23246 | DWConv2DMicrokernelTester() |
| 23247 | .input_width(input_width) |
| 23248 | .input_height(input_height) |
| 23249 | .kernel_height(3) |
| 23250 | .kernel_width(3) |
| 23251 | .subsampling(2) |
| 23252 | .padding_left(1) |
| 23253 | .padding_right(1) |
| 23254 | .padding_top(0) |
| 23255 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23256 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23257 | } |
| 23258 | } |
| 23259 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23260 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23261 | |
| 23262 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23263 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23264 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4, output_width_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23265 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 23266 | DWConv2DMicrokernelTester() |
| 23267 | .input_width(input_width) |
| 23268 | .input_height(4) |
| 23269 | .kernel_height(3) |
| 23270 | .kernel_width(3) |
| 23271 | .subsampling(2) |
| 23272 | .padding_left(1) |
| 23273 | .padding_right(1) |
| 23274 | .padding_top(1) |
| 23275 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23276 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23277 | } |
| 23278 | } |
| 23279 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23280 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4, output_width_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23281 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 23282 | DWConv2DMicrokernelTester() |
| 23283 | .input_width(input_width) |
| 23284 | .input_height(4) |
| 23285 | .kernel_height(3) |
| 23286 | .kernel_width(3) |
| 23287 | .subsampling(2) |
| 23288 | .padding_left(1) |
| 23289 | .padding_right(1) |
| 23290 | .padding_top(1) |
| 23291 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23292 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23293 | } |
| 23294 | } |
| 23295 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23296 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4, output_width_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23297 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 23298 | DWConv2DMicrokernelTester() |
| 23299 | .input_width(8) |
| 23300 | .input_height(4) |
| 23301 | .kernel_height(3) |
| 23302 | .kernel_width(3) |
| 23303 | .subsampling(2) |
| 23304 | .padding_left(1) |
| 23305 | .padding_right(1) |
| 23306 | .padding_top(1) |
| 23307 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23308 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23309 | } |
| 23310 | } |
| 23311 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23312 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4, output_width_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23313 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 23314 | DWConv2DMicrokernelTester() |
| 23315 | .input_width(input_width) |
| 23316 | .input_height(4) |
| 23317 | .kernel_height(3) |
| 23318 | .kernel_width(3) |
| 23319 | .subsampling(2) |
| 23320 | .padding_left(1) |
| 23321 | .padding_right(1) |
| 23322 | .padding_top(1) |
| 23323 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23324 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23325 | } |
| 23326 | } |
| 23327 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23328 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4, output_height_eq_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23329 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 23330 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23331 | DWConv2DMicrokernelTester() |
| 23332 | .input_width(input_width) |
| 23333 | .input_height(input_height) |
| 23334 | .kernel_height(3) |
| 23335 | .kernel_width(3) |
| 23336 | .subsampling(2) |
| 23337 | .padding_left(1) |
| 23338 | .padding_right(1) |
| 23339 | .padding_top(1) |
| 23340 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23341 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23342 | } |
| 23343 | } |
| 23344 | } |
| 23345 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23346 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4, output_height_div_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23347 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 23348 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23349 | DWConv2DMicrokernelTester() |
| 23350 | .input_width(input_width) |
| 23351 | .input_height(input_height) |
| 23352 | .kernel_height(3) |
| 23353 | .kernel_width(3) |
| 23354 | .subsampling(2) |
| 23355 | .padding_left(1) |
| 23356 | .padding_right(1) |
| 23357 | .padding_top(1) |
| 23358 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23359 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23360 | } |
| 23361 | } |
| 23362 | } |
| 23363 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23364 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4, output_height_lt_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23365 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 23366 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23367 | DWConv2DMicrokernelTester() |
| 23368 | .input_width(input_width) |
| 23369 | .input_height(input_height) |
| 23370 | .kernel_height(3) |
| 23371 | .kernel_width(3) |
| 23372 | .subsampling(2) |
| 23373 | .padding_left(1) |
| 23374 | .padding_right(1) |
| 23375 | .padding_top(1) |
| 23376 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23377 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23378 | } |
| 23379 | } |
| 23380 | } |
| 23381 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23382 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4, output_height_gt_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23383 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 23384 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23385 | DWConv2DMicrokernelTester() |
| 23386 | .input_width(input_width) |
| 23387 | .input_height(input_height) |
| 23388 | .kernel_height(3) |
| 23389 | .kernel_width(3) |
| 23390 | .subsampling(2) |
| 23391 | .padding_left(1) |
| 23392 | .padding_right(1) |
| 23393 | .padding_top(1) |
| 23394 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23395 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23396 | } |
| 23397 | } |
| 23398 | } |
| 23399 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23400 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4, padding_top_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23401 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 23402 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23403 | DWConv2DMicrokernelTester() |
| 23404 | .input_width(input_width) |
| 23405 | .input_height(input_height) |
| 23406 | .kernel_height(3) |
| 23407 | .kernel_width(3) |
| 23408 | .subsampling(2) |
| 23409 | .padding_left(1) |
| 23410 | .padding_right(1) |
| 23411 | .padding_top(0) |
| 23412 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23413 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23414 | } |
| 23415 | } |
| 23416 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23417 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23418 | |
| 23419 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23420 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23421 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_3X4, output_width_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23422 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 23423 | DWConv2DMicrokernelTester() |
| 23424 | .input_width(input_width) |
| 23425 | .input_height(6) |
| 23426 | .kernel_height(3) |
| 23427 | .kernel_width(3) |
| 23428 | .subsampling(2) |
| 23429 | .padding_left(1) |
| 23430 | .padding_right(1) |
| 23431 | .padding_top(1) |
| 23432 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23433 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23434 | } |
| 23435 | } |
| 23436 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23437 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_3X4, output_width_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23438 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 23439 | DWConv2DMicrokernelTester() |
| 23440 | .input_width(input_width) |
| 23441 | .input_height(6) |
| 23442 | .kernel_height(3) |
| 23443 | .kernel_width(3) |
| 23444 | .subsampling(2) |
| 23445 | .padding_left(1) |
| 23446 | .padding_right(1) |
| 23447 | .padding_top(1) |
| 23448 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23449 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23450 | } |
| 23451 | } |
| 23452 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23453 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_3X4, output_width_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23454 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 23455 | DWConv2DMicrokernelTester() |
| 23456 | .input_width(8) |
| 23457 | .input_height(6) |
| 23458 | .kernel_height(3) |
| 23459 | .kernel_width(3) |
| 23460 | .subsampling(2) |
| 23461 | .padding_left(1) |
| 23462 | .padding_right(1) |
| 23463 | .padding_top(1) |
| 23464 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23465 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23466 | } |
| 23467 | } |
| 23468 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23469 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_3X4, output_width_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23470 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 23471 | DWConv2DMicrokernelTester() |
| 23472 | .input_width(input_width) |
| 23473 | .input_height(6) |
| 23474 | .kernel_height(3) |
| 23475 | .kernel_width(3) |
| 23476 | .subsampling(2) |
| 23477 | .padding_left(1) |
| 23478 | .padding_right(1) |
| 23479 | .padding_top(1) |
| 23480 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23481 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23482 | } |
| 23483 | } |
| 23484 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23485 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_3X4, output_height_eq_3) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23486 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 23487 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23488 | DWConv2DMicrokernelTester() |
| 23489 | .input_width(input_width) |
| 23490 | .input_height(input_height) |
| 23491 | .kernel_height(3) |
| 23492 | .kernel_width(3) |
| 23493 | .subsampling(2) |
| 23494 | .padding_left(1) |
| 23495 | .padding_right(1) |
| 23496 | .padding_top(1) |
| 23497 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23498 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23499 | } |
| 23500 | } |
| 23501 | } |
| 23502 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23503 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_3X4, output_height_div_3) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23504 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 23505 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23506 | DWConv2DMicrokernelTester() |
| 23507 | .input_width(input_width) |
| 23508 | .input_height(input_height) |
| 23509 | .kernel_height(3) |
| 23510 | .kernel_width(3) |
| 23511 | .subsampling(2) |
| 23512 | .padding_left(1) |
| 23513 | .padding_right(1) |
| 23514 | .padding_top(1) |
| 23515 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23516 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23517 | } |
| 23518 | } |
| 23519 | } |
| 23520 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23521 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_3X4, output_height_lt_3) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23522 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 23523 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23524 | DWConv2DMicrokernelTester() |
| 23525 | .input_width(input_width) |
| 23526 | .input_height(input_height) |
| 23527 | .kernel_height(3) |
| 23528 | .kernel_width(3) |
| 23529 | .subsampling(2) |
| 23530 | .padding_left(1) |
| 23531 | .padding_right(1) |
| 23532 | .padding_top(1) |
| 23533 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23534 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23535 | } |
| 23536 | } |
| 23537 | } |
| 23538 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23539 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_3X4, output_height_gt_3) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23540 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 23541 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23542 | DWConv2DMicrokernelTester() |
| 23543 | .input_width(input_width) |
| 23544 | .input_height(input_height) |
| 23545 | .kernel_height(3) |
| 23546 | .kernel_width(3) |
| 23547 | .subsampling(2) |
| 23548 | .padding_left(1) |
| 23549 | .padding_right(1) |
| 23550 | .padding_top(1) |
| 23551 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23552 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23553 | } |
| 23554 | } |
| 23555 | } |
| 23556 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23557 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_3X4, padding_top_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23558 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 23559 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23560 | DWConv2DMicrokernelTester() |
| 23561 | .input_width(input_width) |
| 23562 | .input_height(input_height) |
| 23563 | .kernel_height(3) |
| 23564 | .kernel_width(3) |
| 23565 | .subsampling(2) |
| 23566 | .padding_left(1) |
| 23567 | .padding_right(1) |
| 23568 | .padding_top(0) |
| 23569 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23570 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23571 | } |
| 23572 | } |
| 23573 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23574 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23575 | |
| 23576 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23577 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23578 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_4X4, output_width_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23579 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 23580 | DWConv2DMicrokernelTester() |
| 23581 | .input_width(input_width) |
| 23582 | .input_height(8) |
| 23583 | .kernel_height(3) |
| 23584 | .kernel_width(3) |
| 23585 | .subsampling(2) |
| 23586 | .padding_left(1) |
| 23587 | .padding_right(1) |
| 23588 | .padding_top(1) |
| 23589 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23590 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23591 | } |
| 23592 | } |
| 23593 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23594 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_4X4, output_width_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23595 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 23596 | DWConv2DMicrokernelTester() |
| 23597 | .input_width(input_width) |
| 23598 | .input_height(8) |
| 23599 | .kernel_height(3) |
| 23600 | .kernel_width(3) |
| 23601 | .subsampling(2) |
| 23602 | .padding_left(1) |
| 23603 | .padding_right(1) |
| 23604 | .padding_top(1) |
| 23605 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23606 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23607 | } |
| 23608 | } |
| 23609 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23610 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_4X4, output_width_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23611 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 23612 | DWConv2DMicrokernelTester() |
| 23613 | .input_width(8) |
| 23614 | .input_height(8) |
| 23615 | .kernel_height(3) |
| 23616 | .kernel_width(3) |
| 23617 | .subsampling(2) |
| 23618 | .padding_left(1) |
| 23619 | .padding_right(1) |
| 23620 | .padding_top(1) |
| 23621 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23622 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23623 | } |
| 23624 | } |
| 23625 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23626 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_4X4, output_width_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23627 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 23628 | DWConv2DMicrokernelTester() |
| 23629 | .input_width(input_width) |
| 23630 | .input_height(8) |
| 23631 | .kernel_height(3) |
| 23632 | .kernel_width(3) |
| 23633 | .subsampling(2) |
| 23634 | .padding_left(1) |
| 23635 | .padding_right(1) |
| 23636 | .padding_top(1) |
| 23637 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23638 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23639 | } |
| 23640 | } |
| 23641 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23642 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_4X4, output_height_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23643 | for (size_t input_height = 7; input_height < 9; input_height++) { |
| 23644 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23645 | DWConv2DMicrokernelTester() |
| 23646 | .input_width(input_width) |
| 23647 | .input_height(input_height) |
| 23648 | .kernel_height(3) |
| 23649 | .kernel_width(3) |
| 23650 | .subsampling(2) |
| 23651 | .padding_left(1) |
| 23652 | .padding_right(1) |
| 23653 | .padding_top(1) |
| 23654 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23655 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23656 | } |
| 23657 | } |
| 23658 | } |
| 23659 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23660 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_4X4, output_height_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23661 | for (size_t input_height = 16; input_height < 64; input_height += 8) { |
| 23662 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23663 | DWConv2DMicrokernelTester() |
| 23664 | .input_width(input_width) |
| 23665 | .input_height(input_height) |
| 23666 | .kernel_height(3) |
| 23667 | .kernel_width(3) |
| 23668 | .subsampling(2) |
| 23669 | .padding_left(1) |
| 23670 | .padding_right(1) |
| 23671 | .padding_top(1) |
| 23672 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23673 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23674 | } |
| 23675 | } |
| 23676 | } |
| 23677 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23678 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_4X4, output_height_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23679 | for (size_t input_height = 1; input_height < 7; input_height++) { |
| 23680 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23681 | DWConv2DMicrokernelTester() |
| 23682 | .input_width(input_width) |
| 23683 | .input_height(input_height) |
| 23684 | .kernel_height(3) |
| 23685 | .kernel_width(3) |
| 23686 | .subsampling(2) |
| 23687 | .padding_left(1) |
| 23688 | .padding_right(1) |
| 23689 | .padding_top(1) |
| 23690 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23691 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23692 | } |
| 23693 | } |
| 23694 | } |
| 23695 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23696 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_4X4, output_height_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23697 | for (size_t input_height = 9; input_height < 17; input_height++) { |
| 23698 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23699 | DWConv2DMicrokernelTester() |
| 23700 | .input_width(input_width) |
| 23701 | .input_height(input_height) |
| 23702 | .kernel_height(3) |
| 23703 | .kernel_width(3) |
| 23704 | .subsampling(2) |
| 23705 | .padding_left(1) |
| 23706 | .padding_right(1) |
| 23707 | .padding_top(1) |
| 23708 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23709 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23710 | } |
| 23711 | } |
| 23712 | } |
| 23713 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23714 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_4X4, padding_top_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23715 | for (size_t input_height = 2; input_height < 26; input_height++) { |
| 23716 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23717 | DWConv2DMicrokernelTester() |
| 23718 | .input_width(input_width) |
| 23719 | .input_height(input_height) |
| 23720 | .kernel_height(3) |
| 23721 | .kernel_width(3) |
| 23722 | .subsampling(2) |
| 23723 | .padding_left(1) |
| 23724 | .padding_right(1) |
| 23725 | .padding_top(0) |
| 23726 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23727 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23728 | } |
| 23729 | } |
| 23730 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23731 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23732 | |
| 23733 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23734 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23735 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23736 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 23737 | DWConv2DMicrokernelTester() |
| 23738 | .input_width(input_width) |
| 23739 | .input_height(2) |
| 23740 | .kernel_height(3) |
| 23741 | .kernel_width(3) |
| 23742 | .subsampling(2) |
| 23743 | .padding_left(1) |
| 23744 | .padding_right(1) |
| 23745 | .padding_top(1) |
| 23746 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23747 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23748 | } |
| 23749 | } |
| 23750 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23751 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23752 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 23753 | DWConv2DMicrokernelTester() |
| 23754 | .input_width(input_width) |
| 23755 | .input_height(2) |
| 23756 | .kernel_height(3) |
| 23757 | .kernel_width(3) |
| 23758 | .subsampling(2) |
| 23759 | .padding_left(1) |
| 23760 | .padding_right(1) |
| 23761 | .padding_top(1) |
| 23762 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23763 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23764 | } |
| 23765 | } |
| 23766 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23767 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23768 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 23769 | DWConv2DMicrokernelTester() |
| 23770 | .input_width(8) |
| 23771 | .input_height(2) |
| 23772 | .kernel_height(3) |
| 23773 | .kernel_width(3) |
| 23774 | .subsampling(2) |
| 23775 | .padding_left(1) |
| 23776 | .padding_right(1) |
| 23777 | .padding_top(1) |
| 23778 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23779 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23780 | } |
| 23781 | } |
| 23782 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23783 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23784 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 23785 | DWConv2DMicrokernelTester() |
| 23786 | .input_width(input_width) |
| 23787 | .input_height(2) |
| 23788 | .kernel_height(3) |
| 23789 | .kernel_width(3) |
| 23790 | .subsampling(2) |
| 23791 | .padding_left(1) |
| 23792 | .padding_right(1) |
| 23793 | .padding_top(1) |
| 23794 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23795 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23796 | } |
| 23797 | } |
| 23798 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23799 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_height_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23800 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 23801 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23802 | DWConv2DMicrokernelTester() |
| 23803 | .input_width(input_width) |
| 23804 | .input_height(input_height) |
| 23805 | .kernel_height(3) |
| 23806 | .kernel_width(3) |
| 23807 | .subsampling(2) |
| 23808 | .padding_left(1) |
| 23809 | .padding_right(1) |
| 23810 | .padding_top(1) |
| 23811 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23812 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23813 | } |
| 23814 | } |
| 23815 | } |
| 23816 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23817 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_height_gt_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23818 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 23819 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23820 | DWConv2DMicrokernelTester() |
| 23821 | .input_width(input_width) |
| 23822 | .input_height(input_height) |
| 23823 | .kernel_height(3) |
| 23824 | .kernel_width(3) |
| 23825 | .subsampling(2) |
| 23826 | .padding_left(1) |
| 23827 | .padding_right(1) |
| 23828 | .padding_top(1) |
| 23829 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23830 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23831 | } |
| 23832 | } |
| 23833 | } |
| 23834 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23835 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC2, padding_top_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23836 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 23837 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 23838 | DWConv2DMicrokernelTester() |
| 23839 | .input_width(input_width) |
| 23840 | .input_height(input_height) |
| 23841 | .kernel_height(3) |
| 23842 | .kernel_width(3) |
| 23843 | .subsampling(2) |
| 23844 | .padding_left(1) |
| 23845 | .padding_right(1) |
| 23846 | .padding_top(0) |
| 23847 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23848 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23849 | } |
| 23850 | } |
| 23851 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23852 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23853 | |
| 23854 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23855 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23856 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_eq_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23857 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 23858 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23859 | .input_width(input_width) |
| 23860 | .input_height(2) |
| 23861 | .kernel_height(3) |
| 23862 | .kernel_width(3) |
| 23863 | .subsampling(2) |
| 23864 | .padding_left(1) |
| 23865 | .padding_right(1) |
| 23866 | .padding_top(1) |
| 23867 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23868 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23869 | } |
| 23870 | } |
| 23871 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23872 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_div_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23873 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 23874 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23875 | .input_width(input_width) |
| 23876 | .input_height(2) |
| 23877 | .kernel_height(3) |
| 23878 | .kernel_width(3) |
| 23879 | .subsampling(2) |
| 23880 | .padding_left(1) |
| 23881 | .padding_right(1) |
| 23882 | .padding_top(1) |
| 23883 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23884 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23885 | } |
| 23886 | } |
| 23887 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23888 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_lt_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23889 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 23890 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23891 | .input_width(8) |
| 23892 | .input_height(2) |
| 23893 | .kernel_height(3) |
| 23894 | .kernel_width(3) |
| 23895 | .subsampling(2) |
| 23896 | .padding_left(1) |
| 23897 | .padding_right(1) |
| 23898 | .padding_top(1) |
| 23899 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23900 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23901 | } |
| 23902 | } |
| 23903 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23904 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_gt_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23905 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 23906 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23907 | .input_width(input_width) |
| 23908 | .input_height(2) |
| 23909 | .kernel_height(3) |
| 23910 | .kernel_width(3) |
| 23911 | .subsampling(2) |
| 23912 | .padding_left(1) |
| 23913 | .padding_right(1) |
| 23914 | .padding_top(1) |
| 23915 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23916 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23917 | } |
| 23918 | } |
| 23919 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23920 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_height_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23921 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 23922 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 23923 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23924 | .input_width(input_width) |
| 23925 | .input_height(input_height) |
| 23926 | .kernel_height(3) |
| 23927 | .kernel_width(3) |
| 23928 | .subsampling(2) |
| 23929 | .padding_left(1) |
| 23930 | .padding_right(1) |
| 23931 | .padding_top(1) |
| 23932 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23933 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23934 | } |
| 23935 | } |
| 23936 | } |
| 23937 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23938 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_height_gt_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23939 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 23940 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 23941 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23942 | .input_width(input_width) |
| 23943 | .input_height(input_height) |
| 23944 | .kernel_height(3) |
| 23945 | .kernel_width(3) |
| 23946 | .subsampling(2) |
| 23947 | .padding_left(1) |
| 23948 | .padding_right(1) |
| 23949 | .padding_top(1) |
| 23950 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23951 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23952 | } |
| 23953 | } |
| 23954 | } |
| 23955 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23956 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC3, padding_top_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23957 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 23958 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 23959 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23960 | .input_width(input_width) |
| 23961 | .input_height(input_height) |
| 23962 | .kernel_height(3) |
| 23963 | .kernel_width(3) |
| 23964 | .subsampling(2) |
| 23965 | .padding_left(1) |
| 23966 | .padding_right(1) |
| 23967 | .padding_top(0) |
| 23968 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23969 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc3); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23970 | } |
| 23971 | } |
| 23972 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23973 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23974 | |
| 23975 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 23976 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23977 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_eq_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23978 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 23979 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23980 | .input_width(input_width) |
| 23981 | .input_height(2) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23982 | .kernel_height(3) |
| 23983 | .kernel_width(3) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23984 | .subsampling(2) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23985 | .padding_left(1) |
| 23986 | .padding_right(1) |
| 23987 | .padding_top(1) |
| 23988 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23989 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc4); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23990 | } |
| 23991 | } |
| 23992 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 23993 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_div_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23994 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 23995 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 23996 | .input_width(input_width) |
| 23997 | .input_height(2) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 23998 | .kernel_height(3) |
| 23999 | .kernel_width(3) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24000 | .subsampling(2) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24001 | .padding_left(1) |
| 24002 | .padding_right(1) |
| 24003 | .padding_top(1) |
| 24004 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24005 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc4); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24006 | } |
| 24007 | } |
| 24008 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24009 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_lt_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24010 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 24011 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24012 | .input_width(8) |
| 24013 | .input_height(2) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24014 | .kernel_height(3) |
| 24015 | .kernel_width(3) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24016 | .subsampling(2) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24017 | .padding_left(1) |
| 24018 | .padding_right(1) |
| 24019 | .padding_top(1) |
| 24020 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24021 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc4); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24022 | } |
| 24023 | } |
| 24024 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24025 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_gt_4) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24026 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 24027 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24028 | .input_width(input_width) |
| 24029 | .input_height(2) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24030 | .kernel_height(3) |
| 24031 | .kernel_width(3) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24032 | .subsampling(2) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24033 | .padding_left(1) |
| 24034 | .padding_right(1) |
| 24035 | .padding_top(1) |
| 24036 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24037 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc4); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24038 | } |
| 24039 | } |
| 24040 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24041 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_height_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24042 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 24043 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 24044 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24045 | .input_width(input_width) |
| 24046 | .input_height(input_height) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24047 | .kernel_height(3) |
| 24048 | .kernel_width(3) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24049 | .subsampling(2) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24050 | .padding_left(1) |
| 24051 | .padding_right(1) |
| 24052 | .padding_top(1) |
| 24053 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24054 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc4); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24055 | } |
| 24056 | } |
| 24057 | } |
| 24058 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24059 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_height_gt_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24060 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 24061 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 24062 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24063 | .input_width(input_width) |
| 24064 | .input_height(input_height) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24065 | .kernel_height(3) |
| 24066 | .kernel_width(3) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24067 | .subsampling(2) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24068 | .padding_left(1) |
| 24069 | .padding_right(1) |
| 24070 | .padding_top(1) |
| 24071 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24072 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc4); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24073 | } |
| 24074 | } |
| 24075 | } |
| 24076 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24077 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_1X4_ACC4, padding_top_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24078 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 24079 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 24080 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24081 | .input_width(input_width) |
| 24082 | .input_height(input_height) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24083 | .kernel_height(3) |
| 24084 | .kernel_width(3) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24085 | .subsampling(2) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24086 | .padding_left(1) |
| 24087 | .padding_right(1) |
| 24088 | .padding_top(0) |
| 24089 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24090 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24091 | } |
| 24092 | } |
| 24093 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24094 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24095 | |
| 24096 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24097 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24098 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24099 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 24100 | DWConv2DMicrokernelTester() |
| 24101 | .input_width(input_width) |
| 24102 | .input_height(4) |
| 24103 | .kernel_height(3) |
| 24104 | .kernel_width(3) |
| 24105 | .subsampling(2) |
| 24106 | .padding_left(1) |
| 24107 | .padding_right(1) |
| 24108 | .padding_top(1) |
| 24109 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24110 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24111 | } |
| 24112 | } |
| 24113 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24114 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24115 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 24116 | DWConv2DMicrokernelTester() |
| 24117 | .input_width(input_width) |
| 24118 | .input_height(4) |
| 24119 | .kernel_height(3) |
| 24120 | .kernel_width(3) |
| 24121 | .subsampling(2) |
| 24122 | .padding_left(1) |
| 24123 | .padding_right(1) |
| 24124 | .padding_top(1) |
| 24125 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24126 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24127 | } |
| 24128 | } |
| 24129 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24130 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24131 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 24132 | DWConv2DMicrokernelTester() |
| 24133 | .input_width(8) |
| 24134 | .input_height(4) |
| 24135 | .kernel_height(3) |
| 24136 | .kernel_width(3) |
| 24137 | .subsampling(2) |
| 24138 | .padding_left(1) |
| 24139 | .padding_right(1) |
| 24140 | .padding_top(1) |
| 24141 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24142 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24143 | } |
| 24144 | } |
| 24145 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24146 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24147 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 24148 | DWConv2DMicrokernelTester() |
| 24149 | .input_width(input_width) |
| 24150 | .input_height(4) |
| 24151 | .kernel_height(3) |
| 24152 | .kernel_width(3) |
| 24153 | .subsampling(2) |
| 24154 | .padding_left(1) |
| 24155 | .padding_right(1) |
| 24156 | .padding_top(1) |
| 24157 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24158 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24159 | } |
| 24160 | } |
| 24161 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24162 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_eq_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24163 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 24164 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24165 | DWConv2DMicrokernelTester() |
| 24166 | .input_width(input_width) |
| 24167 | .input_height(input_height) |
| 24168 | .kernel_height(3) |
| 24169 | .kernel_width(3) |
| 24170 | .subsampling(2) |
| 24171 | .padding_left(1) |
| 24172 | .padding_right(1) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24173 | .padding_top(1) |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24174 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24175 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24176 | } |
| 24177 | } |
| 24178 | } |
| 24179 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24180 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_div_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24181 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 24182 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24183 | DWConv2DMicrokernelTester() |
| 24184 | .input_width(input_width) |
| 24185 | .input_height(input_height) |
| 24186 | .kernel_height(3) |
| 24187 | .kernel_width(3) |
| 24188 | .subsampling(2) |
| 24189 | .padding_left(1) |
| 24190 | .padding_right(1) |
| 24191 | .padding_top(1) |
| 24192 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24193 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24194 | } |
| 24195 | } |
| 24196 | } |
| 24197 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24198 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_lt_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24199 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 24200 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24201 | DWConv2DMicrokernelTester() |
| 24202 | .input_width(input_width) |
| 24203 | .input_height(input_height) |
| 24204 | .kernel_height(3) |
| 24205 | .kernel_width(3) |
| 24206 | .subsampling(2) |
| 24207 | .padding_left(1) |
| 24208 | .padding_right(1) |
| 24209 | .padding_top(1) |
| 24210 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24211 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24212 | } |
| 24213 | } |
| 24214 | } |
| 24215 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24216 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_gt_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24217 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 24218 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24219 | DWConv2DMicrokernelTester() |
| 24220 | .input_width(input_width) |
| 24221 | .input_height(input_height) |
| 24222 | .kernel_height(3) |
| 24223 | .kernel_width(3) |
| 24224 | .subsampling(2) |
| 24225 | .padding_left(1) |
| 24226 | .padding_right(1) |
| 24227 | .padding_top(1) |
| 24228 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24229 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24230 | } |
| 24231 | } |
| 24232 | } |
| 24233 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24234 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_ARM_SPLAT_2X4_ACC2, padding_top_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24235 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 24236 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24237 | DWConv2DMicrokernelTester() |
| 24238 | .input_width(input_width) |
| 24239 | .input_height(input_height) |
| 24240 | .kernel_height(3) |
| 24241 | .kernel_width(3) |
| 24242 | .subsampling(2) |
| 24243 | .padding_left(1) |
| 24244 | .padding_right(1) |
| 24245 | .padding_top(0) |
| 24246 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24247 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24248 | } |
| 24249 | } |
| 24250 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24251 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24252 | |
| 24253 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24254 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24255 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4, output_width_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24256 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 24257 | DWConv2DMicrokernelTester() |
| 24258 | .input_width(input_width) |
| 24259 | .input_height(2) |
| 24260 | .kernel_height(3) |
| 24261 | .kernel_width(3) |
| 24262 | .subsampling(2) |
| 24263 | .padding_left(1) |
| 24264 | .padding_right(1) |
| 24265 | .padding_top(1) |
| 24266 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24267 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24268 | } |
| 24269 | } |
| 24270 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24271 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4, output_width_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24272 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 24273 | DWConv2DMicrokernelTester() |
| 24274 | .input_width(input_width) |
| 24275 | .input_height(2) |
| 24276 | .kernel_height(3) |
| 24277 | .kernel_width(3) |
| 24278 | .subsampling(2) |
| 24279 | .padding_left(1) |
| 24280 | .padding_right(1) |
| 24281 | .padding_top(1) |
| 24282 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24283 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24284 | } |
| 24285 | } |
| 24286 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24287 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4, output_width_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24288 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 24289 | DWConv2DMicrokernelTester() |
| 24290 | .input_width(8) |
| 24291 | .input_height(2) |
| 24292 | .kernel_height(3) |
| 24293 | .kernel_width(3) |
| 24294 | .subsampling(2) |
| 24295 | .padding_left(1) |
| 24296 | .padding_right(1) |
| 24297 | .padding_top(1) |
| 24298 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24299 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24300 | } |
| 24301 | } |
| 24302 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24303 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4, output_width_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24304 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 24305 | DWConv2DMicrokernelTester() |
| 24306 | .input_width(input_width) |
| 24307 | .input_height(2) |
| 24308 | .kernel_height(3) |
| 24309 | .kernel_width(3) |
| 24310 | .subsampling(2) |
| 24311 | .padding_left(1) |
| 24312 | .padding_right(1) |
| 24313 | .padding_top(1) |
| 24314 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24315 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24316 | } |
| 24317 | } |
| 24318 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24319 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4, output_height_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24320 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 24321 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24322 | DWConv2DMicrokernelTester() |
| 24323 | .input_width(input_width) |
| 24324 | .input_height(input_height) |
| 24325 | .kernel_height(3) |
| 24326 | .kernel_width(3) |
| 24327 | .subsampling(2) |
| 24328 | .padding_left(1) |
| 24329 | .padding_right(1) |
| 24330 | .padding_top(1) |
| 24331 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24332 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24333 | } |
| 24334 | } |
| 24335 | } |
| 24336 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24337 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4, output_height_gt_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24338 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 24339 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24340 | DWConv2DMicrokernelTester() |
| 24341 | .input_width(input_width) |
| 24342 | .input_height(input_height) |
| 24343 | .kernel_height(3) |
| 24344 | .kernel_width(3) |
| 24345 | .subsampling(2) |
| 24346 | .padding_left(1) |
| 24347 | .padding_right(1) |
| 24348 | .padding_top(1) |
| 24349 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24350 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24351 | } |
| 24352 | } |
| 24353 | } |
| 24354 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24355 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4, padding_top_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24356 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 24357 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24358 | DWConv2DMicrokernelTester() |
| 24359 | .input_width(input_width) |
| 24360 | .input_height(input_height) |
| 24361 | .kernel_height(3) |
| 24362 | .kernel_width(3) |
| 24363 | .subsampling(2) |
| 24364 | .padding_left(1) |
| 24365 | .padding_right(1) |
| 24366 | .padding_top(0) |
| 24367 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24368 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24369 | } |
| 24370 | } |
| 24371 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24372 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24373 | |
| 24374 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24375 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24376 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4, output_width_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24377 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 24378 | DWConv2DMicrokernelTester() |
| 24379 | .input_width(input_width) |
| 24380 | .input_height(4) |
| 24381 | .kernel_height(3) |
| 24382 | .kernel_width(3) |
| 24383 | .subsampling(2) |
| 24384 | .padding_left(1) |
| 24385 | .padding_right(1) |
| 24386 | .padding_top(1) |
| 24387 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24388 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24389 | } |
| 24390 | } |
| 24391 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24392 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4, output_width_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24393 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 24394 | DWConv2DMicrokernelTester() |
| 24395 | .input_width(input_width) |
| 24396 | .input_height(4) |
| 24397 | .kernel_height(3) |
| 24398 | .kernel_width(3) |
| 24399 | .subsampling(2) |
| 24400 | .padding_left(1) |
| 24401 | .padding_right(1) |
| 24402 | .padding_top(1) |
| 24403 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24404 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24405 | } |
| 24406 | } |
| 24407 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24408 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4, output_width_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24409 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 24410 | DWConv2DMicrokernelTester() |
| 24411 | .input_width(8) |
| 24412 | .input_height(4) |
| 24413 | .kernel_height(3) |
| 24414 | .kernel_width(3) |
| 24415 | .subsampling(2) |
| 24416 | .padding_left(1) |
| 24417 | .padding_right(1) |
| 24418 | .padding_top(1) |
| 24419 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24420 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24421 | } |
| 24422 | } |
| 24423 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24424 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4, output_width_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24425 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 24426 | DWConv2DMicrokernelTester() |
| 24427 | .input_width(input_width) |
| 24428 | .input_height(4) |
| 24429 | .kernel_height(3) |
| 24430 | .kernel_width(3) |
| 24431 | .subsampling(2) |
| 24432 | .padding_left(1) |
| 24433 | .padding_right(1) |
| 24434 | .padding_top(1) |
| 24435 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24436 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24437 | } |
| 24438 | } |
| 24439 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24440 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4, output_height_eq_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24441 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 24442 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24443 | DWConv2DMicrokernelTester() |
| 24444 | .input_width(input_width) |
| 24445 | .input_height(input_height) |
| 24446 | .kernel_height(3) |
| 24447 | .kernel_width(3) |
| 24448 | .subsampling(2) |
| 24449 | .padding_left(1) |
| 24450 | .padding_right(1) |
| 24451 | .padding_top(1) |
| 24452 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24453 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24454 | } |
| 24455 | } |
| 24456 | } |
| 24457 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24458 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4, output_height_div_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24459 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 24460 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24461 | DWConv2DMicrokernelTester() |
| 24462 | .input_width(input_width) |
| 24463 | .input_height(input_height) |
| 24464 | .kernel_height(3) |
| 24465 | .kernel_width(3) |
| 24466 | .subsampling(2) |
| 24467 | .padding_left(1) |
| 24468 | .padding_right(1) |
| 24469 | .padding_top(1) |
| 24470 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24471 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24472 | } |
| 24473 | } |
| 24474 | } |
| 24475 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24476 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4, output_height_lt_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24477 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 24478 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24479 | DWConv2DMicrokernelTester() |
| 24480 | .input_width(input_width) |
| 24481 | .input_height(input_height) |
| 24482 | .kernel_height(3) |
| 24483 | .kernel_width(3) |
| 24484 | .subsampling(2) |
| 24485 | .padding_left(1) |
| 24486 | .padding_right(1) |
| 24487 | .padding_top(1) |
| 24488 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24489 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24490 | } |
| 24491 | } |
| 24492 | } |
| 24493 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24494 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4, output_height_gt_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24495 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 24496 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24497 | DWConv2DMicrokernelTester() |
| 24498 | .input_width(input_width) |
| 24499 | .input_height(input_height) |
| 24500 | .kernel_height(3) |
| 24501 | .kernel_width(3) |
| 24502 | .subsampling(2) |
| 24503 | .padding_left(1) |
| 24504 | .padding_right(1) |
| 24505 | .padding_top(1) |
| 24506 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24507 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24508 | } |
| 24509 | } |
| 24510 | } |
| 24511 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24512 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4, padding_top_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24513 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 24514 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24515 | DWConv2DMicrokernelTester() |
| 24516 | .input_width(input_width) |
| 24517 | .input_height(input_height) |
| 24518 | .kernel_height(3) |
| 24519 | .kernel_width(3) |
| 24520 | .subsampling(2) |
| 24521 | .padding_left(1) |
| 24522 | .padding_right(1) |
| 24523 | .padding_top(0) |
| 24524 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24525 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24526 | } |
| 24527 | } |
| 24528 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24529 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24530 | |
| 24531 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24532 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24533 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_3X4, output_width_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24534 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 24535 | DWConv2DMicrokernelTester() |
| 24536 | .input_width(input_width) |
| 24537 | .input_height(6) |
| 24538 | .kernel_height(3) |
| 24539 | .kernel_width(3) |
| 24540 | .subsampling(2) |
| 24541 | .padding_left(1) |
| 24542 | .padding_right(1) |
| 24543 | .padding_top(1) |
| 24544 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24545 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24546 | } |
| 24547 | } |
| 24548 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24549 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_3X4, output_width_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24550 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 24551 | DWConv2DMicrokernelTester() |
| 24552 | .input_width(input_width) |
| 24553 | .input_height(6) |
| 24554 | .kernel_height(3) |
| 24555 | .kernel_width(3) |
| 24556 | .subsampling(2) |
| 24557 | .padding_left(1) |
| 24558 | .padding_right(1) |
| 24559 | .padding_top(1) |
| 24560 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24561 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24562 | } |
| 24563 | } |
| 24564 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24565 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_3X4, output_width_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24566 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 24567 | DWConv2DMicrokernelTester() |
| 24568 | .input_width(8) |
| 24569 | .input_height(6) |
| 24570 | .kernel_height(3) |
| 24571 | .kernel_width(3) |
| 24572 | .subsampling(2) |
| 24573 | .padding_left(1) |
| 24574 | .padding_right(1) |
| 24575 | .padding_top(1) |
| 24576 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24577 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24578 | } |
| 24579 | } |
| 24580 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24581 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_3X4, output_width_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24582 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 24583 | DWConv2DMicrokernelTester() |
| 24584 | .input_width(input_width) |
| 24585 | .input_height(6) |
| 24586 | .kernel_height(3) |
| 24587 | .kernel_width(3) |
| 24588 | .subsampling(2) |
| 24589 | .padding_left(1) |
| 24590 | .padding_right(1) |
| 24591 | .padding_top(1) |
| 24592 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24593 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24594 | } |
| 24595 | } |
| 24596 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24597 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_3X4, output_height_eq_3) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24598 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 24599 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24600 | DWConv2DMicrokernelTester() |
| 24601 | .input_width(input_width) |
| 24602 | .input_height(input_height) |
| 24603 | .kernel_height(3) |
| 24604 | .kernel_width(3) |
| 24605 | .subsampling(2) |
| 24606 | .padding_left(1) |
| 24607 | .padding_right(1) |
| 24608 | .padding_top(1) |
| 24609 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24610 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24611 | } |
| 24612 | } |
| 24613 | } |
| 24614 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24615 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_3X4, output_height_div_3) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24616 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 24617 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24618 | DWConv2DMicrokernelTester() |
| 24619 | .input_width(input_width) |
| 24620 | .input_height(input_height) |
| 24621 | .kernel_height(3) |
| 24622 | .kernel_width(3) |
| 24623 | .subsampling(2) |
| 24624 | .padding_left(1) |
| 24625 | .padding_right(1) |
| 24626 | .padding_top(1) |
| 24627 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24628 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24629 | } |
| 24630 | } |
| 24631 | } |
| 24632 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24633 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_3X4, output_height_lt_3) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24634 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 24635 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24636 | DWConv2DMicrokernelTester() |
| 24637 | .input_width(input_width) |
| 24638 | .input_height(input_height) |
| 24639 | .kernel_height(3) |
| 24640 | .kernel_width(3) |
| 24641 | .subsampling(2) |
| 24642 | .padding_left(1) |
| 24643 | .padding_right(1) |
| 24644 | .padding_top(1) |
| 24645 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24646 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24647 | } |
| 24648 | } |
| 24649 | } |
| 24650 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24651 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_3X4, output_height_gt_3) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24652 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 24653 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24654 | DWConv2DMicrokernelTester() |
| 24655 | .input_width(input_width) |
| 24656 | .input_height(input_height) |
| 24657 | .kernel_height(3) |
| 24658 | .kernel_width(3) |
| 24659 | .subsampling(2) |
| 24660 | .padding_left(1) |
| 24661 | .padding_right(1) |
| 24662 | .padding_top(1) |
| 24663 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24664 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24665 | } |
| 24666 | } |
| 24667 | } |
| 24668 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24669 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_3X4, padding_top_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24670 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 24671 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24672 | DWConv2DMicrokernelTester() |
| 24673 | .input_width(input_width) |
| 24674 | .input_height(input_height) |
| 24675 | .kernel_height(3) |
| 24676 | .kernel_width(3) |
| 24677 | .subsampling(2) |
| 24678 | .padding_left(1) |
| 24679 | .padding_right(1) |
| 24680 | .padding_top(0) |
| 24681 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24682 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_3x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24683 | } |
| 24684 | } |
| 24685 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24686 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24687 | |
| 24688 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24689 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24690 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_4X4, output_width_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24691 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 24692 | DWConv2DMicrokernelTester() |
| 24693 | .input_width(input_width) |
| 24694 | .input_height(8) |
| 24695 | .kernel_height(3) |
| 24696 | .kernel_width(3) |
| 24697 | .subsampling(2) |
| 24698 | .padding_left(1) |
| 24699 | .padding_right(1) |
| 24700 | .padding_top(1) |
| 24701 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24702 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24703 | } |
| 24704 | } |
| 24705 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24706 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_4X4, output_width_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24707 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 24708 | DWConv2DMicrokernelTester() |
| 24709 | .input_width(input_width) |
| 24710 | .input_height(8) |
| 24711 | .kernel_height(3) |
| 24712 | .kernel_width(3) |
| 24713 | .subsampling(2) |
| 24714 | .padding_left(1) |
| 24715 | .padding_right(1) |
| 24716 | .padding_top(1) |
| 24717 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24718 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24719 | } |
| 24720 | } |
| 24721 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24722 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_4X4, output_width_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24723 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 24724 | DWConv2DMicrokernelTester() |
| 24725 | .input_width(8) |
| 24726 | .input_height(8) |
| 24727 | .kernel_height(3) |
| 24728 | .kernel_width(3) |
| 24729 | .subsampling(2) |
| 24730 | .padding_left(1) |
| 24731 | .padding_right(1) |
| 24732 | .padding_top(1) |
| 24733 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24734 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24735 | } |
| 24736 | } |
| 24737 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24738 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_4X4, output_width_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24739 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 24740 | DWConv2DMicrokernelTester() |
| 24741 | .input_width(input_width) |
| 24742 | .input_height(8) |
| 24743 | .kernel_height(3) |
| 24744 | .kernel_width(3) |
| 24745 | .subsampling(2) |
| 24746 | .padding_left(1) |
| 24747 | .padding_right(1) |
| 24748 | .padding_top(1) |
| 24749 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24750 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24751 | } |
| 24752 | } |
| 24753 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24754 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_4X4, output_height_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24755 | for (size_t input_height = 7; input_height < 9; input_height++) { |
| 24756 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24757 | DWConv2DMicrokernelTester() |
| 24758 | .input_width(input_width) |
| 24759 | .input_height(input_height) |
| 24760 | .kernel_height(3) |
| 24761 | .kernel_width(3) |
| 24762 | .subsampling(2) |
| 24763 | .padding_left(1) |
| 24764 | .padding_right(1) |
| 24765 | .padding_top(1) |
| 24766 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24767 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24768 | } |
| 24769 | } |
| 24770 | } |
| 24771 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24772 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_4X4, output_height_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24773 | for (size_t input_height = 16; input_height < 64; input_height += 8) { |
| 24774 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24775 | DWConv2DMicrokernelTester() |
| 24776 | .input_width(input_width) |
| 24777 | .input_height(input_height) |
| 24778 | .kernel_height(3) |
| 24779 | .kernel_width(3) |
| 24780 | .subsampling(2) |
| 24781 | .padding_left(1) |
| 24782 | .padding_right(1) |
| 24783 | .padding_top(1) |
| 24784 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24785 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24786 | } |
| 24787 | } |
| 24788 | } |
| 24789 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24790 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_4X4, output_height_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24791 | for (size_t input_height = 1; input_height < 7; input_height++) { |
| 24792 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24793 | DWConv2DMicrokernelTester() |
| 24794 | .input_width(input_width) |
| 24795 | .input_height(input_height) |
| 24796 | .kernel_height(3) |
| 24797 | .kernel_width(3) |
| 24798 | .subsampling(2) |
| 24799 | .padding_left(1) |
| 24800 | .padding_right(1) |
| 24801 | .padding_top(1) |
| 24802 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24803 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24804 | } |
| 24805 | } |
| 24806 | } |
| 24807 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24808 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_4X4, output_height_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24809 | for (size_t input_height = 9; input_height < 17; input_height++) { |
| 24810 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24811 | DWConv2DMicrokernelTester() |
| 24812 | .input_width(input_width) |
| 24813 | .input_height(input_height) |
| 24814 | .kernel_height(3) |
| 24815 | .kernel_width(3) |
| 24816 | .subsampling(2) |
| 24817 | .padding_left(1) |
| 24818 | .padding_right(1) |
| 24819 | .padding_top(1) |
| 24820 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24821 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24822 | } |
| 24823 | } |
| 24824 | } |
| 24825 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24826 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_4X4, padding_top_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24827 | for (size_t input_height = 2; input_height < 26; input_height++) { |
| 24828 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24829 | DWConv2DMicrokernelTester() |
| 24830 | .input_width(input_width) |
| 24831 | .input_height(input_height) |
| 24832 | .kernel_height(3) |
| 24833 | .kernel_width(3) |
| 24834 | .subsampling(2) |
| 24835 | .padding_left(1) |
| 24836 | .padding_right(1) |
| 24837 | .padding_top(0) |
| 24838 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24839 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_4x4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24840 | } |
| 24841 | } |
| 24842 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24843 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24844 | |
| 24845 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24846 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24847 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24848 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 24849 | DWConv2DMicrokernelTester() |
| 24850 | .input_width(input_width) |
| 24851 | .input_height(2) |
| 24852 | .kernel_height(3) |
| 24853 | .kernel_width(3) |
| 24854 | .subsampling(2) |
| 24855 | .padding_left(1) |
| 24856 | .padding_right(1) |
| 24857 | .padding_top(1) |
| 24858 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24859 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24860 | } |
| 24861 | } |
| 24862 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24863 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24864 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 24865 | DWConv2DMicrokernelTester() |
| 24866 | .input_width(input_width) |
| 24867 | .input_height(2) |
| 24868 | .kernel_height(3) |
| 24869 | .kernel_width(3) |
| 24870 | .subsampling(2) |
| 24871 | .padding_left(1) |
| 24872 | .padding_right(1) |
| 24873 | .padding_top(1) |
| 24874 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24875 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24876 | } |
| 24877 | } |
| 24878 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24879 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24880 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 24881 | DWConv2DMicrokernelTester() |
| 24882 | .input_width(8) |
| 24883 | .input_height(2) |
| 24884 | .kernel_height(3) |
| 24885 | .kernel_width(3) |
| 24886 | .subsampling(2) |
| 24887 | .padding_left(1) |
| 24888 | .padding_right(1) |
| 24889 | .padding_top(1) |
| 24890 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24891 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24892 | } |
| 24893 | } |
| 24894 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24895 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24896 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 24897 | DWConv2DMicrokernelTester() |
| 24898 | .input_width(input_width) |
| 24899 | .input_height(2) |
| 24900 | .kernel_height(3) |
| 24901 | .kernel_width(3) |
| 24902 | .subsampling(2) |
| 24903 | .padding_left(1) |
| 24904 | .padding_right(1) |
| 24905 | .padding_top(1) |
| 24906 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24907 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24908 | } |
| 24909 | } |
| 24910 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24911 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC2, output_height_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24912 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 24913 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24914 | DWConv2DMicrokernelTester() |
| 24915 | .input_width(input_width) |
| 24916 | .input_height(input_height) |
| 24917 | .kernel_height(3) |
| 24918 | .kernel_width(3) |
| 24919 | .subsampling(2) |
| 24920 | .padding_left(1) |
| 24921 | .padding_right(1) |
| 24922 | .padding_top(1) |
| 24923 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24924 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24925 | } |
| 24926 | } |
| 24927 | } |
| 24928 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24929 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC2, output_height_gt_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24930 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 24931 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24932 | DWConv2DMicrokernelTester() |
| 24933 | .input_width(input_width) |
| 24934 | .input_height(input_height) |
| 24935 | .kernel_height(3) |
| 24936 | .kernel_width(3) |
| 24937 | .subsampling(2) |
| 24938 | .padding_left(1) |
| 24939 | .padding_right(1) |
| 24940 | .padding_top(1) |
| 24941 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24942 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24943 | } |
| 24944 | } |
| 24945 | } |
| 24946 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24947 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC2, padding_top_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 24948 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 24949 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 24950 | DWConv2DMicrokernelTester() |
| 24951 | .input_width(input_width) |
| 24952 | .input_height(input_height) |
| 24953 | .kernel_height(3) |
| 24954 | .kernel_width(3) |
| 24955 | .subsampling(2) |
| 24956 | .padding_left(1) |
| 24957 | .padding_right(1) |
| 24958 | .padding_top(0) |
| 24959 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24960 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc2); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24961 | } |
| 24962 | } |
| 24963 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24964 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 24965 | |
| 24966 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 24967 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24968 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_eq_4) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 24969 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 24970 | DWConv2DMicrokernelTester() |
| 24971 | .input_width(input_width) |
| 24972 | .input_height(2) |
| 24973 | .kernel_height(3) |
| 24974 | .kernel_width(3) |
| 24975 | .subsampling(2) |
| 24976 | .padding_left(1) |
| 24977 | .padding_right(1) |
| 24978 | .padding_top(1) |
| 24979 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24980 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 24981 | } |
| 24982 | } |
| 24983 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24984 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_div_4) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 24985 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 24986 | DWConv2DMicrokernelTester() |
| 24987 | .input_width(input_width) |
| 24988 | .input_height(2) |
| 24989 | .kernel_height(3) |
| 24990 | .kernel_width(3) |
| 24991 | .subsampling(2) |
| 24992 | .padding_left(1) |
| 24993 | .padding_right(1) |
| 24994 | .padding_top(1) |
| 24995 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 24996 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 24997 | } |
| 24998 | } |
| 24999 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25000 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_lt_4) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 25001 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 25002 | DWConv2DMicrokernelTester() |
| 25003 | .input_width(8) |
| 25004 | .input_height(2) |
| 25005 | .kernel_height(3) |
| 25006 | .kernel_width(3) |
| 25007 | .subsampling(2) |
| 25008 | .padding_left(1) |
| 25009 | .padding_right(1) |
| 25010 | .padding_top(1) |
| 25011 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25012 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 25013 | } |
| 25014 | } |
| 25015 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25016 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_gt_4) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 25017 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 25018 | DWConv2DMicrokernelTester() |
| 25019 | .input_width(input_width) |
| 25020 | .input_height(2) |
| 25021 | .kernel_height(3) |
| 25022 | .kernel_width(3) |
| 25023 | .subsampling(2) |
| 25024 | .padding_left(1) |
| 25025 | .padding_right(1) |
| 25026 | .padding_top(1) |
| 25027 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25028 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 25029 | } |
| 25030 | } |
| 25031 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25032 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC3, output_height_eq_1) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 25033 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 25034 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 25035 | DWConv2DMicrokernelTester() |
| 25036 | .input_width(input_width) |
| 25037 | .input_height(input_height) |
| 25038 | .kernel_height(3) |
| 25039 | .kernel_width(3) |
| 25040 | .subsampling(2) |
| 25041 | .padding_left(1) |
| 25042 | .padding_right(1) |
| 25043 | .padding_top(1) |
| 25044 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25045 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 25046 | } |
| 25047 | } |
| 25048 | } |
| 25049 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25050 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC3, output_height_gt_1) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 25051 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 25052 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 25053 | DWConv2DMicrokernelTester() |
| 25054 | .input_width(input_width) |
| 25055 | .input_height(input_height) |
| 25056 | .kernel_height(3) |
| 25057 | .kernel_width(3) |
| 25058 | .subsampling(2) |
| 25059 | .padding_left(1) |
| 25060 | .padding_right(1) |
| 25061 | .padding_top(1) |
| 25062 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25063 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 25064 | } |
| 25065 | } |
| 25066 | } |
| 25067 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25068 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC3, padding_top_eq_1) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 25069 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 25070 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 25071 | DWConv2DMicrokernelTester() |
| 25072 | .input_width(input_width) |
| 25073 | .input_height(input_height) |
| 25074 | .kernel_height(3) |
| 25075 | .kernel_width(3) |
| 25076 | .subsampling(2) |
| 25077 | .padding_left(1) |
| 25078 | .padding_right(1) |
| 25079 | .padding_top(0) |
| 25080 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25081 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 25082 | } |
| 25083 | } |
| 25084 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25085 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 25086 | |
| 25087 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25088 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25089 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25090 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 25091 | DWConv2DMicrokernelTester() |
| 25092 | .input_width(input_width) |
| 25093 | .input_height(2) |
| 25094 | .kernel_height(3) |
| 25095 | .kernel_width(3) |
| 25096 | .subsampling(2) |
| 25097 | .padding_left(1) |
| 25098 | .padding_right(1) |
| 25099 | .padding_top(1) |
| 25100 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25101 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25102 | } |
| 25103 | } |
| 25104 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25105 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25106 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 25107 | DWConv2DMicrokernelTester() |
| 25108 | .input_width(input_width) |
| 25109 | .input_height(2) |
| 25110 | .kernel_height(3) |
| 25111 | .kernel_width(3) |
| 25112 | .subsampling(2) |
| 25113 | .padding_left(1) |
| 25114 | .padding_right(1) |
| 25115 | .padding_top(1) |
| 25116 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25117 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25118 | } |
| 25119 | } |
| 25120 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25121 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25122 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 25123 | DWConv2DMicrokernelTester() |
| 25124 | .input_width(8) |
| 25125 | .input_height(2) |
| 25126 | .kernel_height(3) |
| 25127 | .kernel_width(3) |
| 25128 | .subsampling(2) |
| 25129 | .padding_left(1) |
| 25130 | .padding_right(1) |
| 25131 | .padding_top(1) |
| 25132 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25133 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25134 | } |
| 25135 | } |
| 25136 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25137 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25138 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 25139 | DWConv2DMicrokernelTester() |
| 25140 | .input_width(input_width) |
| 25141 | .input_height(2) |
| 25142 | .kernel_height(3) |
| 25143 | .kernel_width(3) |
| 25144 | .subsampling(2) |
| 25145 | .padding_left(1) |
| 25146 | .padding_right(1) |
| 25147 | .padding_top(1) |
| 25148 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25149 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25150 | } |
| 25151 | } |
| 25152 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25153 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC4, output_height_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25154 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 25155 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 25156 | DWConv2DMicrokernelTester() |
| 25157 | .input_width(input_width) |
| 25158 | .input_height(input_height) |
| 25159 | .kernel_height(3) |
| 25160 | .kernel_width(3) |
| 25161 | .subsampling(2) |
| 25162 | .padding_left(1) |
| 25163 | .padding_right(1) |
| 25164 | .padding_top(1) |
| 25165 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25166 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25167 | } |
| 25168 | } |
| 25169 | } |
| 25170 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25171 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC4, output_height_gt_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25172 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 25173 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 25174 | DWConv2DMicrokernelTester() |
| 25175 | .input_width(input_width) |
| 25176 | .input_height(input_height) |
| 25177 | .kernel_height(3) |
| 25178 | .kernel_width(3) |
| 25179 | .subsampling(2) |
| 25180 | .padding_left(1) |
| 25181 | .padding_right(1) |
| 25182 | .padding_top(1) |
| 25183 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25184 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25185 | } |
| 25186 | } |
| 25187 | } |
| 25188 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25189 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_1X4_ACC4, padding_top_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25190 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 25191 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 25192 | DWConv2DMicrokernelTester() |
| 25193 | .input_width(input_width) |
| 25194 | .input_height(input_height) |
| 25195 | .kernel_height(3) |
| 25196 | .kernel_width(3) |
| 25197 | .subsampling(2) |
| 25198 | .padding_left(1) |
| 25199 | .padding_right(1) |
| 25200 | .padding_top(0) |
| 25201 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25202 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25203 | } |
| 25204 | } |
| 25205 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25206 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25207 | |
| 25208 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25209 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25210 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_eq_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25211 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 25212 | DWConv2DMicrokernelTester() |
| 25213 | .input_width(input_width) |
| 25214 | .input_height(4) |
| 25215 | .kernel_height(3) |
| 25216 | .kernel_width(3) |
| 25217 | .subsampling(2) |
| 25218 | .padding_left(1) |
| 25219 | .padding_right(1) |
| 25220 | .padding_top(1) |
| 25221 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25222 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25223 | } |
| 25224 | } |
| 25225 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25226 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_div_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25227 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 25228 | DWConv2DMicrokernelTester() |
| 25229 | .input_width(input_width) |
| 25230 | .input_height(4) |
| 25231 | .kernel_height(3) |
| 25232 | .kernel_width(3) |
| 25233 | .subsampling(2) |
| 25234 | .padding_left(1) |
| 25235 | .padding_right(1) |
| 25236 | .padding_top(1) |
| 25237 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25238 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25239 | } |
| 25240 | } |
| 25241 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25242 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_lt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25243 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 25244 | DWConv2DMicrokernelTester() |
| 25245 | .input_width(8) |
| 25246 | .input_height(4) |
| 25247 | .kernel_height(3) |
| 25248 | .kernel_width(3) |
| 25249 | .subsampling(2) |
| 25250 | .padding_left(1) |
| 25251 | .padding_right(1) |
| 25252 | .padding_top(1) |
| 25253 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25254 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25255 | } |
| 25256 | } |
| 25257 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25258 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_gt_4) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25259 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 25260 | DWConv2DMicrokernelTester() |
| 25261 | .input_width(input_width) |
| 25262 | .input_height(4) |
| 25263 | .kernel_height(3) |
| 25264 | .kernel_width(3) |
| 25265 | .subsampling(2) |
| 25266 | .padding_left(1) |
| 25267 | .padding_right(1) |
| 25268 | .padding_top(1) |
| 25269 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25270 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25271 | } |
| 25272 | } |
| 25273 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25274 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_eq_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25275 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 25276 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 25277 | DWConv2DMicrokernelTester() |
| 25278 | .input_width(input_width) |
| 25279 | .input_height(input_height) |
| 25280 | .kernel_height(3) |
| 25281 | .kernel_width(3) |
| 25282 | .subsampling(2) |
| 25283 | .padding_left(1) |
| 25284 | .padding_right(1) |
| 25285 | .padding_top(1) |
| 25286 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25287 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25288 | } |
| 25289 | } |
| 25290 | } |
| 25291 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25292 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_div_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25293 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 25294 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 25295 | DWConv2DMicrokernelTester() |
| 25296 | .input_width(input_width) |
| 25297 | .input_height(input_height) |
| 25298 | .kernel_height(3) |
| 25299 | .kernel_width(3) |
| 25300 | .subsampling(2) |
| 25301 | .padding_left(1) |
| 25302 | .padding_right(1) |
| 25303 | .padding_top(1) |
| 25304 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25305 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25306 | } |
| 25307 | } |
| 25308 | } |
| 25309 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25310 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_lt_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25311 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 25312 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 25313 | DWConv2DMicrokernelTester() |
| 25314 | .input_width(input_width) |
| 25315 | .input_height(input_height) |
| 25316 | .kernel_height(3) |
| 25317 | .kernel_width(3) |
| 25318 | .subsampling(2) |
| 25319 | .padding_left(1) |
| 25320 | .padding_right(1) |
| 25321 | .padding_top(1) |
| 25322 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25323 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25324 | } |
| 25325 | } |
| 25326 | } |
| 25327 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25328 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_gt_2) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25329 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 25330 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 25331 | DWConv2DMicrokernelTester() |
| 25332 | .input_width(input_width) |
| 25333 | .input_height(input_height) |
| 25334 | .kernel_height(3) |
| 25335 | .kernel_width(3) |
| 25336 | .subsampling(2) |
| 25337 | .padding_left(1) |
| 25338 | .padding_right(1) |
| 25339 | .padding_top(1) |
| 25340 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25341 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25342 | } |
| 25343 | } |
| 25344 | } |
| 25345 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25346 | TEST(F32_DWCONV2D_CHW_3X3S2P1__WASMSIMD_X86_SPLAT_2X4_ACC2, padding_top_eq_1) { |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25347 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 25348 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 25349 | DWConv2DMicrokernelTester() |
| 25350 | .input_width(input_width) |
| 25351 | .input_height(input_height) |
| 25352 | .kernel_height(3) |
| 25353 | .kernel_width(3) |
| 25354 | .subsampling(2) |
| 25355 | .padding_left(1) |
| 25356 | .padding_right(1) |
| 25357 | .padding_top(0) |
| 25358 | .padding_bottom(1) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 25359 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25360 | } |
| 25361 | } |
| 25362 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25363 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b88d011 | 2020-12-04 09:07:13 -0800 | [diff] [blame] | 25364 | |
| 25365 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25366 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 25367 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_eq_4) { |
| 25368 | DWConv2DMicrokernelTester() |
| 25369 | .input_width(4) |
| 25370 | .input_height(1) |
| 25371 | .kernel_height(5) |
| 25372 | .kernel_width(5) |
| 25373 | .subsampling(1) |
| 25374 | .padding_left(2) |
| 25375 | .padding_right(2) |
| 25376 | .padding_top(2) |
| 25377 | .padding_bottom(2) |
| 25378 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2); |
| 25379 | } |
| 25380 | |
| 25381 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_div_4) { |
| 25382 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 25383 | DWConv2DMicrokernelTester() |
| 25384 | .input_width(input_width) |
| 25385 | .input_height(1) |
| 25386 | .kernel_height(5) |
| 25387 | .kernel_width(5) |
| 25388 | .subsampling(1) |
| 25389 | .padding_left(2) |
| 25390 | .padding_right(2) |
| 25391 | .padding_top(2) |
| 25392 | .padding_bottom(2) |
| 25393 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2); |
| 25394 | } |
| 25395 | } |
| 25396 | |
| 25397 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_lt_4) { |
| 25398 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 25399 | DWConv2DMicrokernelTester() |
| 25400 | .input_width(4) |
| 25401 | .input_height(1) |
| 25402 | .kernel_height(5) |
| 25403 | .kernel_width(5) |
| 25404 | .subsampling(1) |
| 25405 | .padding_left(2) |
| 25406 | .padding_right(2) |
| 25407 | .padding_top(2) |
| 25408 | .padding_bottom(2) |
| 25409 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2); |
| 25410 | } |
| 25411 | } |
| 25412 | |
| 25413 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_gt_4) { |
| 25414 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 25415 | DWConv2DMicrokernelTester() |
| 25416 | .input_width(input_width) |
| 25417 | .input_height(1) |
| 25418 | .kernel_height(5) |
| 25419 | .kernel_width(5) |
| 25420 | .subsampling(1) |
| 25421 | .padding_left(2) |
| 25422 | .padding_right(2) |
| 25423 | .padding_top(2) |
| 25424 | .padding_bottom(2) |
| 25425 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2); |
| 25426 | } |
| 25427 | } |
| 25428 | |
| 25429 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_height_gt_1) { |
| 25430 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 25431 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 25432 | DWConv2DMicrokernelTester() |
| 25433 | .input_width(input_width) |
| 25434 | .input_height(input_height) |
| 25435 | .kernel_height(5) |
| 25436 | .kernel_width(5) |
| 25437 | .subsampling(1) |
| 25438 | .padding_left(2) |
| 25439 | .padding_right(2) |
| 25440 | .padding_top(2) |
| 25441 | .padding_bottom(2) |
| 25442 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2); |
| 25443 | } |
| 25444 | } |
| 25445 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25446 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 25447 | |
| 25448 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25449 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 25450 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_eq_4) { |
| 25451 | DWConv2DMicrokernelTester() |
| 25452 | .input_width(4) |
| 25453 | .input_height(1) |
| 25454 | .kernel_height(5) |
| 25455 | .kernel_width(5) |
| 25456 | .subsampling(1) |
| 25457 | .padding_left(2) |
| 25458 | .padding_right(2) |
| 25459 | .padding_top(2) |
| 25460 | .padding_bottom(2) |
| 25461 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3); |
| 25462 | } |
| 25463 | |
| 25464 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_div_4) { |
| 25465 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 25466 | DWConv2DMicrokernelTester() |
| 25467 | .input_width(input_width) |
| 25468 | .input_height(1) |
| 25469 | .kernel_height(5) |
| 25470 | .kernel_width(5) |
| 25471 | .subsampling(1) |
| 25472 | .padding_left(2) |
| 25473 | .padding_right(2) |
| 25474 | .padding_top(2) |
| 25475 | .padding_bottom(2) |
| 25476 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3); |
| 25477 | } |
| 25478 | } |
| 25479 | |
| 25480 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_lt_4) { |
| 25481 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 25482 | DWConv2DMicrokernelTester() |
| 25483 | .input_width(4) |
| 25484 | .input_height(1) |
| 25485 | .kernel_height(5) |
| 25486 | .kernel_width(5) |
| 25487 | .subsampling(1) |
| 25488 | .padding_left(2) |
| 25489 | .padding_right(2) |
| 25490 | .padding_top(2) |
| 25491 | .padding_bottom(2) |
| 25492 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3); |
| 25493 | } |
| 25494 | } |
| 25495 | |
| 25496 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_gt_4) { |
| 25497 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 25498 | DWConv2DMicrokernelTester() |
| 25499 | .input_width(input_width) |
| 25500 | .input_height(1) |
| 25501 | .kernel_height(5) |
| 25502 | .kernel_width(5) |
| 25503 | .subsampling(1) |
| 25504 | .padding_left(2) |
| 25505 | .padding_right(2) |
| 25506 | .padding_top(2) |
| 25507 | .padding_bottom(2) |
| 25508 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3); |
| 25509 | } |
| 25510 | } |
| 25511 | |
| 25512 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_height_gt_1) { |
| 25513 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 25514 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 25515 | DWConv2DMicrokernelTester() |
| 25516 | .input_width(input_width) |
| 25517 | .input_height(input_height) |
| 25518 | .kernel_height(5) |
| 25519 | .kernel_width(5) |
| 25520 | .subsampling(1) |
| 25521 | .padding_left(2) |
| 25522 | .padding_right(2) |
| 25523 | .padding_top(2) |
| 25524 | .padding_bottom(2) |
| 25525 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3); |
| 25526 | } |
| 25527 | } |
| 25528 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25529 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 25530 | |
| 25531 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25532 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 25533 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_eq_4) { |
| 25534 | DWConv2DMicrokernelTester() |
| 25535 | .input_width(4) |
| 25536 | .input_height(1) |
| 25537 | .kernel_height(5) |
| 25538 | .kernel_width(5) |
| 25539 | .subsampling(1) |
| 25540 | .padding_left(2) |
| 25541 | .padding_right(2) |
| 25542 | .padding_top(2) |
| 25543 | .padding_bottom(2) |
| 25544 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4); |
| 25545 | } |
| 25546 | |
| 25547 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_div_4) { |
| 25548 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 25549 | DWConv2DMicrokernelTester() |
| 25550 | .input_width(input_width) |
| 25551 | .input_height(1) |
| 25552 | .kernel_height(5) |
| 25553 | .kernel_width(5) |
| 25554 | .subsampling(1) |
| 25555 | .padding_left(2) |
| 25556 | .padding_right(2) |
| 25557 | .padding_top(2) |
| 25558 | .padding_bottom(2) |
| 25559 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4); |
| 25560 | } |
| 25561 | } |
| 25562 | |
| 25563 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_lt_4) { |
| 25564 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 25565 | DWConv2DMicrokernelTester() |
| 25566 | .input_width(4) |
| 25567 | .input_height(1) |
| 25568 | .kernel_height(5) |
| 25569 | .kernel_width(5) |
| 25570 | .subsampling(1) |
| 25571 | .padding_left(2) |
| 25572 | .padding_right(2) |
| 25573 | .padding_top(2) |
| 25574 | .padding_bottom(2) |
| 25575 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4); |
| 25576 | } |
| 25577 | } |
| 25578 | |
| 25579 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_gt_4) { |
| 25580 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 25581 | DWConv2DMicrokernelTester() |
| 25582 | .input_width(input_width) |
| 25583 | .input_height(1) |
| 25584 | .kernel_height(5) |
| 25585 | .kernel_width(5) |
| 25586 | .subsampling(1) |
| 25587 | .padding_left(2) |
| 25588 | .padding_right(2) |
| 25589 | .padding_top(2) |
| 25590 | .padding_bottom(2) |
| 25591 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4); |
| 25592 | } |
| 25593 | } |
| 25594 | |
| 25595 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_height_gt_1) { |
| 25596 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 25597 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 25598 | DWConv2DMicrokernelTester() |
| 25599 | .input_width(input_width) |
| 25600 | .input_height(input_height) |
| 25601 | .kernel_height(5) |
| 25602 | .kernel_width(5) |
| 25603 | .subsampling(1) |
| 25604 | .padding_left(2) |
| 25605 | .padding_right(2) |
| 25606 | .padding_top(2) |
| 25607 | .padding_bottom(2) |
| 25608 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4); |
| 25609 | } |
| 25610 | } |
| 25611 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25612 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 25613 | |
| 25614 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25615 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 25616 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC5, output_width_eq_4) { |
| 25617 | DWConv2DMicrokernelTester() |
| 25618 | .input_width(4) |
| 25619 | .input_height(1) |
| 25620 | .kernel_height(5) |
| 25621 | .kernel_width(5) |
| 25622 | .subsampling(1) |
| 25623 | .padding_left(2) |
| 25624 | .padding_right(2) |
| 25625 | .padding_top(2) |
| 25626 | .padding_bottom(2) |
| 25627 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5); |
| 25628 | } |
| 25629 | |
| 25630 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC5, output_width_div_4) { |
| 25631 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 25632 | DWConv2DMicrokernelTester() |
| 25633 | .input_width(input_width) |
| 25634 | .input_height(1) |
| 25635 | .kernel_height(5) |
| 25636 | .kernel_width(5) |
| 25637 | .subsampling(1) |
| 25638 | .padding_left(2) |
| 25639 | .padding_right(2) |
| 25640 | .padding_top(2) |
| 25641 | .padding_bottom(2) |
| 25642 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5); |
| 25643 | } |
| 25644 | } |
| 25645 | |
| 25646 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC5, output_width_lt_4) { |
| 25647 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 25648 | DWConv2DMicrokernelTester() |
| 25649 | .input_width(4) |
| 25650 | .input_height(1) |
| 25651 | .kernel_height(5) |
| 25652 | .kernel_width(5) |
| 25653 | .subsampling(1) |
| 25654 | .padding_left(2) |
| 25655 | .padding_right(2) |
| 25656 | .padding_top(2) |
| 25657 | .padding_bottom(2) |
| 25658 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5); |
| 25659 | } |
| 25660 | } |
| 25661 | |
| 25662 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC5, output_width_gt_4) { |
| 25663 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 25664 | DWConv2DMicrokernelTester() |
| 25665 | .input_width(input_width) |
| 25666 | .input_height(1) |
| 25667 | .kernel_height(5) |
| 25668 | .kernel_width(5) |
| 25669 | .subsampling(1) |
| 25670 | .padding_left(2) |
| 25671 | .padding_right(2) |
| 25672 | .padding_top(2) |
| 25673 | .padding_bottom(2) |
| 25674 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5); |
| 25675 | } |
| 25676 | } |
| 25677 | |
| 25678 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC5, output_height_gt_1) { |
| 25679 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 25680 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 25681 | DWConv2DMicrokernelTester() |
| 25682 | .input_width(input_width) |
| 25683 | .input_height(input_height) |
| 25684 | .kernel_height(5) |
| 25685 | .kernel_width(5) |
| 25686 | .subsampling(1) |
| 25687 | .padding_left(2) |
| 25688 | .padding_right(2) |
| 25689 | .padding_top(2) |
| 25690 | .padding_bottom(2) |
| 25691 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5); |
| 25692 | } |
| 25693 | } |
| 25694 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25695 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 25696 | |
| 25697 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25698 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 25699 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_eq_4) { |
| 25700 | DWConv2DMicrokernelTester() |
| 25701 | .input_width(4) |
| 25702 | .input_height(1) |
| 25703 | .kernel_height(5) |
| 25704 | .kernel_width(5) |
| 25705 | .subsampling(1) |
| 25706 | .padding_left(2) |
| 25707 | .padding_right(2) |
| 25708 | .padding_top(2) |
| 25709 | .padding_bottom(2) |
| 25710 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4); |
| 25711 | } |
| 25712 | |
| 25713 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_div_4) { |
| 25714 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 25715 | DWConv2DMicrokernelTester() |
| 25716 | .input_width(input_width) |
| 25717 | .input_height(1) |
| 25718 | .kernel_height(5) |
| 25719 | .kernel_width(5) |
| 25720 | .subsampling(1) |
| 25721 | .padding_left(2) |
| 25722 | .padding_right(2) |
| 25723 | .padding_top(2) |
| 25724 | .padding_bottom(2) |
| 25725 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4); |
| 25726 | } |
| 25727 | } |
| 25728 | |
| 25729 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_lt_4) { |
| 25730 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 25731 | DWConv2DMicrokernelTester() |
| 25732 | .input_width(4) |
| 25733 | .input_height(1) |
| 25734 | .kernel_height(5) |
| 25735 | .kernel_width(5) |
| 25736 | .subsampling(1) |
| 25737 | .padding_left(2) |
| 25738 | .padding_right(2) |
| 25739 | .padding_top(2) |
| 25740 | .padding_bottom(2) |
| 25741 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4); |
| 25742 | } |
| 25743 | } |
| 25744 | |
| 25745 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_gt_4) { |
| 25746 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 25747 | DWConv2DMicrokernelTester() |
| 25748 | .input_width(input_width) |
| 25749 | .input_height(1) |
| 25750 | .kernel_height(5) |
| 25751 | .kernel_width(5) |
| 25752 | .subsampling(1) |
| 25753 | .padding_left(2) |
| 25754 | .padding_right(2) |
| 25755 | .padding_top(2) |
| 25756 | .padding_bottom(2) |
| 25757 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4); |
| 25758 | } |
| 25759 | } |
| 25760 | |
| 25761 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_1X4, output_height_gt_1) { |
| 25762 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 25763 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 25764 | DWConv2DMicrokernelTester() |
| 25765 | .input_width(input_width) |
| 25766 | .input_height(input_height) |
| 25767 | .kernel_height(5) |
| 25768 | .kernel_width(5) |
| 25769 | .subsampling(1) |
| 25770 | .padding_left(2) |
| 25771 | .padding_right(2) |
| 25772 | .padding_top(2) |
| 25773 | .padding_bottom(2) |
| 25774 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4); |
| 25775 | } |
| 25776 | } |
| 25777 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25778 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 25779 | |
| 25780 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25781 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 25782 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_eq_4) { |
| 25783 | DWConv2DMicrokernelTester() |
| 25784 | .input_width(4) |
| 25785 | .input_height(2) |
| 25786 | .kernel_height(5) |
| 25787 | .kernel_width(5) |
| 25788 | .subsampling(1) |
| 25789 | .padding_left(2) |
| 25790 | .padding_right(2) |
| 25791 | .padding_top(2) |
| 25792 | .padding_bottom(2) |
| 25793 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 25794 | } |
| 25795 | |
| 25796 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_div_4) { |
| 25797 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 25798 | DWConv2DMicrokernelTester() |
| 25799 | .input_width(input_width) |
| 25800 | .input_height(2) |
| 25801 | .kernel_height(5) |
| 25802 | .kernel_width(5) |
| 25803 | .subsampling(1) |
| 25804 | .padding_left(2) |
| 25805 | .padding_right(2) |
| 25806 | .padding_top(2) |
| 25807 | .padding_bottom(2) |
| 25808 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 25809 | } |
| 25810 | } |
| 25811 | |
| 25812 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_lt_4) { |
| 25813 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 25814 | DWConv2DMicrokernelTester() |
| 25815 | .input_width(4) |
| 25816 | .input_height(2) |
| 25817 | .kernel_height(5) |
| 25818 | .kernel_width(5) |
| 25819 | .subsampling(1) |
| 25820 | .padding_left(2) |
| 25821 | .padding_right(2) |
| 25822 | .padding_top(2) |
| 25823 | .padding_bottom(2) |
| 25824 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 25825 | } |
| 25826 | } |
| 25827 | |
| 25828 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_gt_4) { |
| 25829 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 25830 | DWConv2DMicrokernelTester() |
| 25831 | .input_width(input_width) |
| 25832 | .input_height(2) |
| 25833 | .kernel_height(5) |
| 25834 | .kernel_width(5) |
| 25835 | .subsampling(1) |
| 25836 | .padding_left(2) |
| 25837 | .padding_right(2) |
| 25838 | .padding_top(2) |
| 25839 | .padding_bottom(2) |
| 25840 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 25841 | } |
| 25842 | } |
| 25843 | |
| 25844 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_div_2) { |
| 25845 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 25846 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 25847 | DWConv2DMicrokernelTester() |
| 25848 | .input_width(input_width) |
| 25849 | .input_height(input_height) |
| 25850 | .kernel_height(5) |
| 25851 | .kernel_width(5) |
| 25852 | .subsampling(1) |
| 25853 | .padding_left(2) |
| 25854 | .padding_right(2) |
| 25855 | .padding_top(2) |
| 25856 | .padding_bottom(2) |
| 25857 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 25858 | } |
| 25859 | } |
| 25860 | } |
| 25861 | |
| 25862 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_lt_2) { |
| 25863 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 25864 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 25865 | DWConv2DMicrokernelTester() |
| 25866 | .input_width(input_width) |
| 25867 | .input_height(input_height) |
| 25868 | .kernel_height(5) |
| 25869 | .kernel_width(5) |
| 25870 | .subsampling(1) |
| 25871 | .padding_left(2) |
| 25872 | .padding_right(2) |
| 25873 | .padding_top(2) |
| 25874 | .padding_bottom(2) |
| 25875 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 25876 | } |
| 25877 | } |
| 25878 | } |
| 25879 | |
| 25880 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_gt_2) { |
| 25881 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 25882 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 25883 | DWConv2DMicrokernelTester() |
| 25884 | .input_width(input_width) |
| 25885 | .input_height(input_height) |
| 25886 | .kernel_height(5) |
| 25887 | .kernel_width(5) |
| 25888 | .subsampling(1) |
| 25889 | .padding_left(2) |
| 25890 | .padding_right(2) |
| 25891 | .padding_top(2) |
| 25892 | .padding_bottom(2) |
| 25893 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 25894 | } |
| 25895 | } |
| 25896 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25897 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 25898 | |
| 25899 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 25900 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 25901 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_width_eq_4) { |
| 25902 | DWConv2DMicrokernelTester() |
| 25903 | .input_width(4) |
| 25904 | .input_height(2) |
| 25905 | .kernel_height(5) |
| 25906 | .kernel_width(5) |
| 25907 | .subsampling(1) |
| 25908 | .padding_left(2) |
| 25909 | .padding_right(2) |
| 25910 | .padding_top(2) |
| 25911 | .padding_bottom(2) |
| 25912 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 25913 | } |
| 25914 | |
| 25915 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_width_div_4) { |
| 25916 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 25917 | DWConv2DMicrokernelTester() |
| 25918 | .input_width(input_width) |
| 25919 | .input_height(2) |
| 25920 | .kernel_height(5) |
| 25921 | .kernel_width(5) |
| 25922 | .subsampling(1) |
| 25923 | .padding_left(2) |
| 25924 | .padding_right(2) |
| 25925 | .padding_top(2) |
| 25926 | .padding_bottom(2) |
| 25927 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 25928 | } |
| 25929 | } |
| 25930 | |
| 25931 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_width_lt_4) { |
| 25932 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 25933 | DWConv2DMicrokernelTester() |
| 25934 | .input_width(4) |
| 25935 | .input_height(2) |
| 25936 | .kernel_height(5) |
| 25937 | .kernel_width(5) |
| 25938 | .subsampling(1) |
| 25939 | .padding_left(2) |
| 25940 | .padding_right(2) |
| 25941 | .padding_top(2) |
| 25942 | .padding_bottom(2) |
| 25943 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 25944 | } |
| 25945 | } |
| 25946 | |
| 25947 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_width_gt_4) { |
| 25948 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 25949 | DWConv2DMicrokernelTester() |
| 25950 | .input_width(input_width) |
| 25951 | .input_height(2) |
| 25952 | .kernel_height(5) |
| 25953 | .kernel_width(5) |
| 25954 | .subsampling(1) |
| 25955 | .padding_left(2) |
| 25956 | .padding_right(2) |
| 25957 | .padding_top(2) |
| 25958 | .padding_bottom(2) |
| 25959 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 25960 | } |
| 25961 | } |
| 25962 | |
| 25963 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_height_div_2) { |
| 25964 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 25965 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 25966 | DWConv2DMicrokernelTester() |
| 25967 | .input_width(input_width) |
| 25968 | .input_height(input_height) |
| 25969 | .kernel_height(5) |
| 25970 | .kernel_width(5) |
| 25971 | .subsampling(1) |
| 25972 | .padding_left(2) |
| 25973 | .padding_right(2) |
| 25974 | .padding_top(2) |
| 25975 | .padding_bottom(2) |
| 25976 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 25977 | } |
| 25978 | } |
| 25979 | } |
| 25980 | |
| 25981 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_height_lt_2) { |
| 25982 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 25983 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 25984 | DWConv2DMicrokernelTester() |
| 25985 | .input_width(input_width) |
| 25986 | .input_height(input_height) |
| 25987 | .kernel_height(5) |
| 25988 | .kernel_width(5) |
| 25989 | .subsampling(1) |
| 25990 | .padding_left(2) |
| 25991 | .padding_right(2) |
| 25992 | .padding_top(2) |
| 25993 | .padding_bottom(2) |
| 25994 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 25995 | } |
| 25996 | } |
| 25997 | } |
| 25998 | |
| 25999 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_height_gt_2) { |
| 26000 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 26001 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26002 | DWConv2DMicrokernelTester() |
| 26003 | .input_width(input_width) |
| 26004 | .input_height(input_height) |
| 26005 | .kernel_height(5) |
| 26006 | .kernel_width(5) |
| 26007 | .subsampling(1) |
| 26008 | .padding_left(2) |
| 26009 | .padding_right(2) |
| 26010 | .padding_top(2) |
| 26011 | .padding_bottom(2) |
| 26012 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 26013 | } |
| 26014 | } |
| 26015 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26016 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26017 | |
| 26018 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26019 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26020 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_eq_4) { |
| 26021 | DWConv2DMicrokernelTester() |
| 26022 | .input_width(4) |
| 26023 | .input_height(2) |
| 26024 | .kernel_height(5) |
| 26025 | .kernel_width(5) |
| 26026 | .subsampling(1) |
| 26027 | .padding_left(2) |
| 26028 | .padding_right(2) |
| 26029 | .padding_top(2) |
| 26030 | .padding_bottom(2) |
| 26031 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4); |
| 26032 | } |
| 26033 | |
| 26034 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_div_4) { |
| 26035 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 26036 | DWConv2DMicrokernelTester() |
| 26037 | .input_width(input_width) |
| 26038 | .input_height(2) |
| 26039 | .kernel_height(5) |
| 26040 | .kernel_width(5) |
| 26041 | .subsampling(1) |
| 26042 | .padding_left(2) |
| 26043 | .padding_right(2) |
| 26044 | .padding_top(2) |
| 26045 | .padding_bottom(2) |
| 26046 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4); |
| 26047 | } |
| 26048 | } |
| 26049 | |
| 26050 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_lt_4) { |
| 26051 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 26052 | DWConv2DMicrokernelTester() |
| 26053 | .input_width(4) |
| 26054 | .input_height(2) |
| 26055 | .kernel_height(5) |
| 26056 | .kernel_width(5) |
| 26057 | .subsampling(1) |
| 26058 | .padding_left(2) |
| 26059 | .padding_right(2) |
| 26060 | .padding_top(2) |
| 26061 | .padding_bottom(2) |
| 26062 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4); |
| 26063 | } |
| 26064 | } |
| 26065 | |
| 26066 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_gt_4) { |
| 26067 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 26068 | DWConv2DMicrokernelTester() |
| 26069 | .input_width(input_width) |
| 26070 | .input_height(2) |
| 26071 | .kernel_height(5) |
| 26072 | .kernel_width(5) |
| 26073 | .subsampling(1) |
| 26074 | .padding_left(2) |
| 26075 | .padding_right(2) |
| 26076 | .padding_top(2) |
| 26077 | .padding_bottom(2) |
| 26078 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4); |
| 26079 | } |
| 26080 | } |
| 26081 | |
| 26082 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_div_2) { |
| 26083 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 26084 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26085 | DWConv2DMicrokernelTester() |
| 26086 | .input_width(input_width) |
| 26087 | .input_height(input_height) |
| 26088 | .kernel_height(5) |
| 26089 | .kernel_width(5) |
| 26090 | .subsampling(1) |
| 26091 | .padding_left(2) |
| 26092 | .padding_right(2) |
| 26093 | .padding_top(2) |
| 26094 | .padding_bottom(2) |
| 26095 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4); |
| 26096 | } |
| 26097 | } |
| 26098 | } |
| 26099 | |
| 26100 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_lt_2) { |
| 26101 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 26102 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26103 | DWConv2DMicrokernelTester() |
| 26104 | .input_width(input_width) |
| 26105 | .input_height(input_height) |
| 26106 | .kernel_height(5) |
| 26107 | .kernel_width(5) |
| 26108 | .subsampling(1) |
| 26109 | .padding_left(2) |
| 26110 | .padding_right(2) |
| 26111 | .padding_top(2) |
| 26112 | .padding_bottom(2) |
| 26113 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4); |
| 26114 | } |
| 26115 | } |
| 26116 | } |
| 26117 | |
| 26118 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_gt_2) { |
| 26119 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 26120 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26121 | DWConv2DMicrokernelTester() |
| 26122 | .input_width(input_width) |
| 26123 | .input_height(input_height) |
| 26124 | .kernel_height(5) |
| 26125 | .kernel_width(5) |
| 26126 | .subsampling(1) |
| 26127 | .padding_left(2) |
| 26128 | .padding_right(2) |
| 26129 | .padding_top(2) |
| 26130 | .padding_bottom(2) |
| 26131 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4); |
| 26132 | } |
| 26133 | } |
| 26134 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26135 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26136 | |
| 26137 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26138 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26139 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_width_eq_4) { |
| 26140 | DWConv2DMicrokernelTester() |
| 26141 | .input_width(4) |
| 26142 | .input_height(3) |
| 26143 | .kernel_height(5) |
| 26144 | .kernel_width(5) |
| 26145 | .subsampling(1) |
| 26146 | .padding_left(2) |
| 26147 | .padding_right(2) |
| 26148 | .padding_top(2) |
| 26149 | .padding_bottom(2) |
| 26150 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 26151 | } |
| 26152 | |
| 26153 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_width_div_4) { |
| 26154 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 26155 | DWConv2DMicrokernelTester() |
| 26156 | .input_width(input_width) |
| 26157 | .input_height(3) |
| 26158 | .kernel_height(5) |
| 26159 | .kernel_width(5) |
| 26160 | .subsampling(1) |
| 26161 | .padding_left(2) |
| 26162 | .padding_right(2) |
| 26163 | .padding_top(2) |
| 26164 | .padding_bottom(2) |
| 26165 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 26166 | } |
| 26167 | } |
| 26168 | |
| 26169 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_width_lt_4) { |
| 26170 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 26171 | DWConv2DMicrokernelTester() |
| 26172 | .input_width(4) |
| 26173 | .input_height(3) |
| 26174 | .kernel_height(5) |
| 26175 | .kernel_width(5) |
| 26176 | .subsampling(1) |
| 26177 | .padding_left(2) |
| 26178 | .padding_right(2) |
| 26179 | .padding_top(2) |
| 26180 | .padding_bottom(2) |
| 26181 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 26182 | } |
| 26183 | } |
| 26184 | |
| 26185 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_width_gt_4) { |
| 26186 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 26187 | DWConv2DMicrokernelTester() |
| 26188 | .input_width(input_width) |
| 26189 | .input_height(3) |
| 26190 | .kernel_height(5) |
| 26191 | .kernel_width(5) |
| 26192 | .subsampling(1) |
| 26193 | .padding_left(2) |
| 26194 | .padding_right(2) |
| 26195 | .padding_top(2) |
| 26196 | .padding_bottom(2) |
| 26197 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 26198 | } |
| 26199 | } |
| 26200 | |
| 26201 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_height_div_3) { |
| 26202 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 26203 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26204 | DWConv2DMicrokernelTester() |
| 26205 | .input_width(input_width) |
| 26206 | .input_height(input_height) |
| 26207 | .kernel_height(5) |
| 26208 | .kernel_width(5) |
| 26209 | .subsampling(1) |
| 26210 | .padding_left(2) |
| 26211 | .padding_right(2) |
| 26212 | .padding_top(2) |
| 26213 | .padding_bottom(2) |
| 26214 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 26215 | } |
| 26216 | } |
| 26217 | } |
| 26218 | |
| 26219 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_height_lt_3) { |
| 26220 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 26221 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26222 | DWConv2DMicrokernelTester() |
| 26223 | .input_width(input_width) |
| 26224 | .input_height(input_height) |
| 26225 | .kernel_height(5) |
| 26226 | .kernel_width(5) |
| 26227 | .subsampling(1) |
| 26228 | .padding_left(2) |
| 26229 | .padding_right(2) |
| 26230 | .padding_top(2) |
| 26231 | .padding_bottom(2) |
| 26232 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 26233 | } |
| 26234 | } |
| 26235 | } |
| 26236 | |
| 26237 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_height_gt_3) { |
| 26238 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 26239 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26240 | DWConv2DMicrokernelTester() |
| 26241 | .input_width(input_width) |
| 26242 | .input_height(input_height) |
| 26243 | .kernel_height(5) |
| 26244 | .kernel_width(5) |
| 26245 | .subsampling(1) |
| 26246 | .padding_left(2) |
| 26247 | .padding_right(2) |
| 26248 | .padding_top(2) |
| 26249 | .padding_bottom(2) |
| 26250 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 26251 | } |
| 26252 | } |
| 26253 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26254 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26255 | |
| 26256 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26257 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26258 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_eq_4) { |
| 26259 | DWConv2DMicrokernelTester() |
| 26260 | .input_width(4) |
| 26261 | .input_height(3) |
| 26262 | .kernel_height(5) |
| 26263 | .kernel_width(5) |
| 26264 | .subsampling(1) |
| 26265 | .padding_left(2) |
| 26266 | .padding_right(2) |
| 26267 | .padding_top(2) |
| 26268 | .padding_bottom(2) |
| 26269 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4); |
| 26270 | } |
| 26271 | |
| 26272 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_div_4) { |
| 26273 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 26274 | DWConv2DMicrokernelTester() |
| 26275 | .input_width(input_width) |
| 26276 | .input_height(3) |
| 26277 | .kernel_height(5) |
| 26278 | .kernel_width(5) |
| 26279 | .subsampling(1) |
| 26280 | .padding_left(2) |
| 26281 | .padding_right(2) |
| 26282 | .padding_top(2) |
| 26283 | .padding_bottom(2) |
| 26284 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4); |
| 26285 | } |
| 26286 | } |
| 26287 | |
| 26288 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_lt_4) { |
| 26289 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 26290 | DWConv2DMicrokernelTester() |
| 26291 | .input_width(4) |
| 26292 | .input_height(3) |
| 26293 | .kernel_height(5) |
| 26294 | .kernel_width(5) |
| 26295 | .subsampling(1) |
| 26296 | .padding_left(2) |
| 26297 | .padding_right(2) |
| 26298 | .padding_top(2) |
| 26299 | .padding_bottom(2) |
| 26300 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4); |
| 26301 | } |
| 26302 | } |
| 26303 | |
| 26304 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_gt_4) { |
| 26305 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 26306 | DWConv2DMicrokernelTester() |
| 26307 | .input_width(input_width) |
| 26308 | .input_height(3) |
| 26309 | .kernel_height(5) |
| 26310 | .kernel_width(5) |
| 26311 | .subsampling(1) |
| 26312 | .padding_left(2) |
| 26313 | .padding_right(2) |
| 26314 | .padding_top(2) |
| 26315 | .padding_bottom(2) |
| 26316 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4); |
| 26317 | } |
| 26318 | } |
| 26319 | |
| 26320 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_div_3) { |
| 26321 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 26322 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26323 | DWConv2DMicrokernelTester() |
| 26324 | .input_width(input_width) |
| 26325 | .input_height(input_height) |
| 26326 | .kernel_height(5) |
| 26327 | .kernel_width(5) |
| 26328 | .subsampling(1) |
| 26329 | .padding_left(2) |
| 26330 | .padding_right(2) |
| 26331 | .padding_top(2) |
| 26332 | .padding_bottom(2) |
| 26333 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4); |
| 26334 | } |
| 26335 | } |
| 26336 | } |
| 26337 | |
| 26338 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_lt_3) { |
| 26339 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 26340 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26341 | DWConv2DMicrokernelTester() |
| 26342 | .input_width(input_width) |
| 26343 | .input_height(input_height) |
| 26344 | .kernel_height(5) |
| 26345 | .kernel_width(5) |
| 26346 | .subsampling(1) |
| 26347 | .padding_left(2) |
| 26348 | .padding_right(2) |
| 26349 | .padding_top(2) |
| 26350 | .padding_bottom(2) |
| 26351 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4); |
| 26352 | } |
| 26353 | } |
| 26354 | } |
| 26355 | |
| 26356 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_gt_3) { |
| 26357 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 26358 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26359 | DWConv2DMicrokernelTester() |
| 26360 | .input_width(input_width) |
| 26361 | .input_height(input_height) |
| 26362 | .kernel_height(5) |
| 26363 | .kernel_width(5) |
| 26364 | .subsampling(1) |
| 26365 | .padding_left(2) |
| 26366 | .padding_right(2) |
| 26367 | .padding_top(2) |
| 26368 | .padding_bottom(2) |
| 26369 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4); |
| 26370 | } |
| 26371 | } |
| 26372 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26373 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26374 | |
| 26375 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26376 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26377 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4_ACC2, output_width_eq_4) { |
| 26378 | DWConv2DMicrokernelTester() |
| 26379 | .input_width(4) |
| 26380 | .input_height(4) |
| 26381 | .kernel_height(5) |
| 26382 | .kernel_width(5) |
| 26383 | .subsampling(1) |
| 26384 | .padding_left(2) |
| 26385 | .padding_right(2) |
| 26386 | .padding_top(2) |
| 26387 | .padding_bottom(2) |
| 26388 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4_acc2); |
| 26389 | } |
| 26390 | |
| 26391 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4_ACC2, output_width_div_4) { |
| 26392 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 26393 | DWConv2DMicrokernelTester() |
| 26394 | .input_width(input_width) |
| 26395 | .input_height(4) |
| 26396 | .kernel_height(5) |
| 26397 | .kernel_width(5) |
| 26398 | .subsampling(1) |
| 26399 | .padding_left(2) |
| 26400 | .padding_right(2) |
| 26401 | .padding_top(2) |
| 26402 | .padding_bottom(2) |
| 26403 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4_acc2); |
| 26404 | } |
| 26405 | } |
| 26406 | |
| 26407 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4_ACC2, output_width_lt_4) { |
| 26408 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 26409 | DWConv2DMicrokernelTester() |
| 26410 | .input_width(4) |
| 26411 | .input_height(4) |
| 26412 | .kernel_height(5) |
| 26413 | .kernel_width(5) |
| 26414 | .subsampling(1) |
| 26415 | .padding_left(2) |
| 26416 | .padding_right(2) |
| 26417 | .padding_top(2) |
| 26418 | .padding_bottom(2) |
| 26419 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4_acc2); |
| 26420 | } |
| 26421 | } |
| 26422 | |
| 26423 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4_ACC2, output_width_gt_4) { |
| 26424 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 26425 | DWConv2DMicrokernelTester() |
| 26426 | .input_width(input_width) |
| 26427 | .input_height(4) |
| 26428 | .kernel_height(5) |
| 26429 | .kernel_width(5) |
| 26430 | .subsampling(1) |
| 26431 | .padding_left(2) |
| 26432 | .padding_right(2) |
| 26433 | .padding_top(2) |
| 26434 | .padding_bottom(2) |
| 26435 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4_acc2); |
| 26436 | } |
| 26437 | } |
| 26438 | |
| 26439 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4_ACC2, output_height_div_4) { |
| 26440 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 26441 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26442 | DWConv2DMicrokernelTester() |
| 26443 | .input_width(input_width) |
| 26444 | .input_height(input_height) |
| 26445 | .kernel_height(5) |
| 26446 | .kernel_width(5) |
| 26447 | .subsampling(1) |
| 26448 | .padding_left(2) |
| 26449 | .padding_right(2) |
| 26450 | .padding_top(2) |
| 26451 | .padding_bottom(2) |
| 26452 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4_acc2); |
| 26453 | } |
| 26454 | } |
| 26455 | } |
| 26456 | |
| 26457 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4_ACC2, output_height_lt_4) { |
| 26458 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 26459 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26460 | DWConv2DMicrokernelTester() |
| 26461 | .input_width(input_width) |
| 26462 | .input_height(input_height) |
| 26463 | .kernel_height(5) |
| 26464 | .kernel_width(5) |
| 26465 | .subsampling(1) |
| 26466 | .padding_left(2) |
| 26467 | .padding_right(2) |
| 26468 | .padding_top(2) |
| 26469 | .padding_bottom(2) |
| 26470 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4_acc2); |
| 26471 | } |
| 26472 | } |
| 26473 | } |
| 26474 | |
| 26475 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4_ACC2, output_height_gt_4) { |
| 26476 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 26477 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26478 | DWConv2DMicrokernelTester() |
| 26479 | .input_width(input_width) |
| 26480 | .input_height(input_height) |
| 26481 | .kernel_height(5) |
| 26482 | .kernel_width(5) |
| 26483 | .subsampling(1) |
| 26484 | .padding_left(2) |
| 26485 | .padding_right(2) |
| 26486 | .padding_top(2) |
| 26487 | .padding_bottom(2) |
| 26488 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4_acc2); |
| 26489 | } |
| 26490 | } |
| 26491 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26492 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26493 | |
| 26494 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26495 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26496 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4, output_width_eq_4) { |
| 26497 | DWConv2DMicrokernelTester() |
| 26498 | .input_width(4) |
| 26499 | .input_height(4) |
| 26500 | .kernel_height(5) |
| 26501 | .kernel_width(5) |
| 26502 | .subsampling(1) |
| 26503 | .padding_left(2) |
| 26504 | .padding_right(2) |
| 26505 | .padding_top(2) |
| 26506 | .padding_bottom(2) |
| 26507 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4); |
| 26508 | } |
| 26509 | |
| 26510 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4, output_width_div_4) { |
| 26511 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 26512 | DWConv2DMicrokernelTester() |
| 26513 | .input_width(input_width) |
| 26514 | .input_height(4) |
| 26515 | .kernel_height(5) |
| 26516 | .kernel_width(5) |
| 26517 | .subsampling(1) |
| 26518 | .padding_left(2) |
| 26519 | .padding_right(2) |
| 26520 | .padding_top(2) |
| 26521 | .padding_bottom(2) |
| 26522 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4); |
| 26523 | } |
| 26524 | } |
| 26525 | |
| 26526 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4, output_width_lt_4) { |
| 26527 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 26528 | DWConv2DMicrokernelTester() |
| 26529 | .input_width(4) |
| 26530 | .input_height(4) |
| 26531 | .kernel_height(5) |
| 26532 | .kernel_width(5) |
| 26533 | .subsampling(1) |
| 26534 | .padding_left(2) |
| 26535 | .padding_right(2) |
| 26536 | .padding_top(2) |
| 26537 | .padding_bottom(2) |
| 26538 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4); |
| 26539 | } |
| 26540 | } |
| 26541 | |
| 26542 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4, output_width_gt_4) { |
| 26543 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 26544 | DWConv2DMicrokernelTester() |
| 26545 | .input_width(input_width) |
| 26546 | .input_height(4) |
| 26547 | .kernel_height(5) |
| 26548 | .kernel_width(5) |
| 26549 | .subsampling(1) |
| 26550 | .padding_left(2) |
| 26551 | .padding_right(2) |
| 26552 | .padding_top(2) |
| 26553 | .padding_bottom(2) |
| 26554 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4); |
| 26555 | } |
| 26556 | } |
| 26557 | |
| 26558 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4, output_height_div_4) { |
| 26559 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 26560 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26561 | DWConv2DMicrokernelTester() |
| 26562 | .input_width(input_width) |
| 26563 | .input_height(input_height) |
| 26564 | .kernel_height(5) |
| 26565 | .kernel_width(5) |
| 26566 | .subsampling(1) |
| 26567 | .padding_left(2) |
| 26568 | .padding_right(2) |
| 26569 | .padding_top(2) |
| 26570 | .padding_bottom(2) |
| 26571 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4); |
| 26572 | } |
| 26573 | } |
| 26574 | } |
| 26575 | |
| 26576 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4, output_height_lt_4) { |
| 26577 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 26578 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26579 | DWConv2DMicrokernelTester() |
| 26580 | .input_width(input_width) |
| 26581 | .input_height(input_height) |
| 26582 | .kernel_height(5) |
| 26583 | .kernel_width(5) |
| 26584 | .subsampling(1) |
| 26585 | .padding_left(2) |
| 26586 | .padding_right(2) |
| 26587 | .padding_top(2) |
| 26588 | .padding_bottom(2) |
| 26589 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4); |
| 26590 | } |
| 26591 | } |
| 26592 | } |
| 26593 | |
| 26594 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_4X4, output_height_gt_4) { |
| 26595 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 26596 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26597 | DWConv2DMicrokernelTester() |
| 26598 | .input_width(input_width) |
| 26599 | .input_height(input_height) |
| 26600 | .kernel_height(5) |
| 26601 | .kernel_width(5) |
| 26602 | .subsampling(1) |
| 26603 | .padding_left(2) |
| 26604 | .padding_right(2) |
| 26605 | .padding_top(2) |
| 26606 | .padding_bottom(2) |
| 26607 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4); |
| 26608 | } |
| 26609 | } |
| 26610 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26611 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26612 | |
| 26613 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26614 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26615 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_5X4, output_width_eq_4) { |
| 26616 | DWConv2DMicrokernelTester() |
| 26617 | .input_width(4) |
| 26618 | .input_height(5) |
| 26619 | .kernel_height(5) |
| 26620 | .kernel_width(5) |
| 26621 | .subsampling(1) |
| 26622 | .padding_left(2) |
| 26623 | .padding_right(2) |
| 26624 | .padding_top(2) |
| 26625 | .padding_bottom(2) |
| 26626 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_5x4); |
| 26627 | } |
| 26628 | |
| 26629 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_5X4, output_width_div_4) { |
| 26630 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 26631 | DWConv2DMicrokernelTester() |
| 26632 | .input_width(input_width) |
| 26633 | .input_height(5) |
| 26634 | .kernel_height(5) |
| 26635 | .kernel_width(5) |
| 26636 | .subsampling(1) |
| 26637 | .padding_left(2) |
| 26638 | .padding_right(2) |
| 26639 | .padding_top(2) |
| 26640 | .padding_bottom(2) |
| 26641 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_5x4); |
| 26642 | } |
| 26643 | } |
| 26644 | |
| 26645 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_5X4, output_width_lt_4) { |
| 26646 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 26647 | DWConv2DMicrokernelTester() |
| 26648 | .input_width(4) |
| 26649 | .input_height(5) |
| 26650 | .kernel_height(5) |
| 26651 | .kernel_width(5) |
| 26652 | .subsampling(1) |
| 26653 | .padding_left(2) |
| 26654 | .padding_right(2) |
| 26655 | .padding_top(2) |
| 26656 | .padding_bottom(2) |
| 26657 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_5x4); |
| 26658 | } |
| 26659 | } |
| 26660 | |
| 26661 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_5X4, output_width_gt_4) { |
| 26662 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 26663 | DWConv2DMicrokernelTester() |
| 26664 | .input_width(input_width) |
| 26665 | .input_height(5) |
| 26666 | .kernel_height(5) |
| 26667 | .kernel_width(5) |
| 26668 | .subsampling(1) |
| 26669 | .padding_left(2) |
| 26670 | .padding_right(2) |
| 26671 | .padding_top(2) |
| 26672 | .padding_bottom(2) |
| 26673 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_5x4); |
| 26674 | } |
| 26675 | } |
| 26676 | |
| 26677 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_5X4, output_height_div_5) { |
| 26678 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 26679 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26680 | DWConv2DMicrokernelTester() |
| 26681 | .input_width(input_width) |
| 26682 | .input_height(input_height) |
| 26683 | .kernel_height(5) |
| 26684 | .kernel_width(5) |
| 26685 | .subsampling(1) |
| 26686 | .padding_left(2) |
| 26687 | .padding_right(2) |
| 26688 | .padding_top(2) |
| 26689 | .padding_bottom(2) |
| 26690 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_5x4); |
| 26691 | } |
| 26692 | } |
| 26693 | } |
| 26694 | |
| 26695 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_5X4, output_height_lt_5) { |
| 26696 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 26697 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26698 | DWConv2DMicrokernelTester() |
| 26699 | .input_width(input_width) |
| 26700 | .input_height(input_height) |
| 26701 | .kernel_height(5) |
| 26702 | .kernel_width(5) |
| 26703 | .subsampling(1) |
| 26704 | .padding_left(2) |
| 26705 | .padding_right(2) |
| 26706 | .padding_top(2) |
| 26707 | .padding_bottom(2) |
| 26708 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_5x4); |
| 26709 | } |
| 26710 | } |
| 26711 | } |
| 26712 | |
| 26713 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_LOADSPLAT_5X4, output_height_gt_5) { |
| 26714 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 26715 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26716 | DWConv2DMicrokernelTester() |
| 26717 | .input_width(input_width) |
| 26718 | .input_height(input_height) |
| 26719 | .kernel_height(5) |
| 26720 | .kernel_width(5) |
| 26721 | .subsampling(1) |
| 26722 | .padding_left(2) |
| 26723 | .padding_right(2) |
| 26724 | .padding_top(2) |
| 26725 | .padding_bottom(2) |
| 26726 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_5x4); |
| 26727 | } |
| 26728 | } |
| 26729 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26730 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26731 | |
| 26732 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26733 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26734 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_eq_4) { |
| 26735 | DWConv2DMicrokernelTester() |
| 26736 | .input_width(4) |
| 26737 | .input_height(1) |
| 26738 | .kernel_height(5) |
| 26739 | .kernel_width(5) |
| 26740 | .subsampling(1) |
| 26741 | .padding_left(2) |
| 26742 | .padding_right(2) |
| 26743 | .padding_top(2) |
| 26744 | .padding_bottom(2) |
| 26745 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2); |
| 26746 | } |
| 26747 | |
| 26748 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_div_4) { |
| 26749 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 26750 | DWConv2DMicrokernelTester() |
| 26751 | .input_width(input_width) |
| 26752 | .input_height(1) |
| 26753 | .kernel_height(5) |
| 26754 | .kernel_width(5) |
| 26755 | .subsampling(1) |
| 26756 | .padding_left(2) |
| 26757 | .padding_right(2) |
| 26758 | .padding_top(2) |
| 26759 | .padding_bottom(2) |
| 26760 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2); |
| 26761 | } |
| 26762 | } |
| 26763 | |
| 26764 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_lt_4) { |
| 26765 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 26766 | DWConv2DMicrokernelTester() |
| 26767 | .input_width(4) |
| 26768 | .input_height(1) |
| 26769 | .kernel_height(5) |
| 26770 | .kernel_width(5) |
| 26771 | .subsampling(1) |
| 26772 | .padding_left(2) |
| 26773 | .padding_right(2) |
| 26774 | .padding_top(2) |
| 26775 | .padding_bottom(2) |
| 26776 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2); |
| 26777 | } |
| 26778 | } |
| 26779 | |
| 26780 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_gt_4) { |
| 26781 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 26782 | DWConv2DMicrokernelTester() |
| 26783 | .input_width(input_width) |
| 26784 | .input_height(1) |
| 26785 | .kernel_height(5) |
| 26786 | .kernel_width(5) |
| 26787 | .subsampling(1) |
| 26788 | .padding_left(2) |
| 26789 | .padding_right(2) |
| 26790 | .padding_top(2) |
| 26791 | .padding_bottom(2) |
| 26792 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2); |
| 26793 | } |
| 26794 | } |
| 26795 | |
| 26796 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_height_gt_1) { |
| 26797 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 26798 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26799 | DWConv2DMicrokernelTester() |
| 26800 | .input_width(input_width) |
| 26801 | .input_height(input_height) |
| 26802 | .kernel_height(5) |
| 26803 | .kernel_width(5) |
| 26804 | .subsampling(1) |
| 26805 | .padding_left(2) |
| 26806 | .padding_right(2) |
| 26807 | .padding_top(2) |
| 26808 | .padding_bottom(2) |
| 26809 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2); |
| 26810 | } |
| 26811 | } |
| 26812 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26813 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26814 | |
| 26815 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26816 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26817 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_eq_4) { |
| 26818 | DWConv2DMicrokernelTester() |
| 26819 | .input_width(4) |
| 26820 | .input_height(1) |
| 26821 | .kernel_height(5) |
| 26822 | .kernel_width(5) |
| 26823 | .subsampling(1) |
| 26824 | .padding_left(2) |
| 26825 | .padding_right(2) |
| 26826 | .padding_top(2) |
| 26827 | .padding_bottom(2) |
| 26828 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3); |
| 26829 | } |
| 26830 | |
| 26831 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_div_4) { |
| 26832 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 26833 | DWConv2DMicrokernelTester() |
| 26834 | .input_width(input_width) |
| 26835 | .input_height(1) |
| 26836 | .kernel_height(5) |
| 26837 | .kernel_width(5) |
| 26838 | .subsampling(1) |
| 26839 | .padding_left(2) |
| 26840 | .padding_right(2) |
| 26841 | .padding_top(2) |
| 26842 | .padding_bottom(2) |
| 26843 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3); |
| 26844 | } |
| 26845 | } |
| 26846 | |
| 26847 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_lt_4) { |
| 26848 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 26849 | DWConv2DMicrokernelTester() |
| 26850 | .input_width(4) |
| 26851 | .input_height(1) |
| 26852 | .kernel_height(5) |
| 26853 | .kernel_width(5) |
| 26854 | .subsampling(1) |
| 26855 | .padding_left(2) |
| 26856 | .padding_right(2) |
| 26857 | .padding_top(2) |
| 26858 | .padding_bottom(2) |
| 26859 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3); |
| 26860 | } |
| 26861 | } |
| 26862 | |
| 26863 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_gt_4) { |
| 26864 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 26865 | DWConv2DMicrokernelTester() |
| 26866 | .input_width(input_width) |
| 26867 | .input_height(1) |
| 26868 | .kernel_height(5) |
| 26869 | .kernel_width(5) |
| 26870 | .subsampling(1) |
| 26871 | .padding_left(2) |
| 26872 | .padding_right(2) |
| 26873 | .padding_top(2) |
| 26874 | .padding_bottom(2) |
| 26875 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3); |
| 26876 | } |
| 26877 | } |
| 26878 | |
| 26879 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_height_gt_1) { |
| 26880 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 26881 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26882 | DWConv2DMicrokernelTester() |
| 26883 | .input_width(input_width) |
| 26884 | .input_height(input_height) |
| 26885 | .kernel_height(5) |
| 26886 | .kernel_width(5) |
| 26887 | .subsampling(1) |
| 26888 | .padding_left(2) |
| 26889 | .padding_right(2) |
| 26890 | .padding_top(2) |
| 26891 | .padding_bottom(2) |
| 26892 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3); |
| 26893 | } |
| 26894 | } |
| 26895 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26896 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26897 | |
| 26898 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26899 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26900 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_eq_4) { |
| 26901 | DWConv2DMicrokernelTester() |
| 26902 | .input_width(4) |
| 26903 | .input_height(1) |
| 26904 | .kernel_height(5) |
| 26905 | .kernel_width(5) |
| 26906 | .subsampling(1) |
| 26907 | .padding_left(2) |
| 26908 | .padding_right(2) |
| 26909 | .padding_top(2) |
| 26910 | .padding_bottom(2) |
| 26911 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4); |
| 26912 | } |
| 26913 | |
| 26914 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_div_4) { |
| 26915 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 26916 | DWConv2DMicrokernelTester() |
| 26917 | .input_width(input_width) |
| 26918 | .input_height(1) |
| 26919 | .kernel_height(5) |
| 26920 | .kernel_width(5) |
| 26921 | .subsampling(1) |
| 26922 | .padding_left(2) |
| 26923 | .padding_right(2) |
| 26924 | .padding_top(2) |
| 26925 | .padding_bottom(2) |
| 26926 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4); |
| 26927 | } |
| 26928 | } |
| 26929 | |
| 26930 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_lt_4) { |
| 26931 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 26932 | DWConv2DMicrokernelTester() |
| 26933 | .input_width(4) |
| 26934 | .input_height(1) |
| 26935 | .kernel_height(5) |
| 26936 | .kernel_width(5) |
| 26937 | .subsampling(1) |
| 26938 | .padding_left(2) |
| 26939 | .padding_right(2) |
| 26940 | .padding_top(2) |
| 26941 | .padding_bottom(2) |
| 26942 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4); |
| 26943 | } |
| 26944 | } |
| 26945 | |
| 26946 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_gt_4) { |
| 26947 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 26948 | DWConv2DMicrokernelTester() |
| 26949 | .input_width(input_width) |
| 26950 | .input_height(1) |
| 26951 | .kernel_height(5) |
| 26952 | .kernel_width(5) |
| 26953 | .subsampling(1) |
| 26954 | .padding_left(2) |
| 26955 | .padding_right(2) |
| 26956 | .padding_top(2) |
| 26957 | .padding_bottom(2) |
| 26958 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4); |
| 26959 | } |
| 26960 | } |
| 26961 | |
| 26962 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_height_gt_1) { |
| 26963 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 26964 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 26965 | DWConv2DMicrokernelTester() |
| 26966 | .input_width(input_width) |
| 26967 | .input_height(input_height) |
| 26968 | .kernel_height(5) |
| 26969 | .kernel_width(5) |
| 26970 | .subsampling(1) |
| 26971 | .padding_left(2) |
| 26972 | .padding_right(2) |
| 26973 | .padding_top(2) |
| 26974 | .padding_bottom(2) |
| 26975 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4); |
| 26976 | } |
| 26977 | } |
| 26978 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26979 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26980 | |
| 26981 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 26982 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 26983 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC5, output_width_eq_4) { |
| 26984 | DWConv2DMicrokernelTester() |
| 26985 | .input_width(4) |
| 26986 | .input_height(1) |
| 26987 | .kernel_height(5) |
| 26988 | .kernel_width(5) |
| 26989 | .subsampling(1) |
| 26990 | .padding_left(2) |
| 26991 | .padding_right(2) |
| 26992 | .padding_top(2) |
| 26993 | .padding_bottom(2) |
| 26994 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc5); |
| 26995 | } |
| 26996 | |
| 26997 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC5, output_width_div_4) { |
| 26998 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 26999 | DWConv2DMicrokernelTester() |
| 27000 | .input_width(input_width) |
| 27001 | .input_height(1) |
| 27002 | .kernel_height(5) |
| 27003 | .kernel_width(5) |
| 27004 | .subsampling(1) |
| 27005 | .padding_left(2) |
| 27006 | .padding_right(2) |
| 27007 | .padding_top(2) |
| 27008 | .padding_bottom(2) |
| 27009 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc5); |
| 27010 | } |
| 27011 | } |
| 27012 | |
| 27013 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC5, output_width_lt_4) { |
| 27014 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 27015 | DWConv2DMicrokernelTester() |
| 27016 | .input_width(4) |
| 27017 | .input_height(1) |
| 27018 | .kernel_height(5) |
| 27019 | .kernel_width(5) |
| 27020 | .subsampling(1) |
| 27021 | .padding_left(2) |
| 27022 | .padding_right(2) |
| 27023 | .padding_top(2) |
| 27024 | .padding_bottom(2) |
| 27025 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc5); |
| 27026 | } |
| 27027 | } |
| 27028 | |
| 27029 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC5, output_width_gt_4) { |
| 27030 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 27031 | DWConv2DMicrokernelTester() |
| 27032 | .input_width(input_width) |
| 27033 | .input_height(1) |
| 27034 | .kernel_height(5) |
| 27035 | .kernel_width(5) |
| 27036 | .subsampling(1) |
| 27037 | .padding_left(2) |
| 27038 | .padding_right(2) |
| 27039 | .padding_top(2) |
| 27040 | .padding_bottom(2) |
| 27041 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc5); |
| 27042 | } |
| 27043 | } |
| 27044 | |
| 27045 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC5, output_height_gt_1) { |
| 27046 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 27047 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27048 | DWConv2DMicrokernelTester() |
| 27049 | .input_width(input_width) |
| 27050 | .input_height(input_height) |
| 27051 | .kernel_height(5) |
| 27052 | .kernel_width(5) |
| 27053 | .subsampling(1) |
| 27054 | .padding_left(2) |
| 27055 | .padding_right(2) |
| 27056 | .padding_top(2) |
| 27057 | .padding_bottom(2) |
| 27058 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc5); |
| 27059 | } |
| 27060 | } |
| 27061 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27062 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27063 | |
| 27064 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27065 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27066 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4, output_width_eq_4) { |
| 27067 | DWConv2DMicrokernelTester() |
| 27068 | .input_width(4) |
| 27069 | .input_height(1) |
| 27070 | .kernel_height(5) |
| 27071 | .kernel_width(5) |
| 27072 | .subsampling(1) |
| 27073 | .padding_left(2) |
| 27074 | .padding_right(2) |
| 27075 | .padding_top(2) |
| 27076 | .padding_bottom(2) |
| 27077 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4); |
| 27078 | } |
| 27079 | |
| 27080 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4, output_width_div_4) { |
| 27081 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 27082 | DWConv2DMicrokernelTester() |
| 27083 | .input_width(input_width) |
| 27084 | .input_height(1) |
| 27085 | .kernel_height(5) |
| 27086 | .kernel_width(5) |
| 27087 | .subsampling(1) |
| 27088 | .padding_left(2) |
| 27089 | .padding_right(2) |
| 27090 | .padding_top(2) |
| 27091 | .padding_bottom(2) |
| 27092 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4); |
| 27093 | } |
| 27094 | } |
| 27095 | |
| 27096 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4, output_width_lt_4) { |
| 27097 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 27098 | DWConv2DMicrokernelTester() |
| 27099 | .input_width(4) |
| 27100 | .input_height(1) |
| 27101 | .kernel_height(5) |
| 27102 | .kernel_width(5) |
| 27103 | .subsampling(1) |
| 27104 | .padding_left(2) |
| 27105 | .padding_right(2) |
| 27106 | .padding_top(2) |
| 27107 | .padding_bottom(2) |
| 27108 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4); |
| 27109 | } |
| 27110 | } |
| 27111 | |
| 27112 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4, output_width_gt_4) { |
| 27113 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 27114 | DWConv2DMicrokernelTester() |
| 27115 | .input_width(input_width) |
| 27116 | .input_height(1) |
| 27117 | .kernel_height(5) |
| 27118 | .kernel_width(5) |
| 27119 | .subsampling(1) |
| 27120 | .padding_left(2) |
| 27121 | .padding_right(2) |
| 27122 | .padding_top(2) |
| 27123 | .padding_bottom(2) |
| 27124 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4); |
| 27125 | } |
| 27126 | } |
| 27127 | |
| 27128 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_1X4, output_height_gt_1) { |
| 27129 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 27130 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27131 | DWConv2DMicrokernelTester() |
| 27132 | .input_width(input_width) |
| 27133 | .input_height(input_height) |
| 27134 | .kernel_height(5) |
| 27135 | .kernel_width(5) |
| 27136 | .subsampling(1) |
| 27137 | .padding_left(2) |
| 27138 | .padding_right(2) |
| 27139 | .padding_top(2) |
| 27140 | .padding_bottom(2) |
| 27141 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4); |
| 27142 | } |
| 27143 | } |
| 27144 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27145 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27146 | |
| 27147 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27148 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27149 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_eq_4) { |
| 27150 | DWConv2DMicrokernelTester() |
| 27151 | .input_width(4) |
| 27152 | .input_height(2) |
| 27153 | .kernel_height(5) |
| 27154 | .kernel_width(5) |
| 27155 | .subsampling(1) |
| 27156 | .padding_left(2) |
| 27157 | .padding_right(2) |
| 27158 | .padding_top(2) |
| 27159 | .padding_bottom(2) |
| 27160 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 27161 | } |
| 27162 | |
| 27163 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_div_4) { |
| 27164 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 27165 | DWConv2DMicrokernelTester() |
| 27166 | .input_width(input_width) |
| 27167 | .input_height(2) |
| 27168 | .kernel_height(5) |
| 27169 | .kernel_width(5) |
| 27170 | .subsampling(1) |
| 27171 | .padding_left(2) |
| 27172 | .padding_right(2) |
| 27173 | .padding_top(2) |
| 27174 | .padding_bottom(2) |
| 27175 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 27176 | } |
| 27177 | } |
| 27178 | |
| 27179 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_lt_4) { |
| 27180 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 27181 | DWConv2DMicrokernelTester() |
| 27182 | .input_width(4) |
| 27183 | .input_height(2) |
| 27184 | .kernel_height(5) |
| 27185 | .kernel_width(5) |
| 27186 | .subsampling(1) |
| 27187 | .padding_left(2) |
| 27188 | .padding_right(2) |
| 27189 | .padding_top(2) |
| 27190 | .padding_bottom(2) |
| 27191 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 27192 | } |
| 27193 | } |
| 27194 | |
| 27195 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_gt_4) { |
| 27196 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 27197 | DWConv2DMicrokernelTester() |
| 27198 | .input_width(input_width) |
| 27199 | .input_height(2) |
| 27200 | .kernel_height(5) |
| 27201 | .kernel_width(5) |
| 27202 | .subsampling(1) |
| 27203 | .padding_left(2) |
| 27204 | .padding_right(2) |
| 27205 | .padding_top(2) |
| 27206 | .padding_bottom(2) |
| 27207 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 27208 | } |
| 27209 | } |
| 27210 | |
| 27211 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_div_2) { |
| 27212 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 27213 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27214 | DWConv2DMicrokernelTester() |
| 27215 | .input_width(input_width) |
| 27216 | .input_height(input_height) |
| 27217 | .kernel_height(5) |
| 27218 | .kernel_width(5) |
| 27219 | .subsampling(1) |
| 27220 | .padding_left(2) |
| 27221 | .padding_right(2) |
| 27222 | .padding_top(2) |
| 27223 | .padding_bottom(2) |
| 27224 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 27225 | } |
| 27226 | } |
| 27227 | } |
| 27228 | |
| 27229 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_lt_2) { |
| 27230 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 27231 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27232 | DWConv2DMicrokernelTester() |
| 27233 | .input_width(input_width) |
| 27234 | .input_height(input_height) |
| 27235 | .kernel_height(5) |
| 27236 | .kernel_width(5) |
| 27237 | .subsampling(1) |
| 27238 | .padding_left(2) |
| 27239 | .padding_right(2) |
| 27240 | .padding_top(2) |
| 27241 | .padding_bottom(2) |
| 27242 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 27243 | } |
| 27244 | } |
| 27245 | } |
| 27246 | |
| 27247 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_gt_2) { |
| 27248 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 27249 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27250 | DWConv2DMicrokernelTester() |
| 27251 | .input_width(input_width) |
| 27252 | .input_height(input_height) |
| 27253 | .kernel_height(5) |
| 27254 | .kernel_width(5) |
| 27255 | .subsampling(1) |
| 27256 | .padding_left(2) |
| 27257 | .padding_right(2) |
| 27258 | .padding_top(2) |
| 27259 | .padding_bottom(2) |
| 27260 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 27261 | } |
| 27262 | } |
| 27263 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27264 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27265 | |
| 27266 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27267 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27268 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_width_eq_4) { |
| 27269 | DWConv2DMicrokernelTester() |
| 27270 | .input_width(4) |
| 27271 | .input_height(2) |
| 27272 | .kernel_height(5) |
| 27273 | .kernel_width(5) |
| 27274 | .subsampling(1) |
| 27275 | .padding_left(2) |
| 27276 | .padding_right(2) |
| 27277 | .padding_top(2) |
| 27278 | .padding_bottom(2) |
| 27279 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 27280 | } |
| 27281 | |
| 27282 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_width_div_4) { |
| 27283 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 27284 | DWConv2DMicrokernelTester() |
| 27285 | .input_width(input_width) |
| 27286 | .input_height(2) |
| 27287 | .kernel_height(5) |
| 27288 | .kernel_width(5) |
| 27289 | .subsampling(1) |
| 27290 | .padding_left(2) |
| 27291 | .padding_right(2) |
| 27292 | .padding_top(2) |
| 27293 | .padding_bottom(2) |
| 27294 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 27295 | } |
| 27296 | } |
| 27297 | |
| 27298 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_width_lt_4) { |
| 27299 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 27300 | DWConv2DMicrokernelTester() |
| 27301 | .input_width(4) |
| 27302 | .input_height(2) |
| 27303 | .kernel_height(5) |
| 27304 | .kernel_width(5) |
| 27305 | .subsampling(1) |
| 27306 | .padding_left(2) |
| 27307 | .padding_right(2) |
| 27308 | .padding_top(2) |
| 27309 | .padding_bottom(2) |
| 27310 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 27311 | } |
| 27312 | } |
| 27313 | |
| 27314 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_width_gt_4) { |
| 27315 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 27316 | DWConv2DMicrokernelTester() |
| 27317 | .input_width(input_width) |
| 27318 | .input_height(2) |
| 27319 | .kernel_height(5) |
| 27320 | .kernel_width(5) |
| 27321 | .subsampling(1) |
| 27322 | .padding_left(2) |
| 27323 | .padding_right(2) |
| 27324 | .padding_top(2) |
| 27325 | .padding_bottom(2) |
| 27326 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 27327 | } |
| 27328 | } |
| 27329 | |
| 27330 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_height_div_2) { |
| 27331 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 27332 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27333 | DWConv2DMicrokernelTester() |
| 27334 | .input_width(input_width) |
| 27335 | .input_height(input_height) |
| 27336 | .kernel_height(5) |
| 27337 | .kernel_width(5) |
| 27338 | .subsampling(1) |
| 27339 | .padding_left(2) |
| 27340 | .padding_right(2) |
| 27341 | .padding_top(2) |
| 27342 | .padding_bottom(2) |
| 27343 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 27344 | } |
| 27345 | } |
| 27346 | } |
| 27347 | |
| 27348 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_height_lt_2) { |
| 27349 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 27350 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27351 | DWConv2DMicrokernelTester() |
| 27352 | .input_width(input_width) |
| 27353 | .input_height(input_height) |
| 27354 | .kernel_height(5) |
| 27355 | .kernel_width(5) |
| 27356 | .subsampling(1) |
| 27357 | .padding_left(2) |
| 27358 | .padding_right(2) |
| 27359 | .padding_top(2) |
| 27360 | .padding_bottom(2) |
| 27361 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 27362 | } |
| 27363 | } |
| 27364 | } |
| 27365 | |
| 27366 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_height_gt_2) { |
| 27367 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 27368 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27369 | DWConv2DMicrokernelTester() |
| 27370 | .input_width(input_width) |
| 27371 | .input_height(input_height) |
| 27372 | .kernel_height(5) |
| 27373 | .kernel_width(5) |
| 27374 | .subsampling(1) |
| 27375 | .padding_left(2) |
| 27376 | .padding_right(2) |
| 27377 | .padding_top(2) |
| 27378 | .padding_bottom(2) |
| 27379 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 27380 | } |
| 27381 | } |
| 27382 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27383 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27384 | |
| 27385 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27386 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27387 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4, output_width_eq_4) { |
| 27388 | DWConv2DMicrokernelTester() |
| 27389 | .input_width(4) |
| 27390 | .input_height(2) |
| 27391 | .kernel_height(5) |
| 27392 | .kernel_width(5) |
| 27393 | .subsampling(1) |
| 27394 | .padding_left(2) |
| 27395 | .padding_right(2) |
| 27396 | .padding_top(2) |
| 27397 | .padding_bottom(2) |
| 27398 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4); |
| 27399 | } |
| 27400 | |
| 27401 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4, output_width_div_4) { |
| 27402 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 27403 | DWConv2DMicrokernelTester() |
| 27404 | .input_width(input_width) |
| 27405 | .input_height(2) |
| 27406 | .kernel_height(5) |
| 27407 | .kernel_width(5) |
| 27408 | .subsampling(1) |
| 27409 | .padding_left(2) |
| 27410 | .padding_right(2) |
| 27411 | .padding_top(2) |
| 27412 | .padding_bottom(2) |
| 27413 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4); |
| 27414 | } |
| 27415 | } |
| 27416 | |
| 27417 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4, output_width_lt_4) { |
| 27418 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 27419 | DWConv2DMicrokernelTester() |
| 27420 | .input_width(4) |
| 27421 | .input_height(2) |
| 27422 | .kernel_height(5) |
| 27423 | .kernel_width(5) |
| 27424 | .subsampling(1) |
| 27425 | .padding_left(2) |
| 27426 | .padding_right(2) |
| 27427 | .padding_top(2) |
| 27428 | .padding_bottom(2) |
| 27429 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4); |
| 27430 | } |
| 27431 | } |
| 27432 | |
| 27433 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4, output_width_gt_4) { |
| 27434 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 27435 | DWConv2DMicrokernelTester() |
| 27436 | .input_width(input_width) |
| 27437 | .input_height(2) |
| 27438 | .kernel_height(5) |
| 27439 | .kernel_width(5) |
| 27440 | .subsampling(1) |
| 27441 | .padding_left(2) |
| 27442 | .padding_right(2) |
| 27443 | .padding_top(2) |
| 27444 | .padding_bottom(2) |
| 27445 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4); |
| 27446 | } |
| 27447 | } |
| 27448 | |
| 27449 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4, output_height_div_2) { |
| 27450 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 27451 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27452 | DWConv2DMicrokernelTester() |
| 27453 | .input_width(input_width) |
| 27454 | .input_height(input_height) |
| 27455 | .kernel_height(5) |
| 27456 | .kernel_width(5) |
| 27457 | .subsampling(1) |
| 27458 | .padding_left(2) |
| 27459 | .padding_right(2) |
| 27460 | .padding_top(2) |
| 27461 | .padding_bottom(2) |
| 27462 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4); |
| 27463 | } |
| 27464 | } |
| 27465 | } |
| 27466 | |
| 27467 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4, output_height_lt_2) { |
| 27468 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 27469 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27470 | DWConv2DMicrokernelTester() |
| 27471 | .input_width(input_width) |
| 27472 | .input_height(input_height) |
| 27473 | .kernel_height(5) |
| 27474 | .kernel_width(5) |
| 27475 | .subsampling(1) |
| 27476 | .padding_left(2) |
| 27477 | .padding_right(2) |
| 27478 | .padding_top(2) |
| 27479 | .padding_bottom(2) |
| 27480 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4); |
| 27481 | } |
| 27482 | } |
| 27483 | } |
| 27484 | |
| 27485 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_2X4, output_height_gt_2) { |
| 27486 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 27487 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27488 | DWConv2DMicrokernelTester() |
| 27489 | .input_width(input_width) |
| 27490 | .input_height(input_height) |
| 27491 | .kernel_height(5) |
| 27492 | .kernel_width(5) |
| 27493 | .subsampling(1) |
| 27494 | .padding_left(2) |
| 27495 | .padding_right(2) |
| 27496 | .padding_top(2) |
| 27497 | .padding_bottom(2) |
| 27498 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4); |
| 27499 | } |
| 27500 | } |
| 27501 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27502 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27503 | |
| 27504 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27505 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27506 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_width_eq_4) { |
| 27507 | DWConv2DMicrokernelTester() |
| 27508 | .input_width(4) |
| 27509 | .input_height(3) |
| 27510 | .kernel_height(5) |
| 27511 | .kernel_width(5) |
| 27512 | .subsampling(1) |
| 27513 | .padding_left(2) |
| 27514 | .padding_right(2) |
| 27515 | .padding_top(2) |
| 27516 | .padding_bottom(2) |
| 27517 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 27518 | } |
| 27519 | |
| 27520 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_width_div_4) { |
| 27521 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 27522 | DWConv2DMicrokernelTester() |
| 27523 | .input_width(input_width) |
| 27524 | .input_height(3) |
| 27525 | .kernel_height(5) |
| 27526 | .kernel_width(5) |
| 27527 | .subsampling(1) |
| 27528 | .padding_left(2) |
| 27529 | .padding_right(2) |
| 27530 | .padding_top(2) |
| 27531 | .padding_bottom(2) |
| 27532 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 27533 | } |
| 27534 | } |
| 27535 | |
| 27536 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_width_lt_4) { |
| 27537 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 27538 | DWConv2DMicrokernelTester() |
| 27539 | .input_width(4) |
| 27540 | .input_height(3) |
| 27541 | .kernel_height(5) |
| 27542 | .kernel_width(5) |
| 27543 | .subsampling(1) |
| 27544 | .padding_left(2) |
| 27545 | .padding_right(2) |
| 27546 | .padding_top(2) |
| 27547 | .padding_bottom(2) |
| 27548 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 27549 | } |
| 27550 | } |
| 27551 | |
| 27552 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_width_gt_4) { |
| 27553 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 27554 | DWConv2DMicrokernelTester() |
| 27555 | .input_width(input_width) |
| 27556 | .input_height(3) |
| 27557 | .kernel_height(5) |
| 27558 | .kernel_width(5) |
| 27559 | .subsampling(1) |
| 27560 | .padding_left(2) |
| 27561 | .padding_right(2) |
| 27562 | .padding_top(2) |
| 27563 | .padding_bottom(2) |
| 27564 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 27565 | } |
| 27566 | } |
| 27567 | |
| 27568 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_height_div_3) { |
| 27569 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 27570 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27571 | DWConv2DMicrokernelTester() |
| 27572 | .input_width(input_width) |
| 27573 | .input_height(input_height) |
| 27574 | .kernel_height(5) |
| 27575 | .kernel_width(5) |
| 27576 | .subsampling(1) |
| 27577 | .padding_left(2) |
| 27578 | .padding_right(2) |
| 27579 | .padding_top(2) |
| 27580 | .padding_bottom(2) |
| 27581 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 27582 | } |
| 27583 | } |
| 27584 | } |
| 27585 | |
| 27586 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_height_lt_3) { |
| 27587 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 27588 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27589 | DWConv2DMicrokernelTester() |
| 27590 | .input_width(input_width) |
| 27591 | .input_height(input_height) |
| 27592 | .kernel_height(5) |
| 27593 | .kernel_width(5) |
| 27594 | .subsampling(1) |
| 27595 | .padding_left(2) |
| 27596 | .padding_right(2) |
| 27597 | .padding_top(2) |
| 27598 | .padding_bottom(2) |
| 27599 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 27600 | } |
| 27601 | } |
| 27602 | } |
| 27603 | |
| 27604 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_height_gt_3) { |
| 27605 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 27606 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27607 | DWConv2DMicrokernelTester() |
| 27608 | .input_width(input_width) |
| 27609 | .input_height(input_height) |
| 27610 | .kernel_height(5) |
| 27611 | .kernel_width(5) |
| 27612 | .subsampling(1) |
| 27613 | .padding_left(2) |
| 27614 | .padding_right(2) |
| 27615 | .padding_top(2) |
| 27616 | .padding_bottom(2) |
| 27617 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 27618 | } |
| 27619 | } |
| 27620 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27621 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27622 | |
| 27623 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27624 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27625 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4, output_width_eq_4) { |
| 27626 | DWConv2DMicrokernelTester() |
| 27627 | .input_width(4) |
| 27628 | .input_height(3) |
| 27629 | .kernel_height(5) |
| 27630 | .kernel_width(5) |
| 27631 | .subsampling(1) |
| 27632 | .padding_left(2) |
| 27633 | .padding_right(2) |
| 27634 | .padding_top(2) |
| 27635 | .padding_bottom(2) |
| 27636 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4); |
| 27637 | } |
| 27638 | |
| 27639 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4, output_width_div_4) { |
| 27640 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 27641 | DWConv2DMicrokernelTester() |
| 27642 | .input_width(input_width) |
| 27643 | .input_height(3) |
| 27644 | .kernel_height(5) |
| 27645 | .kernel_width(5) |
| 27646 | .subsampling(1) |
| 27647 | .padding_left(2) |
| 27648 | .padding_right(2) |
| 27649 | .padding_top(2) |
| 27650 | .padding_bottom(2) |
| 27651 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4); |
| 27652 | } |
| 27653 | } |
| 27654 | |
| 27655 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4, output_width_lt_4) { |
| 27656 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 27657 | DWConv2DMicrokernelTester() |
| 27658 | .input_width(4) |
| 27659 | .input_height(3) |
| 27660 | .kernel_height(5) |
| 27661 | .kernel_width(5) |
| 27662 | .subsampling(1) |
| 27663 | .padding_left(2) |
| 27664 | .padding_right(2) |
| 27665 | .padding_top(2) |
| 27666 | .padding_bottom(2) |
| 27667 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4); |
| 27668 | } |
| 27669 | } |
| 27670 | |
| 27671 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4, output_width_gt_4) { |
| 27672 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 27673 | DWConv2DMicrokernelTester() |
| 27674 | .input_width(input_width) |
| 27675 | .input_height(3) |
| 27676 | .kernel_height(5) |
| 27677 | .kernel_width(5) |
| 27678 | .subsampling(1) |
| 27679 | .padding_left(2) |
| 27680 | .padding_right(2) |
| 27681 | .padding_top(2) |
| 27682 | .padding_bottom(2) |
| 27683 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4); |
| 27684 | } |
| 27685 | } |
| 27686 | |
| 27687 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4, output_height_div_3) { |
| 27688 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 27689 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27690 | DWConv2DMicrokernelTester() |
| 27691 | .input_width(input_width) |
| 27692 | .input_height(input_height) |
| 27693 | .kernel_height(5) |
| 27694 | .kernel_width(5) |
| 27695 | .subsampling(1) |
| 27696 | .padding_left(2) |
| 27697 | .padding_right(2) |
| 27698 | .padding_top(2) |
| 27699 | .padding_bottom(2) |
| 27700 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4); |
| 27701 | } |
| 27702 | } |
| 27703 | } |
| 27704 | |
| 27705 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4, output_height_lt_3) { |
| 27706 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 27707 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27708 | DWConv2DMicrokernelTester() |
| 27709 | .input_width(input_width) |
| 27710 | .input_height(input_height) |
| 27711 | .kernel_height(5) |
| 27712 | .kernel_width(5) |
| 27713 | .subsampling(1) |
| 27714 | .padding_left(2) |
| 27715 | .padding_right(2) |
| 27716 | .padding_top(2) |
| 27717 | .padding_bottom(2) |
| 27718 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4); |
| 27719 | } |
| 27720 | } |
| 27721 | } |
| 27722 | |
| 27723 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_3X4, output_height_gt_3) { |
| 27724 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 27725 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27726 | DWConv2DMicrokernelTester() |
| 27727 | .input_width(input_width) |
| 27728 | .input_height(input_height) |
| 27729 | .kernel_height(5) |
| 27730 | .kernel_width(5) |
| 27731 | .subsampling(1) |
| 27732 | .padding_left(2) |
| 27733 | .padding_right(2) |
| 27734 | .padding_top(2) |
| 27735 | .padding_bottom(2) |
| 27736 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4); |
| 27737 | } |
| 27738 | } |
| 27739 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27740 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27741 | |
| 27742 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27743 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27744 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4_ACC2, output_width_eq_4) { |
| 27745 | DWConv2DMicrokernelTester() |
| 27746 | .input_width(4) |
| 27747 | .input_height(4) |
| 27748 | .kernel_height(5) |
| 27749 | .kernel_width(5) |
| 27750 | .subsampling(1) |
| 27751 | .padding_left(2) |
| 27752 | .padding_right(2) |
| 27753 | .padding_top(2) |
| 27754 | .padding_bottom(2) |
| 27755 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4_acc2); |
| 27756 | } |
| 27757 | |
| 27758 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4_ACC2, output_width_div_4) { |
| 27759 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 27760 | DWConv2DMicrokernelTester() |
| 27761 | .input_width(input_width) |
| 27762 | .input_height(4) |
| 27763 | .kernel_height(5) |
| 27764 | .kernel_width(5) |
| 27765 | .subsampling(1) |
| 27766 | .padding_left(2) |
| 27767 | .padding_right(2) |
| 27768 | .padding_top(2) |
| 27769 | .padding_bottom(2) |
| 27770 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4_acc2); |
| 27771 | } |
| 27772 | } |
| 27773 | |
| 27774 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4_ACC2, output_width_lt_4) { |
| 27775 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 27776 | DWConv2DMicrokernelTester() |
| 27777 | .input_width(4) |
| 27778 | .input_height(4) |
| 27779 | .kernel_height(5) |
| 27780 | .kernel_width(5) |
| 27781 | .subsampling(1) |
| 27782 | .padding_left(2) |
| 27783 | .padding_right(2) |
| 27784 | .padding_top(2) |
| 27785 | .padding_bottom(2) |
| 27786 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4_acc2); |
| 27787 | } |
| 27788 | } |
| 27789 | |
| 27790 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4_ACC2, output_width_gt_4) { |
| 27791 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 27792 | DWConv2DMicrokernelTester() |
| 27793 | .input_width(input_width) |
| 27794 | .input_height(4) |
| 27795 | .kernel_height(5) |
| 27796 | .kernel_width(5) |
| 27797 | .subsampling(1) |
| 27798 | .padding_left(2) |
| 27799 | .padding_right(2) |
| 27800 | .padding_top(2) |
| 27801 | .padding_bottom(2) |
| 27802 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4_acc2); |
| 27803 | } |
| 27804 | } |
| 27805 | |
| 27806 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4_ACC2, output_height_div_4) { |
| 27807 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 27808 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27809 | DWConv2DMicrokernelTester() |
| 27810 | .input_width(input_width) |
| 27811 | .input_height(input_height) |
| 27812 | .kernel_height(5) |
| 27813 | .kernel_width(5) |
| 27814 | .subsampling(1) |
| 27815 | .padding_left(2) |
| 27816 | .padding_right(2) |
| 27817 | .padding_top(2) |
| 27818 | .padding_bottom(2) |
| 27819 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4_acc2); |
| 27820 | } |
| 27821 | } |
| 27822 | } |
| 27823 | |
| 27824 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4_ACC2, output_height_lt_4) { |
| 27825 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 27826 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27827 | DWConv2DMicrokernelTester() |
| 27828 | .input_width(input_width) |
| 27829 | .input_height(input_height) |
| 27830 | .kernel_height(5) |
| 27831 | .kernel_width(5) |
| 27832 | .subsampling(1) |
| 27833 | .padding_left(2) |
| 27834 | .padding_right(2) |
| 27835 | .padding_top(2) |
| 27836 | .padding_bottom(2) |
| 27837 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4_acc2); |
| 27838 | } |
| 27839 | } |
| 27840 | } |
| 27841 | |
| 27842 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4_ACC2, output_height_gt_4) { |
| 27843 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 27844 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27845 | DWConv2DMicrokernelTester() |
| 27846 | .input_width(input_width) |
| 27847 | .input_height(input_height) |
| 27848 | .kernel_height(5) |
| 27849 | .kernel_width(5) |
| 27850 | .subsampling(1) |
| 27851 | .padding_left(2) |
| 27852 | .padding_right(2) |
| 27853 | .padding_top(2) |
| 27854 | .padding_bottom(2) |
| 27855 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4_acc2); |
| 27856 | } |
| 27857 | } |
| 27858 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27859 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27860 | |
| 27861 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27862 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27863 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4, output_width_eq_4) { |
| 27864 | DWConv2DMicrokernelTester() |
| 27865 | .input_width(4) |
| 27866 | .input_height(4) |
| 27867 | .kernel_height(5) |
| 27868 | .kernel_width(5) |
| 27869 | .subsampling(1) |
| 27870 | .padding_left(2) |
| 27871 | .padding_right(2) |
| 27872 | .padding_top(2) |
| 27873 | .padding_bottom(2) |
| 27874 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4); |
| 27875 | } |
| 27876 | |
| 27877 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4, output_width_div_4) { |
| 27878 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 27879 | DWConv2DMicrokernelTester() |
| 27880 | .input_width(input_width) |
| 27881 | .input_height(4) |
| 27882 | .kernel_height(5) |
| 27883 | .kernel_width(5) |
| 27884 | .subsampling(1) |
| 27885 | .padding_left(2) |
| 27886 | .padding_right(2) |
| 27887 | .padding_top(2) |
| 27888 | .padding_bottom(2) |
| 27889 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4); |
| 27890 | } |
| 27891 | } |
| 27892 | |
| 27893 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4, output_width_lt_4) { |
| 27894 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 27895 | DWConv2DMicrokernelTester() |
| 27896 | .input_width(4) |
| 27897 | .input_height(4) |
| 27898 | .kernel_height(5) |
| 27899 | .kernel_width(5) |
| 27900 | .subsampling(1) |
| 27901 | .padding_left(2) |
| 27902 | .padding_right(2) |
| 27903 | .padding_top(2) |
| 27904 | .padding_bottom(2) |
| 27905 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4); |
| 27906 | } |
| 27907 | } |
| 27908 | |
| 27909 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4, output_width_gt_4) { |
| 27910 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 27911 | DWConv2DMicrokernelTester() |
| 27912 | .input_width(input_width) |
| 27913 | .input_height(4) |
| 27914 | .kernel_height(5) |
| 27915 | .kernel_width(5) |
| 27916 | .subsampling(1) |
| 27917 | .padding_left(2) |
| 27918 | .padding_right(2) |
| 27919 | .padding_top(2) |
| 27920 | .padding_bottom(2) |
| 27921 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4); |
| 27922 | } |
| 27923 | } |
| 27924 | |
| 27925 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4, output_height_div_4) { |
| 27926 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 27927 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27928 | DWConv2DMicrokernelTester() |
| 27929 | .input_width(input_width) |
| 27930 | .input_height(input_height) |
| 27931 | .kernel_height(5) |
| 27932 | .kernel_width(5) |
| 27933 | .subsampling(1) |
| 27934 | .padding_left(2) |
| 27935 | .padding_right(2) |
| 27936 | .padding_top(2) |
| 27937 | .padding_bottom(2) |
| 27938 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4); |
| 27939 | } |
| 27940 | } |
| 27941 | } |
| 27942 | |
| 27943 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4, output_height_lt_4) { |
| 27944 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 27945 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27946 | DWConv2DMicrokernelTester() |
| 27947 | .input_width(input_width) |
| 27948 | .input_height(input_height) |
| 27949 | .kernel_height(5) |
| 27950 | .kernel_width(5) |
| 27951 | .subsampling(1) |
| 27952 | .padding_left(2) |
| 27953 | .padding_right(2) |
| 27954 | .padding_top(2) |
| 27955 | .padding_bottom(2) |
| 27956 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4); |
| 27957 | } |
| 27958 | } |
| 27959 | } |
| 27960 | |
| 27961 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_4X4, output_height_gt_4) { |
| 27962 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 27963 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 27964 | DWConv2DMicrokernelTester() |
| 27965 | .input_width(input_width) |
| 27966 | .input_height(input_height) |
| 27967 | .kernel_height(5) |
| 27968 | .kernel_width(5) |
| 27969 | .subsampling(1) |
| 27970 | .padding_left(2) |
| 27971 | .padding_right(2) |
| 27972 | .padding_top(2) |
| 27973 | .padding_bottom(2) |
| 27974 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4); |
| 27975 | } |
| 27976 | } |
| 27977 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27978 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27979 | |
| 27980 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 27981 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 27982 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_5X4, output_width_eq_4) { |
| 27983 | DWConv2DMicrokernelTester() |
| 27984 | .input_width(4) |
| 27985 | .input_height(5) |
| 27986 | .kernel_height(5) |
| 27987 | .kernel_width(5) |
| 27988 | .subsampling(1) |
| 27989 | .padding_left(2) |
| 27990 | .padding_right(2) |
| 27991 | .padding_top(2) |
| 27992 | .padding_bottom(2) |
| 27993 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_5x4); |
| 27994 | } |
| 27995 | |
| 27996 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_5X4, output_width_div_4) { |
| 27997 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 27998 | DWConv2DMicrokernelTester() |
| 27999 | .input_width(input_width) |
| 28000 | .input_height(5) |
| 28001 | .kernel_height(5) |
| 28002 | .kernel_width(5) |
| 28003 | .subsampling(1) |
| 28004 | .padding_left(2) |
| 28005 | .padding_right(2) |
| 28006 | .padding_top(2) |
| 28007 | .padding_bottom(2) |
| 28008 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_5x4); |
| 28009 | } |
| 28010 | } |
| 28011 | |
| 28012 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_5X4, output_width_lt_4) { |
| 28013 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 28014 | DWConv2DMicrokernelTester() |
| 28015 | .input_width(4) |
| 28016 | .input_height(5) |
| 28017 | .kernel_height(5) |
| 28018 | .kernel_width(5) |
| 28019 | .subsampling(1) |
| 28020 | .padding_left(2) |
| 28021 | .padding_right(2) |
| 28022 | .padding_top(2) |
| 28023 | .padding_bottom(2) |
| 28024 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_5x4); |
| 28025 | } |
| 28026 | } |
| 28027 | |
| 28028 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_5X4, output_width_gt_4) { |
| 28029 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 28030 | DWConv2DMicrokernelTester() |
| 28031 | .input_width(input_width) |
| 28032 | .input_height(5) |
| 28033 | .kernel_height(5) |
| 28034 | .kernel_width(5) |
| 28035 | .subsampling(1) |
| 28036 | .padding_left(2) |
| 28037 | .padding_right(2) |
| 28038 | .padding_top(2) |
| 28039 | .padding_bottom(2) |
| 28040 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_5x4); |
| 28041 | } |
| 28042 | } |
| 28043 | |
| 28044 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_5X4, output_height_div_5) { |
| 28045 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 28046 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28047 | DWConv2DMicrokernelTester() |
| 28048 | .input_width(input_width) |
| 28049 | .input_height(input_height) |
| 28050 | .kernel_height(5) |
| 28051 | .kernel_width(5) |
| 28052 | .subsampling(1) |
| 28053 | .padding_left(2) |
| 28054 | .padding_right(2) |
| 28055 | .padding_top(2) |
| 28056 | .padding_bottom(2) |
| 28057 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_5x4); |
| 28058 | } |
| 28059 | } |
| 28060 | } |
| 28061 | |
| 28062 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_5X4, output_height_lt_5) { |
| 28063 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 28064 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28065 | DWConv2DMicrokernelTester() |
| 28066 | .input_width(input_width) |
| 28067 | .input_height(input_height) |
| 28068 | .kernel_height(5) |
| 28069 | .kernel_width(5) |
| 28070 | .subsampling(1) |
| 28071 | .padding_left(2) |
| 28072 | .padding_right(2) |
| 28073 | .padding_top(2) |
| 28074 | .padding_bottom(2) |
| 28075 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_5x4); |
| 28076 | } |
| 28077 | } |
| 28078 | } |
| 28079 | |
| 28080 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_LOADSPLAT_5X4, output_height_gt_5) { |
| 28081 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 28082 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28083 | DWConv2DMicrokernelTester() |
| 28084 | .input_width(input_width) |
| 28085 | .input_height(input_height) |
| 28086 | .kernel_height(5) |
| 28087 | .kernel_width(5) |
| 28088 | .subsampling(1) |
| 28089 | .padding_left(2) |
| 28090 | .padding_right(2) |
| 28091 | .padding_top(2) |
| 28092 | .padding_bottom(2) |
| 28093 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_5x4); |
| 28094 | } |
| 28095 | } |
| 28096 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28097 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | b20dcd6 | 2020-12-15 16:46:14 -0800 | [diff] [blame] | 28098 | |
| 28099 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28100 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28101 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28102 | DWConv2DMicrokernelTester() |
| 28103 | .input_width(4) |
| 28104 | .input_height(1) |
| 28105 | .kernel_height(5) |
| 28106 | .kernel_width(5) |
| 28107 | .subsampling(1) |
| 28108 | .padding_left(2) |
| 28109 | .padding_right(2) |
| 28110 | .padding_top(2) |
| 28111 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28112 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28113 | } |
| 28114 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28115 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28116 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 28117 | DWConv2DMicrokernelTester() |
| 28118 | .input_width(input_width) |
| 28119 | .input_height(1) |
| 28120 | .kernel_height(5) |
| 28121 | .kernel_width(5) |
| 28122 | .subsampling(1) |
| 28123 | .padding_left(2) |
| 28124 | .padding_right(2) |
| 28125 | .padding_top(2) |
| 28126 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28127 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28128 | } |
| 28129 | } |
| 28130 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28131 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28132 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 28133 | DWConv2DMicrokernelTester() |
| 28134 | .input_width(4) |
| 28135 | .input_height(1) |
| 28136 | .kernel_height(5) |
| 28137 | .kernel_width(5) |
| 28138 | .subsampling(1) |
| 28139 | .padding_left(2) |
| 28140 | .padding_right(2) |
| 28141 | .padding_top(2) |
| 28142 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28143 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28144 | } |
| 28145 | } |
| 28146 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28147 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28148 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 28149 | DWConv2DMicrokernelTester() |
| 28150 | .input_width(input_width) |
| 28151 | .input_height(1) |
| 28152 | .kernel_height(5) |
| 28153 | .kernel_width(5) |
| 28154 | .subsampling(1) |
| 28155 | .padding_left(2) |
| 28156 | .padding_right(2) |
| 28157 | .padding_top(2) |
| 28158 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28159 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28160 | } |
| 28161 | } |
| 28162 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28163 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_height_gt_1) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28164 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 28165 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28166 | DWConv2DMicrokernelTester() |
| 28167 | .input_width(input_width) |
| 28168 | .input_height(input_height) |
| 28169 | .kernel_height(5) |
| 28170 | .kernel_width(5) |
| 28171 | .subsampling(1) |
| 28172 | .padding_left(2) |
| 28173 | .padding_right(2) |
| 28174 | .padding_top(2) |
| 28175 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28176 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28177 | } |
| 28178 | } |
| 28179 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28180 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28181 | |
| 28182 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28183 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28184 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28185 | DWConv2DMicrokernelTester() |
| 28186 | .input_width(4) |
| 28187 | .input_height(1) |
| 28188 | .kernel_height(5) |
| 28189 | .kernel_width(5) |
| 28190 | .subsampling(1) |
| 28191 | .padding_left(2) |
| 28192 | .padding_right(2) |
| 28193 | .padding_top(2) |
| 28194 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28195 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28196 | } |
| 28197 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28198 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28199 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 28200 | DWConv2DMicrokernelTester() |
| 28201 | .input_width(input_width) |
| 28202 | .input_height(1) |
| 28203 | .kernel_height(5) |
| 28204 | .kernel_width(5) |
| 28205 | .subsampling(1) |
| 28206 | .padding_left(2) |
| 28207 | .padding_right(2) |
| 28208 | .padding_top(2) |
| 28209 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28210 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28211 | } |
| 28212 | } |
| 28213 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28214 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28215 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 28216 | DWConv2DMicrokernelTester() |
| 28217 | .input_width(4) |
| 28218 | .input_height(1) |
| 28219 | .kernel_height(5) |
| 28220 | .kernel_width(5) |
| 28221 | .subsampling(1) |
| 28222 | .padding_left(2) |
| 28223 | .padding_right(2) |
| 28224 | .padding_top(2) |
| 28225 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28226 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28227 | } |
| 28228 | } |
| 28229 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28230 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28231 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 28232 | DWConv2DMicrokernelTester() |
| 28233 | .input_width(input_width) |
| 28234 | .input_height(1) |
| 28235 | .kernel_height(5) |
| 28236 | .kernel_width(5) |
| 28237 | .subsampling(1) |
| 28238 | .padding_left(2) |
| 28239 | .padding_right(2) |
| 28240 | .padding_top(2) |
| 28241 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28242 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28243 | } |
| 28244 | } |
| 28245 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28246 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_height_gt_1) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28247 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 28248 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28249 | DWConv2DMicrokernelTester() |
| 28250 | .input_width(input_width) |
| 28251 | .input_height(input_height) |
| 28252 | .kernel_height(5) |
| 28253 | .kernel_width(5) |
| 28254 | .subsampling(1) |
| 28255 | .padding_left(2) |
| 28256 | .padding_right(2) |
| 28257 | .padding_top(2) |
| 28258 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28259 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28260 | } |
| 28261 | } |
| 28262 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28263 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28264 | |
| 28265 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28266 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28267 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28268 | DWConv2DMicrokernelTester() |
| 28269 | .input_width(4) |
| 28270 | .input_height(1) |
| 28271 | .kernel_height(5) |
| 28272 | .kernel_width(5) |
| 28273 | .subsampling(1) |
| 28274 | .padding_left(2) |
| 28275 | .padding_right(2) |
| 28276 | .padding_top(2) |
| 28277 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28278 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28279 | } |
| 28280 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28281 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28282 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 28283 | DWConv2DMicrokernelTester() |
| 28284 | .input_width(input_width) |
| 28285 | .input_height(1) |
| 28286 | .kernel_height(5) |
| 28287 | .kernel_width(5) |
| 28288 | .subsampling(1) |
| 28289 | .padding_left(2) |
| 28290 | .padding_right(2) |
| 28291 | .padding_top(2) |
| 28292 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28293 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28294 | } |
| 28295 | } |
| 28296 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28297 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28298 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 28299 | DWConv2DMicrokernelTester() |
| 28300 | .input_width(4) |
| 28301 | .input_height(1) |
| 28302 | .kernel_height(5) |
| 28303 | .kernel_width(5) |
| 28304 | .subsampling(1) |
| 28305 | .padding_left(2) |
| 28306 | .padding_right(2) |
| 28307 | .padding_top(2) |
| 28308 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28309 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28310 | } |
| 28311 | } |
| 28312 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28313 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28314 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 28315 | DWConv2DMicrokernelTester() |
| 28316 | .input_width(input_width) |
| 28317 | .input_height(1) |
| 28318 | .kernel_height(5) |
| 28319 | .kernel_width(5) |
| 28320 | .subsampling(1) |
| 28321 | .padding_left(2) |
| 28322 | .padding_right(2) |
| 28323 | .padding_top(2) |
| 28324 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28325 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28326 | } |
| 28327 | } |
| 28328 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28329 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_height_gt_1) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28330 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 28331 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28332 | DWConv2DMicrokernelTester() |
| 28333 | .input_width(input_width) |
| 28334 | .input_height(input_height) |
| 28335 | .kernel_height(5) |
| 28336 | .kernel_width(5) |
| 28337 | .subsampling(1) |
| 28338 | .padding_left(2) |
| 28339 | .padding_right(2) |
| 28340 | .padding_top(2) |
| 28341 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28342 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28343 | } |
| 28344 | } |
| 28345 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28346 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28347 | |
| 28348 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28349 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28350 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC5, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28351 | DWConv2DMicrokernelTester() |
| 28352 | .input_width(4) |
| 28353 | .input_height(1) |
| 28354 | .kernel_height(5) |
| 28355 | .kernel_width(5) |
| 28356 | .subsampling(1) |
| 28357 | .padding_left(2) |
| 28358 | .padding_right(2) |
| 28359 | .padding_top(2) |
| 28360 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28361 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc5); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28362 | } |
| 28363 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28364 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC5, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28365 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 28366 | DWConv2DMicrokernelTester() |
| 28367 | .input_width(input_width) |
| 28368 | .input_height(1) |
| 28369 | .kernel_height(5) |
| 28370 | .kernel_width(5) |
| 28371 | .subsampling(1) |
| 28372 | .padding_left(2) |
| 28373 | .padding_right(2) |
| 28374 | .padding_top(2) |
| 28375 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28376 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc5); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28377 | } |
| 28378 | } |
| 28379 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28380 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC5, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28381 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 28382 | DWConv2DMicrokernelTester() |
| 28383 | .input_width(4) |
| 28384 | .input_height(1) |
| 28385 | .kernel_height(5) |
| 28386 | .kernel_width(5) |
| 28387 | .subsampling(1) |
| 28388 | .padding_left(2) |
| 28389 | .padding_right(2) |
| 28390 | .padding_top(2) |
| 28391 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28392 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc5); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28393 | } |
| 28394 | } |
| 28395 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28396 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC5, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28397 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 28398 | DWConv2DMicrokernelTester() |
| 28399 | .input_width(input_width) |
| 28400 | .input_height(1) |
| 28401 | .kernel_height(5) |
| 28402 | .kernel_width(5) |
| 28403 | .subsampling(1) |
| 28404 | .padding_left(2) |
| 28405 | .padding_right(2) |
| 28406 | .padding_top(2) |
| 28407 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28408 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc5); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28409 | } |
| 28410 | } |
| 28411 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28412 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4_ACC5, output_height_gt_1) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28413 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 28414 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28415 | DWConv2DMicrokernelTester() |
| 28416 | .input_width(input_width) |
| 28417 | .input_height(input_height) |
| 28418 | .kernel_height(5) |
| 28419 | .kernel_width(5) |
| 28420 | .subsampling(1) |
| 28421 | .padding_left(2) |
| 28422 | .padding_right(2) |
| 28423 | .padding_top(2) |
| 28424 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28425 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc5); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28426 | } |
| 28427 | } |
| 28428 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28429 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28430 | |
| 28431 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28432 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28433 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28434 | DWConv2DMicrokernelTester() |
| 28435 | .input_width(4) |
| 28436 | .input_height(1) |
| 28437 | .kernel_height(5) |
| 28438 | .kernel_width(5) |
| 28439 | .subsampling(1) |
| 28440 | .padding_left(2) |
| 28441 | .padding_right(2) |
| 28442 | .padding_top(2) |
| 28443 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28444 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28445 | } |
| 28446 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28447 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28448 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 28449 | DWConv2DMicrokernelTester() |
| 28450 | .input_width(input_width) |
| 28451 | .input_height(1) |
| 28452 | .kernel_height(5) |
| 28453 | .kernel_width(5) |
| 28454 | .subsampling(1) |
| 28455 | .padding_left(2) |
| 28456 | .padding_right(2) |
| 28457 | .padding_top(2) |
| 28458 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28459 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28460 | } |
| 28461 | } |
| 28462 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28463 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28464 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 28465 | DWConv2DMicrokernelTester() |
| 28466 | .input_width(4) |
| 28467 | .input_height(1) |
| 28468 | .kernel_height(5) |
| 28469 | .kernel_width(5) |
| 28470 | .subsampling(1) |
| 28471 | .padding_left(2) |
| 28472 | .padding_right(2) |
| 28473 | .padding_top(2) |
| 28474 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28475 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28476 | } |
| 28477 | } |
| 28478 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28479 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28480 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 28481 | DWConv2DMicrokernelTester() |
| 28482 | .input_width(input_width) |
| 28483 | .input_height(1) |
| 28484 | .kernel_height(5) |
| 28485 | .kernel_width(5) |
| 28486 | .subsampling(1) |
| 28487 | .padding_left(2) |
| 28488 | .padding_right(2) |
| 28489 | .padding_top(2) |
| 28490 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28491 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28492 | } |
| 28493 | } |
| 28494 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28495 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_1X4, output_height_gt_1) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28496 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 28497 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28498 | DWConv2DMicrokernelTester() |
| 28499 | .input_width(input_width) |
| 28500 | .input_height(input_height) |
| 28501 | .kernel_height(5) |
| 28502 | .kernel_width(5) |
| 28503 | .subsampling(1) |
| 28504 | .padding_left(2) |
| 28505 | .padding_right(2) |
| 28506 | .padding_top(2) |
| 28507 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28508 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28509 | } |
| 28510 | } |
| 28511 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28512 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28513 | |
| 28514 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28515 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28516 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28517 | DWConv2DMicrokernelTester() |
| 28518 | .input_width(4) |
| 28519 | .input_height(2) |
| 28520 | .kernel_height(5) |
| 28521 | .kernel_width(5) |
| 28522 | .subsampling(1) |
| 28523 | .padding_left(2) |
| 28524 | .padding_right(2) |
| 28525 | .padding_top(2) |
| 28526 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28527 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28528 | } |
| 28529 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28530 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28531 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 28532 | DWConv2DMicrokernelTester() |
| 28533 | .input_width(input_width) |
| 28534 | .input_height(2) |
| 28535 | .kernel_height(5) |
| 28536 | .kernel_width(5) |
| 28537 | .subsampling(1) |
| 28538 | .padding_left(2) |
| 28539 | .padding_right(2) |
| 28540 | .padding_top(2) |
| 28541 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28542 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28543 | } |
| 28544 | } |
| 28545 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28546 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28547 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 28548 | DWConv2DMicrokernelTester() |
| 28549 | .input_width(4) |
| 28550 | .input_height(2) |
| 28551 | .kernel_height(5) |
| 28552 | .kernel_width(5) |
| 28553 | .subsampling(1) |
| 28554 | .padding_left(2) |
| 28555 | .padding_right(2) |
| 28556 | .padding_top(2) |
| 28557 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28558 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28559 | } |
| 28560 | } |
| 28561 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28562 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28563 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 28564 | DWConv2DMicrokernelTester() |
| 28565 | .input_width(input_width) |
| 28566 | .input_height(2) |
| 28567 | .kernel_height(5) |
| 28568 | .kernel_width(5) |
| 28569 | .subsampling(1) |
| 28570 | .padding_left(2) |
| 28571 | .padding_right(2) |
| 28572 | .padding_top(2) |
| 28573 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28574 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28575 | } |
| 28576 | } |
| 28577 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28578 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_div_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28579 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 28580 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28581 | DWConv2DMicrokernelTester() |
| 28582 | .input_width(input_width) |
| 28583 | .input_height(input_height) |
| 28584 | .kernel_height(5) |
| 28585 | .kernel_width(5) |
| 28586 | .subsampling(1) |
| 28587 | .padding_left(2) |
| 28588 | .padding_right(2) |
| 28589 | .padding_top(2) |
| 28590 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28591 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28592 | } |
| 28593 | } |
| 28594 | } |
| 28595 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28596 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_lt_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28597 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 28598 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28599 | DWConv2DMicrokernelTester() |
| 28600 | .input_width(input_width) |
| 28601 | .input_height(input_height) |
| 28602 | .kernel_height(5) |
| 28603 | .kernel_width(5) |
| 28604 | .subsampling(1) |
| 28605 | .padding_left(2) |
| 28606 | .padding_right(2) |
| 28607 | .padding_top(2) |
| 28608 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28609 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28610 | } |
| 28611 | } |
| 28612 | } |
| 28613 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28614 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_gt_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28615 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 28616 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28617 | DWConv2DMicrokernelTester() |
| 28618 | .input_width(input_width) |
| 28619 | .input_height(input_height) |
| 28620 | .kernel_height(5) |
| 28621 | .kernel_width(5) |
| 28622 | .subsampling(1) |
| 28623 | .padding_left(2) |
| 28624 | .padding_right(2) |
| 28625 | .padding_top(2) |
| 28626 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28627 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28628 | } |
| 28629 | } |
| 28630 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28631 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28632 | |
| 28633 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28634 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28635 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28636 | DWConv2DMicrokernelTester() |
| 28637 | .input_width(4) |
| 28638 | .input_height(2) |
| 28639 | .kernel_height(5) |
| 28640 | .kernel_width(5) |
| 28641 | .subsampling(1) |
| 28642 | .padding_left(2) |
| 28643 | .padding_right(2) |
| 28644 | .padding_top(2) |
| 28645 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28646 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28647 | } |
| 28648 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28649 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28650 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 28651 | DWConv2DMicrokernelTester() |
| 28652 | .input_width(input_width) |
| 28653 | .input_height(2) |
| 28654 | .kernel_height(5) |
| 28655 | .kernel_width(5) |
| 28656 | .subsampling(1) |
| 28657 | .padding_left(2) |
| 28658 | .padding_right(2) |
| 28659 | .padding_top(2) |
| 28660 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28661 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28662 | } |
| 28663 | } |
| 28664 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28665 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28666 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 28667 | DWConv2DMicrokernelTester() |
| 28668 | .input_width(4) |
| 28669 | .input_height(2) |
| 28670 | .kernel_height(5) |
| 28671 | .kernel_width(5) |
| 28672 | .subsampling(1) |
| 28673 | .padding_left(2) |
| 28674 | .padding_right(2) |
| 28675 | .padding_top(2) |
| 28676 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28677 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28678 | } |
| 28679 | } |
| 28680 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28681 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28682 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 28683 | DWConv2DMicrokernelTester() |
| 28684 | .input_width(input_width) |
| 28685 | .input_height(2) |
| 28686 | .kernel_height(5) |
| 28687 | .kernel_width(5) |
| 28688 | .subsampling(1) |
| 28689 | .padding_left(2) |
| 28690 | .padding_right(2) |
| 28691 | .padding_top(2) |
| 28692 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28693 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28694 | } |
| 28695 | } |
| 28696 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28697 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_height_div_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28698 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 28699 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28700 | DWConv2DMicrokernelTester() |
| 28701 | .input_width(input_width) |
| 28702 | .input_height(input_height) |
| 28703 | .kernel_height(5) |
| 28704 | .kernel_width(5) |
| 28705 | .subsampling(1) |
| 28706 | .padding_left(2) |
| 28707 | .padding_right(2) |
| 28708 | .padding_top(2) |
| 28709 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28710 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28711 | } |
| 28712 | } |
| 28713 | } |
| 28714 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28715 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_height_lt_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28716 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 28717 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28718 | DWConv2DMicrokernelTester() |
| 28719 | .input_width(input_width) |
| 28720 | .input_height(input_height) |
| 28721 | .kernel_height(5) |
| 28722 | .kernel_width(5) |
| 28723 | .subsampling(1) |
| 28724 | .padding_left(2) |
| 28725 | .padding_right(2) |
| 28726 | .padding_top(2) |
| 28727 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28728 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28729 | } |
| 28730 | } |
| 28731 | } |
| 28732 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28733 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_height_gt_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28734 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 28735 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28736 | DWConv2DMicrokernelTester() |
| 28737 | .input_width(input_width) |
| 28738 | .input_height(input_height) |
| 28739 | .kernel_height(5) |
| 28740 | .kernel_width(5) |
| 28741 | .subsampling(1) |
| 28742 | .padding_left(2) |
| 28743 | .padding_right(2) |
| 28744 | .padding_top(2) |
| 28745 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28746 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28747 | } |
| 28748 | } |
| 28749 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28750 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28751 | |
| 28752 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28753 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28754 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28755 | DWConv2DMicrokernelTester() |
| 28756 | .input_width(4) |
| 28757 | .input_height(2) |
| 28758 | .kernel_height(5) |
| 28759 | .kernel_width(5) |
| 28760 | .subsampling(1) |
| 28761 | .padding_left(2) |
| 28762 | .padding_right(2) |
| 28763 | .padding_top(2) |
| 28764 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28765 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28766 | } |
| 28767 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28768 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28769 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 28770 | DWConv2DMicrokernelTester() |
| 28771 | .input_width(input_width) |
| 28772 | .input_height(2) |
| 28773 | .kernel_height(5) |
| 28774 | .kernel_width(5) |
| 28775 | .subsampling(1) |
| 28776 | .padding_left(2) |
| 28777 | .padding_right(2) |
| 28778 | .padding_top(2) |
| 28779 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28780 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28781 | } |
| 28782 | } |
| 28783 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28784 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28785 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 28786 | DWConv2DMicrokernelTester() |
| 28787 | .input_width(4) |
| 28788 | .input_height(2) |
| 28789 | .kernel_height(5) |
| 28790 | .kernel_width(5) |
| 28791 | .subsampling(1) |
| 28792 | .padding_left(2) |
| 28793 | .padding_right(2) |
| 28794 | .padding_top(2) |
| 28795 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28796 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28797 | } |
| 28798 | } |
| 28799 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28800 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28801 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 28802 | DWConv2DMicrokernelTester() |
| 28803 | .input_width(input_width) |
| 28804 | .input_height(2) |
| 28805 | .kernel_height(5) |
| 28806 | .kernel_width(5) |
| 28807 | .subsampling(1) |
| 28808 | .padding_left(2) |
| 28809 | .padding_right(2) |
| 28810 | .padding_top(2) |
| 28811 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28812 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28813 | } |
| 28814 | } |
| 28815 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28816 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4, output_height_div_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28817 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 28818 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28819 | DWConv2DMicrokernelTester() |
| 28820 | .input_width(input_width) |
| 28821 | .input_height(input_height) |
| 28822 | .kernel_height(5) |
| 28823 | .kernel_width(5) |
| 28824 | .subsampling(1) |
| 28825 | .padding_left(2) |
| 28826 | .padding_right(2) |
| 28827 | .padding_top(2) |
| 28828 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28829 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28830 | } |
| 28831 | } |
| 28832 | } |
| 28833 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28834 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4, output_height_lt_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28835 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 28836 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28837 | DWConv2DMicrokernelTester() |
| 28838 | .input_width(input_width) |
| 28839 | .input_height(input_height) |
| 28840 | .kernel_height(5) |
| 28841 | .kernel_width(5) |
| 28842 | .subsampling(1) |
| 28843 | .padding_left(2) |
| 28844 | .padding_right(2) |
| 28845 | .padding_top(2) |
| 28846 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28847 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28848 | } |
| 28849 | } |
| 28850 | } |
| 28851 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28852 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_2X4, output_height_gt_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28853 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 28854 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28855 | DWConv2DMicrokernelTester() |
| 28856 | .input_width(input_width) |
| 28857 | .input_height(input_height) |
| 28858 | .kernel_height(5) |
| 28859 | .kernel_width(5) |
| 28860 | .subsampling(1) |
| 28861 | .padding_left(2) |
| 28862 | .padding_right(2) |
| 28863 | .padding_top(2) |
| 28864 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28865 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28866 | } |
| 28867 | } |
| 28868 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28869 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28870 | |
| 28871 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28872 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28873 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28874 | DWConv2DMicrokernelTester() |
| 28875 | .input_width(4) |
| 28876 | .input_height(3) |
| 28877 | .kernel_height(5) |
| 28878 | .kernel_width(5) |
| 28879 | .subsampling(1) |
| 28880 | .padding_left(2) |
| 28881 | .padding_right(2) |
| 28882 | .padding_top(2) |
| 28883 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28884 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28885 | } |
| 28886 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28887 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28888 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 28889 | DWConv2DMicrokernelTester() |
| 28890 | .input_width(input_width) |
| 28891 | .input_height(3) |
| 28892 | .kernel_height(5) |
| 28893 | .kernel_width(5) |
| 28894 | .subsampling(1) |
| 28895 | .padding_left(2) |
| 28896 | .padding_right(2) |
| 28897 | .padding_top(2) |
| 28898 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28899 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28900 | } |
| 28901 | } |
| 28902 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28903 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28904 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 28905 | DWConv2DMicrokernelTester() |
| 28906 | .input_width(4) |
| 28907 | .input_height(3) |
| 28908 | .kernel_height(5) |
| 28909 | .kernel_width(5) |
| 28910 | .subsampling(1) |
| 28911 | .padding_left(2) |
| 28912 | .padding_right(2) |
| 28913 | .padding_top(2) |
| 28914 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28915 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28916 | } |
| 28917 | } |
| 28918 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28919 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28920 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 28921 | DWConv2DMicrokernelTester() |
| 28922 | .input_width(input_width) |
| 28923 | .input_height(3) |
| 28924 | .kernel_height(5) |
| 28925 | .kernel_width(5) |
| 28926 | .subsampling(1) |
| 28927 | .padding_left(2) |
| 28928 | .padding_right(2) |
| 28929 | .padding_top(2) |
| 28930 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28931 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28932 | } |
| 28933 | } |
| 28934 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28935 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_height_div_3) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28936 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 28937 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28938 | DWConv2DMicrokernelTester() |
| 28939 | .input_width(input_width) |
| 28940 | .input_height(input_height) |
| 28941 | .kernel_height(5) |
| 28942 | .kernel_width(5) |
| 28943 | .subsampling(1) |
| 28944 | .padding_left(2) |
| 28945 | .padding_right(2) |
| 28946 | .padding_top(2) |
| 28947 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28948 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28949 | } |
| 28950 | } |
| 28951 | } |
| 28952 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28953 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_height_lt_3) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28954 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 28955 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28956 | DWConv2DMicrokernelTester() |
| 28957 | .input_width(input_width) |
| 28958 | .input_height(input_height) |
| 28959 | .kernel_height(5) |
| 28960 | .kernel_width(5) |
| 28961 | .subsampling(1) |
| 28962 | .padding_left(2) |
| 28963 | .padding_right(2) |
| 28964 | .padding_top(2) |
| 28965 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28966 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28967 | } |
| 28968 | } |
| 28969 | } |
| 28970 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28971 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_height_gt_3) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28972 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 28973 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 28974 | DWConv2DMicrokernelTester() |
| 28975 | .input_width(input_width) |
| 28976 | .input_height(input_height) |
| 28977 | .kernel_height(5) |
| 28978 | .kernel_width(5) |
| 28979 | .subsampling(1) |
| 28980 | .padding_left(2) |
| 28981 | .padding_right(2) |
| 28982 | .padding_top(2) |
| 28983 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28984 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28985 | } |
| 28986 | } |
| 28987 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28988 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28989 | |
| 28990 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 28991 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 28992 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 28993 | DWConv2DMicrokernelTester() |
| 28994 | .input_width(4) |
| 28995 | .input_height(3) |
| 28996 | .kernel_height(5) |
| 28997 | .kernel_width(5) |
| 28998 | .subsampling(1) |
| 28999 | .padding_left(2) |
| 29000 | .padding_right(2) |
| 29001 | .padding_top(2) |
| 29002 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29003 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29004 | } |
| 29005 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29006 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29007 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 29008 | DWConv2DMicrokernelTester() |
| 29009 | .input_width(input_width) |
| 29010 | .input_height(3) |
| 29011 | .kernel_height(5) |
| 29012 | .kernel_width(5) |
| 29013 | .subsampling(1) |
| 29014 | .padding_left(2) |
| 29015 | .padding_right(2) |
| 29016 | .padding_top(2) |
| 29017 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29018 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29019 | } |
| 29020 | } |
| 29021 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29022 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29023 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 29024 | DWConv2DMicrokernelTester() |
| 29025 | .input_width(4) |
| 29026 | .input_height(3) |
| 29027 | .kernel_height(5) |
| 29028 | .kernel_width(5) |
| 29029 | .subsampling(1) |
| 29030 | .padding_left(2) |
| 29031 | .padding_right(2) |
| 29032 | .padding_top(2) |
| 29033 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29034 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29035 | } |
| 29036 | } |
| 29037 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29038 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29039 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 29040 | DWConv2DMicrokernelTester() |
| 29041 | .input_width(input_width) |
| 29042 | .input_height(3) |
| 29043 | .kernel_height(5) |
| 29044 | .kernel_width(5) |
| 29045 | .subsampling(1) |
| 29046 | .padding_left(2) |
| 29047 | .padding_right(2) |
| 29048 | .padding_top(2) |
| 29049 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29050 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29051 | } |
| 29052 | } |
| 29053 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29054 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4, output_height_div_3) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29055 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 29056 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29057 | DWConv2DMicrokernelTester() |
| 29058 | .input_width(input_width) |
| 29059 | .input_height(input_height) |
| 29060 | .kernel_height(5) |
| 29061 | .kernel_width(5) |
| 29062 | .subsampling(1) |
| 29063 | .padding_left(2) |
| 29064 | .padding_right(2) |
| 29065 | .padding_top(2) |
| 29066 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29067 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29068 | } |
| 29069 | } |
| 29070 | } |
| 29071 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29072 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4, output_height_lt_3) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29073 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 29074 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29075 | DWConv2DMicrokernelTester() |
| 29076 | .input_width(input_width) |
| 29077 | .input_height(input_height) |
| 29078 | .kernel_height(5) |
| 29079 | .kernel_width(5) |
| 29080 | .subsampling(1) |
| 29081 | .padding_left(2) |
| 29082 | .padding_right(2) |
| 29083 | .padding_top(2) |
| 29084 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29085 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29086 | } |
| 29087 | } |
| 29088 | } |
| 29089 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29090 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_3X4, output_height_gt_3) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29091 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 29092 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29093 | DWConv2DMicrokernelTester() |
| 29094 | .input_width(input_width) |
| 29095 | .input_height(input_height) |
| 29096 | .kernel_height(5) |
| 29097 | .kernel_width(5) |
| 29098 | .subsampling(1) |
| 29099 | .padding_left(2) |
| 29100 | .padding_right(2) |
| 29101 | .padding_top(2) |
| 29102 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29103 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29104 | } |
| 29105 | } |
| 29106 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29107 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29108 | |
| 29109 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29110 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29111 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4_ACC2, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29112 | DWConv2DMicrokernelTester() |
| 29113 | .input_width(4) |
| 29114 | .input_height(4) |
| 29115 | .kernel_height(5) |
| 29116 | .kernel_width(5) |
| 29117 | .subsampling(1) |
| 29118 | .padding_left(2) |
| 29119 | .padding_right(2) |
| 29120 | .padding_top(2) |
| 29121 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29122 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29123 | } |
| 29124 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29125 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4_ACC2, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29126 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 29127 | DWConv2DMicrokernelTester() |
| 29128 | .input_width(input_width) |
| 29129 | .input_height(4) |
| 29130 | .kernel_height(5) |
| 29131 | .kernel_width(5) |
| 29132 | .subsampling(1) |
| 29133 | .padding_left(2) |
| 29134 | .padding_right(2) |
| 29135 | .padding_top(2) |
| 29136 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29137 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29138 | } |
| 29139 | } |
| 29140 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29141 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4_ACC2, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29142 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 29143 | DWConv2DMicrokernelTester() |
| 29144 | .input_width(4) |
| 29145 | .input_height(4) |
| 29146 | .kernel_height(5) |
| 29147 | .kernel_width(5) |
| 29148 | .subsampling(1) |
| 29149 | .padding_left(2) |
| 29150 | .padding_right(2) |
| 29151 | .padding_top(2) |
| 29152 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29153 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29154 | } |
| 29155 | } |
| 29156 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29157 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4_ACC2, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29158 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 29159 | DWConv2DMicrokernelTester() |
| 29160 | .input_width(input_width) |
| 29161 | .input_height(4) |
| 29162 | .kernel_height(5) |
| 29163 | .kernel_width(5) |
| 29164 | .subsampling(1) |
| 29165 | .padding_left(2) |
| 29166 | .padding_right(2) |
| 29167 | .padding_top(2) |
| 29168 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29169 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29170 | } |
| 29171 | } |
| 29172 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29173 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4_ACC2, output_height_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29174 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 29175 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29176 | DWConv2DMicrokernelTester() |
| 29177 | .input_width(input_width) |
| 29178 | .input_height(input_height) |
| 29179 | .kernel_height(5) |
| 29180 | .kernel_width(5) |
| 29181 | .subsampling(1) |
| 29182 | .padding_left(2) |
| 29183 | .padding_right(2) |
| 29184 | .padding_top(2) |
| 29185 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29186 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29187 | } |
| 29188 | } |
| 29189 | } |
| 29190 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29191 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4_ACC2, output_height_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29192 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 29193 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29194 | DWConv2DMicrokernelTester() |
| 29195 | .input_width(input_width) |
| 29196 | .input_height(input_height) |
| 29197 | .kernel_height(5) |
| 29198 | .kernel_width(5) |
| 29199 | .subsampling(1) |
| 29200 | .padding_left(2) |
| 29201 | .padding_right(2) |
| 29202 | .padding_top(2) |
| 29203 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29204 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29205 | } |
| 29206 | } |
| 29207 | } |
| 29208 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29209 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4_ACC2, output_height_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29210 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 29211 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29212 | DWConv2DMicrokernelTester() |
| 29213 | .input_width(input_width) |
| 29214 | .input_height(input_height) |
| 29215 | .kernel_height(5) |
| 29216 | .kernel_width(5) |
| 29217 | .subsampling(1) |
| 29218 | .padding_left(2) |
| 29219 | .padding_right(2) |
| 29220 | .padding_top(2) |
| 29221 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29222 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29223 | } |
| 29224 | } |
| 29225 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29226 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29227 | |
| 29228 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29229 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29230 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29231 | DWConv2DMicrokernelTester() |
| 29232 | .input_width(4) |
| 29233 | .input_height(4) |
| 29234 | .kernel_height(5) |
| 29235 | .kernel_width(5) |
| 29236 | .subsampling(1) |
| 29237 | .padding_left(2) |
| 29238 | .padding_right(2) |
| 29239 | .padding_top(2) |
| 29240 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29241 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29242 | } |
| 29243 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29244 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29245 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 29246 | DWConv2DMicrokernelTester() |
| 29247 | .input_width(input_width) |
| 29248 | .input_height(4) |
| 29249 | .kernel_height(5) |
| 29250 | .kernel_width(5) |
| 29251 | .subsampling(1) |
| 29252 | .padding_left(2) |
| 29253 | .padding_right(2) |
| 29254 | .padding_top(2) |
| 29255 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29256 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29257 | } |
| 29258 | } |
| 29259 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29260 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29261 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 29262 | DWConv2DMicrokernelTester() |
| 29263 | .input_width(4) |
| 29264 | .input_height(4) |
| 29265 | .kernel_height(5) |
| 29266 | .kernel_width(5) |
| 29267 | .subsampling(1) |
| 29268 | .padding_left(2) |
| 29269 | .padding_right(2) |
| 29270 | .padding_top(2) |
| 29271 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29272 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29273 | } |
| 29274 | } |
| 29275 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29276 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29277 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 29278 | DWConv2DMicrokernelTester() |
| 29279 | .input_width(input_width) |
| 29280 | .input_height(4) |
| 29281 | .kernel_height(5) |
| 29282 | .kernel_width(5) |
| 29283 | .subsampling(1) |
| 29284 | .padding_left(2) |
| 29285 | .padding_right(2) |
| 29286 | .padding_top(2) |
| 29287 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29288 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29289 | } |
| 29290 | } |
| 29291 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29292 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4, output_height_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29293 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 29294 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29295 | DWConv2DMicrokernelTester() |
| 29296 | .input_width(input_width) |
| 29297 | .input_height(input_height) |
| 29298 | .kernel_height(5) |
| 29299 | .kernel_width(5) |
| 29300 | .subsampling(1) |
| 29301 | .padding_left(2) |
| 29302 | .padding_right(2) |
| 29303 | .padding_top(2) |
| 29304 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29305 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29306 | } |
| 29307 | } |
| 29308 | } |
| 29309 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29310 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4, output_height_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29311 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 29312 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29313 | DWConv2DMicrokernelTester() |
| 29314 | .input_width(input_width) |
| 29315 | .input_height(input_height) |
| 29316 | .kernel_height(5) |
| 29317 | .kernel_width(5) |
| 29318 | .subsampling(1) |
| 29319 | .padding_left(2) |
| 29320 | .padding_right(2) |
| 29321 | .padding_top(2) |
| 29322 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29323 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29324 | } |
| 29325 | } |
| 29326 | } |
| 29327 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29328 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_4X4, output_height_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29329 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 29330 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29331 | DWConv2DMicrokernelTester() |
| 29332 | .input_width(input_width) |
| 29333 | .input_height(input_height) |
| 29334 | .kernel_height(5) |
| 29335 | .kernel_width(5) |
| 29336 | .subsampling(1) |
| 29337 | .padding_left(2) |
| 29338 | .padding_right(2) |
| 29339 | .padding_top(2) |
| 29340 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29341 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29342 | } |
| 29343 | } |
| 29344 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29345 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29346 | |
| 29347 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29348 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29349 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_5X4, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29350 | DWConv2DMicrokernelTester() |
| 29351 | .input_width(4) |
| 29352 | .input_height(5) |
| 29353 | .kernel_height(5) |
| 29354 | .kernel_width(5) |
| 29355 | .subsampling(1) |
| 29356 | .padding_left(2) |
| 29357 | .padding_right(2) |
| 29358 | .padding_top(2) |
| 29359 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29360 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_5x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29361 | } |
| 29362 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29363 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_5X4, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29364 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 29365 | DWConv2DMicrokernelTester() |
| 29366 | .input_width(input_width) |
| 29367 | .input_height(5) |
| 29368 | .kernel_height(5) |
| 29369 | .kernel_width(5) |
| 29370 | .subsampling(1) |
| 29371 | .padding_left(2) |
| 29372 | .padding_right(2) |
| 29373 | .padding_top(2) |
| 29374 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29375 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_5x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29376 | } |
| 29377 | } |
| 29378 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29379 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_5X4, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29380 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 29381 | DWConv2DMicrokernelTester() |
| 29382 | .input_width(4) |
| 29383 | .input_height(5) |
| 29384 | .kernel_height(5) |
| 29385 | .kernel_width(5) |
| 29386 | .subsampling(1) |
| 29387 | .padding_left(2) |
| 29388 | .padding_right(2) |
| 29389 | .padding_top(2) |
| 29390 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29391 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_5x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29392 | } |
| 29393 | } |
| 29394 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29395 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_5X4, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29396 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 29397 | DWConv2DMicrokernelTester() |
| 29398 | .input_width(input_width) |
| 29399 | .input_height(5) |
| 29400 | .kernel_height(5) |
| 29401 | .kernel_width(5) |
| 29402 | .subsampling(1) |
| 29403 | .padding_left(2) |
| 29404 | .padding_right(2) |
| 29405 | .padding_top(2) |
| 29406 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29407 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_5x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29408 | } |
| 29409 | } |
| 29410 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29411 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_5X4, output_height_div_5) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29412 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 29413 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29414 | DWConv2DMicrokernelTester() |
| 29415 | .input_width(input_width) |
| 29416 | .input_height(input_height) |
| 29417 | .kernel_height(5) |
| 29418 | .kernel_width(5) |
| 29419 | .subsampling(1) |
| 29420 | .padding_left(2) |
| 29421 | .padding_right(2) |
| 29422 | .padding_top(2) |
| 29423 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29424 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_5x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29425 | } |
| 29426 | } |
| 29427 | } |
| 29428 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29429 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_5X4, output_height_lt_5) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29430 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 29431 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29432 | DWConv2DMicrokernelTester() |
| 29433 | .input_width(input_width) |
| 29434 | .input_height(input_height) |
| 29435 | .kernel_height(5) |
| 29436 | .kernel_width(5) |
| 29437 | .subsampling(1) |
| 29438 | .padding_left(2) |
| 29439 | .padding_right(2) |
| 29440 | .padding_top(2) |
| 29441 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29442 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_5x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29443 | } |
| 29444 | } |
| 29445 | } |
| 29446 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29447 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_ARM_SPLAT_5X4, output_height_gt_5) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29448 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 29449 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29450 | DWConv2DMicrokernelTester() |
| 29451 | .input_width(input_width) |
| 29452 | .input_height(input_height) |
| 29453 | .kernel_height(5) |
| 29454 | .kernel_width(5) |
| 29455 | .subsampling(1) |
| 29456 | .padding_left(2) |
| 29457 | .padding_right(2) |
| 29458 | .padding_top(2) |
| 29459 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29460 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_5x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29461 | } |
| 29462 | } |
| 29463 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29464 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29465 | |
| 29466 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29467 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29468 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29469 | DWConv2DMicrokernelTester() |
| 29470 | .input_width(4) |
| 29471 | .input_height(1) |
| 29472 | .kernel_height(5) |
| 29473 | .kernel_width(5) |
| 29474 | .subsampling(1) |
| 29475 | .padding_left(2) |
| 29476 | .padding_right(2) |
| 29477 | .padding_top(2) |
| 29478 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29479 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29480 | } |
| 29481 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29482 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29483 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 29484 | DWConv2DMicrokernelTester() |
| 29485 | .input_width(input_width) |
| 29486 | .input_height(1) |
| 29487 | .kernel_height(5) |
| 29488 | .kernel_width(5) |
| 29489 | .subsampling(1) |
| 29490 | .padding_left(2) |
| 29491 | .padding_right(2) |
| 29492 | .padding_top(2) |
| 29493 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29494 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29495 | } |
| 29496 | } |
| 29497 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29498 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29499 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 29500 | DWConv2DMicrokernelTester() |
| 29501 | .input_width(4) |
| 29502 | .input_height(1) |
| 29503 | .kernel_height(5) |
| 29504 | .kernel_width(5) |
| 29505 | .subsampling(1) |
| 29506 | .padding_left(2) |
| 29507 | .padding_right(2) |
| 29508 | .padding_top(2) |
| 29509 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29510 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29511 | } |
| 29512 | } |
| 29513 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29514 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29515 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 29516 | DWConv2DMicrokernelTester() |
| 29517 | .input_width(input_width) |
| 29518 | .input_height(1) |
| 29519 | .kernel_height(5) |
| 29520 | .kernel_width(5) |
| 29521 | .subsampling(1) |
| 29522 | .padding_left(2) |
| 29523 | .padding_right(2) |
| 29524 | .padding_top(2) |
| 29525 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29526 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29527 | } |
| 29528 | } |
| 29529 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29530 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC2, output_height_gt_1) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29531 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 29532 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29533 | DWConv2DMicrokernelTester() |
| 29534 | .input_width(input_width) |
| 29535 | .input_height(input_height) |
| 29536 | .kernel_height(5) |
| 29537 | .kernel_width(5) |
| 29538 | .subsampling(1) |
| 29539 | .padding_left(2) |
| 29540 | .padding_right(2) |
| 29541 | .padding_top(2) |
| 29542 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29543 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29544 | } |
| 29545 | } |
| 29546 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29547 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29548 | |
| 29549 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29550 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29551 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29552 | DWConv2DMicrokernelTester() |
| 29553 | .input_width(4) |
| 29554 | .input_height(1) |
| 29555 | .kernel_height(5) |
| 29556 | .kernel_width(5) |
| 29557 | .subsampling(1) |
| 29558 | .padding_left(2) |
| 29559 | .padding_right(2) |
| 29560 | .padding_top(2) |
| 29561 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29562 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29563 | } |
| 29564 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29565 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29566 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 29567 | DWConv2DMicrokernelTester() |
| 29568 | .input_width(input_width) |
| 29569 | .input_height(1) |
| 29570 | .kernel_height(5) |
| 29571 | .kernel_width(5) |
| 29572 | .subsampling(1) |
| 29573 | .padding_left(2) |
| 29574 | .padding_right(2) |
| 29575 | .padding_top(2) |
| 29576 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29577 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29578 | } |
| 29579 | } |
| 29580 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29581 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29582 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 29583 | DWConv2DMicrokernelTester() |
| 29584 | .input_width(4) |
| 29585 | .input_height(1) |
| 29586 | .kernel_height(5) |
| 29587 | .kernel_width(5) |
| 29588 | .subsampling(1) |
| 29589 | .padding_left(2) |
| 29590 | .padding_right(2) |
| 29591 | .padding_top(2) |
| 29592 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29593 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29594 | } |
| 29595 | } |
| 29596 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29597 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29598 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 29599 | DWConv2DMicrokernelTester() |
| 29600 | .input_width(input_width) |
| 29601 | .input_height(1) |
| 29602 | .kernel_height(5) |
| 29603 | .kernel_width(5) |
| 29604 | .subsampling(1) |
| 29605 | .padding_left(2) |
| 29606 | .padding_right(2) |
| 29607 | .padding_top(2) |
| 29608 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29609 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29610 | } |
| 29611 | } |
| 29612 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29613 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC3, output_height_gt_1) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29614 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 29615 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29616 | DWConv2DMicrokernelTester() |
| 29617 | .input_width(input_width) |
| 29618 | .input_height(input_height) |
| 29619 | .kernel_height(5) |
| 29620 | .kernel_width(5) |
| 29621 | .subsampling(1) |
| 29622 | .padding_left(2) |
| 29623 | .padding_right(2) |
| 29624 | .padding_top(2) |
| 29625 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29626 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29627 | } |
| 29628 | } |
| 29629 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29630 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29631 | |
| 29632 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29633 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29634 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29635 | DWConv2DMicrokernelTester() |
| 29636 | .input_width(4) |
| 29637 | .input_height(1) |
| 29638 | .kernel_height(5) |
| 29639 | .kernel_width(5) |
| 29640 | .subsampling(1) |
| 29641 | .padding_left(2) |
| 29642 | .padding_right(2) |
| 29643 | .padding_top(2) |
| 29644 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29645 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29646 | } |
| 29647 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29648 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29649 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 29650 | DWConv2DMicrokernelTester() |
| 29651 | .input_width(input_width) |
| 29652 | .input_height(1) |
| 29653 | .kernel_height(5) |
| 29654 | .kernel_width(5) |
| 29655 | .subsampling(1) |
| 29656 | .padding_left(2) |
| 29657 | .padding_right(2) |
| 29658 | .padding_top(2) |
| 29659 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29660 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29661 | } |
| 29662 | } |
| 29663 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29664 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29665 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 29666 | DWConv2DMicrokernelTester() |
| 29667 | .input_width(4) |
| 29668 | .input_height(1) |
| 29669 | .kernel_height(5) |
| 29670 | .kernel_width(5) |
| 29671 | .subsampling(1) |
| 29672 | .padding_left(2) |
| 29673 | .padding_right(2) |
| 29674 | .padding_top(2) |
| 29675 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29676 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29677 | } |
| 29678 | } |
| 29679 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29680 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29681 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 29682 | DWConv2DMicrokernelTester() |
| 29683 | .input_width(input_width) |
| 29684 | .input_height(1) |
| 29685 | .kernel_height(5) |
| 29686 | .kernel_width(5) |
| 29687 | .subsampling(1) |
| 29688 | .padding_left(2) |
| 29689 | .padding_right(2) |
| 29690 | .padding_top(2) |
| 29691 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29692 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29693 | } |
| 29694 | } |
| 29695 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29696 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC4, output_height_gt_1) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29697 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 29698 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29699 | DWConv2DMicrokernelTester() |
| 29700 | .input_width(input_width) |
| 29701 | .input_height(input_height) |
| 29702 | .kernel_height(5) |
| 29703 | .kernel_width(5) |
| 29704 | .subsampling(1) |
| 29705 | .padding_left(2) |
| 29706 | .padding_right(2) |
| 29707 | .padding_top(2) |
| 29708 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29709 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29710 | } |
| 29711 | } |
| 29712 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29713 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29714 | |
| 29715 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29716 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29717 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC5, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29718 | DWConv2DMicrokernelTester() |
| 29719 | .input_width(4) |
| 29720 | .input_height(1) |
| 29721 | .kernel_height(5) |
| 29722 | .kernel_width(5) |
| 29723 | .subsampling(1) |
| 29724 | .padding_left(2) |
| 29725 | .padding_right(2) |
| 29726 | .padding_top(2) |
| 29727 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29728 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc5); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29729 | } |
| 29730 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29731 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC5, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29732 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 29733 | DWConv2DMicrokernelTester() |
| 29734 | .input_width(input_width) |
| 29735 | .input_height(1) |
| 29736 | .kernel_height(5) |
| 29737 | .kernel_width(5) |
| 29738 | .subsampling(1) |
| 29739 | .padding_left(2) |
| 29740 | .padding_right(2) |
| 29741 | .padding_top(2) |
| 29742 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29743 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc5); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29744 | } |
| 29745 | } |
| 29746 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29747 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC5, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29748 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 29749 | DWConv2DMicrokernelTester() |
| 29750 | .input_width(4) |
| 29751 | .input_height(1) |
| 29752 | .kernel_height(5) |
| 29753 | .kernel_width(5) |
| 29754 | .subsampling(1) |
| 29755 | .padding_left(2) |
| 29756 | .padding_right(2) |
| 29757 | .padding_top(2) |
| 29758 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29759 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc5); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29760 | } |
| 29761 | } |
| 29762 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29763 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC5, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29764 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 29765 | DWConv2DMicrokernelTester() |
| 29766 | .input_width(input_width) |
| 29767 | .input_height(1) |
| 29768 | .kernel_height(5) |
| 29769 | .kernel_width(5) |
| 29770 | .subsampling(1) |
| 29771 | .padding_left(2) |
| 29772 | .padding_right(2) |
| 29773 | .padding_top(2) |
| 29774 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29775 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc5); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29776 | } |
| 29777 | } |
| 29778 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29779 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4_ACC5, output_height_gt_1) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29780 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 29781 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29782 | DWConv2DMicrokernelTester() |
| 29783 | .input_width(input_width) |
| 29784 | .input_height(input_height) |
| 29785 | .kernel_height(5) |
| 29786 | .kernel_width(5) |
| 29787 | .subsampling(1) |
| 29788 | .padding_left(2) |
| 29789 | .padding_right(2) |
| 29790 | .padding_top(2) |
| 29791 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29792 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc5); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29793 | } |
| 29794 | } |
| 29795 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29796 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29797 | |
| 29798 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29799 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29800 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29801 | DWConv2DMicrokernelTester() |
| 29802 | .input_width(4) |
| 29803 | .input_height(1) |
| 29804 | .kernel_height(5) |
| 29805 | .kernel_width(5) |
| 29806 | .subsampling(1) |
| 29807 | .padding_left(2) |
| 29808 | .padding_right(2) |
| 29809 | .padding_top(2) |
| 29810 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29811 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29812 | } |
| 29813 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29814 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29815 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 29816 | DWConv2DMicrokernelTester() |
| 29817 | .input_width(input_width) |
| 29818 | .input_height(1) |
| 29819 | .kernel_height(5) |
| 29820 | .kernel_width(5) |
| 29821 | .subsampling(1) |
| 29822 | .padding_left(2) |
| 29823 | .padding_right(2) |
| 29824 | .padding_top(2) |
| 29825 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29826 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29827 | } |
| 29828 | } |
| 29829 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29830 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29831 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 29832 | DWConv2DMicrokernelTester() |
| 29833 | .input_width(4) |
| 29834 | .input_height(1) |
| 29835 | .kernel_height(5) |
| 29836 | .kernel_width(5) |
| 29837 | .subsampling(1) |
| 29838 | .padding_left(2) |
| 29839 | .padding_right(2) |
| 29840 | .padding_top(2) |
| 29841 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29842 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29843 | } |
| 29844 | } |
| 29845 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29846 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29847 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 29848 | DWConv2DMicrokernelTester() |
| 29849 | .input_width(input_width) |
| 29850 | .input_height(1) |
| 29851 | .kernel_height(5) |
| 29852 | .kernel_width(5) |
| 29853 | .subsampling(1) |
| 29854 | .padding_left(2) |
| 29855 | .padding_right(2) |
| 29856 | .padding_top(2) |
| 29857 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29858 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29859 | } |
| 29860 | } |
| 29861 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29862 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_1X4, output_height_gt_1) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29863 | for (size_t input_height = 2; input_height < 3; input_height++) { |
| 29864 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29865 | DWConv2DMicrokernelTester() |
| 29866 | .input_width(input_width) |
| 29867 | .input_height(input_height) |
| 29868 | .kernel_height(5) |
| 29869 | .kernel_width(5) |
| 29870 | .subsampling(1) |
| 29871 | .padding_left(2) |
| 29872 | .padding_right(2) |
| 29873 | .padding_top(2) |
| 29874 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29875 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29876 | } |
| 29877 | } |
| 29878 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29879 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29880 | |
| 29881 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29882 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29883 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29884 | DWConv2DMicrokernelTester() |
| 29885 | .input_width(4) |
| 29886 | .input_height(2) |
| 29887 | .kernel_height(5) |
| 29888 | .kernel_width(5) |
| 29889 | .subsampling(1) |
| 29890 | .padding_left(2) |
| 29891 | .padding_right(2) |
| 29892 | .padding_top(2) |
| 29893 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29894 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29895 | } |
| 29896 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29897 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29898 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 29899 | DWConv2DMicrokernelTester() |
| 29900 | .input_width(input_width) |
| 29901 | .input_height(2) |
| 29902 | .kernel_height(5) |
| 29903 | .kernel_width(5) |
| 29904 | .subsampling(1) |
| 29905 | .padding_left(2) |
| 29906 | .padding_right(2) |
| 29907 | .padding_top(2) |
| 29908 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29909 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29910 | } |
| 29911 | } |
| 29912 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29913 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29914 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 29915 | DWConv2DMicrokernelTester() |
| 29916 | .input_width(4) |
| 29917 | .input_height(2) |
| 29918 | .kernel_height(5) |
| 29919 | .kernel_width(5) |
| 29920 | .subsampling(1) |
| 29921 | .padding_left(2) |
| 29922 | .padding_right(2) |
| 29923 | .padding_top(2) |
| 29924 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29925 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29926 | } |
| 29927 | } |
| 29928 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29929 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29930 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 29931 | DWConv2DMicrokernelTester() |
| 29932 | .input_width(input_width) |
| 29933 | .input_height(2) |
| 29934 | .kernel_height(5) |
| 29935 | .kernel_width(5) |
| 29936 | .subsampling(1) |
| 29937 | .padding_left(2) |
| 29938 | .padding_right(2) |
| 29939 | .padding_top(2) |
| 29940 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29941 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29942 | } |
| 29943 | } |
| 29944 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29945 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_div_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29946 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 29947 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29948 | DWConv2DMicrokernelTester() |
| 29949 | .input_width(input_width) |
| 29950 | .input_height(input_height) |
| 29951 | .kernel_height(5) |
| 29952 | .kernel_width(5) |
| 29953 | .subsampling(1) |
| 29954 | .padding_left(2) |
| 29955 | .padding_right(2) |
| 29956 | .padding_top(2) |
| 29957 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29958 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29959 | } |
| 29960 | } |
| 29961 | } |
| 29962 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29963 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_lt_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29964 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 29965 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29966 | DWConv2DMicrokernelTester() |
| 29967 | .input_width(input_width) |
| 29968 | .input_height(input_height) |
| 29969 | .kernel_height(5) |
| 29970 | .kernel_width(5) |
| 29971 | .subsampling(1) |
| 29972 | .padding_left(2) |
| 29973 | .padding_right(2) |
| 29974 | .padding_top(2) |
| 29975 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29976 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29977 | } |
| 29978 | } |
| 29979 | } |
| 29980 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29981 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_gt_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29982 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 29983 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 29984 | DWConv2DMicrokernelTester() |
| 29985 | .input_width(input_width) |
| 29986 | .input_height(input_height) |
| 29987 | .kernel_height(5) |
| 29988 | .kernel_width(5) |
| 29989 | .subsampling(1) |
| 29990 | .padding_left(2) |
| 29991 | .padding_right(2) |
| 29992 | .padding_top(2) |
| 29993 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 29994 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29995 | } |
| 29996 | } |
| 29997 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 29998 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 29999 | |
| 30000 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30001 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30002 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30003 | DWConv2DMicrokernelTester() |
| 30004 | .input_width(4) |
| 30005 | .input_height(2) |
| 30006 | .kernel_height(5) |
| 30007 | .kernel_width(5) |
| 30008 | .subsampling(1) |
| 30009 | .padding_left(2) |
| 30010 | .padding_right(2) |
| 30011 | .padding_top(2) |
| 30012 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30013 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30014 | } |
| 30015 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30016 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30017 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 30018 | DWConv2DMicrokernelTester() |
| 30019 | .input_width(input_width) |
| 30020 | .input_height(2) |
| 30021 | .kernel_height(5) |
| 30022 | .kernel_width(5) |
| 30023 | .subsampling(1) |
| 30024 | .padding_left(2) |
| 30025 | .padding_right(2) |
| 30026 | .padding_top(2) |
| 30027 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30028 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30029 | } |
| 30030 | } |
| 30031 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30032 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30033 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 30034 | DWConv2DMicrokernelTester() |
| 30035 | .input_width(4) |
| 30036 | .input_height(2) |
| 30037 | .kernel_height(5) |
| 30038 | .kernel_width(5) |
| 30039 | .subsampling(1) |
| 30040 | .padding_left(2) |
| 30041 | .padding_right(2) |
| 30042 | .padding_top(2) |
| 30043 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30044 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30045 | } |
| 30046 | } |
| 30047 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30048 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30049 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 30050 | DWConv2DMicrokernelTester() |
| 30051 | .input_width(input_width) |
| 30052 | .input_height(2) |
| 30053 | .kernel_height(5) |
| 30054 | .kernel_width(5) |
| 30055 | .subsampling(1) |
| 30056 | .padding_left(2) |
| 30057 | .padding_right(2) |
| 30058 | .padding_top(2) |
| 30059 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30060 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30061 | } |
| 30062 | } |
| 30063 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30064 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_height_div_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30065 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 30066 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30067 | DWConv2DMicrokernelTester() |
| 30068 | .input_width(input_width) |
| 30069 | .input_height(input_height) |
| 30070 | .kernel_height(5) |
| 30071 | .kernel_width(5) |
| 30072 | .subsampling(1) |
| 30073 | .padding_left(2) |
| 30074 | .padding_right(2) |
| 30075 | .padding_top(2) |
| 30076 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30077 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30078 | } |
| 30079 | } |
| 30080 | } |
| 30081 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30082 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_height_lt_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30083 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 30084 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30085 | DWConv2DMicrokernelTester() |
| 30086 | .input_width(input_width) |
| 30087 | .input_height(input_height) |
| 30088 | .kernel_height(5) |
| 30089 | .kernel_width(5) |
| 30090 | .subsampling(1) |
| 30091 | .padding_left(2) |
| 30092 | .padding_right(2) |
| 30093 | .padding_top(2) |
| 30094 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30095 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30096 | } |
| 30097 | } |
| 30098 | } |
| 30099 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30100 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_height_gt_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30101 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 30102 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30103 | DWConv2DMicrokernelTester() |
| 30104 | .input_width(input_width) |
| 30105 | .input_height(input_height) |
| 30106 | .kernel_height(5) |
| 30107 | .kernel_width(5) |
| 30108 | .subsampling(1) |
| 30109 | .padding_left(2) |
| 30110 | .padding_right(2) |
| 30111 | .padding_top(2) |
| 30112 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30113 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30114 | } |
| 30115 | } |
| 30116 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30117 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30118 | |
| 30119 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30120 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30121 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30122 | DWConv2DMicrokernelTester() |
| 30123 | .input_width(4) |
| 30124 | .input_height(2) |
| 30125 | .kernel_height(5) |
| 30126 | .kernel_width(5) |
| 30127 | .subsampling(1) |
| 30128 | .padding_left(2) |
| 30129 | .padding_right(2) |
| 30130 | .padding_top(2) |
| 30131 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30132 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30133 | } |
| 30134 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30135 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30136 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 30137 | DWConv2DMicrokernelTester() |
| 30138 | .input_width(input_width) |
| 30139 | .input_height(2) |
| 30140 | .kernel_height(5) |
| 30141 | .kernel_width(5) |
| 30142 | .subsampling(1) |
| 30143 | .padding_left(2) |
| 30144 | .padding_right(2) |
| 30145 | .padding_top(2) |
| 30146 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30147 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30148 | } |
| 30149 | } |
| 30150 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30151 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30152 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 30153 | DWConv2DMicrokernelTester() |
| 30154 | .input_width(4) |
| 30155 | .input_height(2) |
| 30156 | .kernel_height(5) |
| 30157 | .kernel_width(5) |
| 30158 | .subsampling(1) |
| 30159 | .padding_left(2) |
| 30160 | .padding_right(2) |
| 30161 | .padding_top(2) |
| 30162 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30163 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30164 | } |
| 30165 | } |
| 30166 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30167 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30168 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 30169 | DWConv2DMicrokernelTester() |
| 30170 | .input_width(input_width) |
| 30171 | .input_height(2) |
| 30172 | .kernel_height(5) |
| 30173 | .kernel_width(5) |
| 30174 | .subsampling(1) |
| 30175 | .padding_left(2) |
| 30176 | .padding_right(2) |
| 30177 | .padding_top(2) |
| 30178 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30179 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30180 | } |
| 30181 | } |
| 30182 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30183 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4, output_height_div_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30184 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 30185 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30186 | DWConv2DMicrokernelTester() |
| 30187 | .input_width(input_width) |
| 30188 | .input_height(input_height) |
| 30189 | .kernel_height(5) |
| 30190 | .kernel_width(5) |
| 30191 | .subsampling(1) |
| 30192 | .padding_left(2) |
| 30193 | .padding_right(2) |
| 30194 | .padding_top(2) |
| 30195 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30196 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30197 | } |
| 30198 | } |
| 30199 | } |
| 30200 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30201 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4, output_height_lt_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30202 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 30203 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30204 | DWConv2DMicrokernelTester() |
| 30205 | .input_width(input_width) |
| 30206 | .input_height(input_height) |
| 30207 | .kernel_height(5) |
| 30208 | .kernel_width(5) |
| 30209 | .subsampling(1) |
| 30210 | .padding_left(2) |
| 30211 | .padding_right(2) |
| 30212 | .padding_top(2) |
| 30213 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30214 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30215 | } |
| 30216 | } |
| 30217 | } |
| 30218 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30219 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_2X4, output_height_gt_2) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30220 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 30221 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30222 | DWConv2DMicrokernelTester() |
| 30223 | .input_width(input_width) |
| 30224 | .input_height(input_height) |
| 30225 | .kernel_height(5) |
| 30226 | .kernel_width(5) |
| 30227 | .subsampling(1) |
| 30228 | .padding_left(2) |
| 30229 | .padding_right(2) |
| 30230 | .padding_top(2) |
| 30231 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30232 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30233 | } |
| 30234 | } |
| 30235 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30236 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30237 | |
| 30238 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30239 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30240 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30241 | DWConv2DMicrokernelTester() |
| 30242 | .input_width(4) |
| 30243 | .input_height(3) |
| 30244 | .kernel_height(5) |
| 30245 | .kernel_width(5) |
| 30246 | .subsampling(1) |
| 30247 | .padding_left(2) |
| 30248 | .padding_right(2) |
| 30249 | .padding_top(2) |
| 30250 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30251 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30252 | } |
| 30253 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30254 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30255 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 30256 | DWConv2DMicrokernelTester() |
| 30257 | .input_width(input_width) |
| 30258 | .input_height(3) |
| 30259 | .kernel_height(5) |
| 30260 | .kernel_width(5) |
| 30261 | .subsampling(1) |
| 30262 | .padding_left(2) |
| 30263 | .padding_right(2) |
| 30264 | .padding_top(2) |
| 30265 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30266 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30267 | } |
| 30268 | } |
| 30269 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30270 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30271 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 30272 | DWConv2DMicrokernelTester() |
| 30273 | .input_width(4) |
| 30274 | .input_height(3) |
| 30275 | .kernel_height(5) |
| 30276 | .kernel_width(5) |
| 30277 | .subsampling(1) |
| 30278 | .padding_left(2) |
| 30279 | .padding_right(2) |
| 30280 | .padding_top(2) |
| 30281 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30282 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30283 | } |
| 30284 | } |
| 30285 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30286 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30287 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 30288 | DWConv2DMicrokernelTester() |
| 30289 | .input_width(input_width) |
| 30290 | .input_height(3) |
| 30291 | .kernel_height(5) |
| 30292 | .kernel_width(5) |
| 30293 | .subsampling(1) |
| 30294 | .padding_left(2) |
| 30295 | .padding_right(2) |
| 30296 | .padding_top(2) |
| 30297 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30298 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30299 | } |
| 30300 | } |
| 30301 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30302 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_height_div_3) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30303 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 30304 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30305 | DWConv2DMicrokernelTester() |
| 30306 | .input_width(input_width) |
| 30307 | .input_height(input_height) |
| 30308 | .kernel_height(5) |
| 30309 | .kernel_width(5) |
| 30310 | .subsampling(1) |
| 30311 | .padding_left(2) |
| 30312 | .padding_right(2) |
| 30313 | .padding_top(2) |
| 30314 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30315 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30316 | } |
| 30317 | } |
| 30318 | } |
| 30319 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30320 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_height_lt_3) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30321 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 30322 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30323 | DWConv2DMicrokernelTester() |
| 30324 | .input_width(input_width) |
| 30325 | .input_height(input_height) |
| 30326 | .kernel_height(5) |
| 30327 | .kernel_width(5) |
| 30328 | .subsampling(1) |
| 30329 | .padding_left(2) |
| 30330 | .padding_right(2) |
| 30331 | .padding_top(2) |
| 30332 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30333 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30334 | } |
| 30335 | } |
| 30336 | } |
| 30337 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30338 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_height_gt_3) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30339 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 30340 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30341 | DWConv2DMicrokernelTester() |
| 30342 | .input_width(input_width) |
| 30343 | .input_height(input_height) |
| 30344 | .kernel_height(5) |
| 30345 | .kernel_width(5) |
| 30346 | .subsampling(1) |
| 30347 | .padding_left(2) |
| 30348 | .padding_right(2) |
| 30349 | .padding_top(2) |
| 30350 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30351 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30352 | } |
| 30353 | } |
| 30354 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30355 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30356 | |
| 30357 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30358 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30359 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4, output_width_eq_4) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30360 | DWConv2DMicrokernelTester() |
| 30361 | .input_width(4) |
| 30362 | .input_height(3) |
| 30363 | .kernel_height(5) |
| 30364 | .kernel_width(5) |
| 30365 | .subsampling(1) |
| 30366 | .padding_left(2) |
| 30367 | .padding_right(2) |
| 30368 | .padding_top(2) |
| 30369 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30370 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30371 | } |
| 30372 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30373 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4, output_width_div_4) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30374 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 30375 | DWConv2DMicrokernelTester() |
| 30376 | .input_width(input_width) |
| 30377 | .input_height(3) |
| 30378 | .kernel_height(5) |
| 30379 | .kernel_width(5) |
| 30380 | .subsampling(1) |
| 30381 | .padding_left(2) |
| 30382 | .padding_right(2) |
| 30383 | .padding_top(2) |
| 30384 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30385 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30386 | } |
| 30387 | } |
| 30388 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30389 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4, output_width_lt_4) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30390 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 30391 | DWConv2DMicrokernelTester() |
| 30392 | .input_width(4) |
| 30393 | .input_height(3) |
| 30394 | .kernel_height(5) |
| 30395 | .kernel_width(5) |
| 30396 | .subsampling(1) |
| 30397 | .padding_left(2) |
| 30398 | .padding_right(2) |
| 30399 | .padding_top(2) |
| 30400 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30401 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30402 | } |
| 30403 | } |
| 30404 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30405 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4, output_width_gt_4) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30406 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 30407 | DWConv2DMicrokernelTester() |
| 30408 | .input_width(input_width) |
| 30409 | .input_height(3) |
| 30410 | .kernel_height(5) |
| 30411 | .kernel_width(5) |
| 30412 | .subsampling(1) |
| 30413 | .padding_left(2) |
| 30414 | .padding_right(2) |
| 30415 | .padding_top(2) |
| 30416 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30417 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30418 | } |
| 30419 | } |
| 30420 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30421 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4, output_height_div_3) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30422 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 30423 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30424 | DWConv2DMicrokernelTester() |
| 30425 | .input_width(input_width) |
| 30426 | .input_height(input_height) |
| 30427 | .kernel_height(5) |
| 30428 | .kernel_width(5) |
| 30429 | .subsampling(1) |
| 30430 | .padding_left(2) |
| 30431 | .padding_right(2) |
| 30432 | .padding_top(2) |
| 30433 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30434 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30435 | } |
| 30436 | } |
| 30437 | } |
| 30438 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30439 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4, output_height_lt_3) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30440 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 30441 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30442 | DWConv2DMicrokernelTester() |
| 30443 | .input_width(input_width) |
| 30444 | .input_height(input_height) |
| 30445 | .kernel_height(5) |
| 30446 | .kernel_width(5) |
| 30447 | .subsampling(1) |
| 30448 | .padding_left(2) |
| 30449 | .padding_right(2) |
| 30450 | .padding_top(2) |
| 30451 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30452 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30453 | } |
| 30454 | } |
| 30455 | } |
| 30456 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30457 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_3X4, output_height_gt_3) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30458 | for (size_t input_height = 4; input_height < 7; input_height++) { |
| 30459 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30460 | DWConv2DMicrokernelTester() |
| 30461 | .input_width(input_width) |
| 30462 | .input_height(input_height) |
| 30463 | .kernel_height(5) |
| 30464 | .kernel_width(5) |
| 30465 | .subsampling(1) |
| 30466 | .padding_left(2) |
| 30467 | .padding_right(2) |
| 30468 | .padding_top(2) |
| 30469 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30470 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30471 | } |
| 30472 | } |
| 30473 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30474 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30475 | |
| 30476 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30477 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30478 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4_ACC2, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30479 | DWConv2DMicrokernelTester() |
| 30480 | .input_width(4) |
| 30481 | .input_height(4) |
| 30482 | .kernel_height(5) |
| 30483 | .kernel_width(5) |
| 30484 | .subsampling(1) |
| 30485 | .padding_left(2) |
| 30486 | .padding_right(2) |
| 30487 | .padding_top(2) |
| 30488 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30489 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30490 | } |
| 30491 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30492 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4_ACC2, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30493 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30494 | DWConv2DMicrokernelTester() |
| 30495 | .input_width(input_width) |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30496 | .input_height(4) |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30497 | .kernel_height(5) |
| 30498 | .kernel_width(5) |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30499 | .subsampling(1) |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30500 | .padding_left(2) |
| 30501 | .padding_right(2) |
| 30502 | .padding_top(2) |
| 30503 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30504 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4_acc2); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30505 | } |
| 30506 | } |
| 30507 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30508 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4_ACC2, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30509 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 30510 | DWConv2DMicrokernelTester() |
| 30511 | .input_width(4) |
| 30512 | .input_height(4) |
| 30513 | .kernel_height(5) |
| 30514 | .kernel_width(5) |
| 30515 | .subsampling(1) |
| 30516 | .padding_left(2) |
| 30517 | .padding_right(2) |
| 30518 | .padding_top(2) |
| 30519 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30520 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30521 | } |
| 30522 | } |
| 30523 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30524 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4_ACC2, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30525 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30526 | DWConv2DMicrokernelTester() |
| 30527 | .input_width(input_width) |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30528 | .input_height(4) |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30529 | .kernel_height(5) |
| 30530 | .kernel_width(5) |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30531 | .subsampling(1) |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30532 | .padding_left(2) |
| 30533 | .padding_right(2) |
| 30534 | .padding_top(2) |
| 30535 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30536 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4_acc2); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30537 | } |
| 30538 | } |
| 30539 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30540 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4_ACC2, output_height_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30541 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 30542 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30543 | DWConv2DMicrokernelTester() |
| 30544 | .input_width(input_width) |
| 30545 | .input_height(input_height) |
| 30546 | .kernel_height(5) |
| 30547 | .kernel_width(5) |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30548 | .subsampling(1) |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30549 | .padding_left(2) |
| 30550 | .padding_right(2) |
| 30551 | .padding_top(2) |
| 30552 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30553 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4_acc2); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30554 | } |
| 30555 | } |
| 30556 | } |
| 30557 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30558 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4_ACC2, output_height_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30559 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 30560 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30561 | DWConv2DMicrokernelTester() |
| 30562 | .input_width(input_width) |
| 30563 | .input_height(input_height) |
| 30564 | .kernel_height(5) |
| 30565 | .kernel_width(5) |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30566 | .subsampling(1) |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30567 | .padding_left(2) |
| 30568 | .padding_right(2) |
| 30569 | .padding_top(2) |
| 30570 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30571 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4_acc2); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30572 | } |
| 30573 | } |
| 30574 | } |
| 30575 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30576 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4_ACC2, output_height_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30577 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 30578 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30579 | DWConv2DMicrokernelTester() |
| 30580 | .input_width(input_width) |
| 30581 | .input_height(input_height) |
| 30582 | .kernel_height(5) |
| 30583 | .kernel_width(5) |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30584 | .subsampling(1) |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30585 | .padding_left(2) |
| 30586 | .padding_right(2) |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30587 | .padding_top(2) |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30588 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30589 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4_acc2); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30590 | } |
| 30591 | } |
| 30592 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30593 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30594 | |
| 30595 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30596 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30597 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30598 | DWConv2DMicrokernelTester() |
| 30599 | .input_width(4) |
| 30600 | .input_height(4) |
| 30601 | .kernel_height(5) |
| 30602 | .kernel_width(5) |
| 30603 | .subsampling(1) |
| 30604 | .padding_left(2) |
| 30605 | .padding_right(2) |
| 30606 | .padding_top(2) |
| 30607 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30608 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30609 | } |
| 30610 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30611 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30612 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 30613 | DWConv2DMicrokernelTester() |
| 30614 | .input_width(input_width) |
| 30615 | .input_height(4) |
| 30616 | .kernel_height(5) |
| 30617 | .kernel_width(5) |
| 30618 | .subsampling(1) |
| 30619 | .padding_left(2) |
| 30620 | .padding_right(2) |
| 30621 | .padding_top(2) |
| 30622 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30623 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30624 | } |
| 30625 | } |
| 30626 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30627 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30628 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 30629 | DWConv2DMicrokernelTester() |
| 30630 | .input_width(4) |
| 30631 | .input_height(4) |
| 30632 | .kernel_height(5) |
| 30633 | .kernel_width(5) |
| 30634 | .subsampling(1) |
| 30635 | .padding_left(2) |
| 30636 | .padding_right(2) |
| 30637 | .padding_top(2) |
| 30638 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30639 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30640 | } |
| 30641 | } |
| 30642 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30643 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30644 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 30645 | DWConv2DMicrokernelTester() |
| 30646 | .input_width(input_width) |
| 30647 | .input_height(4) |
| 30648 | .kernel_height(5) |
| 30649 | .kernel_width(5) |
| 30650 | .subsampling(1) |
| 30651 | .padding_left(2) |
| 30652 | .padding_right(2) |
| 30653 | .padding_top(2) |
| 30654 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30655 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30656 | } |
| 30657 | } |
| 30658 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30659 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4, output_height_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30660 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 30661 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30662 | DWConv2DMicrokernelTester() |
| 30663 | .input_width(input_width) |
| 30664 | .input_height(input_height) |
| 30665 | .kernel_height(5) |
| 30666 | .kernel_width(5) |
| 30667 | .subsampling(1) |
| 30668 | .padding_left(2) |
| 30669 | .padding_right(2) |
| 30670 | .padding_top(2) |
| 30671 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30672 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30673 | } |
| 30674 | } |
| 30675 | } |
| 30676 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30677 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4, output_height_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30678 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 30679 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30680 | DWConv2DMicrokernelTester() |
| 30681 | .input_width(input_width) |
| 30682 | .input_height(input_height) |
| 30683 | .kernel_height(5) |
| 30684 | .kernel_width(5) |
| 30685 | .subsampling(1) |
| 30686 | .padding_left(2) |
| 30687 | .padding_right(2) |
| 30688 | .padding_top(2) |
| 30689 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30690 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30691 | } |
| 30692 | } |
| 30693 | } |
| 30694 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30695 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_4X4, output_height_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30696 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 30697 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30698 | DWConv2DMicrokernelTester() |
| 30699 | .input_width(input_width) |
| 30700 | .input_height(input_height) |
| 30701 | .kernel_height(5) |
| 30702 | .kernel_width(5) |
| 30703 | .subsampling(1) |
| 30704 | .padding_left(2) |
| 30705 | .padding_right(2) |
| 30706 | .padding_top(2) |
| 30707 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30708 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30709 | } |
| 30710 | } |
| 30711 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30712 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30713 | |
| 30714 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30715 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30716 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_5X4, output_width_eq_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30717 | DWConv2DMicrokernelTester() |
| 30718 | .input_width(4) |
| 30719 | .input_height(5) |
| 30720 | .kernel_height(5) |
| 30721 | .kernel_width(5) |
| 30722 | .subsampling(1) |
| 30723 | .padding_left(2) |
| 30724 | .padding_right(2) |
| 30725 | .padding_top(2) |
| 30726 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30727 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_5x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30728 | } |
| 30729 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30730 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_5X4, output_width_div_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30731 | for (size_t input_width = 8; input_width < 32; input_width += 4) { |
| 30732 | DWConv2DMicrokernelTester() |
| 30733 | .input_width(input_width) |
| 30734 | .input_height(5) |
| 30735 | .kernel_height(5) |
| 30736 | .kernel_width(5) |
| 30737 | .subsampling(1) |
| 30738 | .padding_left(2) |
| 30739 | .padding_right(2) |
| 30740 | .padding_top(2) |
| 30741 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30742 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_5x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30743 | } |
| 30744 | } |
| 30745 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30746 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_5X4, output_width_lt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30747 | for (size_t input_width = 1; input_width < 4; input_width++) { |
| 30748 | DWConv2DMicrokernelTester() |
| 30749 | .input_width(4) |
| 30750 | .input_height(5) |
| 30751 | .kernel_height(5) |
| 30752 | .kernel_width(5) |
| 30753 | .subsampling(1) |
| 30754 | .padding_left(2) |
| 30755 | .padding_right(2) |
| 30756 | .padding_top(2) |
| 30757 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30758 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_5x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30759 | } |
| 30760 | } |
| 30761 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30762 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_5X4, output_width_gt_4) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30763 | for (size_t input_width = 5; input_width < 9; input_width++) { |
| 30764 | DWConv2DMicrokernelTester() |
| 30765 | .input_width(input_width) |
| 30766 | .input_height(5) |
| 30767 | .kernel_height(5) |
| 30768 | .kernel_width(5) |
| 30769 | .subsampling(1) |
| 30770 | .padding_left(2) |
| 30771 | .padding_right(2) |
| 30772 | .padding_top(2) |
| 30773 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30774 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_5x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30775 | } |
| 30776 | } |
| 30777 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30778 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_5X4, output_height_div_5) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30779 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 30780 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30781 | DWConv2DMicrokernelTester() |
| 30782 | .input_width(input_width) |
| 30783 | .input_height(input_height) |
| 30784 | .kernel_height(5) |
| 30785 | .kernel_width(5) |
| 30786 | .subsampling(1) |
| 30787 | .padding_left(2) |
| 30788 | .padding_right(2) |
| 30789 | .padding_top(2) |
| 30790 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30791 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_5x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30792 | } |
| 30793 | } |
| 30794 | } |
| 30795 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30796 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_5X4, output_height_lt_5) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30797 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 30798 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30799 | DWConv2DMicrokernelTester() |
| 30800 | .input_width(input_width) |
| 30801 | .input_height(input_height) |
| 30802 | .kernel_height(5) |
| 30803 | .kernel_width(5) |
| 30804 | .subsampling(1) |
| 30805 | .padding_left(2) |
| 30806 | .padding_right(2) |
| 30807 | .padding_top(2) |
| 30808 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30809 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_5x4); |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30810 | } |
| 30811 | } |
| 30812 | } |
| 30813 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30814 | TEST(F32_DWCONV2D_CHW_5X5P2__WASMSIMD_X86_SPLAT_5X4, output_height_gt_5) { |
| Frank Barchard | 20a0741 | 2020-11-30 23:30:00 -0800 | [diff] [blame] | 30815 | for (size_t input_height = 6; input_height < 11; input_height++) { |
| 30816 | for (size_t input_width = 1; input_width < 21; input_width += 3) { |
| 30817 | DWConv2DMicrokernelTester() |
| 30818 | .input_width(input_width) |
| 30819 | .input_height(input_height) |
| 30820 | .kernel_height(5) |
| 30821 | .kernel_width(5) |
| 30822 | .subsampling(1) |
| 30823 | .padding_left(2) |
| 30824 | .padding_right(2) |
| 30825 | .padding_top(2) |
| 30826 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 30827 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_5x4); |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30828 | } |
| 30829 | } |
| 30830 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30831 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | db5c32d | 2020-11-16 23:58:42 -0800 | [diff] [blame] | 30832 | |
| 30833 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30834 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 30835 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_eq_4) { |
| 30836 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 30837 | DWConv2DMicrokernelTester() |
| 30838 | .input_width(input_width) |
| 30839 | .input_height(2) |
| 30840 | .kernel_height(5) |
| 30841 | .kernel_width(5) |
| 30842 | .subsampling(2) |
| 30843 | .padding_left(2) |
| 30844 | .padding_right(2) |
| 30845 | .padding_top(2) |
| 30846 | .padding_bottom(2) |
| 30847 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4); |
| 30848 | } |
| 30849 | } |
| 30850 | |
| 30851 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_div_4) { |
| 30852 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 30853 | DWConv2DMicrokernelTester() |
| 30854 | .input_width(input_width) |
| 30855 | .input_height(2) |
| 30856 | .kernel_height(5) |
| 30857 | .kernel_width(5) |
| 30858 | .subsampling(2) |
| 30859 | .padding_left(2) |
| 30860 | .padding_right(2) |
| 30861 | .padding_top(2) |
| 30862 | .padding_bottom(2) |
| 30863 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4); |
| 30864 | } |
| 30865 | } |
| 30866 | |
| 30867 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_lt_4) { |
| 30868 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 30869 | DWConv2DMicrokernelTester() |
| 30870 | .input_width(8) |
| 30871 | .input_height(2) |
| 30872 | .kernel_height(5) |
| 30873 | .kernel_width(5) |
| 30874 | .subsampling(2) |
| 30875 | .padding_left(2) |
| 30876 | .padding_right(2) |
| 30877 | .padding_top(2) |
| 30878 | .padding_bottom(2) |
| 30879 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4); |
| 30880 | } |
| 30881 | } |
| 30882 | |
| 30883 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4, output_width_gt_4) { |
| 30884 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 30885 | DWConv2DMicrokernelTester() |
| 30886 | .input_width(input_width) |
| 30887 | .input_height(2) |
| 30888 | .kernel_height(5) |
| 30889 | .kernel_width(5) |
| 30890 | .subsampling(2) |
| 30891 | .padding_left(2) |
| 30892 | .padding_right(2) |
| 30893 | .padding_top(2) |
| 30894 | .padding_bottom(2) |
| 30895 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4); |
| 30896 | } |
| 30897 | } |
| 30898 | |
| 30899 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4, output_height_eq_1) { |
| 30900 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 30901 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 30902 | DWConv2DMicrokernelTester() |
| 30903 | .input_width(input_width) |
| 30904 | .input_height(input_height) |
| 30905 | .kernel_height(5) |
| 30906 | .kernel_width(5) |
| 30907 | .subsampling(2) |
| 30908 | .padding_left(2) |
| 30909 | .padding_right(2) |
| 30910 | .padding_top(2) |
| 30911 | .padding_bottom(2) |
| 30912 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4); |
| 30913 | } |
| 30914 | } |
| 30915 | } |
| 30916 | |
| 30917 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4, output_height_gt_1) { |
| 30918 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 30919 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 30920 | DWConv2DMicrokernelTester() |
| 30921 | .input_width(input_width) |
| 30922 | .input_height(input_height) |
| 30923 | .kernel_height(5) |
| 30924 | .kernel_width(5) |
| 30925 | .subsampling(2) |
| 30926 | .padding_left(2) |
| 30927 | .padding_right(2) |
| 30928 | .padding_top(2) |
| 30929 | .padding_bottom(2) |
| 30930 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4); |
| 30931 | } |
| 30932 | } |
| 30933 | } |
| 30934 | |
| 30935 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4, padding_top_eq_1) { |
| 30936 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 30937 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 30938 | DWConv2DMicrokernelTester() |
| 30939 | .input_width(input_width) |
| 30940 | .input_height(input_height) |
| 30941 | .kernel_height(5) |
| 30942 | .kernel_width(5) |
| 30943 | .subsampling(2) |
| 30944 | .padding_left(2) |
| 30945 | .padding_right(2) |
| 30946 | .padding_top(1) |
| 30947 | .padding_bottom(2) |
| 30948 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4); |
| 30949 | } |
| 30950 | } |
| 30951 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30952 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 30953 | |
| 30954 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 30955 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 30956 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_eq_4) { |
| 30957 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 30958 | DWConv2DMicrokernelTester() |
| 30959 | .input_width(input_width) |
| 30960 | .input_height(4) |
| 30961 | .kernel_height(5) |
| 30962 | .kernel_width(5) |
| 30963 | .subsampling(2) |
| 30964 | .padding_left(2) |
| 30965 | .padding_right(2) |
| 30966 | .padding_top(2) |
| 30967 | .padding_bottom(2) |
| 30968 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4); |
| 30969 | } |
| 30970 | } |
| 30971 | |
| 30972 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_div_4) { |
| 30973 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 30974 | DWConv2DMicrokernelTester() |
| 30975 | .input_width(input_width) |
| 30976 | .input_height(4) |
| 30977 | .kernel_height(5) |
| 30978 | .kernel_width(5) |
| 30979 | .subsampling(2) |
| 30980 | .padding_left(2) |
| 30981 | .padding_right(2) |
| 30982 | .padding_top(2) |
| 30983 | .padding_bottom(2) |
| 30984 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4); |
| 30985 | } |
| 30986 | } |
| 30987 | |
| 30988 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_lt_4) { |
| 30989 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 30990 | DWConv2DMicrokernelTester() |
| 30991 | .input_width(8) |
| 30992 | .input_height(4) |
| 30993 | .kernel_height(5) |
| 30994 | .kernel_width(5) |
| 30995 | .subsampling(2) |
| 30996 | .padding_left(2) |
| 30997 | .padding_right(2) |
| 30998 | .padding_top(2) |
| 30999 | .padding_bottom(2) |
| 31000 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4); |
| 31001 | } |
| 31002 | } |
| 31003 | |
| 31004 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_width_gt_4) { |
| 31005 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 31006 | DWConv2DMicrokernelTester() |
| 31007 | .input_width(input_width) |
| 31008 | .input_height(4) |
| 31009 | .kernel_height(5) |
| 31010 | .kernel_width(5) |
| 31011 | .subsampling(2) |
| 31012 | .padding_left(2) |
| 31013 | .padding_right(2) |
| 31014 | .padding_top(2) |
| 31015 | .padding_bottom(2) |
| 31016 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4); |
| 31017 | } |
| 31018 | } |
| 31019 | |
| 31020 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_eq_2) { |
| 31021 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 31022 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31023 | DWConv2DMicrokernelTester() |
| 31024 | .input_width(input_width) |
| 31025 | .input_height(input_height) |
| 31026 | .kernel_height(5) |
| 31027 | .kernel_width(5) |
| 31028 | .subsampling(2) |
| 31029 | .padding_left(2) |
| 31030 | .padding_right(2) |
| 31031 | .padding_top(2) |
| 31032 | .padding_bottom(2) |
| 31033 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4); |
| 31034 | } |
| 31035 | } |
| 31036 | } |
| 31037 | |
| 31038 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_div_2) { |
| 31039 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 31040 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31041 | DWConv2DMicrokernelTester() |
| 31042 | .input_width(input_width) |
| 31043 | .input_height(input_height) |
| 31044 | .kernel_height(5) |
| 31045 | .kernel_width(5) |
| 31046 | .subsampling(2) |
| 31047 | .padding_left(2) |
| 31048 | .padding_right(2) |
| 31049 | .padding_top(2) |
| 31050 | .padding_bottom(2) |
| 31051 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4); |
| 31052 | } |
| 31053 | } |
| 31054 | } |
| 31055 | |
| 31056 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_lt_2) { |
| 31057 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 31058 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31059 | DWConv2DMicrokernelTester() |
| 31060 | .input_width(input_width) |
| 31061 | .input_height(input_height) |
| 31062 | .kernel_height(5) |
| 31063 | .kernel_width(5) |
| 31064 | .subsampling(2) |
| 31065 | .padding_left(2) |
| 31066 | .padding_right(2) |
| 31067 | .padding_top(2) |
| 31068 | .padding_bottom(2) |
| 31069 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4); |
| 31070 | } |
| 31071 | } |
| 31072 | } |
| 31073 | |
| 31074 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4, output_height_gt_2) { |
| 31075 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 31076 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31077 | DWConv2DMicrokernelTester() |
| 31078 | .input_width(input_width) |
| 31079 | .input_height(input_height) |
| 31080 | .kernel_height(5) |
| 31081 | .kernel_width(5) |
| 31082 | .subsampling(2) |
| 31083 | .padding_left(2) |
| 31084 | .padding_right(2) |
| 31085 | .padding_top(2) |
| 31086 | .padding_bottom(2) |
| 31087 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4); |
| 31088 | } |
| 31089 | } |
| 31090 | } |
| 31091 | |
| 31092 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4, padding_top_eq_1) { |
| 31093 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 31094 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31095 | DWConv2DMicrokernelTester() |
| 31096 | .input_width(input_width) |
| 31097 | .input_height(input_height) |
| 31098 | .kernel_height(5) |
| 31099 | .kernel_width(5) |
| 31100 | .subsampling(2) |
| 31101 | .padding_left(2) |
| 31102 | .padding_right(2) |
| 31103 | .padding_top(1) |
| 31104 | .padding_bottom(2) |
| 31105 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4); |
| 31106 | } |
| 31107 | } |
| 31108 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31109 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31110 | |
| 31111 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31112 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31113 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_eq_4) { |
| 31114 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 31115 | DWConv2DMicrokernelTester() |
| 31116 | .input_width(input_width) |
| 31117 | .input_height(6) |
| 31118 | .kernel_height(5) |
| 31119 | .kernel_width(5) |
| 31120 | .subsampling(2) |
| 31121 | .padding_left(2) |
| 31122 | .padding_right(2) |
| 31123 | .padding_top(2) |
| 31124 | .padding_bottom(2) |
| 31125 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4); |
| 31126 | } |
| 31127 | } |
| 31128 | |
| 31129 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_div_4) { |
| 31130 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 31131 | DWConv2DMicrokernelTester() |
| 31132 | .input_width(input_width) |
| 31133 | .input_height(6) |
| 31134 | .kernel_height(5) |
| 31135 | .kernel_width(5) |
| 31136 | .subsampling(2) |
| 31137 | .padding_left(2) |
| 31138 | .padding_right(2) |
| 31139 | .padding_top(2) |
| 31140 | .padding_bottom(2) |
| 31141 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4); |
| 31142 | } |
| 31143 | } |
| 31144 | |
| 31145 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_lt_4) { |
| 31146 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 31147 | DWConv2DMicrokernelTester() |
| 31148 | .input_width(8) |
| 31149 | .input_height(6) |
| 31150 | .kernel_height(5) |
| 31151 | .kernel_width(5) |
| 31152 | .subsampling(2) |
| 31153 | .padding_left(2) |
| 31154 | .padding_right(2) |
| 31155 | .padding_top(2) |
| 31156 | .padding_bottom(2) |
| 31157 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4); |
| 31158 | } |
| 31159 | } |
| 31160 | |
| 31161 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_width_gt_4) { |
| 31162 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 31163 | DWConv2DMicrokernelTester() |
| 31164 | .input_width(input_width) |
| 31165 | .input_height(6) |
| 31166 | .kernel_height(5) |
| 31167 | .kernel_width(5) |
| 31168 | .subsampling(2) |
| 31169 | .padding_left(2) |
| 31170 | .padding_right(2) |
| 31171 | .padding_top(2) |
| 31172 | .padding_bottom(2) |
| 31173 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4); |
| 31174 | } |
| 31175 | } |
| 31176 | |
| 31177 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_eq_3) { |
| 31178 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 31179 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31180 | DWConv2DMicrokernelTester() |
| 31181 | .input_width(input_width) |
| 31182 | .input_height(input_height) |
| 31183 | .kernel_height(5) |
| 31184 | .kernel_width(5) |
| 31185 | .subsampling(2) |
| 31186 | .padding_left(2) |
| 31187 | .padding_right(2) |
| 31188 | .padding_top(2) |
| 31189 | .padding_bottom(2) |
| 31190 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4); |
| 31191 | } |
| 31192 | } |
| 31193 | } |
| 31194 | |
| 31195 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_div_3) { |
| 31196 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 31197 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31198 | DWConv2DMicrokernelTester() |
| 31199 | .input_width(input_width) |
| 31200 | .input_height(input_height) |
| 31201 | .kernel_height(5) |
| 31202 | .kernel_width(5) |
| 31203 | .subsampling(2) |
| 31204 | .padding_left(2) |
| 31205 | .padding_right(2) |
| 31206 | .padding_top(2) |
| 31207 | .padding_bottom(2) |
| 31208 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4); |
| 31209 | } |
| 31210 | } |
| 31211 | } |
| 31212 | |
| 31213 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_lt_3) { |
| 31214 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 31215 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31216 | DWConv2DMicrokernelTester() |
| 31217 | .input_width(input_width) |
| 31218 | .input_height(input_height) |
| 31219 | .kernel_height(5) |
| 31220 | .kernel_width(5) |
| 31221 | .subsampling(2) |
| 31222 | .padding_left(2) |
| 31223 | .padding_right(2) |
| 31224 | .padding_top(2) |
| 31225 | .padding_bottom(2) |
| 31226 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4); |
| 31227 | } |
| 31228 | } |
| 31229 | } |
| 31230 | |
| 31231 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4, output_height_gt_3) { |
| 31232 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 31233 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31234 | DWConv2DMicrokernelTester() |
| 31235 | .input_width(input_width) |
| 31236 | .input_height(input_height) |
| 31237 | .kernel_height(5) |
| 31238 | .kernel_width(5) |
| 31239 | .subsampling(2) |
| 31240 | .padding_left(2) |
| 31241 | .padding_right(2) |
| 31242 | .padding_top(2) |
| 31243 | .padding_bottom(2) |
| 31244 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4); |
| 31245 | } |
| 31246 | } |
| 31247 | } |
| 31248 | |
| 31249 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4, padding_top_eq_1) { |
| 31250 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 31251 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31252 | DWConv2DMicrokernelTester() |
| 31253 | .input_width(input_width) |
| 31254 | .input_height(input_height) |
| 31255 | .kernel_height(5) |
| 31256 | .kernel_width(5) |
| 31257 | .subsampling(2) |
| 31258 | .padding_left(2) |
| 31259 | .padding_right(2) |
| 31260 | .padding_top(1) |
| 31261 | .padding_bottom(2) |
| 31262 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4); |
| 31263 | } |
| 31264 | } |
| 31265 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31266 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31267 | |
| 31268 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31269 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31270 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_eq_4) { |
| 31271 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 31272 | DWConv2DMicrokernelTester() |
| 31273 | .input_width(input_width) |
| 31274 | .input_height(2) |
| 31275 | .kernel_height(5) |
| 31276 | .kernel_width(5) |
| 31277 | .subsampling(2) |
| 31278 | .padding_left(2) |
| 31279 | .padding_right(2) |
| 31280 | .padding_top(2) |
| 31281 | .padding_bottom(2) |
| 31282 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc2); |
| 31283 | } |
| 31284 | } |
| 31285 | |
| 31286 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_div_4) { |
| 31287 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 31288 | DWConv2DMicrokernelTester() |
| 31289 | .input_width(input_width) |
| 31290 | .input_height(2) |
| 31291 | .kernel_height(5) |
| 31292 | .kernel_width(5) |
| 31293 | .subsampling(2) |
| 31294 | .padding_left(2) |
| 31295 | .padding_right(2) |
| 31296 | .padding_top(2) |
| 31297 | .padding_bottom(2) |
| 31298 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc2); |
| 31299 | } |
| 31300 | } |
| 31301 | |
| 31302 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_lt_4) { |
| 31303 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 31304 | DWConv2DMicrokernelTester() |
| 31305 | .input_width(8) |
| 31306 | .input_height(2) |
| 31307 | .kernel_height(5) |
| 31308 | .kernel_width(5) |
| 31309 | .subsampling(2) |
| 31310 | .padding_left(2) |
| 31311 | .padding_right(2) |
| 31312 | .padding_top(2) |
| 31313 | .padding_bottom(2) |
| 31314 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc2); |
| 31315 | } |
| 31316 | } |
| 31317 | |
| 31318 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_width_gt_4) { |
| 31319 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 31320 | DWConv2DMicrokernelTester() |
| 31321 | .input_width(input_width) |
| 31322 | .input_height(2) |
| 31323 | .kernel_height(5) |
| 31324 | .kernel_width(5) |
| 31325 | .subsampling(2) |
| 31326 | .padding_left(2) |
| 31327 | .padding_right(2) |
| 31328 | .padding_top(2) |
| 31329 | .padding_bottom(2) |
| 31330 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc2); |
| 31331 | } |
| 31332 | } |
| 31333 | |
| 31334 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_height_eq_1) { |
| 31335 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 31336 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31337 | DWConv2DMicrokernelTester() |
| 31338 | .input_width(input_width) |
| 31339 | .input_height(input_height) |
| 31340 | .kernel_height(5) |
| 31341 | .kernel_width(5) |
| 31342 | .subsampling(2) |
| 31343 | .padding_left(2) |
| 31344 | .padding_right(2) |
| 31345 | .padding_top(2) |
| 31346 | .padding_bottom(2) |
| 31347 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc2); |
| 31348 | } |
| 31349 | } |
| 31350 | } |
| 31351 | |
| 31352 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, output_height_gt_1) { |
| 31353 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 31354 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31355 | DWConv2DMicrokernelTester() |
| 31356 | .input_width(input_width) |
| 31357 | .input_height(input_height) |
| 31358 | .kernel_height(5) |
| 31359 | .kernel_width(5) |
| 31360 | .subsampling(2) |
| 31361 | .padding_left(2) |
| 31362 | .padding_right(2) |
| 31363 | .padding_top(2) |
| 31364 | .padding_bottom(2) |
| 31365 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc2); |
| 31366 | } |
| 31367 | } |
| 31368 | } |
| 31369 | |
| 31370 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC2, padding_top_eq_1) { |
| 31371 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 31372 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31373 | DWConv2DMicrokernelTester() |
| 31374 | .input_width(input_width) |
| 31375 | .input_height(input_height) |
| 31376 | .kernel_height(5) |
| 31377 | .kernel_width(5) |
| 31378 | .subsampling(2) |
| 31379 | .padding_left(2) |
| 31380 | .padding_right(2) |
| 31381 | .padding_top(1) |
| 31382 | .padding_bottom(2) |
| 31383 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc2); |
| 31384 | } |
| 31385 | } |
| 31386 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31387 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31388 | |
| 31389 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31390 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31391 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_eq_4) { |
| 31392 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 31393 | DWConv2DMicrokernelTester() |
| 31394 | .input_width(input_width) |
| 31395 | .input_height(2) |
| 31396 | .kernel_height(5) |
| 31397 | .kernel_width(5) |
| 31398 | .subsampling(2) |
| 31399 | .padding_left(2) |
| 31400 | .padding_right(2) |
| 31401 | .padding_top(2) |
| 31402 | .padding_bottom(2) |
| 31403 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc3); |
| 31404 | } |
| 31405 | } |
| 31406 | |
| 31407 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_div_4) { |
| 31408 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 31409 | DWConv2DMicrokernelTester() |
| 31410 | .input_width(input_width) |
| 31411 | .input_height(2) |
| 31412 | .kernel_height(5) |
| 31413 | .kernel_width(5) |
| 31414 | .subsampling(2) |
| 31415 | .padding_left(2) |
| 31416 | .padding_right(2) |
| 31417 | .padding_top(2) |
| 31418 | .padding_bottom(2) |
| 31419 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc3); |
| 31420 | } |
| 31421 | } |
| 31422 | |
| 31423 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_lt_4) { |
| 31424 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 31425 | DWConv2DMicrokernelTester() |
| 31426 | .input_width(8) |
| 31427 | .input_height(2) |
| 31428 | .kernel_height(5) |
| 31429 | .kernel_width(5) |
| 31430 | .subsampling(2) |
| 31431 | .padding_left(2) |
| 31432 | .padding_right(2) |
| 31433 | .padding_top(2) |
| 31434 | .padding_bottom(2) |
| 31435 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc3); |
| 31436 | } |
| 31437 | } |
| 31438 | |
| 31439 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_width_gt_4) { |
| 31440 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 31441 | DWConv2DMicrokernelTester() |
| 31442 | .input_width(input_width) |
| 31443 | .input_height(2) |
| 31444 | .kernel_height(5) |
| 31445 | .kernel_width(5) |
| 31446 | .subsampling(2) |
| 31447 | .padding_left(2) |
| 31448 | .padding_right(2) |
| 31449 | .padding_top(2) |
| 31450 | .padding_bottom(2) |
| 31451 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc3); |
| 31452 | } |
| 31453 | } |
| 31454 | |
| 31455 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_height_eq_1) { |
| 31456 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 31457 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31458 | DWConv2DMicrokernelTester() |
| 31459 | .input_width(input_width) |
| 31460 | .input_height(input_height) |
| 31461 | .kernel_height(5) |
| 31462 | .kernel_width(5) |
| 31463 | .subsampling(2) |
| 31464 | .padding_left(2) |
| 31465 | .padding_right(2) |
| 31466 | .padding_top(2) |
| 31467 | .padding_bottom(2) |
| 31468 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc3); |
| 31469 | } |
| 31470 | } |
| 31471 | } |
| 31472 | |
| 31473 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, output_height_gt_1) { |
| 31474 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 31475 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31476 | DWConv2DMicrokernelTester() |
| 31477 | .input_width(input_width) |
| 31478 | .input_height(input_height) |
| 31479 | .kernel_height(5) |
| 31480 | .kernel_width(5) |
| 31481 | .subsampling(2) |
| 31482 | .padding_left(2) |
| 31483 | .padding_right(2) |
| 31484 | .padding_top(2) |
| 31485 | .padding_bottom(2) |
| 31486 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc3); |
| 31487 | } |
| 31488 | } |
| 31489 | } |
| 31490 | |
| 31491 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC3, padding_top_eq_1) { |
| 31492 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 31493 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31494 | DWConv2DMicrokernelTester() |
| 31495 | .input_width(input_width) |
| 31496 | .input_height(input_height) |
| 31497 | .kernel_height(5) |
| 31498 | .kernel_width(5) |
| 31499 | .subsampling(2) |
| 31500 | .padding_left(2) |
| 31501 | .padding_right(2) |
| 31502 | .padding_top(1) |
| 31503 | .padding_bottom(2) |
| 31504 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc3); |
| 31505 | } |
| 31506 | } |
| 31507 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31508 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31509 | |
| 31510 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31511 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31512 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_eq_4) { |
| 31513 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 31514 | DWConv2DMicrokernelTester() |
| 31515 | .input_width(input_width) |
| 31516 | .input_height(2) |
| 31517 | .kernel_height(5) |
| 31518 | .kernel_width(5) |
| 31519 | .subsampling(2) |
| 31520 | .padding_left(2) |
| 31521 | .padding_right(2) |
| 31522 | .padding_top(2) |
| 31523 | .padding_bottom(2) |
| 31524 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc4); |
| 31525 | } |
| 31526 | } |
| 31527 | |
| 31528 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_div_4) { |
| 31529 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 31530 | DWConv2DMicrokernelTester() |
| 31531 | .input_width(input_width) |
| 31532 | .input_height(2) |
| 31533 | .kernel_height(5) |
| 31534 | .kernel_width(5) |
| 31535 | .subsampling(2) |
| 31536 | .padding_left(2) |
| 31537 | .padding_right(2) |
| 31538 | .padding_top(2) |
| 31539 | .padding_bottom(2) |
| 31540 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc4); |
| 31541 | } |
| 31542 | } |
| 31543 | |
| 31544 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_lt_4) { |
| 31545 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 31546 | DWConv2DMicrokernelTester() |
| 31547 | .input_width(8) |
| 31548 | .input_height(2) |
| 31549 | .kernel_height(5) |
| 31550 | .kernel_width(5) |
| 31551 | .subsampling(2) |
| 31552 | .padding_left(2) |
| 31553 | .padding_right(2) |
| 31554 | .padding_top(2) |
| 31555 | .padding_bottom(2) |
| 31556 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc4); |
| 31557 | } |
| 31558 | } |
| 31559 | |
| 31560 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_width_gt_4) { |
| 31561 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 31562 | DWConv2DMicrokernelTester() |
| 31563 | .input_width(input_width) |
| 31564 | .input_height(2) |
| 31565 | .kernel_height(5) |
| 31566 | .kernel_width(5) |
| 31567 | .subsampling(2) |
| 31568 | .padding_left(2) |
| 31569 | .padding_right(2) |
| 31570 | .padding_top(2) |
| 31571 | .padding_bottom(2) |
| 31572 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc4); |
| 31573 | } |
| 31574 | } |
| 31575 | |
| 31576 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_height_eq_1) { |
| 31577 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 31578 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31579 | DWConv2DMicrokernelTester() |
| 31580 | .input_width(input_width) |
| 31581 | .input_height(input_height) |
| 31582 | .kernel_height(5) |
| 31583 | .kernel_width(5) |
| 31584 | .subsampling(2) |
| 31585 | .padding_left(2) |
| 31586 | .padding_right(2) |
| 31587 | .padding_top(2) |
| 31588 | .padding_bottom(2) |
| 31589 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc4); |
| 31590 | } |
| 31591 | } |
| 31592 | } |
| 31593 | |
| 31594 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, output_height_gt_1) { |
| 31595 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 31596 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31597 | DWConv2DMicrokernelTester() |
| 31598 | .input_width(input_width) |
| 31599 | .input_height(input_height) |
| 31600 | .kernel_height(5) |
| 31601 | .kernel_width(5) |
| 31602 | .subsampling(2) |
| 31603 | .padding_left(2) |
| 31604 | .padding_right(2) |
| 31605 | .padding_top(2) |
| 31606 | .padding_bottom(2) |
| 31607 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc4); |
| 31608 | } |
| 31609 | } |
| 31610 | } |
| 31611 | |
| 31612 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC4, padding_top_eq_1) { |
| 31613 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 31614 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31615 | DWConv2DMicrokernelTester() |
| 31616 | .input_width(input_width) |
| 31617 | .input_height(input_height) |
| 31618 | .kernel_height(5) |
| 31619 | .kernel_width(5) |
| 31620 | .subsampling(2) |
| 31621 | .padding_left(2) |
| 31622 | .padding_right(2) |
| 31623 | .padding_top(1) |
| 31624 | .padding_bottom(2) |
| 31625 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc4); |
| 31626 | } |
| 31627 | } |
| 31628 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31629 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31630 | |
| 31631 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31632 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31633 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC5, output_width_eq_4) { |
| 31634 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 31635 | DWConv2DMicrokernelTester() |
| 31636 | .input_width(input_width) |
| 31637 | .input_height(2) |
| 31638 | .kernel_height(5) |
| 31639 | .kernel_width(5) |
| 31640 | .subsampling(2) |
| 31641 | .padding_left(2) |
| 31642 | .padding_right(2) |
| 31643 | .padding_top(2) |
| 31644 | .padding_bottom(2) |
| 31645 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc5); |
| 31646 | } |
| 31647 | } |
| 31648 | |
| 31649 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC5, output_width_div_4) { |
| 31650 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 31651 | DWConv2DMicrokernelTester() |
| 31652 | .input_width(input_width) |
| 31653 | .input_height(2) |
| 31654 | .kernel_height(5) |
| 31655 | .kernel_width(5) |
| 31656 | .subsampling(2) |
| 31657 | .padding_left(2) |
| 31658 | .padding_right(2) |
| 31659 | .padding_top(2) |
| 31660 | .padding_bottom(2) |
| 31661 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc5); |
| 31662 | } |
| 31663 | } |
| 31664 | |
| 31665 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC5, output_width_lt_4) { |
| 31666 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 31667 | DWConv2DMicrokernelTester() |
| 31668 | .input_width(8) |
| 31669 | .input_height(2) |
| 31670 | .kernel_height(5) |
| 31671 | .kernel_width(5) |
| 31672 | .subsampling(2) |
| 31673 | .padding_left(2) |
| 31674 | .padding_right(2) |
| 31675 | .padding_top(2) |
| 31676 | .padding_bottom(2) |
| 31677 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc5); |
| 31678 | } |
| 31679 | } |
| 31680 | |
| 31681 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC5, output_width_gt_4) { |
| 31682 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 31683 | DWConv2DMicrokernelTester() |
| 31684 | .input_width(input_width) |
| 31685 | .input_height(2) |
| 31686 | .kernel_height(5) |
| 31687 | .kernel_width(5) |
| 31688 | .subsampling(2) |
| 31689 | .padding_left(2) |
| 31690 | .padding_right(2) |
| 31691 | .padding_top(2) |
| 31692 | .padding_bottom(2) |
| 31693 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc5); |
| 31694 | } |
| 31695 | } |
| 31696 | |
| 31697 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC5, output_height_eq_1) { |
| 31698 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 31699 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31700 | DWConv2DMicrokernelTester() |
| 31701 | .input_width(input_width) |
| 31702 | .input_height(input_height) |
| 31703 | .kernel_height(5) |
| 31704 | .kernel_width(5) |
| 31705 | .subsampling(2) |
| 31706 | .padding_left(2) |
| 31707 | .padding_right(2) |
| 31708 | .padding_top(2) |
| 31709 | .padding_bottom(2) |
| 31710 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc5); |
| 31711 | } |
| 31712 | } |
| 31713 | } |
| 31714 | |
| 31715 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC5, output_height_gt_1) { |
| 31716 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 31717 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31718 | DWConv2DMicrokernelTester() |
| 31719 | .input_width(input_width) |
| 31720 | .input_height(input_height) |
| 31721 | .kernel_height(5) |
| 31722 | .kernel_width(5) |
| 31723 | .subsampling(2) |
| 31724 | .padding_left(2) |
| 31725 | .padding_right(2) |
| 31726 | .padding_top(2) |
| 31727 | .padding_bottom(2) |
| 31728 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc5); |
| 31729 | } |
| 31730 | } |
| 31731 | } |
| 31732 | |
| 31733 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_1X4_ACC5, padding_top_eq_1) { |
| 31734 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 31735 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31736 | DWConv2DMicrokernelTester() |
| 31737 | .input_width(input_width) |
| 31738 | .input_height(input_height) |
| 31739 | .kernel_height(5) |
| 31740 | .kernel_width(5) |
| 31741 | .subsampling(2) |
| 31742 | .padding_left(2) |
| 31743 | .padding_right(2) |
| 31744 | .padding_top(1) |
| 31745 | .padding_bottom(2) |
| 31746 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc5); |
| 31747 | } |
| 31748 | } |
| 31749 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31750 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31751 | |
| 31752 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31753 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31754 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_eq_4) { |
| 31755 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 31756 | DWConv2DMicrokernelTester() |
| 31757 | .input_width(input_width) |
| 31758 | .input_height(4) |
| 31759 | .kernel_height(5) |
| 31760 | .kernel_width(5) |
| 31761 | .subsampling(2) |
| 31762 | .padding_left(2) |
| 31763 | .padding_right(2) |
| 31764 | .padding_top(2) |
| 31765 | .padding_bottom(2) |
| 31766 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 31767 | } |
| 31768 | } |
| 31769 | |
| 31770 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_div_4) { |
| 31771 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 31772 | DWConv2DMicrokernelTester() |
| 31773 | .input_width(input_width) |
| 31774 | .input_height(4) |
| 31775 | .kernel_height(5) |
| 31776 | .kernel_width(5) |
| 31777 | .subsampling(2) |
| 31778 | .padding_left(2) |
| 31779 | .padding_right(2) |
| 31780 | .padding_top(2) |
| 31781 | .padding_bottom(2) |
| 31782 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 31783 | } |
| 31784 | } |
| 31785 | |
| 31786 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_lt_4) { |
| 31787 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 31788 | DWConv2DMicrokernelTester() |
| 31789 | .input_width(8) |
| 31790 | .input_height(4) |
| 31791 | .kernel_height(5) |
| 31792 | .kernel_width(5) |
| 31793 | .subsampling(2) |
| 31794 | .padding_left(2) |
| 31795 | .padding_right(2) |
| 31796 | .padding_top(2) |
| 31797 | .padding_bottom(2) |
| 31798 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 31799 | } |
| 31800 | } |
| 31801 | |
| 31802 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_width_gt_4) { |
| 31803 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 31804 | DWConv2DMicrokernelTester() |
| 31805 | .input_width(input_width) |
| 31806 | .input_height(4) |
| 31807 | .kernel_height(5) |
| 31808 | .kernel_width(5) |
| 31809 | .subsampling(2) |
| 31810 | .padding_left(2) |
| 31811 | .padding_right(2) |
| 31812 | .padding_top(2) |
| 31813 | .padding_bottom(2) |
| 31814 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 31815 | } |
| 31816 | } |
| 31817 | |
| 31818 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_eq_2) { |
| 31819 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 31820 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31821 | DWConv2DMicrokernelTester() |
| 31822 | .input_width(input_width) |
| 31823 | .input_height(input_height) |
| 31824 | .kernel_height(5) |
| 31825 | .kernel_width(5) |
| 31826 | .subsampling(2) |
| 31827 | .padding_left(2) |
| 31828 | .padding_right(2) |
| 31829 | .padding_top(2) |
| 31830 | .padding_bottom(2) |
| 31831 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 31832 | } |
| 31833 | } |
| 31834 | } |
| 31835 | |
| 31836 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_div_2) { |
| 31837 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 31838 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31839 | DWConv2DMicrokernelTester() |
| 31840 | .input_width(input_width) |
| 31841 | .input_height(input_height) |
| 31842 | .kernel_height(5) |
| 31843 | .kernel_width(5) |
| 31844 | .subsampling(2) |
| 31845 | .padding_left(2) |
| 31846 | .padding_right(2) |
| 31847 | .padding_top(2) |
| 31848 | .padding_bottom(2) |
| 31849 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 31850 | } |
| 31851 | } |
| 31852 | } |
| 31853 | |
| 31854 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_lt_2) { |
| 31855 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 31856 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31857 | DWConv2DMicrokernelTester() |
| 31858 | .input_width(input_width) |
| 31859 | .input_height(input_height) |
| 31860 | .kernel_height(5) |
| 31861 | .kernel_width(5) |
| 31862 | .subsampling(2) |
| 31863 | .padding_left(2) |
| 31864 | .padding_right(2) |
| 31865 | .padding_top(2) |
| 31866 | .padding_bottom(2) |
| 31867 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 31868 | } |
| 31869 | } |
| 31870 | } |
| 31871 | |
| 31872 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, output_height_gt_2) { |
| 31873 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 31874 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31875 | DWConv2DMicrokernelTester() |
| 31876 | .input_width(input_width) |
| 31877 | .input_height(input_height) |
| 31878 | .kernel_height(5) |
| 31879 | .kernel_width(5) |
| 31880 | .subsampling(2) |
| 31881 | .padding_left(2) |
| 31882 | .padding_right(2) |
| 31883 | .padding_top(2) |
| 31884 | .padding_bottom(2) |
| 31885 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 31886 | } |
| 31887 | } |
| 31888 | } |
| 31889 | |
| 31890 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC2, padding_top_eq_1) { |
| 31891 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 31892 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31893 | DWConv2DMicrokernelTester() |
| 31894 | .input_width(input_width) |
| 31895 | .input_height(input_height) |
| 31896 | .kernel_height(5) |
| 31897 | .kernel_width(5) |
| 31898 | .subsampling(2) |
| 31899 | .padding_left(2) |
| 31900 | .padding_right(2) |
| 31901 | .padding_top(1) |
| 31902 | .padding_bottom(2) |
| 31903 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc2); |
| 31904 | } |
| 31905 | } |
| 31906 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31907 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31908 | |
| 31909 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 31910 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 31911 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_width_eq_4) { |
| 31912 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 31913 | DWConv2DMicrokernelTester() |
| 31914 | .input_width(input_width) |
| 31915 | .input_height(4) |
| 31916 | .kernel_height(5) |
| 31917 | .kernel_width(5) |
| 31918 | .subsampling(2) |
| 31919 | .padding_left(2) |
| 31920 | .padding_right(2) |
| 31921 | .padding_top(2) |
| 31922 | .padding_bottom(2) |
| 31923 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 31924 | } |
| 31925 | } |
| 31926 | |
| 31927 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_width_div_4) { |
| 31928 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 31929 | DWConv2DMicrokernelTester() |
| 31930 | .input_width(input_width) |
| 31931 | .input_height(4) |
| 31932 | .kernel_height(5) |
| 31933 | .kernel_width(5) |
| 31934 | .subsampling(2) |
| 31935 | .padding_left(2) |
| 31936 | .padding_right(2) |
| 31937 | .padding_top(2) |
| 31938 | .padding_bottom(2) |
| 31939 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 31940 | } |
| 31941 | } |
| 31942 | |
| 31943 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_width_lt_4) { |
| 31944 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 31945 | DWConv2DMicrokernelTester() |
| 31946 | .input_width(8) |
| 31947 | .input_height(4) |
| 31948 | .kernel_height(5) |
| 31949 | .kernel_width(5) |
| 31950 | .subsampling(2) |
| 31951 | .padding_left(2) |
| 31952 | .padding_right(2) |
| 31953 | .padding_top(2) |
| 31954 | .padding_bottom(2) |
| 31955 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 31956 | } |
| 31957 | } |
| 31958 | |
| 31959 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_width_gt_4) { |
| 31960 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 31961 | DWConv2DMicrokernelTester() |
| 31962 | .input_width(input_width) |
| 31963 | .input_height(4) |
| 31964 | .kernel_height(5) |
| 31965 | .kernel_width(5) |
| 31966 | .subsampling(2) |
| 31967 | .padding_left(2) |
| 31968 | .padding_right(2) |
| 31969 | .padding_top(2) |
| 31970 | .padding_bottom(2) |
| 31971 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 31972 | } |
| 31973 | } |
| 31974 | |
| 31975 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_height_eq_2) { |
| 31976 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 31977 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31978 | DWConv2DMicrokernelTester() |
| 31979 | .input_width(input_width) |
| 31980 | .input_height(input_height) |
| 31981 | .kernel_height(5) |
| 31982 | .kernel_width(5) |
| 31983 | .subsampling(2) |
| 31984 | .padding_left(2) |
| 31985 | .padding_right(2) |
| 31986 | .padding_top(2) |
| 31987 | .padding_bottom(2) |
| 31988 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 31989 | } |
| 31990 | } |
| 31991 | } |
| 31992 | |
| 31993 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_height_div_2) { |
| 31994 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 31995 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 31996 | DWConv2DMicrokernelTester() |
| 31997 | .input_width(input_width) |
| 31998 | .input_height(input_height) |
| 31999 | .kernel_height(5) |
| 32000 | .kernel_width(5) |
| 32001 | .subsampling(2) |
| 32002 | .padding_left(2) |
| 32003 | .padding_right(2) |
| 32004 | .padding_top(2) |
| 32005 | .padding_bottom(2) |
| 32006 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 32007 | } |
| 32008 | } |
| 32009 | } |
| 32010 | |
| 32011 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_height_lt_2) { |
| 32012 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 32013 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32014 | DWConv2DMicrokernelTester() |
| 32015 | .input_width(input_width) |
| 32016 | .input_height(input_height) |
| 32017 | .kernel_height(5) |
| 32018 | .kernel_width(5) |
| 32019 | .subsampling(2) |
| 32020 | .padding_left(2) |
| 32021 | .padding_right(2) |
| 32022 | .padding_top(2) |
| 32023 | .padding_bottom(2) |
| 32024 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 32025 | } |
| 32026 | } |
| 32027 | } |
| 32028 | |
| 32029 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, output_height_gt_2) { |
| 32030 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 32031 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32032 | DWConv2DMicrokernelTester() |
| 32033 | .input_width(input_width) |
| 32034 | .input_height(input_height) |
| 32035 | .kernel_height(5) |
| 32036 | .kernel_width(5) |
| 32037 | .subsampling(2) |
| 32038 | .padding_left(2) |
| 32039 | .padding_right(2) |
| 32040 | .padding_top(2) |
| 32041 | .padding_bottom(2) |
| 32042 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 32043 | } |
| 32044 | } |
| 32045 | } |
| 32046 | |
| 32047 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_2X4_ACC3, padding_top_eq_1) { |
| 32048 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 32049 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32050 | DWConv2DMicrokernelTester() |
| 32051 | .input_width(input_width) |
| 32052 | .input_height(input_height) |
| 32053 | .kernel_height(5) |
| 32054 | .kernel_width(5) |
| 32055 | .subsampling(2) |
| 32056 | .padding_left(2) |
| 32057 | .padding_right(2) |
| 32058 | .padding_top(1) |
| 32059 | .padding_bottom(2) |
| 32060 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc3); |
| 32061 | } |
| 32062 | } |
| 32063 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32064 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32065 | |
| 32066 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32067 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32068 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_width_eq_4) { |
| 32069 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 32070 | DWConv2DMicrokernelTester() |
| 32071 | .input_width(input_width) |
| 32072 | .input_height(6) |
| 32073 | .kernel_height(5) |
| 32074 | .kernel_width(5) |
| 32075 | .subsampling(2) |
| 32076 | .padding_left(2) |
| 32077 | .padding_right(2) |
| 32078 | .padding_top(2) |
| 32079 | .padding_bottom(2) |
| 32080 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 32081 | } |
| 32082 | } |
| 32083 | |
| 32084 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_width_div_4) { |
| 32085 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 32086 | DWConv2DMicrokernelTester() |
| 32087 | .input_width(input_width) |
| 32088 | .input_height(6) |
| 32089 | .kernel_height(5) |
| 32090 | .kernel_width(5) |
| 32091 | .subsampling(2) |
| 32092 | .padding_left(2) |
| 32093 | .padding_right(2) |
| 32094 | .padding_top(2) |
| 32095 | .padding_bottom(2) |
| 32096 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 32097 | } |
| 32098 | } |
| 32099 | |
| 32100 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_width_lt_4) { |
| 32101 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 32102 | DWConv2DMicrokernelTester() |
| 32103 | .input_width(8) |
| 32104 | .input_height(6) |
| 32105 | .kernel_height(5) |
| 32106 | .kernel_width(5) |
| 32107 | .subsampling(2) |
| 32108 | .padding_left(2) |
| 32109 | .padding_right(2) |
| 32110 | .padding_top(2) |
| 32111 | .padding_bottom(2) |
| 32112 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 32113 | } |
| 32114 | } |
| 32115 | |
| 32116 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_width_gt_4) { |
| 32117 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 32118 | DWConv2DMicrokernelTester() |
| 32119 | .input_width(input_width) |
| 32120 | .input_height(6) |
| 32121 | .kernel_height(5) |
| 32122 | .kernel_width(5) |
| 32123 | .subsampling(2) |
| 32124 | .padding_left(2) |
| 32125 | .padding_right(2) |
| 32126 | .padding_top(2) |
| 32127 | .padding_bottom(2) |
| 32128 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 32129 | } |
| 32130 | } |
| 32131 | |
| 32132 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_height_eq_3) { |
| 32133 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 32134 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32135 | DWConv2DMicrokernelTester() |
| 32136 | .input_width(input_width) |
| 32137 | .input_height(input_height) |
| 32138 | .kernel_height(5) |
| 32139 | .kernel_width(5) |
| 32140 | .subsampling(2) |
| 32141 | .padding_left(2) |
| 32142 | .padding_right(2) |
| 32143 | .padding_top(2) |
| 32144 | .padding_bottom(2) |
| 32145 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 32146 | } |
| 32147 | } |
| 32148 | } |
| 32149 | |
| 32150 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_height_div_3) { |
| 32151 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 32152 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32153 | DWConv2DMicrokernelTester() |
| 32154 | .input_width(input_width) |
| 32155 | .input_height(input_height) |
| 32156 | .kernel_height(5) |
| 32157 | .kernel_width(5) |
| 32158 | .subsampling(2) |
| 32159 | .padding_left(2) |
| 32160 | .padding_right(2) |
| 32161 | .padding_top(2) |
| 32162 | .padding_bottom(2) |
| 32163 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 32164 | } |
| 32165 | } |
| 32166 | } |
| 32167 | |
| 32168 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_height_lt_3) { |
| 32169 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 32170 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32171 | DWConv2DMicrokernelTester() |
| 32172 | .input_width(input_width) |
| 32173 | .input_height(input_height) |
| 32174 | .kernel_height(5) |
| 32175 | .kernel_width(5) |
| 32176 | .subsampling(2) |
| 32177 | .padding_left(2) |
| 32178 | .padding_right(2) |
| 32179 | .padding_top(2) |
| 32180 | .padding_bottom(2) |
| 32181 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 32182 | } |
| 32183 | } |
| 32184 | } |
| 32185 | |
| 32186 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, output_height_gt_3) { |
| 32187 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 32188 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32189 | DWConv2DMicrokernelTester() |
| 32190 | .input_width(input_width) |
| 32191 | .input_height(input_height) |
| 32192 | .kernel_height(5) |
| 32193 | .kernel_width(5) |
| 32194 | .subsampling(2) |
| 32195 | .padding_left(2) |
| 32196 | .padding_right(2) |
| 32197 | .padding_top(2) |
| 32198 | .padding_bottom(2) |
| 32199 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 32200 | } |
| 32201 | } |
| 32202 | } |
| 32203 | |
| 32204 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_LOADSPLAT_3X4_ACC2, padding_top_eq_1) { |
| 32205 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 32206 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32207 | DWConv2DMicrokernelTester() |
| 32208 | .input_width(input_width) |
| 32209 | .input_height(input_height) |
| 32210 | .kernel_height(5) |
| 32211 | .kernel_width(5) |
| 32212 | .subsampling(2) |
| 32213 | .padding_left(2) |
| 32214 | .padding_right(2) |
| 32215 | .padding_top(1) |
| 32216 | .padding_bottom(2) |
| 32217 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4_acc2); |
| 32218 | } |
| 32219 | } |
| 32220 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32221 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32222 | |
| 32223 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32224 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32225 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4, output_width_eq_4) { |
| 32226 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 32227 | DWConv2DMicrokernelTester() |
| 32228 | .input_width(input_width) |
| 32229 | .input_height(2) |
| 32230 | .kernel_height(5) |
| 32231 | .kernel_width(5) |
| 32232 | .subsampling(2) |
| 32233 | .padding_left(2) |
| 32234 | .padding_right(2) |
| 32235 | .padding_top(2) |
| 32236 | .padding_bottom(2) |
| 32237 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4); |
| 32238 | } |
| 32239 | } |
| 32240 | |
| 32241 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4, output_width_div_4) { |
| 32242 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 32243 | DWConv2DMicrokernelTester() |
| 32244 | .input_width(input_width) |
| 32245 | .input_height(2) |
| 32246 | .kernel_height(5) |
| 32247 | .kernel_width(5) |
| 32248 | .subsampling(2) |
| 32249 | .padding_left(2) |
| 32250 | .padding_right(2) |
| 32251 | .padding_top(2) |
| 32252 | .padding_bottom(2) |
| 32253 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4); |
| 32254 | } |
| 32255 | } |
| 32256 | |
| 32257 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4, output_width_lt_4) { |
| 32258 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 32259 | DWConv2DMicrokernelTester() |
| 32260 | .input_width(8) |
| 32261 | .input_height(2) |
| 32262 | .kernel_height(5) |
| 32263 | .kernel_width(5) |
| 32264 | .subsampling(2) |
| 32265 | .padding_left(2) |
| 32266 | .padding_right(2) |
| 32267 | .padding_top(2) |
| 32268 | .padding_bottom(2) |
| 32269 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4); |
| 32270 | } |
| 32271 | } |
| 32272 | |
| 32273 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4, output_width_gt_4) { |
| 32274 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 32275 | DWConv2DMicrokernelTester() |
| 32276 | .input_width(input_width) |
| 32277 | .input_height(2) |
| 32278 | .kernel_height(5) |
| 32279 | .kernel_width(5) |
| 32280 | .subsampling(2) |
| 32281 | .padding_left(2) |
| 32282 | .padding_right(2) |
| 32283 | .padding_top(2) |
| 32284 | .padding_bottom(2) |
| 32285 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4); |
| 32286 | } |
| 32287 | } |
| 32288 | |
| 32289 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4, output_height_eq_1) { |
| 32290 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 32291 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32292 | DWConv2DMicrokernelTester() |
| 32293 | .input_width(input_width) |
| 32294 | .input_height(input_height) |
| 32295 | .kernel_height(5) |
| 32296 | .kernel_width(5) |
| 32297 | .subsampling(2) |
| 32298 | .padding_left(2) |
| 32299 | .padding_right(2) |
| 32300 | .padding_top(2) |
| 32301 | .padding_bottom(2) |
| 32302 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4); |
| 32303 | } |
| 32304 | } |
| 32305 | } |
| 32306 | |
| 32307 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4, output_height_gt_1) { |
| 32308 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 32309 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32310 | DWConv2DMicrokernelTester() |
| 32311 | .input_width(input_width) |
| 32312 | .input_height(input_height) |
| 32313 | .kernel_height(5) |
| 32314 | .kernel_width(5) |
| 32315 | .subsampling(2) |
| 32316 | .padding_left(2) |
| 32317 | .padding_right(2) |
| 32318 | .padding_top(2) |
| 32319 | .padding_bottom(2) |
| 32320 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4); |
| 32321 | } |
| 32322 | } |
| 32323 | } |
| 32324 | |
| 32325 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4, padding_top_eq_1) { |
| 32326 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 32327 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32328 | DWConv2DMicrokernelTester() |
| 32329 | .input_width(input_width) |
| 32330 | .input_height(input_height) |
| 32331 | .kernel_height(5) |
| 32332 | .kernel_width(5) |
| 32333 | .subsampling(2) |
| 32334 | .padding_left(2) |
| 32335 | .padding_right(2) |
| 32336 | .padding_top(1) |
| 32337 | .padding_bottom(2) |
| 32338 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4); |
| 32339 | } |
| 32340 | } |
| 32341 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32342 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32343 | |
| 32344 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32345 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32346 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4, output_width_eq_4) { |
| 32347 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 32348 | DWConv2DMicrokernelTester() |
| 32349 | .input_width(input_width) |
| 32350 | .input_height(4) |
| 32351 | .kernel_height(5) |
| 32352 | .kernel_width(5) |
| 32353 | .subsampling(2) |
| 32354 | .padding_left(2) |
| 32355 | .padding_right(2) |
| 32356 | .padding_top(2) |
| 32357 | .padding_bottom(2) |
| 32358 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4); |
| 32359 | } |
| 32360 | } |
| 32361 | |
| 32362 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4, output_width_div_4) { |
| 32363 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 32364 | DWConv2DMicrokernelTester() |
| 32365 | .input_width(input_width) |
| 32366 | .input_height(4) |
| 32367 | .kernel_height(5) |
| 32368 | .kernel_width(5) |
| 32369 | .subsampling(2) |
| 32370 | .padding_left(2) |
| 32371 | .padding_right(2) |
| 32372 | .padding_top(2) |
| 32373 | .padding_bottom(2) |
| 32374 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4); |
| 32375 | } |
| 32376 | } |
| 32377 | |
| 32378 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4, output_width_lt_4) { |
| 32379 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 32380 | DWConv2DMicrokernelTester() |
| 32381 | .input_width(8) |
| 32382 | .input_height(4) |
| 32383 | .kernel_height(5) |
| 32384 | .kernel_width(5) |
| 32385 | .subsampling(2) |
| 32386 | .padding_left(2) |
| 32387 | .padding_right(2) |
| 32388 | .padding_top(2) |
| 32389 | .padding_bottom(2) |
| 32390 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4); |
| 32391 | } |
| 32392 | } |
| 32393 | |
| 32394 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4, output_width_gt_4) { |
| 32395 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 32396 | DWConv2DMicrokernelTester() |
| 32397 | .input_width(input_width) |
| 32398 | .input_height(4) |
| 32399 | .kernel_height(5) |
| 32400 | .kernel_width(5) |
| 32401 | .subsampling(2) |
| 32402 | .padding_left(2) |
| 32403 | .padding_right(2) |
| 32404 | .padding_top(2) |
| 32405 | .padding_bottom(2) |
| 32406 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4); |
| 32407 | } |
| 32408 | } |
| 32409 | |
| 32410 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4, output_height_eq_2) { |
| 32411 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 32412 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32413 | DWConv2DMicrokernelTester() |
| 32414 | .input_width(input_width) |
| 32415 | .input_height(input_height) |
| 32416 | .kernel_height(5) |
| 32417 | .kernel_width(5) |
| 32418 | .subsampling(2) |
| 32419 | .padding_left(2) |
| 32420 | .padding_right(2) |
| 32421 | .padding_top(2) |
| 32422 | .padding_bottom(2) |
| 32423 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4); |
| 32424 | } |
| 32425 | } |
| 32426 | } |
| 32427 | |
| 32428 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4, output_height_div_2) { |
| 32429 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 32430 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32431 | DWConv2DMicrokernelTester() |
| 32432 | .input_width(input_width) |
| 32433 | .input_height(input_height) |
| 32434 | .kernel_height(5) |
| 32435 | .kernel_width(5) |
| 32436 | .subsampling(2) |
| 32437 | .padding_left(2) |
| 32438 | .padding_right(2) |
| 32439 | .padding_top(2) |
| 32440 | .padding_bottom(2) |
| 32441 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4); |
| 32442 | } |
| 32443 | } |
| 32444 | } |
| 32445 | |
| 32446 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4, output_height_lt_2) { |
| 32447 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 32448 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32449 | DWConv2DMicrokernelTester() |
| 32450 | .input_width(input_width) |
| 32451 | .input_height(input_height) |
| 32452 | .kernel_height(5) |
| 32453 | .kernel_width(5) |
| 32454 | .subsampling(2) |
| 32455 | .padding_left(2) |
| 32456 | .padding_right(2) |
| 32457 | .padding_top(2) |
| 32458 | .padding_bottom(2) |
| 32459 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4); |
| 32460 | } |
| 32461 | } |
| 32462 | } |
| 32463 | |
| 32464 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4, output_height_gt_2) { |
| 32465 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 32466 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32467 | DWConv2DMicrokernelTester() |
| 32468 | .input_width(input_width) |
| 32469 | .input_height(input_height) |
| 32470 | .kernel_height(5) |
| 32471 | .kernel_width(5) |
| 32472 | .subsampling(2) |
| 32473 | .padding_left(2) |
| 32474 | .padding_right(2) |
| 32475 | .padding_top(2) |
| 32476 | .padding_bottom(2) |
| 32477 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4); |
| 32478 | } |
| 32479 | } |
| 32480 | } |
| 32481 | |
| 32482 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4, padding_top_eq_1) { |
| 32483 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 32484 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32485 | DWConv2DMicrokernelTester() |
| 32486 | .input_width(input_width) |
| 32487 | .input_height(input_height) |
| 32488 | .kernel_height(5) |
| 32489 | .kernel_width(5) |
| 32490 | .subsampling(2) |
| 32491 | .padding_left(2) |
| 32492 | .padding_right(2) |
| 32493 | .padding_top(1) |
| 32494 | .padding_bottom(2) |
| 32495 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4); |
| 32496 | } |
| 32497 | } |
| 32498 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32499 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32500 | |
| 32501 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32502 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32503 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4, output_width_eq_4) { |
| 32504 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 32505 | DWConv2DMicrokernelTester() |
| 32506 | .input_width(input_width) |
| 32507 | .input_height(6) |
| 32508 | .kernel_height(5) |
| 32509 | .kernel_width(5) |
| 32510 | .subsampling(2) |
| 32511 | .padding_left(2) |
| 32512 | .padding_right(2) |
| 32513 | .padding_top(2) |
| 32514 | .padding_bottom(2) |
| 32515 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4); |
| 32516 | } |
| 32517 | } |
| 32518 | |
| 32519 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4, output_width_div_4) { |
| 32520 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 32521 | DWConv2DMicrokernelTester() |
| 32522 | .input_width(input_width) |
| 32523 | .input_height(6) |
| 32524 | .kernel_height(5) |
| 32525 | .kernel_width(5) |
| 32526 | .subsampling(2) |
| 32527 | .padding_left(2) |
| 32528 | .padding_right(2) |
| 32529 | .padding_top(2) |
| 32530 | .padding_bottom(2) |
| 32531 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4); |
| 32532 | } |
| 32533 | } |
| 32534 | |
| 32535 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4, output_width_lt_4) { |
| 32536 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 32537 | DWConv2DMicrokernelTester() |
| 32538 | .input_width(8) |
| 32539 | .input_height(6) |
| 32540 | .kernel_height(5) |
| 32541 | .kernel_width(5) |
| 32542 | .subsampling(2) |
| 32543 | .padding_left(2) |
| 32544 | .padding_right(2) |
| 32545 | .padding_top(2) |
| 32546 | .padding_bottom(2) |
| 32547 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4); |
| 32548 | } |
| 32549 | } |
| 32550 | |
| 32551 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4, output_width_gt_4) { |
| 32552 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 32553 | DWConv2DMicrokernelTester() |
| 32554 | .input_width(input_width) |
| 32555 | .input_height(6) |
| 32556 | .kernel_height(5) |
| 32557 | .kernel_width(5) |
| 32558 | .subsampling(2) |
| 32559 | .padding_left(2) |
| 32560 | .padding_right(2) |
| 32561 | .padding_top(2) |
| 32562 | .padding_bottom(2) |
| 32563 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4); |
| 32564 | } |
| 32565 | } |
| 32566 | |
| 32567 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4, output_height_eq_3) { |
| 32568 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 32569 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32570 | DWConv2DMicrokernelTester() |
| 32571 | .input_width(input_width) |
| 32572 | .input_height(input_height) |
| 32573 | .kernel_height(5) |
| 32574 | .kernel_width(5) |
| 32575 | .subsampling(2) |
| 32576 | .padding_left(2) |
| 32577 | .padding_right(2) |
| 32578 | .padding_top(2) |
| 32579 | .padding_bottom(2) |
| 32580 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4); |
| 32581 | } |
| 32582 | } |
| 32583 | } |
| 32584 | |
| 32585 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4, output_height_div_3) { |
| 32586 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 32587 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32588 | DWConv2DMicrokernelTester() |
| 32589 | .input_width(input_width) |
| 32590 | .input_height(input_height) |
| 32591 | .kernel_height(5) |
| 32592 | .kernel_width(5) |
| 32593 | .subsampling(2) |
| 32594 | .padding_left(2) |
| 32595 | .padding_right(2) |
| 32596 | .padding_top(2) |
| 32597 | .padding_bottom(2) |
| 32598 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4); |
| 32599 | } |
| 32600 | } |
| 32601 | } |
| 32602 | |
| 32603 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4, output_height_lt_3) { |
| 32604 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 32605 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32606 | DWConv2DMicrokernelTester() |
| 32607 | .input_width(input_width) |
| 32608 | .input_height(input_height) |
| 32609 | .kernel_height(5) |
| 32610 | .kernel_width(5) |
| 32611 | .subsampling(2) |
| 32612 | .padding_left(2) |
| 32613 | .padding_right(2) |
| 32614 | .padding_top(2) |
| 32615 | .padding_bottom(2) |
| 32616 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4); |
| 32617 | } |
| 32618 | } |
| 32619 | } |
| 32620 | |
| 32621 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4, output_height_gt_3) { |
| 32622 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 32623 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32624 | DWConv2DMicrokernelTester() |
| 32625 | .input_width(input_width) |
| 32626 | .input_height(input_height) |
| 32627 | .kernel_height(5) |
| 32628 | .kernel_width(5) |
| 32629 | .subsampling(2) |
| 32630 | .padding_left(2) |
| 32631 | .padding_right(2) |
| 32632 | .padding_top(2) |
| 32633 | .padding_bottom(2) |
| 32634 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4); |
| 32635 | } |
| 32636 | } |
| 32637 | } |
| 32638 | |
| 32639 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4, padding_top_eq_1) { |
| 32640 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 32641 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32642 | DWConv2DMicrokernelTester() |
| 32643 | .input_width(input_width) |
| 32644 | .input_height(input_height) |
| 32645 | .kernel_height(5) |
| 32646 | .kernel_width(5) |
| 32647 | .subsampling(2) |
| 32648 | .padding_left(2) |
| 32649 | .padding_right(2) |
| 32650 | .padding_top(1) |
| 32651 | .padding_bottom(2) |
| 32652 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4); |
| 32653 | } |
| 32654 | } |
| 32655 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32656 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32657 | |
| 32658 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32659 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32660 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_eq_4) { |
| 32661 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 32662 | DWConv2DMicrokernelTester() |
| 32663 | .input_width(input_width) |
| 32664 | .input_height(2) |
| 32665 | .kernel_height(5) |
| 32666 | .kernel_width(5) |
| 32667 | .subsampling(2) |
| 32668 | .padding_left(2) |
| 32669 | .padding_right(2) |
| 32670 | .padding_top(2) |
| 32671 | .padding_bottom(2) |
| 32672 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc2); |
| 32673 | } |
| 32674 | } |
| 32675 | |
| 32676 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_div_4) { |
| 32677 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 32678 | DWConv2DMicrokernelTester() |
| 32679 | .input_width(input_width) |
| 32680 | .input_height(2) |
| 32681 | .kernel_height(5) |
| 32682 | .kernel_width(5) |
| 32683 | .subsampling(2) |
| 32684 | .padding_left(2) |
| 32685 | .padding_right(2) |
| 32686 | .padding_top(2) |
| 32687 | .padding_bottom(2) |
| 32688 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc2); |
| 32689 | } |
| 32690 | } |
| 32691 | |
| 32692 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_lt_4) { |
| 32693 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 32694 | DWConv2DMicrokernelTester() |
| 32695 | .input_width(8) |
| 32696 | .input_height(2) |
| 32697 | .kernel_height(5) |
| 32698 | .kernel_width(5) |
| 32699 | .subsampling(2) |
| 32700 | .padding_left(2) |
| 32701 | .padding_right(2) |
| 32702 | .padding_top(2) |
| 32703 | .padding_bottom(2) |
| 32704 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc2); |
| 32705 | } |
| 32706 | } |
| 32707 | |
| 32708 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_width_gt_4) { |
| 32709 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 32710 | DWConv2DMicrokernelTester() |
| 32711 | .input_width(input_width) |
| 32712 | .input_height(2) |
| 32713 | .kernel_height(5) |
| 32714 | .kernel_width(5) |
| 32715 | .subsampling(2) |
| 32716 | .padding_left(2) |
| 32717 | .padding_right(2) |
| 32718 | .padding_top(2) |
| 32719 | .padding_bottom(2) |
| 32720 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc2); |
| 32721 | } |
| 32722 | } |
| 32723 | |
| 32724 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_height_eq_1) { |
| 32725 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 32726 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32727 | DWConv2DMicrokernelTester() |
| 32728 | .input_width(input_width) |
| 32729 | .input_height(input_height) |
| 32730 | .kernel_height(5) |
| 32731 | .kernel_width(5) |
| 32732 | .subsampling(2) |
| 32733 | .padding_left(2) |
| 32734 | .padding_right(2) |
| 32735 | .padding_top(2) |
| 32736 | .padding_bottom(2) |
| 32737 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc2); |
| 32738 | } |
| 32739 | } |
| 32740 | } |
| 32741 | |
| 32742 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, output_height_gt_1) { |
| 32743 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 32744 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32745 | DWConv2DMicrokernelTester() |
| 32746 | .input_width(input_width) |
| 32747 | .input_height(input_height) |
| 32748 | .kernel_height(5) |
| 32749 | .kernel_width(5) |
| 32750 | .subsampling(2) |
| 32751 | .padding_left(2) |
| 32752 | .padding_right(2) |
| 32753 | .padding_top(2) |
| 32754 | .padding_bottom(2) |
| 32755 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc2); |
| 32756 | } |
| 32757 | } |
| 32758 | } |
| 32759 | |
| 32760 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC2, padding_top_eq_1) { |
| 32761 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 32762 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32763 | DWConv2DMicrokernelTester() |
| 32764 | .input_width(input_width) |
| 32765 | .input_height(input_height) |
| 32766 | .kernel_height(5) |
| 32767 | .kernel_width(5) |
| 32768 | .subsampling(2) |
| 32769 | .padding_left(2) |
| 32770 | .padding_right(2) |
| 32771 | .padding_top(1) |
| 32772 | .padding_bottom(2) |
| 32773 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc2); |
| 32774 | } |
| 32775 | } |
| 32776 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32777 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32778 | |
| 32779 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32780 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32781 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_eq_4) { |
| 32782 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 32783 | DWConv2DMicrokernelTester() |
| 32784 | .input_width(input_width) |
| 32785 | .input_height(2) |
| 32786 | .kernel_height(5) |
| 32787 | .kernel_width(5) |
| 32788 | .subsampling(2) |
| 32789 | .padding_left(2) |
| 32790 | .padding_right(2) |
| 32791 | .padding_top(2) |
| 32792 | .padding_bottom(2) |
| 32793 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc3); |
| 32794 | } |
| 32795 | } |
| 32796 | |
| 32797 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_div_4) { |
| 32798 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 32799 | DWConv2DMicrokernelTester() |
| 32800 | .input_width(input_width) |
| 32801 | .input_height(2) |
| 32802 | .kernel_height(5) |
| 32803 | .kernel_width(5) |
| 32804 | .subsampling(2) |
| 32805 | .padding_left(2) |
| 32806 | .padding_right(2) |
| 32807 | .padding_top(2) |
| 32808 | .padding_bottom(2) |
| 32809 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc3); |
| 32810 | } |
| 32811 | } |
| 32812 | |
| 32813 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_lt_4) { |
| 32814 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 32815 | DWConv2DMicrokernelTester() |
| 32816 | .input_width(8) |
| 32817 | .input_height(2) |
| 32818 | .kernel_height(5) |
| 32819 | .kernel_width(5) |
| 32820 | .subsampling(2) |
| 32821 | .padding_left(2) |
| 32822 | .padding_right(2) |
| 32823 | .padding_top(2) |
| 32824 | .padding_bottom(2) |
| 32825 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc3); |
| 32826 | } |
| 32827 | } |
| 32828 | |
| 32829 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_width_gt_4) { |
| 32830 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 32831 | DWConv2DMicrokernelTester() |
| 32832 | .input_width(input_width) |
| 32833 | .input_height(2) |
| 32834 | .kernel_height(5) |
| 32835 | .kernel_width(5) |
| 32836 | .subsampling(2) |
| 32837 | .padding_left(2) |
| 32838 | .padding_right(2) |
| 32839 | .padding_top(2) |
| 32840 | .padding_bottom(2) |
| 32841 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc3); |
| 32842 | } |
| 32843 | } |
| 32844 | |
| 32845 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_height_eq_1) { |
| 32846 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 32847 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32848 | DWConv2DMicrokernelTester() |
| 32849 | .input_width(input_width) |
| 32850 | .input_height(input_height) |
| 32851 | .kernel_height(5) |
| 32852 | .kernel_width(5) |
| 32853 | .subsampling(2) |
| 32854 | .padding_left(2) |
| 32855 | .padding_right(2) |
| 32856 | .padding_top(2) |
| 32857 | .padding_bottom(2) |
| 32858 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc3); |
| 32859 | } |
| 32860 | } |
| 32861 | } |
| 32862 | |
| 32863 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, output_height_gt_1) { |
| 32864 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 32865 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32866 | DWConv2DMicrokernelTester() |
| 32867 | .input_width(input_width) |
| 32868 | .input_height(input_height) |
| 32869 | .kernel_height(5) |
| 32870 | .kernel_width(5) |
| 32871 | .subsampling(2) |
| 32872 | .padding_left(2) |
| 32873 | .padding_right(2) |
| 32874 | .padding_top(2) |
| 32875 | .padding_bottom(2) |
| 32876 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc3); |
| 32877 | } |
| 32878 | } |
| 32879 | } |
| 32880 | |
| 32881 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC3, padding_top_eq_1) { |
| 32882 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 32883 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32884 | DWConv2DMicrokernelTester() |
| 32885 | .input_width(input_width) |
| 32886 | .input_height(input_height) |
| 32887 | .kernel_height(5) |
| 32888 | .kernel_width(5) |
| 32889 | .subsampling(2) |
| 32890 | .padding_left(2) |
| 32891 | .padding_right(2) |
| 32892 | .padding_top(1) |
| 32893 | .padding_bottom(2) |
| 32894 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc3); |
| 32895 | } |
| 32896 | } |
| 32897 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32898 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32899 | |
| 32900 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 32901 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 32902 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_eq_4) { |
| 32903 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 32904 | DWConv2DMicrokernelTester() |
| 32905 | .input_width(input_width) |
| 32906 | .input_height(2) |
| 32907 | .kernel_height(5) |
| 32908 | .kernel_width(5) |
| 32909 | .subsampling(2) |
| 32910 | .padding_left(2) |
| 32911 | .padding_right(2) |
| 32912 | .padding_top(2) |
| 32913 | .padding_bottom(2) |
| 32914 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc4); |
| 32915 | } |
| 32916 | } |
| 32917 | |
| 32918 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_div_4) { |
| 32919 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 32920 | DWConv2DMicrokernelTester() |
| 32921 | .input_width(input_width) |
| 32922 | .input_height(2) |
| 32923 | .kernel_height(5) |
| 32924 | .kernel_width(5) |
| 32925 | .subsampling(2) |
| 32926 | .padding_left(2) |
| 32927 | .padding_right(2) |
| 32928 | .padding_top(2) |
| 32929 | .padding_bottom(2) |
| 32930 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc4); |
| 32931 | } |
| 32932 | } |
| 32933 | |
| 32934 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_lt_4) { |
| 32935 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 32936 | DWConv2DMicrokernelTester() |
| 32937 | .input_width(8) |
| 32938 | .input_height(2) |
| 32939 | .kernel_height(5) |
| 32940 | .kernel_width(5) |
| 32941 | .subsampling(2) |
| 32942 | .padding_left(2) |
| 32943 | .padding_right(2) |
| 32944 | .padding_top(2) |
| 32945 | .padding_bottom(2) |
| 32946 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc4); |
| 32947 | } |
| 32948 | } |
| 32949 | |
| 32950 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_width_gt_4) { |
| 32951 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 32952 | DWConv2DMicrokernelTester() |
| 32953 | .input_width(input_width) |
| 32954 | .input_height(2) |
| 32955 | .kernel_height(5) |
| 32956 | .kernel_width(5) |
| 32957 | .subsampling(2) |
| 32958 | .padding_left(2) |
| 32959 | .padding_right(2) |
| 32960 | .padding_top(2) |
| 32961 | .padding_bottom(2) |
| 32962 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc4); |
| 32963 | } |
| 32964 | } |
| 32965 | |
| 32966 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_height_eq_1) { |
| 32967 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 32968 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32969 | DWConv2DMicrokernelTester() |
| 32970 | .input_width(input_width) |
| 32971 | .input_height(input_height) |
| 32972 | .kernel_height(5) |
| 32973 | .kernel_width(5) |
| 32974 | .subsampling(2) |
| 32975 | .padding_left(2) |
| 32976 | .padding_right(2) |
| 32977 | .padding_top(2) |
| 32978 | .padding_bottom(2) |
| 32979 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc4); |
| 32980 | } |
| 32981 | } |
| 32982 | } |
| 32983 | |
| 32984 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, output_height_gt_1) { |
| 32985 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 32986 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 32987 | DWConv2DMicrokernelTester() |
| 32988 | .input_width(input_width) |
| 32989 | .input_height(input_height) |
| 32990 | .kernel_height(5) |
| 32991 | .kernel_width(5) |
| 32992 | .subsampling(2) |
| 32993 | .padding_left(2) |
| 32994 | .padding_right(2) |
| 32995 | .padding_top(2) |
| 32996 | .padding_bottom(2) |
| 32997 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc4); |
| 32998 | } |
| 32999 | } |
| 33000 | } |
| 33001 | |
| 33002 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC4, padding_top_eq_1) { |
| 33003 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 33004 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33005 | DWConv2DMicrokernelTester() |
| 33006 | .input_width(input_width) |
| 33007 | .input_height(input_height) |
| 33008 | .kernel_height(5) |
| 33009 | .kernel_width(5) |
| 33010 | .subsampling(2) |
| 33011 | .padding_left(2) |
| 33012 | .padding_right(2) |
| 33013 | .padding_top(1) |
| 33014 | .padding_bottom(2) |
| 33015 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc4); |
| 33016 | } |
| 33017 | } |
| 33018 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33019 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 33020 | |
| 33021 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33022 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 33023 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC5, output_width_eq_4) { |
| 33024 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 33025 | DWConv2DMicrokernelTester() |
| 33026 | .input_width(input_width) |
| 33027 | .input_height(2) |
| 33028 | .kernel_height(5) |
| 33029 | .kernel_width(5) |
| 33030 | .subsampling(2) |
| 33031 | .padding_left(2) |
| 33032 | .padding_right(2) |
| 33033 | .padding_top(2) |
| 33034 | .padding_bottom(2) |
| 33035 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc5); |
| 33036 | } |
| 33037 | } |
| 33038 | |
| 33039 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC5, output_width_div_4) { |
| 33040 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 33041 | DWConv2DMicrokernelTester() |
| 33042 | .input_width(input_width) |
| 33043 | .input_height(2) |
| 33044 | .kernel_height(5) |
| 33045 | .kernel_width(5) |
| 33046 | .subsampling(2) |
| 33047 | .padding_left(2) |
| 33048 | .padding_right(2) |
| 33049 | .padding_top(2) |
| 33050 | .padding_bottom(2) |
| 33051 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc5); |
| 33052 | } |
| 33053 | } |
| 33054 | |
| 33055 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC5, output_width_lt_4) { |
| 33056 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 33057 | DWConv2DMicrokernelTester() |
| 33058 | .input_width(8) |
| 33059 | .input_height(2) |
| 33060 | .kernel_height(5) |
| 33061 | .kernel_width(5) |
| 33062 | .subsampling(2) |
| 33063 | .padding_left(2) |
| 33064 | .padding_right(2) |
| 33065 | .padding_top(2) |
| 33066 | .padding_bottom(2) |
| 33067 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc5); |
| 33068 | } |
| 33069 | } |
| 33070 | |
| 33071 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC5, output_width_gt_4) { |
| 33072 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 33073 | DWConv2DMicrokernelTester() |
| 33074 | .input_width(input_width) |
| 33075 | .input_height(2) |
| 33076 | .kernel_height(5) |
| 33077 | .kernel_width(5) |
| 33078 | .subsampling(2) |
| 33079 | .padding_left(2) |
| 33080 | .padding_right(2) |
| 33081 | .padding_top(2) |
| 33082 | .padding_bottom(2) |
| 33083 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc5); |
| 33084 | } |
| 33085 | } |
| 33086 | |
| 33087 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC5, output_height_eq_1) { |
| 33088 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 33089 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33090 | DWConv2DMicrokernelTester() |
| 33091 | .input_width(input_width) |
| 33092 | .input_height(input_height) |
| 33093 | .kernel_height(5) |
| 33094 | .kernel_width(5) |
| 33095 | .subsampling(2) |
| 33096 | .padding_left(2) |
| 33097 | .padding_right(2) |
| 33098 | .padding_top(2) |
| 33099 | .padding_bottom(2) |
| 33100 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc5); |
| 33101 | } |
| 33102 | } |
| 33103 | } |
| 33104 | |
| 33105 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC5, output_height_gt_1) { |
| 33106 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 33107 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33108 | DWConv2DMicrokernelTester() |
| 33109 | .input_width(input_width) |
| 33110 | .input_height(input_height) |
| 33111 | .kernel_height(5) |
| 33112 | .kernel_width(5) |
| 33113 | .subsampling(2) |
| 33114 | .padding_left(2) |
| 33115 | .padding_right(2) |
| 33116 | .padding_top(2) |
| 33117 | .padding_bottom(2) |
| 33118 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc5); |
| 33119 | } |
| 33120 | } |
| 33121 | } |
| 33122 | |
| 33123 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_1X4_ACC5, padding_top_eq_1) { |
| 33124 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 33125 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33126 | DWConv2DMicrokernelTester() |
| 33127 | .input_width(input_width) |
| 33128 | .input_height(input_height) |
| 33129 | .kernel_height(5) |
| 33130 | .kernel_width(5) |
| 33131 | .subsampling(2) |
| 33132 | .padding_left(2) |
| 33133 | .padding_right(2) |
| 33134 | .padding_top(1) |
| 33135 | .padding_bottom(2) |
| 33136 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc5); |
| 33137 | } |
| 33138 | } |
| 33139 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33140 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 33141 | |
| 33142 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33143 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 33144 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_eq_4) { |
| 33145 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 33146 | DWConv2DMicrokernelTester() |
| 33147 | .input_width(input_width) |
| 33148 | .input_height(4) |
| 33149 | .kernel_height(5) |
| 33150 | .kernel_width(5) |
| 33151 | .subsampling(2) |
| 33152 | .padding_left(2) |
| 33153 | .padding_right(2) |
| 33154 | .padding_top(2) |
| 33155 | .padding_bottom(2) |
| 33156 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 33157 | } |
| 33158 | } |
| 33159 | |
| 33160 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_div_4) { |
| 33161 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 33162 | DWConv2DMicrokernelTester() |
| 33163 | .input_width(input_width) |
| 33164 | .input_height(4) |
| 33165 | .kernel_height(5) |
| 33166 | .kernel_width(5) |
| 33167 | .subsampling(2) |
| 33168 | .padding_left(2) |
| 33169 | .padding_right(2) |
| 33170 | .padding_top(2) |
| 33171 | .padding_bottom(2) |
| 33172 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 33173 | } |
| 33174 | } |
| 33175 | |
| 33176 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_lt_4) { |
| 33177 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 33178 | DWConv2DMicrokernelTester() |
| 33179 | .input_width(8) |
| 33180 | .input_height(4) |
| 33181 | .kernel_height(5) |
| 33182 | .kernel_width(5) |
| 33183 | .subsampling(2) |
| 33184 | .padding_left(2) |
| 33185 | .padding_right(2) |
| 33186 | .padding_top(2) |
| 33187 | .padding_bottom(2) |
| 33188 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 33189 | } |
| 33190 | } |
| 33191 | |
| 33192 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_width_gt_4) { |
| 33193 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 33194 | DWConv2DMicrokernelTester() |
| 33195 | .input_width(input_width) |
| 33196 | .input_height(4) |
| 33197 | .kernel_height(5) |
| 33198 | .kernel_width(5) |
| 33199 | .subsampling(2) |
| 33200 | .padding_left(2) |
| 33201 | .padding_right(2) |
| 33202 | .padding_top(2) |
| 33203 | .padding_bottom(2) |
| 33204 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 33205 | } |
| 33206 | } |
| 33207 | |
| 33208 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_eq_2) { |
| 33209 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 33210 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33211 | DWConv2DMicrokernelTester() |
| 33212 | .input_width(input_width) |
| 33213 | .input_height(input_height) |
| 33214 | .kernel_height(5) |
| 33215 | .kernel_width(5) |
| 33216 | .subsampling(2) |
| 33217 | .padding_left(2) |
| 33218 | .padding_right(2) |
| 33219 | .padding_top(2) |
| 33220 | .padding_bottom(2) |
| 33221 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 33222 | } |
| 33223 | } |
| 33224 | } |
| 33225 | |
| 33226 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_div_2) { |
| 33227 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 33228 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33229 | DWConv2DMicrokernelTester() |
| 33230 | .input_width(input_width) |
| 33231 | .input_height(input_height) |
| 33232 | .kernel_height(5) |
| 33233 | .kernel_width(5) |
| 33234 | .subsampling(2) |
| 33235 | .padding_left(2) |
| 33236 | .padding_right(2) |
| 33237 | .padding_top(2) |
| 33238 | .padding_bottom(2) |
| 33239 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 33240 | } |
| 33241 | } |
| 33242 | } |
| 33243 | |
| 33244 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_lt_2) { |
| 33245 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 33246 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33247 | DWConv2DMicrokernelTester() |
| 33248 | .input_width(input_width) |
| 33249 | .input_height(input_height) |
| 33250 | .kernel_height(5) |
| 33251 | .kernel_width(5) |
| 33252 | .subsampling(2) |
| 33253 | .padding_left(2) |
| 33254 | .padding_right(2) |
| 33255 | .padding_top(2) |
| 33256 | .padding_bottom(2) |
| 33257 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 33258 | } |
| 33259 | } |
| 33260 | } |
| 33261 | |
| 33262 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, output_height_gt_2) { |
| 33263 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 33264 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33265 | DWConv2DMicrokernelTester() |
| 33266 | .input_width(input_width) |
| 33267 | .input_height(input_height) |
| 33268 | .kernel_height(5) |
| 33269 | .kernel_width(5) |
| 33270 | .subsampling(2) |
| 33271 | .padding_left(2) |
| 33272 | .padding_right(2) |
| 33273 | .padding_top(2) |
| 33274 | .padding_bottom(2) |
| 33275 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 33276 | } |
| 33277 | } |
| 33278 | } |
| 33279 | |
| 33280 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC2, padding_top_eq_1) { |
| 33281 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 33282 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33283 | DWConv2DMicrokernelTester() |
| 33284 | .input_width(input_width) |
| 33285 | .input_height(input_height) |
| 33286 | .kernel_height(5) |
| 33287 | .kernel_width(5) |
| 33288 | .subsampling(2) |
| 33289 | .padding_left(2) |
| 33290 | .padding_right(2) |
| 33291 | .padding_top(1) |
| 33292 | .padding_bottom(2) |
| 33293 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc2); |
| 33294 | } |
| 33295 | } |
| 33296 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33297 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 33298 | |
| 33299 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33300 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 33301 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_width_eq_4) { |
| 33302 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 33303 | DWConv2DMicrokernelTester() |
| 33304 | .input_width(input_width) |
| 33305 | .input_height(4) |
| 33306 | .kernel_height(5) |
| 33307 | .kernel_width(5) |
| 33308 | .subsampling(2) |
| 33309 | .padding_left(2) |
| 33310 | .padding_right(2) |
| 33311 | .padding_top(2) |
| 33312 | .padding_bottom(2) |
| 33313 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 33314 | } |
| 33315 | } |
| 33316 | |
| 33317 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_width_div_4) { |
| 33318 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 33319 | DWConv2DMicrokernelTester() |
| 33320 | .input_width(input_width) |
| 33321 | .input_height(4) |
| 33322 | .kernel_height(5) |
| 33323 | .kernel_width(5) |
| 33324 | .subsampling(2) |
| 33325 | .padding_left(2) |
| 33326 | .padding_right(2) |
| 33327 | .padding_top(2) |
| 33328 | .padding_bottom(2) |
| 33329 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 33330 | } |
| 33331 | } |
| 33332 | |
| 33333 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_width_lt_4) { |
| 33334 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 33335 | DWConv2DMicrokernelTester() |
| 33336 | .input_width(8) |
| 33337 | .input_height(4) |
| 33338 | .kernel_height(5) |
| 33339 | .kernel_width(5) |
| 33340 | .subsampling(2) |
| 33341 | .padding_left(2) |
| 33342 | .padding_right(2) |
| 33343 | .padding_top(2) |
| 33344 | .padding_bottom(2) |
| 33345 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 33346 | } |
| 33347 | } |
| 33348 | |
| 33349 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_width_gt_4) { |
| 33350 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 33351 | DWConv2DMicrokernelTester() |
| 33352 | .input_width(input_width) |
| 33353 | .input_height(4) |
| 33354 | .kernel_height(5) |
| 33355 | .kernel_width(5) |
| 33356 | .subsampling(2) |
| 33357 | .padding_left(2) |
| 33358 | .padding_right(2) |
| 33359 | .padding_top(2) |
| 33360 | .padding_bottom(2) |
| 33361 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 33362 | } |
| 33363 | } |
| 33364 | |
| 33365 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_height_eq_2) { |
| 33366 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 33367 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33368 | DWConv2DMicrokernelTester() |
| 33369 | .input_width(input_width) |
| 33370 | .input_height(input_height) |
| 33371 | .kernel_height(5) |
| 33372 | .kernel_width(5) |
| 33373 | .subsampling(2) |
| 33374 | .padding_left(2) |
| 33375 | .padding_right(2) |
| 33376 | .padding_top(2) |
| 33377 | .padding_bottom(2) |
| 33378 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 33379 | } |
| 33380 | } |
| 33381 | } |
| 33382 | |
| 33383 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_height_div_2) { |
| 33384 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 33385 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33386 | DWConv2DMicrokernelTester() |
| 33387 | .input_width(input_width) |
| 33388 | .input_height(input_height) |
| 33389 | .kernel_height(5) |
| 33390 | .kernel_width(5) |
| 33391 | .subsampling(2) |
| 33392 | .padding_left(2) |
| 33393 | .padding_right(2) |
| 33394 | .padding_top(2) |
| 33395 | .padding_bottom(2) |
| 33396 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 33397 | } |
| 33398 | } |
| 33399 | } |
| 33400 | |
| 33401 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_height_lt_2) { |
| 33402 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 33403 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33404 | DWConv2DMicrokernelTester() |
| 33405 | .input_width(input_width) |
| 33406 | .input_height(input_height) |
| 33407 | .kernel_height(5) |
| 33408 | .kernel_width(5) |
| 33409 | .subsampling(2) |
| 33410 | .padding_left(2) |
| 33411 | .padding_right(2) |
| 33412 | .padding_top(2) |
| 33413 | .padding_bottom(2) |
| 33414 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 33415 | } |
| 33416 | } |
| 33417 | } |
| 33418 | |
| 33419 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, output_height_gt_2) { |
| 33420 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 33421 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33422 | DWConv2DMicrokernelTester() |
| 33423 | .input_width(input_width) |
| 33424 | .input_height(input_height) |
| 33425 | .kernel_height(5) |
| 33426 | .kernel_width(5) |
| 33427 | .subsampling(2) |
| 33428 | .padding_left(2) |
| 33429 | .padding_right(2) |
| 33430 | .padding_top(2) |
| 33431 | .padding_bottom(2) |
| 33432 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 33433 | } |
| 33434 | } |
| 33435 | } |
| 33436 | |
| 33437 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_2X4_ACC3, padding_top_eq_1) { |
| 33438 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 33439 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33440 | DWConv2DMicrokernelTester() |
| 33441 | .input_width(input_width) |
| 33442 | .input_height(input_height) |
| 33443 | .kernel_height(5) |
| 33444 | .kernel_width(5) |
| 33445 | .subsampling(2) |
| 33446 | .padding_left(2) |
| 33447 | .padding_right(2) |
| 33448 | .padding_top(1) |
| 33449 | .padding_bottom(2) |
| 33450 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc3); |
| 33451 | } |
| 33452 | } |
| 33453 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33454 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 33455 | |
| 33456 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33457 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 33458 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_width_eq_4) { |
| 33459 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 33460 | DWConv2DMicrokernelTester() |
| 33461 | .input_width(input_width) |
| 33462 | .input_height(6) |
| 33463 | .kernel_height(5) |
| 33464 | .kernel_width(5) |
| 33465 | .subsampling(2) |
| 33466 | .padding_left(2) |
| 33467 | .padding_right(2) |
| 33468 | .padding_top(2) |
| 33469 | .padding_bottom(2) |
| 33470 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 33471 | } |
| 33472 | } |
| 33473 | |
| 33474 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_width_div_4) { |
| 33475 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 33476 | DWConv2DMicrokernelTester() |
| 33477 | .input_width(input_width) |
| 33478 | .input_height(6) |
| 33479 | .kernel_height(5) |
| 33480 | .kernel_width(5) |
| 33481 | .subsampling(2) |
| 33482 | .padding_left(2) |
| 33483 | .padding_right(2) |
| 33484 | .padding_top(2) |
| 33485 | .padding_bottom(2) |
| 33486 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 33487 | } |
| 33488 | } |
| 33489 | |
| 33490 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_width_lt_4) { |
| 33491 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 33492 | DWConv2DMicrokernelTester() |
| 33493 | .input_width(8) |
| 33494 | .input_height(6) |
| 33495 | .kernel_height(5) |
| 33496 | .kernel_width(5) |
| 33497 | .subsampling(2) |
| 33498 | .padding_left(2) |
| 33499 | .padding_right(2) |
| 33500 | .padding_top(2) |
| 33501 | .padding_bottom(2) |
| 33502 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 33503 | } |
| 33504 | } |
| 33505 | |
| 33506 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_width_gt_4) { |
| 33507 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 33508 | DWConv2DMicrokernelTester() |
| 33509 | .input_width(input_width) |
| 33510 | .input_height(6) |
| 33511 | .kernel_height(5) |
| 33512 | .kernel_width(5) |
| 33513 | .subsampling(2) |
| 33514 | .padding_left(2) |
| 33515 | .padding_right(2) |
| 33516 | .padding_top(2) |
| 33517 | .padding_bottom(2) |
| 33518 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 33519 | } |
| 33520 | } |
| 33521 | |
| 33522 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_height_eq_3) { |
| 33523 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 33524 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33525 | DWConv2DMicrokernelTester() |
| 33526 | .input_width(input_width) |
| 33527 | .input_height(input_height) |
| 33528 | .kernel_height(5) |
| 33529 | .kernel_width(5) |
| 33530 | .subsampling(2) |
| 33531 | .padding_left(2) |
| 33532 | .padding_right(2) |
| 33533 | .padding_top(2) |
| 33534 | .padding_bottom(2) |
| 33535 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 33536 | } |
| 33537 | } |
| 33538 | } |
| 33539 | |
| 33540 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_height_div_3) { |
| 33541 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 33542 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33543 | DWConv2DMicrokernelTester() |
| 33544 | .input_width(input_width) |
| 33545 | .input_height(input_height) |
| 33546 | .kernel_height(5) |
| 33547 | .kernel_width(5) |
| 33548 | .subsampling(2) |
| 33549 | .padding_left(2) |
| 33550 | .padding_right(2) |
| 33551 | .padding_top(2) |
| 33552 | .padding_bottom(2) |
| 33553 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 33554 | } |
| 33555 | } |
| 33556 | } |
| 33557 | |
| 33558 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_height_lt_3) { |
| 33559 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 33560 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33561 | DWConv2DMicrokernelTester() |
| 33562 | .input_width(input_width) |
| 33563 | .input_height(input_height) |
| 33564 | .kernel_height(5) |
| 33565 | .kernel_width(5) |
| 33566 | .subsampling(2) |
| 33567 | .padding_left(2) |
| 33568 | .padding_right(2) |
| 33569 | .padding_top(2) |
| 33570 | .padding_bottom(2) |
| 33571 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 33572 | } |
| 33573 | } |
| 33574 | } |
| 33575 | |
| 33576 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, output_height_gt_3) { |
| 33577 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 33578 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33579 | DWConv2DMicrokernelTester() |
| 33580 | .input_width(input_width) |
| 33581 | .input_height(input_height) |
| 33582 | .kernel_height(5) |
| 33583 | .kernel_width(5) |
| 33584 | .subsampling(2) |
| 33585 | .padding_left(2) |
| 33586 | .padding_right(2) |
| 33587 | .padding_top(2) |
| 33588 | .padding_bottom(2) |
| 33589 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 33590 | } |
| 33591 | } |
| 33592 | } |
| 33593 | |
| 33594 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_LOADSPLAT_3X4_ACC2, padding_top_eq_1) { |
| 33595 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 33596 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33597 | DWConv2DMicrokernelTester() |
| 33598 | .input_width(input_width) |
| 33599 | .input_height(input_height) |
| 33600 | .kernel_height(5) |
| 33601 | .kernel_width(5) |
| 33602 | .subsampling(2) |
| 33603 | .padding_left(2) |
| 33604 | .padding_right(2) |
| 33605 | .padding_top(1) |
| 33606 | .padding_bottom(2) |
| 33607 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4_acc2); |
| 33608 | } |
| 33609 | } |
| 33610 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33611 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | c6889b3 | 2020-12-21 11:27:22 -0800 | [diff] [blame] | 33612 | |
| 33613 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33614 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33615 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33616 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 33617 | DWConv2DMicrokernelTester() |
| 33618 | .input_width(input_width) |
| 33619 | .input_height(2) |
| 33620 | .kernel_height(5) |
| 33621 | .kernel_width(5) |
| 33622 | .subsampling(2) |
| 33623 | .padding_left(2) |
| 33624 | .padding_right(2) |
| 33625 | .padding_top(2) |
| 33626 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33627 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33628 | } |
| 33629 | } |
| 33630 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33631 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33632 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 33633 | DWConv2DMicrokernelTester() |
| 33634 | .input_width(input_width) |
| 33635 | .input_height(2) |
| 33636 | .kernel_height(5) |
| 33637 | .kernel_width(5) |
| 33638 | .subsampling(2) |
| 33639 | .padding_left(2) |
| 33640 | .padding_right(2) |
| 33641 | .padding_top(2) |
| 33642 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33643 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33644 | } |
| 33645 | } |
| 33646 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33647 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33648 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 33649 | DWConv2DMicrokernelTester() |
| 33650 | .input_width(8) |
| 33651 | .input_height(2) |
| 33652 | .kernel_height(5) |
| 33653 | .kernel_width(5) |
| 33654 | .subsampling(2) |
| 33655 | .padding_left(2) |
| 33656 | .padding_right(2) |
| 33657 | .padding_top(2) |
| 33658 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33659 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33660 | } |
| 33661 | } |
| 33662 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33663 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33664 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 33665 | DWConv2DMicrokernelTester() |
| 33666 | .input_width(input_width) |
| 33667 | .input_height(2) |
| 33668 | .kernel_height(5) |
| 33669 | .kernel_width(5) |
| 33670 | .subsampling(2) |
| 33671 | .padding_left(2) |
| 33672 | .padding_right(2) |
| 33673 | .padding_top(2) |
| 33674 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33675 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33676 | } |
| 33677 | } |
| 33678 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33679 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4, output_height_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33680 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 33681 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33682 | DWConv2DMicrokernelTester() |
| 33683 | .input_width(input_width) |
| 33684 | .input_height(input_height) |
| 33685 | .kernel_height(5) |
| 33686 | .kernel_width(5) |
| 33687 | .subsampling(2) |
| 33688 | .padding_left(2) |
| 33689 | .padding_right(2) |
| 33690 | .padding_top(2) |
| 33691 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33692 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33693 | } |
| 33694 | } |
| 33695 | } |
| 33696 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33697 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4, output_height_gt_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33698 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 33699 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33700 | DWConv2DMicrokernelTester() |
| 33701 | .input_width(input_width) |
| 33702 | .input_height(input_height) |
| 33703 | .kernel_height(5) |
| 33704 | .kernel_width(5) |
| 33705 | .subsampling(2) |
| 33706 | .padding_left(2) |
| 33707 | .padding_right(2) |
| 33708 | .padding_top(2) |
| 33709 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33710 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33711 | } |
| 33712 | } |
| 33713 | } |
| 33714 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33715 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33716 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 33717 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33718 | DWConv2DMicrokernelTester() |
| 33719 | .input_width(input_width) |
| 33720 | .input_height(input_height) |
| 33721 | .kernel_height(5) |
| 33722 | .kernel_width(5) |
| 33723 | .subsampling(2) |
| 33724 | .padding_left(2) |
| 33725 | .padding_right(2) |
| 33726 | .padding_top(1) |
| 33727 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33728 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33729 | } |
| 33730 | } |
| 33731 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33732 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33733 | |
| 33734 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33735 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33736 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33737 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 33738 | DWConv2DMicrokernelTester() |
| 33739 | .input_width(input_width) |
| 33740 | .input_height(4) |
| 33741 | .kernel_height(5) |
| 33742 | .kernel_width(5) |
| 33743 | .subsampling(2) |
| 33744 | .padding_left(2) |
| 33745 | .padding_right(2) |
| 33746 | .padding_top(2) |
| 33747 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33748 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33749 | } |
| 33750 | } |
| 33751 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33752 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33753 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 33754 | DWConv2DMicrokernelTester() |
| 33755 | .input_width(input_width) |
| 33756 | .input_height(4) |
| 33757 | .kernel_height(5) |
| 33758 | .kernel_width(5) |
| 33759 | .subsampling(2) |
| 33760 | .padding_left(2) |
| 33761 | .padding_right(2) |
| 33762 | .padding_top(2) |
| 33763 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33764 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33765 | } |
| 33766 | } |
| 33767 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33768 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33769 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 33770 | DWConv2DMicrokernelTester() |
| 33771 | .input_width(8) |
| 33772 | .input_height(4) |
| 33773 | .kernel_height(5) |
| 33774 | .kernel_width(5) |
| 33775 | .subsampling(2) |
| 33776 | .padding_left(2) |
| 33777 | .padding_right(2) |
| 33778 | .padding_top(2) |
| 33779 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33780 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33781 | } |
| 33782 | } |
| 33783 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33784 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33785 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 33786 | DWConv2DMicrokernelTester() |
| 33787 | .input_width(input_width) |
| 33788 | .input_height(4) |
| 33789 | .kernel_height(5) |
| 33790 | .kernel_width(5) |
| 33791 | .subsampling(2) |
| 33792 | .padding_left(2) |
| 33793 | .padding_right(2) |
| 33794 | .padding_top(2) |
| 33795 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33796 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33797 | } |
| 33798 | } |
| 33799 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33800 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4, output_height_eq_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33801 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 33802 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33803 | DWConv2DMicrokernelTester() |
| 33804 | .input_width(input_width) |
| 33805 | .input_height(input_height) |
| 33806 | .kernel_height(5) |
| 33807 | .kernel_width(5) |
| 33808 | .subsampling(2) |
| 33809 | .padding_left(2) |
| 33810 | .padding_right(2) |
| 33811 | .padding_top(2) |
| 33812 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33813 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33814 | } |
| 33815 | } |
| 33816 | } |
| 33817 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33818 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4, output_height_div_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33819 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 33820 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33821 | DWConv2DMicrokernelTester() |
| 33822 | .input_width(input_width) |
| 33823 | .input_height(input_height) |
| 33824 | .kernel_height(5) |
| 33825 | .kernel_width(5) |
| 33826 | .subsampling(2) |
| 33827 | .padding_left(2) |
| 33828 | .padding_right(2) |
| 33829 | .padding_top(2) |
| 33830 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33831 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33832 | } |
| 33833 | } |
| 33834 | } |
| 33835 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33836 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4, output_height_lt_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33837 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 33838 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33839 | DWConv2DMicrokernelTester() |
| 33840 | .input_width(input_width) |
| 33841 | .input_height(input_height) |
| 33842 | .kernel_height(5) |
| 33843 | .kernel_width(5) |
| 33844 | .subsampling(2) |
| 33845 | .padding_left(2) |
| 33846 | .padding_right(2) |
| 33847 | .padding_top(2) |
| 33848 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33849 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33850 | } |
| 33851 | } |
| 33852 | } |
| 33853 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33854 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4, output_height_gt_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33855 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 33856 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33857 | DWConv2DMicrokernelTester() |
| 33858 | .input_width(input_width) |
| 33859 | .input_height(input_height) |
| 33860 | .kernel_height(5) |
| 33861 | .kernel_width(5) |
| 33862 | .subsampling(2) |
| 33863 | .padding_left(2) |
| 33864 | .padding_right(2) |
| 33865 | .padding_top(2) |
| 33866 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33867 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33868 | } |
| 33869 | } |
| 33870 | } |
| 33871 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33872 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33873 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 33874 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33875 | DWConv2DMicrokernelTester() |
| 33876 | .input_width(input_width) |
| 33877 | .input_height(input_height) |
| 33878 | .kernel_height(5) |
| 33879 | .kernel_width(5) |
| 33880 | .subsampling(2) |
| 33881 | .padding_left(2) |
| 33882 | .padding_right(2) |
| 33883 | .padding_top(1) |
| 33884 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33885 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33886 | } |
| 33887 | } |
| 33888 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33889 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33890 | |
| 33891 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 33892 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33893 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33894 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 33895 | DWConv2DMicrokernelTester() |
| 33896 | .input_width(input_width) |
| 33897 | .input_height(6) |
| 33898 | .kernel_height(5) |
| 33899 | .kernel_width(5) |
| 33900 | .subsampling(2) |
| 33901 | .padding_left(2) |
| 33902 | .padding_right(2) |
| 33903 | .padding_top(2) |
| 33904 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33905 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33906 | } |
| 33907 | } |
| 33908 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33909 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33910 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 33911 | DWConv2DMicrokernelTester() |
| 33912 | .input_width(input_width) |
| 33913 | .input_height(6) |
| 33914 | .kernel_height(5) |
| 33915 | .kernel_width(5) |
| 33916 | .subsampling(2) |
| 33917 | .padding_left(2) |
| 33918 | .padding_right(2) |
| 33919 | .padding_top(2) |
| 33920 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33921 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33922 | } |
| 33923 | } |
| 33924 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33925 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33926 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 33927 | DWConv2DMicrokernelTester() |
| 33928 | .input_width(8) |
| 33929 | .input_height(6) |
| 33930 | .kernel_height(5) |
| 33931 | .kernel_width(5) |
| 33932 | .subsampling(2) |
| 33933 | .padding_left(2) |
| 33934 | .padding_right(2) |
| 33935 | .padding_top(2) |
| 33936 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33937 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33938 | } |
| 33939 | } |
| 33940 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33941 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33942 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 33943 | DWConv2DMicrokernelTester() |
| 33944 | .input_width(input_width) |
| 33945 | .input_height(6) |
| 33946 | .kernel_height(5) |
| 33947 | .kernel_width(5) |
| 33948 | .subsampling(2) |
| 33949 | .padding_left(2) |
| 33950 | .padding_right(2) |
| 33951 | .padding_top(2) |
| 33952 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33953 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33954 | } |
| 33955 | } |
| 33956 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33957 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4, output_height_eq_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33958 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 33959 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33960 | DWConv2DMicrokernelTester() |
| 33961 | .input_width(input_width) |
| 33962 | .input_height(input_height) |
| 33963 | .kernel_height(5) |
| 33964 | .kernel_width(5) |
| 33965 | .subsampling(2) |
| 33966 | .padding_left(2) |
| 33967 | .padding_right(2) |
| 33968 | .padding_top(2) |
| 33969 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33970 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33971 | } |
| 33972 | } |
| 33973 | } |
| 33974 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33975 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4, output_height_div_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33976 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 33977 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33978 | DWConv2DMicrokernelTester() |
| 33979 | .input_width(input_width) |
| 33980 | .input_height(input_height) |
| 33981 | .kernel_height(5) |
| 33982 | .kernel_width(5) |
| 33983 | .subsampling(2) |
| 33984 | .padding_left(2) |
| 33985 | .padding_right(2) |
| 33986 | .padding_top(2) |
| 33987 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33988 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33989 | } |
| 33990 | } |
| 33991 | } |
| 33992 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 33993 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4, output_height_lt_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 33994 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 33995 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 33996 | DWConv2DMicrokernelTester() |
| 33997 | .input_width(input_width) |
| 33998 | .input_height(input_height) |
| 33999 | .kernel_height(5) |
| 34000 | .kernel_width(5) |
| 34001 | .subsampling(2) |
| 34002 | .padding_left(2) |
| 34003 | .padding_right(2) |
| 34004 | .padding_top(2) |
| 34005 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34006 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34007 | } |
| 34008 | } |
| 34009 | } |
| 34010 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34011 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4, output_height_gt_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34012 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 34013 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34014 | DWConv2DMicrokernelTester() |
| 34015 | .input_width(input_width) |
| 34016 | .input_height(input_height) |
| 34017 | .kernel_height(5) |
| 34018 | .kernel_width(5) |
| 34019 | .subsampling(2) |
| 34020 | .padding_left(2) |
| 34021 | .padding_right(2) |
| 34022 | .padding_top(2) |
| 34023 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34024 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34025 | } |
| 34026 | } |
| 34027 | } |
| 34028 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34029 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34030 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 34031 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34032 | DWConv2DMicrokernelTester() |
| 34033 | .input_width(input_width) |
| 34034 | .input_height(input_height) |
| 34035 | .kernel_height(5) |
| 34036 | .kernel_width(5) |
| 34037 | .subsampling(2) |
| 34038 | .padding_left(2) |
| 34039 | .padding_right(2) |
| 34040 | .padding_top(1) |
| 34041 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34042 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34043 | } |
| 34044 | } |
| 34045 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34046 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34047 | |
| 34048 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34049 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34050 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34051 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 34052 | DWConv2DMicrokernelTester() |
| 34053 | .input_width(input_width) |
| 34054 | .input_height(2) |
| 34055 | .kernel_height(5) |
| 34056 | .kernel_width(5) |
| 34057 | .subsampling(2) |
| 34058 | .padding_left(2) |
| 34059 | .padding_right(2) |
| 34060 | .padding_top(2) |
| 34061 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34062 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34063 | } |
| 34064 | } |
| 34065 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34066 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34067 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 34068 | DWConv2DMicrokernelTester() |
| 34069 | .input_width(input_width) |
| 34070 | .input_height(2) |
| 34071 | .kernel_height(5) |
| 34072 | .kernel_width(5) |
| 34073 | .subsampling(2) |
| 34074 | .padding_left(2) |
| 34075 | .padding_right(2) |
| 34076 | .padding_top(2) |
| 34077 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34078 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34079 | } |
| 34080 | } |
| 34081 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34082 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34083 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 34084 | DWConv2DMicrokernelTester() |
| 34085 | .input_width(8) |
| 34086 | .input_height(2) |
| 34087 | .kernel_height(5) |
| 34088 | .kernel_width(5) |
| 34089 | .subsampling(2) |
| 34090 | .padding_left(2) |
| 34091 | .padding_right(2) |
| 34092 | .padding_top(2) |
| 34093 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34094 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34095 | } |
| 34096 | } |
| 34097 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34098 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34099 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 34100 | DWConv2DMicrokernelTester() |
| 34101 | .input_width(input_width) |
| 34102 | .input_height(2) |
| 34103 | .kernel_height(5) |
| 34104 | .kernel_width(5) |
| 34105 | .subsampling(2) |
| 34106 | .padding_left(2) |
| 34107 | .padding_right(2) |
| 34108 | .padding_top(2) |
| 34109 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34110 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34111 | } |
| 34112 | } |
| 34113 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34114 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_height_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34115 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 34116 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34117 | DWConv2DMicrokernelTester() |
| 34118 | .input_width(input_width) |
| 34119 | .input_height(input_height) |
| 34120 | .kernel_height(5) |
| 34121 | .kernel_width(5) |
| 34122 | .subsampling(2) |
| 34123 | .padding_left(2) |
| 34124 | .padding_right(2) |
| 34125 | .padding_top(2) |
| 34126 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34127 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34128 | } |
| 34129 | } |
| 34130 | } |
| 34131 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34132 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC2, output_height_gt_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34133 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 34134 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34135 | DWConv2DMicrokernelTester() |
| 34136 | .input_width(input_width) |
| 34137 | .input_height(input_height) |
| 34138 | .kernel_height(5) |
| 34139 | .kernel_width(5) |
| 34140 | .subsampling(2) |
| 34141 | .padding_left(2) |
| 34142 | .padding_right(2) |
| 34143 | .padding_top(2) |
| 34144 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34145 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34146 | } |
| 34147 | } |
| 34148 | } |
| 34149 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34150 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC2, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34151 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 34152 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34153 | DWConv2DMicrokernelTester() |
| 34154 | .input_width(input_width) |
| 34155 | .input_height(input_height) |
| 34156 | .kernel_height(5) |
| 34157 | .kernel_width(5) |
| 34158 | .subsampling(2) |
| 34159 | .padding_left(2) |
| 34160 | .padding_right(2) |
| 34161 | .padding_top(1) |
| 34162 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34163 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34164 | } |
| 34165 | } |
| 34166 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34167 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34168 | |
| 34169 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34170 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34171 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34172 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 34173 | DWConv2DMicrokernelTester() |
| 34174 | .input_width(input_width) |
| 34175 | .input_height(2) |
| 34176 | .kernel_height(5) |
| 34177 | .kernel_width(5) |
| 34178 | .subsampling(2) |
| 34179 | .padding_left(2) |
| 34180 | .padding_right(2) |
| 34181 | .padding_top(2) |
| 34182 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34183 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34184 | } |
| 34185 | } |
| 34186 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34187 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34188 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 34189 | DWConv2DMicrokernelTester() |
| 34190 | .input_width(input_width) |
| 34191 | .input_height(2) |
| 34192 | .kernel_height(5) |
| 34193 | .kernel_width(5) |
| 34194 | .subsampling(2) |
| 34195 | .padding_left(2) |
| 34196 | .padding_right(2) |
| 34197 | .padding_top(2) |
| 34198 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34199 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34200 | } |
| 34201 | } |
| 34202 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34203 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34204 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 34205 | DWConv2DMicrokernelTester() |
| 34206 | .input_width(8) |
| 34207 | .input_height(2) |
| 34208 | .kernel_height(5) |
| 34209 | .kernel_width(5) |
| 34210 | .subsampling(2) |
| 34211 | .padding_left(2) |
| 34212 | .padding_right(2) |
| 34213 | .padding_top(2) |
| 34214 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34215 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34216 | } |
| 34217 | } |
| 34218 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34219 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34220 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 34221 | DWConv2DMicrokernelTester() |
| 34222 | .input_width(input_width) |
| 34223 | .input_height(2) |
| 34224 | .kernel_height(5) |
| 34225 | .kernel_width(5) |
| 34226 | .subsampling(2) |
| 34227 | .padding_left(2) |
| 34228 | .padding_right(2) |
| 34229 | .padding_top(2) |
| 34230 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34231 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34232 | } |
| 34233 | } |
| 34234 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34235 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_height_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34236 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 34237 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34238 | DWConv2DMicrokernelTester() |
| 34239 | .input_width(input_width) |
| 34240 | .input_height(input_height) |
| 34241 | .kernel_height(5) |
| 34242 | .kernel_width(5) |
| 34243 | .subsampling(2) |
| 34244 | .padding_left(2) |
| 34245 | .padding_right(2) |
| 34246 | .padding_top(2) |
| 34247 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34248 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34249 | } |
| 34250 | } |
| 34251 | } |
| 34252 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34253 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC3, output_height_gt_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34254 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 34255 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34256 | DWConv2DMicrokernelTester() |
| 34257 | .input_width(input_width) |
| 34258 | .input_height(input_height) |
| 34259 | .kernel_height(5) |
| 34260 | .kernel_width(5) |
| 34261 | .subsampling(2) |
| 34262 | .padding_left(2) |
| 34263 | .padding_right(2) |
| 34264 | .padding_top(2) |
| 34265 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34266 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34267 | } |
| 34268 | } |
| 34269 | } |
| 34270 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34271 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC3, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34272 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 34273 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34274 | DWConv2DMicrokernelTester() |
| 34275 | .input_width(input_width) |
| 34276 | .input_height(input_height) |
| 34277 | .kernel_height(5) |
| 34278 | .kernel_width(5) |
| 34279 | .subsampling(2) |
| 34280 | .padding_left(2) |
| 34281 | .padding_right(2) |
| 34282 | .padding_top(1) |
| 34283 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34284 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34285 | } |
| 34286 | } |
| 34287 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34288 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34289 | |
| 34290 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34291 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34292 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34293 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 34294 | DWConv2DMicrokernelTester() |
| 34295 | .input_width(input_width) |
| 34296 | .input_height(2) |
| 34297 | .kernel_height(5) |
| 34298 | .kernel_width(5) |
| 34299 | .subsampling(2) |
| 34300 | .padding_left(2) |
| 34301 | .padding_right(2) |
| 34302 | .padding_top(2) |
| 34303 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34304 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34305 | } |
| 34306 | } |
| 34307 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34308 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34309 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 34310 | DWConv2DMicrokernelTester() |
| 34311 | .input_width(input_width) |
| 34312 | .input_height(2) |
| 34313 | .kernel_height(5) |
| 34314 | .kernel_width(5) |
| 34315 | .subsampling(2) |
| 34316 | .padding_left(2) |
| 34317 | .padding_right(2) |
| 34318 | .padding_top(2) |
| 34319 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34320 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34321 | } |
| 34322 | } |
| 34323 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34324 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34325 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 34326 | DWConv2DMicrokernelTester() |
| 34327 | .input_width(8) |
| 34328 | .input_height(2) |
| 34329 | .kernel_height(5) |
| 34330 | .kernel_width(5) |
| 34331 | .subsampling(2) |
| 34332 | .padding_left(2) |
| 34333 | .padding_right(2) |
| 34334 | .padding_top(2) |
| 34335 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34336 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34337 | } |
| 34338 | } |
| 34339 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34340 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34341 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 34342 | DWConv2DMicrokernelTester() |
| 34343 | .input_width(input_width) |
| 34344 | .input_height(2) |
| 34345 | .kernel_height(5) |
| 34346 | .kernel_width(5) |
| 34347 | .subsampling(2) |
| 34348 | .padding_left(2) |
| 34349 | .padding_right(2) |
| 34350 | .padding_top(2) |
| 34351 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34352 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34353 | } |
| 34354 | } |
| 34355 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34356 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_height_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34357 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 34358 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34359 | DWConv2DMicrokernelTester() |
| 34360 | .input_width(input_width) |
| 34361 | .input_height(input_height) |
| 34362 | .kernel_height(5) |
| 34363 | .kernel_width(5) |
| 34364 | .subsampling(2) |
| 34365 | .padding_left(2) |
| 34366 | .padding_right(2) |
| 34367 | .padding_top(2) |
| 34368 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34369 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34370 | } |
| 34371 | } |
| 34372 | } |
| 34373 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34374 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC4, output_height_gt_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34375 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 34376 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34377 | DWConv2DMicrokernelTester() |
| 34378 | .input_width(input_width) |
| 34379 | .input_height(input_height) |
| 34380 | .kernel_height(5) |
| 34381 | .kernel_width(5) |
| 34382 | .subsampling(2) |
| 34383 | .padding_left(2) |
| 34384 | .padding_right(2) |
| 34385 | .padding_top(2) |
| 34386 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34387 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34388 | } |
| 34389 | } |
| 34390 | } |
| 34391 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34392 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC4, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34393 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 34394 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34395 | DWConv2DMicrokernelTester() |
| 34396 | .input_width(input_width) |
| 34397 | .input_height(input_height) |
| 34398 | .kernel_height(5) |
| 34399 | .kernel_width(5) |
| 34400 | .subsampling(2) |
| 34401 | .padding_left(2) |
| 34402 | .padding_right(2) |
| 34403 | .padding_top(1) |
| 34404 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34405 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34406 | } |
| 34407 | } |
| 34408 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34409 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34410 | |
| 34411 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34412 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34413 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC5, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34414 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 34415 | DWConv2DMicrokernelTester() |
| 34416 | .input_width(input_width) |
| 34417 | .input_height(2) |
| 34418 | .kernel_height(5) |
| 34419 | .kernel_width(5) |
| 34420 | .subsampling(2) |
| 34421 | .padding_left(2) |
| 34422 | .padding_right(2) |
| 34423 | .padding_top(2) |
| 34424 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34425 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34426 | } |
| 34427 | } |
| 34428 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34429 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC5, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34430 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 34431 | DWConv2DMicrokernelTester() |
| 34432 | .input_width(input_width) |
| 34433 | .input_height(2) |
| 34434 | .kernel_height(5) |
| 34435 | .kernel_width(5) |
| 34436 | .subsampling(2) |
| 34437 | .padding_left(2) |
| 34438 | .padding_right(2) |
| 34439 | .padding_top(2) |
| 34440 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34441 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34442 | } |
| 34443 | } |
| 34444 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34445 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC5, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34446 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 34447 | DWConv2DMicrokernelTester() |
| 34448 | .input_width(8) |
| 34449 | .input_height(2) |
| 34450 | .kernel_height(5) |
| 34451 | .kernel_width(5) |
| 34452 | .subsampling(2) |
| 34453 | .padding_left(2) |
| 34454 | .padding_right(2) |
| 34455 | .padding_top(2) |
| 34456 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34457 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34458 | } |
| 34459 | } |
| 34460 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34461 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC5, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34462 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 34463 | DWConv2DMicrokernelTester() |
| 34464 | .input_width(input_width) |
| 34465 | .input_height(2) |
| 34466 | .kernel_height(5) |
| 34467 | .kernel_width(5) |
| 34468 | .subsampling(2) |
| 34469 | .padding_left(2) |
| 34470 | .padding_right(2) |
| 34471 | .padding_top(2) |
| 34472 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34473 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34474 | } |
| 34475 | } |
| 34476 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34477 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC5, output_height_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34478 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 34479 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34480 | DWConv2DMicrokernelTester() |
| 34481 | .input_width(input_width) |
| 34482 | .input_height(input_height) |
| 34483 | .kernel_height(5) |
| 34484 | .kernel_width(5) |
| 34485 | .subsampling(2) |
| 34486 | .padding_left(2) |
| 34487 | .padding_right(2) |
| 34488 | .padding_top(2) |
| 34489 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34490 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34491 | } |
| 34492 | } |
| 34493 | } |
| 34494 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34495 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC5, output_height_gt_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34496 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 34497 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34498 | DWConv2DMicrokernelTester() |
| 34499 | .input_width(input_width) |
| 34500 | .input_height(input_height) |
| 34501 | .kernel_height(5) |
| 34502 | .kernel_width(5) |
| 34503 | .subsampling(2) |
| 34504 | .padding_left(2) |
| 34505 | .padding_right(2) |
| 34506 | .padding_top(2) |
| 34507 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34508 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34509 | } |
| 34510 | } |
| 34511 | } |
| 34512 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34513 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_1X4_ACC5, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34514 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 34515 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34516 | DWConv2DMicrokernelTester() |
| 34517 | .input_width(input_width) |
| 34518 | .input_height(input_height) |
| 34519 | .kernel_height(5) |
| 34520 | .kernel_width(5) |
| 34521 | .subsampling(2) |
| 34522 | .padding_left(2) |
| 34523 | .padding_right(2) |
| 34524 | .padding_top(1) |
| 34525 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34526 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34527 | } |
| 34528 | } |
| 34529 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34530 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34531 | |
| 34532 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34533 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34534 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34535 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 34536 | DWConv2DMicrokernelTester() |
| 34537 | .input_width(input_width) |
| 34538 | .input_height(4) |
| 34539 | .kernel_height(5) |
| 34540 | .kernel_width(5) |
| 34541 | .subsampling(2) |
| 34542 | .padding_left(2) |
| 34543 | .padding_right(2) |
| 34544 | .padding_top(2) |
| 34545 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34546 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34547 | } |
| 34548 | } |
| 34549 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34550 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34551 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 34552 | DWConv2DMicrokernelTester() |
| 34553 | .input_width(input_width) |
| 34554 | .input_height(4) |
| 34555 | .kernel_height(5) |
| 34556 | .kernel_width(5) |
| 34557 | .subsampling(2) |
| 34558 | .padding_left(2) |
| 34559 | .padding_right(2) |
| 34560 | .padding_top(2) |
| 34561 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34562 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34563 | } |
| 34564 | } |
| 34565 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34566 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34567 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 34568 | DWConv2DMicrokernelTester() |
| 34569 | .input_width(8) |
| 34570 | .input_height(4) |
| 34571 | .kernel_height(5) |
| 34572 | .kernel_width(5) |
| 34573 | .subsampling(2) |
| 34574 | .padding_left(2) |
| 34575 | .padding_right(2) |
| 34576 | .padding_top(2) |
| 34577 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34578 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34579 | } |
| 34580 | } |
| 34581 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34582 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34583 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 34584 | DWConv2DMicrokernelTester() |
| 34585 | .input_width(input_width) |
| 34586 | .input_height(4) |
| 34587 | .kernel_height(5) |
| 34588 | .kernel_width(5) |
| 34589 | .subsampling(2) |
| 34590 | .padding_left(2) |
| 34591 | .padding_right(2) |
| 34592 | .padding_top(2) |
| 34593 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34594 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34595 | } |
| 34596 | } |
| 34597 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34598 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_eq_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34599 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 34600 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34601 | DWConv2DMicrokernelTester() |
| 34602 | .input_width(input_width) |
| 34603 | .input_height(input_height) |
| 34604 | .kernel_height(5) |
| 34605 | .kernel_width(5) |
| 34606 | .subsampling(2) |
| 34607 | .padding_left(2) |
| 34608 | .padding_right(2) |
| 34609 | .padding_top(2) |
| 34610 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34611 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34612 | } |
| 34613 | } |
| 34614 | } |
| 34615 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34616 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_div_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34617 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 34618 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34619 | DWConv2DMicrokernelTester() |
| 34620 | .input_width(input_width) |
| 34621 | .input_height(input_height) |
| 34622 | .kernel_height(5) |
| 34623 | .kernel_width(5) |
| 34624 | .subsampling(2) |
| 34625 | .padding_left(2) |
| 34626 | .padding_right(2) |
| 34627 | .padding_top(2) |
| 34628 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34629 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34630 | } |
| 34631 | } |
| 34632 | } |
| 34633 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34634 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_lt_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34635 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 34636 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34637 | DWConv2DMicrokernelTester() |
| 34638 | .input_width(input_width) |
| 34639 | .input_height(input_height) |
| 34640 | .kernel_height(5) |
| 34641 | .kernel_width(5) |
| 34642 | .subsampling(2) |
| 34643 | .padding_left(2) |
| 34644 | .padding_right(2) |
| 34645 | .padding_top(2) |
| 34646 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34647 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34648 | } |
| 34649 | } |
| 34650 | } |
| 34651 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34652 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, output_height_gt_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34653 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 34654 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34655 | DWConv2DMicrokernelTester() |
| 34656 | .input_width(input_width) |
| 34657 | .input_height(input_height) |
| 34658 | .kernel_height(5) |
| 34659 | .kernel_width(5) |
| 34660 | .subsampling(2) |
| 34661 | .padding_left(2) |
| 34662 | .padding_right(2) |
| 34663 | .padding_top(2) |
| 34664 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34665 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34666 | } |
| 34667 | } |
| 34668 | } |
| 34669 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34670 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC2, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34671 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 34672 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34673 | DWConv2DMicrokernelTester() |
| 34674 | .input_width(input_width) |
| 34675 | .input_height(input_height) |
| 34676 | .kernel_height(5) |
| 34677 | .kernel_width(5) |
| 34678 | .subsampling(2) |
| 34679 | .padding_left(2) |
| 34680 | .padding_right(2) |
| 34681 | .padding_top(1) |
| 34682 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34683 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34684 | } |
| 34685 | } |
| 34686 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34687 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34688 | |
| 34689 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34690 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34691 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34692 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 34693 | DWConv2DMicrokernelTester() |
| 34694 | .input_width(input_width) |
| 34695 | .input_height(4) |
| 34696 | .kernel_height(5) |
| 34697 | .kernel_width(5) |
| 34698 | .subsampling(2) |
| 34699 | .padding_left(2) |
| 34700 | .padding_right(2) |
| 34701 | .padding_top(2) |
| 34702 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34703 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34704 | } |
| 34705 | } |
| 34706 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34707 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34708 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 34709 | DWConv2DMicrokernelTester() |
| 34710 | .input_width(input_width) |
| 34711 | .input_height(4) |
| 34712 | .kernel_height(5) |
| 34713 | .kernel_width(5) |
| 34714 | .subsampling(2) |
| 34715 | .padding_left(2) |
| 34716 | .padding_right(2) |
| 34717 | .padding_top(2) |
| 34718 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34719 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34720 | } |
| 34721 | } |
| 34722 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34723 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34724 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 34725 | DWConv2DMicrokernelTester() |
| 34726 | .input_width(8) |
| 34727 | .input_height(4) |
| 34728 | .kernel_height(5) |
| 34729 | .kernel_width(5) |
| 34730 | .subsampling(2) |
| 34731 | .padding_left(2) |
| 34732 | .padding_right(2) |
| 34733 | .padding_top(2) |
| 34734 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34735 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34736 | } |
| 34737 | } |
| 34738 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34739 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34740 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 34741 | DWConv2DMicrokernelTester() |
| 34742 | .input_width(input_width) |
| 34743 | .input_height(4) |
| 34744 | .kernel_height(5) |
| 34745 | .kernel_width(5) |
| 34746 | .subsampling(2) |
| 34747 | .padding_left(2) |
| 34748 | .padding_right(2) |
| 34749 | .padding_top(2) |
| 34750 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34751 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34752 | } |
| 34753 | } |
| 34754 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34755 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_height_eq_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34756 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 34757 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34758 | DWConv2DMicrokernelTester() |
| 34759 | .input_width(input_width) |
| 34760 | .input_height(input_height) |
| 34761 | .kernel_height(5) |
| 34762 | .kernel_width(5) |
| 34763 | .subsampling(2) |
| 34764 | .padding_left(2) |
| 34765 | .padding_right(2) |
| 34766 | .padding_top(2) |
| 34767 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34768 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34769 | } |
| 34770 | } |
| 34771 | } |
| 34772 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34773 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_height_div_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34774 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 34775 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34776 | DWConv2DMicrokernelTester() |
| 34777 | .input_width(input_width) |
| 34778 | .input_height(input_height) |
| 34779 | .kernel_height(5) |
| 34780 | .kernel_width(5) |
| 34781 | .subsampling(2) |
| 34782 | .padding_left(2) |
| 34783 | .padding_right(2) |
| 34784 | .padding_top(2) |
| 34785 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34786 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34787 | } |
| 34788 | } |
| 34789 | } |
| 34790 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34791 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_height_lt_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34792 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 34793 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34794 | DWConv2DMicrokernelTester() |
| 34795 | .input_width(input_width) |
| 34796 | .input_height(input_height) |
| 34797 | .kernel_height(5) |
| 34798 | .kernel_width(5) |
| 34799 | .subsampling(2) |
| 34800 | .padding_left(2) |
| 34801 | .padding_right(2) |
| 34802 | .padding_top(2) |
| 34803 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34804 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34805 | } |
| 34806 | } |
| 34807 | } |
| 34808 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34809 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, output_height_gt_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34810 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 34811 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34812 | DWConv2DMicrokernelTester() |
| 34813 | .input_width(input_width) |
| 34814 | .input_height(input_height) |
| 34815 | .kernel_height(5) |
| 34816 | .kernel_width(5) |
| 34817 | .subsampling(2) |
| 34818 | .padding_left(2) |
| 34819 | .padding_right(2) |
| 34820 | .padding_top(2) |
| 34821 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34822 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34823 | } |
| 34824 | } |
| 34825 | } |
| 34826 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34827 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_2X4_ACC3, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34828 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 34829 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34830 | DWConv2DMicrokernelTester() |
| 34831 | .input_width(input_width) |
| 34832 | .input_height(input_height) |
| 34833 | .kernel_height(5) |
| 34834 | .kernel_width(5) |
| 34835 | .subsampling(2) |
| 34836 | .padding_left(2) |
| 34837 | .padding_right(2) |
| 34838 | .padding_top(1) |
| 34839 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34840 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34841 | } |
| 34842 | } |
| 34843 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34844 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34845 | |
| 34846 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 34847 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34848 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34849 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 34850 | DWConv2DMicrokernelTester() |
| 34851 | .input_width(input_width) |
| 34852 | .input_height(6) |
| 34853 | .kernel_height(5) |
| 34854 | .kernel_width(5) |
| 34855 | .subsampling(2) |
| 34856 | .padding_left(2) |
| 34857 | .padding_right(2) |
| 34858 | .padding_top(2) |
| 34859 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34860 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34861 | } |
| 34862 | } |
| 34863 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34864 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34865 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 34866 | DWConv2DMicrokernelTester() |
| 34867 | .input_width(input_width) |
| 34868 | .input_height(6) |
| 34869 | .kernel_height(5) |
| 34870 | .kernel_width(5) |
| 34871 | .subsampling(2) |
| 34872 | .padding_left(2) |
| 34873 | .padding_right(2) |
| 34874 | .padding_top(2) |
| 34875 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34876 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34877 | } |
| 34878 | } |
| 34879 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34880 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34881 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 34882 | DWConv2DMicrokernelTester() |
| 34883 | .input_width(8) |
| 34884 | .input_height(6) |
| 34885 | .kernel_height(5) |
| 34886 | .kernel_width(5) |
| 34887 | .subsampling(2) |
| 34888 | .padding_left(2) |
| 34889 | .padding_right(2) |
| 34890 | .padding_top(2) |
| 34891 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34892 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34893 | } |
| 34894 | } |
| 34895 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34896 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34897 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 34898 | DWConv2DMicrokernelTester() |
| 34899 | .input_width(input_width) |
| 34900 | .input_height(6) |
| 34901 | .kernel_height(5) |
| 34902 | .kernel_width(5) |
| 34903 | .subsampling(2) |
| 34904 | .padding_left(2) |
| 34905 | .padding_right(2) |
| 34906 | .padding_top(2) |
| 34907 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34908 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34909 | } |
| 34910 | } |
| 34911 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34912 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_height_eq_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34913 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 34914 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34915 | DWConv2DMicrokernelTester() |
| 34916 | .input_width(input_width) |
| 34917 | .input_height(input_height) |
| 34918 | .kernel_height(5) |
| 34919 | .kernel_width(5) |
| 34920 | .subsampling(2) |
| 34921 | .padding_left(2) |
| 34922 | .padding_right(2) |
| 34923 | .padding_top(2) |
| 34924 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34925 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34926 | } |
| 34927 | } |
| 34928 | } |
| 34929 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34930 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_height_div_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34931 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 34932 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34933 | DWConv2DMicrokernelTester() |
| 34934 | .input_width(input_width) |
| 34935 | .input_height(input_height) |
| 34936 | .kernel_height(5) |
| 34937 | .kernel_width(5) |
| 34938 | .subsampling(2) |
| 34939 | .padding_left(2) |
| 34940 | .padding_right(2) |
| 34941 | .padding_top(2) |
| 34942 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34943 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34944 | } |
| 34945 | } |
| 34946 | } |
| 34947 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34948 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_height_lt_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34949 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 34950 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34951 | DWConv2DMicrokernelTester() |
| 34952 | .input_width(input_width) |
| 34953 | .input_height(input_height) |
| 34954 | .kernel_height(5) |
| 34955 | .kernel_width(5) |
| 34956 | .subsampling(2) |
| 34957 | .padding_left(2) |
| 34958 | .padding_right(2) |
| 34959 | .padding_top(2) |
| 34960 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34961 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34962 | } |
| 34963 | } |
| 34964 | } |
| 34965 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34966 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, output_height_gt_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34967 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 34968 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34969 | DWConv2DMicrokernelTester() |
| 34970 | .input_width(input_width) |
| 34971 | .input_height(input_height) |
| 34972 | .kernel_height(5) |
| 34973 | .kernel_width(5) |
| 34974 | .subsampling(2) |
| 34975 | .padding_left(2) |
| 34976 | .padding_right(2) |
| 34977 | .padding_top(2) |
| 34978 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34979 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34980 | } |
| 34981 | } |
| 34982 | } |
| 34983 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34984 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_ARM_SPLAT_3X4_ACC2, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34985 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 34986 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 34987 | DWConv2DMicrokernelTester() |
| 34988 | .input_width(input_width) |
| 34989 | .input_height(input_height) |
| 34990 | .kernel_height(5) |
| 34991 | .kernel_width(5) |
| 34992 | .subsampling(2) |
| 34993 | .padding_left(2) |
| 34994 | .padding_right(2) |
| 34995 | .padding_top(1) |
| 34996 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 34997 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 34998 | } |
| 34999 | } |
| 35000 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35001 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35002 | |
| 35003 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35004 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35005 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35006 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 35007 | DWConv2DMicrokernelTester() |
| 35008 | .input_width(input_width) |
| 35009 | .input_height(2) |
| 35010 | .kernel_height(5) |
| 35011 | .kernel_width(5) |
| 35012 | .subsampling(2) |
| 35013 | .padding_left(2) |
| 35014 | .padding_right(2) |
| 35015 | .padding_top(2) |
| 35016 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35017 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35018 | } |
| 35019 | } |
| 35020 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35021 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35022 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 35023 | DWConv2DMicrokernelTester() |
| 35024 | .input_width(input_width) |
| 35025 | .input_height(2) |
| 35026 | .kernel_height(5) |
| 35027 | .kernel_width(5) |
| 35028 | .subsampling(2) |
| 35029 | .padding_left(2) |
| 35030 | .padding_right(2) |
| 35031 | .padding_top(2) |
| 35032 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35033 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35034 | } |
| 35035 | } |
| 35036 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35037 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35038 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 35039 | DWConv2DMicrokernelTester() |
| 35040 | .input_width(8) |
| 35041 | .input_height(2) |
| 35042 | .kernel_height(5) |
| 35043 | .kernel_width(5) |
| 35044 | .subsampling(2) |
| 35045 | .padding_left(2) |
| 35046 | .padding_right(2) |
| 35047 | .padding_top(2) |
| 35048 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35049 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35050 | } |
| 35051 | } |
| 35052 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35053 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35054 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 35055 | DWConv2DMicrokernelTester() |
| 35056 | .input_width(input_width) |
| 35057 | .input_height(2) |
| 35058 | .kernel_height(5) |
| 35059 | .kernel_width(5) |
| 35060 | .subsampling(2) |
| 35061 | .padding_left(2) |
| 35062 | .padding_right(2) |
| 35063 | .padding_top(2) |
| 35064 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35065 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35066 | } |
| 35067 | } |
| 35068 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35069 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4, output_height_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35070 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 35071 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35072 | DWConv2DMicrokernelTester() |
| 35073 | .input_width(input_width) |
| 35074 | .input_height(input_height) |
| 35075 | .kernel_height(5) |
| 35076 | .kernel_width(5) |
| 35077 | .subsampling(2) |
| 35078 | .padding_left(2) |
| 35079 | .padding_right(2) |
| 35080 | .padding_top(2) |
| 35081 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35082 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35083 | } |
| 35084 | } |
| 35085 | } |
| 35086 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35087 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4, output_height_gt_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35088 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 35089 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35090 | DWConv2DMicrokernelTester() |
| 35091 | .input_width(input_width) |
| 35092 | .input_height(input_height) |
| 35093 | .kernel_height(5) |
| 35094 | .kernel_width(5) |
| 35095 | .subsampling(2) |
| 35096 | .padding_left(2) |
| 35097 | .padding_right(2) |
| 35098 | .padding_top(2) |
| 35099 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35100 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35101 | } |
| 35102 | } |
| 35103 | } |
| 35104 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35105 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35106 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 35107 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35108 | DWConv2DMicrokernelTester() |
| 35109 | .input_width(input_width) |
| 35110 | .input_height(input_height) |
| 35111 | .kernel_height(5) |
| 35112 | .kernel_width(5) |
| 35113 | .subsampling(2) |
| 35114 | .padding_left(2) |
| 35115 | .padding_right(2) |
| 35116 | .padding_top(1) |
| 35117 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35118 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35119 | } |
| 35120 | } |
| 35121 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35122 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35123 | |
| 35124 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35125 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35126 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35127 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 35128 | DWConv2DMicrokernelTester() |
| 35129 | .input_width(input_width) |
| 35130 | .input_height(4) |
| 35131 | .kernel_height(5) |
| 35132 | .kernel_width(5) |
| 35133 | .subsampling(2) |
| 35134 | .padding_left(2) |
| 35135 | .padding_right(2) |
| 35136 | .padding_top(2) |
| 35137 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35138 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35139 | } |
| 35140 | } |
| 35141 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35142 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35143 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 35144 | DWConv2DMicrokernelTester() |
| 35145 | .input_width(input_width) |
| 35146 | .input_height(4) |
| 35147 | .kernel_height(5) |
| 35148 | .kernel_width(5) |
| 35149 | .subsampling(2) |
| 35150 | .padding_left(2) |
| 35151 | .padding_right(2) |
| 35152 | .padding_top(2) |
| 35153 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35154 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35155 | } |
| 35156 | } |
| 35157 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35158 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35159 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 35160 | DWConv2DMicrokernelTester() |
| 35161 | .input_width(8) |
| 35162 | .input_height(4) |
| 35163 | .kernel_height(5) |
| 35164 | .kernel_width(5) |
| 35165 | .subsampling(2) |
| 35166 | .padding_left(2) |
| 35167 | .padding_right(2) |
| 35168 | .padding_top(2) |
| 35169 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35170 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35171 | } |
| 35172 | } |
| 35173 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35174 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35175 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 35176 | DWConv2DMicrokernelTester() |
| 35177 | .input_width(input_width) |
| 35178 | .input_height(4) |
| 35179 | .kernel_height(5) |
| 35180 | .kernel_width(5) |
| 35181 | .subsampling(2) |
| 35182 | .padding_left(2) |
| 35183 | .padding_right(2) |
| 35184 | .padding_top(2) |
| 35185 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35186 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35187 | } |
| 35188 | } |
| 35189 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35190 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4, output_height_eq_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35191 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 35192 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35193 | DWConv2DMicrokernelTester() |
| 35194 | .input_width(input_width) |
| 35195 | .input_height(input_height) |
| 35196 | .kernel_height(5) |
| 35197 | .kernel_width(5) |
| 35198 | .subsampling(2) |
| 35199 | .padding_left(2) |
| 35200 | .padding_right(2) |
| 35201 | .padding_top(2) |
| 35202 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35203 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35204 | } |
| 35205 | } |
| 35206 | } |
| 35207 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35208 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4, output_height_div_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35209 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 35210 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35211 | DWConv2DMicrokernelTester() |
| 35212 | .input_width(input_width) |
| 35213 | .input_height(input_height) |
| 35214 | .kernel_height(5) |
| 35215 | .kernel_width(5) |
| 35216 | .subsampling(2) |
| 35217 | .padding_left(2) |
| 35218 | .padding_right(2) |
| 35219 | .padding_top(2) |
| 35220 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35221 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35222 | } |
| 35223 | } |
| 35224 | } |
| 35225 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35226 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4, output_height_lt_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35227 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 35228 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35229 | DWConv2DMicrokernelTester() |
| 35230 | .input_width(input_width) |
| 35231 | .input_height(input_height) |
| 35232 | .kernel_height(5) |
| 35233 | .kernel_width(5) |
| 35234 | .subsampling(2) |
| 35235 | .padding_left(2) |
| 35236 | .padding_right(2) |
| 35237 | .padding_top(2) |
| 35238 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35239 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35240 | } |
| 35241 | } |
| 35242 | } |
| 35243 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35244 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4, output_height_gt_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35245 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 35246 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35247 | DWConv2DMicrokernelTester() |
| 35248 | .input_width(input_width) |
| 35249 | .input_height(input_height) |
| 35250 | .kernel_height(5) |
| 35251 | .kernel_width(5) |
| 35252 | .subsampling(2) |
| 35253 | .padding_left(2) |
| 35254 | .padding_right(2) |
| 35255 | .padding_top(2) |
| 35256 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35257 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35258 | } |
| 35259 | } |
| 35260 | } |
| 35261 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35262 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35263 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 35264 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35265 | DWConv2DMicrokernelTester() |
| 35266 | .input_width(input_width) |
| 35267 | .input_height(input_height) |
| 35268 | .kernel_height(5) |
| 35269 | .kernel_width(5) |
| 35270 | .subsampling(2) |
| 35271 | .padding_left(2) |
| 35272 | .padding_right(2) |
| 35273 | .padding_top(1) |
| 35274 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35275 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35276 | } |
| 35277 | } |
| 35278 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35279 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35280 | |
| 35281 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35282 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35283 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35284 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 35285 | DWConv2DMicrokernelTester() |
| 35286 | .input_width(input_width) |
| 35287 | .input_height(6) |
| 35288 | .kernel_height(5) |
| 35289 | .kernel_width(5) |
| 35290 | .subsampling(2) |
| 35291 | .padding_left(2) |
| 35292 | .padding_right(2) |
| 35293 | .padding_top(2) |
| 35294 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35295 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35296 | } |
| 35297 | } |
| 35298 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35299 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35300 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 35301 | DWConv2DMicrokernelTester() |
| 35302 | .input_width(input_width) |
| 35303 | .input_height(6) |
| 35304 | .kernel_height(5) |
| 35305 | .kernel_width(5) |
| 35306 | .subsampling(2) |
| 35307 | .padding_left(2) |
| 35308 | .padding_right(2) |
| 35309 | .padding_top(2) |
| 35310 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35311 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35312 | } |
| 35313 | } |
| 35314 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35315 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35316 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 35317 | DWConv2DMicrokernelTester() |
| 35318 | .input_width(8) |
| 35319 | .input_height(6) |
| 35320 | .kernel_height(5) |
| 35321 | .kernel_width(5) |
| 35322 | .subsampling(2) |
| 35323 | .padding_left(2) |
| 35324 | .padding_right(2) |
| 35325 | .padding_top(2) |
| 35326 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35327 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35328 | } |
| 35329 | } |
| 35330 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35331 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35332 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 35333 | DWConv2DMicrokernelTester() |
| 35334 | .input_width(input_width) |
| 35335 | .input_height(6) |
| 35336 | .kernel_height(5) |
| 35337 | .kernel_width(5) |
| 35338 | .subsampling(2) |
| 35339 | .padding_left(2) |
| 35340 | .padding_right(2) |
| 35341 | .padding_top(2) |
| 35342 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35343 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35344 | } |
| 35345 | } |
| 35346 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35347 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4, output_height_eq_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35348 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 35349 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35350 | DWConv2DMicrokernelTester() |
| 35351 | .input_width(input_width) |
| 35352 | .input_height(input_height) |
| 35353 | .kernel_height(5) |
| 35354 | .kernel_width(5) |
| 35355 | .subsampling(2) |
| 35356 | .padding_left(2) |
| 35357 | .padding_right(2) |
| 35358 | .padding_top(2) |
| 35359 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35360 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35361 | } |
| 35362 | } |
| 35363 | } |
| 35364 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35365 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4, output_height_div_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35366 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 35367 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35368 | DWConv2DMicrokernelTester() |
| 35369 | .input_width(input_width) |
| 35370 | .input_height(input_height) |
| 35371 | .kernel_height(5) |
| 35372 | .kernel_width(5) |
| 35373 | .subsampling(2) |
| 35374 | .padding_left(2) |
| 35375 | .padding_right(2) |
| 35376 | .padding_top(2) |
| 35377 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35378 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35379 | } |
| 35380 | } |
| 35381 | } |
| 35382 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35383 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4, output_height_lt_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35384 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 35385 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35386 | DWConv2DMicrokernelTester() |
| 35387 | .input_width(input_width) |
| 35388 | .input_height(input_height) |
| 35389 | .kernel_height(5) |
| 35390 | .kernel_width(5) |
| 35391 | .subsampling(2) |
| 35392 | .padding_left(2) |
| 35393 | .padding_right(2) |
| 35394 | .padding_top(2) |
| 35395 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35396 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35397 | } |
| 35398 | } |
| 35399 | } |
| 35400 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35401 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4, output_height_gt_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35402 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 35403 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35404 | DWConv2DMicrokernelTester() |
| 35405 | .input_width(input_width) |
| 35406 | .input_height(input_height) |
| 35407 | .kernel_height(5) |
| 35408 | .kernel_width(5) |
| 35409 | .subsampling(2) |
| 35410 | .padding_left(2) |
| 35411 | .padding_right(2) |
| 35412 | .padding_top(2) |
| 35413 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35414 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35415 | } |
| 35416 | } |
| 35417 | } |
| 35418 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35419 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35420 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 35421 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35422 | DWConv2DMicrokernelTester() |
| 35423 | .input_width(input_width) |
| 35424 | .input_height(input_height) |
| 35425 | .kernel_height(5) |
| 35426 | .kernel_width(5) |
| 35427 | .subsampling(2) |
| 35428 | .padding_left(2) |
| 35429 | .padding_right(2) |
| 35430 | .padding_top(1) |
| 35431 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35432 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35433 | } |
| 35434 | } |
| 35435 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35436 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35437 | |
| 35438 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35439 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35440 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35441 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 35442 | DWConv2DMicrokernelTester() |
| 35443 | .input_width(input_width) |
| 35444 | .input_height(2) |
| 35445 | .kernel_height(5) |
| 35446 | .kernel_width(5) |
| 35447 | .subsampling(2) |
| 35448 | .padding_left(2) |
| 35449 | .padding_right(2) |
| 35450 | .padding_top(2) |
| 35451 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35452 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35453 | } |
| 35454 | } |
| 35455 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35456 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35457 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 35458 | DWConv2DMicrokernelTester() |
| 35459 | .input_width(input_width) |
| 35460 | .input_height(2) |
| 35461 | .kernel_height(5) |
| 35462 | .kernel_width(5) |
| 35463 | .subsampling(2) |
| 35464 | .padding_left(2) |
| 35465 | .padding_right(2) |
| 35466 | .padding_top(2) |
| 35467 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35468 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35469 | } |
| 35470 | } |
| 35471 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35472 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35473 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 35474 | DWConv2DMicrokernelTester() |
| 35475 | .input_width(8) |
| 35476 | .input_height(2) |
| 35477 | .kernel_height(5) |
| 35478 | .kernel_width(5) |
| 35479 | .subsampling(2) |
| 35480 | .padding_left(2) |
| 35481 | .padding_right(2) |
| 35482 | .padding_top(2) |
| 35483 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35484 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35485 | } |
| 35486 | } |
| 35487 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35488 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC2, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35489 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 35490 | DWConv2DMicrokernelTester() |
| 35491 | .input_width(input_width) |
| 35492 | .input_height(2) |
| 35493 | .kernel_height(5) |
| 35494 | .kernel_width(5) |
| 35495 | .subsampling(2) |
| 35496 | .padding_left(2) |
| 35497 | .padding_right(2) |
| 35498 | .padding_top(2) |
| 35499 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35500 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35501 | } |
| 35502 | } |
| 35503 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35504 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC2, output_height_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35505 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 35506 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35507 | DWConv2DMicrokernelTester() |
| 35508 | .input_width(input_width) |
| 35509 | .input_height(input_height) |
| 35510 | .kernel_height(5) |
| 35511 | .kernel_width(5) |
| 35512 | .subsampling(2) |
| 35513 | .padding_left(2) |
| 35514 | .padding_right(2) |
| 35515 | .padding_top(2) |
| 35516 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35517 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35518 | } |
| 35519 | } |
| 35520 | } |
| 35521 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35522 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC2, output_height_gt_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35523 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 35524 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35525 | DWConv2DMicrokernelTester() |
| 35526 | .input_width(input_width) |
| 35527 | .input_height(input_height) |
| 35528 | .kernel_height(5) |
| 35529 | .kernel_width(5) |
| 35530 | .subsampling(2) |
| 35531 | .padding_left(2) |
| 35532 | .padding_right(2) |
| 35533 | .padding_top(2) |
| 35534 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35535 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35536 | } |
| 35537 | } |
| 35538 | } |
| 35539 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35540 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC2, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35541 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 35542 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35543 | DWConv2DMicrokernelTester() |
| 35544 | .input_width(input_width) |
| 35545 | .input_height(input_height) |
| 35546 | .kernel_height(5) |
| 35547 | .kernel_width(5) |
| 35548 | .subsampling(2) |
| 35549 | .padding_left(2) |
| 35550 | .padding_right(2) |
| 35551 | .padding_top(1) |
| 35552 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35553 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35554 | } |
| 35555 | } |
| 35556 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35557 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35558 | |
| 35559 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35560 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35561 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35562 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 35563 | DWConv2DMicrokernelTester() |
| 35564 | .input_width(input_width) |
| 35565 | .input_height(2) |
| 35566 | .kernel_height(5) |
| 35567 | .kernel_width(5) |
| 35568 | .subsampling(2) |
| 35569 | .padding_left(2) |
| 35570 | .padding_right(2) |
| 35571 | .padding_top(2) |
| 35572 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35573 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35574 | } |
| 35575 | } |
| 35576 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35577 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35578 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 35579 | DWConv2DMicrokernelTester() |
| 35580 | .input_width(input_width) |
| 35581 | .input_height(2) |
| 35582 | .kernel_height(5) |
| 35583 | .kernel_width(5) |
| 35584 | .subsampling(2) |
| 35585 | .padding_left(2) |
| 35586 | .padding_right(2) |
| 35587 | .padding_top(2) |
| 35588 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35589 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35590 | } |
| 35591 | } |
| 35592 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35593 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35594 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 35595 | DWConv2DMicrokernelTester() |
| 35596 | .input_width(8) |
| 35597 | .input_height(2) |
| 35598 | .kernel_height(5) |
| 35599 | .kernel_width(5) |
| 35600 | .subsampling(2) |
| 35601 | .padding_left(2) |
| 35602 | .padding_right(2) |
| 35603 | .padding_top(2) |
| 35604 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35605 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35606 | } |
| 35607 | } |
| 35608 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35609 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC3, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35610 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 35611 | DWConv2DMicrokernelTester() |
| 35612 | .input_width(input_width) |
| 35613 | .input_height(2) |
| 35614 | .kernel_height(5) |
| 35615 | .kernel_width(5) |
| 35616 | .subsampling(2) |
| 35617 | .padding_left(2) |
| 35618 | .padding_right(2) |
| 35619 | .padding_top(2) |
| 35620 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35621 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35622 | } |
| 35623 | } |
| 35624 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35625 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC3, output_height_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35626 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 35627 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35628 | DWConv2DMicrokernelTester() |
| 35629 | .input_width(input_width) |
| 35630 | .input_height(input_height) |
| 35631 | .kernel_height(5) |
| 35632 | .kernel_width(5) |
| 35633 | .subsampling(2) |
| 35634 | .padding_left(2) |
| 35635 | .padding_right(2) |
| 35636 | .padding_top(2) |
| 35637 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35638 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35639 | } |
| 35640 | } |
| 35641 | } |
| 35642 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35643 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC3, output_height_gt_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35644 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 35645 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35646 | DWConv2DMicrokernelTester() |
| 35647 | .input_width(input_width) |
| 35648 | .input_height(input_height) |
| 35649 | .kernel_height(5) |
| 35650 | .kernel_width(5) |
| 35651 | .subsampling(2) |
| 35652 | .padding_left(2) |
| 35653 | .padding_right(2) |
| 35654 | .padding_top(2) |
| 35655 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35656 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35657 | } |
| 35658 | } |
| 35659 | } |
| 35660 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35661 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC3, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35662 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 35663 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35664 | DWConv2DMicrokernelTester() |
| 35665 | .input_width(input_width) |
| 35666 | .input_height(input_height) |
| 35667 | .kernel_height(5) |
| 35668 | .kernel_width(5) |
| 35669 | .subsampling(2) |
| 35670 | .padding_left(2) |
| 35671 | .padding_right(2) |
| 35672 | .padding_top(1) |
| 35673 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35674 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35675 | } |
| 35676 | } |
| 35677 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35678 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35679 | |
| 35680 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35681 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35682 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35683 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 35684 | DWConv2DMicrokernelTester() |
| 35685 | .input_width(input_width) |
| 35686 | .input_height(2) |
| 35687 | .kernel_height(5) |
| 35688 | .kernel_width(5) |
| 35689 | .subsampling(2) |
| 35690 | .padding_left(2) |
| 35691 | .padding_right(2) |
| 35692 | .padding_top(2) |
| 35693 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35694 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35695 | } |
| 35696 | } |
| 35697 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35698 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35699 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 35700 | DWConv2DMicrokernelTester() |
| 35701 | .input_width(input_width) |
| 35702 | .input_height(2) |
| 35703 | .kernel_height(5) |
| 35704 | .kernel_width(5) |
| 35705 | .subsampling(2) |
| 35706 | .padding_left(2) |
| 35707 | .padding_right(2) |
| 35708 | .padding_top(2) |
| 35709 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35710 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35711 | } |
| 35712 | } |
| 35713 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35714 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35715 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 35716 | DWConv2DMicrokernelTester() |
| 35717 | .input_width(8) |
| 35718 | .input_height(2) |
| 35719 | .kernel_height(5) |
| 35720 | .kernel_width(5) |
| 35721 | .subsampling(2) |
| 35722 | .padding_left(2) |
| 35723 | .padding_right(2) |
| 35724 | .padding_top(2) |
| 35725 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35726 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35727 | } |
| 35728 | } |
| 35729 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35730 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC4, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35731 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 35732 | DWConv2DMicrokernelTester() |
| 35733 | .input_width(input_width) |
| 35734 | .input_height(2) |
| 35735 | .kernel_height(5) |
| 35736 | .kernel_width(5) |
| 35737 | .subsampling(2) |
| 35738 | .padding_left(2) |
| 35739 | .padding_right(2) |
| 35740 | .padding_top(2) |
| 35741 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35742 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35743 | } |
| 35744 | } |
| 35745 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35746 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC4, output_height_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35747 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 35748 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35749 | DWConv2DMicrokernelTester() |
| 35750 | .input_width(input_width) |
| 35751 | .input_height(input_height) |
| 35752 | .kernel_height(5) |
| 35753 | .kernel_width(5) |
| 35754 | .subsampling(2) |
| 35755 | .padding_left(2) |
| 35756 | .padding_right(2) |
| 35757 | .padding_top(2) |
| 35758 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35759 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35760 | } |
| 35761 | } |
| 35762 | } |
| 35763 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35764 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC4, output_height_gt_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35765 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 35766 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35767 | DWConv2DMicrokernelTester() |
| 35768 | .input_width(input_width) |
| 35769 | .input_height(input_height) |
| 35770 | .kernel_height(5) |
| 35771 | .kernel_width(5) |
| 35772 | .subsampling(2) |
| 35773 | .padding_left(2) |
| 35774 | .padding_right(2) |
| 35775 | .padding_top(2) |
| 35776 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35777 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35778 | } |
| 35779 | } |
| 35780 | } |
| 35781 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35782 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC4, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35783 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 35784 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35785 | DWConv2DMicrokernelTester() |
| 35786 | .input_width(input_width) |
| 35787 | .input_height(input_height) |
| 35788 | .kernel_height(5) |
| 35789 | .kernel_width(5) |
| 35790 | .subsampling(2) |
| 35791 | .padding_left(2) |
| 35792 | .padding_right(2) |
| 35793 | .padding_top(1) |
| 35794 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35795 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc4); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35796 | } |
| 35797 | } |
| 35798 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35799 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35800 | |
| 35801 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35802 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35803 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC5, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35804 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 35805 | DWConv2DMicrokernelTester() |
| 35806 | .input_width(input_width) |
| 35807 | .input_height(2) |
| 35808 | .kernel_height(5) |
| 35809 | .kernel_width(5) |
| 35810 | .subsampling(2) |
| 35811 | .padding_left(2) |
| 35812 | .padding_right(2) |
| 35813 | .padding_top(2) |
| 35814 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35815 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35816 | } |
| 35817 | } |
| 35818 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35819 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC5, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35820 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 35821 | DWConv2DMicrokernelTester() |
| 35822 | .input_width(input_width) |
| 35823 | .input_height(2) |
| 35824 | .kernel_height(5) |
| 35825 | .kernel_width(5) |
| 35826 | .subsampling(2) |
| 35827 | .padding_left(2) |
| 35828 | .padding_right(2) |
| 35829 | .padding_top(2) |
| 35830 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35831 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35832 | } |
| 35833 | } |
| 35834 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35835 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC5, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35836 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 35837 | DWConv2DMicrokernelTester() |
| 35838 | .input_width(8) |
| 35839 | .input_height(2) |
| 35840 | .kernel_height(5) |
| 35841 | .kernel_width(5) |
| 35842 | .subsampling(2) |
| 35843 | .padding_left(2) |
| 35844 | .padding_right(2) |
| 35845 | .padding_top(2) |
| 35846 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35847 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35848 | } |
| 35849 | } |
| 35850 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35851 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC5, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35852 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 35853 | DWConv2DMicrokernelTester() |
| 35854 | .input_width(input_width) |
| 35855 | .input_height(2) |
| 35856 | .kernel_height(5) |
| 35857 | .kernel_width(5) |
| 35858 | .subsampling(2) |
| 35859 | .padding_left(2) |
| 35860 | .padding_right(2) |
| 35861 | .padding_top(2) |
| 35862 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35863 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35864 | } |
| 35865 | } |
| 35866 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35867 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC5, output_height_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35868 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 35869 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35870 | DWConv2DMicrokernelTester() |
| 35871 | .input_width(input_width) |
| 35872 | .input_height(input_height) |
| 35873 | .kernel_height(5) |
| 35874 | .kernel_width(5) |
| 35875 | .subsampling(2) |
| 35876 | .padding_left(2) |
| 35877 | .padding_right(2) |
| 35878 | .padding_top(2) |
| 35879 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35880 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35881 | } |
| 35882 | } |
| 35883 | } |
| 35884 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35885 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC5, output_height_gt_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35886 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 35887 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35888 | DWConv2DMicrokernelTester() |
| 35889 | .input_width(input_width) |
| 35890 | .input_height(input_height) |
| 35891 | .kernel_height(5) |
| 35892 | .kernel_width(5) |
| 35893 | .subsampling(2) |
| 35894 | .padding_left(2) |
| 35895 | .padding_right(2) |
| 35896 | .padding_top(2) |
| 35897 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35898 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35899 | } |
| 35900 | } |
| 35901 | } |
| 35902 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35903 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_1X4_ACC5, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35904 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 35905 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35906 | DWConv2DMicrokernelTester() |
| 35907 | .input_width(input_width) |
| 35908 | .input_height(input_height) |
| 35909 | .kernel_height(5) |
| 35910 | .kernel_width(5) |
| 35911 | .subsampling(2) |
| 35912 | .padding_left(2) |
| 35913 | .padding_right(2) |
| 35914 | .padding_top(1) |
| 35915 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35916 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc5); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35917 | } |
| 35918 | } |
| 35919 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35920 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35921 | |
| 35922 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 35923 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35924 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35925 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 35926 | DWConv2DMicrokernelTester() |
| 35927 | .input_width(input_width) |
| 35928 | .input_height(4) |
| 35929 | .kernel_height(5) |
| 35930 | .kernel_width(5) |
| 35931 | .subsampling(2) |
| 35932 | .padding_left(2) |
| 35933 | .padding_right(2) |
| 35934 | .padding_top(2) |
| 35935 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35936 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35937 | } |
| 35938 | } |
| 35939 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35940 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35941 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 35942 | DWConv2DMicrokernelTester() |
| 35943 | .input_width(input_width) |
| 35944 | .input_height(4) |
| 35945 | .kernel_height(5) |
| 35946 | .kernel_width(5) |
| 35947 | .subsampling(2) |
| 35948 | .padding_left(2) |
| 35949 | .padding_right(2) |
| 35950 | .padding_top(2) |
| 35951 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35952 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35953 | } |
| 35954 | } |
| 35955 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35956 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35957 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 35958 | DWConv2DMicrokernelTester() |
| 35959 | .input_width(8) |
| 35960 | .input_height(4) |
| 35961 | .kernel_height(5) |
| 35962 | .kernel_width(5) |
| 35963 | .subsampling(2) |
| 35964 | .padding_left(2) |
| 35965 | .padding_right(2) |
| 35966 | .padding_top(2) |
| 35967 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35968 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35969 | } |
| 35970 | } |
| 35971 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35972 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35973 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 35974 | DWConv2DMicrokernelTester() |
| 35975 | .input_width(input_width) |
| 35976 | .input_height(4) |
| 35977 | .kernel_height(5) |
| 35978 | .kernel_width(5) |
| 35979 | .subsampling(2) |
| 35980 | .padding_left(2) |
| 35981 | .padding_right(2) |
| 35982 | .padding_top(2) |
| 35983 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35984 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35985 | } |
| 35986 | } |
| 35987 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 35988 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_eq_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 35989 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 35990 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 35991 | DWConv2DMicrokernelTester() |
| 35992 | .input_width(input_width) |
| 35993 | .input_height(input_height) |
| 35994 | .kernel_height(5) |
| 35995 | .kernel_width(5) |
| 35996 | .subsampling(2) |
| 35997 | .padding_left(2) |
| 35998 | .padding_right(2) |
| 35999 | .padding_top(2) |
| 36000 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36001 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36002 | } |
| 36003 | } |
| 36004 | } |
| 36005 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36006 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_div_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36007 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 36008 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36009 | DWConv2DMicrokernelTester() |
| 36010 | .input_width(input_width) |
| 36011 | .input_height(input_height) |
| 36012 | .kernel_height(5) |
| 36013 | .kernel_width(5) |
| 36014 | .subsampling(2) |
| 36015 | .padding_left(2) |
| 36016 | .padding_right(2) |
| 36017 | .padding_top(2) |
| 36018 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36019 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36020 | } |
| 36021 | } |
| 36022 | } |
| 36023 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36024 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_lt_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36025 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 36026 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36027 | DWConv2DMicrokernelTester() |
| 36028 | .input_width(input_width) |
| 36029 | .input_height(input_height) |
| 36030 | .kernel_height(5) |
| 36031 | .kernel_width(5) |
| 36032 | .subsampling(2) |
| 36033 | .padding_left(2) |
| 36034 | .padding_right(2) |
| 36035 | .padding_top(2) |
| 36036 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36037 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36038 | } |
| 36039 | } |
| 36040 | } |
| 36041 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36042 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC2, output_height_gt_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36043 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 36044 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36045 | DWConv2DMicrokernelTester() |
| 36046 | .input_width(input_width) |
| 36047 | .input_height(input_height) |
| 36048 | .kernel_height(5) |
| 36049 | .kernel_width(5) |
| 36050 | .subsampling(2) |
| 36051 | .padding_left(2) |
| 36052 | .padding_right(2) |
| 36053 | .padding_top(2) |
| 36054 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36055 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36056 | } |
| 36057 | } |
| 36058 | } |
| 36059 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36060 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC2, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36061 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 36062 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36063 | DWConv2DMicrokernelTester() |
| 36064 | .input_width(input_width) |
| 36065 | .input_height(input_height) |
| 36066 | .kernel_height(5) |
| 36067 | .kernel_width(5) |
| 36068 | .subsampling(2) |
| 36069 | .padding_left(2) |
| 36070 | .padding_right(2) |
| 36071 | .padding_top(1) |
| 36072 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36073 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36074 | } |
| 36075 | } |
| 36076 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 36077 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36078 | |
| 36079 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 36080 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36081 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36082 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 36083 | DWConv2DMicrokernelTester() |
| 36084 | .input_width(input_width) |
| 36085 | .input_height(4) |
| 36086 | .kernel_height(5) |
| 36087 | .kernel_width(5) |
| 36088 | .subsampling(2) |
| 36089 | .padding_left(2) |
| 36090 | .padding_right(2) |
| 36091 | .padding_top(2) |
| 36092 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36093 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36094 | } |
| 36095 | } |
| 36096 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36097 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36098 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 36099 | DWConv2DMicrokernelTester() |
| 36100 | .input_width(input_width) |
| 36101 | .input_height(4) |
| 36102 | .kernel_height(5) |
| 36103 | .kernel_width(5) |
| 36104 | .subsampling(2) |
| 36105 | .padding_left(2) |
| 36106 | .padding_right(2) |
| 36107 | .padding_top(2) |
| 36108 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36109 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36110 | } |
| 36111 | } |
| 36112 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36113 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36114 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 36115 | DWConv2DMicrokernelTester() |
| 36116 | .input_width(8) |
| 36117 | .input_height(4) |
| 36118 | .kernel_height(5) |
| 36119 | .kernel_width(5) |
| 36120 | .subsampling(2) |
| 36121 | .padding_left(2) |
| 36122 | .padding_right(2) |
| 36123 | .padding_top(2) |
| 36124 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36125 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36126 | } |
| 36127 | } |
| 36128 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36129 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36130 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 36131 | DWConv2DMicrokernelTester() |
| 36132 | .input_width(input_width) |
| 36133 | .input_height(4) |
| 36134 | .kernel_height(5) |
| 36135 | .kernel_width(5) |
| 36136 | .subsampling(2) |
| 36137 | .padding_left(2) |
| 36138 | .padding_right(2) |
| 36139 | .padding_top(2) |
| 36140 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36141 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36142 | } |
| 36143 | } |
| 36144 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36145 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_height_eq_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36146 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 36147 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36148 | DWConv2DMicrokernelTester() |
| 36149 | .input_width(input_width) |
| 36150 | .input_height(input_height) |
| 36151 | .kernel_height(5) |
| 36152 | .kernel_width(5) |
| 36153 | .subsampling(2) |
| 36154 | .padding_left(2) |
| 36155 | .padding_right(2) |
| 36156 | .padding_top(2) |
| 36157 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36158 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36159 | } |
| 36160 | } |
| 36161 | } |
| 36162 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36163 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_height_div_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36164 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 36165 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36166 | DWConv2DMicrokernelTester() |
| 36167 | .input_width(input_width) |
| 36168 | .input_height(input_height) |
| 36169 | .kernel_height(5) |
| 36170 | .kernel_width(5) |
| 36171 | .subsampling(2) |
| 36172 | .padding_left(2) |
| 36173 | .padding_right(2) |
| 36174 | .padding_top(2) |
| 36175 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36176 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36177 | } |
| 36178 | } |
| 36179 | } |
| 36180 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36181 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_height_lt_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36182 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 36183 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36184 | DWConv2DMicrokernelTester() |
| 36185 | .input_width(input_width) |
| 36186 | .input_height(input_height) |
| 36187 | .kernel_height(5) |
| 36188 | .kernel_width(5) |
| 36189 | .subsampling(2) |
| 36190 | .padding_left(2) |
| 36191 | .padding_right(2) |
| 36192 | .padding_top(2) |
| 36193 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36194 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36195 | } |
| 36196 | } |
| 36197 | } |
| 36198 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36199 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC3, output_height_gt_2) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36200 | for (size_t input_height = 5; input_height < 9; input_height++) { |
| 36201 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36202 | DWConv2DMicrokernelTester() |
| 36203 | .input_width(input_width) |
| 36204 | .input_height(input_height) |
| 36205 | .kernel_height(5) |
| 36206 | .kernel_width(5) |
| 36207 | .subsampling(2) |
| 36208 | .padding_left(2) |
| 36209 | .padding_right(2) |
| 36210 | .padding_top(2) |
| 36211 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36212 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36213 | } |
| 36214 | } |
| 36215 | } |
| 36216 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36217 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_2X4_ACC3, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36218 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 36219 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36220 | DWConv2DMicrokernelTester() |
| 36221 | .input_width(input_width) |
| 36222 | .input_height(input_height) |
| 36223 | .kernel_height(5) |
| 36224 | .kernel_width(5) |
| 36225 | .subsampling(2) |
| 36226 | .padding_left(2) |
| 36227 | .padding_right(2) |
| 36228 | .padding_top(1) |
| 36229 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36230 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc3); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36231 | } |
| 36232 | } |
| 36233 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 36234 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36235 | |
| 36236 | |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 36237 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36238 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_width_eq_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36239 | for (size_t input_width = 7; input_width < 9; input_width++) { |
| 36240 | DWConv2DMicrokernelTester() |
| 36241 | .input_width(input_width) |
| 36242 | .input_height(6) |
| 36243 | .kernel_height(5) |
| 36244 | .kernel_width(5) |
| 36245 | .subsampling(2) |
| 36246 | .padding_left(2) |
| 36247 | .padding_right(2) |
| 36248 | .padding_top(2) |
| 36249 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36250 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36251 | } |
| 36252 | } |
| 36253 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36254 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_width_div_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36255 | for (size_t input_width = 16; input_width < 64; input_width += 8) { |
| 36256 | DWConv2DMicrokernelTester() |
| 36257 | .input_width(input_width) |
| 36258 | .input_height(6) |
| 36259 | .kernel_height(5) |
| 36260 | .kernel_width(5) |
| 36261 | .subsampling(2) |
| 36262 | .padding_left(2) |
| 36263 | .padding_right(2) |
| 36264 | .padding_top(2) |
| 36265 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36266 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36267 | } |
| 36268 | } |
| 36269 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36270 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_width_lt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36271 | for (size_t input_width = 1; input_width < 7; input_width++) { |
| 36272 | DWConv2DMicrokernelTester() |
| 36273 | .input_width(8) |
| 36274 | .input_height(6) |
| 36275 | .kernel_height(5) |
| 36276 | .kernel_width(5) |
| 36277 | .subsampling(2) |
| 36278 | .padding_left(2) |
| 36279 | .padding_right(2) |
| 36280 | .padding_top(2) |
| 36281 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36282 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36283 | } |
| 36284 | } |
| 36285 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36286 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_width_gt_4) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36287 | for (size_t input_width = 9; input_width < 17; input_width++) { |
| 36288 | DWConv2DMicrokernelTester() |
| 36289 | .input_width(input_width) |
| 36290 | .input_height(6) |
| 36291 | .kernel_height(5) |
| 36292 | .kernel_width(5) |
| 36293 | .subsampling(2) |
| 36294 | .padding_left(2) |
| 36295 | .padding_right(2) |
| 36296 | .padding_top(2) |
| 36297 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36298 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36299 | } |
| 36300 | } |
| 36301 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36302 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_height_eq_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36303 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 36304 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36305 | DWConv2DMicrokernelTester() |
| 36306 | .input_width(input_width) |
| 36307 | .input_height(input_height) |
| 36308 | .kernel_height(5) |
| 36309 | .kernel_width(5) |
| 36310 | .subsampling(2) |
| 36311 | .padding_left(2) |
| 36312 | .padding_right(2) |
| 36313 | .padding_top(2) |
| 36314 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36315 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36316 | } |
| 36317 | } |
| 36318 | } |
| 36319 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36320 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_height_div_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36321 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 36322 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36323 | DWConv2DMicrokernelTester() |
| 36324 | .input_width(input_width) |
| 36325 | .input_height(input_height) |
| 36326 | .kernel_height(5) |
| 36327 | .kernel_width(5) |
| 36328 | .subsampling(2) |
| 36329 | .padding_left(2) |
| 36330 | .padding_right(2) |
| 36331 | .padding_top(2) |
| 36332 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36333 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36334 | } |
| 36335 | } |
| 36336 | } |
| 36337 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36338 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_height_lt_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36339 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 36340 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36341 | DWConv2DMicrokernelTester() |
| 36342 | .input_width(input_width) |
| 36343 | .input_height(input_height) |
| 36344 | .kernel_height(5) |
| 36345 | .kernel_width(5) |
| 36346 | .subsampling(2) |
| 36347 | .padding_left(2) |
| 36348 | .padding_right(2) |
| 36349 | .padding_top(2) |
| 36350 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36351 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36352 | } |
| 36353 | } |
| 36354 | } |
| 36355 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36356 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4_ACC2, output_height_gt_3) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36357 | for (size_t input_height = 7; input_height < 13; input_height++) { |
| 36358 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36359 | DWConv2DMicrokernelTester() |
| 36360 | .input_width(input_width) |
| 36361 | .input_height(input_height) |
| 36362 | .kernel_height(5) |
| 36363 | .kernel_width(5) |
| 36364 | .subsampling(2) |
| 36365 | .padding_left(2) |
| 36366 | .padding_right(2) |
| 36367 | .padding_top(2) |
| 36368 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36369 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36370 | } |
| 36371 | } |
| 36372 | } |
| 36373 | |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36374 | TEST(F32_DWCONV2D_CHW_5X5S2P2__WASMSIMD_X86_SPLAT_3X4_ACC2, padding_top_eq_1) { |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36375 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 36376 | for (size_t input_width = 1; input_width < 41; input_width += 7) { |
| 36377 | DWConv2DMicrokernelTester() |
| 36378 | .input_width(input_width) |
| 36379 | .input_height(input_height) |
| 36380 | .kernel_height(5) |
| 36381 | .kernel_width(5) |
| 36382 | .subsampling(2) |
| 36383 | .padding_left(2) |
| 36384 | .padding_right(2) |
| 36385 | .padding_top(1) |
| 36386 | .padding_bottom(2) |
| Frank Barchard | 412e2f4 | 2020-12-11 11:40:50 -0800 | [diff] [blame] | 36387 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4_acc2); |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36388 | } |
| 36389 | } |
| 36390 | } |
| Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 36391 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
| Frank Barchard | e7223ee | 2020-12-04 19:04:01 -0800 | [diff] [blame] | 36392 | |
| 36393 | |
| Marat Dukhan | 91249d2 | 2020-10-24 12:02:51 -0700 | [diff] [blame] | 36394 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_1X1, output_width_eq_1) { |
| 36395 | DWConv2DMicrokernelTester() |
| 36396 | .input_width(1) |
| 36397 | .input_height(1) |
| 36398 | .kernel_height(3) |
| 36399 | .kernel_width(3) |
| 36400 | .subsampling(1) |
| 36401 | .padding_left(1) |
| 36402 | .padding_right(1) |
| 36403 | .padding_top(1) |
| 36404 | .padding_bottom(1) |
| 36405 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36406 | } |
| 36407 | |
| 36408 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_1X1, output_width_gt_1) { |
| 36409 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 36410 | DWConv2DMicrokernelTester() |
| 36411 | .input_width(input_width) |
| 36412 | .input_height(1) |
| 36413 | .kernel_height(3) |
| 36414 | .kernel_width(3) |
| 36415 | .subsampling(1) |
| 36416 | .padding_left(1) |
| 36417 | .padding_right(1) |
| 36418 | .padding_top(1) |
| 36419 | .padding_bottom(1) |
| 36420 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36421 | } |
| 36422 | } |
| 36423 | |
| 36424 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_1X1, output_height_gt_1) { |
| 36425 | for (size_t input_height = 2; input_height < 6; input_height++) { |
| 36426 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36427 | DWConv2DMicrokernelTester() |
| 36428 | .input_width(input_width) |
| 36429 | .input_height(input_height) |
| 36430 | .kernel_height(3) |
| 36431 | .kernel_width(3) |
| 36432 | .subsampling(1) |
| 36433 | .padding_left(1) |
| 36434 | .padding_right(1) |
| 36435 | .padding_top(1) |
| 36436 | .padding_bottom(1) |
| 36437 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36438 | } |
| 36439 | } |
| 36440 | } |
| 36441 | |
| 36442 | |
| 36443 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_2X1, output_width_eq_1) { |
| 36444 | DWConv2DMicrokernelTester() |
| 36445 | .input_width(1) |
| 36446 | .input_height(2) |
| 36447 | .kernel_height(3) |
| 36448 | .kernel_width(3) |
| 36449 | .subsampling(1) |
| 36450 | .padding_left(1) |
| 36451 | .padding_right(1) |
| 36452 | .padding_top(1) |
| 36453 | .padding_bottom(1) |
| 36454 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36455 | } |
| 36456 | |
| 36457 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_2X1, output_width_gt_1) { |
| 36458 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 36459 | DWConv2DMicrokernelTester() |
| 36460 | .input_width(input_width) |
| 36461 | .input_height(2) |
| 36462 | .kernel_height(3) |
| 36463 | .kernel_width(3) |
| 36464 | .subsampling(1) |
| 36465 | .padding_left(1) |
| 36466 | .padding_right(1) |
| 36467 | .padding_top(1) |
| 36468 | .padding_bottom(1) |
| 36469 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36470 | } |
| 36471 | } |
| 36472 | |
| 36473 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_2X1, output_height_div_2) { |
| 36474 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 36475 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36476 | DWConv2DMicrokernelTester() |
| 36477 | .input_width(input_width) |
| 36478 | .input_height(input_height) |
| 36479 | .kernel_height(3) |
| 36480 | .kernel_width(3) |
| 36481 | .subsampling(1) |
| 36482 | .padding_left(1) |
| 36483 | .padding_right(1) |
| 36484 | .padding_top(1) |
| 36485 | .padding_bottom(1) |
| 36486 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36487 | } |
| 36488 | } |
| 36489 | } |
| 36490 | |
| 36491 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_2X1, output_height_lt_2) { |
| 36492 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 36493 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36494 | DWConv2DMicrokernelTester() |
| 36495 | .input_width(input_width) |
| 36496 | .input_height(input_height) |
| 36497 | .kernel_height(3) |
| 36498 | .kernel_width(3) |
| 36499 | .subsampling(1) |
| 36500 | .padding_left(1) |
| 36501 | .padding_right(1) |
| 36502 | .padding_top(1) |
| 36503 | .padding_bottom(1) |
| 36504 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36505 | } |
| 36506 | } |
| 36507 | } |
| 36508 | |
| 36509 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_2X1, output_height_gt_2) { |
| 36510 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 36511 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36512 | DWConv2DMicrokernelTester() |
| 36513 | .input_width(input_width) |
| 36514 | .input_height(input_height) |
| 36515 | .kernel_height(3) |
| 36516 | .kernel_width(3) |
| 36517 | .subsampling(1) |
| 36518 | .padding_left(1) |
| 36519 | .padding_right(1) |
| 36520 | .padding_top(1) |
| 36521 | .padding_bottom(1) |
| 36522 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36523 | } |
| 36524 | } |
| 36525 | } |
| 36526 | |
| 36527 | |
| 36528 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_3X1, output_width_eq_1) { |
| 36529 | DWConv2DMicrokernelTester() |
| 36530 | .input_width(1) |
| 36531 | .input_height(3) |
| 36532 | .kernel_height(3) |
| 36533 | .kernel_width(3) |
| 36534 | .subsampling(1) |
| 36535 | .padding_left(1) |
| 36536 | .padding_right(1) |
| 36537 | .padding_top(1) |
| 36538 | .padding_bottom(1) |
| 36539 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36540 | } |
| 36541 | |
| 36542 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_3X1, output_width_gt_1) { |
| 36543 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 36544 | DWConv2DMicrokernelTester() |
| 36545 | .input_width(input_width) |
| 36546 | .input_height(3) |
| 36547 | .kernel_height(3) |
| 36548 | .kernel_width(3) |
| 36549 | .subsampling(1) |
| 36550 | .padding_left(1) |
| 36551 | .padding_right(1) |
| 36552 | .padding_top(1) |
| 36553 | .padding_bottom(1) |
| 36554 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36555 | } |
| 36556 | } |
| 36557 | |
| 36558 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_3X1, output_height_div_3) { |
| 36559 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 36560 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36561 | DWConv2DMicrokernelTester() |
| 36562 | .input_width(input_width) |
| 36563 | .input_height(input_height) |
| 36564 | .kernel_height(3) |
| 36565 | .kernel_width(3) |
| 36566 | .subsampling(1) |
| 36567 | .padding_left(1) |
| 36568 | .padding_right(1) |
| 36569 | .padding_top(1) |
| 36570 | .padding_bottom(1) |
| 36571 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36572 | } |
| 36573 | } |
| 36574 | } |
| 36575 | |
| 36576 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_3X1, output_height_lt_3) { |
| 36577 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 36578 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36579 | DWConv2DMicrokernelTester() |
| 36580 | .input_width(input_width) |
| 36581 | .input_height(input_height) |
| 36582 | .kernel_height(3) |
| 36583 | .kernel_width(3) |
| 36584 | .subsampling(1) |
| 36585 | .padding_left(1) |
| 36586 | .padding_right(1) |
| 36587 | .padding_top(1) |
| 36588 | .padding_bottom(1) |
| 36589 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36590 | } |
| 36591 | } |
| 36592 | } |
| 36593 | |
| 36594 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_3X1, output_height_gt_3) { |
| 36595 | for (size_t input_height = 4; input_height < 16; input_height++) { |
| 36596 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36597 | DWConv2DMicrokernelTester() |
| 36598 | .input_width(input_width) |
| 36599 | .input_height(input_height) |
| 36600 | .kernel_height(3) |
| 36601 | .kernel_width(3) |
| 36602 | .subsampling(1) |
| 36603 | .padding_left(1) |
| 36604 | .padding_right(1) |
| 36605 | .padding_top(1) |
| 36606 | .padding_bottom(1) |
| 36607 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36608 | } |
| 36609 | } |
| 36610 | } |
| 36611 | |
| 36612 | |
| 36613 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_4X1, output_width_eq_1) { |
| 36614 | DWConv2DMicrokernelTester() |
| 36615 | .input_width(1) |
| 36616 | .input_height(4) |
| 36617 | .kernel_height(3) |
| 36618 | .kernel_width(3) |
| 36619 | .subsampling(1) |
| 36620 | .padding_left(1) |
| 36621 | .padding_right(1) |
| 36622 | .padding_top(1) |
| 36623 | .padding_bottom(1) |
| 36624 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_4x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36625 | } |
| 36626 | |
| 36627 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_4X1, output_width_gt_1) { |
| 36628 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 36629 | DWConv2DMicrokernelTester() |
| 36630 | .input_width(input_width) |
| 36631 | .input_height(4) |
| 36632 | .kernel_height(3) |
| 36633 | .kernel_width(3) |
| 36634 | .subsampling(1) |
| 36635 | .padding_left(1) |
| 36636 | .padding_right(1) |
| 36637 | .padding_top(1) |
| 36638 | .padding_bottom(1) |
| 36639 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_4x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36640 | } |
| 36641 | } |
| 36642 | |
| 36643 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_4X1, output_height_div_4) { |
| 36644 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 36645 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36646 | DWConv2DMicrokernelTester() |
| 36647 | .input_width(input_width) |
| 36648 | .input_height(input_height) |
| 36649 | .kernel_height(3) |
| 36650 | .kernel_width(3) |
| 36651 | .subsampling(1) |
| 36652 | .padding_left(1) |
| 36653 | .padding_right(1) |
| 36654 | .padding_top(1) |
| 36655 | .padding_bottom(1) |
| 36656 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_4x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36657 | } |
| 36658 | } |
| 36659 | } |
| 36660 | |
| 36661 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_4X1, output_height_lt_4) { |
| 36662 | for (size_t input_height = 1; input_height < 4; input_height++) { |
| 36663 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36664 | DWConv2DMicrokernelTester() |
| 36665 | .input_width(input_width) |
| 36666 | .input_height(input_height) |
| 36667 | .kernel_height(3) |
| 36668 | .kernel_width(3) |
| 36669 | .subsampling(1) |
| 36670 | .padding_left(1) |
| 36671 | .padding_right(1) |
| 36672 | .padding_top(1) |
| 36673 | .padding_bottom(1) |
| 36674 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_4x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36675 | } |
| 36676 | } |
| 36677 | } |
| 36678 | |
| 36679 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_4X1, output_height_gt_4) { |
| 36680 | for (size_t input_height = 5; input_height < 21; input_height++) { |
| 36681 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36682 | DWConv2DMicrokernelTester() |
| 36683 | .input_width(input_width) |
| 36684 | .input_height(input_height) |
| 36685 | .kernel_height(3) |
| 36686 | .kernel_width(3) |
| 36687 | .subsampling(1) |
| 36688 | .padding_left(1) |
| 36689 | .padding_right(1) |
| 36690 | .padding_top(1) |
| 36691 | .padding_bottom(1) |
| 36692 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_4x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36693 | } |
| 36694 | } |
| 36695 | } |
| 36696 | |
| 36697 | |
| 36698 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_5X1, output_width_eq_1) { |
| 36699 | DWConv2DMicrokernelTester() |
| 36700 | .input_width(1) |
| 36701 | .input_height(5) |
| 36702 | .kernel_height(3) |
| 36703 | .kernel_width(3) |
| 36704 | .subsampling(1) |
| 36705 | .padding_left(1) |
| 36706 | .padding_right(1) |
| 36707 | .padding_top(1) |
| 36708 | .padding_bottom(1) |
| 36709 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_5x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36710 | } |
| 36711 | |
| 36712 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_5X1, output_width_gt_1) { |
| 36713 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 36714 | DWConv2DMicrokernelTester() |
| 36715 | .input_width(input_width) |
| 36716 | .input_height(5) |
| 36717 | .kernel_height(3) |
| 36718 | .kernel_width(3) |
| 36719 | .subsampling(1) |
| 36720 | .padding_left(1) |
| 36721 | .padding_right(1) |
| 36722 | .padding_top(1) |
| 36723 | .padding_bottom(1) |
| 36724 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_5x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36725 | } |
| 36726 | } |
| 36727 | |
| 36728 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_5X1, output_height_div_5) { |
| 36729 | for (size_t input_height = 10; input_height < 40; input_height += 5) { |
| 36730 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36731 | DWConv2DMicrokernelTester() |
| 36732 | .input_width(input_width) |
| 36733 | .input_height(input_height) |
| 36734 | .kernel_height(3) |
| 36735 | .kernel_width(3) |
| 36736 | .subsampling(1) |
| 36737 | .padding_left(1) |
| 36738 | .padding_right(1) |
| 36739 | .padding_top(1) |
| 36740 | .padding_bottom(1) |
| 36741 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_5x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36742 | } |
| 36743 | } |
| 36744 | } |
| 36745 | |
| 36746 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_5X1, output_height_lt_5) { |
| 36747 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 36748 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36749 | DWConv2DMicrokernelTester() |
| 36750 | .input_width(input_width) |
| 36751 | .input_height(input_height) |
| 36752 | .kernel_height(3) |
| 36753 | .kernel_width(3) |
| 36754 | .subsampling(1) |
| 36755 | .padding_left(1) |
| 36756 | .padding_right(1) |
| 36757 | .padding_top(1) |
| 36758 | .padding_bottom(1) |
| 36759 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_5x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36760 | } |
| 36761 | } |
| 36762 | } |
| 36763 | |
| 36764 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_5X1, output_height_gt_5) { |
| 36765 | for (size_t input_height = 6; input_height < 26; input_height++) { |
| 36766 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36767 | DWConv2DMicrokernelTester() |
| 36768 | .input_width(input_width) |
| 36769 | .input_height(input_height) |
| 36770 | .kernel_height(3) |
| 36771 | .kernel_width(3) |
| 36772 | .subsampling(1) |
| 36773 | .padding_left(1) |
| 36774 | .padding_right(1) |
| 36775 | .padding_top(1) |
| 36776 | .padding_bottom(1) |
| 36777 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_5x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36778 | } |
| 36779 | } |
| 36780 | } |
| 36781 | |
| 36782 | |
| 36783 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_6X1, output_width_eq_1) { |
| 36784 | DWConv2DMicrokernelTester() |
| 36785 | .input_width(1) |
| 36786 | .input_height(6) |
| 36787 | .kernel_height(3) |
| 36788 | .kernel_width(3) |
| 36789 | .subsampling(1) |
| 36790 | .padding_left(1) |
| 36791 | .padding_right(1) |
| 36792 | .padding_top(1) |
| 36793 | .padding_bottom(1) |
| 36794 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_6x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36795 | } |
| 36796 | |
| 36797 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_6X1, output_width_gt_1) { |
| 36798 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 36799 | DWConv2DMicrokernelTester() |
| 36800 | .input_width(input_width) |
| 36801 | .input_height(6) |
| 36802 | .kernel_height(3) |
| 36803 | .kernel_width(3) |
| 36804 | .subsampling(1) |
| 36805 | .padding_left(1) |
| 36806 | .padding_right(1) |
| 36807 | .padding_top(1) |
| 36808 | .padding_bottom(1) |
| 36809 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_6x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36810 | } |
| 36811 | } |
| 36812 | |
| 36813 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_6X1, output_height_div_6) { |
| 36814 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 36815 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36816 | DWConv2DMicrokernelTester() |
| 36817 | .input_width(input_width) |
| 36818 | .input_height(input_height) |
| 36819 | .kernel_height(3) |
| 36820 | .kernel_width(3) |
| 36821 | .subsampling(1) |
| 36822 | .padding_left(1) |
| 36823 | .padding_right(1) |
| 36824 | .padding_top(1) |
| 36825 | .padding_bottom(1) |
| 36826 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_6x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36827 | } |
| 36828 | } |
| 36829 | } |
| 36830 | |
| 36831 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_6X1, output_height_lt_6) { |
| 36832 | for (size_t input_height = 1; input_height < 6; input_height++) { |
| 36833 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36834 | DWConv2DMicrokernelTester() |
| 36835 | .input_width(input_width) |
| 36836 | .input_height(input_height) |
| 36837 | .kernel_height(3) |
| 36838 | .kernel_width(3) |
| 36839 | .subsampling(1) |
| 36840 | .padding_left(1) |
| 36841 | .padding_right(1) |
| 36842 | .padding_top(1) |
| 36843 | .padding_bottom(1) |
| 36844 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_6x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36845 | } |
| 36846 | } |
| 36847 | } |
| 36848 | |
| 36849 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_6X1, output_height_gt_6) { |
| 36850 | for (size_t input_height = 7; input_height < 31; input_height++) { |
| 36851 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36852 | DWConv2DMicrokernelTester() |
| 36853 | .input_width(input_width) |
| 36854 | .input_height(input_height) |
| 36855 | .kernel_height(3) |
| 36856 | .kernel_width(3) |
| 36857 | .subsampling(1) |
| 36858 | .padding_left(1) |
| 36859 | .padding_right(1) |
| 36860 | .padding_top(1) |
| 36861 | .padding_bottom(1) |
| 36862 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_6x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36863 | } |
| 36864 | } |
| 36865 | } |
| 36866 | |
| 36867 | |
| 36868 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_1X1_ACC2, output_width_eq_1) { |
| 36869 | DWConv2DMicrokernelTester() |
| 36870 | .input_width(1) |
| 36871 | .input_height(1) |
| 36872 | .kernel_height(3) |
| 36873 | .kernel_width(3) |
| 36874 | .subsampling(1) |
| 36875 | .padding_left(1) |
| 36876 | .padding_right(1) |
| 36877 | .padding_top(1) |
| 36878 | .padding_bottom(1) |
| 36879 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36880 | } |
| 36881 | |
| 36882 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_1X1_ACC2, output_width_gt_1) { |
| 36883 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 36884 | DWConv2DMicrokernelTester() |
| 36885 | .input_width(input_width) |
| 36886 | .input_height(1) |
| 36887 | .kernel_height(3) |
| 36888 | .kernel_width(3) |
| 36889 | .subsampling(1) |
| 36890 | .padding_left(1) |
| 36891 | .padding_right(1) |
| 36892 | .padding_top(1) |
| 36893 | .padding_bottom(1) |
| 36894 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36895 | } |
| 36896 | } |
| 36897 | |
| 36898 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_1X1_ACC2, output_height_gt_1) { |
| 36899 | for (size_t input_height = 2; input_height < 6; input_height++) { |
| 36900 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36901 | DWConv2DMicrokernelTester() |
| 36902 | .input_width(input_width) |
| 36903 | .input_height(input_height) |
| 36904 | .kernel_height(3) |
| 36905 | .kernel_width(3) |
| 36906 | .subsampling(1) |
| 36907 | .padding_left(1) |
| 36908 | .padding_right(1) |
| 36909 | .padding_top(1) |
| 36910 | .padding_bottom(1) |
| 36911 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36912 | } |
| 36913 | } |
| 36914 | } |
| 36915 | |
| 36916 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 36917 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_1X1_ACC3, output_width_eq_1) { |
| 36918 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 36919 | .input_width(1) |
| 36920 | .input_height(1) |
| 36921 | .kernel_height(3) |
| 36922 | .kernel_width(3) |
| 36923 | .subsampling(1) |
| 36924 | .padding_left(1) |
| 36925 | .padding_right(1) |
| 36926 | .padding_top(1) |
| 36927 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 36928 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 36929 | } |
| 36930 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 36931 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_1X1_ACC3, output_width_gt_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 36932 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 36933 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 36934 | .input_width(input_width) |
| 36935 | .input_height(1) |
| 36936 | .kernel_height(3) |
| 36937 | .kernel_width(3) |
| 36938 | .subsampling(1) |
| 36939 | .padding_left(1) |
| 36940 | .padding_right(1) |
| 36941 | .padding_top(1) |
| 36942 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 36943 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| Erich Elsen | 0cc2c53 | 2019-10-15 04:44:18 -0700 | [diff] [blame] | 36944 | } |
| 36945 | } |
| 36946 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 36947 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_1X1_ACC3, output_height_gt_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 36948 | for (size_t input_height = 2; input_height < 6; input_height++) { |
| 36949 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 36950 | DWConv2DMicrokernelTester() |
| Erich Elsen | 0cc2c53 | 2019-10-15 04:44:18 -0700 | [diff] [blame] | 36951 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 36952 | .input_height(input_height) |
| 36953 | .kernel_height(3) |
| 36954 | .kernel_width(3) |
| 36955 | .subsampling(1) |
| Erich Elsen | 0cc2c53 | 2019-10-15 04:44:18 -0700 | [diff] [blame] | 36956 | .padding_left(1) |
| 36957 | .padding_right(1) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 36958 | .padding_top(1) |
| 36959 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 36960 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| Erich Elsen | 0cc2c53 | 2019-10-15 04:44:18 -0700 | [diff] [blame] | 36961 | } |
| 36962 | } |
| 36963 | } |
| 36964 | |
| Erich Elsen | ac4de80 | 2019-10-16 04:35:30 -0700 | [diff] [blame] | 36965 | |
| Marat Dukhan | 91249d2 | 2020-10-24 12:02:51 -0700 | [diff] [blame] | 36966 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_1X1_ACC4, output_width_eq_1) { |
| 36967 | DWConv2DMicrokernelTester() |
| 36968 | .input_width(1) |
| 36969 | .input_height(1) |
| 36970 | .kernel_height(3) |
| 36971 | .kernel_width(3) |
| 36972 | .subsampling(1) |
| 36973 | .padding_left(1) |
| 36974 | .padding_right(1) |
| 36975 | .padding_top(1) |
| 36976 | .padding_bottom(1) |
| 36977 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36978 | } |
| 36979 | |
| 36980 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_1X1_ACC4, output_width_gt_1) { |
| 36981 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 36982 | DWConv2DMicrokernelTester() |
| 36983 | .input_width(input_width) |
| 36984 | .input_height(1) |
| 36985 | .kernel_height(3) |
| 36986 | .kernel_width(3) |
| 36987 | .subsampling(1) |
| 36988 | .padding_left(1) |
| 36989 | .padding_right(1) |
| 36990 | .padding_top(1) |
| 36991 | .padding_bottom(1) |
| 36992 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 36993 | } |
| 36994 | } |
| 36995 | |
| 36996 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_1X1_ACC4, output_height_gt_1) { |
| 36997 | for (size_t input_height = 2; input_height < 6; input_height++) { |
| 36998 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 36999 | DWConv2DMicrokernelTester() |
| 37000 | .input_width(input_width) |
| 37001 | .input_height(input_height) |
| 37002 | .kernel_height(3) |
| 37003 | .kernel_width(3) |
| 37004 | .subsampling(1) |
| 37005 | .padding_left(1) |
| 37006 | .padding_right(1) |
| 37007 | .padding_top(1) |
| 37008 | .padding_bottom(1) |
| 37009 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37010 | } |
| 37011 | } |
| 37012 | } |
| 37013 | |
| 37014 | |
| 37015 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_2X1_ACC2, output_width_eq_1) { |
| 37016 | DWConv2DMicrokernelTester() |
| 37017 | .input_width(1) |
| 37018 | .input_height(2) |
| 37019 | .kernel_height(3) |
| 37020 | .kernel_width(3) |
| 37021 | .subsampling(1) |
| 37022 | .padding_left(1) |
| 37023 | .padding_right(1) |
| 37024 | .padding_top(1) |
| 37025 | .padding_bottom(1) |
| 37026 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37027 | } |
| 37028 | |
| 37029 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_2X1_ACC2, output_width_gt_1) { |
| 37030 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 37031 | DWConv2DMicrokernelTester() |
| 37032 | .input_width(input_width) |
| 37033 | .input_height(2) |
| 37034 | .kernel_height(3) |
| 37035 | .kernel_width(3) |
| 37036 | .subsampling(1) |
| 37037 | .padding_left(1) |
| 37038 | .padding_right(1) |
| 37039 | .padding_top(1) |
| 37040 | .padding_bottom(1) |
| 37041 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37042 | } |
| 37043 | } |
| 37044 | |
| 37045 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_2X1_ACC2, output_height_div_2) { |
| 37046 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 37047 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 37048 | DWConv2DMicrokernelTester() |
| 37049 | .input_width(input_width) |
| 37050 | .input_height(input_height) |
| 37051 | .kernel_height(3) |
| 37052 | .kernel_width(3) |
| 37053 | .subsampling(1) |
| 37054 | .padding_left(1) |
| 37055 | .padding_right(1) |
| 37056 | .padding_top(1) |
| 37057 | .padding_bottom(1) |
| 37058 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37059 | } |
| 37060 | } |
| 37061 | } |
| 37062 | |
| 37063 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_2X1_ACC2, output_height_lt_2) { |
| 37064 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 37065 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 37066 | DWConv2DMicrokernelTester() |
| 37067 | .input_width(input_width) |
| 37068 | .input_height(input_height) |
| 37069 | .kernel_height(3) |
| 37070 | .kernel_width(3) |
| 37071 | .subsampling(1) |
| 37072 | .padding_left(1) |
| 37073 | .padding_right(1) |
| 37074 | .padding_top(1) |
| 37075 | .padding_bottom(1) |
| 37076 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37077 | } |
| 37078 | } |
| 37079 | } |
| 37080 | |
| 37081 | TEST(F32_DWCONV2D_CHW_3X3P1__SCALAR_2X1_ACC2, output_height_gt_2) { |
| 37082 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 37083 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 37084 | DWConv2DMicrokernelTester() |
| 37085 | .input_width(input_width) |
| 37086 | .input_height(input_height) |
| 37087 | .kernel_height(3) |
| 37088 | .kernel_width(3) |
| 37089 | .subsampling(1) |
| 37090 | .padding_left(1) |
| 37091 | .padding_right(1) |
| 37092 | .padding_top(1) |
| 37093 | .padding_bottom(1) |
| 37094 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37095 | } |
| 37096 | } |
| 37097 | } |
| 37098 | |
| 37099 | |
| Marat Dukhan | cf5b3c3 | 2020-10-25 19:21:10 -0700 | [diff] [blame] | 37100 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1, output_width_eq_1) { |
| 37101 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 37102 | DWConv2DMicrokernelTester() |
| 37103 | .input_width(input_width) |
| 37104 | .input_height(2) |
| 37105 | .kernel_height(3) |
| 37106 | .kernel_width(3) |
| 37107 | .subsampling(2) |
| 37108 | .padding_left(1) |
| 37109 | .padding_right(1) |
| 37110 | .padding_top(1) |
| 37111 | .padding_bottom(1) |
| 37112 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37113 | } |
| 37114 | } |
| 37115 | |
| 37116 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1, output_width_gt_1) { |
| 37117 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 37118 | DWConv2DMicrokernelTester() |
| 37119 | .input_width(input_width) |
| 37120 | .input_height(2) |
| 37121 | .kernel_height(3) |
| 37122 | .kernel_width(3) |
| 37123 | .subsampling(2) |
| 37124 | .padding_left(1) |
| 37125 | .padding_right(1) |
| 37126 | .padding_top(1) |
| 37127 | .padding_bottom(1) |
| 37128 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37129 | } |
| 37130 | } |
| 37131 | |
| 37132 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1, output_height_eq_1) { |
| 37133 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 37134 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37135 | DWConv2DMicrokernelTester() |
| 37136 | .input_width(input_width) |
| 37137 | .input_height(input_height) |
| 37138 | .kernel_height(3) |
| 37139 | .kernel_width(3) |
| 37140 | .subsampling(2) |
| 37141 | .padding_left(1) |
| 37142 | .padding_right(1) |
| 37143 | .padding_top(1) |
| 37144 | .padding_bottom(1) |
| 37145 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37146 | } |
| 37147 | } |
| 37148 | } |
| 37149 | |
| 37150 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1, output_height_gt_1) { |
| 37151 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 37152 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37153 | DWConv2DMicrokernelTester() |
| 37154 | .input_width(input_width) |
| 37155 | .input_height(input_height) |
| 37156 | .kernel_height(3) |
| 37157 | .kernel_width(3) |
| 37158 | .subsampling(2) |
| 37159 | .padding_left(1) |
| 37160 | .padding_right(1) |
| 37161 | .padding_top(1) |
| 37162 | .padding_bottom(1) |
| 37163 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37164 | } |
| 37165 | } |
| 37166 | } |
| 37167 | |
| 37168 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1, padding_top_eq_1) { |
| 37169 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 37170 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37171 | DWConv2DMicrokernelTester() |
| 37172 | .input_width(input_width) |
| 37173 | .input_height(input_height) |
| 37174 | .kernel_height(3) |
| 37175 | .kernel_width(3) |
| 37176 | .subsampling(2) |
| 37177 | .padding_left(1) |
| 37178 | .padding_right(1) |
| 37179 | .padding_top(0) |
| 37180 | .padding_bottom(1) |
| 37181 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37182 | } |
| 37183 | } |
| 37184 | } |
| 37185 | |
| 37186 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1, output_width_eq_1) { |
| 37187 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 37188 | DWConv2DMicrokernelTester() |
| 37189 | .input_width(input_width) |
| 37190 | .input_height(4) |
| 37191 | .kernel_height(3) |
| 37192 | .kernel_width(3) |
| 37193 | .subsampling(2) |
| 37194 | .padding_left(1) |
| 37195 | .padding_right(1) |
| 37196 | .padding_top(1) |
| 37197 | .padding_bottom(1) |
| 37198 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37199 | } |
| 37200 | } |
| 37201 | |
| 37202 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1, output_width_gt_1) { |
| 37203 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 37204 | DWConv2DMicrokernelTester() |
| 37205 | .input_width(input_width) |
| 37206 | .input_height(4) |
| 37207 | .kernel_height(3) |
| 37208 | .kernel_width(3) |
| 37209 | .subsampling(2) |
| 37210 | .padding_left(1) |
| 37211 | .padding_right(1) |
| 37212 | .padding_top(1) |
| 37213 | .padding_bottom(1) |
| 37214 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37215 | } |
| 37216 | } |
| 37217 | |
| 37218 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1, output_height_eq_2) { |
| 37219 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 37220 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37221 | DWConv2DMicrokernelTester() |
| 37222 | .input_width(input_width) |
| 37223 | .input_height(input_height) |
| 37224 | .kernel_height(3) |
| 37225 | .kernel_width(3) |
| 37226 | .subsampling(2) |
| 37227 | .padding_left(1) |
| 37228 | .padding_right(1) |
| 37229 | .padding_top(1) |
| 37230 | .padding_bottom(1) |
| 37231 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37232 | } |
| 37233 | } |
| 37234 | } |
| 37235 | |
| 37236 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1, output_height_div_2) { |
| 37237 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 37238 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37239 | DWConv2DMicrokernelTester() |
| 37240 | .input_width(input_width) |
| 37241 | .input_height(input_height) |
| 37242 | .kernel_height(3) |
| 37243 | .kernel_width(3) |
| 37244 | .subsampling(2) |
| 37245 | .padding_left(1) |
| 37246 | .padding_right(1) |
| 37247 | .padding_top(1) |
| 37248 | .padding_bottom(1) |
| 37249 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37250 | } |
| 37251 | } |
| 37252 | } |
| 37253 | |
| 37254 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1, output_height_lt_2) { |
| 37255 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 37256 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37257 | DWConv2DMicrokernelTester() |
| 37258 | .input_width(input_width) |
| 37259 | .input_height(input_height) |
| 37260 | .kernel_height(3) |
| 37261 | .kernel_width(3) |
| 37262 | .subsampling(2) |
| 37263 | .padding_left(1) |
| 37264 | .padding_right(1) |
| 37265 | .padding_top(1) |
| 37266 | .padding_bottom(1) |
| 37267 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37268 | } |
| 37269 | } |
| 37270 | } |
| 37271 | |
| 37272 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1, output_height_gt_2) { |
| 37273 | for (size_t input_height = 5; input_height < 21; input_height++) { |
| 37274 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37275 | DWConv2DMicrokernelTester() |
| 37276 | .input_width(input_width) |
| 37277 | .input_height(input_height) |
| 37278 | .kernel_height(3) |
| 37279 | .kernel_width(3) |
| 37280 | .subsampling(2) |
| 37281 | .padding_left(1) |
| 37282 | .padding_right(1) |
| 37283 | .padding_top(1) |
| 37284 | .padding_bottom(1) |
| 37285 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37286 | } |
| 37287 | } |
| 37288 | } |
| 37289 | |
| 37290 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1, padding_top_eq_1) { |
| 37291 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 37292 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37293 | DWConv2DMicrokernelTester() |
| 37294 | .input_width(input_width) |
| 37295 | .input_height(input_height) |
| 37296 | .kernel_height(3) |
| 37297 | .kernel_width(3) |
| 37298 | .subsampling(2) |
| 37299 | .padding_left(1) |
| 37300 | .padding_right(1) |
| 37301 | .padding_top(0) |
| 37302 | .padding_bottom(1) |
| 37303 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37304 | } |
| 37305 | } |
| 37306 | } |
| 37307 | |
| 37308 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_3X1, output_width_eq_1) { |
| 37309 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 37310 | DWConv2DMicrokernelTester() |
| 37311 | .input_width(input_width) |
| 37312 | .input_height(6) |
| 37313 | .kernel_height(3) |
| 37314 | .kernel_width(3) |
| 37315 | .subsampling(2) |
| 37316 | .padding_left(1) |
| 37317 | .padding_right(1) |
| 37318 | .padding_top(1) |
| 37319 | .padding_bottom(1) |
| 37320 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37321 | } |
| 37322 | } |
| 37323 | |
| 37324 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_3X1, output_width_gt_1) { |
| 37325 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 37326 | DWConv2DMicrokernelTester() |
| 37327 | .input_width(input_width) |
| 37328 | .input_height(6) |
| 37329 | .kernel_height(3) |
| 37330 | .kernel_width(3) |
| 37331 | .subsampling(2) |
| 37332 | .padding_left(1) |
| 37333 | .padding_right(1) |
| 37334 | .padding_top(1) |
| 37335 | .padding_bottom(1) |
| 37336 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37337 | } |
| 37338 | } |
| 37339 | |
| 37340 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_3X1, output_height_eq_3) { |
| 37341 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 37342 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37343 | DWConv2DMicrokernelTester() |
| 37344 | .input_width(input_width) |
| 37345 | .input_height(input_height) |
| 37346 | .kernel_height(3) |
| 37347 | .kernel_width(3) |
| 37348 | .subsampling(2) |
| 37349 | .padding_left(1) |
| 37350 | .padding_right(1) |
| 37351 | .padding_top(1) |
| 37352 | .padding_bottom(1) |
| 37353 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37354 | } |
| 37355 | } |
| 37356 | } |
| 37357 | |
| 37358 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_3X1, output_height_div_3) { |
| 37359 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 37360 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37361 | DWConv2DMicrokernelTester() |
| 37362 | .input_width(input_width) |
| 37363 | .input_height(input_height) |
| 37364 | .kernel_height(3) |
| 37365 | .kernel_width(3) |
| 37366 | .subsampling(2) |
| 37367 | .padding_left(1) |
| 37368 | .padding_right(1) |
| 37369 | .padding_top(1) |
| 37370 | .padding_bottom(1) |
| 37371 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37372 | } |
| 37373 | } |
| 37374 | } |
| 37375 | |
| 37376 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_3X1, output_height_lt_3) { |
| 37377 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 37378 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37379 | DWConv2DMicrokernelTester() |
| 37380 | .input_width(input_width) |
| 37381 | .input_height(input_height) |
| 37382 | .kernel_height(3) |
| 37383 | .kernel_width(3) |
| 37384 | .subsampling(2) |
| 37385 | .padding_left(1) |
| 37386 | .padding_right(1) |
| 37387 | .padding_top(1) |
| 37388 | .padding_bottom(1) |
| 37389 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37390 | } |
| 37391 | } |
| 37392 | } |
| 37393 | |
| 37394 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_3X1, output_height_gt_3) { |
| 37395 | for (size_t input_height = 7; input_height < 31; input_height++) { |
| 37396 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37397 | DWConv2DMicrokernelTester() |
| 37398 | .input_width(input_width) |
| 37399 | .input_height(input_height) |
| 37400 | .kernel_height(3) |
| 37401 | .kernel_width(3) |
| 37402 | .subsampling(2) |
| 37403 | .padding_left(1) |
| 37404 | .padding_right(1) |
| 37405 | .padding_top(1) |
| 37406 | .padding_bottom(1) |
| 37407 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37408 | } |
| 37409 | } |
| 37410 | } |
| 37411 | |
| 37412 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_3X1, padding_top_eq_1) { |
| 37413 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 37414 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37415 | DWConv2DMicrokernelTester() |
| 37416 | .input_width(input_width) |
| 37417 | .input_height(input_height) |
| 37418 | .kernel_height(3) |
| 37419 | .kernel_width(3) |
| 37420 | .subsampling(2) |
| 37421 | .padding_left(1) |
| 37422 | .padding_right(1) |
| 37423 | .padding_top(0) |
| 37424 | .padding_bottom(1) |
| 37425 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37426 | } |
| 37427 | } |
| 37428 | } |
| 37429 | |
| 37430 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_4X1, output_width_eq_1) { |
| 37431 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 37432 | DWConv2DMicrokernelTester() |
| 37433 | .input_width(input_width) |
| 37434 | .input_height(8) |
| 37435 | .kernel_height(3) |
| 37436 | .kernel_width(3) |
| 37437 | .subsampling(2) |
| 37438 | .padding_left(1) |
| 37439 | .padding_right(1) |
| 37440 | .padding_top(1) |
| 37441 | .padding_bottom(1) |
| 37442 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_4x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37443 | } |
| 37444 | } |
| 37445 | |
| 37446 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_4X1, output_width_gt_1) { |
| 37447 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 37448 | DWConv2DMicrokernelTester() |
| 37449 | .input_width(input_width) |
| 37450 | .input_height(8) |
| 37451 | .kernel_height(3) |
| 37452 | .kernel_width(3) |
| 37453 | .subsampling(2) |
| 37454 | .padding_left(1) |
| 37455 | .padding_right(1) |
| 37456 | .padding_top(1) |
| 37457 | .padding_bottom(1) |
| 37458 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_4x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37459 | } |
| 37460 | } |
| 37461 | |
| 37462 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_4X1, output_height_eq_4) { |
| 37463 | for (size_t input_height = 7; input_height < 9; input_height++) { |
| 37464 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37465 | DWConv2DMicrokernelTester() |
| 37466 | .input_width(input_width) |
| 37467 | .input_height(input_height) |
| 37468 | .kernel_height(3) |
| 37469 | .kernel_width(3) |
| 37470 | .subsampling(2) |
| 37471 | .padding_left(1) |
| 37472 | .padding_right(1) |
| 37473 | .padding_top(1) |
| 37474 | .padding_bottom(1) |
| 37475 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_4x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37476 | } |
| 37477 | } |
| 37478 | } |
| 37479 | |
| 37480 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_4X1, output_height_div_4) { |
| 37481 | for (size_t input_height = 16; input_height < 64; input_height += 8) { |
| 37482 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37483 | DWConv2DMicrokernelTester() |
| 37484 | .input_width(input_width) |
| 37485 | .input_height(input_height) |
| 37486 | .kernel_height(3) |
| 37487 | .kernel_width(3) |
| 37488 | .subsampling(2) |
| 37489 | .padding_left(1) |
| 37490 | .padding_right(1) |
| 37491 | .padding_top(1) |
| 37492 | .padding_bottom(1) |
| 37493 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_4x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37494 | } |
| 37495 | } |
| 37496 | } |
| 37497 | |
| 37498 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_4X1, output_height_lt_4) { |
| 37499 | for (size_t input_height = 1; input_height < 7; input_height++) { |
| 37500 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37501 | DWConv2DMicrokernelTester() |
| 37502 | .input_width(input_width) |
| 37503 | .input_height(input_height) |
| 37504 | .kernel_height(3) |
| 37505 | .kernel_width(3) |
| 37506 | .subsampling(2) |
| 37507 | .padding_left(1) |
| 37508 | .padding_right(1) |
| 37509 | .padding_top(1) |
| 37510 | .padding_bottom(1) |
| 37511 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_4x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37512 | } |
| 37513 | } |
| 37514 | } |
| 37515 | |
| 37516 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_4X1, output_height_gt_4) { |
| 37517 | for (size_t input_height = 9; input_height < 41; input_height++) { |
| 37518 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37519 | DWConv2DMicrokernelTester() |
| 37520 | .input_width(input_width) |
| 37521 | .input_height(input_height) |
| 37522 | .kernel_height(3) |
| 37523 | .kernel_width(3) |
| 37524 | .subsampling(2) |
| 37525 | .padding_left(1) |
| 37526 | .padding_right(1) |
| 37527 | .padding_top(1) |
| 37528 | .padding_bottom(1) |
| 37529 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_4x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37530 | } |
| 37531 | } |
| 37532 | } |
| 37533 | |
| 37534 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_4X1, padding_top_eq_1) { |
| 37535 | for (size_t input_height = 2; input_height < 26; input_height++) { |
| 37536 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37537 | DWConv2DMicrokernelTester() |
| 37538 | .input_width(input_width) |
| 37539 | .input_height(input_height) |
| 37540 | .kernel_height(3) |
| 37541 | .kernel_width(3) |
| 37542 | .subsampling(2) |
| 37543 | .padding_left(1) |
| 37544 | .padding_right(1) |
| 37545 | .padding_top(0) |
| 37546 | .padding_bottom(1) |
| 37547 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_4x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37548 | } |
| 37549 | } |
| 37550 | } |
| 37551 | |
| 37552 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC2, output_width_eq_1) { |
| 37553 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 37554 | DWConv2DMicrokernelTester() |
| 37555 | .input_width(input_width) |
| 37556 | .input_height(2) |
| 37557 | .kernel_height(3) |
| 37558 | .kernel_width(3) |
| 37559 | .subsampling(2) |
| 37560 | .padding_left(1) |
| 37561 | .padding_right(1) |
| 37562 | .padding_top(1) |
| 37563 | .padding_bottom(1) |
| 37564 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37565 | } |
| 37566 | } |
| 37567 | |
| 37568 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC2, output_width_gt_1) { |
| 37569 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 37570 | DWConv2DMicrokernelTester() |
| 37571 | .input_width(input_width) |
| 37572 | .input_height(2) |
| 37573 | .kernel_height(3) |
| 37574 | .kernel_width(3) |
| 37575 | .subsampling(2) |
| 37576 | .padding_left(1) |
| 37577 | .padding_right(1) |
| 37578 | .padding_top(1) |
| 37579 | .padding_bottom(1) |
| 37580 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37581 | } |
| 37582 | } |
| 37583 | |
| 37584 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC2, output_height_eq_1) { |
| 37585 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 37586 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37587 | DWConv2DMicrokernelTester() |
| 37588 | .input_width(input_width) |
| 37589 | .input_height(input_height) |
| 37590 | .kernel_height(3) |
| 37591 | .kernel_width(3) |
| 37592 | .subsampling(2) |
| 37593 | .padding_left(1) |
| 37594 | .padding_right(1) |
| 37595 | .padding_top(1) |
| 37596 | .padding_bottom(1) |
| 37597 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37598 | } |
| 37599 | } |
| 37600 | } |
| 37601 | |
| 37602 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC2, output_height_gt_1) { |
| 37603 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 37604 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37605 | DWConv2DMicrokernelTester() |
| 37606 | .input_width(input_width) |
| 37607 | .input_height(input_height) |
| 37608 | .kernel_height(3) |
| 37609 | .kernel_width(3) |
| 37610 | .subsampling(2) |
| 37611 | .padding_left(1) |
| 37612 | .padding_right(1) |
| 37613 | .padding_top(1) |
| 37614 | .padding_bottom(1) |
| 37615 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37616 | } |
| 37617 | } |
| 37618 | } |
| 37619 | |
| 37620 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC2, padding_top_eq_1) { |
| 37621 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 37622 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37623 | DWConv2DMicrokernelTester() |
| 37624 | .input_width(input_width) |
| 37625 | .input_height(input_height) |
| 37626 | .kernel_height(3) |
| 37627 | .kernel_width(3) |
| 37628 | .subsampling(2) |
| 37629 | .padding_left(1) |
| 37630 | .padding_right(1) |
| 37631 | .padding_top(0) |
| 37632 | .padding_bottom(1) |
| 37633 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37634 | } |
| 37635 | } |
| 37636 | } |
| 37637 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37638 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC3, output_width_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 37639 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37640 | DWConv2DMicrokernelTester() |
| Erich Elsen | ac4de80 | 2019-10-16 04:35:30 -0700 | [diff] [blame] | 37641 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 37642 | .input_height(2) |
| Erich Elsen | ac4de80 | 2019-10-16 04:35:30 -0700 | [diff] [blame] | 37643 | .kernel_height(3) |
| 37644 | .kernel_width(3) |
| 37645 | .subsampling(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 37646 | .padding_left(1) |
| 37647 | .padding_right(1) |
| 37648 | .padding_top(1) |
| 37649 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37650 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 37651 | } |
| 37652 | } |
| 37653 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37654 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC3, output_width_gt_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 37655 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37656 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 37657 | .input_width(input_width) |
| 37658 | .input_height(2) |
| 37659 | .kernel_height(3) |
| 37660 | .kernel_width(3) |
| 37661 | .subsampling(2) |
| 37662 | .padding_left(1) |
| 37663 | .padding_right(1) |
| 37664 | .padding_top(1) |
| 37665 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37666 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 37667 | } |
| 37668 | } |
| 37669 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37670 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC3, output_height_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 37671 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 37672 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37673 | DWConv2DMicrokernelTester() |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 37674 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 37675 | .input_height(input_height) |
| 37676 | .kernel_height(3) |
| 37677 | .kernel_width(3) |
| 37678 | .subsampling(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 37679 | .padding_left(1) |
| 37680 | .padding_right(1) |
| 37681 | .padding_top(1) |
| 37682 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37683 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 37684 | } |
| 37685 | } |
| 37686 | } |
| 37687 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37688 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC3, output_height_gt_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 37689 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 37690 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37691 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 37692 | .input_width(input_width) |
| 37693 | .input_height(input_height) |
| 37694 | .kernel_height(3) |
| 37695 | .kernel_width(3) |
| 37696 | .subsampling(2) |
| 37697 | .padding_left(1) |
| 37698 | .padding_right(1) |
| 37699 | .padding_top(1) |
| 37700 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37701 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 37702 | } |
| 37703 | } |
| 37704 | } |
| 37705 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37706 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC3, padding_top_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 37707 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 37708 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37709 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 37710 | .input_width(input_width) |
| 37711 | .input_height(input_height) |
| 37712 | .kernel_height(3) |
| 37713 | .kernel_width(3) |
| 37714 | .subsampling(2) |
| 37715 | .padding_left(1) |
| 37716 | .padding_right(1) |
| 37717 | .padding_top(0) |
| 37718 | .padding_bottom(1) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 37719 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 37720 | } |
| 37721 | } |
| 37722 | } |
| 37723 | |
| Marat Dukhan | cf5b3c3 | 2020-10-25 19:21:10 -0700 | [diff] [blame] | 37724 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC4, output_width_eq_1) { |
| 37725 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 37726 | DWConv2DMicrokernelTester() |
| 37727 | .input_width(input_width) |
| 37728 | .input_height(2) |
| 37729 | .kernel_height(3) |
| 37730 | .kernel_width(3) |
| 37731 | .subsampling(2) |
| 37732 | .padding_left(1) |
| 37733 | .padding_right(1) |
| 37734 | .padding_top(1) |
| 37735 | .padding_bottom(1) |
| 37736 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37737 | } |
| 37738 | } |
| 37739 | |
| 37740 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC4, output_width_gt_1) { |
| 37741 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 37742 | DWConv2DMicrokernelTester() |
| 37743 | .input_width(input_width) |
| 37744 | .input_height(2) |
| 37745 | .kernel_height(3) |
| 37746 | .kernel_width(3) |
| 37747 | .subsampling(2) |
| 37748 | .padding_left(1) |
| 37749 | .padding_right(1) |
| 37750 | .padding_top(1) |
| 37751 | .padding_bottom(1) |
| 37752 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37753 | } |
| 37754 | } |
| 37755 | |
| 37756 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC4, output_height_eq_1) { |
| 37757 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 37758 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37759 | DWConv2DMicrokernelTester() |
| 37760 | .input_width(input_width) |
| 37761 | .input_height(input_height) |
| 37762 | .kernel_height(3) |
| 37763 | .kernel_width(3) |
| 37764 | .subsampling(2) |
| 37765 | .padding_left(1) |
| 37766 | .padding_right(1) |
| 37767 | .padding_top(1) |
| 37768 | .padding_bottom(1) |
| 37769 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37770 | } |
| 37771 | } |
| 37772 | } |
| 37773 | |
| 37774 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC4, output_height_gt_1) { |
| 37775 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 37776 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37777 | DWConv2DMicrokernelTester() |
| 37778 | .input_width(input_width) |
| 37779 | .input_height(input_height) |
| 37780 | .kernel_height(3) |
| 37781 | .kernel_width(3) |
| 37782 | .subsampling(2) |
| 37783 | .padding_left(1) |
| 37784 | .padding_right(1) |
| 37785 | .padding_top(1) |
| 37786 | .padding_bottom(1) |
| 37787 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37788 | } |
| 37789 | } |
| 37790 | } |
| 37791 | |
| 37792 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_1X1_ACC4, padding_top_eq_1) { |
| 37793 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 37794 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37795 | DWConv2DMicrokernelTester() |
| 37796 | .input_width(input_width) |
| 37797 | .input_height(input_height) |
| 37798 | .kernel_height(3) |
| 37799 | .kernel_width(3) |
| 37800 | .subsampling(2) |
| 37801 | .padding_left(1) |
| 37802 | .padding_right(1) |
| 37803 | .padding_top(0) |
| 37804 | .padding_bottom(1) |
| 37805 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37806 | } |
| 37807 | } |
| 37808 | } |
| 37809 | |
| 37810 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1_ACC2, output_width_eq_1) { |
| 37811 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 37812 | DWConv2DMicrokernelTester() |
| 37813 | .input_width(input_width) |
| 37814 | .input_height(4) |
| 37815 | .kernel_height(3) |
| 37816 | .kernel_width(3) |
| 37817 | .subsampling(2) |
| 37818 | .padding_left(1) |
| 37819 | .padding_right(1) |
| 37820 | .padding_top(1) |
| 37821 | .padding_bottom(1) |
| 37822 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37823 | } |
| 37824 | } |
| 37825 | |
| 37826 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1_ACC2, output_width_gt_1) { |
| 37827 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 37828 | DWConv2DMicrokernelTester() |
| 37829 | .input_width(input_width) |
| 37830 | .input_height(4) |
| 37831 | .kernel_height(3) |
| 37832 | .kernel_width(3) |
| 37833 | .subsampling(2) |
| 37834 | .padding_left(1) |
| 37835 | .padding_right(1) |
| 37836 | .padding_top(1) |
| 37837 | .padding_bottom(1) |
| 37838 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37839 | } |
| 37840 | } |
| 37841 | |
| 37842 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1_ACC2, output_height_eq_2) { |
| 37843 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 37844 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37845 | DWConv2DMicrokernelTester() |
| 37846 | .input_width(input_width) |
| 37847 | .input_height(input_height) |
| 37848 | .kernel_height(3) |
| 37849 | .kernel_width(3) |
| 37850 | .subsampling(2) |
| 37851 | .padding_left(1) |
| 37852 | .padding_right(1) |
| 37853 | .padding_top(1) |
| 37854 | .padding_bottom(1) |
| 37855 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37856 | } |
| 37857 | } |
| 37858 | } |
| 37859 | |
| 37860 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1_ACC2, output_height_div_2) { |
| 37861 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 37862 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37863 | DWConv2DMicrokernelTester() |
| 37864 | .input_width(input_width) |
| 37865 | .input_height(input_height) |
| 37866 | .kernel_height(3) |
| 37867 | .kernel_width(3) |
| 37868 | .subsampling(2) |
| 37869 | .padding_left(1) |
| 37870 | .padding_right(1) |
| 37871 | .padding_top(1) |
| 37872 | .padding_bottom(1) |
| 37873 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37874 | } |
| 37875 | } |
| 37876 | } |
| 37877 | |
| 37878 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1_ACC2, output_height_lt_2) { |
| 37879 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 37880 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37881 | DWConv2DMicrokernelTester() |
| 37882 | .input_width(input_width) |
| 37883 | .input_height(input_height) |
| 37884 | .kernel_height(3) |
| 37885 | .kernel_width(3) |
| 37886 | .subsampling(2) |
| 37887 | .padding_left(1) |
| 37888 | .padding_right(1) |
| 37889 | .padding_top(1) |
| 37890 | .padding_bottom(1) |
| 37891 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37892 | } |
| 37893 | } |
| 37894 | } |
| 37895 | |
| 37896 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1_ACC2, output_height_gt_2) { |
| 37897 | for (size_t input_height = 5; input_height < 21; input_height++) { |
| 37898 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37899 | DWConv2DMicrokernelTester() |
| 37900 | .input_width(input_width) |
| 37901 | .input_height(input_height) |
| 37902 | .kernel_height(3) |
| 37903 | .kernel_width(3) |
| 37904 | .subsampling(2) |
| 37905 | .padding_left(1) |
| 37906 | .padding_right(1) |
| 37907 | .padding_top(1) |
| 37908 | .padding_bottom(1) |
| 37909 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37910 | } |
| 37911 | } |
| 37912 | } |
| 37913 | |
| 37914 | TEST(F32_DWCONV2D_CHW_3X3S2P1__SCALAR_2X1_ACC2, padding_top_eq_1) { |
| 37915 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 37916 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 37917 | DWConv2DMicrokernelTester() |
| 37918 | .input_width(input_width) |
| 37919 | .input_height(input_height) |
| 37920 | .kernel_height(3) |
| 37921 | .kernel_width(3) |
| 37922 | .subsampling(2) |
| 37923 | .padding_left(1) |
| 37924 | .padding_right(1) |
| 37925 | .padding_top(0) |
| 37926 | .padding_bottom(1) |
| 37927 | .Test(xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37928 | } |
| 37929 | } |
| 37930 | } |
| 37931 | |
| Marat Dukhan | c4efb00 | 2020-10-25 23:14:47 -0700 | [diff] [blame] | 37932 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1, output_width_eq_1) { |
| 37933 | DWConv2DMicrokernelTester() |
| 37934 | .input_width(1) |
| 37935 | .input_height(1) |
| 37936 | .kernel_height(5) |
| 37937 | .kernel_width(5) |
| 37938 | .subsampling(1) |
| 37939 | .padding_left(2) |
| 37940 | .padding_right(2) |
| 37941 | .padding_top(2) |
| 37942 | .padding_bottom(2) |
| 37943 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37944 | } |
| 37945 | |
| 37946 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1, output_width_gt_1) { |
| 37947 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 37948 | DWConv2DMicrokernelTester() |
| 37949 | .input_width(input_width) |
| 37950 | .input_height(1) |
| 37951 | .kernel_height(5) |
| 37952 | .kernel_width(5) |
| 37953 | .subsampling(1) |
| 37954 | .padding_left(2) |
| 37955 | .padding_right(2) |
| 37956 | .padding_top(2) |
| 37957 | .padding_bottom(2) |
| 37958 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37959 | } |
| 37960 | } |
| 37961 | |
| 37962 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1, output_height_gt_1) { |
| 37963 | for (size_t input_height = 2; input_height < 6; input_height++) { |
| 37964 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 37965 | DWConv2DMicrokernelTester() |
| 37966 | .input_width(input_width) |
| 37967 | .input_height(input_height) |
| 37968 | .kernel_height(5) |
| 37969 | .kernel_width(5) |
| 37970 | .subsampling(1) |
| 37971 | .padding_left(2) |
| 37972 | .padding_right(2) |
| 37973 | .padding_top(2) |
| 37974 | .padding_bottom(2) |
| 37975 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37976 | } |
| 37977 | } |
| 37978 | } |
| 37979 | |
| 37980 | |
| 37981 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1, output_width_eq_1) { |
| 37982 | DWConv2DMicrokernelTester() |
| 37983 | .input_width(1) |
| 37984 | .input_height(2) |
| 37985 | .kernel_height(5) |
| 37986 | .kernel_width(5) |
| 37987 | .subsampling(1) |
| 37988 | .padding_left(2) |
| 37989 | .padding_right(2) |
| 37990 | .padding_top(2) |
| 37991 | .padding_bottom(2) |
| 37992 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 37993 | } |
| 37994 | |
| 37995 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1, output_width_gt_1) { |
| 37996 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 37997 | DWConv2DMicrokernelTester() |
| 37998 | .input_width(input_width) |
| 37999 | .input_height(2) |
| 38000 | .kernel_height(5) |
| 38001 | .kernel_width(5) |
| 38002 | .subsampling(1) |
| 38003 | .padding_left(2) |
| 38004 | .padding_right(2) |
| 38005 | .padding_top(2) |
| 38006 | .padding_bottom(2) |
| 38007 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38008 | } |
| 38009 | } |
| 38010 | |
| 38011 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1, output_height_div_2) { |
| 38012 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 38013 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38014 | DWConv2DMicrokernelTester() |
| 38015 | .input_width(input_width) |
| 38016 | .input_height(input_height) |
| 38017 | .kernel_height(5) |
| 38018 | .kernel_width(5) |
| 38019 | .subsampling(1) |
| 38020 | .padding_left(2) |
| 38021 | .padding_right(2) |
| 38022 | .padding_top(2) |
| 38023 | .padding_bottom(2) |
| 38024 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38025 | } |
| 38026 | } |
| 38027 | } |
| 38028 | |
| 38029 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1, output_height_lt_2) { |
| 38030 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 38031 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38032 | DWConv2DMicrokernelTester() |
| 38033 | .input_width(input_width) |
| 38034 | .input_height(input_height) |
| 38035 | .kernel_height(5) |
| 38036 | .kernel_width(5) |
| 38037 | .subsampling(1) |
| 38038 | .padding_left(2) |
| 38039 | .padding_right(2) |
| 38040 | .padding_top(2) |
| 38041 | .padding_bottom(2) |
| 38042 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38043 | } |
| 38044 | } |
| 38045 | } |
| 38046 | |
| 38047 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1, output_height_gt_2) { |
| 38048 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 38049 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38050 | DWConv2DMicrokernelTester() |
| 38051 | .input_width(input_width) |
| 38052 | .input_height(input_height) |
| 38053 | .kernel_height(5) |
| 38054 | .kernel_width(5) |
| 38055 | .subsampling(1) |
| 38056 | .padding_left(2) |
| 38057 | .padding_right(2) |
| 38058 | .padding_top(2) |
| 38059 | .padding_bottom(2) |
| 38060 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38061 | } |
| 38062 | } |
| 38063 | } |
| 38064 | |
| 38065 | |
| 38066 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_3X1, output_width_eq_1) { |
| 38067 | DWConv2DMicrokernelTester() |
| 38068 | .input_width(1) |
| 38069 | .input_height(3) |
| 38070 | .kernel_height(5) |
| 38071 | .kernel_width(5) |
| 38072 | .subsampling(1) |
| 38073 | .padding_left(2) |
| 38074 | .padding_right(2) |
| 38075 | .padding_top(2) |
| 38076 | .padding_bottom(2) |
| 38077 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38078 | } |
| 38079 | |
| 38080 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_3X1, output_width_gt_1) { |
| 38081 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 38082 | DWConv2DMicrokernelTester() |
| 38083 | .input_width(input_width) |
| 38084 | .input_height(3) |
| 38085 | .kernel_height(5) |
| 38086 | .kernel_width(5) |
| 38087 | .subsampling(1) |
| 38088 | .padding_left(2) |
| 38089 | .padding_right(2) |
| 38090 | .padding_top(2) |
| 38091 | .padding_bottom(2) |
| 38092 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38093 | } |
| 38094 | } |
| 38095 | |
| 38096 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_3X1, output_height_div_3) { |
| 38097 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 38098 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38099 | DWConv2DMicrokernelTester() |
| 38100 | .input_width(input_width) |
| 38101 | .input_height(input_height) |
| 38102 | .kernel_height(5) |
| 38103 | .kernel_width(5) |
| 38104 | .subsampling(1) |
| 38105 | .padding_left(2) |
| 38106 | .padding_right(2) |
| 38107 | .padding_top(2) |
| 38108 | .padding_bottom(2) |
| 38109 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38110 | } |
| 38111 | } |
| 38112 | } |
| 38113 | |
| 38114 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_3X1, output_height_lt_3) { |
| 38115 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 38116 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38117 | DWConv2DMicrokernelTester() |
| 38118 | .input_width(input_width) |
| 38119 | .input_height(input_height) |
| 38120 | .kernel_height(5) |
| 38121 | .kernel_width(5) |
| 38122 | .subsampling(1) |
| 38123 | .padding_left(2) |
| 38124 | .padding_right(2) |
| 38125 | .padding_top(2) |
| 38126 | .padding_bottom(2) |
| 38127 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38128 | } |
| 38129 | } |
| 38130 | } |
| 38131 | |
| 38132 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_3X1, output_height_gt_3) { |
| 38133 | for (size_t input_height = 4; input_height < 16; input_height++) { |
| 38134 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38135 | DWConv2DMicrokernelTester() |
| 38136 | .input_width(input_width) |
| 38137 | .input_height(input_height) |
| 38138 | .kernel_height(5) |
| 38139 | .kernel_width(5) |
| 38140 | .subsampling(1) |
| 38141 | .padding_left(2) |
| 38142 | .padding_right(2) |
| 38143 | .padding_top(2) |
| 38144 | .padding_bottom(2) |
| 38145 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38146 | } |
| 38147 | } |
| 38148 | } |
| 38149 | |
| 38150 | |
| 38151 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1_ACC2, output_width_eq_1) { |
| 38152 | DWConv2DMicrokernelTester() |
| 38153 | .input_width(1) |
| 38154 | .input_height(1) |
| 38155 | .kernel_height(5) |
| 38156 | .kernel_width(5) |
| 38157 | .subsampling(1) |
| 38158 | .padding_left(2) |
| 38159 | .padding_right(2) |
| 38160 | .padding_top(2) |
| 38161 | .padding_bottom(2) |
| 38162 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38163 | } |
| 38164 | |
| 38165 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1_ACC2, output_width_gt_1) { |
| 38166 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 38167 | DWConv2DMicrokernelTester() |
| 38168 | .input_width(input_width) |
| 38169 | .input_height(1) |
| 38170 | .kernel_height(5) |
| 38171 | .kernel_width(5) |
| 38172 | .subsampling(1) |
| 38173 | .padding_left(2) |
| 38174 | .padding_right(2) |
| 38175 | .padding_top(2) |
| 38176 | .padding_bottom(2) |
| 38177 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38178 | } |
| 38179 | } |
| 38180 | |
| 38181 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1_ACC2, output_height_gt_1) { |
| 38182 | for (size_t input_height = 2; input_height < 6; input_height++) { |
| 38183 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38184 | DWConv2DMicrokernelTester() |
| 38185 | .input_width(input_width) |
| 38186 | .input_height(input_height) |
| 38187 | .kernel_height(5) |
| 38188 | .kernel_width(5) |
| 38189 | .subsampling(1) |
| 38190 | .padding_left(2) |
| 38191 | .padding_right(2) |
| 38192 | .padding_top(2) |
| 38193 | .padding_bottom(2) |
| 38194 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38195 | } |
| 38196 | } |
| 38197 | } |
| 38198 | |
| 38199 | |
| 38200 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1_ACC3, output_width_eq_1) { |
| 38201 | DWConv2DMicrokernelTester() |
| 38202 | .input_width(1) |
| 38203 | .input_height(1) |
| 38204 | .kernel_height(5) |
| 38205 | .kernel_width(5) |
| 38206 | .subsampling(1) |
| 38207 | .padding_left(2) |
| 38208 | .padding_right(2) |
| 38209 | .padding_top(2) |
| 38210 | .padding_bottom(2) |
| 38211 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38212 | } |
| 38213 | |
| 38214 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1_ACC3, output_width_gt_1) { |
| 38215 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 38216 | DWConv2DMicrokernelTester() |
| 38217 | .input_width(input_width) |
| 38218 | .input_height(1) |
| 38219 | .kernel_height(5) |
| 38220 | .kernel_width(5) |
| 38221 | .subsampling(1) |
| 38222 | .padding_left(2) |
| 38223 | .padding_right(2) |
| 38224 | .padding_top(2) |
| 38225 | .padding_bottom(2) |
| 38226 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38227 | } |
| 38228 | } |
| 38229 | |
| 38230 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1_ACC3, output_height_gt_1) { |
| 38231 | for (size_t input_height = 2; input_height < 6; input_height++) { |
| 38232 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38233 | DWConv2DMicrokernelTester() |
| 38234 | .input_width(input_width) |
| 38235 | .input_height(input_height) |
| 38236 | .kernel_height(5) |
| 38237 | .kernel_width(5) |
| 38238 | .subsampling(1) |
| 38239 | .padding_left(2) |
| 38240 | .padding_right(2) |
| 38241 | .padding_top(2) |
| 38242 | .padding_bottom(2) |
| 38243 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38244 | } |
| 38245 | } |
| 38246 | } |
| 38247 | |
| 38248 | |
| 38249 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1_ACC4, output_width_eq_1) { |
| 38250 | DWConv2DMicrokernelTester() |
| 38251 | .input_width(1) |
| 38252 | .input_height(1) |
| 38253 | .kernel_height(5) |
| 38254 | .kernel_width(5) |
| 38255 | .subsampling(1) |
| 38256 | .padding_left(2) |
| 38257 | .padding_right(2) |
| 38258 | .padding_top(2) |
| 38259 | .padding_bottom(2) |
| 38260 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38261 | } |
| 38262 | |
| 38263 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1_ACC4, output_width_gt_1) { |
| 38264 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 38265 | DWConv2DMicrokernelTester() |
| 38266 | .input_width(input_width) |
| 38267 | .input_height(1) |
| 38268 | .kernel_height(5) |
| 38269 | .kernel_width(5) |
| 38270 | .subsampling(1) |
| 38271 | .padding_left(2) |
| 38272 | .padding_right(2) |
| 38273 | .padding_top(2) |
| 38274 | .padding_bottom(2) |
| 38275 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38276 | } |
| 38277 | } |
| 38278 | |
| 38279 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1_ACC4, output_height_gt_1) { |
| 38280 | for (size_t input_height = 2; input_height < 6; input_height++) { |
| 38281 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38282 | DWConv2DMicrokernelTester() |
| 38283 | .input_width(input_width) |
| 38284 | .input_height(input_height) |
| 38285 | .kernel_height(5) |
| 38286 | .kernel_width(5) |
| 38287 | .subsampling(1) |
| 38288 | .padding_left(2) |
| 38289 | .padding_right(2) |
| 38290 | .padding_top(2) |
| 38291 | .padding_bottom(2) |
| 38292 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38293 | } |
| 38294 | } |
| 38295 | } |
| 38296 | |
| 38297 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 38298 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1_ACC5, output_width_eq_1) { |
| 38299 | DWConv2DMicrokernelTester() |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 38300 | .input_width(1) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 38301 | .input_height(1) |
| 38302 | .kernel_height(5) |
| 38303 | .kernel_width(5) |
| 38304 | .subsampling(1) |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 38305 | .padding_left(2) |
| 38306 | .padding_right(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 38307 | .padding_top(2) |
| 38308 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 38309 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc5, DWConv2DMicrokernelTester::Variant::Scalar); |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 38310 | } |
| 38311 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 38312 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1_ACC5, output_width_gt_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 38313 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 38314 | DWConv2DMicrokernelTester() |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 38315 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 38316 | .input_height(1) |
| 38317 | .kernel_height(5) |
| 38318 | .kernel_width(5) |
| 38319 | .subsampling(1) |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 38320 | .padding_left(2) |
| 38321 | .padding_right(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 38322 | .padding_top(2) |
| 38323 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 38324 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc5, DWConv2DMicrokernelTester::Variant::Scalar); |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 38325 | } |
| 38326 | } |
| 38327 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 38328 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_1X1_ACC5, output_height_gt_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 38329 | for (size_t input_height = 2; input_height < 6; input_height++) { |
| 38330 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 38331 | DWConv2DMicrokernelTester() |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 38332 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 38333 | .input_height(input_height) |
| 38334 | .kernel_height(5) |
| 38335 | .kernel_width(5) |
| 38336 | .subsampling(1) |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 38337 | .padding_left(2) |
| 38338 | .padding_right(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 38339 | .padding_top(2) |
| Marat Dukhan | ae7e8b2 | 2020-10-20 17:51:51 -0700 | [diff] [blame] | 38340 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 38341 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc5, DWConv2DMicrokernelTester::Variant::Scalar); |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 38342 | } |
| 38343 | } |
| 38344 | } |
| 38345 | |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 38346 | |
| Marat Dukhan | c4efb00 | 2020-10-25 23:14:47 -0700 | [diff] [blame] | 38347 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1_ACC2, output_width_eq_1) { |
| 38348 | DWConv2DMicrokernelTester() |
| 38349 | .input_width(1) |
| 38350 | .input_height(2) |
| 38351 | .kernel_height(5) |
| 38352 | .kernel_width(5) |
| 38353 | .subsampling(1) |
| 38354 | .padding_left(2) |
| 38355 | .padding_right(2) |
| 38356 | .padding_top(2) |
| 38357 | .padding_bottom(2) |
| 38358 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38359 | } |
| 38360 | |
| 38361 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1_ACC2, output_width_gt_1) { |
| 38362 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 38363 | DWConv2DMicrokernelTester() |
| 38364 | .input_width(input_width) |
| 38365 | .input_height(2) |
| 38366 | .kernel_height(5) |
| 38367 | .kernel_width(5) |
| 38368 | .subsampling(1) |
| 38369 | .padding_left(2) |
| 38370 | .padding_right(2) |
| 38371 | .padding_top(2) |
| 38372 | .padding_bottom(2) |
| 38373 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38374 | } |
| 38375 | } |
| 38376 | |
| 38377 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1_ACC2, output_height_div_2) { |
| 38378 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 38379 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38380 | DWConv2DMicrokernelTester() |
| 38381 | .input_width(input_width) |
| 38382 | .input_height(input_height) |
| 38383 | .kernel_height(5) |
| 38384 | .kernel_width(5) |
| 38385 | .subsampling(1) |
| 38386 | .padding_left(2) |
| 38387 | .padding_right(2) |
| 38388 | .padding_top(2) |
| 38389 | .padding_bottom(2) |
| 38390 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38391 | } |
| 38392 | } |
| 38393 | } |
| 38394 | |
| 38395 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1_ACC2, output_height_lt_2) { |
| 38396 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 38397 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38398 | DWConv2DMicrokernelTester() |
| 38399 | .input_width(input_width) |
| 38400 | .input_height(input_height) |
| 38401 | .kernel_height(5) |
| 38402 | .kernel_width(5) |
| 38403 | .subsampling(1) |
| 38404 | .padding_left(2) |
| 38405 | .padding_right(2) |
| 38406 | .padding_top(2) |
| 38407 | .padding_bottom(2) |
| 38408 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38409 | } |
| 38410 | } |
| 38411 | } |
| 38412 | |
| 38413 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1_ACC2, output_height_gt_2) { |
| 38414 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 38415 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38416 | DWConv2DMicrokernelTester() |
| 38417 | .input_width(input_width) |
| 38418 | .input_height(input_height) |
| 38419 | .kernel_height(5) |
| 38420 | .kernel_width(5) |
| 38421 | .subsampling(1) |
| 38422 | .padding_left(2) |
| 38423 | .padding_right(2) |
| 38424 | .padding_top(2) |
| 38425 | .padding_bottom(2) |
| 38426 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38427 | } |
| 38428 | } |
| 38429 | } |
| 38430 | |
| 38431 | |
| 38432 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1_ACC3, output_width_eq_1) { |
| 38433 | DWConv2DMicrokernelTester() |
| 38434 | .input_width(1) |
| 38435 | .input_height(2) |
| 38436 | .kernel_height(5) |
| 38437 | .kernel_width(5) |
| 38438 | .subsampling(1) |
| 38439 | .padding_left(2) |
| 38440 | .padding_right(2) |
| 38441 | .padding_top(2) |
| 38442 | .padding_bottom(2) |
| 38443 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38444 | } |
| 38445 | |
| 38446 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1_ACC3, output_width_gt_1) { |
| 38447 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 38448 | DWConv2DMicrokernelTester() |
| 38449 | .input_width(input_width) |
| 38450 | .input_height(2) |
| 38451 | .kernel_height(5) |
| 38452 | .kernel_width(5) |
| 38453 | .subsampling(1) |
| 38454 | .padding_left(2) |
| 38455 | .padding_right(2) |
| 38456 | .padding_top(2) |
| 38457 | .padding_bottom(2) |
| 38458 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38459 | } |
| 38460 | } |
| 38461 | |
| 38462 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1_ACC3, output_height_div_2) { |
| 38463 | for (size_t input_height = 4; input_height < 16; input_height += 2) { |
| 38464 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38465 | DWConv2DMicrokernelTester() |
| 38466 | .input_width(input_width) |
| 38467 | .input_height(input_height) |
| 38468 | .kernel_height(5) |
| 38469 | .kernel_width(5) |
| 38470 | .subsampling(1) |
| 38471 | .padding_left(2) |
| 38472 | .padding_right(2) |
| 38473 | .padding_top(2) |
| 38474 | .padding_bottom(2) |
| 38475 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38476 | } |
| 38477 | } |
| 38478 | } |
| 38479 | |
| 38480 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1_ACC3, output_height_lt_2) { |
| 38481 | for (size_t input_height = 1; input_height < 2; input_height++) { |
| 38482 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38483 | DWConv2DMicrokernelTester() |
| 38484 | .input_width(input_width) |
| 38485 | .input_height(input_height) |
| 38486 | .kernel_height(5) |
| 38487 | .kernel_width(5) |
| 38488 | .subsampling(1) |
| 38489 | .padding_left(2) |
| 38490 | .padding_right(2) |
| 38491 | .padding_top(2) |
| 38492 | .padding_bottom(2) |
| 38493 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38494 | } |
| 38495 | } |
| 38496 | } |
| 38497 | |
| 38498 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_2X1_ACC3, output_height_gt_2) { |
| 38499 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 38500 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38501 | DWConv2DMicrokernelTester() |
| 38502 | .input_width(input_width) |
| 38503 | .input_height(input_height) |
| 38504 | .kernel_height(5) |
| 38505 | .kernel_width(5) |
| 38506 | .subsampling(1) |
| 38507 | .padding_left(2) |
| 38508 | .padding_right(2) |
| 38509 | .padding_top(2) |
| 38510 | .padding_bottom(2) |
| 38511 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38512 | } |
| 38513 | } |
| 38514 | } |
| 38515 | |
| 38516 | |
| 38517 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_3X1_ACC2, output_width_eq_1) { |
| 38518 | DWConv2DMicrokernelTester() |
| 38519 | .input_width(1) |
| 38520 | .input_height(3) |
| 38521 | .kernel_height(5) |
| 38522 | .kernel_width(5) |
| 38523 | .subsampling(1) |
| 38524 | .padding_left(2) |
| 38525 | .padding_right(2) |
| 38526 | .padding_top(2) |
| 38527 | .padding_bottom(2) |
| 38528 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_3x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38529 | } |
| 38530 | |
| 38531 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_3X1_ACC2, output_width_gt_1) { |
| 38532 | for (size_t input_width = 2; input_width < 6; input_width++) { |
| 38533 | DWConv2DMicrokernelTester() |
| 38534 | .input_width(input_width) |
| 38535 | .input_height(3) |
| 38536 | .kernel_height(5) |
| 38537 | .kernel_width(5) |
| 38538 | .subsampling(1) |
| 38539 | .padding_left(2) |
| 38540 | .padding_right(2) |
| 38541 | .padding_top(2) |
| 38542 | .padding_bottom(2) |
| 38543 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_3x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38544 | } |
| 38545 | } |
| 38546 | |
| 38547 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_3X1_ACC2, output_height_div_3) { |
| 38548 | for (size_t input_height = 6; input_height < 24; input_height += 3) { |
| 38549 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38550 | DWConv2DMicrokernelTester() |
| 38551 | .input_width(input_width) |
| 38552 | .input_height(input_height) |
| 38553 | .kernel_height(5) |
| 38554 | .kernel_width(5) |
| 38555 | .subsampling(1) |
| 38556 | .padding_left(2) |
| 38557 | .padding_right(2) |
| 38558 | .padding_top(2) |
| 38559 | .padding_bottom(2) |
| 38560 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_3x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38561 | } |
| 38562 | } |
| 38563 | } |
| 38564 | |
| 38565 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_3X1_ACC2, output_height_lt_3) { |
| 38566 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 38567 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38568 | DWConv2DMicrokernelTester() |
| 38569 | .input_width(input_width) |
| 38570 | .input_height(input_height) |
| 38571 | .kernel_height(5) |
| 38572 | .kernel_width(5) |
| 38573 | .subsampling(1) |
| 38574 | .padding_left(2) |
| 38575 | .padding_right(2) |
| 38576 | .padding_top(2) |
| 38577 | .padding_bottom(2) |
| 38578 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_3x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38579 | } |
| 38580 | } |
| 38581 | } |
| 38582 | |
| 38583 | TEST(F32_DWCONV2D_CHW_5X5P2__SCALAR_3X1_ACC2, output_height_gt_3) { |
| 38584 | for (size_t input_height = 4; input_height < 16; input_height++) { |
| 38585 | for (size_t input_width = 1; input_width < 6; input_width += 1) { |
| 38586 | DWConv2DMicrokernelTester() |
| 38587 | .input_width(input_width) |
| 38588 | .input_height(input_height) |
| 38589 | .kernel_height(5) |
| 38590 | .kernel_width(5) |
| 38591 | .subsampling(1) |
| 38592 | .padding_left(2) |
| 38593 | .padding_right(2) |
| 38594 | .padding_top(2) |
| 38595 | .padding_bottom(2) |
| 38596 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_3x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38597 | } |
| 38598 | } |
| 38599 | } |
| 38600 | |
| 38601 | |
| Marat Dukhan | 29c0c33 | 2020-10-28 22:11:00 -0700 | [diff] [blame] | 38602 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1, output_width_eq_1) { |
| 38603 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 38604 | DWConv2DMicrokernelTester() |
| 38605 | .input_width(input_width) |
| 38606 | .input_height(2) |
| 38607 | .kernel_height(5) |
| 38608 | .kernel_width(5) |
| 38609 | .subsampling(2) |
| 38610 | .padding_left(2) |
| 38611 | .padding_right(2) |
| 38612 | .padding_top(2) |
| 38613 | .padding_bottom(2) |
| 38614 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38615 | } |
| 38616 | } |
| 38617 | |
| 38618 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1, output_width_gt_1) { |
| 38619 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 38620 | DWConv2DMicrokernelTester() |
| 38621 | .input_width(input_width) |
| 38622 | .input_height(2) |
| 38623 | .kernel_height(5) |
| 38624 | .kernel_width(5) |
| 38625 | .subsampling(2) |
| 38626 | .padding_left(2) |
| 38627 | .padding_right(2) |
| 38628 | .padding_top(2) |
| 38629 | .padding_bottom(2) |
| 38630 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38631 | } |
| 38632 | } |
| 38633 | |
| 38634 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1, output_height_eq_1) { |
| 38635 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 38636 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38637 | DWConv2DMicrokernelTester() |
| 38638 | .input_width(input_width) |
| 38639 | .input_height(input_height) |
| 38640 | .kernel_height(5) |
| 38641 | .kernel_width(5) |
| 38642 | .subsampling(2) |
| 38643 | .padding_left(2) |
| 38644 | .padding_right(2) |
| 38645 | .padding_top(2) |
| 38646 | .padding_bottom(2) |
| 38647 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38648 | } |
| 38649 | } |
| 38650 | } |
| 38651 | |
| 38652 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1, output_height_gt_1) { |
| 38653 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 38654 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38655 | DWConv2DMicrokernelTester() |
| 38656 | .input_width(input_width) |
| 38657 | .input_height(input_height) |
| 38658 | .kernel_height(5) |
| 38659 | .kernel_width(5) |
| 38660 | .subsampling(2) |
| 38661 | .padding_left(2) |
| 38662 | .padding_right(2) |
| 38663 | .padding_top(2) |
| 38664 | .padding_bottom(2) |
| 38665 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38666 | } |
| 38667 | } |
| 38668 | } |
| 38669 | |
| 38670 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1, padding_top_eq_1) { |
| 38671 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 38672 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38673 | DWConv2DMicrokernelTester() |
| 38674 | .input_width(input_width) |
| 38675 | .input_height(input_height) |
| 38676 | .kernel_height(5) |
| 38677 | .kernel_width(5) |
| 38678 | .subsampling(2) |
| 38679 | .padding_left(2) |
| 38680 | .padding_right(2) |
| 38681 | .padding_top(1) |
| 38682 | .padding_bottom(2) |
| 38683 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38684 | } |
| 38685 | } |
| 38686 | } |
| 38687 | |
| 38688 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1, output_width_eq_1) { |
| 38689 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 38690 | DWConv2DMicrokernelTester() |
| 38691 | .input_width(input_width) |
| 38692 | .input_height(4) |
| 38693 | .kernel_height(5) |
| 38694 | .kernel_width(5) |
| 38695 | .subsampling(2) |
| 38696 | .padding_left(2) |
| 38697 | .padding_right(2) |
| 38698 | .padding_top(2) |
| 38699 | .padding_bottom(2) |
| 38700 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38701 | } |
| 38702 | } |
| 38703 | |
| 38704 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1, output_width_gt_1) { |
| 38705 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 38706 | DWConv2DMicrokernelTester() |
| 38707 | .input_width(input_width) |
| 38708 | .input_height(4) |
| 38709 | .kernel_height(5) |
| 38710 | .kernel_width(5) |
| 38711 | .subsampling(2) |
| 38712 | .padding_left(2) |
| 38713 | .padding_right(2) |
| 38714 | .padding_top(2) |
| 38715 | .padding_bottom(2) |
| 38716 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38717 | } |
| 38718 | } |
| 38719 | |
| 38720 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1, output_height_eq_2) { |
| 38721 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 38722 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38723 | DWConv2DMicrokernelTester() |
| 38724 | .input_width(input_width) |
| 38725 | .input_height(input_height) |
| 38726 | .kernel_height(5) |
| 38727 | .kernel_width(5) |
| 38728 | .subsampling(2) |
| 38729 | .padding_left(2) |
| 38730 | .padding_right(2) |
| 38731 | .padding_top(2) |
| 38732 | .padding_bottom(2) |
| 38733 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38734 | } |
| 38735 | } |
| 38736 | } |
| 38737 | |
| 38738 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1, output_height_div_2) { |
| 38739 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 38740 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38741 | DWConv2DMicrokernelTester() |
| 38742 | .input_width(input_width) |
| 38743 | .input_height(input_height) |
| 38744 | .kernel_height(5) |
| 38745 | .kernel_width(5) |
| 38746 | .subsampling(2) |
| 38747 | .padding_left(2) |
| 38748 | .padding_right(2) |
| 38749 | .padding_top(2) |
| 38750 | .padding_bottom(2) |
| 38751 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38752 | } |
| 38753 | } |
| 38754 | } |
| 38755 | |
| 38756 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1, output_height_lt_2) { |
| 38757 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 38758 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38759 | DWConv2DMicrokernelTester() |
| 38760 | .input_width(input_width) |
| 38761 | .input_height(input_height) |
| 38762 | .kernel_height(5) |
| 38763 | .kernel_width(5) |
| 38764 | .subsampling(2) |
| 38765 | .padding_left(2) |
| 38766 | .padding_right(2) |
| 38767 | .padding_top(2) |
| 38768 | .padding_bottom(2) |
| 38769 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38770 | } |
| 38771 | } |
| 38772 | } |
| 38773 | |
| 38774 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1, output_height_gt_2) { |
| 38775 | for (size_t input_height = 5; input_height < 21; input_height++) { |
| 38776 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38777 | DWConv2DMicrokernelTester() |
| 38778 | .input_width(input_width) |
| 38779 | .input_height(input_height) |
| 38780 | .kernel_height(5) |
| 38781 | .kernel_width(5) |
| 38782 | .subsampling(2) |
| 38783 | .padding_left(2) |
| 38784 | .padding_right(2) |
| 38785 | .padding_top(2) |
| 38786 | .padding_bottom(2) |
| 38787 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38788 | } |
| 38789 | } |
| 38790 | } |
| 38791 | |
| 38792 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1, padding_top_eq_1) { |
| 38793 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 38794 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38795 | DWConv2DMicrokernelTester() |
| 38796 | .input_width(input_width) |
| 38797 | .input_height(input_height) |
| 38798 | .kernel_height(5) |
| 38799 | .kernel_width(5) |
| 38800 | .subsampling(2) |
| 38801 | .padding_left(2) |
| 38802 | .padding_right(2) |
| 38803 | .padding_top(1) |
| 38804 | .padding_bottom(2) |
| 38805 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38806 | } |
| 38807 | } |
| 38808 | } |
| 38809 | |
| 38810 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1, output_width_eq_1) { |
| 38811 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 38812 | DWConv2DMicrokernelTester() |
| 38813 | .input_width(input_width) |
| 38814 | .input_height(6) |
| 38815 | .kernel_height(5) |
| 38816 | .kernel_width(5) |
| 38817 | .subsampling(2) |
| 38818 | .padding_left(2) |
| 38819 | .padding_right(2) |
| 38820 | .padding_top(2) |
| 38821 | .padding_bottom(2) |
| 38822 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38823 | } |
| 38824 | } |
| 38825 | |
| 38826 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1, output_width_gt_1) { |
| 38827 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 38828 | DWConv2DMicrokernelTester() |
| 38829 | .input_width(input_width) |
| 38830 | .input_height(6) |
| 38831 | .kernel_height(5) |
| 38832 | .kernel_width(5) |
| 38833 | .subsampling(2) |
| 38834 | .padding_left(2) |
| 38835 | .padding_right(2) |
| 38836 | .padding_top(2) |
| 38837 | .padding_bottom(2) |
| 38838 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38839 | } |
| 38840 | } |
| 38841 | |
| 38842 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1, output_height_eq_3) { |
| 38843 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 38844 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38845 | DWConv2DMicrokernelTester() |
| 38846 | .input_width(input_width) |
| 38847 | .input_height(input_height) |
| 38848 | .kernel_height(5) |
| 38849 | .kernel_width(5) |
| 38850 | .subsampling(2) |
| 38851 | .padding_left(2) |
| 38852 | .padding_right(2) |
| 38853 | .padding_top(2) |
| 38854 | .padding_bottom(2) |
| 38855 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38856 | } |
| 38857 | } |
| 38858 | } |
| 38859 | |
| 38860 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1, output_height_div_3) { |
| 38861 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 38862 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38863 | DWConv2DMicrokernelTester() |
| 38864 | .input_width(input_width) |
| 38865 | .input_height(input_height) |
| 38866 | .kernel_height(5) |
| 38867 | .kernel_width(5) |
| 38868 | .subsampling(2) |
| 38869 | .padding_left(2) |
| 38870 | .padding_right(2) |
| 38871 | .padding_top(2) |
| 38872 | .padding_bottom(2) |
| 38873 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38874 | } |
| 38875 | } |
| 38876 | } |
| 38877 | |
| 38878 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1, output_height_lt_3) { |
| 38879 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 38880 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38881 | DWConv2DMicrokernelTester() |
| 38882 | .input_width(input_width) |
| 38883 | .input_height(input_height) |
| 38884 | .kernel_height(5) |
| 38885 | .kernel_width(5) |
| 38886 | .subsampling(2) |
| 38887 | .padding_left(2) |
| 38888 | .padding_right(2) |
| 38889 | .padding_top(2) |
| 38890 | .padding_bottom(2) |
| 38891 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38892 | } |
| 38893 | } |
| 38894 | } |
| 38895 | |
| 38896 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1, output_height_gt_3) { |
| 38897 | for (size_t input_height = 7; input_height < 31; input_height++) { |
| 38898 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38899 | DWConv2DMicrokernelTester() |
| 38900 | .input_width(input_width) |
| 38901 | .input_height(input_height) |
| 38902 | .kernel_height(5) |
| 38903 | .kernel_width(5) |
| 38904 | .subsampling(2) |
| 38905 | .padding_left(2) |
| 38906 | .padding_right(2) |
| 38907 | .padding_top(2) |
| 38908 | .padding_bottom(2) |
| 38909 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38910 | } |
| 38911 | } |
| 38912 | } |
| 38913 | |
| 38914 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1, padding_top_eq_1) { |
| 38915 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 38916 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38917 | DWConv2DMicrokernelTester() |
| 38918 | .input_width(input_width) |
| 38919 | .input_height(input_height) |
| 38920 | .kernel_height(5) |
| 38921 | .kernel_width(5) |
| 38922 | .subsampling(2) |
| 38923 | .padding_left(2) |
| 38924 | .padding_right(2) |
| 38925 | .padding_top(1) |
| 38926 | .padding_bottom(2) |
| 38927 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38928 | } |
| 38929 | } |
| 38930 | } |
| 38931 | |
| 38932 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC2, output_width_eq_1) { |
| 38933 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 38934 | DWConv2DMicrokernelTester() |
| 38935 | .input_width(input_width) |
| 38936 | .input_height(2) |
| 38937 | .kernel_height(5) |
| 38938 | .kernel_width(5) |
| 38939 | .subsampling(2) |
| 38940 | .padding_left(2) |
| 38941 | .padding_right(2) |
| 38942 | .padding_top(2) |
| 38943 | .padding_bottom(2) |
| 38944 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38945 | } |
| 38946 | } |
| 38947 | |
| 38948 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC2, output_width_gt_1) { |
| 38949 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 38950 | DWConv2DMicrokernelTester() |
| 38951 | .input_width(input_width) |
| 38952 | .input_height(2) |
| 38953 | .kernel_height(5) |
| 38954 | .kernel_width(5) |
| 38955 | .subsampling(2) |
| 38956 | .padding_left(2) |
| 38957 | .padding_right(2) |
| 38958 | .padding_top(2) |
| 38959 | .padding_bottom(2) |
| 38960 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38961 | } |
| 38962 | } |
| 38963 | |
| 38964 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC2, output_height_eq_1) { |
| 38965 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 38966 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38967 | DWConv2DMicrokernelTester() |
| 38968 | .input_width(input_width) |
| 38969 | .input_height(input_height) |
| 38970 | .kernel_height(5) |
| 38971 | .kernel_width(5) |
| 38972 | .subsampling(2) |
| 38973 | .padding_left(2) |
| 38974 | .padding_right(2) |
| 38975 | .padding_top(2) |
| 38976 | .padding_bottom(2) |
| 38977 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38978 | } |
| 38979 | } |
| 38980 | } |
| 38981 | |
| 38982 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC2, output_height_gt_1) { |
| 38983 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 38984 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 38985 | DWConv2DMicrokernelTester() |
| 38986 | .input_width(input_width) |
| 38987 | .input_height(input_height) |
| 38988 | .kernel_height(5) |
| 38989 | .kernel_width(5) |
| 38990 | .subsampling(2) |
| 38991 | .padding_left(2) |
| 38992 | .padding_right(2) |
| 38993 | .padding_top(2) |
| 38994 | .padding_bottom(2) |
| 38995 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 38996 | } |
| 38997 | } |
| 38998 | } |
| 38999 | |
| 39000 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC2, padding_top_eq_1) { |
| 39001 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 39002 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39003 | DWConv2DMicrokernelTester() |
| 39004 | .input_width(input_width) |
| 39005 | .input_height(input_height) |
| 39006 | .kernel_height(5) |
| 39007 | .kernel_width(5) |
| 39008 | .subsampling(2) |
| 39009 | .padding_left(2) |
| 39010 | .padding_right(2) |
| 39011 | .padding_top(1) |
| 39012 | .padding_bottom(2) |
| 39013 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39014 | } |
| 39015 | } |
| 39016 | } |
| 39017 | |
| 39018 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC3, output_width_eq_1) { |
| 39019 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 39020 | DWConv2DMicrokernelTester() |
| 39021 | .input_width(input_width) |
| 39022 | .input_height(2) |
| 39023 | .kernel_height(5) |
| 39024 | .kernel_width(5) |
| 39025 | .subsampling(2) |
| 39026 | .padding_left(2) |
| 39027 | .padding_right(2) |
| 39028 | .padding_top(2) |
| 39029 | .padding_bottom(2) |
| 39030 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39031 | } |
| 39032 | } |
| 39033 | |
| 39034 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC3, output_width_gt_1) { |
| 39035 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 39036 | DWConv2DMicrokernelTester() |
| 39037 | .input_width(input_width) |
| 39038 | .input_height(2) |
| 39039 | .kernel_height(5) |
| 39040 | .kernel_width(5) |
| 39041 | .subsampling(2) |
| 39042 | .padding_left(2) |
| 39043 | .padding_right(2) |
| 39044 | .padding_top(2) |
| 39045 | .padding_bottom(2) |
| 39046 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39047 | } |
| 39048 | } |
| 39049 | |
| 39050 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC3, output_height_eq_1) { |
| 39051 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 39052 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39053 | DWConv2DMicrokernelTester() |
| 39054 | .input_width(input_width) |
| 39055 | .input_height(input_height) |
| 39056 | .kernel_height(5) |
| 39057 | .kernel_width(5) |
| 39058 | .subsampling(2) |
| 39059 | .padding_left(2) |
| 39060 | .padding_right(2) |
| 39061 | .padding_top(2) |
| 39062 | .padding_bottom(2) |
| 39063 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39064 | } |
| 39065 | } |
| 39066 | } |
| 39067 | |
| 39068 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC3, output_height_gt_1) { |
| 39069 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 39070 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39071 | DWConv2DMicrokernelTester() |
| 39072 | .input_width(input_width) |
| 39073 | .input_height(input_height) |
| 39074 | .kernel_height(5) |
| 39075 | .kernel_width(5) |
| 39076 | .subsampling(2) |
| 39077 | .padding_left(2) |
| 39078 | .padding_right(2) |
| 39079 | .padding_top(2) |
| 39080 | .padding_bottom(2) |
| 39081 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39082 | } |
| 39083 | } |
| 39084 | } |
| 39085 | |
| 39086 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC3, padding_top_eq_1) { |
| 39087 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 39088 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39089 | DWConv2DMicrokernelTester() |
| 39090 | .input_width(input_width) |
| 39091 | .input_height(input_height) |
| 39092 | .kernel_height(5) |
| 39093 | .kernel_width(5) |
| 39094 | .subsampling(2) |
| 39095 | .padding_left(2) |
| 39096 | .padding_right(2) |
| 39097 | .padding_top(1) |
| 39098 | .padding_bottom(2) |
| 39099 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39100 | } |
| 39101 | } |
| 39102 | } |
| 39103 | |
| 39104 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC4, output_width_eq_1) { |
| 39105 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 39106 | DWConv2DMicrokernelTester() |
| 39107 | .input_width(input_width) |
| 39108 | .input_height(2) |
| 39109 | .kernel_height(5) |
| 39110 | .kernel_width(5) |
| 39111 | .subsampling(2) |
| 39112 | .padding_left(2) |
| 39113 | .padding_right(2) |
| 39114 | .padding_top(2) |
| 39115 | .padding_bottom(2) |
| 39116 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39117 | } |
| 39118 | } |
| 39119 | |
| 39120 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC4, output_width_gt_1) { |
| 39121 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 39122 | DWConv2DMicrokernelTester() |
| 39123 | .input_width(input_width) |
| 39124 | .input_height(2) |
| 39125 | .kernel_height(5) |
| 39126 | .kernel_width(5) |
| 39127 | .subsampling(2) |
| 39128 | .padding_left(2) |
| 39129 | .padding_right(2) |
| 39130 | .padding_top(2) |
| 39131 | .padding_bottom(2) |
| 39132 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39133 | } |
| 39134 | } |
| 39135 | |
| 39136 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC4, output_height_eq_1) { |
| 39137 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 39138 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39139 | DWConv2DMicrokernelTester() |
| 39140 | .input_width(input_width) |
| 39141 | .input_height(input_height) |
| 39142 | .kernel_height(5) |
| 39143 | .kernel_width(5) |
| 39144 | .subsampling(2) |
| 39145 | .padding_left(2) |
| 39146 | .padding_right(2) |
| 39147 | .padding_top(2) |
| 39148 | .padding_bottom(2) |
| 39149 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39150 | } |
| 39151 | } |
| 39152 | } |
| 39153 | |
| 39154 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC4, output_height_gt_1) { |
| 39155 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 39156 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39157 | DWConv2DMicrokernelTester() |
| 39158 | .input_width(input_width) |
| 39159 | .input_height(input_height) |
| 39160 | .kernel_height(5) |
| 39161 | .kernel_width(5) |
| 39162 | .subsampling(2) |
| 39163 | .padding_left(2) |
| 39164 | .padding_right(2) |
| 39165 | .padding_top(2) |
| 39166 | .padding_bottom(2) |
| 39167 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39168 | } |
| 39169 | } |
| 39170 | } |
| 39171 | |
| 39172 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC4, padding_top_eq_1) { |
| 39173 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 39174 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39175 | DWConv2DMicrokernelTester() |
| 39176 | .input_width(input_width) |
| 39177 | .input_height(input_height) |
| 39178 | .kernel_height(5) |
| 39179 | .kernel_width(5) |
| 39180 | .subsampling(2) |
| 39181 | .padding_left(2) |
| 39182 | .padding_right(2) |
| 39183 | .padding_top(1) |
| 39184 | .padding_bottom(2) |
| 39185 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc4, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39186 | } |
| 39187 | } |
| 39188 | } |
| 39189 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39190 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC5, output_width_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39191 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39192 | DWConv2DMicrokernelTester() |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 39193 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39194 | .input_height(2) |
| 39195 | .kernel_height(5) |
| 39196 | .kernel_width(5) |
| 39197 | .subsampling(2) |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 39198 | .padding_left(2) |
| 39199 | .padding_right(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 39200 | .padding_top(2) |
| 39201 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39202 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc5, DWConv2DMicrokernelTester::Variant::Scalar); |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 39203 | } |
| 39204 | } |
| 39205 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39206 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC5, output_width_gt_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39207 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39208 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39209 | .input_width(input_width) |
| 39210 | .input_height(2) |
| 39211 | .kernel_height(5) |
| 39212 | .kernel_width(5) |
| 39213 | .subsampling(2) |
| 39214 | .padding_left(2) |
| 39215 | .padding_right(2) |
| 39216 | .padding_top(2) |
| 39217 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39218 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc5, DWConv2DMicrokernelTester::Variant::Scalar); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39219 | } |
| 39220 | } |
| 39221 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39222 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC5, output_height_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39223 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 39224 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39225 | DWConv2DMicrokernelTester() |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 39226 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39227 | .input_height(input_height) |
| 39228 | .kernel_height(5) |
| 39229 | .kernel_width(5) |
| 39230 | .subsampling(2) |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 39231 | .padding_left(2) |
| 39232 | .padding_right(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 39233 | .padding_top(2) |
| 39234 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39235 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc5, DWConv2DMicrokernelTester::Variant::Scalar); |
| Erich Elsen | 38709a6 | 2019-11-08 11:58:45 -0800 | [diff] [blame] | 39236 | } |
| 39237 | } |
| 39238 | } |
| 39239 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39240 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC5, output_height_gt_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39241 | for (size_t input_height = 3; input_height < 11; input_height++) { |
| 39242 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39243 | DWConv2DMicrokernelTester() |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 39244 | .input_width(input_width) |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39245 | .input_height(input_height) |
| 39246 | .kernel_height(5) |
| 39247 | .kernel_width(5) |
| 39248 | .subsampling(2) |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 39249 | .padding_left(2) |
| 39250 | .padding_right(2) |
| 39251 | .padding_top(2) |
| 39252 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39253 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc5, DWConv2DMicrokernelTester::Variant::Scalar); |
| Erich Elsen | 4e5db3d | 2020-05-07 08:57:47 -0700 | [diff] [blame] | 39254 | } |
| 39255 | } |
| 39256 | } |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39257 | |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39258 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_1X1_ACC5, padding_top_eq_1) { |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39259 | for (size_t input_height = 2; input_height < 8; input_height++) { |
| 39260 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39261 | DWConv2DMicrokernelTester() |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39262 | .input_width(input_width) |
| 39263 | .input_height(input_height) |
| 39264 | .kernel_height(5) |
| 39265 | .kernel_width(5) |
| 39266 | .subsampling(2) |
| 39267 | .padding_left(2) |
| 39268 | .padding_right(2) |
| 39269 | .padding_top(1) |
| 39270 | .padding_bottom(2) |
| Marat Dukhan | bf715f9 | 2020-10-23 20:17:00 -0700 | [diff] [blame] | 39271 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc5, DWConv2DMicrokernelTester::Variant::Scalar); |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39272 | } |
| 39273 | } |
| Marat Dukhan | 29c0c33 | 2020-10-28 22:11:00 -0700 | [diff] [blame] | 39274 | } |
| 39275 | |
| 39276 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC2, output_width_eq_1) { |
| 39277 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 39278 | DWConv2DMicrokernelTester() |
| 39279 | .input_width(input_width) |
| 39280 | .input_height(4) |
| 39281 | .kernel_height(5) |
| 39282 | .kernel_width(5) |
| 39283 | .subsampling(2) |
| 39284 | .padding_left(2) |
| 39285 | .padding_right(2) |
| 39286 | .padding_top(2) |
| 39287 | .padding_bottom(2) |
| 39288 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39289 | } |
| 39290 | } |
| 39291 | |
| 39292 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC2, output_width_gt_1) { |
| 39293 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 39294 | DWConv2DMicrokernelTester() |
| 39295 | .input_width(input_width) |
| 39296 | .input_height(4) |
| 39297 | .kernel_height(5) |
| 39298 | .kernel_width(5) |
| 39299 | .subsampling(2) |
| 39300 | .padding_left(2) |
| 39301 | .padding_right(2) |
| 39302 | .padding_top(2) |
| 39303 | .padding_bottom(2) |
| 39304 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39305 | } |
| 39306 | } |
| 39307 | |
| 39308 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC2, output_height_eq_2) { |
| 39309 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 39310 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39311 | DWConv2DMicrokernelTester() |
| 39312 | .input_width(input_width) |
| 39313 | .input_height(input_height) |
| 39314 | .kernel_height(5) |
| 39315 | .kernel_width(5) |
| 39316 | .subsampling(2) |
| 39317 | .padding_left(2) |
| 39318 | .padding_right(2) |
| 39319 | .padding_top(2) |
| 39320 | .padding_bottom(2) |
| 39321 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39322 | } |
| 39323 | } |
| 39324 | } |
| 39325 | |
| 39326 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC2, output_height_div_2) { |
| 39327 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 39328 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39329 | DWConv2DMicrokernelTester() |
| 39330 | .input_width(input_width) |
| 39331 | .input_height(input_height) |
| 39332 | .kernel_height(5) |
| 39333 | .kernel_width(5) |
| 39334 | .subsampling(2) |
| 39335 | .padding_left(2) |
| 39336 | .padding_right(2) |
| 39337 | .padding_top(2) |
| 39338 | .padding_bottom(2) |
| 39339 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39340 | } |
| 39341 | } |
| 39342 | } |
| 39343 | |
| 39344 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC2, output_height_lt_2) { |
| 39345 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 39346 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39347 | DWConv2DMicrokernelTester() |
| 39348 | .input_width(input_width) |
| 39349 | .input_height(input_height) |
| 39350 | .kernel_height(5) |
| 39351 | .kernel_width(5) |
| 39352 | .subsampling(2) |
| 39353 | .padding_left(2) |
| 39354 | .padding_right(2) |
| 39355 | .padding_top(2) |
| 39356 | .padding_bottom(2) |
| 39357 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39358 | } |
| 39359 | } |
| 39360 | } |
| 39361 | |
| 39362 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC2, output_height_gt_2) { |
| 39363 | for (size_t input_height = 5; input_height < 21; input_height++) { |
| 39364 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39365 | DWConv2DMicrokernelTester() |
| 39366 | .input_width(input_width) |
| 39367 | .input_height(input_height) |
| 39368 | .kernel_height(5) |
| 39369 | .kernel_width(5) |
| 39370 | .subsampling(2) |
| 39371 | .padding_left(2) |
| 39372 | .padding_right(2) |
| 39373 | .padding_top(2) |
| 39374 | .padding_bottom(2) |
| 39375 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39376 | } |
| 39377 | } |
| 39378 | } |
| 39379 | |
| 39380 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC2, padding_top_eq_1) { |
| 39381 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 39382 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39383 | DWConv2DMicrokernelTester() |
| 39384 | .input_width(input_width) |
| 39385 | .input_height(input_height) |
| 39386 | .kernel_height(5) |
| 39387 | .kernel_width(5) |
| 39388 | .subsampling(2) |
| 39389 | .padding_left(2) |
| 39390 | .padding_right(2) |
| 39391 | .padding_top(1) |
| 39392 | .padding_bottom(2) |
| 39393 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39394 | } |
| 39395 | } |
| 39396 | } |
| 39397 | |
| 39398 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC3, output_width_eq_1) { |
| 39399 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 39400 | DWConv2DMicrokernelTester() |
| 39401 | .input_width(input_width) |
| 39402 | .input_height(4) |
| 39403 | .kernel_height(5) |
| 39404 | .kernel_width(5) |
| 39405 | .subsampling(2) |
| 39406 | .padding_left(2) |
| 39407 | .padding_right(2) |
| 39408 | .padding_top(2) |
| 39409 | .padding_bottom(2) |
| 39410 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39411 | } |
| 39412 | } |
| 39413 | |
| 39414 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC3, output_width_gt_1) { |
| 39415 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 39416 | DWConv2DMicrokernelTester() |
| 39417 | .input_width(input_width) |
| 39418 | .input_height(4) |
| 39419 | .kernel_height(5) |
| 39420 | .kernel_width(5) |
| 39421 | .subsampling(2) |
| 39422 | .padding_left(2) |
| 39423 | .padding_right(2) |
| 39424 | .padding_top(2) |
| 39425 | .padding_bottom(2) |
| 39426 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39427 | } |
| 39428 | } |
| 39429 | |
| 39430 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC3, output_height_eq_2) { |
| 39431 | for (size_t input_height = 3; input_height < 5; input_height++) { |
| 39432 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39433 | DWConv2DMicrokernelTester() |
| 39434 | .input_width(input_width) |
| 39435 | .input_height(input_height) |
| 39436 | .kernel_height(5) |
| 39437 | .kernel_width(5) |
| 39438 | .subsampling(2) |
| 39439 | .padding_left(2) |
| 39440 | .padding_right(2) |
| 39441 | .padding_top(2) |
| 39442 | .padding_bottom(2) |
| 39443 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39444 | } |
| 39445 | } |
| 39446 | } |
| 39447 | |
| 39448 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC3, output_height_div_2) { |
| 39449 | for (size_t input_height = 8; input_height < 32; input_height += 4) { |
| 39450 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39451 | DWConv2DMicrokernelTester() |
| 39452 | .input_width(input_width) |
| 39453 | .input_height(input_height) |
| 39454 | .kernel_height(5) |
| 39455 | .kernel_width(5) |
| 39456 | .subsampling(2) |
| 39457 | .padding_left(2) |
| 39458 | .padding_right(2) |
| 39459 | .padding_top(2) |
| 39460 | .padding_bottom(2) |
| 39461 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39462 | } |
| 39463 | } |
| 39464 | } |
| 39465 | |
| 39466 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC3, output_height_lt_2) { |
| 39467 | for (size_t input_height = 1; input_height < 3; input_height++) { |
| 39468 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39469 | DWConv2DMicrokernelTester() |
| 39470 | .input_width(input_width) |
| 39471 | .input_height(input_height) |
| 39472 | .kernel_height(5) |
| 39473 | .kernel_width(5) |
| 39474 | .subsampling(2) |
| 39475 | .padding_left(2) |
| 39476 | .padding_right(2) |
| 39477 | .padding_top(2) |
| 39478 | .padding_bottom(2) |
| 39479 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39480 | } |
| 39481 | } |
| 39482 | } |
| 39483 | |
| 39484 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC3, output_height_gt_2) { |
| 39485 | for (size_t input_height = 5; input_height < 21; input_height++) { |
| 39486 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39487 | DWConv2DMicrokernelTester() |
| 39488 | .input_width(input_width) |
| 39489 | .input_height(input_height) |
| 39490 | .kernel_height(5) |
| 39491 | .kernel_width(5) |
| 39492 | .subsampling(2) |
| 39493 | .padding_left(2) |
| 39494 | .padding_right(2) |
| 39495 | .padding_top(2) |
| 39496 | .padding_bottom(2) |
| 39497 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39498 | } |
| 39499 | } |
| 39500 | } |
| 39501 | |
| 39502 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_2X1_ACC3, padding_top_eq_1) { |
| 39503 | for (size_t input_height = 2; input_height < 14; input_height++) { |
| 39504 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39505 | DWConv2DMicrokernelTester() |
| 39506 | .input_width(input_width) |
| 39507 | .input_height(input_height) |
| 39508 | .kernel_height(5) |
| 39509 | .kernel_width(5) |
| 39510 | .subsampling(2) |
| 39511 | .padding_left(2) |
| 39512 | .padding_right(2) |
| 39513 | .padding_top(1) |
| 39514 | .padding_bottom(2) |
| 39515 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc3, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39516 | } |
| 39517 | } |
| 39518 | } |
| 39519 | |
| 39520 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1_ACC2, output_width_eq_1) { |
| 39521 | for (size_t input_width = 1; input_width < 3; input_width++) { |
| 39522 | DWConv2DMicrokernelTester() |
| 39523 | .input_width(input_width) |
| 39524 | .input_height(6) |
| 39525 | .kernel_height(5) |
| 39526 | .kernel_width(5) |
| 39527 | .subsampling(2) |
| 39528 | .padding_left(2) |
| 39529 | .padding_right(2) |
| 39530 | .padding_top(2) |
| 39531 | .padding_bottom(2) |
| 39532 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39533 | } |
| 39534 | } |
| 39535 | |
| 39536 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1_ACC2, output_width_gt_1) { |
| 39537 | for (size_t input_width = 3; input_width < 11; input_width++) { |
| 39538 | DWConv2DMicrokernelTester() |
| 39539 | .input_width(input_width) |
| 39540 | .input_height(6) |
| 39541 | .kernel_height(5) |
| 39542 | .kernel_width(5) |
| 39543 | .subsampling(2) |
| 39544 | .padding_left(2) |
| 39545 | .padding_right(2) |
| 39546 | .padding_top(2) |
| 39547 | .padding_bottom(2) |
| 39548 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39549 | } |
| 39550 | } |
| 39551 | |
| 39552 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1_ACC2, output_height_eq_3) { |
| 39553 | for (size_t input_height = 5; input_height < 7; input_height++) { |
| 39554 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39555 | DWConv2DMicrokernelTester() |
| 39556 | .input_width(input_width) |
| 39557 | .input_height(input_height) |
| 39558 | .kernel_height(5) |
| 39559 | .kernel_width(5) |
| 39560 | .subsampling(2) |
| 39561 | .padding_left(2) |
| 39562 | .padding_right(2) |
| 39563 | .padding_top(2) |
| 39564 | .padding_bottom(2) |
| 39565 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39566 | } |
| 39567 | } |
| 39568 | } |
| 39569 | |
| 39570 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1_ACC2, output_height_div_3) { |
| 39571 | for (size_t input_height = 12; input_height < 48; input_height += 6) { |
| 39572 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39573 | DWConv2DMicrokernelTester() |
| 39574 | .input_width(input_width) |
| 39575 | .input_height(input_height) |
| 39576 | .kernel_height(5) |
| 39577 | .kernel_width(5) |
| 39578 | .subsampling(2) |
| 39579 | .padding_left(2) |
| 39580 | .padding_right(2) |
| 39581 | .padding_top(2) |
| 39582 | .padding_bottom(2) |
| 39583 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39584 | } |
| 39585 | } |
| 39586 | } |
| 39587 | |
| 39588 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1_ACC2, output_height_lt_3) { |
| 39589 | for (size_t input_height = 1; input_height < 5; input_height++) { |
| 39590 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39591 | DWConv2DMicrokernelTester() |
| 39592 | .input_width(input_width) |
| 39593 | .input_height(input_height) |
| 39594 | .kernel_height(5) |
| 39595 | .kernel_width(5) |
| 39596 | .subsampling(2) |
| 39597 | .padding_left(2) |
| 39598 | .padding_right(2) |
| 39599 | .padding_top(2) |
| 39600 | .padding_bottom(2) |
| 39601 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39602 | } |
| 39603 | } |
| 39604 | } |
| 39605 | |
| 39606 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1_ACC2, output_height_gt_3) { |
| 39607 | for (size_t input_height = 7; input_height < 31; input_height++) { |
| 39608 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39609 | DWConv2DMicrokernelTester() |
| 39610 | .input_width(input_width) |
| 39611 | .input_height(input_height) |
| 39612 | .kernel_height(5) |
| 39613 | .kernel_width(5) |
| 39614 | .subsampling(2) |
| 39615 | .padding_left(2) |
| 39616 | .padding_right(2) |
| 39617 | .padding_top(2) |
| 39618 | .padding_bottom(2) |
| 39619 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39620 | } |
| 39621 | } |
| 39622 | } |
| 39623 | |
| 39624 | TEST(F32_DWCONV2D_CHW_5X5S2P2__SCALAR_3X1_ACC2, padding_top_eq_1) { |
| 39625 | for (size_t input_height = 2; input_height < 20; input_height++) { |
| 39626 | for (size_t input_width = 1; input_width < 11; input_width += 1) { |
| 39627 | DWConv2DMicrokernelTester() |
| 39628 | .input_width(input_width) |
| 39629 | .input_height(input_height) |
| 39630 | .kernel_height(5) |
| 39631 | .kernel_width(5) |
| 39632 | .subsampling(2) |
| 39633 | .padding_left(2) |
| 39634 | .padding_right(2) |
| 39635 | .padding_top(1) |
| 39636 | .padding_bottom(2) |
| 39637 | .Test(xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1_acc2, DWConv2DMicrokernelTester::Variant::Scalar); |
| 39638 | } |
| 39639 | } |
| Marat Dukhan | dc6c77f | 2020-10-23 19:09:10 -0700 | [diff] [blame] | 39640 | } |