Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1 | // Copyright 2019 Google LLC |
| 2 | // |
| 3 | // This source code is licensed under the BSD-style license found in the |
| 4 | // LICENSE file in the root directory of this source tree. |
| 5 | // |
| 6 | // Auto-generated file. Do not edit! |
| 7 | // Specification: test/f32-velu.yaml |
| 8 | // Generator: tools/generate-vunary-test.py |
| 9 | |
| 10 | |
| 11 | #include <gtest/gtest.h> |
| 12 | |
| 13 | #include <xnnpack/common.h> |
| 14 | #include <xnnpack/isa-checks.h> |
| 15 | |
| 16 | #include <xnnpack/vunary.h> |
| 17 | #include "vunary-microkernel-tester.h" |
| 18 | |
| 19 | |
| 20 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 21 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X4, batch_eq_4) { |
| 22 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 23 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 24 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 25 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x4, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 26 | } |
| 27 | |
| 28 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X4, batch_div_4) { |
| 29 | TEST_REQUIRES_ARM_NEON; |
| 30 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 31 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 32 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 33 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x4, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 34 | } |
| 35 | } |
| 36 | |
| 37 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X4, batch_lt_4) { |
| 38 | TEST_REQUIRES_ARM_NEON; |
| 39 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 40 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 41 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 42 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x4, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 43 | } |
| 44 | } |
| 45 | |
| 46 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X4, batch_gt_4) { |
| 47 | TEST_REQUIRES_ARM_NEON; |
| 48 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 49 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 50 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 51 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x4, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 52 | } |
| 53 | } |
| 54 | |
| 55 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X4, inplace) { |
| 56 | TEST_REQUIRES_ARM_NEON; |
| 57 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 58 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 59 | .batch_size(batch_size) |
| 60 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 61 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x4, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 62 | } |
| 63 | } |
| 64 | |
| 65 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X4, prescale) { |
| 66 | TEST_REQUIRES_ARM_NEON; |
| 67 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 68 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 69 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 70 | .batch_size(batch_size) |
| 71 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 72 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x4, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 73 | } |
| 74 | } |
| 75 | } |
| 76 | |
| 77 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X4, alpha) { |
| 78 | TEST_REQUIRES_ARM_NEON; |
| 79 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 80 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 81 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 82 | .batch_size(batch_size) |
| 83 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 84 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x4, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 85 | } |
| 86 | } |
| 87 | } |
| 88 | |
| 89 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X4, beta) { |
| 90 | TEST_REQUIRES_ARM_NEON; |
| 91 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 92 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 93 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 94 | .batch_size(batch_size) |
| 95 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 96 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x4, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 97 | } |
| 98 | } |
| 99 | } |
| 100 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 101 | |
| 102 | |
| 103 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 104 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X8, batch_eq_8) { |
| 105 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 106 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 107 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 108 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x8, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 109 | } |
| 110 | |
| 111 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X8, batch_div_8) { |
| 112 | TEST_REQUIRES_ARM_NEON; |
| 113 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 114 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 115 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 116 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x8, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 117 | } |
| 118 | } |
| 119 | |
| 120 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X8, batch_lt_8) { |
| 121 | TEST_REQUIRES_ARM_NEON; |
| 122 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 123 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 124 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 125 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x8, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 126 | } |
| 127 | } |
| 128 | |
| 129 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X8, batch_gt_8) { |
| 130 | TEST_REQUIRES_ARM_NEON; |
| 131 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 132 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 133 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 134 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x8, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 135 | } |
| 136 | } |
| 137 | |
| 138 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X8, inplace) { |
| 139 | TEST_REQUIRES_ARM_NEON; |
| 140 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 141 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 142 | .batch_size(batch_size) |
| 143 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 144 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x8, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 145 | } |
| 146 | } |
| 147 | |
| 148 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X8, prescale) { |
| 149 | TEST_REQUIRES_ARM_NEON; |
| 150 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 151 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 152 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 153 | .batch_size(batch_size) |
| 154 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 155 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x8, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 156 | } |
| 157 | } |
| 158 | } |
| 159 | |
| 160 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X8, alpha) { |
| 161 | TEST_REQUIRES_ARM_NEON; |
| 162 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 163 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 164 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 165 | .batch_size(batch_size) |
| 166 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 167 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x8, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 168 | } |
| 169 | } |
| 170 | } |
| 171 | |
| 172 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X8, beta) { |
| 173 | TEST_REQUIRES_ARM_NEON; |
| 174 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 175 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 176 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 177 | .batch_size(batch_size) |
| 178 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 179 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x8, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 180 | } |
| 181 | } |
| 182 | } |
| 183 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 184 | |
| 185 | |
| 186 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 187 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X12, batch_eq_12) { |
| 188 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 189 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 190 | .batch_size(12) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 191 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x12, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 192 | } |
| 193 | |
| 194 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X12, batch_div_12) { |
| 195 | TEST_REQUIRES_ARM_NEON; |
| 196 | for (size_t batch_size = 24; batch_size < 120; batch_size += 12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 197 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 198 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 199 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x12, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 200 | } |
| 201 | } |
| 202 | |
| 203 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X12, batch_lt_12) { |
| 204 | TEST_REQUIRES_ARM_NEON; |
| 205 | for (size_t batch_size = 1; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 206 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 207 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 208 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x12, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 209 | } |
| 210 | } |
| 211 | |
| 212 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X12, batch_gt_12) { |
| 213 | TEST_REQUIRES_ARM_NEON; |
| 214 | for (size_t batch_size = 13; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 215 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 216 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 217 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x12, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 218 | } |
| 219 | } |
| 220 | |
| 221 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X12, inplace) { |
| 222 | TEST_REQUIRES_ARM_NEON; |
| 223 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 224 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 225 | .batch_size(batch_size) |
| 226 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 227 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x12, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 228 | } |
| 229 | } |
| 230 | |
| 231 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X12, prescale) { |
| 232 | TEST_REQUIRES_ARM_NEON; |
| 233 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 234 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 235 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 236 | .batch_size(batch_size) |
| 237 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 238 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x12, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 239 | } |
| 240 | } |
| 241 | } |
| 242 | |
| 243 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X12, alpha) { |
| 244 | TEST_REQUIRES_ARM_NEON; |
| 245 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 246 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 247 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 248 | .batch_size(batch_size) |
| 249 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 250 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x12, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 251 | } |
| 252 | } |
| 253 | } |
| 254 | |
| 255 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X12, beta) { |
| 256 | TEST_REQUIRES_ARM_NEON; |
| 257 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 258 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 259 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 260 | .batch_size(batch_size) |
| 261 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 262 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x12, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 263 | } |
| 264 | } |
| 265 | } |
| 266 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 267 | |
| 268 | |
| 269 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 270 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X16, batch_eq_16) { |
| 271 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 272 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 273 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 274 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x16, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 275 | } |
| 276 | |
| 277 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X16, batch_div_16) { |
| 278 | TEST_REQUIRES_ARM_NEON; |
| 279 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 280 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 281 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 282 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x16, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 283 | } |
| 284 | } |
| 285 | |
| 286 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X16, batch_lt_16) { |
| 287 | TEST_REQUIRES_ARM_NEON; |
| 288 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 289 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 290 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 291 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x16, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 292 | } |
| 293 | } |
| 294 | |
| 295 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X16, batch_gt_16) { |
| 296 | TEST_REQUIRES_ARM_NEON; |
| 297 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 298 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 299 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 300 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x16, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 301 | } |
| 302 | } |
| 303 | |
| 304 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X16, inplace) { |
| 305 | TEST_REQUIRES_ARM_NEON; |
| 306 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 307 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 308 | .batch_size(batch_size) |
| 309 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 310 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x16, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 311 | } |
| 312 | } |
| 313 | |
| 314 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X16, prescale) { |
| 315 | TEST_REQUIRES_ARM_NEON; |
| 316 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 317 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 318 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 319 | .batch_size(batch_size) |
| 320 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 321 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x16, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 322 | } |
| 323 | } |
| 324 | } |
| 325 | |
| 326 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X16, alpha) { |
| 327 | TEST_REQUIRES_ARM_NEON; |
| 328 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 329 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 330 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 331 | .batch_size(batch_size) |
| 332 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 333 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x16, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 334 | } |
| 335 | } |
| 336 | } |
| 337 | |
| 338 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X16, beta) { |
| 339 | TEST_REQUIRES_ARM_NEON; |
| 340 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 341 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 342 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 343 | .batch_size(batch_size) |
| 344 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 345 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x16, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 346 | } |
| 347 | } |
| 348 | } |
| 349 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 350 | |
| 351 | |
| 352 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 353 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X20, batch_eq_20) { |
| 354 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 355 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 356 | .batch_size(20) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 357 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x20, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 358 | } |
| 359 | |
| 360 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X20, batch_div_20) { |
| 361 | TEST_REQUIRES_ARM_NEON; |
| 362 | for (size_t batch_size = 40; batch_size < 200; batch_size += 20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 363 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 364 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 365 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x20, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 366 | } |
| 367 | } |
| 368 | |
| 369 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X20, batch_lt_20) { |
| 370 | TEST_REQUIRES_ARM_NEON; |
| 371 | for (size_t batch_size = 1; batch_size < 20; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 372 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 373 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 374 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x20, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 375 | } |
| 376 | } |
| 377 | |
| 378 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X20, batch_gt_20) { |
| 379 | TEST_REQUIRES_ARM_NEON; |
| 380 | for (size_t batch_size = 21; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 381 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 382 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 383 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x20, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 384 | } |
| 385 | } |
| 386 | |
| 387 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X20, inplace) { |
| 388 | TEST_REQUIRES_ARM_NEON; |
| 389 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 390 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 391 | .batch_size(batch_size) |
| 392 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 393 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x20, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 394 | } |
| 395 | } |
| 396 | |
| 397 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X20, prescale) { |
| 398 | TEST_REQUIRES_ARM_NEON; |
| 399 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 400 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 401 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 402 | .batch_size(batch_size) |
| 403 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 404 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x20, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 405 | } |
| 406 | } |
| 407 | } |
| 408 | |
| 409 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X20, alpha) { |
| 410 | TEST_REQUIRES_ARM_NEON; |
| 411 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 412 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 413 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 414 | .batch_size(batch_size) |
| 415 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 416 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x20, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 417 | } |
| 418 | } |
| 419 | } |
| 420 | |
| 421 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X20, beta) { |
| 422 | TEST_REQUIRES_ARM_NEON; |
| 423 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 424 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 425 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 426 | .batch_size(batch_size) |
| 427 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 428 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x20, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 429 | } |
| 430 | } |
| 431 | } |
| 432 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 433 | |
| 434 | |
| 435 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 436 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X24, batch_eq_24) { |
| 437 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 438 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 439 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 440 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x24, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 441 | } |
| 442 | |
| 443 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X24, batch_div_24) { |
| 444 | TEST_REQUIRES_ARM_NEON; |
| 445 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 446 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 447 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 448 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x24, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 449 | } |
| 450 | } |
| 451 | |
| 452 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X24, batch_lt_24) { |
| 453 | TEST_REQUIRES_ARM_NEON; |
| 454 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 455 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 456 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 457 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x24, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 458 | } |
| 459 | } |
| 460 | |
| 461 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X24, batch_gt_24) { |
| 462 | TEST_REQUIRES_ARM_NEON; |
| 463 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 464 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 465 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 466 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x24, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 467 | } |
| 468 | } |
| 469 | |
| 470 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X24, inplace) { |
| 471 | TEST_REQUIRES_ARM_NEON; |
| 472 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 473 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 474 | .batch_size(batch_size) |
| 475 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 476 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x24, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 477 | } |
| 478 | } |
| 479 | |
| 480 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X24, prescale) { |
| 481 | TEST_REQUIRES_ARM_NEON; |
| 482 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 483 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 484 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 485 | .batch_size(batch_size) |
| 486 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 487 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x24, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 488 | } |
| 489 | } |
| 490 | } |
| 491 | |
| 492 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X24, alpha) { |
| 493 | TEST_REQUIRES_ARM_NEON; |
| 494 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 495 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 496 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 497 | .batch_size(batch_size) |
| 498 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 499 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x24, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 500 | } |
| 501 | } |
| 502 | } |
| 503 | |
| 504 | TEST(F32_VELU__NEON_RR2_LUT16_P3_X24, beta) { |
| 505 | TEST_REQUIRES_ARM_NEON; |
| 506 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 507 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 508 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 509 | .batch_size(batch_size) |
| 510 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 511 | .Test(xnn_f32_velu_ukernel__neon_rr2_lut16_p3_x24, xnn_init_f32_elu_neon_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 512 | } |
| 513 | } |
| 514 | } |
| 515 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 516 | |
| 517 | |
| 518 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 519 | TEST(F32_VELU__NEON_RR2_P6_X4, batch_eq_4) { |
| 520 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 521 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 522 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 523 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x4, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 524 | } |
| 525 | |
| 526 | TEST(F32_VELU__NEON_RR2_P6_X4, batch_div_4) { |
| 527 | TEST_REQUIRES_ARM_NEON; |
| 528 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 529 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 530 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 531 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x4, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 532 | } |
| 533 | } |
| 534 | |
| 535 | TEST(F32_VELU__NEON_RR2_P6_X4, batch_lt_4) { |
| 536 | TEST_REQUIRES_ARM_NEON; |
| 537 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 538 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 539 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 540 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x4, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 541 | } |
| 542 | } |
| 543 | |
| 544 | TEST(F32_VELU__NEON_RR2_P6_X4, batch_gt_4) { |
| 545 | TEST_REQUIRES_ARM_NEON; |
| 546 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 547 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 548 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 549 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x4, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 550 | } |
| 551 | } |
| 552 | |
| 553 | TEST(F32_VELU__NEON_RR2_P6_X4, inplace) { |
| 554 | TEST_REQUIRES_ARM_NEON; |
| 555 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 556 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 557 | .batch_size(batch_size) |
| 558 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 559 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x4, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 560 | } |
| 561 | } |
| 562 | |
| 563 | TEST(F32_VELU__NEON_RR2_P6_X4, prescale) { |
| 564 | TEST_REQUIRES_ARM_NEON; |
| 565 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 566 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 567 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 568 | .batch_size(batch_size) |
| 569 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 570 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x4, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 571 | } |
| 572 | } |
| 573 | } |
| 574 | |
| 575 | TEST(F32_VELU__NEON_RR2_P6_X4, alpha) { |
| 576 | TEST_REQUIRES_ARM_NEON; |
| 577 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 578 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 579 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 580 | .batch_size(batch_size) |
| 581 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 582 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x4, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 583 | } |
| 584 | } |
| 585 | } |
| 586 | |
| 587 | TEST(F32_VELU__NEON_RR2_P6_X4, beta) { |
| 588 | TEST_REQUIRES_ARM_NEON; |
| 589 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 590 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 591 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 592 | .batch_size(batch_size) |
| 593 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 594 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x4, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 595 | } |
| 596 | } |
| 597 | } |
| 598 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 599 | |
| 600 | |
| 601 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 602 | TEST(F32_VELU__NEON_RR2_P6_X8, batch_eq_8) { |
| 603 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 604 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 605 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 606 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x8, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 607 | } |
| 608 | |
| 609 | TEST(F32_VELU__NEON_RR2_P6_X8, batch_div_8) { |
| 610 | TEST_REQUIRES_ARM_NEON; |
| 611 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 612 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 613 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 614 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x8, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 615 | } |
| 616 | } |
| 617 | |
| 618 | TEST(F32_VELU__NEON_RR2_P6_X8, batch_lt_8) { |
| 619 | TEST_REQUIRES_ARM_NEON; |
| 620 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 621 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 622 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 623 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x8, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 624 | } |
| 625 | } |
| 626 | |
| 627 | TEST(F32_VELU__NEON_RR2_P6_X8, batch_gt_8) { |
| 628 | TEST_REQUIRES_ARM_NEON; |
| 629 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 630 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 631 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 632 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x8, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 633 | } |
| 634 | } |
| 635 | |
| 636 | TEST(F32_VELU__NEON_RR2_P6_X8, inplace) { |
| 637 | TEST_REQUIRES_ARM_NEON; |
| 638 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 639 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 640 | .batch_size(batch_size) |
| 641 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 642 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x8, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 643 | } |
| 644 | } |
| 645 | |
| 646 | TEST(F32_VELU__NEON_RR2_P6_X8, prescale) { |
| 647 | TEST_REQUIRES_ARM_NEON; |
| 648 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 649 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 650 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 651 | .batch_size(batch_size) |
| 652 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 653 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x8, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 654 | } |
| 655 | } |
| 656 | } |
| 657 | |
| 658 | TEST(F32_VELU__NEON_RR2_P6_X8, alpha) { |
| 659 | TEST_REQUIRES_ARM_NEON; |
| 660 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 661 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 662 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 663 | .batch_size(batch_size) |
| 664 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 665 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x8, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 666 | } |
| 667 | } |
| 668 | } |
| 669 | |
| 670 | TEST(F32_VELU__NEON_RR2_P6_X8, beta) { |
| 671 | TEST_REQUIRES_ARM_NEON; |
| 672 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 673 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 674 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 675 | .batch_size(batch_size) |
| 676 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 677 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x8, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 678 | } |
| 679 | } |
| 680 | } |
| 681 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 682 | |
| 683 | |
| 684 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 685 | TEST(F32_VELU__NEON_RR2_P6_X12, batch_eq_12) { |
| 686 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 687 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 688 | .batch_size(12) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 689 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x12, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 690 | } |
| 691 | |
| 692 | TEST(F32_VELU__NEON_RR2_P6_X12, batch_div_12) { |
| 693 | TEST_REQUIRES_ARM_NEON; |
| 694 | for (size_t batch_size = 24; batch_size < 120; batch_size += 12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 695 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 696 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 697 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x12, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 698 | } |
| 699 | } |
| 700 | |
| 701 | TEST(F32_VELU__NEON_RR2_P6_X12, batch_lt_12) { |
| 702 | TEST_REQUIRES_ARM_NEON; |
| 703 | for (size_t batch_size = 1; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 704 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 705 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 706 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x12, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 707 | } |
| 708 | } |
| 709 | |
| 710 | TEST(F32_VELU__NEON_RR2_P6_X12, batch_gt_12) { |
| 711 | TEST_REQUIRES_ARM_NEON; |
| 712 | for (size_t batch_size = 13; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 713 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 714 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 715 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x12, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 716 | } |
| 717 | } |
| 718 | |
| 719 | TEST(F32_VELU__NEON_RR2_P6_X12, inplace) { |
| 720 | TEST_REQUIRES_ARM_NEON; |
| 721 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 722 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 723 | .batch_size(batch_size) |
| 724 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 725 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x12, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 726 | } |
| 727 | } |
| 728 | |
| 729 | TEST(F32_VELU__NEON_RR2_P6_X12, prescale) { |
| 730 | TEST_REQUIRES_ARM_NEON; |
| 731 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 732 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 733 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 734 | .batch_size(batch_size) |
| 735 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 736 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x12, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 737 | } |
| 738 | } |
| 739 | } |
| 740 | |
| 741 | TEST(F32_VELU__NEON_RR2_P6_X12, alpha) { |
| 742 | TEST_REQUIRES_ARM_NEON; |
| 743 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 744 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 745 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 746 | .batch_size(batch_size) |
| 747 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 748 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x12, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 749 | } |
| 750 | } |
| 751 | } |
| 752 | |
| 753 | TEST(F32_VELU__NEON_RR2_P6_X12, beta) { |
| 754 | TEST_REQUIRES_ARM_NEON; |
| 755 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 756 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 757 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 758 | .batch_size(batch_size) |
| 759 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 760 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x12, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 761 | } |
| 762 | } |
| 763 | } |
| 764 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 765 | |
| 766 | |
| 767 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 768 | TEST(F32_VELU__NEON_RR2_P6_X16, batch_eq_16) { |
| 769 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 770 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 771 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 772 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x16, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 773 | } |
| 774 | |
| 775 | TEST(F32_VELU__NEON_RR2_P6_X16, batch_div_16) { |
| 776 | TEST_REQUIRES_ARM_NEON; |
| 777 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 778 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 779 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 780 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x16, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 781 | } |
| 782 | } |
| 783 | |
| 784 | TEST(F32_VELU__NEON_RR2_P6_X16, batch_lt_16) { |
| 785 | TEST_REQUIRES_ARM_NEON; |
| 786 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 787 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 788 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 789 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x16, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 790 | } |
| 791 | } |
| 792 | |
| 793 | TEST(F32_VELU__NEON_RR2_P6_X16, batch_gt_16) { |
| 794 | TEST_REQUIRES_ARM_NEON; |
| 795 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 796 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 797 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 798 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x16, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 799 | } |
| 800 | } |
| 801 | |
| 802 | TEST(F32_VELU__NEON_RR2_P6_X16, inplace) { |
| 803 | TEST_REQUIRES_ARM_NEON; |
| 804 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 805 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 806 | .batch_size(batch_size) |
| 807 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 808 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x16, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 809 | } |
| 810 | } |
| 811 | |
| 812 | TEST(F32_VELU__NEON_RR2_P6_X16, prescale) { |
| 813 | TEST_REQUIRES_ARM_NEON; |
| 814 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 815 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 816 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 817 | .batch_size(batch_size) |
| 818 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 819 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x16, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 820 | } |
| 821 | } |
| 822 | } |
| 823 | |
| 824 | TEST(F32_VELU__NEON_RR2_P6_X16, alpha) { |
| 825 | TEST_REQUIRES_ARM_NEON; |
| 826 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 827 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 828 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 829 | .batch_size(batch_size) |
| 830 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 831 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x16, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 832 | } |
| 833 | } |
| 834 | } |
| 835 | |
| 836 | TEST(F32_VELU__NEON_RR2_P6_X16, beta) { |
| 837 | TEST_REQUIRES_ARM_NEON; |
| 838 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 839 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 840 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 841 | .batch_size(batch_size) |
| 842 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 843 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x16, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 844 | } |
| 845 | } |
| 846 | } |
| 847 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 848 | |
| 849 | |
| 850 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 851 | TEST(F32_VELU__NEON_RR2_P6_X20, batch_eq_20) { |
| 852 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 853 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 854 | .batch_size(20) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 855 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x20, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 856 | } |
| 857 | |
| 858 | TEST(F32_VELU__NEON_RR2_P6_X20, batch_div_20) { |
| 859 | TEST_REQUIRES_ARM_NEON; |
| 860 | for (size_t batch_size = 40; batch_size < 200; batch_size += 20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 861 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 862 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 863 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x20, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 864 | } |
| 865 | } |
| 866 | |
| 867 | TEST(F32_VELU__NEON_RR2_P6_X20, batch_lt_20) { |
| 868 | TEST_REQUIRES_ARM_NEON; |
| 869 | for (size_t batch_size = 1; batch_size < 20; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 870 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 871 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 872 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x20, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 873 | } |
| 874 | } |
| 875 | |
| 876 | TEST(F32_VELU__NEON_RR2_P6_X20, batch_gt_20) { |
| 877 | TEST_REQUIRES_ARM_NEON; |
| 878 | for (size_t batch_size = 21; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 879 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 880 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 881 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x20, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 882 | } |
| 883 | } |
| 884 | |
| 885 | TEST(F32_VELU__NEON_RR2_P6_X20, inplace) { |
| 886 | TEST_REQUIRES_ARM_NEON; |
| 887 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 888 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 889 | .batch_size(batch_size) |
| 890 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 891 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x20, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 892 | } |
| 893 | } |
| 894 | |
| 895 | TEST(F32_VELU__NEON_RR2_P6_X20, prescale) { |
| 896 | TEST_REQUIRES_ARM_NEON; |
| 897 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 898 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 899 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 900 | .batch_size(batch_size) |
| 901 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 902 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x20, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 903 | } |
| 904 | } |
| 905 | } |
| 906 | |
| 907 | TEST(F32_VELU__NEON_RR2_P6_X20, alpha) { |
| 908 | TEST_REQUIRES_ARM_NEON; |
| 909 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 910 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 911 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 912 | .batch_size(batch_size) |
| 913 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 914 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x20, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 915 | } |
| 916 | } |
| 917 | } |
| 918 | |
| 919 | TEST(F32_VELU__NEON_RR2_P6_X20, beta) { |
| 920 | TEST_REQUIRES_ARM_NEON; |
| 921 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 922 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 923 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 924 | .batch_size(batch_size) |
| 925 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 926 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x20, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 927 | } |
| 928 | } |
| 929 | } |
| 930 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 931 | |
| 932 | |
| 933 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 934 | TEST(F32_VELU__NEON_RR2_P6_X24, batch_eq_24) { |
| 935 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 936 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 937 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 938 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x24, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 939 | } |
| 940 | |
| 941 | TEST(F32_VELU__NEON_RR2_P6_X24, batch_div_24) { |
| 942 | TEST_REQUIRES_ARM_NEON; |
| 943 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 944 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 945 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 946 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x24, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 947 | } |
| 948 | } |
| 949 | |
| 950 | TEST(F32_VELU__NEON_RR2_P6_X24, batch_lt_24) { |
| 951 | TEST_REQUIRES_ARM_NEON; |
| 952 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 953 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 954 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 955 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x24, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 956 | } |
| 957 | } |
| 958 | |
| 959 | TEST(F32_VELU__NEON_RR2_P6_X24, batch_gt_24) { |
| 960 | TEST_REQUIRES_ARM_NEON; |
| 961 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 962 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 963 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 964 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x24, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 965 | } |
| 966 | } |
| 967 | |
| 968 | TEST(F32_VELU__NEON_RR2_P6_X24, inplace) { |
| 969 | TEST_REQUIRES_ARM_NEON; |
| 970 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 971 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 972 | .batch_size(batch_size) |
| 973 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 974 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x24, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 975 | } |
| 976 | } |
| 977 | |
| 978 | TEST(F32_VELU__NEON_RR2_P6_X24, prescale) { |
| 979 | TEST_REQUIRES_ARM_NEON; |
| 980 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 981 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 982 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 983 | .batch_size(batch_size) |
| 984 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 985 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x24, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 986 | } |
| 987 | } |
| 988 | } |
| 989 | |
| 990 | TEST(F32_VELU__NEON_RR2_P6_X24, alpha) { |
| 991 | TEST_REQUIRES_ARM_NEON; |
| 992 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 993 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 994 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 995 | .batch_size(batch_size) |
| 996 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 997 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x24, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 998 | } |
| 999 | } |
| 1000 | } |
| 1001 | |
| 1002 | TEST(F32_VELU__NEON_RR2_P6_X24, beta) { |
| 1003 | TEST_REQUIRES_ARM_NEON; |
| 1004 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 1005 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1006 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1007 | .batch_size(batch_size) |
| 1008 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1009 | .Test(xnn_f32_velu_ukernel__neon_rr2_p6_x24, xnn_init_f32_elu_neon_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1010 | } |
| 1011 | } |
| 1012 | } |
| 1013 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1014 | |
| 1015 | |
| 1016 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1017 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X4, batch_eq_4) { |
| 1018 | TEST_REQUIRES_ARM_NEON_FMA; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1019 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1020 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1021 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x4, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1022 | } |
| 1023 | |
| 1024 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X4, batch_div_4) { |
| 1025 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1026 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1027 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1028 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1029 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x4, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1030 | } |
| 1031 | } |
| 1032 | |
| 1033 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X4, batch_lt_4) { |
| 1034 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1035 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1036 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1037 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1038 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x4, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1039 | } |
| 1040 | } |
| 1041 | |
| 1042 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X4, batch_gt_4) { |
| 1043 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1044 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1045 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1046 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1047 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x4, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1048 | } |
| 1049 | } |
| 1050 | |
| 1051 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X4, inplace) { |
| 1052 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1053 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1054 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1055 | .batch_size(batch_size) |
| 1056 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1057 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x4, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1058 | } |
| 1059 | } |
| 1060 | |
| 1061 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X4, prescale) { |
| 1062 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1063 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 1064 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1065 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1066 | .batch_size(batch_size) |
| 1067 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1068 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x4, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1069 | } |
| 1070 | } |
| 1071 | } |
| 1072 | |
| 1073 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X4, alpha) { |
| 1074 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1075 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 1076 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1077 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1078 | .batch_size(batch_size) |
| 1079 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1080 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x4, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1081 | } |
| 1082 | } |
| 1083 | } |
| 1084 | |
| 1085 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X4, beta) { |
| 1086 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1087 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 1088 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1089 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1090 | .batch_size(batch_size) |
| 1091 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1092 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x4, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1093 | } |
| 1094 | } |
| 1095 | } |
| 1096 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1097 | |
| 1098 | |
| 1099 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1100 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X8, batch_eq_8) { |
| 1101 | TEST_REQUIRES_ARM_NEON_FMA; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1102 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1103 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1104 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x8, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1105 | } |
| 1106 | |
| 1107 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X8, batch_div_8) { |
| 1108 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1109 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1110 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1111 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1112 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x8, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1113 | } |
| 1114 | } |
| 1115 | |
| 1116 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X8, batch_lt_8) { |
| 1117 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1118 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1119 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1120 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1121 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x8, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1122 | } |
| 1123 | } |
| 1124 | |
| 1125 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X8, batch_gt_8) { |
| 1126 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1127 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1128 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1129 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1130 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x8, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1131 | } |
| 1132 | } |
| 1133 | |
| 1134 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X8, inplace) { |
| 1135 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1136 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1137 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1138 | .batch_size(batch_size) |
| 1139 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1140 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x8, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1141 | } |
| 1142 | } |
| 1143 | |
| 1144 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X8, prescale) { |
| 1145 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1146 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 1147 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1148 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1149 | .batch_size(batch_size) |
| 1150 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1151 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x8, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1152 | } |
| 1153 | } |
| 1154 | } |
| 1155 | |
| 1156 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X8, alpha) { |
| 1157 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1158 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 1159 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1160 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1161 | .batch_size(batch_size) |
| 1162 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1163 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x8, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1164 | } |
| 1165 | } |
| 1166 | } |
| 1167 | |
| 1168 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X8, beta) { |
| 1169 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1170 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 1171 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1172 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1173 | .batch_size(batch_size) |
| 1174 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1175 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x8, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1176 | } |
| 1177 | } |
| 1178 | } |
| 1179 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1180 | |
| 1181 | |
| 1182 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1183 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X12, batch_eq_12) { |
| 1184 | TEST_REQUIRES_ARM_NEON_FMA; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1185 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1186 | .batch_size(12) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1187 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x12, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1188 | } |
| 1189 | |
| 1190 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X12, batch_div_12) { |
| 1191 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1192 | for (size_t batch_size = 24; batch_size < 120; batch_size += 12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1193 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1194 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1195 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x12, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1196 | } |
| 1197 | } |
| 1198 | |
| 1199 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X12, batch_lt_12) { |
| 1200 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1201 | for (size_t batch_size = 1; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1202 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1203 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1204 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x12, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1205 | } |
| 1206 | } |
| 1207 | |
| 1208 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X12, batch_gt_12) { |
| 1209 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1210 | for (size_t batch_size = 13; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1211 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1212 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1213 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x12, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1214 | } |
| 1215 | } |
| 1216 | |
| 1217 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X12, inplace) { |
| 1218 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1219 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1220 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1221 | .batch_size(batch_size) |
| 1222 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1223 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x12, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1224 | } |
| 1225 | } |
| 1226 | |
| 1227 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X12, prescale) { |
| 1228 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1229 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 1230 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1231 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1232 | .batch_size(batch_size) |
| 1233 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1234 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x12, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1235 | } |
| 1236 | } |
| 1237 | } |
| 1238 | |
| 1239 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X12, alpha) { |
| 1240 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1241 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 1242 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1243 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1244 | .batch_size(batch_size) |
| 1245 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1246 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x12, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1247 | } |
| 1248 | } |
| 1249 | } |
| 1250 | |
| 1251 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X12, beta) { |
| 1252 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1253 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 1254 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1255 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1256 | .batch_size(batch_size) |
| 1257 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1258 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x12, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1259 | } |
| 1260 | } |
| 1261 | } |
| 1262 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1263 | |
| 1264 | |
| 1265 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1266 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X16, batch_eq_16) { |
| 1267 | TEST_REQUIRES_ARM_NEON_FMA; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1268 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1269 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1270 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x16, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1271 | } |
| 1272 | |
| 1273 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X16, batch_div_16) { |
| 1274 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1275 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1276 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1277 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1278 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x16, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1279 | } |
| 1280 | } |
| 1281 | |
| 1282 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X16, batch_lt_16) { |
| 1283 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1284 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1285 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1286 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1287 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x16, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1288 | } |
| 1289 | } |
| 1290 | |
| 1291 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X16, batch_gt_16) { |
| 1292 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1293 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1294 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1295 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1296 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x16, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1297 | } |
| 1298 | } |
| 1299 | |
| 1300 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X16, inplace) { |
| 1301 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1302 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1303 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1304 | .batch_size(batch_size) |
| 1305 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1306 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x16, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1307 | } |
| 1308 | } |
| 1309 | |
| 1310 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X16, prescale) { |
| 1311 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1312 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 1313 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1314 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1315 | .batch_size(batch_size) |
| 1316 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1317 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x16, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1318 | } |
| 1319 | } |
| 1320 | } |
| 1321 | |
| 1322 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X16, alpha) { |
| 1323 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1324 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 1325 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1326 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1327 | .batch_size(batch_size) |
| 1328 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1329 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x16, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1330 | } |
| 1331 | } |
| 1332 | } |
| 1333 | |
| 1334 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X16, beta) { |
| 1335 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1336 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 1337 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1338 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1339 | .batch_size(batch_size) |
| 1340 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1341 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x16, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1342 | } |
| 1343 | } |
| 1344 | } |
| 1345 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1346 | |
| 1347 | |
| 1348 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1349 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X20, batch_eq_20) { |
| 1350 | TEST_REQUIRES_ARM_NEON_FMA; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1351 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1352 | .batch_size(20) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1353 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x20, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1354 | } |
| 1355 | |
| 1356 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X20, batch_div_20) { |
| 1357 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1358 | for (size_t batch_size = 40; batch_size < 200; batch_size += 20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1359 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1360 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1361 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x20, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1362 | } |
| 1363 | } |
| 1364 | |
| 1365 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X20, batch_lt_20) { |
| 1366 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1367 | for (size_t batch_size = 1; batch_size < 20; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1368 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1369 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1370 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x20, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1371 | } |
| 1372 | } |
| 1373 | |
| 1374 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X20, batch_gt_20) { |
| 1375 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1376 | for (size_t batch_size = 21; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1377 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1378 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1379 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x20, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1380 | } |
| 1381 | } |
| 1382 | |
| 1383 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X20, inplace) { |
| 1384 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1385 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1386 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1387 | .batch_size(batch_size) |
| 1388 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1389 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x20, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1390 | } |
| 1391 | } |
| 1392 | |
| 1393 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X20, prescale) { |
| 1394 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1395 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 1396 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1397 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1398 | .batch_size(batch_size) |
| 1399 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1400 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x20, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1401 | } |
| 1402 | } |
| 1403 | } |
| 1404 | |
| 1405 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X20, alpha) { |
| 1406 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1407 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 1408 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1409 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1410 | .batch_size(batch_size) |
| 1411 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1412 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x20, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1413 | } |
| 1414 | } |
| 1415 | } |
| 1416 | |
| 1417 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X20, beta) { |
| 1418 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1419 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 1420 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1421 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1422 | .batch_size(batch_size) |
| 1423 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1424 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x20, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1425 | } |
| 1426 | } |
| 1427 | } |
| 1428 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1429 | |
| 1430 | |
| 1431 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1432 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X24, batch_eq_24) { |
| 1433 | TEST_REQUIRES_ARM_NEON_FMA; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1434 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1435 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1436 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x24, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1437 | } |
| 1438 | |
| 1439 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X24, batch_div_24) { |
| 1440 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1441 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1442 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1443 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1444 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x24, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1445 | } |
| 1446 | } |
| 1447 | |
| 1448 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X24, batch_lt_24) { |
| 1449 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1450 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1451 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1452 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1453 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x24, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1454 | } |
| 1455 | } |
| 1456 | |
| 1457 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X24, batch_gt_24) { |
| 1458 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1459 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1460 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1461 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1462 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x24, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1463 | } |
| 1464 | } |
| 1465 | |
| 1466 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X24, inplace) { |
| 1467 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1468 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1469 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1470 | .batch_size(batch_size) |
| 1471 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1472 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x24, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1473 | } |
| 1474 | } |
| 1475 | |
| 1476 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X24, prescale) { |
| 1477 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1478 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 1479 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1480 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1481 | .batch_size(batch_size) |
| 1482 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1483 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x24, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1484 | } |
| 1485 | } |
| 1486 | } |
| 1487 | |
| 1488 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X24, alpha) { |
| 1489 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1490 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 1491 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1492 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1493 | .batch_size(batch_size) |
| 1494 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1495 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x24, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1496 | } |
| 1497 | } |
| 1498 | } |
| 1499 | |
| 1500 | TEST(F32_VELU__NEONFMA_RR1_LUT16_P3_X24, beta) { |
| 1501 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1502 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 1503 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1504 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1505 | .batch_size(batch_size) |
| 1506 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1507 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x24, xnn_init_f32_elu_neonfma_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1508 | } |
| 1509 | } |
| 1510 | } |
| 1511 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1512 | |
| 1513 | |
| 1514 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1515 | TEST(F32_VELU__NEONFMA_RR1_P6_X4, batch_eq_4) { |
| 1516 | TEST_REQUIRES_ARM_NEON_FMA; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1517 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1518 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1519 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x4, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1520 | } |
| 1521 | |
| 1522 | TEST(F32_VELU__NEONFMA_RR1_P6_X4, batch_div_4) { |
| 1523 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1524 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1525 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1526 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1527 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x4, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1528 | } |
| 1529 | } |
| 1530 | |
| 1531 | TEST(F32_VELU__NEONFMA_RR1_P6_X4, batch_lt_4) { |
| 1532 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1533 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1534 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1535 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1536 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x4, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1537 | } |
| 1538 | } |
| 1539 | |
| 1540 | TEST(F32_VELU__NEONFMA_RR1_P6_X4, batch_gt_4) { |
| 1541 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1542 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1543 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1544 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1545 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x4, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1546 | } |
| 1547 | } |
| 1548 | |
| 1549 | TEST(F32_VELU__NEONFMA_RR1_P6_X4, inplace) { |
| 1550 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1551 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1552 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1553 | .batch_size(batch_size) |
| 1554 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1555 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x4, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1556 | } |
| 1557 | } |
| 1558 | |
| 1559 | TEST(F32_VELU__NEONFMA_RR1_P6_X4, prescale) { |
| 1560 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1561 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 1562 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1563 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1564 | .batch_size(batch_size) |
| 1565 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1566 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x4, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1567 | } |
| 1568 | } |
| 1569 | } |
| 1570 | |
| 1571 | TEST(F32_VELU__NEONFMA_RR1_P6_X4, alpha) { |
| 1572 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1573 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 1574 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1575 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1576 | .batch_size(batch_size) |
| 1577 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1578 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x4, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1579 | } |
| 1580 | } |
| 1581 | } |
| 1582 | |
| 1583 | TEST(F32_VELU__NEONFMA_RR1_P6_X4, beta) { |
| 1584 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1585 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 1586 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1587 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1588 | .batch_size(batch_size) |
| 1589 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1590 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x4, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1591 | } |
| 1592 | } |
| 1593 | } |
| 1594 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1595 | |
| 1596 | |
| 1597 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1598 | TEST(F32_VELU__NEONFMA_RR1_P6_X8, batch_eq_8) { |
| 1599 | TEST_REQUIRES_ARM_NEON_FMA; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1600 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1601 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1602 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x8, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1603 | } |
| 1604 | |
| 1605 | TEST(F32_VELU__NEONFMA_RR1_P6_X8, batch_div_8) { |
| 1606 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1607 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1608 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1609 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1610 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x8, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1611 | } |
| 1612 | } |
| 1613 | |
| 1614 | TEST(F32_VELU__NEONFMA_RR1_P6_X8, batch_lt_8) { |
| 1615 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1616 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1617 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1618 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1619 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x8, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1620 | } |
| 1621 | } |
| 1622 | |
| 1623 | TEST(F32_VELU__NEONFMA_RR1_P6_X8, batch_gt_8) { |
| 1624 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1625 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1626 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1627 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1628 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x8, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1629 | } |
| 1630 | } |
| 1631 | |
| 1632 | TEST(F32_VELU__NEONFMA_RR1_P6_X8, inplace) { |
| 1633 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1634 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1635 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1636 | .batch_size(batch_size) |
| 1637 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1638 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x8, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1639 | } |
| 1640 | } |
| 1641 | |
| 1642 | TEST(F32_VELU__NEONFMA_RR1_P6_X8, prescale) { |
| 1643 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1644 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 1645 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1646 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1647 | .batch_size(batch_size) |
| 1648 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1649 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x8, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1650 | } |
| 1651 | } |
| 1652 | } |
| 1653 | |
| 1654 | TEST(F32_VELU__NEONFMA_RR1_P6_X8, alpha) { |
| 1655 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1656 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 1657 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1658 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1659 | .batch_size(batch_size) |
| 1660 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1661 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x8, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1662 | } |
| 1663 | } |
| 1664 | } |
| 1665 | |
| 1666 | TEST(F32_VELU__NEONFMA_RR1_P6_X8, beta) { |
| 1667 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1668 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 1669 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1670 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1671 | .batch_size(batch_size) |
| 1672 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1673 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x8, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1674 | } |
| 1675 | } |
| 1676 | } |
| 1677 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1678 | |
| 1679 | |
| 1680 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1681 | TEST(F32_VELU__NEONFMA_RR1_P6_X12, batch_eq_12) { |
| 1682 | TEST_REQUIRES_ARM_NEON_FMA; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1683 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1684 | .batch_size(12) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1685 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x12, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1686 | } |
| 1687 | |
| 1688 | TEST(F32_VELU__NEONFMA_RR1_P6_X12, batch_div_12) { |
| 1689 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1690 | for (size_t batch_size = 24; batch_size < 120; batch_size += 12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1691 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1692 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1693 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x12, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1694 | } |
| 1695 | } |
| 1696 | |
| 1697 | TEST(F32_VELU__NEONFMA_RR1_P6_X12, batch_lt_12) { |
| 1698 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1699 | for (size_t batch_size = 1; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1700 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1701 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1702 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x12, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1703 | } |
| 1704 | } |
| 1705 | |
| 1706 | TEST(F32_VELU__NEONFMA_RR1_P6_X12, batch_gt_12) { |
| 1707 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1708 | for (size_t batch_size = 13; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1709 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1710 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1711 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x12, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1712 | } |
| 1713 | } |
| 1714 | |
| 1715 | TEST(F32_VELU__NEONFMA_RR1_P6_X12, inplace) { |
| 1716 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1717 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1718 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1719 | .batch_size(batch_size) |
| 1720 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1721 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x12, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1722 | } |
| 1723 | } |
| 1724 | |
| 1725 | TEST(F32_VELU__NEONFMA_RR1_P6_X12, prescale) { |
| 1726 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1727 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 1728 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1729 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1730 | .batch_size(batch_size) |
| 1731 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1732 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x12, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1733 | } |
| 1734 | } |
| 1735 | } |
| 1736 | |
| 1737 | TEST(F32_VELU__NEONFMA_RR1_P6_X12, alpha) { |
| 1738 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1739 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 1740 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1741 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1742 | .batch_size(batch_size) |
| 1743 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1744 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x12, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1745 | } |
| 1746 | } |
| 1747 | } |
| 1748 | |
| 1749 | TEST(F32_VELU__NEONFMA_RR1_P6_X12, beta) { |
| 1750 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1751 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 1752 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1753 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1754 | .batch_size(batch_size) |
| 1755 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1756 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x12, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1757 | } |
| 1758 | } |
| 1759 | } |
| 1760 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1761 | |
| 1762 | |
| 1763 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1764 | TEST(F32_VELU__NEONFMA_RR1_P6_X16, batch_eq_16) { |
| 1765 | TEST_REQUIRES_ARM_NEON_FMA; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1766 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1767 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1768 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x16, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1769 | } |
| 1770 | |
| 1771 | TEST(F32_VELU__NEONFMA_RR1_P6_X16, batch_div_16) { |
| 1772 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1773 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1774 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1775 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1776 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x16, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1777 | } |
| 1778 | } |
| 1779 | |
| 1780 | TEST(F32_VELU__NEONFMA_RR1_P6_X16, batch_lt_16) { |
| 1781 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1782 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1783 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1784 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1785 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x16, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1786 | } |
| 1787 | } |
| 1788 | |
| 1789 | TEST(F32_VELU__NEONFMA_RR1_P6_X16, batch_gt_16) { |
| 1790 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1791 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1792 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1793 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1794 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x16, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1795 | } |
| 1796 | } |
| 1797 | |
| 1798 | TEST(F32_VELU__NEONFMA_RR1_P6_X16, inplace) { |
| 1799 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1800 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1801 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1802 | .batch_size(batch_size) |
| 1803 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1804 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x16, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1805 | } |
| 1806 | } |
| 1807 | |
| 1808 | TEST(F32_VELU__NEONFMA_RR1_P6_X16, prescale) { |
| 1809 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1810 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 1811 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1812 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1813 | .batch_size(batch_size) |
| 1814 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1815 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x16, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1816 | } |
| 1817 | } |
| 1818 | } |
| 1819 | |
| 1820 | TEST(F32_VELU__NEONFMA_RR1_P6_X16, alpha) { |
| 1821 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1822 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 1823 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1824 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1825 | .batch_size(batch_size) |
| 1826 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1827 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x16, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1828 | } |
| 1829 | } |
| 1830 | } |
| 1831 | |
| 1832 | TEST(F32_VELU__NEONFMA_RR1_P6_X16, beta) { |
| 1833 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1834 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 1835 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1836 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1837 | .batch_size(batch_size) |
| 1838 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1839 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x16, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1840 | } |
| 1841 | } |
| 1842 | } |
| 1843 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1844 | |
| 1845 | |
| 1846 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1847 | TEST(F32_VELU__NEONFMA_RR1_P6_X20, batch_eq_20) { |
| 1848 | TEST_REQUIRES_ARM_NEON_FMA; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1849 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1850 | .batch_size(20) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1851 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x20, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1852 | } |
| 1853 | |
| 1854 | TEST(F32_VELU__NEONFMA_RR1_P6_X20, batch_div_20) { |
| 1855 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1856 | for (size_t batch_size = 40; batch_size < 200; batch_size += 20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1857 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1858 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1859 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x20, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1860 | } |
| 1861 | } |
| 1862 | |
| 1863 | TEST(F32_VELU__NEONFMA_RR1_P6_X20, batch_lt_20) { |
| 1864 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1865 | for (size_t batch_size = 1; batch_size < 20; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1866 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1867 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1868 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x20, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1869 | } |
| 1870 | } |
| 1871 | |
| 1872 | TEST(F32_VELU__NEONFMA_RR1_P6_X20, batch_gt_20) { |
| 1873 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1874 | for (size_t batch_size = 21; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1875 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1876 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1877 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x20, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1878 | } |
| 1879 | } |
| 1880 | |
| 1881 | TEST(F32_VELU__NEONFMA_RR1_P6_X20, inplace) { |
| 1882 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1883 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1884 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1885 | .batch_size(batch_size) |
| 1886 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1887 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x20, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1888 | } |
| 1889 | } |
| 1890 | |
| 1891 | TEST(F32_VELU__NEONFMA_RR1_P6_X20, prescale) { |
| 1892 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1893 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 1894 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1895 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1896 | .batch_size(batch_size) |
| 1897 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1898 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x20, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1899 | } |
| 1900 | } |
| 1901 | } |
| 1902 | |
| 1903 | TEST(F32_VELU__NEONFMA_RR1_P6_X20, alpha) { |
| 1904 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1905 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 1906 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1907 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1908 | .batch_size(batch_size) |
| 1909 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1910 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x20, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1911 | } |
| 1912 | } |
| 1913 | } |
| 1914 | |
| 1915 | TEST(F32_VELU__NEONFMA_RR1_P6_X20, beta) { |
| 1916 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1917 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 1918 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1919 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1920 | .batch_size(batch_size) |
| 1921 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1922 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x20, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1923 | } |
| 1924 | } |
| 1925 | } |
| 1926 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1927 | |
| 1928 | |
| 1929 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 1930 | TEST(F32_VELU__NEONFMA_RR1_P6_X24, batch_eq_24) { |
| 1931 | TEST_REQUIRES_ARM_NEON_FMA; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1932 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1933 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1934 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x24, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1935 | } |
| 1936 | |
| 1937 | TEST(F32_VELU__NEONFMA_RR1_P6_X24, batch_div_24) { |
| 1938 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1939 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1940 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1941 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1942 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x24, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1943 | } |
| 1944 | } |
| 1945 | |
| 1946 | TEST(F32_VELU__NEONFMA_RR1_P6_X24, batch_lt_24) { |
| 1947 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1948 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1949 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1950 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1951 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x24, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1952 | } |
| 1953 | } |
| 1954 | |
| 1955 | TEST(F32_VELU__NEONFMA_RR1_P6_X24, batch_gt_24) { |
| 1956 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1957 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1958 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1959 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1960 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x24, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1961 | } |
| 1962 | } |
| 1963 | |
| 1964 | TEST(F32_VELU__NEONFMA_RR1_P6_X24, inplace) { |
| 1965 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1966 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1967 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1968 | .batch_size(batch_size) |
| 1969 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1970 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x24, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1971 | } |
| 1972 | } |
| 1973 | |
| 1974 | TEST(F32_VELU__NEONFMA_RR1_P6_X24, prescale) { |
| 1975 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1976 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 1977 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1978 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1979 | .batch_size(batch_size) |
| 1980 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1981 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x24, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1982 | } |
| 1983 | } |
| 1984 | } |
| 1985 | |
| 1986 | TEST(F32_VELU__NEONFMA_RR1_P6_X24, alpha) { |
| 1987 | TEST_REQUIRES_ARM_NEON_FMA; |
| 1988 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 1989 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1990 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1991 | .batch_size(batch_size) |
| 1992 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 1993 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x24, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 1994 | } |
| 1995 | } |
| 1996 | } |
| 1997 | |
| 1998 | TEST(F32_VELU__NEONFMA_RR1_P6_X24, beta) { |
| 1999 | TEST_REQUIRES_ARM_NEON_FMA; |
| 2000 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 2001 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2002 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2003 | .batch_size(batch_size) |
| 2004 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2005 | .Test(xnn_f32_velu_ukernel__neonfma_rr1_p6_x24, xnn_init_f32_elu_neonfma_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2006 | } |
| 2007 | } |
| 2008 | } |
| 2009 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 2010 | |
| 2011 | |
| 2012 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2013 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X4, batch_eq_4) { |
| 2014 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2015 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2016 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2017 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2018 | } |
| 2019 | |
| 2020 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X4, batch_div_4) { |
| 2021 | TEST_REQUIRES_X86_SSE2; |
| 2022 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2023 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2024 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2025 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2026 | } |
| 2027 | } |
| 2028 | |
| 2029 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X4, batch_lt_4) { |
| 2030 | TEST_REQUIRES_X86_SSE2; |
| 2031 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2032 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2033 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2034 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2035 | } |
| 2036 | } |
| 2037 | |
| 2038 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X4, batch_gt_4) { |
| 2039 | TEST_REQUIRES_X86_SSE2; |
| 2040 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2041 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2042 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2043 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2044 | } |
| 2045 | } |
| 2046 | |
| 2047 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X4, inplace) { |
| 2048 | TEST_REQUIRES_X86_SSE2; |
| 2049 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2050 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2051 | .batch_size(batch_size) |
| 2052 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2053 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2054 | } |
| 2055 | } |
| 2056 | |
| 2057 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X4, prescale) { |
| 2058 | TEST_REQUIRES_X86_SSE2; |
| 2059 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 2060 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2061 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2062 | .batch_size(batch_size) |
| 2063 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2064 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2065 | } |
| 2066 | } |
| 2067 | } |
| 2068 | |
| 2069 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X4, alpha) { |
| 2070 | TEST_REQUIRES_X86_SSE2; |
| 2071 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 2072 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2073 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2074 | .batch_size(batch_size) |
| 2075 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2076 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2077 | } |
| 2078 | } |
| 2079 | } |
| 2080 | |
| 2081 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X4, beta) { |
| 2082 | TEST_REQUIRES_X86_SSE2; |
| 2083 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 2084 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2085 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2086 | .batch_size(batch_size) |
| 2087 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2088 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2089 | } |
| 2090 | } |
| 2091 | } |
| 2092 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2093 | |
| 2094 | |
| 2095 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2096 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X8, batch_eq_8) { |
| 2097 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2098 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2099 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2100 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2101 | } |
| 2102 | |
| 2103 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X8, batch_div_8) { |
| 2104 | TEST_REQUIRES_X86_SSE2; |
| 2105 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2106 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2107 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2108 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2109 | } |
| 2110 | } |
| 2111 | |
| 2112 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X8, batch_lt_8) { |
| 2113 | TEST_REQUIRES_X86_SSE2; |
| 2114 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2115 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2116 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2117 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2118 | } |
| 2119 | } |
| 2120 | |
| 2121 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X8, batch_gt_8) { |
| 2122 | TEST_REQUIRES_X86_SSE2; |
| 2123 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2124 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2125 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2126 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2127 | } |
| 2128 | } |
| 2129 | |
| 2130 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X8, inplace) { |
| 2131 | TEST_REQUIRES_X86_SSE2; |
| 2132 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2133 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2134 | .batch_size(batch_size) |
| 2135 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2136 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2137 | } |
| 2138 | } |
| 2139 | |
| 2140 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X8, prescale) { |
| 2141 | TEST_REQUIRES_X86_SSE2; |
| 2142 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 2143 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2144 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2145 | .batch_size(batch_size) |
| 2146 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2147 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2148 | } |
| 2149 | } |
| 2150 | } |
| 2151 | |
| 2152 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X8, alpha) { |
| 2153 | TEST_REQUIRES_X86_SSE2; |
| 2154 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 2155 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2156 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2157 | .batch_size(batch_size) |
| 2158 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2159 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2160 | } |
| 2161 | } |
| 2162 | } |
| 2163 | |
| 2164 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X8, beta) { |
| 2165 | TEST_REQUIRES_X86_SSE2; |
| 2166 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 2167 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2168 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2169 | .batch_size(batch_size) |
| 2170 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2171 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2172 | } |
| 2173 | } |
| 2174 | } |
| 2175 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2176 | |
| 2177 | |
| 2178 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2179 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X12, batch_eq_12) { |
| 2180 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2181 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2182 | .batch_size(12) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2183 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2184 | } |
| 2185 | |
| 2186 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X12, batch_div_12) { |
| 2187 | TEST_REQUIRES_X86_SSE2; |
| 2188 | for (size_t batch_size = 24; batch_size < 120; batch_size += 12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2189 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2190 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2191 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2192 | } |
| 2193 | } |
| 2194 | |
| 2195 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X12, batch_lt_12) { |
| 2196 | TEST_REQUIRES_X86_SSE2; |
| 2197 | for (size_t batch_size = 1; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2198 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2199 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2200 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2201 | } |
| 2202 | } |
| 2203 | |
| 2204 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X12, batch_gt_12) { |
| 2205 | TEST_REQUIRES_X86_SSE2; |
| 2206 | for (size_t batch_size = 13; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2207 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2208 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2209 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2210 | } |
| 2211 | } |
| 2212 | |
| 2213 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X12, inplace) { |
| 2214 | TEST_REQUIRES_X86_SSE2; |
| 2215 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2216 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2217 | .batch_size(batch_size) |
| 2218 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2219 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2220 | } |
| 2221 | } |
| 2222 | |
| 2223 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X12, prescale) { |
| 2224 | TEST_REQUIRES_X86_SSE2; |
| 2225 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 2226 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2227 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2228 | .batch_size(batch_size) |
| 2229 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2230 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2231 | } |
| 2232 | } |
| 2233 | } |
| 2234 | |
| 2235 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X12, alpha) { |
| 2236 | TEST_REQUIRES_X86_SSE2; |
| 2237 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 2238 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2239 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2240 | .batch_size(batch_size) |
| 2241 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2242 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2243 | } |
| 2244 | } |
| 2245 | } |
| 2246 | |
| 2247 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X12, beta) { |
| 2248 | TEST_REQUIRES_X86_SSE2; |
| 2249 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 2250 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2251 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2252 | .batch_size(batch_size) |
| 2253 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2254 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2255 | } |
| 2256 | } |
| 2257 | } |
| 2258 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2259 | |
| 2260 | |
| 2261 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2262 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X16, batch_eq_16) { |
| 2263 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2264 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2265 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2266 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2267 | } |
| 2268 | |
| 2269 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X16, batch_div_16) { |
| 2270 | TEST_REQUIRES_X86_SSE2; |
| 2271 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2272 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2273 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2274 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2275 | } |
| 2276 | } |
| 2277 | |
| 2278 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X16, batch_lt_16) { |
| 2279 | TEST_REQUIRES_X86_SSE2; |
| 2280 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2281 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2282 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2283 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2284 | } |
| 2285 | } |
| 2286 | |
| 2287 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X16, batch_gt_16) { |
| 2288 | TEST_REQUIRES_X86_SSE2; |
| 2289 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2290 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2291 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2292 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2293 | } |
| 2294 | } |
| 2295 | |
| 2296 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X16, inplace) { |
| 2297 | TEST_REQUIRES_X86_SSE2; |
| 2298 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2299 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2300 | .batch_size(batch_size) |
| 2301 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2302 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2303 | } |
| 2304 | } |
| 2305 | |
| 2306 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X16, prescale) { |
| 2307 | TEST_REQUIRES_X86_SSE2; |
| 2308 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 2309 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2310 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2311 | .batch_size(batch_size) |
| 2312 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2313 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2314 | } |
| 2315 | } |
| 2316 | } |
| 2317 | |
| 2318 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X16, alpha) { |
| 2319 | TEST_REQUIRES_X86_SSE2; |
| 2320 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 2321 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2322 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2323 | .batch_size(batch_size) |
| 2324 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2325 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2326 | } |
| 2327 | } |
| 2328 | } |
| 2329 | |
| 2330 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X16, beta) { |
| 2331 | TEST_REQUIRES_X86_SSE2; |
| 2332 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 2333 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2334 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2335 | .batch_size(batch_size) |
| 2336 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2337 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2338 | } |
| 2339 | } |
| 2340 | } |
| 2341 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2342 | |
| 2343 | |
| 2344 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2345 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X20, batch_eq_20) { |
| 2346 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2347 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2348 | .batch_size(20) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2349 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2350 | } |
| 2351 | |
| 2352 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X20, batch_div_20) { |
| 2353 | TEST_REQUIRES_X86_SSE2; |
| 2354 | for (size_t batch_size = 40; batch_size < 200; batch_size += 20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2355 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2356 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2357 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2358 | } |
| 2359 | } |
| 2360 | |
| 2361 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X20, batch_lt_20) { |
| 2362 | TEST_REQUIRES_X86_SSE2; |
| 2363 | for (size_t batch_size = 1; batch_size < 20; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2364 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2365 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2366 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2367 | } |
| 2368 | } |
| 2369 | |
| 2370 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X20, batch_gt_20) { |
| 2371 | TEST_REQUIRES_X86_SSE2; |
| 2372 | for (size_t batch_size = 21; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2373 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2374 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2375 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2376 | } |
| 2377 | } |
| 2378 | |
| 2379 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X20, inplace) { |
| 2380 | TEST_REQUIRES_X86_SSE2; |
| 2381 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2382 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2383 | .batch_size(batch_size) |
| 2384 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2385 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2386 | } |
| 2387 | } |
| 2388 | |
| 2389 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X20, prescale) { |
| 2390 | TEST_REQUIRES_X86_SSE2; |
| 2391 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 2392 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2393 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2394 | .batch_size(batch_size) |
| 2395 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2396 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2397 | } |
| 2398 | } |
| 2399 | } |
| 2400 | |
| 2401 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X20, alpha) { |
| 2402 | TEST_REQUIRES_X86_SSE2; |
| 2403 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 2404 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2405 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2406 | .batch_size(batch_size) |
| 2407 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2408 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2409 | } |
| 2410 | } |
| 2411 | } |
| 2412 | |
| 2413 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X20, beta) { |
| 2414 | TEST_REQUIRES_X86_SSE2; |
| 2415 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 2416 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2417 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2418 | .batch_size(batch_size) |
| 2419 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2420 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2421 | } |
| 2422 | } |
| 2423 | } |
| 2424 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2425 | |
| 2426 | |
| 2427 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2428 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X24, batch_eq_24) { |
| 2429 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2430 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2431 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2432 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2433 | } |
| 2434 | |
| 2435 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X24, batch_div_24) { |
| 2436 | TEST_REQUIRES_X86_SSE2; |
| 2437 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2438 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2439 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2440 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2441 | } |
| 2442 | } |
| 2443 | |
| 2444 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X24, batch_lt_24) { |
| 2445 | TEST_REQUIRES_X86_SSE2; |
| 2446 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2447 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2448 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2449 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2450 | } |
| 2451 | } |
| 2452 | |
| 2453 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X24, batch_gt_24) { |
| 2454 | TEST_REQUIRES_X86_SSE2; |
| 2455 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2456 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2457 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2458 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2459 | } |
| 2460 | } |
| 2461 | |
| 2462 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X24, inplace) { |
| 2463 | TEST_REQUIRES_X86_SSE2; |
| 2464 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2465 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2466 | .batch_size(batch_size) |
| 2467 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2468 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2469 | } |
| 2470 | } |
| 2471 | |
| 2472 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X24, prescale) { |
| 2473 | TEST_REQUIRES_X86_SSE2; |
| 2474 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 2475 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2476 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2477 | .batch_size(batch_size) |
| 2478 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2479 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2480 | } |
| 2481 | } |
| 2482 | } |
| 2483 | |
| 2484 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X24, alpha) { |
| 2485 | TEST_REQUIRES_X86_SSE2; |
| 2486 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 2487 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2488 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2489 | .batch_size(batch_size) |
| 2490 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2491 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2492 | } |
| 2493 | } |
| 2494 | } |
| 2495 | |
| 2496 | TEST(F32_VELU__SSE2_RR2_LUT16_P3_X24, beta) { |
| 2497 | TEST_REQUIRES_X86_SSE2; |
| 2498 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 2499 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2500 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2501 | .batch_size(batch_size) |
| 2502 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2503 | .Test(xnn_f32_velu_ukernel__sse2_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2504 | } |
| 2505 | } |
| 2506 | } |
| 2507 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2508 | |
| 2509 | |
| 2510 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2511 | TEST(F32_VELU__SSE2_RR2_P6_X4, batch_eq_4) { |
| 2512 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2513 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2514 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2515 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2516 | } |
| 2517 | |
| 2518 | TEST(F32_VELU__SSE2_RR2_P6_X4, batch_div_4) { |
| 2519 | TEST_REQUIRES_X86_SSE2; |
| 2520 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2521 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2522 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2523 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2524 | } |
| 2525 | } |
| 2526 | |
| 2527 | TEST(F32_VELU__SSE2_RR2_P6_X4, batch_lt_4) { |
| 2528 | TEST_REQUIRES_X86_SSE2; |
| 2529 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2530 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2531 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2532 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2533 | } |
| 2534 | } |
| 2535 | |
| 2536 | TEST(F32_VELU__SSE2_RR2_P6_X4, batch_gt_4) { |
| 2537 | TEST_REQUIRES_X86_SSE2; |
| 2538 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2539 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2540 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2541 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2542 | } |
| 2543 | } |
| 2544 | |
| 2545 | TEST(F32_VELU__SSE2_RR2_P6_X4, inplace) { |
| 2546 | TEST_REQUIRES_X86_SSE2; |
| 2547 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2548 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2549 | .batch_size(batch_size) |
| 2550 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2551 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2552 | } |
| 2553 | } |
| 2554 | |
| 2555 | TEST(F32_VELU__SSE2_RR2_P6_X4, prescale) { |
| 2556 | TEST_REQUIRES_X86_SSE2; |
| 2557 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 2558 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2559 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2560 | .batch_size(batch_size) |
| 2561 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2562 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2563 | } |
| 2564 | } |
| 2565 | } |
| 2566 | |
| 2567 | TEST(F32_VELU__SSE2_RR2_P6_X4, alpha) { |
| 2568 | TEST_REQUIRES_X86_SSE2; |
| 2569 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 2570 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2571 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2572 | .batch_size(batch_size) |
| 2573 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2574 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2575 | } |
| 2576 | } |
| 2577 | } |
| 2578 | |
| 2579 | TEST(F32_VELU__SSE2_RR2_P6_X4, beta) { |
| 2580 | TEST_REQUIRES_X86_SSE2; |
| 2581 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 2582 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2583 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2584 | .batch_size(batch_size) |
| 2585 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2586 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2587 | } |
| 2588 | } |
| 2589 | } |
| 2590 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2591 | |
| 2592 | |
| 2593 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2594 | TEST(F32_VELU__SSE2_RR2_P6_X8, batch_eq_8) { |
| 2595 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2596 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2597 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2598 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2599 | } |
| 2600 | |
| 2601 | TEST(F32_VELU__SSE2_RR2_P6_X8, batch_div_8) { |
| 2602 | TEST_REQUIRES_X86_SSE2; |
| 2603 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2604 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2605 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2606 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2607 | } |
| 2608 | } |
| 2609 | |
| 2610 | TEST(F32_VELU__SSE2_RR2_P6_X8, batch_lt_8) { |
| 2611 | TEST_REQUIRES_X86_SSE2; |
| 2612 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2613 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2614 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2615 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2616 | } |
| 2617 | } |
| 2618 | |
| 2619 | TEST(F32_VELU__SSE2_RR2_P6_X8, batch_gt_8) { |
| 2620 | TEST_REQUIRES_X86_SSE2; |
| 2621 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2622 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2623 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2624 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2625 | } |
| 2626 | } |
| 2627 | |
| 2628 | TEST(F32_VELU__SSE2_RR2_P6_X8, inplace) { |
| 2629 | TEST_REQUIRES_X86_SSE2; |
| 2630 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2631 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2632 | .batch_size(batch_size) |
| 2633 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2634 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2635 | } |
| 2636 | } |
| 2637 | |
| 2638 | TEST(F32_VELU__SSE2_RR2_P6_X8, prescale) { |
| 2639 | TEST_REQUIRES_X86_SSE2; |
| 2640 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 2641 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2642 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2643 | .batch_size(batch_size) |
| 2644 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2645 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2646 | } |
| 2647 | } |
| 2648 | } |
| 2649 | |
| 2650 | TEST(F32_VELU__SSE2_RR2_P6_X8, alpha) { |
| 2651 | TEST_REQUIRES_X86_SSE2; |
| 2652 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 2653 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2654 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2655 | .batch_size(batch_size) |
| 2656 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2657 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2658 | } |
| 2659 | } |
| 2660 | } |
| 2661 | |
| 2662 | TEST(F32_VELU__SSE2_RR2_P6_X8, beta) { |
| 2663 | TEST_REQUIRES_X86_SSE2; |
| 2664 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 2665 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2666 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2667 | .batch_size(batch_size) |
| 2668 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2669 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2670 | } |
| 2671 | } |
| 2672 | } |
| 2673 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2674 | |
| 2675 | |
| 2676 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2677 | TEST(F32_VELU__SSE2_RR2_P6_X12, batch_eq_12) { |
| 2678 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2679 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2680 | .batch_size(12) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2681 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2682 | } |
| 2683 | |
| 2684 | TEST(F32_VELU__SSE2_RR2_P6_X12, batch_div_12) { |
| 2685 | TEST_REQUIRES_X86_SSE2; |
| 2686 | for (size_t batch_size = 24; batch_size < 120; batch_size += 12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2687 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2688 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2689 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2690 | } |
| 2691 | } |
| 2692 | |
| 2693 | TEST(F32_VELU__SSE2_RR2_P6_X12, batch_lt_12) { |
| 2694 | TEST_REQUIRES_X86_SSE2; |
| 2695 | for (size_t batch_size = 1; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2696 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2697 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2698 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2699 | } |
| 2700 | } |
| 2701 | |
| 2702 | TEST(F32_VELU__SSE2_RR2_P6_X12, batch_gt_12) { |
| 2703 | TEST_REQUIRES_X86_SSE2; |
| 2704 | for (size_t batch_size = 13; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2705 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2706 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2707 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2708 | } |
| 2709 | } |
| 2710 | |
| 2711 | TEST(F32_VELU__SSE2_RR2_P6_X12, inplace) { |
| 2712 | TEST_REQUIRES_X86_SSE2; |
| 2713 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2714 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2715 | .batch_size(batch_size) |
| 2716 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2717 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2718 | } |
| 2719 | } |
| 2720 | |
| 2721 | TEST(F32_VELU__SSE2_RR2_P6_X12, prescale) { |
| 2722 | TEST_REQUIRES_X86_SSE2; |
| 2723 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 2724 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2725 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2726 | .batch_size(batch_size) |
| 2727 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2728 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2729 | } |
| 2730 | } |
| 2731 | } |
| 2732 | |
| 2733 | TEST(F32_VELU__SSE2_RR2_P6_X12, alpha) { |
| 2734 | TEST_REQUIRES_X86_SSE2; |
| 2735 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 2736 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2737 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2738 | .batch_size(batch_size) |
| 2739 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2740 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2741 | } |
| 2742 | } |
| 2743 | } |
| 2744 | |
| 2745 | TEST(F32_VELU__SSE2_RR2_P6_X12, beta) { |
| 2746 | TEST_REQUIRES_X86_SSE2; |
| 2747 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 2748 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2749 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2750 | .batch_size(batch_size) |
| 2751 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2752 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2753 | } |
| 2754 | } |
| 2755 | } |
| 2756 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2757 | |
| 2758 | |
| 2759 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2760 | TEST(F32_VELU__SSE2_RR2_P6_X16, batch_eq_16) { |
| 2761 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2762 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2763 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2764 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2765 | } |
| 2766 | |
| 2767 | TEST(F32_VELU__SSE2_RR2_P6_X16, batch_div_16) { |
| 2768 | TEST_REQUIRES_X86_SSE2; |
| 2769 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2770 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2771 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2772 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2773 | } |
| 2774 | } |
| 2775 | |
| 2776 | TEST(F32_VELU__SSE2_RR2_P6_X16, batch_lt_16) { |
| 2777 | TEST_REQUIRES_X86_SSE2; |
| 2778 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2779 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2780 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2781 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2782 | } |
| 2783 | } |
| 2784 | |
| 2785 | TEST(F32_VELU__SSE2_RR2_P6_X16, batch_gt_16) { |
| 2786 | TEST_REQUIRES_X86_SSE2; |
| 2787 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2788 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2789 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2790 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2791 | } |
| 2792 | } |
| 2793 | |
| 2794 | TEST(F32_VELU__SSE2_RR2_P6_X16, inplace) { |
| 2795 | TEST_REQUIRES_X86_SSE2; |
| 2796 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2797 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2798 | .batch_size(batch_size) |
| 2799 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2800 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2801 | } |
| 2802 | } |
| 2803 | |
| 2804 | TEST(F32_VELU__SSE2_RR2_P6_X16, prescale) { |
| 2805 | TEST_REQUIRES_X86_SSE2; |
| 2806 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 2807 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2808 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2809 | .batch_size(batch_size) |
| 2810 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2811 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2812 | } |
| 2813 | } |
| 2814 | } |
| 2815 | |
| 2816 | TEST(F32_VELU__SSE2_RR2_P6_X16, alpha) { |
| 2817 | TEST_REQUIRES_X86_SSE2; |
| 2818 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 2819 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2820 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2821 | .batch_size(batch_size) |
| 2822 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2823 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2824 | } |
| 2825 | } |
| 2826 | } |
| 2827 | |
| 2828 | TEST(F32_VELU__SSE2_RR2_P6_X16, beta) { |
| 2829 | TEST_REQUIRES_X86_SSE2; |
| 2830 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 2831 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2832 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2833 | .batch_size(batch_size) |
| 2834 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2835 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2836 | } |
| 2837 | } |
| 2838 | } |
| 2839 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2840 | |
| 2841 | |
| 2842 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2843 | TEST(F32_VELU__SSE2_RR2_P6_X20, batch_eq_20) { |
| 2844 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2845 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2846 | .batch_size(20) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2847 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2848 | } |
| 2849 | |
| 2850 | TEST(F32_VELU__SSE2_RR2_P6_X20, batch_div_20) { |
| 2851 | TEST_REQUIRES_X86_SSE2; |
| 2852 | for (size_t batch_size = 40; batch_size < 200; batch_size += 20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2853 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2854 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2855 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2856 | } |
| 2857 | } |
| 2858 | |
| 2859 | TEST(F32_VELU__SSE2_RR2_P6_X20, batch_lt_20) { |
| 2860 | TEST_REQUIRES_X86_SSE2; |
| 2861 | for (size_t batch_size = 1; batch_size < 20; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2862 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2863 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2864 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2865 | } |
| 2866 | } |
| 2867 | |
| 2868 | TEST(F32_VELU__SSE2_RR2_P6_X20, batch_gt_20) { |
| 2869 | TEST_REQUIRES_X86_SSE2; |
| 2870 | for (size_t batch_size = 21; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2871 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2872 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2873 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2874 | } |
| 2875 | } |
| 2876 | |
| 2877 | TEST(F32_VELU__SSE2_RR2_P6_X20, inplace) { |
| 2878 | TEST_REQUIRES_X86_SSE2; |
| 2879 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2880 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2881 | .batch_size(batch_size) |
| 2882 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2883 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2884 | } |
| 2885 | } |
| 2886 | |
| 2887 | TEST(F32_VELU__SSE2_RR2_P6_X20, prescale) { |
| 2888 | TEST_REQUIRES_X86_SSE2; |
| 2889 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 2890 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2891 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2892 | .batch_size(batch_size) |
| 2893 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2894 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2895 | } |
| 2896 | } |
| 2897 | } |
| 2898 | |
| 2899 | TEST(F32_VELU__SSE2_RR2_P6_X20, alpha) { |
| 2900 | TEST_REQUIRES_X86_SSE2; |
| 2901 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 2902 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2903 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2904 | .batch_size(batch_size) |
| 2905 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2906 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2907 | } |
| 2908 | } |
| 2909 | } |
| 2910 | |
| 2911 | TEST(F32_VELU__SSE2_RR2_P6_X20, beta) { |
| 2912 | TEST_REQUIRES_X86_SSE2; |
| 2913 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 2914 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2915 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2916 | .batch_size(batch_size) |
| 2917 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2918 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2919 | } |
| 2920 | } |
| 2921 | } |
| 2922 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2923 | |
| 2924 | |
| 2925 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 2926 | TEST(F32_VELU__SSE2_RR2_P6_X24, batch_eq_24) { |
| 2927 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2928 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2929 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2930 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2931 | } |
| 2932 | |
| 2933 | TEST(F32_VELU__SSE2_RR2_P6_X24, batch_div_24) { |
| 2934 | TEST_REQUIRES_X86_SSE2; |
| 2935 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2936 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2937 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2938 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2939 | } |
| 2940 | } |
| 2941 | |
| 2942 | TEST(F32_VELU__SSE2_RR2_P6_X24, batch_lt_24) { |
| 2943 | TEST_REQUIRES_X86_SSE2; |
| 2944 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2945 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2946 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2947 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2948 | } |
| 2949 | } |
| 2950 | |
| 2951 | TEST(F32_VELU__SSE2_RR2_P6_X24, batch_gt_24) { |
| 2952 | TEST_REQUIRES_X86_SSE2; |
| 2953 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2954 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2955 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2956 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2957 | } |
| 2958 | } |
| 2959 | |
| 2960 | TEST(F32_VELU__SSE2_RR2_P6_X24, inplace) { |
| 2961 | TEST_REQUIRES_X86_SSE2; |
| 2962 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2963 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2964 | .batch_size(batch_size) |
| 2965 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2966 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2967 | } |
| 2968 | } |
| 2969 | |
| 2970 | TEST(F32_VELU__SSE2_RR2_P6_X24, prescale) { |
| 2971 | TEST_REQUIRES_X86_SSE2; |
| 2972 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 2973 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2974 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2975 | .batch_size(batch_size) |
| 2976 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2977 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2978 | } |
| 2979 | } |
| 2980 | } |
| 2981 | |
| 2982 | TEST(F32_VELU__SSE2_RR2_P6_X24, alpha) { |
| 2983 | TEST_REQUIRES_X86_SSE2; |
| 2984 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 2985 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2986 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2987 | .batch_size(batch_size) |
| 2988 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 2989 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2990 | } |
| 2991 | } |
| 2992 | } |
| 2993 | |
| 2994 | TEST(F32_VELU__SSE2_RR2_P6_X24, beta) { |
| 2995 | TEST_REQUIRES_X86_SSE2; |
| 2996 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 2997 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 2998 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 2999 | .batch_size(batch_size) |
| 3000 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3001 | .Test(xnn_f32_velu_ukernel__sse2_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3002 | } |
| 3003 | } |
| 3004 | } |
| 3005 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3006 | |
| 3007 | |
| 3008 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3009 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X4, batch_eq_4) { |
| 3010 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3011 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3012 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3013 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3014 | } |
| 3015 | |
| 3016 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X4, batch_div_4) { |
| 3017 | TEST_REQUIRES_X86_SSE41; |
| 3018 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3019 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3020 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3021 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3022 | } |
| 3023 | } |
| 3024 | |
| 3025 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X4, batch_lt_4) { |
| 3026 | TEST_REQUIRES_X86_SSE41; |
| 3027 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3028 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3029 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3030 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3031 | } |
| 3032 | } |
| 3033 | |
| 3034 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X4, batch_gt_4) { |
| 3035 | TEST_REQUIRES_X86_SSE41; |
| 3036 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3037 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3038 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3039 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3040 | } |
| 3041 | } |
| 3042 | |
| 3043 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X4, inplace) { |
| 3044 | TEST_REQUIRES_X86_SSE41; |
| 3045 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3046 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3047 | .batch_size(batch_size) |
| 3048 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3049 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3050 | } |
| 3051 | } |
| 3052 | |
| 3053 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X4, prescale) { |
| 3054 | TEST_REQUIRES_X86_SSE41; |
| 3055 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 3056 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3057 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3058 | .batch_size(batch_size) |
| 3059 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3060 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3061 | } |
| 3062 | } |
| 3063 | } |
| 3064 | |
| 3065 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X4, alpha) { |
| 3066 | TEST_REQUIRES_X86_SSE41; |
| 3067 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 3068 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3069 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3070 | .batch_size(batch_size) |
| 3071 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3072 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3073 | } |
| 3074 | } |
| 3075 | } |
| 3076 | |
| 3077 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X4, beta) { |
| 3078 | TEST_REQUIRES_X86_SSE41; |
| 3079 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 3080 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3081 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3082 | .batch_size(batch_size) |
| 3083 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3084 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x4, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3085 | } |
| 3086 | } |
| 3087 | } |
| 3088 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3089 | |
| 3090 | |
| 3091 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3092 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X8, batch_eq_8) { |
| 3093 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3094 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3095 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3096 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3097 | } |
| 3098 | |
| 3099 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X8, batch_div_8) { |
| 3100 | TEST_REQUIRES_X86_SSE41; |
| 3101 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3102 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3103 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3104 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3105 | } |
| 3106 | } |
| 3107 | |
| 3108 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X8, batch_lt_8) { |
| 3109 | TEST_REQUIRES_X86_SSE41; |
| 3110 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3111 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3112 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3113 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3114 | } |
| 3115 | } |
| 3116 | |
| 3117 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X8, batch_gt_8) { |
| 3118 | TEST_REQUIRES_X86_SSE41; |
| 3119 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3120 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3121 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3122 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3123 | } |
| 3124 | } |
| 3125 | |
| 3126 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X8, inplace) { |
| 3127 | TEST_REQUIRES_X86_SSE41; |
| 3128 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3129 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3130 | .batch_size(batch_size) |
| 3131 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3132 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3133 | } |
| 3134 | } |
| 3135 | |
| 3136 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X8, prescale) { |
| 3137 | TEST_REQUIRES_X86_SSE41; |
| 3138 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 3139 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3140 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3141 | .batch_size(batch_size) |
| 3142 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3143 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3144 | } |
| 3145 | } |
| 3146 | } |
| 3147 | |
| 3148 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X8, alpha) { |
| 3149 | TEST_REQUIRES_X86_SSE41; |
| 3150 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 3151 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3152 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3153 | .batch_size(batch_size) |
| 3154 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3155 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3156 | } |
| 3157 | } |
| 3158 | } |
| 3159 | |
| 3160 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X8, beta) { |
| 3161 | TEST_REQUIRES_X86_SSE41; |
| 3162 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 3163 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3164 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3165 | .batch_size(batch_size) |
| 3166 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3167 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x8, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3168 | } |
| 3169 | } |
| 3170 | } |
| 3171 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3172 | |
| 3173 | |
| 3174 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3175 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X12, batch_eq_12) { |
| 3176 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3177 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3178 | .batch_size(12) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3179 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3180 | } |
| 3181 | |
| 3182 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X12, batch_div_12) { |
| 3183 | TEST_REQUIRES_X86_SSE41; |
| 3184 | for (size_t batch_size = 24; batch_size < 120; batch_size += 12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3185 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3186 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3187 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3188 | } |
| 3189 | } |
| 3190 | |
| 3191 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X12, batch_lt_12) { |
| 3192 | TEST_REQUIRES_X86_SSE41; |
| 3193 | for (size_t batch_size = 1; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3194 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3195 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3196 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3197 | } |
| 3198 | } |
| 3199 | |
| 3200 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X12, batch_gt_12) { |
| 3201 | TEST_REQUIRES_X86_SSE41; |
| 3202 | for (size_t batch_size = 13; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3203 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3204 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3205 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3206 | } |
| 3207 | } |
| 3208 | |
| 3209 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X12, inplace) { |
| 3210 | TEST_REQUIRES_X86_SSE41; |
| 3211 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3212 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3213 | .batch_size(batch_size) |
| 3214 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3215 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3216 | } |
| 3217 | } |
| 3218 | |
| 3219 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X12, prescale) { |
| 3220 | TEST_REQUIRES_X86_SSE41; |
| 3221 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 3222 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3223 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3224 | .batch_size(batch_size) |
| 3225 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3226 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3227 | } |
| 3228 | } |
| 3229 | } |
| 3230 | |
| 3231 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X12, alpha) { |
| 3232 | TEST_REQUIRES_X86_SSE41; |
| 3233 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 3234 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3235 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3236 | .batch_size(batch_size) |
| 3237 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3238 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3239 | } |
| 3240 | } |
| 3241 | } |
| 3242 | |
| 3243 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X12, beta) { |
| 3244 | TEST_REQUIRES_X86_SSE41; |
| 3245 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 3246 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3247 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3248 | .batch_size(batch_size) |
| 3249 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3250 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x12, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3251 | } |
| 3252 | } |
| 3253 | } |
| 3254 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3255 | |
| 3256 | |
| 3257 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3258 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X16, batch_eq_16) { |
| 3259 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3260 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3261 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3262 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3263 | } |
| 3264 | |
| 3265 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X16, batch_div_16) { |
| 3266 | TEST_REQUIRES_X86_SSE41; |
| 3267 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3268 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3269 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3270 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3271 | } |
| 3272 | } |
| 3273 | |
| 3274 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X16, batch_lt_16) { |
| 3275 | TEST_REQUIRES_X86_SSE41; |
| 3276 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3277 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3278 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3279 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3280 | } |
| 3281 | } |
| 3282 | |
| 3283 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X16, batch_gt_16) { |
| 3284 | TEST_REQUIRES_X86_SSE41; |
| 3285 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3286 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3287 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3288 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3289 | } |
| 3290 | } |
| 3291 | |
| 3292 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X16, inplace) { |
| 3293 | TEST_REQUIRES_X86_SSE41; |
| 3294 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3295 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3296 | .batch_size(batch_size) |
| 3297 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3298 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3299 | } |
| 3300 | } |
| 3301 | |
| 3302 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X16, prescale) { |
| 3303 | TEST_REQUIRES_X86_SSE41; |
| 3304 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 3305 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3306 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3307 | .batch_size(batch_size) |
| 3308 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3309 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3310 | } |
| 3311 | } |
| 3312 | } |
| 3313 | |
| 3314 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X16, alpha) { |
| 3315 | TEST_REQUIRES_X86_SSE41; |
| 3316 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 3317 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3318 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3319 | .batch_size(batch_size) |
| 3320 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3321 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3322 | } |
| 3323 | } |
| 3324 | } |
| 3325 | |
| 3326 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X16, beta) { |
| 3327 | TEST_REQUIRES_X86_SSE41; |
| 3328 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 3329 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3330 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3331 | .batch_size(batch_size) |
| 3332 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3333 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x16, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3334 | } |
| 3335 | } |
| 3336 | } |
| 3337 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3338 | |
| 3339 | |
| 3340 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3341 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X20, batch_eq_20) { |
| 3342 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3343 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3344 | .batch_size(20) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3345 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3346 | } |
| 3347 | |
| 3348 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X20, batch_div_20) { |
| 3349 | TEST_REQUIRES_X86_SSE41; |
| 3350 | for (size_t batch_size = 40; batch_size < 200; batch_size += 20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3351 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3352 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3353 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3354 | } |
| 3355 | } |
| 3356 | |
| 3357 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X20, batch_lt_20) { |
| 3358 | TEST_REQUIRES_X86_SSE41; |
| 3359 | for (size_t batch_size = 1; batch_size < 20; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3360 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3361 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3362 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3363 | } |
| 3364 | } |
| 3365 | |
| 3366 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X20, batch_gt_20) { |
| 3367 | TEST_REQUIRES_X86_SSE41; |
| 3368 | for (size_t batch_size = 21; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3369 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3370 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3371 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3372 | } |
| 3373 | } |
| 3374 | |
| 3375 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X20, inplace) { |
| 3376 | TEST_REQUIRES_X86_SSE41; |
| 3377 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3378 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3379 | .batch_size(batch_size) |
| 3380 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3381 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3382 | } |
| 3383 | } |
| 3384 | |
| 3385 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X20, prescale) { |
| 3386 | TEST_REQUIRES_X86_SSE41; |
| 3387 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 3388 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3389 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3390 | .batch_size(batch_size) |
| 3391 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3392 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3393 | } |
| 3394 | } |
| 3395 | } |
| 3396 | |
| 3397 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X20, alpha) { |
| 3398 | TEST_REQUIRES_X86_SSE41; |
| 3399 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 3400 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3401 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3402 | .batch_size(batch_size) |
| 3403 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3404 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3405 | } |
| 3406 | } |
| 3407 | } |
| 3408 | |
| 3409 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X20, beta) { |
| 3410 | TEST_REQUIRES_X86_SSE41; |
| 3411 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 3412 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3413 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3414 | .batch_size(batch_size) |
| 3415 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3416 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x20, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3417 | } |
| 3418 | } |
| 3419 | } |
| 3420 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3421 | |
| 3422 | |
| 3423 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3424 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X24, batch_eq_24) { |
| 3425 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3426 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3427 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3428 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3429 | } |
| 3430 | |
| 3431 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X24, batch_div_24) { |
| 3432 | TEST_REQUIRES_X86_SSE41; |
| 3433 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3434 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3435 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3436 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3437 | } |
| 3438 | } |
| 3439 | |
| 3440 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X24, batch_lt_24) { |
| 3441 | TEST_REQUIRES_X86_SSE41; |
| 3442 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3443 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3444 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3445 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3446 | } |
| 3447 | } |
| 3448 | |
| 3449 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X24, batch_gt_24) { |
| 3450 | TEST_REQUIRES_X86_SSE41; |
| 3451 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3452 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3453 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3454 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3455 | } |
| 3456 | } |
| 3457 | |
| 3458 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X24, inplace) { |
| 3459 | TEST_REQUIRES_X86_SSE41; |
| 3460 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3461 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3462 | .batch_size(batch_size) |
| 3463 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3464 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3465 | } |
| 3466 | } |
| 3467 | |
| 3468 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X24, prescale) { |
| 3469 | TEST_REQUIRES_X86_SSE41; |
| 3470 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 3471 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3472 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3473 | .batch_size(batch_size) |
| 3474 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3475 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3476 | } |
| 3477 | } |
| 3478 | } |
| 3479 | |
| 3480 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X24, alpha) { |
| 3481 | TEST_REQUIRES_X86_SSE41; |
| 3482 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 3483 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3484 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3485 | .batch_size(batch_size) |
| 3486 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3487 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3488 | } |
| 3489 | } |
| 3490 | } |
| 3491 | |
| 3492 | TEST(F32_VELU__SSE41_RR2_LUT16_P3_X24, beta) { |
| 3493 | TEST_REQUIRES_X86_SSE41; |
| 3494 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 3495 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3496 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3497 | .batch_size(batch_size) |
| 3498 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3499 | .Test(xnn_f32_velu_ukernel__sse41_rr2_lut16_p3_x24, xnn_init_f32_elu_sse2_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3500 | } |
| 3501 | } |
| 3502 | } |
| 3503 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3504 | |
| 3505 | |
| 3506 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3507 | TEST(F32_VELU__SSE41_RR2_P6_X4, batch_eq_4) { |
| 3508 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3509 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3510 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3511 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3512 | } |
| 3513 | |
| 3514 | TEST(F32_VELU__SSE41_RR2_P6_X4, batch_div_4) { |
| 3515 | TEST_REQUIRES_X86_SSE41; |
| 3516 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3517 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3518 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3519 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3520 | } |
| 3521 | } |
| 3522 | |
| 3523 | TEST(F32_VELU__SSE41_RR2_P6_X4, batch_lt_4) { |
| 3524 | TEST_REQUIRES_X86_SSE41; |
| 3525 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3526 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3527 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3528 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3529 | } |
| 3530 | } |
| 3531 | |
| 3532 | TEST(F32_VELU__SSE41_RR2_P6_X4, batch_gt_4) { |
| 3533 | TEST_REQUIRES_X86_SSE41; |
| 3534 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3535 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3536 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3537 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3538 | } |
| 3539 | } |
| 3540 | |
| 3541 | TEST(F32_VELU__SSE41_RR2_P6_X4, inplace) { |
| 3542 | TEST_REQUIRES_X86_SSE41; |
| 3543 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3544 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3545 | .batch_size(batch_size) |
| 3546 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3547 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3548 | } |
| 3549 | } |
| 3550 | |
| 3551 | TEST(F32_VELU__SSE41_RR2_P6_X4, prescale) { |
| 3552 | TEST_REQUIRES_X86_SSE41; |
| 3553 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 3554 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3555 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3556 | .batch_size(batch_size) |
| 3557 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3558 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3559 | } |
| 3560 | } |
| 3561 | } |
| 3562 | |
| 3563 | TEST(F32_VELU__SSE41_RR2_P6_X4, alpha) { |
| 3564 | TEST_REQUIRES_X86_SSE41; |
| 3565 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 3566 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3567 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3568 | .batch_size(batch_size) |
| 3569 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3570 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3571 | } |
| 3572 | } |
| 3573 | } |
| 3574 | |
| 3575 | TEST(F32_VELU__SSE41_RR2_P6_X4, beta) { |
| 3576 | TEST_REQUIRES_X86_SSE41; |
| 3577 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 3578 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3579 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3580 | .batch_size(batch_size) |
| 3581 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3582 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x4, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3583 | } |
| 3584 | } |
| 3585 | } |
| 3586 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3587 | |
| 3588 | |
| 3589 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3590 | TEST(F32_VELU__SSE41_RR2_P6_X8, batch_eq_8) { |
| 3591 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3592 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3593 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3594 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3595 | } |
| 3596 | |
| 3597 | TEST(F32_VELU__SSE41_RR2_P6_X8, batch_div_8) { |
| 3598 | TEST_REQUIRES_X86_SSE41; |
| 3599 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3600 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3601 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3602 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3603 | } |
| 3604 | } |
| 3605 | |
| 3606 | TEST(F32_VELU__SSE41_RR2_P6_X8, batch_lt_8) { |
| 3607 | TEST_REQUIRES_X86_SSE41; |
| 3608 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3609 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3610 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3611 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3612 | } |
| 3613 | } |
| 3614 | |
| 3615 | TEST(F32_VELU__SSE41_RR2_P6_X8, batch_gt_8) { |
| 3616 | TEST_REQUIRES_X86_SSE41; |
| 3617 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3618 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3619 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3620 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3621 | } |
| 3622 | } |
| 3623 | |
| 3624 | TEST(F32_VELU__SSE41_RR2_P6_X8, inplace) { |
| 3625 | TEST_REQUIRES_X86_SSE41; |
| 3626 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3627 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3628 | .batch_size(batch_size) |
| 3629 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3630 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3631 | } |
| 3632 | } |
| 3633 | |
| 3634 | TEST(F32_VELU__SSE41_RR2_P6_X8, prescale) { |
| 3635 | TEST_REQUIRES_X86_SSE41; |
| 3636 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 3637 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3638 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3639 | .batch_size(batch_size) |
| 3640 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3641 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3642 | } |
| 3643 | } |
| 3644 | } |
| 3645 | |
| 3646 | TEST(F32_VELU__SSE41_RR2_P6_X8, alpha) { |
| 3647 | TEST_REQUIRES_X86_SSE41; |
| 3648 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 3649 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3650 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3651 | .batch_size(batch_size) |
| 3652 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3653 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3654 | } |
| 3655 | } |
| 3656 | } |
| 3657 | |
| 3658 | TEST(F32_VELU__SSE41_RR2_P6_X8, beta) { |
| 3659 | TEST_REQUIRES_X86_SSE41; |
| 3660 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 3661 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3662 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3663 | .batch_size(batch_size) |
| 3664 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3665 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x8, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3666 | } |
| 3667 | } |
| 3668 | } |
| 3669 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3670 | |
| 3671 | |
| 3672 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3673 | TEST(F32_VELU__SSE41_RR2_P6_X12, batch_eq_12) { |
| 3674 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3675 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3676 | .batch_size(12) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3677 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3678 | } |
| 3679 | |
| 3680 | TEST(F32_VELU__SSE41_RR2_P6_X12, batch_div_12) { |
| 3681 | TEST_REQUIRES_X86_SSE41; |
| 3682 | for (size_t batch_size = 24; batch_size < 120; batch_size += 12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3683 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3684 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3685 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3686 | } |
| 3687 | } |
| 3688 | |
| 3689 | TEST(F32_VELU__SSE41_RR2_P6_X12, batch_lt_12) { |
| 3690 | TEST_REQUIRES_X86_SSE41; |
| 3691 | for (size_t batch_size = 1; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3692 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3693 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3694 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3695 | } |
| 3696 | } |
| 3697 | |
| 3698 | TEST(F32_VELU__SSE41_RR2_P6_X12, batch_gt_12) { |
| 3699 | TEST_REQUIRES_X86_SSE41; |
| 3700 | for (size_t batch_size = 13; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3701 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3702 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3703 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3704 | } |
| 3705 | } |
| 3706 | |
| 3707 | TEST(F32_VELU__SSE41_RR2_P6_X12, inplace) { |
| 3708 | TEST_REQUIRES_X86_SSE41; |
| 3709 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3710 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3711 | .batch_size(batch_size) |
| 3712 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3713 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3714 | } |
| 3715 | } |
| 3716 | |
| 3717 | TEST(F32_VELU__SSE41_RR2_P6_X12, prescale) { |
| 3718 | TEST_REQUIRES_X86_SSE41; |
| 3719 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 3720 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3721 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3722 | .batch_size(batch_size) |
| 3723 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3724 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3725 | } |
| 3726 | } |
| 3727 | } |
| 3728 | |
| 3729 | TEST(F32_VELU__SSE41_RR2_P6_X12, alpha) { |
| 3730 | TEST_REQUIRES_X86_SSE41; |
| 3731 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 3732 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3733 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3734 | .batch_size(batch_size) |
| 3735 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3736 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3737 | } |
| 3738 | } |
| 3739 | } |
| 3740 | |
| 3741 | TEST(F32_VELU__SSE41_RR2_P6_X12, beta) { |
| 3742 | TEST_REQUIRES_X86_SSE41; |
| 3743 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 3744 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3745 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3746 | .batch_size(batch_size) |
| 3747 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3748 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x12, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3749 | } |
| 3750 | } |
| 3751 | } |
| 3752 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3753 | |
| 3754 | |
| 3755 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3756 | TEST(F32_VELU__SSE41_RR2_P6_X16, batch_eq_16) { |
| 3757 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3758 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3759 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3760 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3761 | } |
| 3762 | |
| 3763 | TEST(F32_VELU__SSE41_RR2_P6_X16, batch_div_16) { |
| 3764 | TEST_REQUIRES_X86_SSE41; |
| 3765 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3766 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3767 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3768 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3769 | } |
| 3770 | } |
| 3771 | |
| 3772 | TEST(F32_VELU__SSE41_RR2_P6_X16, batch_lt_16) { |
| 3773 | TEST_REQUIRES_X86_SSE41; |
| 3774 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3775 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3776 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3777 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3778 | } |
| 3779 | } |
| 3780 | |
| 3781 | TEST(F32_VELU__SSE41_RR2_P6_X16, batch_gt_16) { |
| 3782 | TEST_REQUIRES_X86_SSE41; |
| 3783 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3784 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3785 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3786 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3787 | } |
| 3788 | } |
| 3789 | |
| 3790 | TEST(F32_VELU__SSE41_RR2_P6_X16, inplace) { |
| 3791 | TEST_REQUIRES_X86_SSE41; |
| 3792 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3793 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3794 | .batch_size(batch_size) |
| 3795 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3796 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3797 | } |
| 3798 | } |
| 3799 | |
| 3800 | TEST(F32_VELU__SSE41_RR2_P6_X16, prescale) { |
| 3801 | TEST_REQUIRES_X86_SSE41; |
| 3802 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 3803 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3804 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3805 | .batch_size(batch_size) |
| 3806 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3807 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3808 | } |
| 3809 | } |
| 3810 | } |
| 3811 | |
| 3812 | TEST(F32_VELU__SSE41_RR2_P6_X16, alpha) { |
| 3813 | TEST_REQUIRES_X86_SSE41; |
| 3814 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 3815 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3816 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3817 | .batch_size(batch_size) |
| 3818 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3819 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3820 | } |
| 3821 | } |
| 3822 | } |
| 3823 | |
| 3824 | TEST(F32_VELU__SSE41_RR2_P6_X16, beta) { |
| 3825 | TEST_REQUIRES_X86_SSE41; |
| 3826 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 3827 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3828 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3829 | .batch_size(batch_size) |
| 3830 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3831 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x16, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3832 | } |
| 3833 | } |
| 3834 | } |
| 3835 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3836 | |
| 3837 | |
| 3838 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3839 | TEST(F32_VELU__SSE41_RR2_P6_X20, batch_eq_20) { |
| 3840 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3841 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3842 | .batch_size(20) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3843 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3844 | } |
| 3845 | |
| 3846 | TEST(F32_VELU__SSE41_RR2_P6_X20, batch_div_20) { |
| 3847 | TEST_REQUIRES_X86_SSE41; |
| 3848 | for (size_t batch_size = 40; batch_size < 200; batch_size += 20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3849 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3850 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3851 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3852 | } |
| 3853 | } |
| 3854 | |
| 3855 | TEST(F32_VELU__SSE41_RR2_P6_X20, batch_lt_20) { |
| 3856 | TEST_REQUIRES_X86_SSE41; |
| 3857 | for (size_t batch_size = 1; batch_size < 20; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3858 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3859 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3860 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3861 | } |
| 3862 | } |
| 3863 | |
| 3864 | TEST(F32_VELU__SSE41_RR2_P6_X20, batch_gt_20) { |
| 3865 | TEST_REQUIRES_X86_SSE41; |
| 3866 | for (size_t batch_size = 21; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3867 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3868 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3869 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3870 | } |
| 3871 | } |
| 3872 | |
| 3873 | TEST(F32_VELU__SSE41_RR2_P6_X20, inplace) { |
| 3874 | TEST_REQUIRES_X86_SSE41; |
| 3875 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3876 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3877 | .batch_size(batch_size) |
| 3878 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3879 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3880 | } |
| 3881 | } |
| 3882 | |
| 3883 | TEST(F32_VELU__SSE41_RR2_P6_X20, prescale) { |
| 3884 | TEST_REQUIRES_X86_SSE41; |
| 3885 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 3886 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3887 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3888 | .batch_size(batch_size) |
| 3889 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3890 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3891 | } |
| 3892 | } |
| 3893 | } |
| 3894 | |
| 3895 | TEST(F32_VELU__SSE41_RR2_P6_X20, alpha) { |
| 3896 | TEST_REQUIRES_X86_SSE41; |
| 3897 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 3898 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3899 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3900 | .batch_size(batch_size) |
| 3901 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3902 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3903 | } |
| 3904 | } |
| 3905 | } |
| 3906 | |
| 3907 | TEST(F32_VELU__SSE41_RR2_P6_X20, beta) { |
| 3908 | TEST_REQUIRES_X86_SSE41; |
| 3909 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 3910 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3911 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3912 | .batch_size(batch_size) |
| 3913 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3914 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x20, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3915 | } |
| 3916 | } |
| 3917 | } |
| 3918 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3919 | |
| 3920 | |
| 3921 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 3922 | TEST(F32_VELU__SSE41_RR2_P6_X24, batch_eq_24) { |
| 3923 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3924 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3925 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3926 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3927 | } |
| 3928 | |
| 3929 | TEST(F32_VELU__SSE41_RR2_P6_X24, batch_div_24) { |
| 3930 | TEST_REQUIRES_X86_SSE41; |
| 3931 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3932 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3933 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3934 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3935 | } |
| 3936 | } |
| 3937 | |
| 3938 | TEST(F32_VELU__SSE41_RR2_P6_X24, batch_lt_24) { |
| 3939 | TEST_REQUIRES_X86_SSE41; |
| 3940 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3941 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3942 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3943 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3944 | } |
| 3945 | } |
| 3946 | |
| 3947 | TEST(F32_VELU__SSE41_RR2_P6_X24, batch_gt_24) { |
| 3948 | TEST_REQUIRES_X86_SSE41; |
| 3949 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3950 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3951 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3952 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3953 | } |
| 3954 | } |
| 3955 | |
| 3956 | TEST(F32_VELU__SSE41_RR2_P6_X24, inplace) { |
| 3957 | TEST_REQUIRES_X86_SSE41; |
| 3958 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3959 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3960 | .batch_size(batch_size) |
| 3961 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3962 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3963 | } |
| 3964 | } |
| 3965 | |
| 3966 | TEST(F32_VELU__SSE41_RR2_P6_X24, prescale) { |
| 3967 | TEST_REQUIRES_X86_SSE41; |
| 3968 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 3969 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3970 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3971 | .batch_size(batch_size) |
| 3972 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3973 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3974 | } |
| 3975 | } |
| 3976 | } |
| 3977 | |
| 3978 | TEST(F32_VELU__SSE41_RR2_P6_X24, alpha) { |
| 3979 | TEST_REQUIRES_X86_SSE41; |
| 3980 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 3981 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3982 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3983 | .batch_size(batch_size) |
| 3984 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3985 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3986 | } |
| 3987 | } |
| 3988 | } |
| 3989 | |
| 3990 | TEST(F32_VELU__SSE41_RR2_P6_X24, beta) { |
| 3991 | TEST_REQUIRES_X86_SSE41; |
| 3992 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 3993 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 3994 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3995 | .batch_size(batch_size) |
| 3996 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 3997 | .Test(xnn_f32_velu_ukernel__sse41_rr2_p6_x24, xnn_init_f32_elu_sse2_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 3998 | } |
| 3999 | } |
| 4000 | } |
| 4001 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4002 | |
| 4003 | |
| 4004 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4005 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X8, batch_eq_8) { |
| 4006 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4007 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4008 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4009 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x8, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4010 | } |
| 4011 | |
| 4012 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X8, batch_div_8) { |
| 4013 | TEST_REQUIRES_X86_AVX; |
| 4014 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4015 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4016 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4017 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x8, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4018 | } |
| 4019 | } |
| 4020 | |
| 4021 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X8, batch_lt_8) { |
| 4022 | TEST_REQUIRES_X86_AVX; |
| 4023 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4024 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4025 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4026 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x8, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4027 | } |
| 4028 | } |
| 4029 | |
| 4030 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X8, batch_gt_8) { |
| 4031 | TEST_REQUIRES_X86_AVX; |
| 4032 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4033 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4034 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4035 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x8, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4036 | } |
| 4037 | } |
| 4038 | |
| 4039 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X8, inplace) { |
| 4040 | TEST_REQUIRES_X86_AVX; |
| 4041 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4042 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4043 | .batch_size(batch_size) |
| 4044 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4045 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x8, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4046 | } |
| 4047 | } |
| 4048 | |
| 4049 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X8, prescale) { |
| 4050 | TEST_REQUIRES_X86_AVX; |
| 4051 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 4052 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4053 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4054 | .batch_size(batch_size) |
| 4055 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4056 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x8, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4057 | } |
| 4058 | } |
| 4059 | } |
| 4060 | |
| 4061 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X8, alpha) { |
| 4062 | TEST_REQUIRES_X86_AVX; |
| 4063 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 4064 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4065 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4066 | .batch_size(batch_size) |
| 4067 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4068 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x8, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4069 | } |
| 4070 | } |
| 4071 | } |
| 4072 | |
| 4073 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X8, beta) { |
| 4074 | TEST_REQUIRES_X86_AVX; |
| 4075 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 4076 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4077 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4078 | .batch_size(batch_size) |
| 4079 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4080 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x8, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4081 | } |
| 4082 | } |
| 4083 | } |
| 4084 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4085 | |
| 4086 | |
| 4087 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4088 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X16, batch_eq_16) { |
| 4089 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4090 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4091 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4092 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x16, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4093 | } |
| 4094 | |
| 4095 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X16, batch_div_16) { |
| 4096 | TEST_REQUIRES_X86_AVX; |
| 4097 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4098 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4099 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4100 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x16, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4101 | } |
| 4102 | } |
| 4103 | |
| 4104 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X16, batch_lt_16) { |
| 4105 | TEST_REQUIRES_X86_AVX; |
| 4106 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4107 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4108 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4109 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x16, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4110 | } |
| 4111 | } |
| 4112 | |
| 4113 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X16, batch_gt_16) { |
| 4114 | TEST_REQUIRES_X86_AVX; |
| 4115 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4116 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4117 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4118 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x16, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4119 | } |
| 4120 | } |
| 4121 | |
| 4122 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X16, inplace) { |
| 4123 | TEST_REQUIRES_X86_AVX; |
| 4124 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4125 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4126 | .batch_size(batch_size) |
| 4127 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4128 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x16, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4129 | } |
| 4130 | } |
| 4131 | |
| 4132 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X16, prescale) { |
| 4133 | TEST_REQUIRES_X86_AVX; |
| 4134 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 4135 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4136 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4137 | .batch_size(batch_size) |
| 4138 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4139 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x16, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4140 | } |
| 4141 | } |
| 4142 | } |
| 4143 | |
| 4144 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X16, alpha) { |
| 4145 | TEST_REQUIRES_X86_AVX; |
| 4146 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 4147 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4148 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4149 | .batch_size(batch_size) |
| 4150 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4151 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x16, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4152 | } |
| 4153 | } |
| 4154 | } |
| 4155 | |
| 4156 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X16, beta) { |
| 4157 | TEST_REQUIRES_X86_AVX; |
| 4158 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 4159 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4160 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4161 | .batch_size(batch_size) |
| 4162 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4163 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x16, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4164 | } |
| 4165 | } |
| 4166 | } |
| 4167 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4168 | |
| 4169 | |
| 4170 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4171 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X24, batch_eq_24) { |
| 4172 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4173 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4174 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4175 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x24, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4176 | } |
| 4177 | |
| 4178 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X24, batch_div_24) { |
| 4179 | TEST_REQUIRES_X86_AVX; |
| 4180 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4181 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4182 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4183 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x24, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4184 | } |
| 4185 | } |
| 4186 | |
| 4187 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X24, batch_lt_24) { |
| 4188 | TEST_REQUIRES_X86_AVX; |
| 4189 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4190 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4191 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4192 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x24, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4193 | } |
| 4194 | } |
| 4195 | |
| 4196 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X24, batch_gt_24) { |
| 4197 | TEST_REQUIRES_X86_AVX; |
| 4198 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4199 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4200 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4201 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x24, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4202 | } |
| 4203 | } |
| 4204 | |
| 4205 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X24, inplace) { |
| 4206 | TEST_REQUIRES_X86_AVX; |
| 4207 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4208 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4209 | .batch_size(batch_size) |
| 4210 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4211 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x24, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4212 | } |
| 4213 | } |
| 4214 | |
| 4215 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X24, prescale) { |
| 4216 | TEST_REQUIRES_X86_AVX; |
| 4217 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 4218 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4219 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4220 | .batch_size(batch_size) |
| 4221 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4222 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x24, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4223 | } |
| 4224 | } |
| 4225 | } |
| 4226 | |
| 4227 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X24, alpha) { |
| 4228 | TEST_REQUIRES_X86_AVX; |
| 4229 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 4230 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4231 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4232 | .batch_size(batch_size) |
| 4233 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4234 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x24, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4235 | } |
| 4236 | } |
| 4237 | } |
| 4238 | |
| 4239 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X24, beta) { |
| 4240 | TEST_REQUIRES_X86_AVX; |
| 4241 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 4242 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4243 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4244 | .batch_size(batch_size) |
| 4245 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4246 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x24, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4247 | } |
| 4248 | } |
| 4249 | } |
| 4250 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4251 | |
| 4252 | |
| 4253 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4254 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X32, batch_eq_32) { |
| 4255 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4256 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4257 | .batch_size(32) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4258 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x32, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4259 | } |
| 4260 | |
| 4261 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X32, batch_div_32) { |
| 4262 | TEST_REQUIRES_X86_AVX; |
| 4263 | for (size_t batch_size = 64; batch_size < 320; batch_size += 32) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4264 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4265 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4266 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x32, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4267 | } |
| 4268 | } |
| 4269 | |
| 4270 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X32, batch_lt_32) { |
| 4271 | TEST_REQUIRES_X86_AVX; |
| 4272 | for (size_t batch_size = 1; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4273 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4274 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4275 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x32, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4276 | } |
| 4277 | } |
| 4278 | |
| 4279 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X32, batch_gt_32) { |
| 4280 | TEST_REQUIRES_X86_AVX; |
| 4281 | for (size_t batch_size = 33; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4282 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4283 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4284 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x32, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4285 | } |
| 4286 | } |
| 4287 | |
| 4288 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X32, inplace) { |
| 4289 | TEST_REQUIRES_X86_AVX; |
| 4290 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4291 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4292 | .batch_size(batch_size) |
| 4293 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4294 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x32, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4295 | } |
| 4296 | } |
| 4297 | |
| 4298 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X32, prescale) { |
| 4299 | TEST_REQUIRES_X86_AVX; |
| 4300 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 4301 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4302 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4303 | .batch_size(batch_size) |
| 4304 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4305 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x32, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4306 | } |
| 4307 | } |
| 4308 | } |
| 4309 | |
| 4310 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X32, alpha) { |
| 4311 | TEST_REQUIRES_X86_AVX; |
| 4312 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 4313 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4314 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4315 | .batch_size(batch_size) |
| 4316 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4317 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x32, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4318 | } |
| 4319 | } |
| 4320 | } |
| 4321 | |
| 4322 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X32, beta) { |
| 4323 | TEST_REQUIRES_X86_AVX; |
| 4324 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 4325 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4326 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4327 | .batch_size(batch_size) |
| 4328 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4329 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x32, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4330 | } |
| 4331 | } |
| 4332 | } |
| 4333 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4334 | |
| 4335 | |
| 4336 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4337 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X40, batch_eq_40) { |
| 4338 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4339 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4340 | .batch_size(40) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4341 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x40, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4342 | } |
| 4343 | |
| 4344 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X40, batch_div_40) { |
| 4345 | TEST_REQUIRES_X86_AVX; |
| 4346 | for (size_t batch_size = 80; batch_size < 400; batch_size += 40) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4347 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4348 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4349 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x40, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4350 | } |
| 4351 | } |
| 4352 | |
| 4353 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X40, batch_lt_40) { |
| 4354 | TEST_REQUIRES_X86_AVX; |
| 4355 | for (size_t batch_size = 1; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4356 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4357 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4358 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x40, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4359 | } |
| 4360 | } |
| 4361 | |
| 4362 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X40, batch_gt_40) { |
| 4363 | TEST_REQUIRES_X86_AVX; |
| 4364 | for (size_t batch_size = 41; batch_size < 80; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4365 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4366 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4367 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x40, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4368 | } |
| 4369 | } |
| 4370 | |
| 4371 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X40, inplace) { |
| 4372 | TEST_REQUIRES_X86_AVX; |
| 4373 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4374 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4375 | .batch_size(batch_size) |
| 4376 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4377 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x40, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4378 | } |
| 4379 | } |
| 4380 | |
| 4381 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X40, prescale) { |
| 4382 | TEST_REQUIRES_X86_AVX; |
| 4383 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 4384 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4385 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4386 | .batch_size(batch_size) |
| 4387 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4388 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x40, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4389 | } |
| 4390 | } |
| 4391 | } |
| 4392 | |
| 4393 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X40, alpha) { |
| 4394 | TEST_REQUIRES_X86_AVX; |
| 4395 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 4396 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4397 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4398 | .batch_size(batch_size) |
| 4399 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4400 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x40, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4401 | } |
| 4402 | } |
| 4403 | } |
| 4404 | |
| 4405 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X40, beta) { |
| 4406 | TEST_REQUIRES_X86_AVX; |
| 4407 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 4408 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4409 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4410 | .batch_size(batch_size) |
| 4411 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4412 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x40, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4413 | } |
| 4414 | } |
| 4415 | } |
| 4416 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4417 | |
| 4418 | |
| 4419 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4420 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X48, batch_eq_48) { |
| 4421 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4422 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4423 | .batch_size(48) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4424 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4425 | } |
| 4426 | |
| 4427 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X48, batch_div_48) { |
| 4428 | TEST_REQUIRES_X86_AVX; |
| 4429 | for (size_t batch_size = 96; batch_size < 480; batch_size += 48) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4430 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4431 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4432 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4433 | } |
| 4434 | } |
| 4435 | |
| 4436 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X48, batch_lt_48) { |
| 4437 | TEST_REQUIRES_X86_AVX; |
| 4438 | for (size_t batch_size = 1; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4439 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4440 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4441 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4442 | } |
| 4443 | } |
| 4444 | |
| 4445 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X48, batch_gt_48) { |
| 4446 | TEST_REQUIRES_X86_AVX; |
| 4447 | for (size_t batch_size = 49; batch_size < 96; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4448 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4449 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4450 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4451 | } |
| 4452 | } |
| 4453 | |
| 4454 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X48, inplace) { |
| 4455 | TEST_REQUIRES_X86_AVX; |
| 4456 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4457 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4458 | .batch_size(batch_size) |
| 4459 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4460 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4461 | } |
| 4462 | } |
| 4463 | |
| 4464 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X48, prescale) { |
| 4465 | TEST_REQUIRES_X86_AVX; |
| 4466 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 4467 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4468 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4469 | .batch_size(batch_size) |
| 4470 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4471 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4472 | } |
| 4473 | } |
| 4474 | } |
| 4475 | |
| 4476 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X48, alpha) { |
| 4477 | TEST_REQUIRES_X86_AVX; |
| 4478 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 4479 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4480 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4481 | .batch_size(batch_size) |
| 4482 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4483 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4484 | } |
| 4485 | } |
| 4486 | } |
| 4487 | |
| 4488 | TEST(F32_VELU__AVX_RR2_LUT4_P4_PERM_X48, beta) { |
| 4489 | TEST_REQUIRES_X86_AVX; |
| 4490 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 4491 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4492 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4493 | .batch_size(batch_size) |
| 4494 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4495 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48, xnn_init_f32_elu_avx_rr2_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4496 | } |
| 4497 | } |
| 4498 | } |
| 4499 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4500 | |
| 4501 | |
| 4502 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4503 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X8, batch_eq_8) { |
| 4504 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4505 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4506 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4507 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x8, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4508 | } |
| 4509 | |
| 4510 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X8, batch_div_8) { |
| 4511 | TEST_REQUIRES_X86_AVX; |
| 4512 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4513 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4514 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4515 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x8, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4516 | } |
| 4517 | } |
| 4518 | |
| 4519 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X8, batch_lt_8) { |
| 4520 | TEST_REQUIRES_X86_AVX; |
| 4521 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4522 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4523 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4524 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x8, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4525 | } |
| 4526 | } |
| 4527 | |
| 4528 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X8, batch_gt_8) { |
| 4529 | TEST_REQUIRES_X86_AVX; |
| 4530 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4531 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4532 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4533 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x8, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4534 | } |
| 4535 | } |
| 4536 | |
| 4537 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X8, inplace) { |
| 4538 | TEST_REQUIRES_X86_AVX; |
| 4539 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4540 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4541 | .batch_size(batch_size) |
| 4542 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4543 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x8, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4544 | } |
| 4545 | } |
| 4546 | |
| 4547 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X8, prescale) { |
| 4548 | TEST_REQUIRES_X86_AVX; |
| 4549 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 4550 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4551 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4552 | .batch_size(batch_size) |
| 4553 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4554 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x8, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4555 | } |
| 4556 | } |
| 4557 | } |
| 4558 | |
| 4559 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X8, alpha) { |
| 4560 | TEST_REQUIRES_X86_AVX; |
| 4561 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 4562 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4563 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4564 | .batch_size(batch_size) |
| 4565 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4566 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x8, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4567 | } |
| 4568 | } |
| 4569 | } |
| 4570 | |
| 4571 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X8, beta) { |
| 4572 | TEST_REQUIRES_X86_AVX; |
| 4573 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 4574 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4575 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4576 | .batch_size(batch_size) |
| 4577 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4578 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x8, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4579 | } |
| 4580 | } |
| 4581 | } |
| 4582 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4583 | |
| 4584 | |
| 4585 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4586 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X16, batch_eq_16) { |
| 4587 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4588 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4589 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4590 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x16, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4591 | } |
| 4592 | |
| 4593 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X16, batch_div_16) { |
| 4594 | TEST_REQUIRES_X86_AVX; |
| 4595 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4596 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4597 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4598 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x16, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4599 | } |
| 4600 | } |
| 4601 | |
| 4602 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X16, batch_lt_16) { |
| 4603 | TEST_REQUIRES_X86_AVX; |
| 4604 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4605 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4606 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4607 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x16, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4608 | } |
| 4609 | } |
| 4610 | |
| 4611 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X16, batch_gt_16) { |
| 4612 | TEST_REQUIRES_X86_AVX; |
| 4613 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4614 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4615 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4616 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x16, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4617 | } |
| 4618 | } |
| 4619 | |
| 4620 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X16, inplace) { |
| 4621 | TEST_REQUIRES_X86_AVX; |
| 4622 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4623 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4624 | .batch_size(batch_size) |
| 4625 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4626 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x16, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4627 | } |
| 4628 | } |
| 4629 | |
| 4630 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X16, prescale) { |
| 4631 | TEST_REQUIRES_X86_AVX; |
| 4632 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 4633 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4634 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4635 | .batch_size(batch_size) |
| 4636 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4637 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x16, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4638 | } |
| 4639 | } |
| 4640 | } |
| 4641 | |
| 4642 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X16, alpha) { |
| 4643 | TEST_REQUIRES_X86_AVX; |
| 4644 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 4645 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4646 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4647 | .batch_size(batch_size) |
| 4648 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4649 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x16, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4650 | } |
| 4651 | } |
| 4652 | } |
| 4653 | |
| 4654 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X16, beta) { |
| 4655 | TEST_REQUIRES_X86_AVX; |
| 4656 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 4657 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4658 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4659 | .batch_size(batch_size) |
| 4660 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4661 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x16, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4662 | } |
| 4663 | } |
| 4664 | } |
| 4665 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4666 | |
| 4667 | |
| 4668 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4669 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X24, batch_eq_24) { |
| 4670 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4671 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4672 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4673 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x24, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4674 | } |
| 4675 | |
| 4676 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X24, batch_div_24) { |
| 4677 | TEST_REQUIRES_X86_AVX; |
| 4678 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4679 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4680 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4681 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x24, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4682 | } |
| 4683 | } |
| 4684 | |
| 4685 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X24, batch_lt_24) { |
| 4686 | TEST_REQUIRES_X86_AVX; |
| 4687 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4688 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4689 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4690 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x24, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4691 | } |
| 4692 | } |
| 4693 | |
| 4694 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X24, batch_gt_24) { |
| 4695 | TEST_REQUIRES_X86_AVX; |
| 4696 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4697 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4698 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4699 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x24, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4700 | } |
| 4701 | } |
| 4702 | |
| 4703 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X24, inplace) { |
| 4704 | TEST_REQUIRES_X86_AVX; |
| 4705 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4706 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4707 | .batch_size(batch_size) |
| 4708 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4709 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x24, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4710 | } |
| 4711 | } |
| 4712 | |
| 4713 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X24, prescale) { |
| 4714 | TEST_REQUIRES_X86_AVX; |
| 4715 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 4716 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4717 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4718 | .batch_size(batch_size) |
| 4719 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4720 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x24, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4721 | } |
| 4722 | } |
| 4723 | } |
| 4724 | |
| 4725 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X24, alpha) { |
| 4726 | TEST_REQUIRES_X86_AVX; |
| 4727 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 4728 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4729 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4730 | .batch_size(batch_size) |
| 4731 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4732 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x24, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4733 | } |
| 4734 | } |
| 4735 | } |
| 4736 | |
| 4737 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X24, beta) { |
| 4738 | TEST_REQUIRES_X86_AVX; |
| 4739 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 4740 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4741 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4742 | .batch_size(batch_size) |
| 4743 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4744 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x24, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4745 | } |
| 4746 | } |
| 4747 | } |
| 4748 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4749 | |
| 4750 | |
| 4751 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4752 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X32, batch_eq_32) { |
| 4753 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4754 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4755 | .batch_size(32) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4756 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x32, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4757 | } |
| 4758 | |
| 4759 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X32, batch_div_32) { |
| 4760 | TEST_REQUIRES_X86_AVX; |
| 4761 | for (size_t batch_size = 64; batch_size < 320; batch_size += 32) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4762 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4763 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4764 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x32, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4765 | } |
| 4766 | } |
| 4767 | |
| 4768 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X32, batch_lt_32) { |
| 4769 | TEST_REQUIRES_X86_AVX; |
| 4770 | for (size_t batch_size = 1; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4771 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4772 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4773 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x32, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4774 | } |
| 4775 | } |
| 4776 | |
| 4777 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X32, batch_gt_32) { |
| 4778 | TEST_REQUIRES_X86_AVX; |
| 4779 | for (size_t batch_size = 33; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4780 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4781 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4782 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x32, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4783 | } |
| 4784 | } |
| 4785 | |
| 4786 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X32, inplace) { |
| 4787 | TEST_REQUIRES_X86_AVX; |
| 4788 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4789 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4790 | .batch_size(batch_size) |
| 4791 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4792 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x32, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4793 | } |
| 4794 | } |
| 4795 | |
| 4796 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X32, prescale) { |
| 4797 | TEST_REQUIRES_X86_AVX; |
| 4798 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 4799 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4800 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4801 | .batch_size(batch_size) |
| 4802 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4803 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x32, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4804 | } |
| 4805 | } |
| 4806 | } |
| 4807 | |
| 4808 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X32, alpha) { |
| 4809 | TEST_REQUIRES_X86_AVX; |
| 4810 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 4811 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4812 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4813 | .batch_size(batch_size) |
| 4814 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4815 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x32, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4816 | } |
| 4817 | } |
| 4818 | } |
| 4819 | |
| 4820 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X32, beta) { |
| 4821 | TEST_REQUIRES_X86_AVX; |
| 4822 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 4823 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4824 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4825 | .batch_size(batch_size) |
| 4826 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4827 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x32, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4828 | } |
| 4829 | } |
| 4830 | } |
| 4831 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4832 | |
| 4833 | |
| 4834 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4835 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X40, batch_eq_40) { |
| 4836 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4837 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4838 | .batch_size(40) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4839 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x40, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4840 | } |
| 4841 | |
| 4842 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X40, batch_div_40) { |
| 4843 | TEST_REQUIRES_X86_AVX; |
| 4844 | for (size_t batch_size = 80; batch_size < 400; batch_size += 40) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4845 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4846 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4847 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x40, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4848 | } |
| 4849 | } |
| 4850 | |
| 4851 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X40, batch_lt_40) { |
| 4852 | TEST_REQUIRES_X86_AVX; |
| 4853 | for (size_t batch_size = 1; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4854 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4855 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4856 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x40, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4857 | } |
| 4858 | } |
| 4859 | |
| 4860 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X40, batch_gt_40) { |
| 4861 | TEST_REQUIRES_X86_AVX; |
| 4862 | for (size_t batch_size = 41; batch_size < 80; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4863 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4864 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4865 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x40, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4866 | } |
| 4867 | } |
| 4868 | |
| 4869 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X40, inplace) { |
| 4870 | TEST_REQUIRES_X86_AVX; |
| 4871 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4872 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4873 | .batch_size(batch_size) |
| 4874 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4875 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x40, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4876 | } |
| 4877 | } |
| 4878 | |
| 4879 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X40, prescale) { |
| 4880 | TEST_REQUIRES_X86_AVX; |
| 4881 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 4882 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4883 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4884 | .batch_size(batch_size) |
| 4885 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4886 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x40, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4887 | } |
| 4888 | } |
| 4889 | } |
| 4890 | |
| 4891 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X40, alpha) { |
| 4892 | TEST_REQUIRES_X86_AVX; |
| 4893 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 4894 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4895 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4896 | .batch_size(batch_size) |
| 4897 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4898 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x40, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4899 | } |
| 4900 | } |
| 4901 | } |
| 4902 | |
| 4903 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X40, beta) { |
| 4904 | TEST_REQUIRES_X86_AVX; |
| 4905 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 4906 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4907 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4908 | .batch_size(batch_size) |
| 4909 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4910 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x40, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4911 | } |
| 4912 | } |
| 4913 | } |
| 4914 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4915 | |
| 4916 | |
| 4917 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4918 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X48, batch_eq_48) { |
| 4919 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4920 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4921 | .batch_size(48) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4922 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x48, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4923 | } |
| 4924 | |
| 4925 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X48, batch_div_48) { |
| 4926 | TEST_REQUIRES_X86_AVX; |
| 4927 | for (size_t batch_size = 96; batch_size < 480; batch_size += 48) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4928 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4929 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4930 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x48, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4931 | } |
| 4932 | } |
| 4933 | |
| 4934 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X48, batch_lt_48) { |
| 4935 | TEST_REQUIRES_X86_AVX; |
| 4936 | for (size_t batch_size = 1; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4937 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4938 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4939 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x48, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4940 | } |
| 4941 | } |
| 4942 | |
| 4943 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X48, batch_gt_48) { |
| 4944 | TEST_REQUIRES_X86_AVX; |
| 4945 | for (size_t batch_size = 49; batch_size < 96; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4946 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4947 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4948 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x48, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4949 | } |
| 4950 | } |
| 4951 | |
| 4952 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X48, inplace) { |
| 4953 | TEST_REQUIRES_X86_AVX; |
| 4954 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4955 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4956 | .batch_size(batch_size) |
| 4957 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4958 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x48, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4959 | } |
| 4960 | } |
| 4961 | |
| 4962 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X48, prescale) { |
| 4963 | TEST_REQUIRES_X86_AVX; |
| 4964 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 4965 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4966 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4967 | .batch_size(batch_size) |
| 4968 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4969 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x48, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4970 | } |
| 4971 | } |
| 4972 | } |
| 4973 | |
| 4974 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X48, alpha) { |
| 4975 | TEST_REQUIRES_X86_AVX; |
| 4976 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 4977 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4978 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4979 | .batch_size(batch_size) |
| 4980 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4981 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x48, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4982 | } |
| 4983 | } |
| 4984 | } |
| 4985 | |
| 4986 | TEST(F32_VELU__AVX_RR2_LUT16_P3_X48, beta) { |
| 4987 | TEST_REQUIRES_X86_AVX; |
| 4988 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 4989 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 4990 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4991 | .batch_size(batch_size) |
| 4992 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 4993 | .Test(xnn_f32_velu_ukernel__avx_rr2_lut16_p3_x48, xnn_init_f32_elu_avx_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 4994 | } |
| 4995 | } |
| 4996 | } |
| 4997 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 4998 | |
| 4999 | |
| 5000 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5001 | TEST(F32_VELU__AVX_RR2_P6_X8, batch_eq_8) { |
| 5002 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5003 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5004 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5005 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x8, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5006 | } |
| 5007 | |
| 5008 | TEST(F32_VELU__AVX_RR2_P6_X8, batch_div_8) { |
| 5009 | TEST_REQUIRES_X86_AVX; |
| 5010 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5011 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5012 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5013 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x8, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5014 | } |
| 5015 | } |
| 5016 | |
| 5017 | TEST(F32_VELU__AVX_RR2_P6_X8, batch_lt_8) { |
| 5018 | TEST_REQUIRES_X86_AVX; |
| 5019 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5020 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5021 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5022 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x8, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5023 | } |
| 5024 | } |
| 5025 | |
| 5026 | TEST(F32_VELU__AVX_RR2_P6_X8, batch_gt_8) { |
| 5027 | TEST_REQUIRES_X86_AVX; |
| 5028 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5029 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5030 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5031 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x8, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5032 | } |
| 5033 | } |
| 5034 | |
| 5035 | TEST(F32_VELU__AVX_RR2_P6_X8, inplace) { |
| 5036 | TEST_REQUIRES_X86_AVX; |
| 5037 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5038 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5039 | .batch_size(batch_size) |
| 5040 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5041 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x8, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5042 | } |
| 5043 | } |
| 5044 | |
| 5045 | TEST(F32_VELU__AVX_RR2_P6_X8, prescale) { |
| 5046 | TEST_REQUIRES_X86_AVX; |
| 5047 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 5048 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5049 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5050 | .batch_size(batch_size) |
| 5051 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5052 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x8, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5053 | } |
| 5054 | } |
| 5055 | } |
| 5056 | |
| 5057 | TEST(F32_VELU__AVX_RR2_P6_X8, alpha) { |
| 5058 | TEST_REQUIRES_X86_AVX; |
| 5059 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 5060 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5061 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5062 | .batch_size(batch_size) |
| 5063 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5064 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x8, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5065 | } |
| 5066 | } |
| 5067 | } |
| 5068 | |
| 5069 | TEST(F32_VELU__AVX_RR2_P6_X8, beta) { |
| 5070 | TEST_REQUIRES_X86_AVX; |
| 5071 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 5072 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5073 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5074 | .batch_size(batch_size) |
| 5075 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5076 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x8, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5077 | } |
| 5078 | } |
| 5079 | } |
| 5080 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5081 | |
| 5082 | |
| 5083 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5084 | TEST(F32_VELU__AVX_RR2_P6_X16, batch_eq_16) { |
| 5085 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5086 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5087 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5088 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x16, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5089 | } |
| 5090 | |
| 5091 | TEST(F32_VELU__AVX_RR2_P6_X16, batch_div_16) { |
| 5092 | TEST_REQUIRES_X86_AVX; |
| 5093 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5094 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5095 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5096 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x16, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5097 | } |
| 5098 | } |
| 5099 | |
| 5100 | TEST(F32_VELU__AVX_RR2_P6_X16, batch_lt_16) { |
| 5101 | TEST_REQUIRES_X86_AVX; |
| 5102 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5103 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5104 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5105 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x16, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5106 | } |
| 5107 | } |
| 5108 | |
| 5109 | TEST(F32_VELU__AVX_RR2_P6_X16, batch_gt_16) { |
| 5110 | TEST_REQUIRES_X86_AVX; |
| 5111 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5112 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5113 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5114 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x16, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5115 | } |
| 5116 | } |
| 5117 | |
| 5118 | TEST(F32_VELU__AVX_RR2_P6_X16, inplace) { |
| 5119 | TEST_REQUIRES_X86_AVX; |
| 5120 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5121 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5122 | .batch_size(batch_size) |
| 5123 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5124 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x16, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5125 | } |
| 5126 | } |
| 5127 | |
| 5128 | TEST(F32_VELU__AVX_RR2_P6_X16, prescale) { |
| 5129 | TEST_REQUIRES_X86_AVX; |
| 5130 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 5131 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5132 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5133 | .batch_size(batch_size) |
| 5134 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5135 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x16, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5136 | } |
| 5137 | } |
| 5138 | } |
| 5139 | |
| 5140 | TEST(F32_VELU__AVX_RR2_P6_X16, alpha) { |
| 5141 | TEST_REQUIRES_X86_AVX; |
| 5142 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 5143 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5144 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5145 | .batch_size(batch_size) |
| 5146 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5147 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x16, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5148 | } |
| 5149 | } |
| 5150 | } |
| 5151 | |
| 5152 | TEST(F32_VELU__AVX_RR2_P6_X16, beta) { |
| 5153 | TEST_REQUIRES_X86_AVX; |
| 5154 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 5155 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5156 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5157 | .batch_size(batch_size) |
| 5158 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5159 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x16, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5160 | } |
| 5161 | } |
| 5162 | } |
| 5163 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5164 | |
| 5165 | |
| 5166 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5167 | TEST(F32_VELU__AVX_RR2_P6_X24, batch_eq_24) { |
| 5168 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5169 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5170 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5171 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x24, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5172 | } |
| 5173 | |
| 5174 | TEST(F32_VELU__AVX_RR2_P6_X24, batch_div_24) { |
| 5175 | TEST_REQUIRES_X86_AVX; |
| 5176 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5177 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5178 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5179 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x24, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5180 | } |
| 5181 | } |
| 5182 | |
| 5183 | TEST(F32_VELU__AVX_RR2_P6_X24, batch_lt_24) { |
| 5184 | TEST_REQUIRES_X86_AVX; |
| 5185 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5186 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5187 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5188 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x24, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5189 | } |
| 5190 | } |
| 5191 | |
| 5192 | TEST(F32_VELU__AVX_RR2_P6_X24, batch_gt_24) { |
| 5193 | TEST_REQUIRES_X86_AVX; |
| 5194 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5195 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5196 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5197 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x24, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5198 | } |
| 5199 | } |
| 5200 | |
| 5201 | TEST(F32_VELU__AVX_RR2_P6_X24, inplace) { |
| 5202 | TEST_REQUIRES_X86_AVX; |
| 5203 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5204 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5205 | .batch_size(batch_size) |
| 5206 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5207 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x24, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5208 | } |
| 5209 | } |
| 5210 | |
| 5211 | TEST(F32_VELU__AVX_RR2_P6_X24, prescale) { |
| 5212 | TEST_REQUIRES_X86_AVX; |
| 5213 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 5214 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5215 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5216 | .batch_size(batch_size) |
| 5217 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5218 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x24, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5219 | } |
| 5220 | } |
| 5221 | } |
| 5222 | |
| 5223 | TEST(F32_VELU__AVX_RR2_P6_X24, alpha) { |
| 5224 | TEST_REQUIRES_X86_AVX; |
| 5225 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 5226 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5227 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5228 | .batch_size(batch_size) |
| 5229 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5230 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x24, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5231 | } |
| 5232 | } |
| 5233 | } |
| 5234 | |
| 5235 | TEST(F32_VELU__AVX_RR2_P6_X24, beta) { |
| 5236 | TEST_REQUIRES_X86_AVX; |
| 5237 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 5238 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5239 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5240 | .batch_size(batch_size) |
| 5241 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5242 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x24, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5243 | } |
| 5244 | } |
| 5245 | } |
| 5246 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5247 | |
| 5248 | |
| 5249 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5250 | TEST(F32_VELU__AVX_RR2_P6_X32, batch_eq_32) { |
| 5251 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5252 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5253 | .batch_size(32) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5254 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x32, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5255 | } |
| 5256 | |
| 5257 | TEST(F32_VELU__AVX_RR2_P6_X32, batch_div_32) { |
| 5258 | TEST_REQUIRES_X86_AVX; |
| 5259 | for (size_t batch_size = 64; batch_size < 320; batch_size += 32) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5260 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5261 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5262 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x32, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5263 | } |
| 5264 | } |
| 5265 | |
| 5266 | TEST(F32_VELU__AVX_RR2_P6_X32, batch_lt_32) { |
| 5267 | TEST_REQUIRES_X86_AVX; |
| 5268 | for (size_t batch_size = 1; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5269 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5270 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5271 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x32, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5272 | } |
| 5273 | } |
| 5274 | |
| 5275 | TEST(F32_VELU__AVX_RR2_P6_X32, batch_gt_32) { |
| 5276 | TEST_REQUIRES_X86_AVX; |
| 5277 | for (size_t batch_size = 33; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5278 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5279 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5280 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x32, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5281 | } |
| 5282 | } |
| 5283 | |
| 5284 | TEST(F32_VELU__AVX_RR2_P6_X32, inplace) { |
| 5285 | TEST_REQUIRES_X86_AVX; |
| 5286 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5287 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5288 | .batch_size(batch_size) |
| 5289 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5290 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x32, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5291 | } |
| 5292 | } |
| 5293 | |
| 5294 | TEST(F32_VELU__AVX_RR2_P6_X32, prescale) { |
| 5295 | TEST_REQUIRES_X86_AVX; |
| 5296 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 5297 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5298 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5299 | .batch_size(batch_size) |
| 5300 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5301 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x32, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5302 | } |
| 5303 | } |
| 5304 | } |
| 5305 | |
| 5306 | TEST(F32_VELU__AVX_RR2_P6_X32, alpha) { |
| 5307 | TEST_REQUIRES_X86_AVX; |
| 5308 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 5309 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5310 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5311 | .batch_size(batch_size) |
| 5312 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5313 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x32, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5314 | } |
| 5315 | } |
| 5316 | } |
| 5317 | |
| 5318 | TEST(F32_VELU__AVX_RR2_P6_X32, beta) { |
| 5319 | TEST_REQUIRES_X86_AVX; |
| 5320 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 5321 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5322 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5323 | .batch_size(batch_size) |
| 5324 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5325 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x32, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5326 | } |
| 5327 | } |
| 5328 | } |
| 5329 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5330 | |
| 5331 | |
| 5332 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5333 | TEST(F32_VELU__AVX_RR2_P6_X40, batch_eq_40) { |
| 5334 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5335 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5336 | .batch_size(40) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5337 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x40, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5338 | } |
| 5339 | |
| 5340 | TEST(F32_VELU__AVX_RR2_P6_X40, batch_div_40) { |
| 5341 | TEST_REQUIRES_X86_AVX; |
| 5342 | for (size_t batch_size = 80; batch_size < 400; batch_size += 40) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5343 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5344 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5345 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x40, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5346 | } |
| 5347 | } |
| 5348 | |
| 5349 | TEST(F32_VELU__AVX_RR2_P6_X40, batch_lt_40) { |
| 5350 | TEST_REQUIRES_X86_AVX; |
| 5351 | for (size_t batch_size = 1; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5352 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5353 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5354 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x40, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5355 | } |
| 5356 | } |
| 5357 | |
| 5358 | TEST(F32_VELU__AVX_RR2_P6_X40, batch_gt_40) { |
| 5359 | TEST_REQUIRES_X86_AVX; |
| 5360 | for (size_t batch_size = 41; batch_size < 80; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5361 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5362 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5363 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x40, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5364 | } |
| 5365 | } |
| 5366 | |
| 5367 | TEST(F32_VELU__AVX_RR2_P6_X40, inplace) { |
| 5368 | TEST_REQUIRES_X86_AVX; |
| 5369 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5370 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5371 | .batch_size(batch_size) |
| 5372 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5373 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x40, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5374 | } |
| 5375 | } |
| 5376 | |
| 5377 | TEST(F32_VELU__AVX_RR2_P6_X40, prescale) { |
| 5378 | TEST_REQUIRES_X86_AVX; |
| 5379 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 5380 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5381 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5382 | .batch_size(batch_size) |
| 5383 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5384 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x40, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5385 | } |
| 5386 | } |
| 5387 | } |
| 5388 | |
| 5389 | TEST(F32_VELU__AVX_RR2_P6_X40, alpha) { |
| 5390 | TEST_REQUIRES_X86_AVX; |
| 5391 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 5392 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5393 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5394 | .batch_size(batch_size) |
| 5395 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5396 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x40, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5397 | } |
| 5398 | } |
| 5399 | } |
| 5400 | |
| 5401 | TEST(F32_VELU__AVX_RR2_P6_X40, beta) { |
| 5402 | TEST_REQUIRES_X86_AVX; |
| 5403 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 5404 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5405 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5406 | .batch_size(batch_size) |
| 5407 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5408 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x40, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5409 | } |
| 5410 | } |
| 5411 | } |
| 5412 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5413 | |
| 5414 | |
| 5415 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5416 | TEST(F32_VELU__AVX_RR2_P6_X48, batch_eq_48) { |
| 5417 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5418 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5419 | .batch_size(48) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5420 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x48, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5421 | } |
| 5422 | |
| 5423 | TEST(F32_VELU__AVX_RR2_P6_X48, batch_div_48) { |
| 5424 | TEST_REQUIRES_X86_AVX; |
| 5425 | for (size_t batch_size = 96; batch_size < 480; batch_size += 48) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5426 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5427 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5428 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x48, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5429 | } |
| 5430 | } |
| 5431 | |
| 5432 | TEST(F32_VELU__AVX_RR2_P6_X48, batch_lt_48) { |
| 5433 | TEST_REQUIRES_X86_AVX; |
| 5434 | for (size_t batch_size = 1; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5435 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5436 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5437 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x48, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5438 | } |
| 5439 | } |
| 5440 | |
| 5441 | TEST(F32_VELU__AVX_RR2_P6_X48, batch_gt_48) { |
| 5442 | TEST_REQUIRES_X86_AVX; |
| 5443 | for (size_t batch_size = 49; batch_size < 96; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5444 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5445 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5446 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x48, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5447 | } |
| 5448 | } |
| 5449 | |
| 5450 | TEST(F32_VELU__AVX_RR2_P6_X48, inplace) { |
| 5451 | TEST_REQUIRES_X86_AVX; |
| 5452 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5453 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5454 | .batch_size(batch_size) |
| 5455 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5456 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x48, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5457 | } |
| 5458 | } |
| 5459 | |
| 5460 | TEST(F32_VELU__AVX_RR2_P6_X48, prescale) { |
| 5461 | TEST_REQUIRES_X86_AVX; |
| 5462 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 5463 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5464 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5465 | .batch_size(batch_size) |
| 5466 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5467 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x48, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5468 | } |
| 5469 | } |
| 5470 | } |
| 5471 | |
| 5472 | TEST(F32_VELU__AVX_RR2_P6_X48, alpha) { |
| 5473 | TEST_REQUIRES_X86_AVX; |
| 5474 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 5475 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5476 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5477 | .batch_size(batch_size) |
| 5478 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5479 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x48, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5480 | } |
| 5481 | } |
| 5482 | } |
| 5483 | |
| 5484 | TEST(F32_VELU__AVX_RR2_P6_X48, beta) { |
| 5485 | TEST_REQUIRES_X86_AVX; |
| 5486 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 5487 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5488 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5489 | .batch_size(batch_size) |
| 5490 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5491 | .Test(xnn_f32_velu_ukernel__avx_rr2_p6_x48, xnn_init_f32_elu_avx_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5492 | } |
| 5493 | } |
| 5494 | } |
| 5495 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5496 | |
| 5497 | |
| 5498 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5499 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X8, batch_eq_8) { |
| 5500 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5501 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5502 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5503 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5504 | } |
| 5505 | |
| 5506 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X8, batch_div_8) { |
| 5507 | TEST_REQUIRES_X86_AVX2; |
| 5508 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5509 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5510 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5511 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5512 | } |
| 5513 | } |
| 5514 | |
| 5515 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X8, batch_lt_8) { |
| 5516 | TEST_REQUIRES_X86_AVX2; |
| 5517 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5518 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5519 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5520 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5521 | } |
| 5522 | } |
| 5523 | |
| 5524 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X8, batch_gt_8) { |
| 5525 | TEST_REQUIRES_X86_AVX2; |
| 5526 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5527 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5528 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5529 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5530 | } |
| 5531 | } |
| 5532 | |
| 5533 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X8, inplace) { |
| 5534 | TEST_REQUIRES_X86_AVX2; |
| 5535 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5536 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5537 | .batch_size(batch_size) |
| 5538 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5539 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5540 | } |
| 5541 | } |
| 5542 | |
| 5543 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X8, prescale) { |
| 5544 | TEST_REQUIRES_X86_AVX2; |
| 5545 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 5546 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5547 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5548 | .batch_size(batch_size) |
| 5549 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5550 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5551 | } |
| 5552 | } |
| 5553 | } |
| 5554 | |
| 5555 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X8, alpha) { |
| 5556 | TEST_REQUIRES_X86_AVX2; |
| 5557 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 5558 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5559 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5560 | .batch_size(batch_size) |
| 5561 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5562 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5563 | } |
| 5564 | } |
| 5565 | } |
| 5566 | |
| 5567 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X8, beta) { |
| 5568 | TEST_REQUIRES_X86_AVX2; |
| 5569 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 5570 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5571 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5572 | .batch_size(batch_size) |
| 5573 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5574 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5575 | } |
| 5576 | } |
| 5577 | } |
| 5578 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5579 | |
| 5580 | |
| 5581 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5582 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X16, batch_eq_16) { |
| 5583 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5584 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5585 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5586 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5587 | } |
| 5588 | |
| 5589 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X16, batch_div_16) { |
| 5590 | TEST_REQUIRES_X86_AVX2; |
| 5591 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5592 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5593 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5594 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5595 | } |
| 5596 | } |
| 5597 | |
| 5598 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X16, batch_lt_16) { |
| 5599 | TEST_REQUIRES_X86_AVX2; |
| 5600 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5601 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5602 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5603 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5604 | } |
| 5605 | } |
| 5606 | |
| 5607 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X16, batch_gt_16) { |
| 5608 | TEST_REQUIRES_X86_AVX2; |
| 5609 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5610 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5611 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5612 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5613 | } |
| 5614 | } |
| 5615 | |
| 5616 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X16, inplace) { |
| 5617 | TEST_REQUIRES_X86_AVX2; |
| 5618 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5619 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5620 | .batch_size(batch_size) |
| 5621 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5622 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5623 | } |
| 5624 | } |
| 5625 | |
| 5626 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X16, prescale) { |
| 5627 | TEST_REQUIRES_X86_AVX2; |
| 5628 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 5629 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5630 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5631 | .batch_size(batch_size) |
| 5632 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5633 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5634 | } |
| 5635 | } |
| 5636 | } |
| 5637 | |
| 5638 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X16, alpha) { |
| 5639 | TEST_REQUIRES_X86_AVX2; |
| 5640 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 5641 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5642 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5643 | .batch_size(batch_size) |
| 5644 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5645 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5646 | } |
| 5647 | } |
| 5648 | } |
| 5649 | |
| 5650 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X16, beta) { |
| 5651 | TEST_REQUIRES_X86_AVX2; |
| 5652 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 5653 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5654 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5655 | .batch_size(batch_size) |
| 5656 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5657 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5658 | } |
| 5659 | } |
| 5660 | } |
| 5661 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5662 | |
| 5663 | |
| 5664 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5665 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X24, batch_eq_24) { |
| 5666 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5667 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5668 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5669 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5670 | } |
| 5671 | |
| 5672 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X24, batch_div_24) { |
| 5673 | TEST_REQUIRES_X86_AVX2; |
| 5674 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5675 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5676 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5677 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5678 | } |
| 5679 | } |
| 5680 | |
| 5681 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X24, batch_lt_24) { |
| 5682 | TEST_REQUIRES_X86_AVX2; |
| 5683 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5684 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5685 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5686 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5687 | } |
| 5688 | } |
| 5689 | |
| 5690 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X24, batch_gt_24) { |
| 5691 | TEST_REQUIRES_X86_AVX2; |
| 5692 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5693 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5694 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5695 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5696 | } |
| 5697 | } |
| 5698 | |
| 5699 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X24, inplace) { |
| 5700 | TEST_REQUIRES_X86_AVX2; |
| 5701 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5702 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5703 | .batch_size(batch_size) |
| 5704 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5705 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5706 | } |
| 5707 | } |
| 5708 | |
| 5709 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X24, prescale) { |
| 5710 | TEST_REQUIRES_X86_AVX2; |
| 5711 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 5712 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5713 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5714 | .batch_size(batch_size) |
| 5715 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5716 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5717 | } |
| 5718 | } |
| 5719 | } |
| 5720 | |
| 5721 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X24, alpha) { |
| 5722 | TEST_REQUIRES_X86_AVX2; |
| 5723 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 5724 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5725 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5726 | .batch_size(batch_size) |
| 5727 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5728 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5729 | } |
| 5730 | } |
| 5731 | } |
| 5732 | |
| 5733 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X24, beta) { |
| 5734 | TEST_REQUIRES_X86_AVX2; |
| 5735 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 5736 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5737 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5738 | .batch_size(batch_size) |
| 5739 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5740 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5741 | } |
| 5742 | } |
| 5743 | } |
| 5744 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5745 | |
| 5746 | |
| 5747 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5748 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X32, batch_eq_32) { |
| 5749 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5750 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5751 | .batch_size(32) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5752 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5753 | } |
| 5754 | |
| 5755 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X32, batch_div_32) { |
| 5756 | TEST_REQUIRES_X86_AVX2; |
| 5757 | for (size_t batch_size = 64; batch_size < 320; batch_size += 32) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5758 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5759 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5760 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5761 | } |
| 5762 | } |
| 5763 | |
| 5764 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X32, batch_lt_32) { |
| 5765 | TEST_REQUIRES_X86_AVX2; |
| 5766 | for (size_t batch_size = 1; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5767 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5768 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5769 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5770 | } |
| 5771 | } |
| 5772 | |
| 5773 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X32, batch_gt_32) { |
| 5774 | TEST_REQUIRES_X86_AVX2; |
| 5775 | for (size_t batch_size = 33; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5776 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5777 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5778 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5779 | } |
| 5780 | } |
| 5781 | |
| 5782 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X32, inplace) { |
| 5783 | TEST_REQUIRES_X86_AVX2; |
| 5784 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5785 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5786 | .batch_size(batch_size) |
| 5787 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5788 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5789 | } |
| 5790 | } |
| 5791 | |
| 5792 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X32, prescale) { |
| 5793 | TEST_REQUIRES_X86_AVX2; |
| 5794 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 5795 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5796 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5797 | .batch_size(batch_size) |
| 5798 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5799 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5800 | } |
| 5801 | } |
| 5802 | } |
| 5803 | |
| 5804 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X32, alpha) { |
| 5805 | TEST_REQUIRES_X86_AVX2; |
| 5806 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 5807 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5808 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5809 | .batch_size(batch_size) |
| 5810 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5811 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5812 | } |
| 5813 | } |
| 5814 | } |
| 5815 | |
| 5816 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X32, beta) { |
| 5817 | TEST_REQUIRES_X86_AVX2; |
| 5818 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 5819 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5820 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5821 | .batch_size(batch_size) |
| 5822 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5823 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5824 | } |
| 5825 | } |
| 5826 | } |
| 5827 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5828 | |
| 5829 | |
| 5830 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5831 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X40, batch_eq_40) { |
| 5832 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5833 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5834 | .batch_size(40) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5835 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5836 | } |
| 5837 | |
| 5838 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X40, batch_div_40) { |
| 5839 | TEST_REQUIRES_X86_AVX2; |
| 5840 | for (size_t batch_size = 80; batch_size < 400; batch_size += 40) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5841 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5842 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5843 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5844 | } |
| 5845 | } |
| 5846 | |
| 5847 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X40, batch_lt_40) { |
| 5848 | TEST_REQUIRES_X86_AVX2; |
| 5849 | for (size_t batch_size = 1; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5850 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5851 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5852 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5853 | } |
| 5854 | } |
| 5855 | |
| 5856 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X40, batch_gt_40) { |
| 5857 | TEST_REQUIRES_X86_AVX2; |
| 5858 | for (size_t batch_size = 41; batch_size < 80; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5859 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5860 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5861 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5862 | } |
| 5863 | } |
| 5864 | |
| 5865 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X40, inplace) { |
| 5866 | TEST_REQUIRES_X86_AVX2; |
| 5867 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5868 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5869 | .batch_size(batch_size) |
| 5870 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5871 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5872 | } |
| 5873 | } |
| 5874 | |
| 5875 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X40, prescale) { |
| 5876 | TEST_REQUIRES_X86_AVX2; |
| 5877 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 5878 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5879 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5880 | .batch_size(batch_size) |
| 5881 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5882 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5883 | } |
| 5884 | } |
| 5885 | } |
| 5886 | |
| 5887 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X40, alpha) { |
| 5888 | TEST_REQUIRES_X86_AVX2; |
| 5889 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 5890 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5891 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5892 | .batch_size(batch_size) |
| 5893 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5894 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5895 | } |
| 5896 | } |
| 5897 | } |
| 5898 | |
| 5899 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X40, beta) { |
| 5900 | TEST_REQUIRES_X86_AVX2; |
| 5901 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 5902 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5903 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5904 | .batch_size(batch_size) |
| 5905 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5906 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5907 | } |
| 5908 | } |
| 5909 | } |
| 5910 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5911 | |
| 5912 | |
| 5913 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5914 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X48, batch_eq_48) { |
| 5915 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5916 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5917 | .batch_size(48) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5918 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5919 | } |
| 5920 | |
| 5921 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X48, batch_div_48) { |
| 5922 | TEST_REQUIRES_X86_AVX2; |
| 5923 | for (size_t batch_size = 96; batch_size < 480; batch_size += 48) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5924 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5925 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5926 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5927 | } |
| 5928 | } |
| 5929 | |
| 5930 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X48, batch_lt_48) { |
| 5931 | TEST_REQUIRES_X86_AVX2; |
| 5932 | for (size_t batch_size = 1; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5933 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5934 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5935 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5936 | } |
| 5937 | } |
| 5938 | |
| 5939 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X48, batch_gt_48) { |
| 5940 | TEST_REQUIRES_X86_AVX2; |
| 5941 | for (size_t batch_size = 49; batch_size < 96; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5942 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5943 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5944 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5945 | } |
| 5946 | } |
| 5947 | |
| 5948 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X48, inplace) { |
| 5949 | TEST_REQUIRES_X86_AVX2; |
| 5950 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5951 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5952 | .batch_size(batch_size) |
| 5953 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5954 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5955 | } |
| 5956 | } |
| 5957 | |
| 5958 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X48, prescale) { |
| 5959 | TEST_REQUIRES_X86_AVX2; |
| 5960 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 5961 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5962 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5963 | .batch_size(batch_size) |
| 5964 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5965 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5966 | } |
| 5967 | } |
| 5968 | } |
| 5969 | |
| 5970 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X48, alpha) { |
| 5971 | TEST_REQUIRES_X86_AVX2; |
| 5972 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 5973 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5974 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5975 | .batch_size(batch_size) |
| 5976 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5977 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5978 | } |
| 5979 | } |
| 5980 | } |
| 5981 | |
| 5982 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X48, beta) { |
| 5983 | TEST_REQUIRES_X86_AVX2; |
| 5984 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 5985 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5986 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5987 | .batch_size(batch_size) |
| 5988 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 5989 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 5990 | } |
| 5991 | } |
| 5992 | } |
| 5993 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5994 | |
| 5995 | |
| 5996 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 5997 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X56, batch_eq_56) { |
| 5998 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 5999 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6000 | .batch_size(56) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6001 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6002 | } |
| 6003 | |
| 6004 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X56, batch_div_56) { |
| 6005 | TEST_REQUIRES_X86_AVX2; |
| 6006 | for (size_t batch_size = 112; batch_size < 560; batch_size += 56) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6007 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6008 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6009 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6010 | } |
| 6011 | } |
| 6012 | |
| 6013 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X56, batch_lt_56) { |
| 6014 | TEST_REQUIRES_X86_AVX2; |
| 6015 | for (size_t batch_size = 1; batch_size < 56; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6016 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6017 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6018 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6019 | } |
| 6020 | } |
| 6021 | |
| 6022 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X56, batch_gt_56) { |
| 6023 | TEST_REQUIRES_X86_AVX2; |
| 6024 | for (size_t batch_size = 57; batch_size < 112; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6025 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6026 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6027 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6028 | } |
| 6029 | } |
| 6030 | |
| 6031 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X56, inplace) { |
| 6032 | TEST_REQUIRES_X86_AVX2; |
| 6033 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6034 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6035 | .batch_size(batch_size) |
| 6036 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6037 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6038 | } |
| 6039 | } |
| 6040 | |
| 6041 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X56, prescale) { |
| 6042 | TEST_REQUIRES_X86_AVX2; |
| 6043 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 6044 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6045 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6046 | .batch_size(batch_size) |
| 6047 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6048 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6049 | } |
| 6050 | } |
| 6051 | } |
| 6052 | |
| 6053 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X56, alpha) { |
| 6054 | TEST_REQUIRES_X86_AVX2; |
| 6055 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 6056 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6057 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6058 | .batch_size(batch_size) |
| 6059 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6060 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6061 | } |
| 6062 | } |
| 6063 | } |
| 6064 | |
| 6065 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X56, beta) { |
| 6066 | TEST_REQUIRES_X86_AVX2; |
| 6067 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 6068 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6069 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6070 | .batch_size(batch_size) |
| 6071 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6072 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6073 | } |
| 6074 | } |
| 6075 | } |
| 6076 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6077 | |
| 6078 | |
| 6079 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6080 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X64, batch_eq_64) { |
| 6081 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6082 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6083 | .batch_size(64) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6084 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6085 | } |
| 6086 | |
| 6087 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X64, batch_div_64) { |
| 6088 | TEST_REQUIRES_X86_AVX2; |
| 6089 | for (size_t batch_size = 128; batch_size < 640; batch_size += 64) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6090 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6091 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6092 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6093 | } |
| 6094 | } |
| 6095 | |
| 6096 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X64, batch_lt_64) { |
| 6097 | TEST_REQUIRES_X86_AVX2; |
| 6098 | for (size_t batch_size = 1; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6099 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6100 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6101 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6102 | } |
| 6103 | } |
| 6104 | |
| 6105 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X64, batch_gt_64) { |
| 6106 | TEST_REQUIRES_X86_AVX2; |
| 6107 | for (size_t batch_size = 65; batch_size < 128; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6108 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6109 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6110 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6111 | } |
| 6112 | } |
| 6113 | |
| 6114 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X64, inplace) { |
| 6115 | TEST_REQUIRES_X86_AVX2; |
| 6116 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6117 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6118 | .batch_size(batch_size) |
| 6119 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6120 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6121 | } |
| 6122 | } |
| 6123 | |
| 6124 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X64, prescale) { |
| 6125 | TEST_REQUIRES_X86_AVX2; |
| 6126 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 6127 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6128 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6129 | .batch_size(batch_size) |
| 6130 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6131 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6132 | } |
| 6133 | } |
| 6134 | } |
| 6135 | |
| 6136 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X64, alpha) { |
| 6137 | TEST_REQUIRES_X86_AVX2; |
| 6138 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 6139 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6140 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6141 | .batch_size(batch_size) |
| 6142 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6143 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6144 | } |
| 6145 | } |
| 6146 | } |
| 6147 | |
| 6148 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X64, beta) { |
| 6149 | TEST_REQUIRES_X86_AVX2; |
| 6150 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 6151 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6152 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6153 | .batch_size(batch_size) |
| 6154 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6155 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6156 | } |
| 6157 | } |
| 6158 | } |
| 6159 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6160 | |
| 6161 | |
| 6162 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6163 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X72, batch_eq_72) { |
| 6164 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6165 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6166 | .batch_size(72) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6167 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6168 | } |
| 6169 | |
| 6170 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X72, batch_div_72) { |
| 6171 | TEST_REQUIRES_X86_AVX2; |
| 6172 | for (size_t batch_size = 144; batch_size < 720; batch_size += 72) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6173 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6174 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6175 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6176 | } |
| 6177 | } |
| 6178 | |
| 6179 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X72, batch_lt_72) { |
| 6180 | TEST_REQUIRES_X86_AVX2; |
| 6181 | for (size_t batch_size = 1; batch_size < 72; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6182 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6183 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6184 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6185 | } |
| 6186 | } |
| 6187 | |
| 6188 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X72, batch_gt_72) { |
| 6189 | TEST_REQUIRES_X86_AVX2; |
| 6190 | for (size_t batch_size = 73; batch_size < 144; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6191 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6192 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6193 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6194 | } |
| 6195 | } |
| 6196 | |
| 6197 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X72, inplace) { |
| 6198 | TEST_REQUIRES_X86_AVX2; |
| 6199 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6200 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6201 | .batch_size(batch_size) |
| 6202 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6203 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6204 | } |
| 6205 | } |
| 6206 | |
| 6207 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X72, prescale) { |
| 6208 | TEST_REQUIRES_X86_AVX2; |
| 6209 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 6210 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6211 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6212 | .batch_size(batch_size) |
| 6213 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6214 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6215 | } |
| 6216 | } |
| 6217 | } |
| 6218 | |
| 6219 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X72, alpha) { |
| 6220 | TEST_REQUIRES_X86_AVX2; |
| 6221 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 6222 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6223 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6224 | .batch_size(batch_size) |
| 6225 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6226 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6227 | } |
| 6228 | } |
| 6229 | } |
| 6230 | |
| 6231 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X72, beta) { |
| 6232 | TEST_REQUIRES_X86_AVX2; |
| 6233 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 6234 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6235 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6236 | .batch_size(batch_size) |
| 6237 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6238 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6239 | } |
| 6240 | } |
| 6241 | } |
| 6242 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6243 | |
| 6244 | |
| 6245 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6246 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X80, batch_eq_80) { |
| 6247 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6248 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6249 | .batch_size(80) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6250 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6251 | } |
| 6252 | |
| 6253 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X80, batch_div_80) { |
| 6254 | TEST_REQUIRES_X86_AVX2; |
| 6255 | for (size_t batch_size = 160; batch_size < 800; batch_size += 80) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6256 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6257 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6258 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6259 | } |
| 6260 | } |
| 6261 | |
| 6262 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X80, batch_lt_80) { |
| 6263 | TEST_REQUIRES_X86_AVX2; |
| 6264 | for (size_t batch_size = 1; batch_size < 80; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6265 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6266 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6267 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6268 | } |
| 6269 | } |
| 6270 | |
| 6271 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X80, batch_gt_80) { |
| 6272 | TEST_REQUIRES_X86_AVX2; |
| 6273 | for (size_t batch_size = 81; batch_size < 160; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6274 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6275 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6276 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6277 | } |
| 6278 | } |
| 6279 | |
| 6280 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X80, inplace) { |
| 6281 | TEST_REQUIRES_X86_AVX2; |
| 6282 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6283 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6284 | .batch_size(batch_size) |
| 6285 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6286 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6287 | } |
| 6288 | } |
| 6289 | |
| 6290 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X80, prescale) { |
| 6291 | TEST_REQUIRES_X86_AVX2; |
| 6292 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 6293 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6294 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6295 | .batch_size(batch_size) |
| 6296 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6297 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6298 | } |
| 6299 | } |
| 6300 | } |
| 6301 | |
| 6302 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X80, alpha) { |
| 6303 | TEST_REQUIRES_X86_AVX2; |
| 6304 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 6305 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6306 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6307 | .batch_size(batch_size) |
| 6308 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6309 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6310 | } |
| 6311 | } |
| 6312 | } |
| 6313 | |
| 6314 | TEST(F32_VELU__AVX2_RR1_LUT4_P4_PERM_X80, beta) { |
| 6315 | TEST_REQUIRES_X86_AVX2; |
| 6316 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 6317 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6318 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6319 | .batch_size(batch_size) |
| 6320 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6321 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut4_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6322 | } |
| 6323 | } |
| 6324 | } |
| 6325 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6326 | |
| 6327 | |
| 6328 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6329 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X8, batch_eq_8) { |
| 6330 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6331 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6332 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6333 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6334 | } |
| 6335 | |
| 6336 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X8, batch_div_8) { |
| 6337 | TEST_REQUIRES_X86_AVX2; |
| 6338 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6339 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6340 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6341 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6342 | } |
| 6343 | } |
| 6344 | |
| 6345 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X8, batch_lt_8) { |
| 6346 | TEST_REQUIRES_X86_AVX2; |
| 6347 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6348 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6349 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6350 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6351 | } |
| 6352 | } |
| 6353 | |
| 6354 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X8, batch_gt_8) { |
| 6355 | TEST_REQUIRES_X86_AVX2; |
| 6356 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6357 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6358 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6359 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6360 | } |
| 6361 | } |
| 6362 | |
| 6363 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X8, inplace) { |
| 6364 | TEST_REQUIRES_X86_AVX2; |
| 6365 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6366 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6367 | .batch_size(batch_size) |
| 6368 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6369 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6370 | } |
| 6371 | } |
| 6372 | |
| 6373 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X8, prescale) { |
| 6374 | TEST_REQUIRES_X86_AVX2; |
| 6375 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 6376 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6377 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6378 | .batch_size(batch_size) |
| 6379 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6380 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6381 | } |
| 6382 | } |
| 6383 | } |
| 6384 | |
| 6385 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X8, alpha) { |
| 6386 | TEST_REQUIRES_X86_AVX2; |
| 6387 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 6388 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6389 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6390 | .batch_size(batch_size) |
| 6391 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6392 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6393 | } |
| 6394 | } |
| 6395 | } |
| 6396 | |
| 6397 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X8, beta) { |
| 6398 | TEST_REQUIRES_X86_AVX2; |
| 6399 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 6400 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6401 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6402 | .batch_size(batch_size) |
| 6403 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6404 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x8, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6405 | } |
| 6406 | } |
| 6407 | } |
| 6408 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6409 | |
| 6410 | |
| 6411 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6412 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X16, batch_eq_16) { |
| 6413 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6414 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6415 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6416 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6417 | } |
| 6418 | |
| 6419 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X16, batch_div_16) { |
| 6420 | TEST_REQUIRES_X86_AVX2; |
| 6421 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6422 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6423 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6424 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6425 | } |
| 6426 | } |
| 6427 | |
| 6428 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X16, batch_lt_16) { |
| 6429 | TEST_REQUIRES_X86_AVX2; |
| 6430 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6431 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6432 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6433 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6434 | } |
| 6435 | } |
| 6436 | |
| 6437 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X16, batch_gt_16) { |
| 6438 | TEST_REQUIRES_X86_AVX2; |
| 6439 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6440 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6441 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6442 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6443 | } |
| 6444 | } |
| 6445 | |
| 6446 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X16, inplace) { |
| 6447 | TEST_REQUIRES_X86_AVX2; |
| 6448 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6449 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6450 | .batch_size(batch_size) |
| 6451 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6452 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6453 | } |
| 6454 | } |
| 6455 | |
| 6456 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X16, prescale) { |
| 6457 | TEST_REQUIRES_X86_AVX2; |
| 6458 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 6459 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6460 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6461 | .batch_size(batch_size) |
| 6462 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6463 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6464 | } |
| 6465 | } |
| 6466 | } |
| 6467 | |
| 6468 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X16, alpha) { |
| 6469 | TEST_REQUIRES_X86_AVX2; |
| 6470 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 6471 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6472 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6473 | .batch_size(batch_size) |
| 6474 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6475 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6476 | } |
| 6477 | } |
| 6478 | } |
| 6479 | |
| 6480 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X16, beta) { |
| 6481 | TEST_REQUIRES_X86_AVX2; |
| 6482 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 6483 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6484 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6485 | .batch_size(batch_size) |
| 6486 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6487 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x16, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6488 | } |
| 6489 | } |
| 6490 | } |
| 6491 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6492 | |
| 6493 | |
| 6494 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6495 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X24, batch_eq_24) { |
| 6496 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6497 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6498 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6499 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6500 | } |
| 6501 | |
| 6502 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X24, batch_div_24) { |
| 6503 | TEST_REQUIRES_X86_AVX2; |
| 6504 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6505 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6506 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6507 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6508 | } |
| 6509 | } |
| 6510 | |
| 6511 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X24, batch_lt_24) { |
| 6512 | TEST_REQUIRES_X86_AVX2; |
| 6513 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6514 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6515 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6516 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6517 | } |
| 6518 | } |
| 6519 | |
| 6520 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X24, batch_gt_24) { |
| 6521 | TEST_REQUIRES_X86_AVX2; |
| 6522 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6523 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6524 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6525 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6526 | } |
| 6527 | } |
| 6528 | |
| 6529 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X24, inplace) { |
| 6530 | TEST_REQUIRES_X86_AVX2; |
| 6531 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6532 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6533 | .batch_size(batch_size) |
| 6534 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6535 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6536 | } |
| 6537 | } |
| 6538 | |
| 6539 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X24, prescale) { |
| 6540 | TEST_REQUIRES_X86_AVX2; |
| 6541 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 6542 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6543 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6544 | .batch_size(batch_size) |
| 6545 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6546 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6547 | } |
| 6548 | } |
| 6549 | } |
| 6550 | |
| 6551 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X24, alpha) { |
| 6552 | TEST_REQUIRES_X86_AVX2; |
| 6553 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 6554 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6555 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6556 | .batch_size(batch_size) |
| 6557 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6558 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6559 | } |
| 6560 | } |
| 6561 | } |
| 6562 | |
| 6563 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X24, beta) { |
| 6564 | TEST_REQUIRES_X86_AVX2; |
| 6565 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 6566 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6567 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6568 | .batch_size(batch_size) |
| 6569 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6570 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x24, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6571 | } |
| 6572 | } |
| 6573 | } |
| 6574 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6575 | |
| 6576 | |
| 6577 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6578 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X32, batch_eq_32) { |
| 6579 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6580 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6581 | .batch_size(32) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6582 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6583 | } |
| 6584 | |
| 6585 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X32, batch_div_32) { |
| 6586 | TEST_REQUIRES_X86_AVX2; |
| 6587 | for (size_t batch_size = 64; batch_size < 320; batch_size += 32) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6588 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6589 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6590 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6591 | } |
| 6592 | } |
| 6593 | |
| 6594 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X32, batch_lt_32) { |
| 6595 | TEST_REQUIRES_X86_AVX2; |
| 6596 | for (size_t batch_size = 1; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6597 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6598 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6599 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6600 | } |
| 6601 | } |
| 6602 | |
| 6603 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X32, batch_gt_32) { |
| 6604 | TEST_REQUIRES_X86_AVX2; |
| 6605 | for (size_t batch_size = 33; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6606 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6607 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6608 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6609 | } |
| 6610 | } |
| 6611 | |
| 6612 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X32, inplace) { |
| 6613 | TEST_REQUIRES_X86_AVX2; |
| 6614 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6615 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6616 | .batch_size(batch_size) |
| 6617 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6618 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6619 | } |
| 6620 | } |
| 6621 | |
| 6622 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X32, prescale) { |
| 6623 | TEST_REQUIRES_X86_AVX2; |
| 6624 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 6625 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6626 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6627 | .batch_size(batch_size) |
| 6628 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6629 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6630 | } |
| 6631 | } |
| 6632 | } |
| 6633 | |
| 6634 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X32, alpha) { |
| 6635 | TEST_REQUIRES_X86_AVX2; |
| 6636 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 6637 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6638 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6639 | .batch_size(batch_size) |
| 6640 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6641 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6642 | } |
| 6643 | } |
| 6644 | } |
| 6645 | |
| 6646 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X32, beta) { |
| 6647 | TEST_REQUIRES_X86_AVX2; |
| 6648 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 6649 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6650 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6651 | .batch_size(batch_size) |
| 6652 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6653 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x32, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6654 | } |
| 6655 | } |
| 6656 | } |
| 6657 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6658 | |
| 6659 | |
| 6660 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6661 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X40, batch_eq_40) { |
| 6662 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6663 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6664 | .batch_size(40) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6665 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6666 | } |
| 6667 | |
| 6668 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X40, batch_div_40) { |
| 6669 | TEST_REQUIRES_X86_AVX2; |
| 6670 | for (size_t batch_size = 80; batch_size < 400; batch_size += 40) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6671 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6672 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6673 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6674 | } |
| 6675 | } |
| 6676 | |
| 6677 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X40, batch_lt_40) { |
| 6678 | TEST_REQUIRES_X86_AVX2; |
| 6679 | for (size_t batch_size = 1; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6680 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6681 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6682 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6683 | } |
| 6684 | } |
| 6685 | |
| 6686 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X40, batch_gt_40) { |
| 6687 | TEST_REQUIRES_X86_AVX2; |
| 6688 | for (size_t batch_size = 41; batch_size < 80; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6689 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6690 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6691 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6692 | } |
| 6693 | } |
| 6694 | |
| 6695 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X40, inplace) { |
| 6696 | TEST_REQUIRES_X86_AVX2; |
| 6697 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6698 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6699 | .batch_size(batch_size) |
| 6700 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6701 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6702 | } |
| 6703 | } |
| 6704 | |
| 6705 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X40, prescale) { |
| 6706 | TEST_REQUIRES_X86_AVX2; |
| 6707 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 6708 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6709 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6710 | .batch_size(batch_size) |
| 6711 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6712 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6713 | } |
| 6714 | } |
| 6715 | } |
| 6716 | |
| 6717 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X40, alpha) { |
| 6718 | TEST_REQUIRES_X86_AVX2; |
| 6719 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 6720 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6721 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6722 | .batch_size(batch_size) |
| 6723 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6724 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6725 | } |
| 6726 | } |
| 6727 | } |
| 6728 | |
| 6729 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X40, beta) { |
| 6730 | TEST_REQUIRES_X86_AVX2; |
| 6731 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 6732 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6733 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6734 | .batch_size(batch_size) |
| 6735 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6736 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x40, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6737 | } |
| 6738 | } |
| 6739 | } |
| 6740 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6741 | |
| 6742 | |
| 6743 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6744 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X48, batch_eq_48) { |
| 6745 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6746 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6747 | .batch_size(48) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6748 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6749 | } |
| 6750 | |
| 6751 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X48, batch_div_48) { |
| 6752 | TEST_REQUIRES_X86_AVX2; |
| 6753 | for (size_t batch_size = 96; batch_size < 480; batch_size += 48) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6754 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6755 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6756 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6757 | } |
| 6758 | } |
| 6759 | |
| 6760 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X48, batch_lt_48) { |
| 6761 | TEST_REQUIRES_X86_AVX2; |
| 6762 | for (size_t batch_size = 1; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6763 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6764 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6765 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6766 | } |
| 6767 | } |
| 6768 | |
| 6769 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X48, batch_gt_48) { |
| 6770 | TEST_REQUIRES_X86_AVX2; |
| 6771 | for (size_t batch_size = 49; batch_size < 96; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6772 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6773 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6774 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6775 | } |
| 6776 | } |
| 6777 | |
| 6778 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X48, inplace) { |
| 6779 | TEST_REQUIRES_X86_AVX2; |
| 6780 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6781 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6782 | .batch_size(batch_size) |
| 6783 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6784 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6785 | } |
| 6786 | } |
| 6787 | |
| 6788 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X48, prescale) { |
| 6789 | TEST_REQUIRES_X86_AVX2; |
| 6790 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 6791 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6792 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6793 | .batch_size(batch_size) |
| 6794 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6795 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6796 | } |
| 6797 | } |
| 6798 | } |
| 6799 | |
| 6800 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X48, alpha) { |
| 6801 | TEST_REQUIRES_X86_AVX2; |
| 6802 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 6803 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6804 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6805 | .batch_size(batch_size) |
| 6806 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6807 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6808 | } |
| 6809 | } |
| 6810 | } |
| 6811 | |
| 6812 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X48, beta) { |
| 6813 | TEST_REQUIRES_X86_AVX2; |
| 6814 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 6815 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6816 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6817 | .batch_size(batch_size) |
| 6818 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6819 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x48, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6820 | } |
| 6821 | } |
| 6822 | } |
| 6823 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6824 | |
| 6825 | |
| 6826 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6827 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X56, batch_eq_56) { |
| 6828 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6829 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6830 | .batch_size(56) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6831 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6832 | } |
| 6833 | |
| 6834 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X56, batch_div_56) { |
| 6835 | TEST_REQUIRES_X86_AVX2; |
| 6836 | for (size_t batch_size = 112; batch_size < 560; batch_size += 56) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6837 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6838 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6839 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6840 | } |
| 6841 | } |
| 6842 | |
| 6843 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X56, batch_lt_56) { |
| 6844 | TEST_REQUIRES_X86_AVX2; |
| 6845 | for (size_t batch_size = 1; batch_size < 56; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6846 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6847 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6848 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6849 | } |
| 6850 | } |
| 6851 | |
| 6852 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X56, batch_gt_56) { |
| 6853 | TEST_REQUIRES_X86_AVX2; |
| 6854 | for (size_t batch_size = 57; batch_size < 112; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6855 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6856 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6857 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6858 | } |
| 6859 | } |
| 6860 | |
| 6861 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X56, inplace) { |
| 6862 | TEST_REQUIRES_X86_AVX2; |
| 6863 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6864 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6865 | .batch_size(batch_size) |
| 6866 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6867 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6868 | } |
| 6869 | } |
| 6870 | |
| 6871 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X56, prescale) { |
| 6872 | TEST_REQUIRES_X86_AVX2; |
| 6873 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 6874 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6875 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6876 | .batch_size(batch_size) |
| 6877 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6878 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6879 | } |
| 6880 | } |
| 6881 | } |
| 6882 | |
| 6883 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X56, alpha) { |
| 6884 | TEST_REQUIRES_X86_AVX2; |
| 6885 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 6886 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6887 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6888 | .batch_size(batch_size) |
| 6889 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6890 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6891 | } |
| 6892 | } |
| 6893 | } |
| 6894 | |
| 6895 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X56, beta) { |
| 6896 | TEST_REQUIRES_X86_AVX2; |
| 6897 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 6898 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6899 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6900 | .batch_size(batch_size) |
| 6901 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6902 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x56, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6903 | } |
| 6904 | } |
| 6905 | } |
| 6906 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6907 | |
| 6908 | |
| 6909 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6910 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X64, batch_eq_64) { |
| 6911 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6912 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6913 | .batch_size(64) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6914 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6915 | } |
| 6916 | |
| 6917 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X64, batch_div_64) { |
| 6918 | TEST_REQUIRES_X86_AVX2; |
| 6919 | for (size_t batch_size = 128; batch_size < 640; batch_size += 64) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6920 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6921 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6922 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6923 | } |
| 6924 | } |
| 6925 | |
| 6926 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X64, batch_lt_64) { |
| 6927 | TEST_REQUIRES_X86_AVX2; |
| 6928 | for (size_t batch_size = 1; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6929 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6930 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6931 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6932 | } |
| 6933 | } |
| 6934 | |
| 6935 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X64, batch_gt_64) { |
| 6936 | TEST_REQUIRES_X86_AVX2; |
| 6937 | for (size_t batch_size = 65; batch_size < 128; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6938 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6939 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6940 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6941 | } |
| 6942 | } |
| 6943 | |
| 6944 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X64, inplace) { |
| 6945 | TEST_REQUIRES_X86_AVX2; |
| 6946 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6947 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6948 | .batch_size(batch_size) |
| 6949 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6950 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6951 | } |
| 6952 | } |
| 6953 | |
| 6954 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X64, prescale) { |
| 6955 | TEST_REQUIRES_X86_AVX2; |
| 6956 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 6957 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6958 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6959 | .batch_size(batch_size) |
| 6960 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6961 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6962 | } |
| 6963 | } |
| 6964 | } |
| 6965 | |
| 6966 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X64, alpha) { |
| 6967 | TEST_REQUIRES_X86_AVX2; |
| 6968 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 6969 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6970 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6971 | .batch_size(batch_size) |
| 6972 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6973 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6974 | } |
| 6975 | } |
| 6976 | } |
| 6977 | |
| 6978 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X64, beta) { |
| 6979 | TEST_REQUIRES_X86_AVX2; |
| 6980 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 6981 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6982 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6983 | .batch_size(batch_size) |
| 6984 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6985 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x64, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6986 | } |
| 6987 | } |
| 6988 | } |
| 6989 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6990 | |
| 6991 | |
| 6992 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 6993 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X72, batch_eq_72) { |
| 6994 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 6995 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6996 | .batch_size(72) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 6997 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 6998 | } |
| 6999 | |
| 7000 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X72, batch_div_72) { |
| 7001 | TEST_REQUIRES_X86_AVX2; |
| 7002 | for (size_t batch_size = 144; batch_size < 720; batch_size += 72) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7003 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7004 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7005 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7006 | } |
| 7007 | } |
| 7008 | |
| 7009 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X72, batch_lt_72) { |
| 7010 | TEST_REQUIRES_X86_AVX2; |
| 7011 | for (size_t batch_size = 1; batch_size < 72; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7012 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7013 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7014 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7015 | } |
| 7016 | } |
| 7017 | |
| 7018 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X72, batch_gt_72) { |
| 7019 | TEST_REQUIRES_X86_AVX2; |
| 7020 | for (size_t batch_size = 73; batch_size < 144; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7021 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7022 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7023 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7024 | } |
| 7025 | } |
| 7026 | |
| 7027 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X72, inplace) { |
| 7028 | TEST_REQUIRES_X86_AVX2; |
| 7029 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7030 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7031 | .batch_size(batch_size) |
| 7032 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7033 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7034 | } |
| 7035 | } |
| 7036 | |
| 7037 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X72, prescale) { |
| 7038 | TEST_REQUIRES_X86_AVX2; |
| 7039 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 7040 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7041 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7042 | .batch_size(batch_size) |
| 7043 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7044 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7045 | } |
| 7046 | } |
| 7047 | } |
| 7048 | |
| 7049 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X72, alpha) { |
| 7050 | TEST_REQUIRES_X86_AVX2; |
| 7051 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 7052 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7053 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7054 | .batch_size(batch_size) |
| 7055 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7056 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7057 | } |
| 7058 | } |
| 7059 | } |
| 7060 | |
| 7061 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X72, beta) { |
| 7062 | TEST_REQUIRES_X86_AVX2; |
| 7063 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 7064 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7065 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7066 | .batch_size(batch_size) |
| 7067 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7068 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x72, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7069 | } |
| 7070 | } |
| 7071 | } |
| 7072 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7073 | |
| 7074 | |
| 7075 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7076 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X80, batch_eq_80) { |
| 7077 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7078 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7079 | .batch_size(80) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7080 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7081 | } |
| 7082 | |
| 7083 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X80, batch_div_80) { |
| 7084 | TEST_REQUIRES_X86_AVX2; |
| 7085 | for (size_t batch_size = 160; batch_size < 800; batch_size += 80) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7086 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7087 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7088 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7089 | } |
| 7090 | } |
| 7091 | |
| 7092 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X80, batch_lt_80) { |
| 7093 | TEST_REQUIRES_X86_AVX2; |
| 7094 | for (size_t batch_size = 1; batch_size < 80; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7095 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7096 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7097 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7098 | } |
| 7099 | } |
| 7100 | |
| 7101 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X80, batch_gt_80) { |
| 7102 | TEST_REQUIRES_X86_AVX2; |
| 7103 | for (size_t batch_size = 81; batch_size < 160; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7104 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7105 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7106 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7107 | } |
| 7108 | } |
| 7109 | |
| 7110 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X80, inplace) { |
| 7111 | TEST_REQUIRES_X86_AVX2; |
| 7112 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7113 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7114 | .batch_size(batch_size) |
| 7115 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7116 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7117 | } |
| 7118 | } |
| 7119 | |
| 7120 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X80, prescale) { |
| 7121 | TEST_REQUIRES_X86_AVX2; |
| 7122 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 7123 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7124 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7125 | .batch_size(batch_size) |
| 7126 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7127 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7128 | } |
| 7129 | } |
| 7130 | } |
| 7131 | |
| 7132 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X80, alpha) { |
| 7133 | TEST_REQUIRES_X86_AVX2; |
| 7134 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 7135 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7136 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7137 | .batch_size(batch_size) |
| 7138 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7139 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7140 | } |
| 7141 | } |
| 7142 | } |
| 7143 | |
| 7144 | TEST(F32_VELU__AVX2_RR1_LUT8_P4_PERM_X80, beta) { |
| 7145 | TEST_REQUIRES_X86_AVX2; |
| 7146 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 7147 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7148 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7149 | .batch_size(batch_size) |
| 7150 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7151 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x80, xnn_init_f32_elu_avx2_rr1_lut8_p4_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7152 | } |
| 7153 | } |
| 7154 | } |
| 7155 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7156 | |
| 7157 | |
| 7158 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7159 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X8, batch_eq_8) { |
| 7160 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7161 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7162 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7163 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x8, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7164 | } |
| 7165 | |
| 7166 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X8, batch_div_8) { |
| 7167 | TEST_REQUIRES_X86_AVX2; |
| 7168 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7169 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7170 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7171 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x8, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7172 | } |
| 7173 | } |
| 7174 | |
| 7175 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X8, batch_lt_8) { |
| 7176 | TEST_REQUIRES_X86_AVX2; |
| 7177 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7178 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7179 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7180 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x8, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7181 | } |
| 7182 | } |
| 7183 | |
| 7184 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X8, batch_gt_8) { |
| 7185 | TEST_REQUIRES_X86_AVX2; |
| 7186 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7187 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7188 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7189 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x8, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7190 | } |
| 7191 | } |
| 7192 | |
| 7193 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X8, inplace) { |
| 7194 | TEST_REQUIRES_X86_AVX2; |
| 7195 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7196 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7197 | .batch_size(batch_size) |
| 7198 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7199 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x8, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7200 | } |
| 7201 | } |
| 7202 | |
| 7203 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X8, prescale) { |
| 7204 | TEST_REQUIRES_X86_AVX2; |
| 7205 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 7206 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7207 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7208 | .batch_size(batch_size) |
| 7209 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7210 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x8, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7211 | } |
| 7212 | } |
| 7213 | } |
| 7214 | |
| 7215 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X8, alpha) { |
| 7216 | TEST_REQUIRES_X86_AVX2; |
| 7217 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 7218 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7219 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7220 | .batch_size(batch_size) |
| 7221 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7222 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x8, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7223 | } |
| 7224 | } |
| 7225 | } |
| 7226 | |
| 7227 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X8, beta) { |
| 7228 | TEST_REQUIRES_X86_AVX2; |
| 7229 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 7230 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7231 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7232 | .batch_size(batch_size) |
| 7233 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7234 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x8, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7235 | } |
| 7236 | } |
| 7237 | } |
| 7238 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7239 | |
| 7240 | |
| 7241 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7242 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X16, batch_eq_16) { |
| 7243 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7244 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7245 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7246 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x16, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7247 | } |
| 7248 | |
| 7249 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X16, batch_div_16) { |
| 7250 | TEST_REQUIRES_X86_AVX2; |
| 7251 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7252 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7253 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7254 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x16, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7255 | } |
| 7256 | } |
| 7257 | |
| 7258 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X16, batch_lt_16) { |
| 7259 | TEST_REQUIRES_X86_AVX2; |
| 7260 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7261 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7262 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7263 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x16, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7264 | } |
| 7265 | } |
| 7266 | |
| 7267 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X16, batch_gt_16) { |
| 7268 | TEST_REQUIRES_X86_AVX2; |
| 7269 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7270 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7271 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7272 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x16, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7273 | } |
| 7274 | } |
| 7275 | |
| 7276 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X16, inplace) { |
| 7277 | TEST_REQUIRES_X86_AVX2; |
| 7278 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7279 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7280 | .batch_size(batch_size) |
| 7281 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7282 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x16, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7283 | } |
| 7284 | } |
| 7285 | |
| 7286 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X16, prescale) { |
| 7287 | TEST_REQUIRES_X86_AVX2; |
| 7288 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 7289 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7290 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7291 | .batch_size(batch_size) |
| 7292 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7293 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x16, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7294 | } |
| 7295 | } |
| 7296 | } |
| 7297 | |
| 7298 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X16, alpha) { |
| 7299 | TEST_REQUIRES_X86_AVX2; |
| 7300 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 7301 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7302 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7303 | .batch_size(batch_size) |
| 7304 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7305 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x16, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7306 | } |
| 7307 | } |
| 7308 | } |
| 7309 | |
| 7310 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X16, beta) { |
| 7311 | TEST_REQUIRES_X86_AVX2; |
| 7312 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 7313 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7314 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7315 | .batch_size(batch_size) |
| 7316 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7317 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x16, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7318 | } |
| 7319 | } |
| 7320 | } |
| 7321 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7322 | |
| 7323 | |
| 7324 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7325 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X24, batch_eq_24) { |
| 7326 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7327 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7328 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7329 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x24, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7330 | } |
| 7331 | |
| 7332 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X24, batch_div_24) { |
| 7333 | TEST_REQUIRES_X86_AVX2; |
| 7334 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7335 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7336 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7337 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x24, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7338 | } |
| 7339 | } |
| 7340 | |
| 7341 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X24, batch_lt_24) { |
| 7342 | TEST_REQUIRES_X86_AVX2; |
| 7343 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7344 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7345 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7346 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x24, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7347 | } |
| 7348 | } |
| 7349 | |
| 7350 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X24, batch_gt_24) { |
| 7351 | TEST_REQUIRES_X86_AVX2; |
| 7352 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7353 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7354 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7355 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x24, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7356 | } |
| 7357 | } |
| 7358 | |
| 7359 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X24, inplace) { |
| 7360 | TEST_REQUIRES_X86_AVX2; |
| 7361 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7362 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7363 | .batch_size(batch_size) |
| 7364 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7365 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x24, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7366 | } |
| 7367 | } |
| 7368 | |
| 7369 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X24, prescale) { |
| 7370 | TEST_REQUIRES_X86_AVX2; |
| 7371 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 7372 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7373 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7374 | .batch_size(batch_size) |
| 7375 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7376 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x24, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7377 | } |
| 7378 | } |
| 7379 | } |
| 7380 | |
| 7381 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X24, alpha) { |
| 7382 | TEST_REQUIRES_X86_AVX2; |
| 7383 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 7384 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7385 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7386 | .batch_size(batch_size) |
| 7387 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7388 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x24, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7389 | } |
| 7390 | } |
| 7391 | } |
| 7392 | |
| 7393 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X24, beta) { |
| 7394 | TEST_REQUIRES_X86_AVX2; |
| 7395 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 7396 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7397 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7398 | .batch_size(batch_size) |
| 7399 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7400 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x24, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7401 | } |
| 7402 | } |
| 7403 | } |
| 7404 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7405 | |
| 7406 | |
| 7407 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7408 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X32, batch_eq_32) { |
| 7409 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7410 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7411 | .batch_size(32) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7412 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x32, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7413 | } |
| 7414 | |
| 7415 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X32, batch_div_32) { |
| 7416 | TEST_REQUIRES_X86_AVX2; |
| 7417 | for (size_t batch_size = 64; batch_size < 320; batch_size += 32) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7418 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7419 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7420 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x32, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7421 | } |
| 7422 | } |
| 7423 | |
| 7424 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X32, batch_lt_32) { |
| 7425 | TEST_REQUIRES_X86_AVX2; |
| 7426 | for (size_t batch_size = 1; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7427 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7428 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7429 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x32, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7430 | } |
| 7431 | } |
| 7432 | |
| 7433 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X32, batch_gt_32) { |
| 7434 | TEST_REQUIRES_X86_AVX2; |
| 7435 | for (size_t batch_size = 33; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7436 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7437 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7438 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x32, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7439 | } |
| 7440 | } |
| 7441 | |
| 7442 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X32, inplace) { |
| 7443 | TEST_REQUIRES_X86_AVX2; |
| 7444 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7445 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7446 | .batch_size(batch_size) |
| 7447 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7448 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x32, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7449 | } |
| 7450 | } |
| 7451 | |
| 7452 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X32, prescale) { |
| 7453 | TEST_REQUIRES_X86_AVX2; |
| 7454 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 7455 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7456 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7457 | .batch_size(batch_size) |
| 7458 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7459 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x32, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7460 | } |
| 7461 | } |
| 7462 | } |
| 7463 | |
| 7464 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X32, alpha) { |
| 7465 | TEST_REQUIRES_X86_AVX2; |
| 7466 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 7467 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7468 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7469 | .batch_size(batch_size) |
| 7470 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7471 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x32, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7472 | } |
| 7473 | } |
| 7474 | } |
| 7475 | |
| 7476 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X32, beta) { |
| 7477 | TEST_REQUIRES_X86_AVX2; |
| 7478 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 7479 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7480 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7481 | .batch_size(batch_size) |
| 7482 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7483 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x32, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7484 | } |
| 7485 | } |
| 7486 | } |
| 7487 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7488 | |
| 7489 | |
| 7490 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7491 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X40, batch_eq_40) { |
| 7492 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7493 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7494 | .batch_size(40) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7495 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x40, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7496 | } |
| 7497 | |
| 7498 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X40, batch_div_40) { |
| 7499 | TEST_REQUIRES_X86_AVX2; |
| 7500 | for (size_t batch_size = 80; batch_size < 400; batch_size += 40) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7501 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7502 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7503 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x40, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7504 | } |
| 7505 | } |
| 7506 | |
| 7507 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X40, batch_lt_40) { |
| 7508 | TEST_REQUIRES_X86_AVX2; |
| 7509 | for (size_t batch_size = 1; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7510 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7511 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7512 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x40, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7513 | } |
| 7514 | } |
| 7515 | |
| 7516 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X40, batch_gt_40) { |
| 7517 | TEST_REQUIRES_X86_AVX2; |
| 7518 | for (size_t batch_size = 41; batch_size < 80; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7519 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7520 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7521 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x40, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7522 | } |
| 7523 | } |
| 7524 | |
| 7525 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X40, inplace) { |
| 7526 | TEST_REQUIRES_X86_AVX2; |
| 7527 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7528 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7529 | .batch_size(batch_size) |
| 7530 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7531 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x40, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7532 | } |
| 7533 | } |
| 7534 | |
| 7535 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X40, prescale) { |
| 7536 | TEST_REQUIRES_X86_AVX2; |
| 7537 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 7538 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7539 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7540 | .batch_size(batch_size) |
| 7541 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7542 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x40, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7543 | } |
| 7544 | } |
| 7545 | } |
| 7546 | |
| 7547 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X40, alpha) { |
| 7548 | TEST_REQUIRES_X86_AVX2; |
| 7549 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 7550 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7551 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7552 | .batch_size(batch_size) |
| 7553 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7554 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x40, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7555 | } |
| 7556 | } |
| 7557 | } |
| 7558 | |
| 7559 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X40, beta) { |
| 7560 | TEST_REQUIRES_X86_AVX2; |
| 7561 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 7562 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7563 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7564 | .batch_size(batch_size) |
| 7565 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7566 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x40, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7567 | } |
| 7568 | } |
| 7569 | } |
| 7570 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7571 | |
| 7572 | |
| 7573 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7574 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X48, batch_eq_48) { |
| 7575 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7576 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7577 | .batch_size(48) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7578 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x48, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7579 | } |
| 7580 | |
| 7581 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X48, batch_div_48) { |
| 7582 | TEST_REQUIRES_X86_AVX2; |
| 7583 | for (size_t batch_size = 96; batch_size < 480; batch_size += 48) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7584 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7585 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7586 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x48, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7587 | } |
| 7588 | } |
| 7589 | |
| 7590 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X48, batch_lt_48) { |
| 7591 | TEST_REQUIRES_X86_AVX2; |
| 7592 | for (size_t batch_size = 1; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7593 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7594 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7595 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x48, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7596 | } |
| 7597 | } |
| 7598 | |
| 7599 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X48, batch_gt_48) { |
| 7600 | TEST_REQUIRES_X86_AVX2; |
| 7601 | for (size_t batch_size = 49; batch_size < 96; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7602 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7603 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7604 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x48, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7605 | } |
| 7606 | } |
| 7607 | |
| 7608 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X48, inplace) { |
| 7609 | TEST_REQUIRES_X86_AVX2; |
| 7610 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7611 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7612 | .batch_size(batch_size) |
| 7613 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7614 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x48, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7615 | } |
| 7616 | } |
| 7617 | |
| 7618 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X48, prescale) { |
| 7619 | TEST_REQUIRES_X86_AVX2; |
| 7620 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 7621 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7622 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7623 | .batch_size(batch_size) |
| 7624 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7625 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x48, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7626 | } |
| 7627 | } |
| 7628 | } |
| 7629 | |
| 7630 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X48, alpha) { |
| 7631 | TEST_REQUIRES_X86_AVX2; |
| 7632 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 7633 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7634 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7635 | .batch_size(batch_size) |
| 7636 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7637 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x48, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7638 | } |
| 7639 | } |
| 7640 | } |
| 7641 | |
| 7642 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X48, beta) { |
| 7643 | TEST_REQUIRES_X86_AVX2; |
| 7644 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 7645 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7646 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7647 | .batch_size(batch_size) |
| 7648 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7649 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x48, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7650 | } |
| 7651 | } |
| 7652 | } |
| 7653 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7654 | |
| 7655 | |
| 7656 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7657 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X56, batch_eq_56) { |
| 7658 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7659 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7660 | .batch_size(56) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7661 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x56, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7662 | } |
| 7663 | |
| 7664 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X56, batch_div_56) { |
| 7665 | TEST_REQUIRES_X86_AVX2; |
| 7666 | for (size_t batch_size = 112; batch_size < 560; batch_size += 56) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7667 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7668 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7669 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x56, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7670 | } |
| 7671 | } |
| 7672 | |
| 7673 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X56, batch_lt_56) { |
| 7674 | TEST_REQUIRES_X86_AVX2; |
| 7675 | for (size_t batch_size = 1; batch_size < 56; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7676 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7677 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7678 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x56, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7679 | } |
| 7680 | } |
| 7681 | |
| 7682 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X56, batch_gt_56) { |
| 7683 | TEST_REQUIRES_X86_AVX2; |
| 7684 | for (size_t batch_size = 57; batch_size < 112; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7685 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7686 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7687 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x56, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7688 | } |
| 7689 | } |
| 7690 | |
| 7691 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X56, inplace) { |
| 7692 | TEST_REQUIRES_X86_AVX2; |
| 7693 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7694 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7695 | .batch_size(batch_size) |
| 7696 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7697 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x56, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7698 | } |
| 7699 | } |
| 7700 | |
| 7701 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X56, prescale) { |
| 7702 | TEST_REQUIRES_X86_AVX2; |
| 7703 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 7704 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7705 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7706 | .batch_size(batch_size) |
| 7707 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7708 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x56, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7709 | } |
| 7710 | } |
| 7711 | } |
| 7712 | |
| 7713 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X56, alpha) { |
| 7714 | TEST_REQUIRES_X86_AVX2; |
| 7715 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 7716 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7717 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7718 | .batch_size(batch_size) |
| 7719 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7720 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x56, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7721 | } |
| 7722 | } |
| 7723 | } |
| 7724 | |
| 7725 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X56, beta) { |
| 7726 | TEST_REQUIRES_X86_AVX2; |
| 7727 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 7728 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7729 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7730 | .batch_size(batch_size) |
| 7731 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7732 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x56, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7733 | } |
| 7734 | } |
| 7735 | } |
| 7736 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7737 | |
| 7738 | |
| 7739 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7740 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X64, batch_eq_64) { |
| 7741 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7742 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7743 | .batch_size(64) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7744 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x64, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7745 | } |
| 7746 | |
| 7747 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X64, batch_div_64) { |
| 7748 | TEST_REQUIRES_X86_AVX2; |
| 7749 | for (size_t batch_size = 128; batch_size < 640; batch_size += 64) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7750 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7751 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7752 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x64, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7753 | } |
| 7754 | } |
| 7755 | |
| 7756 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X64, batch_lt_64) { |
| 7757 | TEST_REQUIRES_X86_AVX2; |
| 7758 | for (size_t batch_size = 1; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7759 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7760 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7761 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x64, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7762 | } |
| 7763 | } |
| 7764 | |
| 7765 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X64, batch_gt_64) { |
| 7766 | TEST_REQUIRES_X86_AVX2; |
| 7767 | for (size_t batch_size = 65; batch_size < 128; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7768 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7769 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7770 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x64, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7771 | } |
| 7772 | } |
| 7773 | |
| 7774 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X64, inplace) { |
| 7775 | TEST_REQUIRES_X86_AVX2; |
| 7776 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7777 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7778 | .batch_size(batch_size) |
| 7779 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7780 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x64, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7781 | } |
| 7782 | } |
| 7783 | |
| 7784 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X64, prescale) { |
| 7785 | TEST_REQUIRES_X86_AVX2; |
| 7786 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 7787 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7788 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7789 | .batch_size(batch_size) |
| 7790 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7791 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x64, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7792 | } |
| 7793 | } |
| 7794 | } |
| 7795 | |
| 7796 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X64, alpha) { |
| 7797 | TEST_REQUIRES_X86_AVX2; |
| 7798 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 7799 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7800 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7801 | .batch_size(batch_size) |
| 7802 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7803 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x64, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7804 | } |
| 7805 | } |
| 7806 | } |
| 7807 | |
| 7808 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X64, beta) { |
| 7809 | TEST_REQUIRES_X86_AVX2; |
| 7810 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 7811 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7812 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7813 | .batch_size(batch_size) |
| 7814 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7815 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x64, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7816 | } |
| 7817 | } |
| 7818 | } |
| 7819 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7820 | |
| 7821 | |
| 7822 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7823 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X72, batch_eq_72) { |
| 7824 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7825 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7826 | .batch_size(72) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7827 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x72, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7828 | } |
| 7829 | |
| 7830 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X72, batch_div_72) { |
| 7831 | TEST_REQUIRES_X86_AVX2; |
| 7832 | for (size_t batch_size = 144; batch_size < 720; batch_size += 72) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7833 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7834 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7835 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x72, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7836 | } |
| 7837 | } |
| 7838 | |
| 7839 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X72, batch_lt_72) { |
| 7840 | TEST_REQUIRES_X86_AVX2; |
| 7841 | for (size_t batch_size = 1; batch_size < 72; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7842 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7843 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7844 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x72, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7845 | } |
| 7846 | } |
| 7847 | |
| 7848 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X72, batch_gt_72) { |
| 7849 | TEST_REQUIRES_X86_AVX2; |
| 7850 | for (size_t batch_size = 73; batch_size < 144; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7851 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7852 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7853 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x72, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7854 | } |
| 7855 | } |
| 7856 | |
| 7857 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X72, inplace) { |
| 7858 | TEST_REQUIRES_X86_AVX2; |
| 7859 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7860 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7861 | .batch_size(batch_size) |
| 7862 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7863 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x72, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7864 | } |
| 7865 | } |
| 7866 | |
| 7867 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X72, prescale) { |
| 7868 | TEST_REQUIRES_X86_AVX2; |
| 7869 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 7870 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7871 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7872 | .batch_size(batch_size) |
| 7873 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7874 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x72, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7875 | } |
| 7876 | } |
| 7877 | } |
| 7878 | |
| 7879 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X72, alpha) { |
| 7880 | TEST_REQUIRES_X86_AVX2; |
| 7881 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 7882 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7883 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7884 | .batch_size(batch_size) |
| 7885 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7886 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x72, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7887 | } |
| 7888 | } |
| 7889 | } |
| 7890 | |
| 7891 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X72, beta) { |
| 7892 | TEST_REQUIRES_X86_AVX2; |
| 7893 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 7894 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7895 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7896 | .batch_size(batch_size) |
| 7897 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7898 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x72, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7899 | } |
| 7900 | } |
| 7901 | } |
| 7902 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7903 | |
| 7904 | |
| 7905 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7906 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X80, batch_eq_80) { |
| 7907 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7908 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7909 | .batch_size(80) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7910 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x80, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7911 | } |
| 7912 | |
| 7913 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X80, batch_div_80) { |
| 7914 | TEST_REQUIRES_X86_AVX2; |
| 7915 | for (size_t batch_size = 160; batch_size < 800; batch_size += 80) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7916 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7917 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7918 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x80, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7919 | } |
| 7920 | } |
| 7921 | |
| 7922 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X80, batch_lt_80) { |
| 7923 | TEST_REQUIRES_X86_AVX2; |
| 7924 | for (size_t batch_size = 1; batch_size < 80; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7925 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7926 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7927 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x80, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7928 | } |
| 7929 | } |
| 7930 | |
| 7931 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X80, batch_gt_80) { |
| 7932 | TEST_REQUIRES_X86_AVX2; |
| 7933 | for (size_t batch_size = 81; batch_size < 160; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7934 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7935 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7936 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x80, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7937 | } |
| 7938 | } |
| 7939 | |
| 7940 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X80, inplace) { |
| 7941 | TEST_REQUIRES_X86_AVX2; |
| 7942 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7943 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7944 | .batch_size(batch_size) |
| 7945 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7946 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x80, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7947 | } |
| 7948 | } |
| 7949 | |
| 7950 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X80, prescale) { |
| 7951 | TEST_REQUIRES_X86_AVX2; |
| 7952 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 7953 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7954 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7955 | .batch_size(batch_size) |
| 7956 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7957 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x80, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7958 | } |
| 7959 | } |
| 7960 | } |
| 7961 | |
| 7962 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X80, alpha) { |
| 7963 | TEST_REQUIRES_X86_AVX2; |
| 7964 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 7965 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7966 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7967 | .batch_size(batch_size) |
| 7968 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7969 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x80, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7970 | } |
| 7971 | } |
| 7972 | } |
| 7973 | |
| 7974 | TEST(F32_VELU__AVX2_RR1_LUT16_P3_GATHER_X80, beta) { |
| 7975 | TEST_REQUIRES_X86_AVX2; |
| 7976 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 7977 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7978 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7979 | .batch_size(batch_size) |
| 7980 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7981 | .Test(xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x80, xnn_init_f32_elu_avx2_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7982 | } |
| 7983 | } |
| 7984 | } |
| 7985 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7986 | |
| 7987 | |
| 7988 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 7989 | TEST(F32_VELU__AVX2_RR1_P6_X8, batch_eq_8) { |
| 7990 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7991 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7992 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 7993 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x8, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 7994 | } |
| 7995 | |
| 7996 | TEST(F32_VELU__AVX2_RR1_P6_X8, batch_div_8) { |
| 7997 | TEST_REQUIRES_X86_AVX2; |
| 7998 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 7999 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8000 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8001 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x8, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8002 | } |
| 8003 | } |
| 8004 | |
| 8005 | TEST(F32_VELU__AVX2_RR1_P6_X8, batch_lt_8) { |
| 8006 | TEST_REQUIRES_X86_AVX2; |
| 8007 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8008 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8009 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8010 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x8, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8011 | } |
| 8012 | } |
| 8013 | |
| 8014 | TEST(F32_VELU__AVX2_RR1_P6_X8, batch_gt_8) { |
| 8015 | TEST_REQUIRES_X86_AVX2; |
| 8016 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8017 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8018 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8019 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x8, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8020 | } |
| 8021 | } |
| 8022 | |
| 8023 | TEST(F32_VELU__AVX2_RR1_P6_X8, inplace) { |
| 8024 | TEST_REQUIRES_X86_AVX2; |
| 8025 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8026 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8027 | .batch_size(batch_size) |
| 8028 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8029 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x8, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8030 | } |
| 8031 | } |
| 8032 | |
| 8033 | TEST(F32_VELU__AVX2_RR1_P6_X8, prescale) { |
| 8034 | TEST_REQUIRES_X86_AVX2; |
| 8035 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 8036 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8037 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8038 | .batch_size(batch_size) |
| 8039 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8040 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x8, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8041 | } |
| 8042 | } |
| 8043 | } |
| 8044 | |
| 8045 | TEST(F32_VELU__AVX2_RR1_P6_X8, alpha) { |
| 8046 | TEST_REQUIRES_X86_AVX2; |
| 8047 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 8048 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8049 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8050 | .batch_size(batch_size) |
| 8051 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8052 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x8, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8053 | } |
| 8054 | } |
| 8055 | } |
| 8056 | |
| 8057 | TEST(F32_VELU__AVX2_RR1_P6_X8, beta) { |
| 8058 | TEST_REQUIRES_X86_AVX2; |
| 8059 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 8060 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8061 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8062 | .batch_size(batch_size) |
| 8063 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8064 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x8, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8065 | } |
| 8066 | } |
| 8067 | } |
| 8068 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8069 | |
| 8070 | |
| 8071 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8072 | TEST(F32_VELU__AVX2_RR1_P6_X16, batch_eq_16) { |
| 8073 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8074 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8075 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8076 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x16, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8077 | } |
| 8078 | |
| 8079 | TEST(F32_VELU__AVX2_RR1_P6_X16, batch_div_16) { |
| 8080 | TEST_REQUIRES_X86_AVX2; |
| 8081 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8082 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8083 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8084 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x16, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8085 | } |
| 8086 | } |
| 8087 | |
| 8088 | TEST(F32_VELU__AVX2_RR1_P6_X16, batch_lt_16) { |
| 8089 | TEST_REQUIRES_X86_AVX2; |
| 8090 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8091 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8092 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8093 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x16, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8094 | } |
| 8095 | } |
| 8096 | |
| 8097 | TEST(F32_VELU__AVX2_RR1_P6_X16, batch_gt_16) { |
| 8098 | TEST_REQUIRES_X86_AVX2; |
| 8099 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8100 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8101 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8102 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x16, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8103 | } |
| 8104 | } |
| 8105 | |
| 8106 | TEST(F32_VELU__AVX2_RR1_P6_X16, inplace) { |
| 8107 | TEST_REQUIRES_X86_AVX2; |
| 8108 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8109 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8110 | .batch_size(batch_size) |
| 8111 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8112 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x16, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8113 | } |
| 8114 | } |
| 8115 | |
| 8116 | TEST(F32_VELU__AVX2_RR1_P6_X16, prescale) { |
| 8117 | TEST_REQUIRES_X86_AVX2; |
| 8118 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 8119 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8120 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8121 | .batch_size(batch_size) |
| 8122 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8123 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x16, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8124 | } |
| 8125 | } |
| 8126 | } |
| 8127 | |
| 8128 | TEST(F32_VELU__AVX2_RR1_P6_X16, alpha) { |
| 8129 | TEST_REQUIRES_X86_AVX2; |
| 8130 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 8131 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8132 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8133 | .batch_size(batch_size) |
| 8134 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8135 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x16, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8136 | } |
| 8137 | } |
| 8138 | } |
| 8139 | |
| 8140 | TEST(F32_VELU__AVX2_RR1_P6_X16, beta) { |
| 8141 | TEST_REQUIRES_X86_AVX2; |
| 8142 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 8143 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8144 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8145 | .batch_size(batch_size) |
| 8146 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8147 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x16, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8148 | } |
| 8149 | } |
| 8150 | } |
| 8151 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8152 | |
| 8153 | |
| 8154 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8155 | TEST(F32_VELU__AVX2_RR1_P6_X24, batch_eq_24) { |
| 8156 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8157 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8158 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8159 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x24, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8160 | } |
| 8161 | |
| 8162 | TEST(F32_VELU__AVX2_RR1_P6_X24, batch_div_24) { |
| 8163 | TEST_REQUIRES_X86_AVX2; |
| 8164 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8165 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8166 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8167 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x24, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8168 | } |
| 8169 | } |
| 8170 | |
| 8171 | TEST(F32_VELU__AVX2_RR1_P6_X24, batch_lt_24) { |
| 8172 | TEST_REQUIRES_X86_AVX2; |
| 8173 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8174 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8175 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8176 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x24, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8177 | } |
| 8178 | } |
| 8179 | |
| 8180 | TEST(F32_VELU__AVX2_RR1_P6_X24, batch_gt_24) { |
| 8181 | TEST_REQUIRES_X86_AVX2; |
| 8182 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8183 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8184 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8185 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x24, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8186 | } |
| 8187 | } |
| 8188 | |
| 8189 | TEST(F32_VELU__AVX2_RR1_P6_X24, inplace) { |
| 8190 | TEST_REQUIRES_X86_AVX2; |
| 8191 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8192 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8193 | .batch_size(batch_size) |
| 8194 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8195 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x24, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8196 | } |
| 8197 | } |
| 8198 | |
| 8199 | TEST(F32_VELU__AVX2_RR1_P6_X24, prescale) { |
| 8200 | TEST_REQUIRES_X86_AVX2; |
| 8201 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 8202 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8203 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8204 | .batch_size(batch_size) |
| 8205 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8206 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x24, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8207 | } |
| 8208 | } |
| 8209 | } |
| 8210 | |
| 8211 | TEST(F32_VELU__AVX2_RR1_P6_X24, alpha) { |
| 8212 | TEST_REQUIRES_X86_AVX2; |
| 8213 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 8214 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8215 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8216 | .batch_size(batch_size) |
| 8217 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8218 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x24, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8219 | } |
| 8220 | } |
| 8221 | } |
| 8222 | |
| 8223 | TEST(F32_VELU__AVX2_RR1_P6_X24, beta) { |
| 8224 | TEST_REQUIRES_X86_AVX2; |
| 8225 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 8226 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8227 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8228 | .batch_size(batch_size) |
| 8229 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8230 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x24, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8231 | } |
| 8232 | } |
| 8233 | } |
| 8234 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8235 | |
| 8236 | |
| 8237 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8238 | TEST(F32_VELU__AVX2_RR1_P6_X32, batch_eq_32) { |
| 8239 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8240 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8241 | .batch_size(32) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8242 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x32, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8243 | } |
| 8244 | |
| 8245 | TEST(F32_VELU__AVX2_RR1_P6_X32, batch_div_32) { |
| 8246 | TEST_REQUIRES_X86_AVX2; |
| 8247 | for (size_t batch_size = 64; batch_size < 320; batch_size += 32) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8248 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8249 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8250 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x32, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8251 | } |
| 8252 | } |
| 8253 | |
| 8254 | TEST(F32_VELU__AVX2_RR1_P6_X32, batch_lt_32) { |
| 8255 | TEST_REQUIRES_X86_AVX2; |
| 8256 | for (size_t batch_size = 1; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8257 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8258 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8259 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x32, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8260 | } |
| 8261 | } |
| 8262 | |
| 8263 | TEST(F32_VELU__AVX2_RR1_P6_X32, batch_gt_32) { |
| 8264 | TEST_REQUIRES_X86_AVX2; |
| 8265 | for (size_t batch_size = 33; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8266 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8267 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8268 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x32, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8269 | } |
| 8270 | } |
| 8271 | |
| 8272 | TEST(F32_VELU__AVX2_RR1_P6_X32, inplace) { |
| 8273 | TEST_REQUIRES_X86_AVX2; |
| 8274 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8275 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8276 | .batch_size(batch_size) |
| 8277 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8278 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x32, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8279 | } |
| 8280 | } |
| 8281 | |
| 8282 | TEST(F32_VELU__AVX2_RR1_P6_X32, prescale) { |
| 8283 | TEST_REQUIRES_X86_AVX2; |
| 8284 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 8285 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8286 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8287 | .batch_size(batch_size) |
| 8288 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8289 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x32, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8290 | } |
| 8291 | } |
| 8292 | } |
| 8293 | |
| 8294 | TEST(F32_VELU__AVX2_RR1_P6_X32, alpha) { |
| 8295 | TEST_REQUIRES_X86_AVX2; |
| 8296 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 8297 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8298 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8299 | .batch_size(batch_size) |
| 8300 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8301 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x32, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8302 | } |
| 8303 | } |
| 8304 | } |
| 8305 | |
| 8306 | TEST(F32_VELU__AVX2_RR1_P6_X32, beta) { |
| 8307 | TEST_REQUIRES_X86_AVX2; |
| 8308 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 8309 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8310 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8311 | .batch_size(batch_size) |
| 8312 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8313 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x32, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8314 | } |
| 8315 | } |
| 8316 | } |
| 8317 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8318 | |
| 8319 | |
| 8320 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8321 | TEST(F32_VELU__AVX2_RR1_P6_X40, batch_eq_40) { |
| 8322 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8323 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8324 | .batch_size(40) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8325 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x40, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8326 | } |
| 8327 | |
| 8328 | TEST(F32_VELU__AVX2_RR1_P6_X40, batch_div_40) { |
| 8329 | TEST_REQUIRES_X86_AVX2; |
| 8330 | for (size_t batch_size = 80; batch_size < 400; batch_size += 40) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8331 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8332 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8333 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x40, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8334 | } |
| 8335 | } |
| 8336 | |
| 8337 | TEST(F32_VELU__AVX2_RR1_P6_X40, batch_lt_40) { |
| 8338 | TEST_REQUIRES_X86_AVX2; |
| 8339 | for (size_t batch_size = 1; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8340 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8341 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8342 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x40, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8343 | } |
| 8344 | } |
| 8345 | |
| 8346 | TEST(F32_VELU__AVX2_RR1_P6_X40, batch_gt_40) { |
| 8347 | TEST_REQUIRES_X86_AVX2; |
| 8348 | for (size_t batch_size = 41; batch_size < 80; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8349 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8350 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8351 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x40, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8352 | } |
| 8353 | } |
| 8354 | |
| 8355 | TEST(F32_VELU__AVX2_RR1_P6_X40, inplace) { |
| 8356 | TEST_REQUIRES_X86_AVX2; |
| 8357 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8358 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8359 | .batch_size(batch_size) |
| 8360 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8361 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x40, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8362 | } |
| 8363 | } |
| 8364 | |
| 8365 | TEST(F32_VELU__AVX2_RR1_P6_X40, prescale) { |
| 8366 | TEST_REQUIRES_X86_AVX2; |
| 8367 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 8368 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8369 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8370 | .batch_size(batch_size) |
| 8371 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8372 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x40, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8373 | } |
| 8374 | } |
| 8375 | } |
| 8376 | |
| 8377 | TEST(F32_VELU__AVX2_RR1_P6_X40, alpha) { |
| 8378 | TEST_REQUIRES_X86_AVX2; |
| 8379 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 8380 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8381 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8382 | .batch_size(batch_size) |
| 8383 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8384 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x40, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8385 | } |
| 8386 | } |
| 8387 | } |
| 8388 | |
| 8389 | TEST(F32_VELU__AVX2_RR1_P6_X40, beta) { |
| 8390 | TEST_REQUIRES_X86_AVX2; |
| 8391 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 8392 | for (size_t batch_size = 1; batch_size <= 200; batch_size += 39) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8393 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8394 | .batch_size(batch_size) |
| 8395 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8396 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x40, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8397 | } |
| 8398 | } |
| 8399 | } |
| 8400 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8401 | |
| 8402 | |
| 8403 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8404 | TEST(F32_VELU__AVX2_RR1_P6_X48, batch_eq_48) { |
| 8405 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8406 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8407 | .batch_size(48) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8408 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x48, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8409 | } |
| 8410 | |
| 8411 | TEST(F32_VELU__AVX2_RR1_P6_X48, batch_div_48) { |
| 8412 | TEST_REQUIRES_X86_AVX2; |
| 8413 | for (size_t batch_size = 96; batch_size < 480; batch_size += 48) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8414 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8415 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8416 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x48, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8417 | } |
| 8418 | } |
| 8419 | |
| 8420 | TEST(F32_VELU__AVX2_RR1_P6_X48, batch_lt_48) { |
| 8421 | TEST_REQUIRES_X86_AVX2; |
| 8422 | for (size_t batch_size = 1; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8423 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8424 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8425 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x48, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8426 | } |
| 8427 | } |
| 8428 | |
| 8429 | TEST(F32_VELU__AVX2_RR1_P6_X48, batch_gt_48) { |
| 8430 | TEST_REQUIRES_X86_AVX2; |
| 8431 | for (size_t batch_size = 49; batch_size < 96; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8432 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8433 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8434 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x48, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8435 | } |
| 8436 | } |
| 8437 | |
| 8438 | TEST(F32_VELU__AVX2_RR1_P6_X48, inplace) { |
| 8439 | TEST_REQUIRES_X86_AVX2; |
| 8440 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8441 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8442 | .batch_size(batch_size) |
| 8443 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8444 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x48, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8445 | } |
| 8446 | } |
| 8447 | |
| 8448 | TEST(F32_VELU__AVX2_RR1_P6_X48, prescale) { |
| 8449 | TEST_REQUIRES_X86_AVX2; |
| 8450 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 8451 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8452 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8453 | .batch_size(batch_size) |
| 8454 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8455 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x48, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8456 | } |
| 8457 | } |
| 8458 | } |
| 8459 | |
| 8460 | TEST(F32_VELU__AVX2_RR1_P6_X48, alpha) { |
| 8461 | TEST_REQUIRES_X86_AVX2; |
| 8462 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 8463 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8464 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8465 | .batch_size(batch_size) |
| 8466 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8467 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x48, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8468 | } |
| 8469 | } |
| 8470 | } |
| 8471 | |
| 8472 | TEST(F32_VELU__AVX2_RR1_P6_X48, beta) { |
| 8473 | TEST_REQUIRES_X86_AVX2; |
| 8474 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 8475 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8476 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8477 | .batch_size(batch_size) |
| 8478 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8479 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x48, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8480 | } |
| 8481 | } |
| 8482 | } |
| 8483 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8484 | |
| 8485 | |
| 8486 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8487 | TEST(F32_VELU__AVX2_RR1_P6_X56, batch_eq_56) { |
| 8488 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8489 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8490 | .batch_size(56) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8491 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x56, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8492 | } |
| 8493 | |
| 8494 | TEST(F32_VELU__AVX2_RR1_P6_X56, batch_div_56) { |
| 8495 | TEST_REQUIRES_X86_AVX2; |
| 8496 | for (size_t batch_size = 112; batch_size < 560; batch_size += 56) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8497 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8498 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8499 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x56, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8500 | } |
| 8501 | } |
| 8502 | |
| 8503 | TEST(F32_VELU__AVX2_RR1_P6_X56, batch_lt_56) { |
| 8504 | TEST_REQUIRES_X86_AVX2; |
| 8505 | for (size_t batch_size = 1; batch_size < 56; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8506 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8507 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8508 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x56, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8509 | } |
| 8510 | } |
| 8511 | |
| 8512 | TEST(F32_VELU__AVX2_RR1_P6_X56, batch_gt_56) { |
| 8513 | TEST_REQUIRES_X86_AVX2; |
| 8514 | for (size_t batch_size = 57; batch_size < 112; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8515 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8516 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8517 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x56, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8518 | } |
| 8519 | } |
| 8520 | |
| 8521 | TEST(F32_VELU__AVX2_RR1_P6_X56, inplace) { |
| 8522 | TEST_REQUIRES_X86_AVX2; |
| 8523 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8524 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8525 | .batch_size(batch_size) |
| 8526 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8527 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x56, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8528 | } |
| 8529 | } |
| 8530 | |
| 8531 | TEST(F32_VELU__AVX2_RR1_P6_X56, prescale) { |
| 8532 | TEST_REQUIRES_X86_AVX2; |
| 8533 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 8534 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8535 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8536 | .batch_size(batch_size) |
| 8537 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8538 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x56, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8539 | } |
| 8540 | } |
| 8541 | } |
| 8542 | |
| 8543 | TEST(F32_VELU__AVX2_RR1_P6_X56, alpha) { |
| 8544 | TEST_REQUIRES_X86_AVX2; |
| 8545 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 8546 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8547 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8548 | .batch_size(batch_size) |
| 8549 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8550 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x56, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8551 | } |
| 8552 | } |
| 8553 | } |
| 8554 | |
| 8555 | TEST(F32_VELU__AVX2_RR1_P6_X56, beta) { |
| 8556 | TEST_REQUIRES_X86_AVX2; |
| 8557 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 8558 | for (size_t batch_size = 1; batch_size <= 280; batch_size += 55) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8559 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8560 | .batch_size(batch_size) |
| 8561 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8562 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x56, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8563 | } |
| 8564 | } |
| 8565 | } |
| 8566 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8567 | |
| 8568 | |
| 8569 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8570 | TEST(F32_VELU__AVX2_RR1_P6_X64, batch_eq_64) { |
| 8571 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8572 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8573 | .batch_size(64) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8574 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x64, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8575 | } |
| 8576 | |
| 8577 | TEST(F32_VELU__AVX2_RR1_P6_X64, batch_div_64) { |
| 8578 | TEST_REQUIRES_X86_AVX2; |
| 8579 | for (size_t batch_size = 128; batch_size < 640; batch_size += 64) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8580 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8581 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8582 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x64, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8583 | } |
| 8584 | } |
| 8585 | |
| 8586 | TEST(F32_VELU__AVX2_RR1_P6_X64, batch_lt_64) { |
| 8587 | TEST_REQUIRES_X86_AVX2; |
| 8588 | for (size_t batch_size = 1; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8589 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8590 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8591 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x64, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8592 | } |
| 8593 | } |
| 8594 | |
| 8595 | TEST(F32_VELU__AVX2_RR1_P6_X64, batch_gt_64) { |
| 8596 | TEST_REQUIRES_X86_AVX2; |
| 8597 | for (size_t batch_size = 65; batch_size < 128; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8598 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8599 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8600 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x64, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8601 | } |
| 8602 | } |
| 8603 | |
| 8604 | TEST(F32_VELU__AVX2_RR1_P6_X64, inplace) { |
| 8605 | TEST_REQUIRES_X86_AVX2; |
| 8606 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8607 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8608 | .batch_size(batch_size) |
| 8609 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8610 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x64, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8611 | } |
| 8612 | } |
| 8613 | |
| 8614 | TEST(F32_VELU__AVX2_RR1_P6_X64, prescale) { |
| 8615 | TEST_REQUIRES_X86_AVX2; |
| 8616 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 8617 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8618 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8619 | .batch_size(batch_size) |
| 8620 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8621 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x64, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8622 | } |
| 8623 | } |
| 8624 | } |
| 8625 | |
| 8626 | TEST(F32_VELU__AVX2_RR1_P6_X64, alpha) { |
| 8627 | TEST_REQUIRES_X86_AVX2; |
| 8628 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 8629 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8630 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8631 | .batch_size(batch_size) |
| 8632 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8633 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x64, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8634 | } |
| 8635 | } |
| 8636 | } |
| 8637 | |
| 8638 | TEST(F32_VELU__AVX2_RR1_P6_X64, beta) { |
| 8639 | TEST_REQUIRES_X86_AVX2; |
| 8640 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 8641 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8642 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8643 | .batch_size(batch_size) |
| 8644 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8645 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x64, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8646 | } |
| 8647 | } |
| 8648 | } |
| 8649 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8650 | |
| 8651 | |
| 8652 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8653 | TEST(F32_VELU__AVX2_RR1_P6_X72, batch_eq_72) { |
| 8654 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8655 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8656 | .batch_size(72) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8657 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x72, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8658 | } |
| 8659 | |
| 8660 | TEST(F32_VELU__AVX2_RR1_P6_X72, batch_div_72) { |
| 8661 | TEST_REQUIRES_X86_AVX2; |
| 8662 | for (size_t batch_size = 144; batch_size < 720; batch_size += 72) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8663 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8664 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8665 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x72, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8666 | } |
| 8667 | } |
| 8668 | |
| 8669 | TEST(F32_VELU__AVX2_RR1_P6_X72, batch_lt_72) { |
| 8670 | TEST_REQUIRES_X86_AVX2; |
| 8671 | for (size_t batch_size = 1; batch_size < 72; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8672 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8673 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8674 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x72, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8675 | } |
| 8676 | } |
| 8677 | |
| 8678 | TEST(F32_VELU__AVX2_RR1_P6_X72, batch_gt_72) { |
| 8679 | TEST_REQUIRES_X86_AVX2; |
| 8680 | for (size_t batch_size = 73; batch_size < 144; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8681 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8682 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8683 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x72, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8684 | } |
| 8685 | } |
| 8686 | |
| 8687 | TEST(F32_VELU__AVX2_RR1_P6_X72, inplace) { |
| 8688 | TEST_REQUIRES_X86_AVX2; |
| 8689 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8690 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8691 | .batch_size(batch_size) |
| 8692 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8693 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x72, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8694 | } |
| 8695 | } |
| 8696 | |
| 8697 | TEST(F32_VELU__AVX2_RR1_P6_X72, prescale) { |
| 8698 | TEST_REQUIRES_X86_AVX2; |
| 8699 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 8700 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8701 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8702 | .batch_size(batch_size) |
| 8703 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8704 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x72, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8705 | } |
| 8706 | } |
| 8707 | } |
| 8708 | |
| 8709 | TEST(F32_VELU__AVX2_RR1_P6_X72, alpha) { |
| 8710 | TEST_REQUIRES_X86_AVX2; |
| 8711 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 8712 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8713 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8714 | .batch_size(batch_size) |
| 8715 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8716 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x72, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8717 | } |
| 8718 | } |
| 8719 | } |
| 8720 | |
| 8721 | TEST(F32_VELU__AVX2_RR1_P6_X72, beta) { |
| 8722 | TEST_REQUIRES_X86_AVX2; |
| 8723 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 8724 | for (size_t batch_size = 1; batch_size <= 360; batch_size += 71) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8725 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8726 | .batch_size(batch_size) |
| 8727 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8728 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x72, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8729 | } |
| 8730 | } |
| 8731 | } |
| 8732 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8733 | |
| 8734 | |
| 8735 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8736 | TEST(F32_VELU__AVX2_RR1_P6_X80, batch_eq_80) { |
| 8737 | TEST_REQUIRES_X86_AVX2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8738 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8739 | .batch_size(80) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8740 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x80, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8741 | } |
| 8742 | |
| 8743 | TEST(F32_VELU__AVX2_RR1_P6_X80, batch_div_80) { |
| 8744 | TEST_REQUIRES_X86_AVX2; |
| 8745 | for (size_t batch_size = 160; batch_size < 800; batch_size += 80) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8746 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8747 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8748 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x80, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8749 | } |
| 8750 | } |
| 8751 | |
| 8752 | TEST(F32_VELU__AVX2_RR1_P6_X80, batch_lt_80) { |
| 8753 | TEST_REQUIRES_X86_AVX2; |
| 8754 | for (size_t batch_size = 1; batch_size < 80; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8755 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8756 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8757 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x80, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8758 | } |
| 8759 | } |
| 8760 | |
| 8761 | TEST(F32_VELU__AVX2_RR1_P6_X80, batch_gt_80) { |
| 8762 | TEST_REQUIRES_X86_AVX2; |
| 8763 | for (size_t batch_size = 81; batch_size < 160; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8764 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8765 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8766 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x80, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8767 | } |
| 8768 | } |
| 8769 | |
| 8770 | TEST(F32_VELU__AVX2_RR1_P6_X80, inplace) { |
| 8771 | TEST_REQUIRES_X86_AVX2; |
| 8772 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8773 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8774 | .batch_size(batch_size) |
| 8775 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8776 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x80, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8777 | } |
| 8778 | } |
| 8779 | |
| 8780 | TEST(F32_VELU__AVX2_RR1_P6_X80, prescale) { |
| 8781 | TEST_REQUIRES_X86_AVX2; |
| 8782 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 8783 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8784 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8785 | .batch_size(batch_size) |
| 8786 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8787 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x80, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8788 | } |
| 8789 | } |
| 8790 | } |
| 8791 | |
| 8792 | TEST(F32_VELU__AVX2_RR1_P6_X80, alpha) { |
| 8793 | TEST_REQUIRES_X86_AVX2; |
| 8794 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 8795 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8796 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8797 | .batch_size(batch_size) |
| 8798 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8799 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x80, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8800 | } |
| 8801 | } |
| 8802 | } |
| 8803 | |
| 8804 | TEST(F32_VELU__AVX2_RR1_P6_X80, beta) { |
| 8805 | TEST_REQUIRES_X86_AVX2; |
| 8806 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 8807 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8808 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8809 | .batch_size(batch_size) |
| 8810 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8811 | .Test(xnn_f32_velu_ukernel__avx2_rr1_p6_x80, xnn_init_f32_elu_avx2_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8812 | } |
| 8813 | } |
| 8814 | } |
| 8815 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8816 | |
| 8817 | |
| 8818 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8819 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X16, batch_eq_16) { |
| 8820 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8821 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8822 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8823 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x16, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8824 | } |
| 8825 | |
| 8826 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X16, batch_div_16) { |
| 8827 | TEST_REQUIRES_X86_AVX512F; |
| 8828 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8829 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8830 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8831 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x16, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8832 | } |
| 8833 | } |
| 8834 | |
| 8835 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X16, batch_lt_16) { |
| 8836 | TEST_REQUIRES_X86_AVX512F; |
| 8837 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8838 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8839 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8840 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x16, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8841 | } |
| 8842 | } |
| 8843 | |
| 8844 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X16, batch_gt_16) { |
| 8845 | TEST_REQUIRES_X86_AVX512F; |
| 8846 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8847 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8848 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8849 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x16, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8850 | } |
| 8851 | } |
| 8852 | |
| 8853 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X16, inplace) { |
| 8854 | TEST_REQUIRES_X86_AVX512F; |
| 8855 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8856 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8857 | .batch_size(batch_size) |
| 8858 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8859 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x16, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8860 | } |
| 8861 | } |
| 8862 | |
| 8863 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X16, prescale) { |
| 8864 | TEST_REQUIRES_X86_AVX512F; |
| 8865 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 8866 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8867 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8868 | .batch_size(batch_size) |
| 8869 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8870 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x16, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8871 | } |
| 8872 | } |
| 8873 | } |
| 8874 | |
| 8875 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X16, alpha) { |
| 8876 | TEST_REQUIRES_X86_AVX512F; |
| 8877 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 8878 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8879 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8880 | .batch_size(batch_size) |
| 8881 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8882 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x16, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8883 | } |
| 8884 | } |
| 8885 | } |
| 8886 | |
| 8887 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X16, beta) { |
| 8888 | TEST_REQUIRES_X86_AVX512F; |
| 8889 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 8890 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8891 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8892 | .batch_size(batch_size) |
| 8893 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8894 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x16, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8895 | } |
| 8896 | } |
| 8897 | } |
| 8898 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8899 | |
| 8900 | |
| 8901 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8902 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X32, batch_eq_32) { |
| 8903 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8904 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8905 | .batch_size(32) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8906 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x32, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8907 | } |
| 8908 | |
| 8909 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X32, batch_div_32) { |
| 8910 | TEST_REQUIRES_X86_AVX512F; |
| 8911 | for (size_t batch_size = 64; batch_size < 320; batch_size += 32) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8912 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8913 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8914 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x32, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8915 | } |
| 8916 | } |
| 8917 | |
| 8918 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X32, batch_lt_32) { |
| 8919 | TEST_REQUIRES_X86_AVX512F; |
| 8920 | for (size_t batch_size = 1; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8921 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8922 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8923 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x32, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8924 | } |
| 8925 | } |
| 8926 | |
| 8927 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X32, batch_gt_32) { |
| 8928 | TEST_REQUIRES_X86_AVX512F; |
| 8929 | for (size_t batch_size = 33; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8930 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8931 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8932 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x32, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8933 | } |
| 8934 | } |
| 8935 | |
| 8936 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X32, inplace) { |
| 8937 | TEST_REQUIRES_X86_AVX512F; |
| 8938 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8939 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8940 | .batch_size(batch_size) |
| 8941 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8942 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x32, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8943 | } |
| 8944 | } |
| 8945 | |
| 8946 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X32, prescale) { |
| 8947 | TEST_REQUIRES_X86_AVX512F; |
| 8948 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 8949 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8950 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8951 | .batch_size(batch_size) |
| 8952 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8953 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x32, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8954 | } |
| 8955 | } |
| 8956 | } |
| 8957 | |
| 8958 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X32, alpha) { |
| 8959 | TEST_REQUIRES_X86_AVX512F; |
| 8960 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 8961 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8962 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8963 | .batch_size(batch_size) |
| 8964 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8965 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x32, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8966 | } |
| 8967 | } |
| 8968 | } |
| 8969 | |
| 8970 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X32, beta) { |
| 8971 | TEST_REQUIRES_X86_AVX512F; |
| 8972 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 8973 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8974 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8975 | .batch_size(batch_size) |
| 8976 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8977 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x32, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8978 | } |
| 8979 | } |
| 8980 | } |
| 8981 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8982 | |
| 8983 | |
| 8984 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 8985 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X48, batch_eq_48) { |
| 8986 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8987 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8988 | .batch_size(48) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8989 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x48, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8990 | } |
| 8991 | |
| 8992 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X48, batch_div_48) { |
| 8993 | TEST_REQUIRES_X86_AVX512F; |
| 8994 | for (size_t batch_size = 96; batch_size < 480; batch_size += 48) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 8995 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8996 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 8997 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x48, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 8998 | } |
| 8999 | } |
| 9000 | |
| 9001 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X48, batch_lt_48) { |
| 9002 | TEST_REQUIRES_X86_AVX512F; |
| 9003 | for (size_t batch_size = 1; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9004 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9005 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9006 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x48, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9007 | } |
| 9008 | } |
| 9009 | |
| 9010 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X48, batch_gt_48) { |
| 9011 | TEST_REQUIRES_X86_AVX512F; |
| 9012 | for (size_t batch_size = 49; batch_size < 96; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9013 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9014 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9015 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x48, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9016 | } |
| 9017 | } |
| 9018 | |
| 9019 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X48, inplace) { |
| 9020 | TEST_REQUIRES_X86_AVX512F; |
| 9021 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9022 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9023 | .batch_size(batch_size) |
| 9024 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9025 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x48, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9026 | } |
| 9027 | } |
| 9028 | |
| 9029 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X48, prescale) { |
| 9030 | TEST_REQUIRES_X86_AVX512F; |
| 9031 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 9032 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9033 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9034 | .batch_size(batch_size) |
| 9035 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9036 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x48, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9037 | } |
| 9038 | } |
| 9039 | } |
| 9040 | |
| 9041 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X48, alpha) { |
| 9042 | TEST_REQUIRES_X86_AVX512F; |
| 9043 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 9044 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9045 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9046 | .batch_size(batch_size) |
| 9047 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9048 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x48, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9049 | } |
| 9050 | } |
| 9051 | } |
| 9052 | |
| 9053 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X48, beta) { |
| 9054 | TEST_REQUIRES_X86_AVX512F; |
| 9055 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 9056 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9057 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9058 | .batch_size(batch_size) |
| 9059 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9060 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x48, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9061 | } |
| 9062 | } |
| 9063 | } |
| 9064 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9065 | |
| 9066 | |
| 9067 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9068 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X64, batch_eq_64) { |
| 9069 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9070 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9071 | .batch_size(64) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9072 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9073 | } |
| 9074 | |
| 9075 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X64, batch_div_64) { |
| 9076 | TEST_REQUIRES_X86_AVX512F; |
| 9077 | for (size_t batch_size = 128; batch_size < 640; batch_size += 64) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9078 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9079 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9080 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9081 | } |
| 9082 | } |
| 9083 | |
| 9084 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X64, batch_lt_64) { |
| 9085 | TEST_REQUIRES_X86_AVX512F; |
| 9086 | for (size_t batch_size = 1; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9087 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9088 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9089 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9090 | } |
| 9091 | } |
| 9092 | |
| 9093 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X64, batch_gt_64) { |
| 9094 | TEST_REQUIRES_X86_AVX512F; |
| 9095 | for (size_t batch_size = 65; batch_size < 128; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9096 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9097 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9098 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9099 | } |
| 9100 | } |
| 9101 | |
| 9102 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X64, inplace) { |
| 9103 | TEST_REQUIRES_X86_AVX512F; |
| 9104 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9105 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9106 | .batch_size(batch_size) |
| 9107 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9108 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9109 | } |
| 9110 | } |
| 9111 | |
| 9112 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X64, prescale) { |
| 9113 | TEST_REQUIRES_X86_AVX512F; |
| 9114 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 9115 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9116 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9117 | .batch_size(batch_size) |
| 9118 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9119 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9120 | } |
| 9121 | } |
| 9122 | } |
| 9123 | |
| 9124 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X64, alpha) { |
| 9125 | TEST_REQUIRES_X86_AVX512F; |
| 9126 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 9127 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9128 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9129 | .batch_size(batch_size) |
| 9130 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9131 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9132 | } |
| 9133 | } |
| 9134 | } |
| 9135 | |
| 9136 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X64, beta) { |
| 9137 | TEST_REQUIRES_X86_AVX512F; |
| 9138 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 9139 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9140 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9141 | .batch_size(batch_size) |
| 9142 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9143 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9144 | } |
| 9145 | } |
| 9146 | } |
| 9147 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9148 | |
| 9149 | |
| 9150 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9151 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X80, batch_eq_80) { |
| 9152 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9153 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9154 | .batch_size(80) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9155 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9156 | } |
| 9157 | |
| 9158 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X80, batch_div_80) { |
| 9159 | TEST_REQUIRES_X86_AVX512F; |
| 9160 | for (size_t batch_size = 160; batch_size < 800; batch_size += 80) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9161 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9162 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9163 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9164 | } |
| 9165 | } |
| 9166 | |
| 9167 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X80, batch_lt_80) { |
| 9168 | TEST_REQUIRES_X86_AVX512F; |
| 9169 | for (size_t batch_size = 1; batch_size < 80; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9170 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9171 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9172 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9173 | } |
| 9174 | } |
| 9175 | |
| 9176 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X80, batch_gt_80) { |
| 9177 | TEST_REQUIRES_X86_AVX512F; |
| 9178 | for (size_t batch_size = 81; batch_size < 160; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9179 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9180 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9181 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9182 | } |
| 9183 | } |
| 9184 | |
| 9185 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X80, inplace) { |
| 9186 | TEST_REQUIRES_X86_AVX512F; |
| 9187 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9188 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9189 | .batch_size(batch_size) |
| 9190 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9191 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9192 | } |
| 9193 | } |
| 9194 | |
| 9195 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X80, prescale) { |
| 9196 | TEST_REQUIRES_X86_AVX512F; |
| 9197 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 9198 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9199 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9200 | .batch_size(batch_size) |
| 9201 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9202 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9203 | } |
| 9204 | } |
| 9205 | } |
| 9206 | |
| 9207 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X80, alpha) { |
| 9208 | TEST_REQUIRES_X86_AVX512F; |
| 9209 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 9210 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9211 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9212 | .batch_size(batch_size) |
| 9213 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9214 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9215 | } |
| 9216 | } |
| 9217 | } |
| 9218 | |
| 9219 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X80, beta) { |
| 9220 | TEST_REQUIRES_X86_AVX512F; |
| 9221 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 9222 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9223 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9224 | .batch_size(batch_size) |
| 9225 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9226 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9227 | } |
| 9228 | } |
| 9229 | } |
| 9230 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9231 | |
| 9232 | |
| 9233 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9234 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X96, batch_eq_96) { |
| 9235 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9236 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9237 | .batch_size(96) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9238 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9239 | } |
| 9240 | |
| 9241 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X96, batch_div_96) { |
| 9242 | TEST_REQUIRES_X86_AVX512F; |
| 9243 | for (size_t batch_size = 192; batch_size < 960; batch_size += 96) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9244 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9245 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9246 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9247 | } |
| 9248 | } |
| 9249 | |
| 9250 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X96, batch_lt_96) { |
| 9251 | TEST_REQUIRES_X86_AVX512F; |
| 9252 | for (size_t batch_size = 1; batch_size < 96; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9253 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9254 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9255 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9256 | } |
| 9257 | } |
| 9258 | |
| 9259 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X96, batch_gt_96) { |
| 9260 | TEST_REQUIRES_X86_AVX512F; |
| 9261 | for (size_t batch_size = 97; batch_size < 192; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9262 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9263 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9264 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9265 | } |
| 9266 | } |
| 9267 | |
| 9268 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X96, inplace) { |
| 9269 | TEST_REQUIRES_X86_AVX512F; |
| 9270 | for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9271 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9272 | .batch_size(batch_size) |
| 9273 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9274 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9275 | } |
| 9276 | } |
| 9277 | |
| 9278 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X96, prescale) { |
| 9279 | TEST_REQUIRES_X86_AVX512F; |
| 9280 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 9281 | for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9282 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9283 | .batch_size(batch_size) |
| 9284 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9285 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9286 | } |
| 9287 | } |
| 9288 | } |
| 9289 | |
| 9290 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X96, alpha) { |
| 9291 | TEST_REQUIRES_X86_AVX512F; |
| 9292 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 9293 | for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9294 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9295 | .batch_size(batch_size) |
| 9296 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9297 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9298 | } |
| 9299 | } |
| 9300 | } |
| 9301 | |
| 9302 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X96, beta) { |
| 9303 | TEST_REQUIRES_X86_AVX512F; |
| 9304 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 9305 | for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9306 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9307 | .batch_size(batch_size) |
| 9308 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9309 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9310 | } |
| 9311 | } |
| 9312 | } |
| 9313 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9314 | |
| 9315 | |
| 9316 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9317 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X112, batch_eq_112) { |
| 9318 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9319 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9320 | .batch_size(112) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9321 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9322 | } |
| 9323 | |
| 9324 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X112, batch_div_112) { |
| 9325 | TEST_REQUIRES_X86_AVX512F; |
| 9326 | for (size_t batch_size = 224; batch_size < 1120; batch_size += 112) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9327 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9328 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9329 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9330 | } |
| 9331 | } |
| 9332 | |
| 9333 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X112, batch_lt_112) { |
| 9334 | TEST_REQUIRES_X86_AVX512F; |
| 9335 | for (size_t batch_size = 1; batch_size < 112; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9336 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9337 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9338 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9339 | } |
| 9340 | } |
| 9341 | |
| 9342 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X112, batch_gt_112) { |
| 9343 | TEST_REQUIRES_X86_AVX512F; |
| 9344 | for (size_t batch_size = 113; batch_size < 224; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9345 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9346 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9347 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9348 | } |
| 9349 | } |
| 9350 | |
| 9351 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X112, inplace) { |
| 9352 | TEST_REQUIRES_X86_AVX512F; |
| 9353 | for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9354 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9355 | .batch_size(batch_size) |
| 9356 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9357 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9358 | } |
| 9359 | } |
| 9360 | |
| 9361 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X112, prescale) { |
| 9362 | TEST_REQUIRES_X86_AVX512F; |
| 9363 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 9364 | for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9365 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9366 | .batch_size(batch_size) |
| 9367 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9368 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9369 | } |
| 9370 | } |
| 9371 | } |
| 9372 | |
| 9373 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X112, alpha) { |
| 9374 | TEST_REQUIRES_X86_AVX512F; |
| 9375 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 9376 | for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9377 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9378 | .batch_size(batch_size) |
| 9379 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9380 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9381 | } |
| 9382 | } |
| 9383 | } |
| 9384 | |
| 9385 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X112, beta) { |
| 9386 | TEST_REQUIRES_X86_AVX512F; |
| 9387 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 9388 | for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9389 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9390 | .batch_size(batch_size) |
| 9391 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9392 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9393 | } |
| 9394 | } |
| 9395 | } |
| 9396 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9397 | |
| 9398 | |
| 9399 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9400 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X128, batch_eq_128) { |
| 9401 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9402 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9403 | .batch_size(128) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9404 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9405 | } |
| 9406 | |
| 9407 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X128, batch_div_128) { |
| 9408 | TEST_REQUIRES_X86_AVX512F; |
| 9409 | for (size_t batch_size = 256; batch_size < 1280; batch_size += 128) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9410 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9411 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9412 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9413 | } |
| 9414 | } |
| 9415 | |
| 9416 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X128, batch_lt_128) { |
| 9417 | TEST_REQUIRES_X86_AVX512F; |
| 9418 | for (size_t batch_size = 1; batch_size < 128; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9419 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9420 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9421 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9422 | } |
| 9423 | } |
| 9424 | |
| 9425 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X128, batch_gt_128) { |
| 9426 | TEST_REQUIRES_X86_AVX512F; |
| 9427 | for (size_t batch_size = 129; batch_size < 256; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9428 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9429 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9430 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9431 | } |
| 9432 | } |
| 9433 | |
| 9434 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X128, inplace) { |
| 9435 | TEST_REQUIRES_X86_AVX512F; |
| 9436 | for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9437 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9438 | .batch_size(batch_size) |
| 9439 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9440 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9441 | } |
| 9442 | } |
| 9443 | |
| 9444 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X128, prescale) { |
| 9445 | TEST_REQUIRES_X86_AVX512F; |
| 9446 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 9447 | for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9448 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9449 | .batch_size(batch_size) |
| 9450 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9451 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9452 | } |
| 9453 | } |
| 9454 | } |
| 9455 | |
| 9456 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X128, alpha) { |
| 9457 | TEST_REQUIRES_X86_AVX512F; |
| 9458 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 9459 | for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9460 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9461 | .batch_size(batch_size) |
| 9462 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9463 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9464 | } |
| 9465 | } |
| 9466 | } |
| 9467 | |
| 9468 | TEST(F32_VELU__AVX512F_RR1_LUT16_P3_PERM_X128, beta) { |
| 9469 | TEST_REQUIRES_X86_AVX512F; |
| 9470 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 9471 | for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9472 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9473 | .batch_size(batch_size) |
| 9474 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9475 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128, xnn_init_f32_elu_avx512_rr1_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9476 | } |
| 9477 | } |
| 9478 | } |
| 9479 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9480 | |
| 9481 | |
| 9482 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9483 | TEST(F32_VELU__AVX512F_RR1_P6_X16, batch_eq_16) { |
| 9484 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9485 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9486 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9487 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x16, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9488 | } |
| 9489 | |
| 9490 | TEST(F32_VELU__AVX512F_RR1_P6_X16, batch_div_16) { |
| 9491 | TEST_REQUIRES_X86_AVX512F; |
| 9492 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9493 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9494 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9495 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x16, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9496 | } |
| 9497 | } |
| 9498 | |
| 9499 | TEST(F32_VELU__AVX512F_RR1_P6_X16, batch_lt_16) { |
| 9500 | TEST_REQUIRES_X86_AVX512F; |
| 9501 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9502 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9503 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9504 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x16, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9505 | } |
| 9506 | } |
| 9507 | |
| 9508 | TEST(F32_VELU__AVX512F_RR1_P6_X16, batch_gt_16) { |
| 9509 | TEST_REQUIRES_X86_AVX512F; |
| 9510 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9511 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9512 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9513 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x16, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9514 | } |
| 9515 | } |
| 9516 | |
| 9517 | TEST(F32_VELU__AVX512F_RR1_P6_X16, inplace) { |
| 9518 | TEST_REQUIRES_X86_AVX512F; |
| 9519 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9520 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9521 | .batch_size(batch_size) |
| 9522 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9523 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x16, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9524 | } |
| 9525 | } |
| 9526 | |
| 9527 | TEST(F32_VELU__AVX512F_RR1_P6_X16, prescale) { |
| 9528 | TEST_REQUIRES_X86_AVX512F; |
| 9529 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 9530 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9531 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9532 | .batch_size(batch_size) |
| 9533 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9534 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x16, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9535 | } |
| 9536 | } |
| 9537 | } |
| 9538 | |
| 9539 | TEST(F32_VELU__AVX512F_RR1_P6_X16, alpha) { |
| 9540 | TEST_REQUIRES_X86_AVX512F; |
| 9541 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 9542 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9543 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9544 | .batch_size(batch_size) |
| 9545 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9546 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x16, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9547 | } |
| 9548 | } |
| 9549 | } |
| 9550 | |
| 9551 | TEST(F32_VELU__AVX512F_RR1_P6_X16, beta) { |
| 9552 | TEST_REQUIRES_X86_AVX512F; |
| 9553 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 9554 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9555 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9556 | .batch_size(batch_size) |
| 9557 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9558 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x16, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9559 | } |
| 9560 | } |
| 9561 | } |
| 9562 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9563 | |
| 9564 | |
| 9565 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9566 | TEST(F32_VELU__AVX512F_RR1_P6_X32, batch_eq_32) { |
| 9567 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9568 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9569 | .batch_size(32) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9570 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x32, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9571 | } |
| 9572 | |
| 9573 | TEST(F32_VELU__AVX512F_RR1_P6_X32, batch_div_32) { |
| 9574 | TEST_REQUIRES_X86_AVX512F; |
| 9575 | for (size_t batch_size = 64; batch_size < 320; batch_size += 32) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9576 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9577 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9578 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x32, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9579 | } |
| 9580 | } |
| 9581 | |
| 9582 | TEST(F32_VELU__AVX512F_RR1_P6_X32, batch_lt_32) { |
| 9583 | TEST_REQUIRES_X86_AVX512F; |
| 9584 | for (size_t batch_size = 1; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9585 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9586 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9587 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x32, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9588 | } |
| 9589 | } |
| 9590 | |
| 9591 | TEST(F32_VELU__AVX512F_RR1_P6_X32, batch_gt_32) { |
| 9592 | TEST_REQUIRES_X86_AVX512F; |
| 9593 | for (size_t batch_size = 33; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9594 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9595 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9596 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x32, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9597 | } |
| 9598 | } |
| 9599 | |
| 9600 | TEST(F32_VELU__AVX512F_RR1_P6_X32, inplace) { |
| 9601 | TEST_REQUIRES_X86_AVX512F; |
| 9602 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9603 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9604 | .batch_size(batch_size) |
| 9605 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9606 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x32, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9607 | } |
| 9608 | } |
| 9609 | |
| 9610 | TEST(F32_VELU__AVX512F_RR1_P6_X32, prescale) { |
| 9611 | TEST_REQUIRES_X86_AVX512F; |
| 9612 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 9613 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9614 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9615 | .batch_size(batch_size) |
| 9616 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9617 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x32, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9618 | } |
| 9619 | } |
| 9620 | } |
| 9621 | |
| 9622 | TEST(F32_VELU__AVX512F_RR1_P6_X32, alpha) { |
| 9623 | TEST_REQUIRES_X86_AVX512F; |
| 9624 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 9625 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9626 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9627 | .batch_size(batch_size) |
| 9628 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9629 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x32, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9630 | } |
| 9631 | } |
| 9632 | } |
| 9633 | |
| 9634 | TEST(F32_VELU__AVX512F_RR1_P6_X32, beta) { |
| 9635 | TEST_REQUIRES_X86_AVX512F; |
| 9636 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 9637 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9638 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9639 | .batch_size(batch_size) |
| 9640 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9641 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x32, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9642 | } |
| 9643 | } |
| 9644 | } |
| 9645 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9646 | |
| 9647 | |
| 9648 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9649 | TEST(F32_VELU__AVX512F_RR1_P6_X48, batch_eq_48) { |
| 9650 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9651 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9652 | .batch_size(48) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9653 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x48, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9654 | } |
| 9655 | |
| 9656 | TEST(F32_VELU__AVX512F_RR1_P6_X48, batch_div_48) { |
| 9657 | TEST_REQUIRES_X86_AVX512F; |
| 9658 | for (size_t batch_size = 96; batch_size < 480; batch_size += 48) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9659 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9660 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9661 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x48, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9662 | } |
| 9663 | } |
| 9664 | |
| 9665 | TEST(F32_VELU__AVX512F_RR1_P6_X48, batch_lt_48) { |
| 9666 | TEST_REQUIRES_X86_AVX512F; |
| 9667 | for (size_t batch_size = 1; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9668 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9669 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9670 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x48, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9671 | } |
| 9672 | } |
| 9673 | |
| 9674 | TEST(F32_VELU__AVX512F_RR1_P6_X48, batch_gt_48) { |
| 9675 | TEST_REQUIRES_X86_AVX512F; |
| 9676 | for (size_t batch_size = 49; batch_size < 96; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9677 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9678 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9679 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x48, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9680 | } |
| 9681 | } |
| 9682 | |
| 9683 | TEST(F32_VELU__AVX512F_RR1_P6_X48, inplace) { |
| 9684 | TEST_REQUIRES_X86_AVX512F; |
| 9685 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9686 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9687 | .batch_size(batch_size) |
| 9688 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9689 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x48, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9690 | } |
| 9691 | } |
| 9692 | |
| 9693 | TEST(F32_VELU__AVX512F_RR1_P6_X48, prescale) { |
| 9694 | TEST_REQUIRES_X86_AVX512F; |
| 9695 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 9696 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9697 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9698 | .batch_size(batch_size) |
| 9699 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9700 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x48, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9701 | } |
| 9702 | } |
| 9703 | } |
| 9704 | |
| 9705 | TEST(F32_VELU__AVX512F_RR1_P6_X48, alpha) { |
| 9706 | TEST_REQUIRES_X86_AVX512F; |
| 9707 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 9708 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9709 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9710 | .batch_size(batch_size) |
| 9711 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9712 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x48, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9713 | } |
| 9714 | } |
| 9715 | } |
| 9716 | |
| 9717 | TEST(F32_VELU__AVX512F_RR1_P6_X48, beta) { |
| 9718 | TEST_REQUIRES_X86_AVX512F; |
| 9719 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 9720 | for (size_t batch_size = 1; batch_size <= 240; batch_size += 47) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9721 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9722 | .batch_size(batch_size) |
| 9723 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9724 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x48, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9725 | } |
| 9726 | } |
| 9727 | } |
| 9728 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9729 | |
| 9730 | |
| 9731 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9732 | TEST(F32_VELU__AVX512F_RR1_P6_X64, batch_eq_64) { |
| 9733 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9734 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9735 | .batch_size(64) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9736 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x64, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9737 | } |
| 9738 | |
| 9739 | TEST(F32_VELU__AVX512F_RR1_P6_X64, batch_div_64) { |
| 9740 | TEST_REQUIRES_X86_AVX512F; |
| 9741 | for (size_t batch_size = 128; batch_size < 640; batch_size += 64) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9742 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9743 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9744 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x64, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9745 | } |
| 9746 | } |
| 9747 | |
| 9748 | TEST(F32_VELU__AVX512F_RR1_P6_X64, batch_lt_64) { |
| 9749 | TEST_REQUIRES_X86_AVX512F; |
| 9750 | for (size_t batch_size = 1; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9751 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9752 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9753 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x64, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9754 | } |
| 9755 | } |
| 9756 | |
| 9757 | TEST(F32_VELU__AVX512F_RR1_P6_X64, batch_gt_64) { |
| 9758 | TEST_REQUIRES_X86_AVX512F; |
| 9759 | for (size_t batch_size = 65; batch_size < 128; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9760 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9761 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9762 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x64, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9763 | } |
| 9764 | } |
| 9765 | |
| 9766 | TEST(F32_VELU__AVX512F_RR1_P6_X64, inplace) { |
| 9767 | TEST_REQUIRES_X86_AVX512F; |
| 9768 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9769 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9770 | .batch_size(batch_size) |
| 9771 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9772 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x64, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9773 | } |
| 9774 | } |
| 9775 | |
| 9776 | TEST(F32_VELU__AVX512F_RR1_P6_X64, prescale) { |
| 9777 | TEST_REQUIRES_X86_AVX512F; |
| 9778 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 9779 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9780 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9781 | .batch_size(batch_size) |
| 9782 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9783 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x64, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9784 | } |
| 9785 | } |
| 9786 | } |
| 9787 | |
| 9788 | TEST(F32_VELU__AVX512F_RR1_P6_X64, alpha) { |
| 9789 | TEST_REQUIRES_X86_AVX512F; |
| 9790 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 9791 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9792 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9793 | .batch_size(batch_size) |
| 9794 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9795 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x64, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9796 | } |
| 9797 | } |
| 9798 | } |
| 9799 | |
| 9800 | TEST(F32_VELU__AVX512F_RR1_P6_X64, beta) { |
| 9801 | TEST_REQUIRES_X86_AVX512F; |
| 9802 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 9803 | for (size_t batch_size = 1; batch_size <= 320; batch_size += 63) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9804 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9805 | .batch_size(batch_size) |
| 9806 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9807 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x64, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9808 | } |
| 9809 | } |
| 9810 | } |
| 9811 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9812 | |
| 9813 | |
| 9814 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9815 | TEST(F32_VELU__AVX512F_RR1_P6_X80, batch_eq_80) { |
| 9816 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9817 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9818 | .batch_size(80) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9819 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x80, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9820 | } |
| 9821 | |
| 9822 | TEST(F32_VELU__AVX512F_RR1_P6_X80, batch_div_80) { |
| 9823 | TEST_REQUIRES_X86_AVX512F; |
| 9824 | for (size_t batch_size = 160; batch_size < 800; batch_size += 80) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9825 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9826 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9827 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x80, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9828 | } |
| 9829 | } |
| 9830 | |
| 9831 | TEST(F32_VELU__AVX512F_RR1_P6_X80, batch_lt_80) { |
| 9832 | TEST_REQUIRES_X86_AVX512F; |
| 9833 | for (size_t batch_size = 1; batch_size < 80; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9834 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9835 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9836 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x80, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9837 | } |
| 9838 | } |
| 9839 | |
| 9840 | TEST(F32_VELU__AVX512F_RR1_P6_X80, batch_gt_80) { |
| 9841 | TEST_REQUIRES_X86_AVX512F; |
| 9842 | for (size_t batch_size = 81; batch_size < 160; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9843 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9844 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9845 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x80, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9846 | } |
| 9847 | } |
| 9848 | |
| 9849 | TEST(F32_VELU__AVX512F_RR1_P6_X80, inplace) { |
| 9850 | TEST_REQUIRES_X86_AVX512F; |
| 9851 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9852 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9853 | .batch_size(batch_size) |
| 9854 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9855 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x80, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9856 | } |
| 9857 | } |
| 9858 | |
| 9859 | TEST(F32_VELU__AVX512F_RR1_P6_X80, prescale) { |
| 9860 | TEST_REQUIRES_X86_AVX512F; |
| 9861 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 9862 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9863 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9864 | .batch_size(batch_size) |
| 9865 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9866 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x80, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9867 | } |
| 9868 | } |
| 9869 | } |
| 9870 | |
| 9871 | TEST(F32_VELU__AVX512F_RR1_P6_X80, alpha) { |
| 9872 | TEST_REQUIRES_X86_AVX512F; |
| 9873 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 9874 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9875 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9876 | .batch_size(batch_size) |
| 9877 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9878 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x80, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9879 | } |
| 9880 | } |
| 9881 | } |
| 9882 | |
| 9883 | TEST(F32_VELU__AVX512F_RR1_P6_X80, beta) { |
| 9884 | TEST_REQUIRES_X86_AVX512F; |
| 9885 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 9886 | for (size_t batch_size = 1; batch_size <= 400; batch_size += 79) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9887 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9888 | .batch_size(batch_size) |
| 9889 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9890 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x80, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9891 | } |
| 9892 | } |
| 9893 | } |
| 9894 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9895 | |
| 9896 | |
| 9897 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9898 | TEST(F32_VELU__AVX512F_RR1_P6_X96, batch_eq_96) { |
| 9899 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9900 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9901 | .batch_size(96) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9902 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x96, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9903 | } |
| 9904 | |
| 9905 | TEST(F32_VELU__AVX512F_RR1_P6_X96, batch_div_96) { |
| 9906 | TEST_REQUIRES_X86_AVX512F; |
| 9907 | for (size_t batch_size = 192; batch_size < 960; batch_size += 96) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9908 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9909 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9910 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x96, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9911 | } |
| 9912 | } |
| 9913 | |
| 9914 | TEST(F32_VELU__AVX512F_RR1_P6_X96, batch_lt_96) { |
| 9915 | TEST_REQUIRES_X86_AVX512F; |
| 9916 | for (size_t batch_size = 1; batch_size < 96; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9917 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9918 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9919 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x96, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9920 | } |
| 9921 | } |
| 9922 | |
| 9923 | TEST(F32_VELU__AVX512F_RR1_P6_X96, batch_gt_96) { |
| 9924 | TEST_REQUIRES_X86_AVX512F; |
| 9925 | for (size_t batch_size = 97; batch_size < 192; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9926 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9927 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9928 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x96, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9929 | } |
| 9930 | } |
| 9931 | |
| 9932 | TEST(F32_VELU__AVX512F_RR1_P6_X96, inplace) { |
| 9933 | TEST_REQUIRES_X86_AVX512F; |
| 9934 | for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9935 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9936 | .batch_size(batch_size) |
| 9937 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9938 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x96, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9939 | } |
| 9940 | } |
| 9941 | |
| 9942 | TEST(F32_VELU__AVX512F_RR1_P6_X96, prescale) { |
| 9943 | TEST_REQUIRES_X86_AVX512F; |
| 9944 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 9945 | for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9946 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9947 | .batch_size(batch_size) |
| 9948 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9949 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x96, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9950 | } |
| 9951 | } |
| 9952 | } |
| 9953 | |
| 9954 | TEST(F32_VELU__AVX512F_RR1_P6_X96, alpha) { |
| 9955 | TEST_REQUIRES_X86_AVX512F; |
| 9956 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 9957 | for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9958 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9959 | .batch_size(batch_size) |
| 9960 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9961 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x96, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9962 | } |
| 9963 | } |
| 9964 | } |
| 9965 | |
| 9966 | TEST(F32_VELU__AVX512F_RR1_P6_X96, beta) { |
| 9967 | TEST_REQUIRES_X86_AVX512F; |
| 9968 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 9969 | for (size_t batch_size = 1; batch_size <= 480; batch_size += 95) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9970 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9971 | .batch_size(batch_size) |
| 9972 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9973 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x96, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9974 | } |
| 9975 | } |
| 9976 | } |
| 9977 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9978 | |
| 9979 | |
| 9980 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 9981 | TEST(F32_VELU__AVX512F_RR1_P6_X112, batch_eq_112) { |
| 9982 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9983 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9984 | .batch_size(112) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9985 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x112, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9986 | } |
| 9987 | |
| 9988 | TEST(F32_VELU__AVX512F_RR1_P6_X112, batch_div_112) { |
| 9989 | TEST_REQUIRES_X86_AVX512F; |
| 9990 | for (size_t batch_size = 224; batch_size < 1120; batch_size += 112) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 9991 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9992 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 9993 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x112, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 9994 | } |
| 9995 | } |
| 9996 | |
| 9997 | TEST(F32_VELU__AVX512F_RR1_P6_X112, batch_lt_112) { |
| 9998 | TEST_REQUIRES_X86_AVX512F; |
| 9999 | for (size_t batch_size = 1; batch_size < 112; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10000 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10001 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10002 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x112, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10003 | } |
| 10004 | } |
| 10005 | |
| 10006 | TEST(F32_VELU__AVX512F_RR1_P6_X112, batch_gt_112) { |
| 10007 | TEST_REQUIRES_X86_AVX512F; |
| 10008 | for (size_t batch_size = 113; batch_size < 224; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10009 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10010 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10011 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x112, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10012 | } |
| 10013 | } |
| 10014 | |
| 10015 | TEST(F32_VELU__AVX512F_RR1_P6_X112, inplace) { |
| 10016 | TEST_REQUIRES_X86_AVX512F; |
| 10017 | for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10018 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10019 | .batch_size(batch_size) |
| 10020 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10021 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x112, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10022 | } |
| 10023 | } |
| 10024 | |
| 10025 | TEST(F32_VELU__AVX512F_RR1_P6_X112, prescale) { |
| 10026 | TEST_REQUIRES_X86_AVX512F; |
| 10027 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 10028 | for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10029 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10030 | .batch_size(batch_size) |
| 10031 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10032 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x112, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10033 | } |
| 10034 | } |
| 10035 | } |
| 10036 | |
| 10037 | TEST(F32_VELU__AVX512F_RR1_P6_X112, alpha) { |
| 10038 | TEST_REQUIRES_X86_AVX512F; |
| 10039 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 10040 | for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10041 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10042 | .batch_size(batch_size) |
| 10043 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10044 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x112, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10045 | } |
| 10046 | } |
| 10047 | } |
| 10048 | |
| 10049 | TEST(F32_VELU__AVX512F_RR1_P6_X112, beta) { |
| 10050 | TEST_REQUIRES_X86_AVX512F; |
| 10051 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 10052 | for (size_t batch_size = 1; batch_size <= 560; batch_size += 111) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10053 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10054 | .batch_size(batch_size) |
| 10055 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10056 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x112, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10057 | } |
| 10058 | } |
| 10059 | } |
| 10060 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 10061 | |
| 10062 | |
| 10063 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 10064 | TEST(F32_VELU__AVX512F_RR1_P6_X128, batch_eq_128) { |
| 10065 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10066 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10067 | .batch_size(128) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10068 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x128, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10069 | } |
| 10070 | |
| 10071 | TEST(F32_VELU__AVX512F_RR1_P6_X128, batch_div_128) { |
| 10072 | TEST_REQUIRES_X86_AVX512F; |
| 10073 | for (size_t batch_size = 256; batch_size < 1280; batch_size += 128) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10074 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10075 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10076 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x128, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10077 | } |
| 10078 | } |
| 10079 | |
| 10080 | TEST(F32_VELU__AVX512F_RR1_P6_X128, batch_lt_128) { |
| 10081 | TEST_REQUIRES_X86_AVX512F; |
| 10082 | for (size_t batch_size = 1; batch_size < 128; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10083 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10084 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10085 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x128, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10086 | } |
| 10087 | } |
| 10088 | |
| 10089 | TEST(F32_VELU__AVX512F_RR1_P6_X128, batch_gt_128) { |
| 10090 | TEST_REQUIRES_X86_AVX512F; |
| 10091 | for (size_t batch_size = 129; batch_size < 256; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10092 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10093 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10094 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x128, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10095 | } |
| 10096 | } |
| 10097 | |
| 10098 | TEST(F32_VELU__AVX512F_RR1_P6_X128, inplace) { |
| 10099 | TEST_REQUIRES_X86_AVX512F; |
| 10100 | for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10101 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10102 | .batch_size(batch_size) |
| 10103 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10104 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x128, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10105 | } |
| 10106 | } |
| 10107 | |
| 10108 | TEST(F32_VELU__AVX512F_RR1_P6_X128, prescale) { |
| 10109 | TEST_REQUIRES_X86_AVX512F; |
| 10110 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 10111 | for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10112 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10113 | .batch_size(batch_size) |
| 10114 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10115 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x128, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10116 | } |
| 10117 | } |
| 10118 | } |
| 10119 | |
| 10120 | TEST(F32_VELU__AVX512F_RR1_P6_X128, alpha) { |
| 10121 | TEST_REQUIRES_X86_AVX512F; |
| 10122 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 10123 | for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10124 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10125 | .batch_size(batch_size) |
| 10126 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10127 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x128, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10128 | } |
| 10129 | } |
| 10130 | } |
| 10131 | |
| 10132 | TEST(F32_VELU__AVX512F_RR1_P6_X128, beta) { |
| 10133 | TEST_REQUIRES_X86_AVX512F; |
| 10134 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 10135 | for (size_t batch_size = 1; batch_size <= 640; batch_size += 127) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10136 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10137 | .batch_size(batch_size) |
| 10138 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10139 | .Test(xnn_f32_velu_ukernel__avx512f_rr1_p6_x128, xnn_init_f32_elu_avx512_rr1_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10140 | } |
| 10141 | } |
| 10142 | } |
| 10143 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 10144 | |
| 10145 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10146 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10147 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10148 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10149 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10150 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10151 | } |
| 10152 | |
| 10153 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X4, batch_div_4) { |
| 10154 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10155 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10156 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10157 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10158 | } |
| 10159 | } |
| 10160 | |
| 10161 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X4, batch_lt_4) { |
| 10162 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10163 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10164 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10165 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10166 | } |
| 10167 | } |
| 10168 | |
| 10169 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X4, batch_gt_4) { |
| 10170 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10171 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10172 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10173 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10174 | } |
| 10175 | } |
| 10176 | |
| 10177 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X4, inplace) { |
| 10178 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10179 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10180 | .batch_size(batch_size) |
| 10181 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10182 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10183 | } |
| 10184 | } |
| 10185 | |
| 10186 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X4, prescale) { |
| 10187 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 10188 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10189 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10190 | .batch_size(batch_size) |
| 10191 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10192 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10193 | } |
| 10194 | } |
| 10195 | } |
| 10196 | |
| 10197 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X4, alpha) { |
| 10198 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 10199 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10200 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10201 | .batch_size(batch_size) |
| 10202 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10203 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10204 | } |
| 10205 | } |
| 10206 | } |
| 10207 | |
| 10208 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X4, beta) { |
| 10209 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 10210 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10211 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10212 | .batch_size(batch_size) |
| 10213 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10214 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10215 | } |
| 10216 | } |
| 10217 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10218 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10219 | |
| 10220 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10221 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10222 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X8, batch_eq_8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10223 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10224 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10225 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10226 | } |
| 10227 | |
| 10228 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X8, batch_div_8) { |
| 10229 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10230 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10231 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10232 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10233 | } |
| 10234 | } |
| 10235 | |
| 10236 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X8, batch_lt_8) { |
| 10237 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10238 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10239 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10240 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10241 | } |
| 10242 | } |
| 10243 | |
| 10244 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X8, batch_gt_8) { |
| 10245 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10246 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10247 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10248 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10249 | } |
| 10250 | } |
| 10251 | |
| 10252 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X8, inplace) { |
| 10253 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10254 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10255 | .batch_size(batch_size) |
| 10256 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10257 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10258 | } |
| 10259 | } |
| 10260 | |
| 10261 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X8, prescale) { |
| 10262 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 10263 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10264 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10265 | .batch_size(batch_size) |
| 10266 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10267 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10268 | } |
| 10269 | } |
| 10270 | } |
| 10271 | |
| 10272 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X8, alpha) { |
| 10273 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 10274 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10275 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10276 | .batch_size(batch_size) |
| 10277 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10278 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10279 | } |
| 10280 | } |
| 10281 | } |
| 10282 | |
| 10283 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X8, beta) { |
| 10284 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 10285 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10286 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10287 | .batch_size(batch_size) |
| 10288 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10289 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10290 | } |
| 10291 | } |
| 10292 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10293 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10294 | |
| 10295 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10296 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10297 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X12, batch_eq_12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10298 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10299 | .batch_size(12) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10300 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10301 | } |
| 10302 | |
| 10303 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X12, batch_div_12) { |
| 10304 | for (size_t batch_size = 24; batch_size < 120; batch_size += 12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10305 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10306 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10307 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10308 | } |
| 10309 | } |
| 10310 | |
| 10311 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X12, batch_lt_12) { |
| 10312 | for (size_t batch_size = 1; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10313 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10314 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10315 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10316 | } |
| 10317 | } |
| 10318 | |
| 10319 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X12, batch_gt_12) { |
| 10320 | for (size_t batch_size = 13; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10321 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10322 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10323 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10324 | } |
| 10325 | } |
| 10326 | |
| 10327 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X12, inplace) { |
| 10328 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10329 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10330 | .batch_size(batch_size) |
| 10331 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10332 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10333 | } |
| 10334 | } |
| 10335 | |
| 10336 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X12, prescale) { |
| 10337 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 10338 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10339 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10340 | .batch_size(batch_size) |
| 10341 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10342 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10343 | } |
| 10344 | } |
| 10345 | } |
| 10346 | |
| 10347 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X12, alpha) { |
| 10348 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 10349 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10350 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10351 | .batch_size(batch_size) |
| 10352 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10353 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10354 | } |
| 10355 | } |
| 10356 | } |
| 10357 | |
| 10358 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X12, beta) { |
| 10359 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 10360 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10361 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10362 | .batch_size(batch_size) |
| 10363 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10364 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10365 | } |
| 10366 | } |
| 10367 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10368 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10369 | |
| 10370 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10371 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10372 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X16, batch_eq_16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10373 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10374 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10375 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10376 | } |
| 10377 | |
| 10378 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X16, batch_div_16) { |
| 10379 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10380 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10381 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10382 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10383 | } |
| 10384 | } |
| 10385 | |
| 10386 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X16, batch_lt_16) { |
| 10387 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10388 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10389 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10390 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10391 | } |
| 10392 | } |
| 10393 | |
| 10394 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X16, batch_gt_16) { |
| 10395 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10396 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10397 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10398 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10399 | } |
| 10400 | } |
| 10401 | |
| 10402 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X16, inplace) { |
| 10403 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10404 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10405 | .batch_size(batch_size) |
| 10406 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10407 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10408 | } |
| 10409 | } |
| 10410 | |
| 10411 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X16, prescale) { |
| 10412 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 10413 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10414 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10415 | .batch_size(batch_size) |
| 10416 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10417 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10418 | } |
| 10419 | } |
| 10420 | } |
| 10421 | |
| 10422 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X16, alpha) { |
| 10423 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 10424 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10425 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10426 | .batch_size(batch_size) |
| 10427 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10428 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10429 | } |
| 10430 | } |
| 10431 | } |
| 10432 | |
| 10433 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X16, beta) { |
| 10434 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 10435 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10436 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10437 | .batch_size(batch_size) |
| 10438 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10439 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10440 | } |
| 10441 | } |
| 10442 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10443 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10444 | |
| 10445 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10446 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10447 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X20, batch_eq_20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10448 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10449 | .batch_size(20) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10450 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10451 | } |
| 10452 | |
| 10453 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X20, batch_div_20) { |
| 10454 | for (size_t batch_size = 40; batch_size < 200; batch_size += 20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10455 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10456 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10457 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10458 | } |
| 10459 | } |
| 10460 | |
| 10461 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X20, batch_lt_20) { |
| 10462 | for (size_t batch_size = 1; batch_size < 20; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10463 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10464 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10465 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10466 | } |
| 10467 | } |
| 10468 | |
| 10469 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X20, batch_gt_20) { |
| 10470 | for (size_t batch_size = 21; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10471 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10472 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10473 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10474 | } |
| 10475 | } |
| 10476 | |
| 10477 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X20, inplace) { |
| 10478 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10479 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10480 | .batch_size(batch_size) |
| 10481 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10482 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10483 | } |
| 10484 | } |
| 10485 | |
| 10486 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X20, prescale) { |
| 10487 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 10488 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10489 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10490 | .batch_size(batch_size) |
| 10491 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10492 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10493 | } |
| 10494 | } |
| 10495 | } |
| 10496 | |
| 10497 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X20, alpha) { |
| 10498 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 10499 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10500 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10501 | .batch_size(batch_size) |
| 10502 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10503 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10504 | } |
| 10505 | } |
| 10506 | } |
| 10507 | |
| 10508 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X20, beta) { |
| 10509 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 10510 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10511 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10512 | .batch_size(batch_size) |
| 10513 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10514 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10515 | } |
| 10516 | } |
| 10517 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10518 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10519 | |
| 10520 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10521 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10522 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X24, batch_eq_24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10523 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10524 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10525 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10526 | } |
| 10527 | |
| 10528 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X24, batch_div_24) { |
| 10529 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10530 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10531 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10532 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10533 | } |
| 10534 | } |
| 10535 | |
| 10536 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X24, batch_lt_24) { |
| 10537 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10538 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10539 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10540 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10541 | } |
| 10542 | } |
| 10543 | |
| 10544 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X24, batch_gt_24) { |
| 10545 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10546 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10547 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10548 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10549 | } |
| 10550 | } |
| 10551 | |
| 10552 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X24, inplace) { |
| 10553 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10554 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10555 | .batch_size(batch_size) |
| 10556 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10557 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10558 | } |
| 10559 | } |
| 10560 | |
| 10561 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X24, prescale) { |
| 10562 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 10563 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10564 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10565 | .batch_size(batch_size) |
| 10566 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10567 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10568 | } |
| 10569 | } |
| 10570 | } |
| 10571 | |
| 10572 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X24, alpha) { |
| 10573 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 10574 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10575 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10576 | .batch_size(batch_size) |
| 10577 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10578 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10579 | } |
| 10580 | } |
| 10581 | } |
| 10582 | |
| 10583 | TEST(F32_VELU__WASMSIMD_ARM_RR2_LUT16_P3_X24, beta) { |
| 10584 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 10585 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10586 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10587 | .batch_size(batch_size) |
| 10588 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10589 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10590 | } |
| 10591 | } |
| 10592 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10593 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10594 | |
| 10595 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10596 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10597 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10598 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10599 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10600 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10601 | } |
| 10602 | |
| 10603 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X4, batch_div_4) { |
| 10604 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10605 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10606 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10607 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10608 | } |
| 10609 | } |
| 10610 | |
| 10611 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X4, batch_lt_4) { |
| 10612 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10613 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10614 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10615 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10616 | } |
| 10617 | } |
| 10618 | |
| 10619 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X4, batch_gt_4) { |
| 10620 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10621 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10622 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10623 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10624 | } |
| 10625 | } |
| 10626 | |
| 10627 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X4, inplace) { |
| 10628 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10629 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10630 | .batch_size(batch_size) |
| 10631 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10632 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10633 | } |
| 10634 | } |
| 10635 | |
| 10636 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X4, prescale) { |
| 10637 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 10638 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10639 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10640 | .batch_size(batch_size) |
| 10641 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10642 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10643 | } |
| 10644 | } |
| 10645 | } |
| 10646 | |
| 10647 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X4, alpha) { |
| 10648 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 10649 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10650 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10651 | .batch_size(batch_size) |
| 10652 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10653 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10654 | } |
| 10655 | } |
| 10656 | } |
| 10657 | |
| 10658 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X4, beta) { |
| 10659 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 10660 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10661 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10662 | .batch_size(batch_size) |
| 10663 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10664 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x4, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10665 | } |
| 10666 | } |
| 10667 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10668 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10669 | |
| 10670 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10671 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10672 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X8, batch_eq_8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10673 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10674 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10675 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10676 | } |
| 10677 | |
| 10678 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X8, batch_div_8) { |
| 10679 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10680 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10681 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10682 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10683 | } |
| 10684 | } |
| 10685 | |
| 10686 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X8, batch_lt_8) { |
| 10687 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10688 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10689 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10690 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10691 | } |
| 10692 | } |
| 10693 | |
| 10694 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X8, batch_gt_8) { |
| 10695 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10696 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10697 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10698 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10699 | } |
| 10700 | } |
| 10701 | |
| 10702 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X8, inplace) { |
| 10703 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10704 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10705 | .batch_size(batch_size) |
| 10706 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10707 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10708 | } |
| 10709 | } |
| 10710 | |
| 10711 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X8, prescale) { |
| 10712 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 10713 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10714 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10715 | .batch_size(batch_size) |
| 10716 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10717 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10718 | } |
| 10719 | } |
| 10720 | } |
| 10721 | |
| 10722 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X8, alpha) { |
| 10723 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 10724 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10725 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10726 | .batch_size(batch_size) |
| 10727 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10728 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10729 | } |
| 10730 | } |
| 10731 | } |
| 10732 | |
| 10733 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X8, beta) { |
| 10734 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 10735 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10736 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10737 | .batch_size(batch_size) |
| 10738 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10739 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x8, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10740 | } |
| 10741 | } |
| 10742 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10743 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10744 | |
| 10745 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10746 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10747 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X12, batch_eq_12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10748 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10749 | .batch_size(12) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10750 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10751 | } |
| 10752 | |
| 10753 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X12, batch_div_12) { |
| 10754 | for (size_t batch_size = 24; batch_size < 120; batch_size += 12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10755 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10756 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10757 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10758 | } |
| 10759 | } |
| 10760 | |
| 10761 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X12, batch_lt_12) { |
| 10762 | for (size_t batch_size = 1; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10763 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10764 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10765 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10766 | } |
| 10767 | } |
| 10768 | |
| 10769 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X12, batch_gt_12) { |
| 10770 | for (size_t batch_size = 13; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10771 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10772 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10773 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10774 | } |
| 10775 | } |
| 10776 | |
| 10777 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X12, inplace) { |
| 10778 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10779 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10780 | .batch_size(batch_size) |
| 10781 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10782 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10783 | } |
| 10784 | } |
| 10785 | |
| 10786 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X12, prescale) { |
| 10787 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 10788 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10789 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10790 | .batch_size(batch_size) |
| 10791 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10792 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10793 | } |
| 10794 | } |
| 10795 | } |
| 10796 | |
| 10797 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X12, alpha) { |
| 10798 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 10799 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10800 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10801 | .batch_size(batch_size) |
| 10802 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10803 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10804 | } |
| 10805 | } |
| 10806 | } |
| 10807 | |
| 10808 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X12, beta) { |
| 10809 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 10810 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10811 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10812 | .batch_size(batch_size) |
| 10813 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10814 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x12, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10815 | } |
| 10816 | } |
| 10817 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10818 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10819 | |
| 10820 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10821 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10822 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X16, batch_eq_16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10823 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10824 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10825 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10826 | } |
| 10827 | |
| 10828 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X16, batch_div_16) { |
| 10829 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10830 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10831 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10832 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10833 | } |
| 10834 | } |
| 10835 | |
| 10836 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X16, batch_lt_16) { |
| 10837 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10838 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10839 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10840 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10841 | } |
| 10842 | } |
| 10843 | |
| 10844 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X16, batch_gt_16) { |
| 10845 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10846 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10847 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10848 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10849 | } |
| 10850 | } |
| 10851 | |
| 10852 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X16, inplace) { |
| 10853 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10854 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10855 | .batch_size(batch_size) |
| 10856 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10857 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10858 | } |
| 10859 | } |
| 10860 | |
| 10861 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X16, prescale) { |
| 10862 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 10863 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10864 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10865 | .batch_size(batch_size) |
| 10866 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10867 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10868 | } |
| 10869 | } |
| 10870 | } |
| 10871 | |
| 10872 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X16, alpha) { |
| 10873 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 10874 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10875 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10876 | .batch_size(batch_size) |
| 10877 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10878 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10879 | } |
| 10880 | } |
| 10881 | } |
| 10882 | |
| 10883 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X16, beta) { |
| 10884 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 10885 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10886 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10887 | .batch_size(batch_size) |
| 10888 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10889 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x16, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10890 | } |
| 10891 | } |
| 10892 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10893 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10894 | |
| 10895 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10896 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10897 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X20, batch_eq_20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10898 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10899 | .batch_size(20) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10900 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10901 | } |
| 10902 | |
| 10903 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X20, batch_div_20) { |
| 10904 | for (size_t batch_size = 40; batch_size < 200; batch_size += 20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10905 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10906 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10907 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10908 | } |
| 10909 | } |
| 10910 | |
| 10911 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X20, batch_lt_20) { |
| 10912 | for (size_t batch_size = 1; batch_size < 20; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10913 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10914 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10915 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10916 | } |
| 10917 | } |
| 10918 | |
| 10919 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X20, batch_gt_20) { |
| 10920 | for (size_t batch_size = 21; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10921 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10922 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10923 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10924 | } |
| 10925 | } |
| 10926 | |
| 10927 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X20, inplace) { |
| 10928 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10929 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10930 | .batch_size(batch_size) |
| 10931 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10932 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10933 | } |
| 10934 | } |
| 10935 | |
| 10936 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X20, prescale) { |
| 10937 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 10938 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10939 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10940 | .batch_size(batch_size) |
| 10941 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10942 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10943 | } |
| 10944 | } |
| 10945 | } |
| 10946 | |
| 10947 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X20, alpha) { |
| 10948 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 10949 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10950 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10951 | .batch_size(batch_size) |
| 10952 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10953 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10954 | } |
| 10955 | } |
| 10956 | } |
| 10957 | |
| 10958 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X20, beta) { |
| 10959 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 10960 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10961 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10962 | .batch_size(batch_size) |
| 10963 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10964 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x20, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10965 | } |
| 10966 | } |
| 10967 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10968 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10969 | |
| 10970 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 10971 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10972 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X24, batch_eq_24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10973 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10974 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10975 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10976 | } |
| 10977 | |
| 10978 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X24, batch_div_24) { |
| 10979 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10980 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10981 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10982 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10983 | } |
| 10984 | } |
| 10985 | |
| 10986 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X24, batch_lt_24) { |
| 10987 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10988 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10989 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10990 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10991 | } |
| 10992 | } |
| 10993 | |
| 10994 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X24, batch_gt_24) { |
| 10995 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 10996 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10997 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 10998 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 10999 | } |
| 11000 | } |
| 11001 | |
| 11002 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X24, inplace) { |
| 11003 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11004 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11005 | .batch_size(batch_size) |
| 11006 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11007 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11008 | } |
| 11009 | } |
| 11010 | |
| 11011 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X24, prescale) { |
| 11012 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11013 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11014 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11015 | .batch_size(batch_size) |
| 11016 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11017 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11018 | } |
| 11019 | } |
| 11020 | } |
| 11021 | |
| 11022 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X24, alpha) { |
| 11023 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11024 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11025 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11026 | .batch_size(batch_size) |
| 11027 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11028 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11029 | } |
| 11030 | } |
| 11031 | } |
| 11032 | |
| 11033 | TEST(F32_VELU__WASMSIMD_X86_RR2_LUT16_P3_X24, beta) { |
| 11034 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11035 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11036 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11037 | .batch_size(batch_size) |
| 11038 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11039 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_lut16_p3_x24, xnn_init_f32_elu_wasmsimd_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11040 | } |
| 11041 | } |
| 11042 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11043 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11044 | |
| 11045 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11046 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11047 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11048 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11049 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11050 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11051 | } |
| 11052 | |
| 11053 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X4, batch_div_4) { |
| 11054 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11055 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11056 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11057 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11058 | } |
| 11059 | } |
| 11060 | |
| 11061 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X4, batch_lt_4) { |
| 11062 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11063 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11064 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11065 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11066 | } |
| 11067 | } |
| 11068 | |
| 11069 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X4, batch_gt_4) { |
| 11070 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11071 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11072 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11073 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11074 | } |
| 11075 | } |
| 11076 | |
| 11077 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X4, inplace) { |
| 11078 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11079 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11080 | .batch_size(batch_size) |
| 11081 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11082 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11083 | } |
| 11084 | } |
| 11085 | |
| 11086 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X4, prescale) { |
| 11087 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11088 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11089 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11090 | .batch_size(batch_size) |
| 11091 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11092 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11093 | } |
| 11094 | } |
| 11095 | } |
| 11096 | |
| 11097 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X4, alpha) { |
| 11098 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11099 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11100 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11101 | .batch_size(batch_size) |
| 11102 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11103 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11104 | } |
| 11105 | } |
| 11106 | } |
| 11107 | |
| 11108 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X4, beta) { |
| 11109 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11110 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11111 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11112 | .batch_size(batch_size) |
| 11113 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11114 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11115 | } |
| 11116 | } |
| 11117 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11118 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11119 | |
| 11120 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11121 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11122 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X8, batch_eq_8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11123 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11124 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11125 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11126 | } |
| 11127 | |
| 11128 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X8, batch_div_8) { |
| 11129 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11130 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11131 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11132 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11133 | } |
| 11134 | } |
| 11135 | |
| 11136 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X8, batch_lt_8) { |
| 11137 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11138 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11139 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11140 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11141 | } |
| 11142 | } |
| 11143 | |
| 11144 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X8, batch_gt_8) { |
| 11145 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11146 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11147 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11148 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11149 | } |
| 11150 | } |
| 11151 | |
| 11152 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X8, inplace) { |
| 11153 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11154 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11155 | .batch_size(batch_size) |
| 11156 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11157 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11158 | } |
| 11159 | } |
| 11160 | |
| 11161 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X8, prescale) { |
| 11162 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11163 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11164 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11165 | .batch_size(batch_size) |
| 11166 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11167 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11168 | } |
| 11169 | } |
| 11170 | } |
| 11171 | |
| 11172 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X8, alpha) { |
| 11173 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11174 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11175 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11176 | .batch_size(batch_size) |
| 11177 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11178 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11179 | } |
| 11180 | } |
| 11181 | } |
| 11182 | |
| 11183 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X8, beta) { |
| 11184 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11185 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11186 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11187 | .batch_size(batch_size) |
| 11188 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11189 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11190 | } |
| 11191 | } |
| 11192 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11193 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11194 | |
| 11195 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11196 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11197 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X12, batch_eq_12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11198 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11199 | .batch_size(12) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11200 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11201 | } |
| 11202 | |
| 11203 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X12, batch_div_12) { |
| 11204 | for (size_t batch_size = 24; batch_size < 120; batch_size += 12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11205 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11206 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11207 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11208 | } |
| 11209 | } |
| 11210 | |
| 11211 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X12, batch_lt_12) { |
| 11212 | for (size_t batch_size = 1; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11213 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11214 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11215 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11216 | } |
| 11217 | } |
| 11218 | |
| 11219 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X12, batch_gt_12) { |
| 11220 | for (size_t batch_size = 13; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11221 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11222 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11223 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11224 | } |
| 11225 | } |
| 11226 | |
| 11227 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X12, inplace) { |
| 11228 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11229 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11230 | .batch_size(batch_size) |
| 11231 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11232 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11233 | } |
| 11234 | } |
| 11235 | |
| 11236 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X12, prescale) { |
| 11237 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11238 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11239 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11240 | .batch_size(batch_size) |
| 11241 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11242 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11243 | } |
| 11244 | } |
| 11245 | } |
| 11246 | |
| 11247 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X12, alpha) { |
| 11248 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11249 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11250 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11251 | .batch_size(batch_size) |
| 11252 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11253 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11254 | } |
| 11255 | } |
| 11256 | } |
| 11257 | |
| 11258 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X12, beta) { |
| 11259 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11260 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11261 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11262 | .batch_size(batch_size) |
| 11263 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11264 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11265 | } |
| 11266 | } |
| 11267 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11268 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11269 | |
| 11270 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11271 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11272 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X16, batch_eq_16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11273 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11274 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11275 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11276 | } |
| 11277 | |
| 11278 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X16, batch_div_16) { |
| 11279 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11280 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11281 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11282 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11283 | } |
| 11284 | } |
| 11285 | |
| 11286 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X16, batch_lt_16) { |
| 11287 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11288 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11289 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11290 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11291 | } |
| 11292 | } |
| 11293 | |
| 11294 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X16, batch_gt_16) { |
| 11295 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11296 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11297 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11298 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11299 | } |
| 11300 | } |
| 11301 | |
| 11302 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X16, inplace) { |
| 11303 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11304 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11305 | .batch_size(batch_size) |
| 11306 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11307 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11308 | } |
| 11309 | } |
| 11310 | |
| 11311 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X16, prescale) { |
| 11312 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11313 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11314 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11315 | .batch_size(batch_size) |
| 11316 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11317 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11318 | } |
| 11319 | } |
| 11320 | } |
| 11321 | |
| 11322 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X16, alpha) { |
| 11323 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11324 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11325 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11326 | .batch_size(batch_size) |
| 11327 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11328 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11329 | } |
| 11330 | } |
| 11331 | } |
| 11332 | |
| 11333 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X16, beta) { |
| 11334 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11335 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11336 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11337 | .batch_size(batch_size) |
| 11338 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11339 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11340 | } |
| 11341 | } |
| 11342 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11343 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11344 | |
| 11345 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11346 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11347 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X20, batch_eq_20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11348 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11349 | .batch_size(20) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11350 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11351 | } |
| 11352 | |
| 11353 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X20, batch_div_20) { |
| 11354 | for (size_t batch_size = 40; batch_size < 200; batch_size += 20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11355 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11356 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11357 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11358 | } |
| 11359 | } |
| 11360 | |
| 11361 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X20, batch_lt_20) { |
| 11362 | for (size_t batch_size = 1; batch_size < 20; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11363 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11364 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11365 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11366 | } |
| 11367 | } |
| 11368 | |
| 11369 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X20, batch_gt_20) { |
| 11370 | for (size_t batch_size = 21; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11371 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11372 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11373 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11374 | } |
| 11375 | } |
| 11376 | |
| 11377 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X20, inplace) { |
| 11378 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11379 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11380 | .batch_size(batch_size) |
| 11381 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11382 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11383 | } |
| 11384 | } |
| 11385 | |
| 11386 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X20, prescale) { |
| 11387 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11388 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11389 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11390 | .batch_size(batch_size) |
| 11391 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11392 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11393 | } |
| 11394 | } |
| 11395 | } |
| 11396 | |
| 11397 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X20, alpha) { |
| 11398 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11399 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11400 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11401 | .batch_size(batch_size) |
| 11402 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11403 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11404 | } |
| 11405 | } |
| 11406 | } |
| 11407 | |
| 11408 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X20, beta) { |
| 11409 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11410 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11411 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11412 | .batch_size(batch_size) |
| 11413 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11414 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11415 | } |
| 11416 | } |
| 11417 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11418 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11419 | |
| 11420 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11421 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11422 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X24, batch_eq_24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11423 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11424 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11425 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11426 | } |
| 11427 | |
| 11428 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X24, batch_div_24) { |
| 11429 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11430 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11431 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11432 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11433 | } |
| 11434 | } |
| 11435 | |
| 11436 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X24, batch_lt_24) { |
| 11437 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11438 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11439 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11440 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11441 | } |
| 11442 | } |
| 11443 | |
| 11444 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X24, batch_gt_24) { |
| 11445 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11446 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11447 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11448 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11449 | } |
| 11450 | } |
| 11451 | |
| 11452 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X24, inplace) { |
| 11453 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11454 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11455 | .batch_size(batch_size) |
| 11456 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11457 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11458 | } |
| 11459 | } |
| 11460 | |
| 11461 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X24, prescale) { |
| 11462 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11463 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11464 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11465 | .batch_size(batch_size) |
| 11466 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11467 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11468 | } |
| 11469 | } |
| 11470 | } |
| 11471 | |
| 11472 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X24, alpha) { |
| 11473 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11474 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11475 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11476 | .batch_size(batch_size) |
| 11477 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11478 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11479 | } |
| 11480 | } |
| 11481 | } |
| 11482 | |
| 11483 | TEST(F32_VELU__WASMSIMD_ARM_RR2_P6_X24, beta) { |
| 11484 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11485 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11486 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11487 | .batch_size(batch_size) |
| 11488 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11489 | .Test(xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11490 | } |
| 11491 | } |
| 11492 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11493 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11494 | |
| 11495 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11496 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11497 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11498 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11499 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11500 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11501 | } |
| 11502 | |
| 11503 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X4, batch_div_4) { |
| 11504 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11505 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11506 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11507 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11508 | } |
| 11509 | } |
| 11510 | |
| 11511 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X4, batch_lt_4) { |
| 11512 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11513 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11514 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11515 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11516 | } |
| 11517 | } |
| 11518 | |
| 11519 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X4, batch_gt_4) { |
| 11520 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11521 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11522 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11523 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11524 | } |
| 11525 | } |
| 11526 | |
| 11527 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X4, inplace) { |
| 11528 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11529 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11530 | .batch_size(batch_size) |
| 11531 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11532 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11533 | } |
| 11534 | } |
| 11535 | |
| 11536 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X4, prescale) { |
| 11537 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11538 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11539 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11540 | .batch_size(batch_size) |
| 11541 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11542 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11543 | } |
| 11544 | } |
| 11545 | } |
| 11546 | |
| 11547 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X4, alpha) { |
| 11548 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11549 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11550 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11551 | .batch_size(batch_size) |
| 11552 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11553 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11554 | } |
| 11555 | } |
| 11556 | } |
| 11557 | |
| 11558 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X4, beta) { |
| 11559 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11560 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11561 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11562 | .batch_size(batch_size) |
| 11563 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11564 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x4, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11565 | } |
| 11566 | } |
| 11567 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11568 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11569 | |
| 11570 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11571 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11572 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X8, batch_eq_8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11573 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11574 | .batch_size(8) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11575 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11576 | } |
| 11577 | |
| 11578 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X8, batch_div_8) { |
| 11579 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11580 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11581 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11582 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11583 | } |
| 11584 | } |
| 11585 | |
| 11586 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X8, batch_lt_8) { |
| 11587 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11588 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11589 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11590 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11591 | } |
| 11592 | } |
| 11593 | |
| 11594 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X8, batch_gt_8) { |
| 11595 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11596 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11597 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11598 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11599 | } |
| 11600 | } |
| 11601 | |
| 11602 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X8, inplace) { |
| 11603 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11604 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11605 | .batch_size(batch_size) |
| 11606 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11607 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11608 | } |
| 11609 | } |
| 11610 | |
| 11611 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X8, prescale) { |
| 11612 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11613 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11614 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11615 | .batch_size(batch_size) |
| 11616 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11617 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11618 | } |
| 11619 | } |
| 11620 | } |
| 11621 | |
| 11622 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X8, alpha) { |
| 11623 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11624 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11625 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11626 | .batch_size(batch_size) |
| 11627 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11628 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11629 | } |
| 11630 | } |
| 11631 | } |
| 11632 | |
| 11633 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X8, beta) { |
| 11634 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11635 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11636 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11637 | .batch_size(batch_size) |
| 11638 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11639 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x8, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11640 | } |
| 11641 | } |
| 11642 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11643 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11644 | |
| 11645 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11646 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11647 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X12, batch_eq_12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11648 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11649 | .batch_size(12) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11650 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11651 | } |
| 11652 | |
| 11653 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X12, batch_div_12) { |
| 11654 | for (size_t batch_size = 24; batch_size < 120; batch_size += 12) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11655 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11656 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11657 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11658 | } |
| 11659 | } |
| 11660 | |
| 11661 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X12, batch_lt_12) { |
| 11662 | for (size_t batch_size = 1; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11663 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11664 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11665 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11666 | } |
| 11667 | } |
| 11668 | |
| 11669 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X12, batch_gt_12) { |
| 11670 | for (size_t batch_size = 13; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11671 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11672 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11673 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11674 | } |
| 11675 | } |
| 11676 | |
| 11677 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X12, inplace) { |
| 11678 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11679 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11680 | .batch_size(batch_size) |
| 11681 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11682 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11683 | } |
| 11684 | } |
| 11685 | |
| 11686 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X12, prescale) { |
| 11687 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11688 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11689 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11690 | .batch_size(batch_size) |
| 11691 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11692 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11693 | } |
| 11694 | } |
| 11695 | } |
| 11696 | |
| 11697 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X12, alpha) { |
| 11698 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11699 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11700 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11701 | .batch_size(batch_size) |
| 11702 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11703 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11704 | } |
| 11705 | } |
| 11706 | } |
| 11707 | |
| 11708 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X12, beta) { |
| 11709 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11710 | for (size_t batch_size = 1; batch_size <= 60; batch_size += 11) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11711 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11712 | .batch_size(batch_size) |
| 11713 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11714 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x12, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11715 | } |
| 11716 | } |
| 11717 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11718 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11719 | |
| 11720 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11721 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11722 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X16, batch_eq_16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11723 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11724 | .batch_size(16) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11725 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11726 | } |
| 11727 | |
| 11728 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X16, batch_div_16) { |
| 11729 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11730 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11731 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11732 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11733 | } |
| 11734 | } |
| 11735 | |
| 11736 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X16, batch_lt_16) { |
| 11737 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11738 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11739 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11740 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11741 | } |
| 11742 | } |
| 11743 | |
| 11744 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X16, batch_gt_16) { |
| 11745 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11746 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11747 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11748 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11749 | } |
| 11750 | } |
| 11751 | |
| 11752 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X16, inplace) { |
| 11753 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11754 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11755 | .batch_size(batch_size) |
| 11756 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11757 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11758 | } |
| 11759 | } |
| 11760 | |
| 11761 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X16, prescale) { |
| 11762 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11763 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11764 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11765 | .batch_size(batch_size) |
| 11766 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11767 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11768 | } |
| 11769 | } |
| 11770 | } |
| 11771 | |
| 11772 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X16, alpha) { |
| 11773 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11774 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11775 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11776 | .batch_size(batch_size) |
| 11777 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11778 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11779 | } |
| 11780 | } |
| 11781 | } |
| 11782 | |
| 11783 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X16, beta) { |
| 11784 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11785 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11786 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11787 | .batch_size(batch_size) |
| 11788 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11789 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x16, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11790 | } |
| 11791 | } |
| 11792 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11793 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11794 | |
| 11795 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11796 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11797 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X20, batch_eq_20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11798 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11799 | .batch_size(20) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11800 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11801 | } |
| 11802 | |
| 11803 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X20, batch_div_20) { |
| 11804 | for (size_t batch_size = 40; batch_size < 200; batch_size += 20) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11805 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11806 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11807 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11808 | } |
| 11809 | } |
| 11810 | |
| 11811 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X20, batch_lt_20) { |
| 11812 | for (size_t batch_size = 1; batch_size < 20; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11813 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11814 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11815 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11816 | } |
| 11817 | } |
| 11818 | |
| 11819 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X20, batch_gt_20) { |
| 11820 | for (size_t batch_size = 21; batch_size < 40; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11821 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11822 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11823 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11824 | } |
| 11825 | } |
| 11826 | |
| 11827 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X20, inplace) { |
| 11828 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11829 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11830 | .batch_size(batch_size) |
| 11831 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11832 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11833 | } |
| 11834 | } |
| 11835 | |
| 11836 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X20, prescale) { |
| 11837 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11838 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11839 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11840 | .batch_size(batch_size) |
| 11841 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11842 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11843 | } |
| 11844 | } |
| 11845 | } |
| 11846 | |
| 11847 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X20, alpha) { |
| 11848 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11849 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11850 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11851 | .batch_size(batch_size) |
| 11852 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11853 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11854 | } |
| 11855 | } |
| 11856 | } |
| 11857 | |
| 11858 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X20, beta) { |
| 11859 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11860 | for (size_t batch_size = 1; batch_size <= 100; batch_size += 19) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11861 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11862 | .batch_size(batch_size) |
| 11863 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11864 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x20, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11865 | } |
| 11866 | } |
| 11867 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11868 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11869 | |
| 11870 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11871 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11872 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X24, batch_eq_24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11873 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11874 | .batch_size(24) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11875 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11876 | } |
| 11877 | |
| 11878 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X24, batch_div_24) { |
| 11879 | for (size_t batch_size = 48; batch_size < 240; batch_size += 24) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11880 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11881 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11882 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11883 | } |
| 11884 | } |
| 11885 | |
| 11886 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X24, batch_lt_24) { |
| 11887 | for (size_t batch_size = 1; batch_size < 24; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11888 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11889 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11890 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11891 | } |
| 11892 | } |
| 11893 | |
| 11894 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X24, batch_gt_24) { |
| 11895 | for (size_t batch_size = 25; batch_size < 48; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11896 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11897 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11898 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11899 | } |
| 11900 | } |
| 11901 | |
| 11902 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X24, inplace) { |
| 11903 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11904 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11905 | .batch_size(batch_size) |
| 11906 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11907 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11908 | } |
| 11909 | } |
| 11910 | |
| 11911 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X24, prescale) { |
| 11912 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11913 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11914 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11915 | .batch_size(batch_size) |
| 11916 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11917 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11918 | } |
| 11919 | } |
| 11920 | } |
| 11921 | |
| 11922 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X24, alpha) { |
| 11923 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11924 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11925 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11926 | .batch_size(batch_size) |
| 11927 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11928 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11929 | } |
| 11930 | } |
| 11931 | } |
| 11932 | |
| 11933 | TEST(F32_VELU__WASMSIMD_X86_RR2_P6_X24, beta) { |
| 11934 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11935 | for (size_t batch_size = 1; batch_size <= 120; batch_size += 23) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11936 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11937 | .batch_size(batch_size) |
| 11938 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11939 | .Test(xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x24, xnn_init_f32_elu_wasmsimd_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11940 | } |
| 11941 | } |
| 11942 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11943 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11944 | |
| 11945 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 11946 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11947 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X1, batch_eq_1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11948 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11949 | .batch_size(1) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11950 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x1, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11951 | } |
| 11952 | |
| 11953 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X1, batch_gt_1) { |
| 11954 | for (size_t batch_size = 2; batch_size < 10; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11955 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11956 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11957 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x1, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11958 | } |
| 11959 | } |
| 11960 | |
| 11961 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X1, inplace) { |
| 11962 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11963 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11964 | .batch_size(batch_size) |
| 11965 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11966 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x1, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11967 | } |
| 11968 | } |
| 11969 | |
| 11970 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X1, prescale) { |
| 11971 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 11972 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11973 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11974 | .batch_size(batch_size) |
| 11975 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11976 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x1, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11977 | } |
| 11978 | } |
| 11979 | } |
| 11980 | |
| 11981 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X1, alpha) { |
| 11982 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 11983 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11984 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11985 | .batch_size(batch_size) |
| 11986 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11987 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x1, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11988 | } |
| 11989 | } |
| 11990 | } |
| 11991 | |
| 11992 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X1, beta) { |
| 11993 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 11994 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 11995 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11996 | .batch_size(batch_size) |
| 11997 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 11998 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x1, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 11999 | } |
| 12000 | } |
| 12001 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12002 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12003 | |
| 12004 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12005 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12006 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X2, batch_eq_2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12007 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12008 | .batch_size(2) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12009 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12010 | } |
| 12011 | |
| 12012 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X2, batch_div_2) { |
| 12013 | for (size_t batch_size = 4; batch_size < 20; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12014 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12015 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12016 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12017 | } |
| 12018 | } |
| 12019 | |
| 12020 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X2, batch_lt_2) { |
| 12021 | for (size_t batch_size = 1; batch_size < 2; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12022 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12023 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12024 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12025 | } |
| 12026 | } |
| 12027 | |
| 12028 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X2, batch_gt_2) { |
| 12029 | for (size_t batch_size = 3; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12030 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12031 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12032 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12033 | } |
| 12034 | } |
| 12035 | |
| 12036 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X2, inplace) { |
| 12037 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12038 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12039 | .batch_size(batch_size) |
| 12040 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12041 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12042 | } |
| 12043 | } |
| 12044 | |
| 12045 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X2, prescale) { |
| 12046 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12047 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12048 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12049 | .batch_size(batch_size) |
| 12050 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12051 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12052 | } |
| 12053 | } |
| 12054 | } |
| 12055 | |
| 12056 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X2, alpha) { |
| 12057 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12058 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12059 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12060 | .batch_size(batch_size) |
| 12061 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12062 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12063 | } |
| 12064 | } |
| 12065 | } |
| 12066 | |
| 12067 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X2, beta) { |
| 12068 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 12069 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12070 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12071 | .batch_size(batch_size) |
| 12072 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12073 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12074 | } |
| 12075 | } |
| 12076 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12077 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12078 | |
| 12079 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12080 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12081 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X3, batch_eq_3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12082 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12083 | .batch_size(3) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12084 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12085 | } |
| 12086 | |
| 12087 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X3, batch_div_3) { |
| 12088 | for (size_t batch_size = 6; batch_size < 30; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12089 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12090 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12091 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12092 | } |
| 12093 | } |
| 12094 | |
| 12095 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X3, batch_lt_3) { |
| 12096 | for (size_t batch_size = 1; batch_size < 3; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12097 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12098 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12099 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12100 | } |
| 12101 | } |
| 12102 | |
| 12103 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X3, batch_gt_3) { |
| 12104 | for (size_t batch_size = 4; batch_size < 6; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12105 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12106 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12107 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12108 | } |
| 12109 | } |
| 12110 | |
| 12111 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X3, inplace) { |
| 12112 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12113 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12114 | .batch_size(batch_size) |
| 12115 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12116 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12117 | } |
| 12118 | } |
| 12119 | |
| 12120 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X3, prescale) { |
| 12121 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12122 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12123 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12124 | .batch_size(batch_size) |
| 12125 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12126 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12127 | } |
| 12128 | } |
| 12129 | } |
| 12130 | |
| 12131 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X3, alpha) { |
| 12132 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12133 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12134 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12135 | .batch_size(batch_size) |
| 12136 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12137 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12138 | } |
| 12139 | } |
| 12140 | } |
| 12141 | |
| 12142 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X3, beta) { |
| 12143 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 12144 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12145 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12146 | .batch_size(batch_size) |
| 12147 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12148 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12149 | } |
| 12150 | } |
| 12151 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12152 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12153 | |
| 12154 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12155 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12156 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12157 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12158 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12159 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12160 | } |
| 12161 | |
| 12162 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X4, batch_div_4) { |
| 12163 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12164 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12165 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12166 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12167 | } |
| 12168 | } |
| 12169 | |
| 12170 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X4, batch_lt_4) { |
| 12171 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12172 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12173 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12174 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12175 | } |
| 12176 | } |
| 12177 | |
| 12178 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X4, batch_gt_4) { |
| 12179 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12180 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12181 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12182 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12183 | } |
| 12184 | } |
| 12185 | |
| 12186 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X4, inplace) { |
| 12187 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12188 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12189 | .batch_size(batch_size) |
| 12190 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12191 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12192 | } |
| 12193 | } |
| 12194 | |
| 12195 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X4, prescale) { |
| 12196 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12197 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12198 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12199 | .batch_size(batch_size) |
| 12200 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12201 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12202 | } |
| 12203 | } |
| 12204 | } |
| 12205 | |
| 12206 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X4, alpha) { |
| 12207 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12208 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12209 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12210 | .batch_size(batch_size) |
| 12211 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12212 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12213 | } |
| 12214 | } |
| 12215 | } |
| 12216 | |
| 12217 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X4, beta) { |
| 12218 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 12219 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12220 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12221 | .batch_size(batch_size) |
| 12222 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12223 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12224 | } |
| 12225 | } |
| 12226 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12227 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12228 | |
| 12229 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12230 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12231 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X5, batch_eq_5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12232 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12233 | .batch_size(5) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12234 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12235 | } |
| 12236 | |
| 12237 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X5, batch_div_5) { |
| 12238 | for (size_t batch_size = 10; batch_size < 50; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12239 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12240 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12241 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12242 | } |
| 12243 | } |
| 12244 | |
| 12245 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X5, batch_lt_5) { |
| 12246 | for (size_t batch_size = 1; batch_size < 5; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12247 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12248 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12249 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12250 | } |
| 12251 | } |
| 12252 | |
| 12253 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X5, batch_gt_5) { |
| 12254 | for (size_t batch_size = 6; batch_size < 10; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12255 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12256 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12257 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12258 | } |
| 12259 | } |
| 12260 | |
| 12261 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X5, inplace) { |
| 12262 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12263 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12264 | .batch_size(batch_size) |
| 12265 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12266 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12267 | } |
| 12268 | } |
| 12269 | |
| 12270 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X5, prescale) { |
| 12271 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12272 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12273 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12274 | .batch_size(batch_size) |
| 12275 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12276 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12277 | } |
| 12278 | } |
| 12279 | } |
| 12280 | |
| 12281 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X5, alpha) { |
| 12282 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12283 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12284 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12285 | .batch_size(batch_size) |
| 12286 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12287 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12288 | } |
| 12289 | } |
| 12290 | } |
| 12291 | |
| 12292 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X5, beta) { |
| 12293 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 12294 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12295 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12296 | .batch_size(batch_size) |
| 12297 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12298 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12299 | } |
| 12300 | } |
| 12301 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12302 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12303 | |
| 12304 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12305 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12306 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X6, batch_eq_6) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12307 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12308 | .batch_size(6) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12309 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12310 | } |
| 12311 | |
| 12312 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X6, batch_div_6) { |
| 12313 | for (size_t batch_size = 12; batch_size < 60; batch_size += 6) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12314 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12315 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12316 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12317 | } |
| 12318 | } |
| 12319 | |
| 12320 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X6, batch_lt_6) { |
| 12321 | for (size_t batch_size = 1; batch_size < 6; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12322 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12323 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12324 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12325 | } |
| 12326 | } |
| 12327 | |
| 12328 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X6, batch_gt_6) { |
| 12329 | for (size_t batch_size = 7; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12330 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12331 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12332 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12333 | } |
| 12334 | } |
| 12335 | |
| 12336 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X6, inplace) { |
| 12337 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12338 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12339 | .batch_size(batch_size) |
| 12340 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12341 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12342 | } |
| 12343 | } |
| 12344 | |
| 12345 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X6, prescale) { |
| 12346 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12347 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12348 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12349 | .batch_size(batch_size) |
| 12350 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12351 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12352 | } |
| 12353 | } |
| 12354 | } |
| 12355 | |
| 12356 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X6, alpha) { |
| 12357 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12358 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12359 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12360 | .batch_size(batch_size) |
| 12361 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12362 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12363 | } |
| 12364 | } |
| 12365 | } |
| 12366 | |
| 12367 | TEST(F32_VELU__WASM_RR2_LUT16_P3_X6, beta) { |
| 12368 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 12369 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12370 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12371 | .batch_size(batch_size) |
| 12372 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12373 | .Test(xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12374 | } |
| 12375 | } |
| 12376 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12377 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12378 | |
| 12379 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12380 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12381 | TEST(F32_VELU__WASM_RR2_P6_X1, batch_eq_1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12382 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12383 | .batch_size(1) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12384 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x1, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12385 | } |
| 12386 | |
| 12387 | TEST(F32_VELU__WASM_RR2_P6_X1, batch_gt_1) { |
| 12388 | for (size_t batch_size = 2; batch_size < 10; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12389 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12390 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12391 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x1, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12392 | } |
| 12393 | } |
| 12394 | |
| 12395 | TEST(F32_VELU__WASM_RR2_P6_X1, inplace) { |
| 12396 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12397 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12398 | .batch_size(batch_size) |
| 12399 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12400 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x1, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12401 | } |
| 12402 | } |
| 12403 | |
| 12404 | TEST(F32_VELU__WASM_RR2_P6_X1, prescale) { |
| 12405 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12406 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12407 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12408 | .batch_size(batch_size) |
| 12409 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12410 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x1, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12411 | } |
| 12412 | } |
| 12413 | } |
| 12414 | |
| 12415 | TEST(F32_VELU__WASM_RR2_P6_X1, alpha) { |
| 12416 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12417 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12418 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12419 | .batch_size(batch_size) |
| 12420 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12421 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x1, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12422 | } |
| 12423 | } |
| 12424 | } |
| 12425 | |
| 12426 | TEST(F32_VELU__WASM_RR2_P6_X1, beta) { |
| 12427 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 12428 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12429 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12430 | .batch_size(batch_size) |
| 12431 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12432 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x1, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12433 | } |
| 12434 | } |
| 12435 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12436 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12437 | |
| 12438 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12439 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12440 | TEST(F32_VELU__WASM_RR2_P6_X2, batch_eq_2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12441 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12442 | .batch_size(2) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12443 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12444 | } |
| 12445 | |
| 12446 | TEST(F32_VELU__WASM_RR2_P6_X2, batch_div_2) { |
| 12447 | for (size_t batch_size = 4; batch_size < 20; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12448 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12449 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12450 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12451 | } |
| 12452 | } |
| 12453 | |
| 12454 | TEST(F32_VELU__WASM_RR2_P6_X2, batch_lt_2) { |
| 12455 | for (size_t batch_size = 1; batch_size < 2; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12456 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12457 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12458 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12459 | } |
| 12460 | } |
| 12461 | |
| 12462 | TEST(F32_VELU__WASM_RR2_P6_X2, batch_gt_2) { |
| 12463 | for (size_t batch_size = 3; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12464 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12465 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12466 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12467 | } |
| 12468 | } |
| 12469 | |
| 12470 | TEST(F32_VELU__WASM_RR2_P6_X2, inplace) { |
| 12471 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12472 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12473 | .batch_size(batch_size) |
| 12474 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12475 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12476 | } |
| 12477 | } |
| 12478 | |
| 12479 | TEST(F32_VELU__WASM_RR2_P6_X2, prescale) { |
| 12480 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12481 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12482 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12483 | .batch_size(batch_size) |
| 12484 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12485 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12486 | } |
| 12487 | } |
| 12488 | } |
| 12489 | |
| 12490 | TEST(F32_VELU__WASM_RR2_P6_X2, alpha) { |
| 12491 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12492 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12493 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12494 | .batch_size(batch_size) |
| 12495 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12496 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12497 | } |
| 12498 | } |
| 12499 | } |
| 12500 | |
| 12501 | TEST(F32_VELU__WASM_RR2_P6_X2, beta) { |
| 12502 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 12503 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12504 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12505 | .batch_size(batch_size) |
| 12506 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12507 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12508 | } |
| 12509 | } |
| 12510 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12511 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12512 | |
| 12513 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12514 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12515 | TEST(F32_VELU__WASM_RR2_P6_X3, batch_eq_3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12516 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12517 | .batch_size(3) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12518 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12519 | } |
| 12520 | |
| 12521 | TEST(F32_VELU__WASM_RR2_P6_X3, batch_div_3) { |
| 12522 | for (size_t batch_size = 6; batch_size < 30; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12523 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12524 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12525 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12526 | } |
| 12527 | } |
| 12528 | |
| 12529 | TEST(F32_VELU__WASM_RR2_P6_X3, batch_lt_3) { |
| 12530 | for (size_t batch_size = 1; batch_size < 3; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12531 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12532 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12533 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12534 | } |
| 12535 | } |
| 12536 | |
| 12537 | TEST(F32_VELU__WASM_RR2_P6_X3, batch_gt_3) { |
| 12538 | for (size_t batch_size = 4; batch_size < 6; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12539 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12540 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12541 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12542 | } |
| 12543 | } |
| 12544 | |
| 12545 | TEST(F32_VELU__WASM_RR2_P6_X3, inplace) { |
| 12546 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12547 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12548 | .batch_size(batch_size) |
| 12549 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12550 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12551 | } |
| 12552 | } |
| 12553 | |
| 12554 | TEST(F32_VELU__WASM_RR2_P6_X3, prescale) { |
| 12555 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12556 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12557 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12558 | .batch_size(batch_size) |
| 12559 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12560 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12561 | } |
| 12562 | } |
| 12563 | } |
| 12564 | |
| 12565 | TEST(F32_VELU__WASM_RR2_P6_X3, alpha) { |
| 12566 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12567 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12568 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12569 | .batch_size(batch_size) |
| 12570 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12571 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12572 | } |
| 12573 | } |
| 12574 | } |
| 12575 | |
| 12576 | TEST(F32_VELU__WASM_RR2_P6_X3, beta) { |
| 12577 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 12578 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12579 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12580 | .batch_size(batch_size) |
| 12581 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12582 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12583 | } |
| 12584 | } |
| 12585 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12586 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12587 | |
| 12588 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12589 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12590 | TEST(F32_VELU__WASM_RR2_P6_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12591 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12592 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12593 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12594 | } |
| 12595 | |
| 12596 | TEST(F32_VELU__WASM_RR2_P6_X4, batch_div_4) { |
| 12597 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12598 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12599 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12600 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12601 | } |
| 12602 | } |
| 12603 | |
| 12604 | TEST(F32_VELU__WASM_RR2_P6_X4, batch_lt_4) { |
| 12605 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12606 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12607 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12608 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12609 | } |
| 12610 | } |
| 12611 | |
| 12612 | TEST(F32_VELU__WASM_RR2_P6_X4, batch_gt_4) { |
| 12613 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12614 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12615 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12616 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12617 | } |
| 12618 | } |
| 12619 | |
| 12620 | TEST(F32_VELU__WASM_RR2_P6_X4, inplace) { |
| 12621 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12622 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12623 | .batch_size(batch_size) |
| 12624 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12625 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12626 | } |
| 12627 | } |
| 12628 | |
| 12629 | TEST(F32_VELU__WASM_RR2_P6_X4, prescale) { |
| 12630 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12631 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12632 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12633 | .batch_size(batch_size) |
| 12634 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12635 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12636 | } |
| 12637 | } |
| 12638 | } |
| 12639 | |
| 12640 | TEST(F32_VELU__WASM_RR2_P6_X4, alpha) { |
| 12641 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12642 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12643 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12644 | .batch_size(batch_size) |
| 12645 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12646 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12647 | } |
| 12648 | } |
| 12649 | } |
| 12650 | |
| 12651 | TEST(F32_VELU__WASM_RR2_P6_X4, beta) { |
| 12652 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 12653 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12654 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12655 | .batch_size(batch_size) |
| 12656 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12657 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12658 | } |
| 12659 | } |
| 12660 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12661 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12662 | |
| 12663 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12664 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12665 | TEST(F32_VELU__WASM_RR2_P6_X5, batch_eq_5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12666 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12667 | .batch_size(5) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12668 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12669 | } |
| 12670 | |
| 12671 | TEST(F32_VELU__WASM_RR2_P6_X5, batch_div_5) { |
| 12672 | for (size_t batch_size = 10; batch_size < 50; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12673 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12674 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12675 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12676 | } |
| 12677 | } |
| 12678 | |
| 12679 | TEST(F32_VELU__WASM_RR2_P6_X5, batch_lt_5) { |
| 12680 | for (size_t batch_size = 1; batch_size < 5; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12681 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12682 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12683 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12684 | } |
| 12685 | } |
| 12686 | |
| 12687 | TEST(F32_VELU__WASM_RR2_P6_X5, batch_gt_5) { |
| 12688 | for (size_t batch_size = 6; batch_size < 10; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12689 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12690 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12691 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12692 | } |
| 12693 | } |
| 12694 | |
| 12695 | TEST(F32_VELU__WASM_RR2_P6_X5, inplace) { |
| 12696 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12697 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12698 | .batch_size(batch_size) |
| 12699 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12700 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12701 | } |
| 12702 | } |
| 12703 | |
| 12704 | TEST(F32_VELU__WASM_RR2_P6_X5, prescale) { |
| 12705 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12706 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12707 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12708 | .batch_size(batch_size) |
| 12709 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12710 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12711 | } |
| 12712 | } |
| 12713 | } |
| 12714 | |
| 12715 | TEST(F32_VELU__WASM_RR2_P6_X5, alpha) { |
| 12716 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12717 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12718 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12719 | .batch_size(batch_size) |
| 12720 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12721 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12722 | } |
| 12723 | } |
| 12724 | } |
| 12725 | |
| 12726 | TEST(F32_VELU__WASM_RR2_P6_X5, beta) { |
| 12727 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 12728 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12729 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12730 | .batch_size(batch_size) |
| 12731 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12732 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12733 | } |
| 12734 | } |
| 12735 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12736 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12737 | |
| 12738 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12739 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12740 | TEST(F32_VELU__WASM_RR2_P6_X6, batch_eq_6) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12741 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12742 | .batch_size(6) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12743 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12744 | } |
| 12745 | |
| 12746 | TEST(F32_VELU__WASM_RR2_P6_X6, batch_div_6) { |
| 12747 | for (size_t batch_size = 12; batch_size < 60; batch_size += 6) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12748 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12749 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12750 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12751 | } |
| 12752 | } |
| 12753 | |
| 12754 | TEST(F32_VELU__WASM_RR2_P6_X6, batch_lt_6) { |
| 12755 | for (size_t batch_size = 1; batch_size < 6; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12756 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12757 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12758 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12759 | } |
| 12760 | } |
| 12761 | |
| 12762 | TEST(F32_VELU__WASM_RR2_P6_X6, batch_gt_6) { |
| 12763 | for (size_t batch_size = 7; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12764 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12765 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12766 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12767 | } |
| 12768 | } |
| 12769 | |
| 12770 | TEST(F32_VELU__WASM_RR2_P6_X6, inplace) { |
| 12771 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12772 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12773 | .batch_size(batch_size) |
| 12774 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12775 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12776 | } |
| 12777 | } |
| 12778 | |
| 12779 | TEST(F32_VELU__WASM_RR2_P6_X6, prescale) { |
| 12780 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12781 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12782 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12783 | .batch_size(batch_size) |
| 12784 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12785 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12786 | } |
| 12787 | } |
| 12788 | } |
| 12789 | |
| 12790 | TEST(F32_VELU__WASM_RR2_P6_X6, alpha) { |
| 12791 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12792 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12793 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12794 | .batch_size(batch_size) |
| 12795 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12796 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12797 | } |
| 12798 | } |
| 12799 | } |
| 12800 | |
| 12801 | TEST(F32_VELU__WASM_RR2_P6_X6, beta) { |
| 12802 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 12803 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12804 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12805 | .batch_size(batch_size) |
| 12806 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12807 | .Test(xnn_f32_velu_ukernel__wasm_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12808 | } |
| 12809 | } |
| 12810 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 12811 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12812 | |
| 12813 | |
| 12814 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X1, batch_eq_1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12815 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12816 | .batch_size(1) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12817 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x1, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12818 | } |
| 12819 | |
| 12820 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X1, batch_gt_1) { |
| 12821 | for (size_t batch_size = 2; batch_size < 10; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12822 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12823 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12824 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x1, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12825 | } |
| 12826 | } |
| 12827 | |
| 12828 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X1, inplace) { |
| 12829 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12830 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12831 | .batch_size(batch_size) |
| 12832 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12833 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x1, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12834 | } |
| 12835 | } |
| 12836 | |
| 12837 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X1, prescale) { |
| 12838 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12839 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12840 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12841 | .batch_size(batch_size) |
| 12842 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12843 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x1, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12844 | } |
| 12845 | } |
| 12846 | } |
| 12847 | |
| 12848 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X1, alpha) { |
| 12849 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12850 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12851 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12852 | .batch_size(batch_size) |
| 12853 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12854 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x1, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12855 | } |
| 12856 | } |
| 12857 | } |
| 12858 | |
| 12859 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X1, beta) { |
| 12860 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 12861 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12862 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12863 | .batch_size(batch_size) |
| 12864 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12865 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x1, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12866 | } |
| 12867 | } |
| 12868 | } |
| 12869 | |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12870 | |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12871 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X2, batch_eq_2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12872 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12873 | .batch_size(2) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12874 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12875 | } |
| 12876 | |
| 12877 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X2, batch_div_2) { |
| 12878 | for (size_t batch_size = 4; batch_size < 20; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12879 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12880 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12881 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12882 | } |
| 12883 | } |
| 12884 | |
| 12885 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X2, batch_lt_2) { |
| 12886 | for (size_t batch_size = 1; batch_size < 2; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12887 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12888 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12889 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12890 | } |
| 12891 | } |
| 12892 | |
| 12893 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X2, batch_gt_2) { |
| 12894 | for (size_t batch_size = 3; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12895 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12896 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12897 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12898 | } |
| 12899 | } |
| 12900 | |
| 12901 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X2, inplace) { |
| 12902 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12903 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12904 | .batch_size(batch_size) |
| 12905 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12906 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12907 | } |
| 12908 | } |
| 12909 | |
| 12910 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X2, prescale) { |
| 12911 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12912 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12913 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12914 | .batch_size(batch_size) |
| 12915 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12916 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12917 | } |
| 12918 | } |
| 12919 | } |
| 12920 | |
| 12921 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X2, alpha) { |
| 12922 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12923 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12924 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12925 | .batch_size(batch_size) |
| 12926 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12927 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12928 | } |
| 12929 | } |
| 12930 | } |
| 12931 | |
| 12932 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X2, beta) { |
| 12933 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 12934 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12935 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12936 | .batch_size(batch_size) |
| 12937 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12938 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x2, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12939 | } |
| 12940 | } |
| 12941 | } |
| 12942 | |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12943 | |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12944 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X3, batch_eq_3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12945 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12946 | .batch_size(3) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12947 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12948 | } |
| 12949 | |
| 12950 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X3, batch_div_3) { |
| 12951 | for (size_t batch_size = 6; batch_size < 30; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12952 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12953 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12954 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12955 | } |
| 12956 | } |
| 12957 | |
| 12958 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X3, batch_lt_3) { |
| 12959 | for (size_t batch_size = 1; batch_size < 3; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12960 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12961 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12962 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12963 | } |
| 12964 | } |
| 12965 | |
| 12966 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X3, batch_gt_3) { |
| 12967 | for (size_t batch_size = 4; batch_size < 6; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12968 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12969 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12970 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12971 | } |
| 12972 | } |
| 12973 | |
| 12974 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X3, inplace) { |
| 12975 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12976 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12977 | .batch_size(batch_size) |
| 12978 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12979 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12980 | } |
| 12981 | } |
| 12982 | |
| 12983 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X3, prescale) { |
| 12984 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 12985 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12986 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12987 | .batch_size(batch_size) |
| 12988 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 12989 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12990 | } |
| 12991 | } |
| 12992 | } |
| 12993 | |
| 12994 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X3, alpha) { |
| 12995 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 12996 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 12997 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 12998 | .batch_size(batch_size) |
| 12999 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13000 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13001 | } |
| 13002 | } |
| 13003 | } |
| 13004 | |
| 13005 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X3, beta) { |
| 13006 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 13007 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13008 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13009 | .batch_size(batch_size) |
| 13010 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13011 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x3, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13012 | } |
| 13013 | } |
| 13014 | } |
| 13015 | |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13016 | |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13017 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13018 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13019 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13020 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13021 | } |
| 13022 | |
| 13023 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X4, batch_div_4) { |
| 13024 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13025 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13026 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13027 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13028 | } |
| 13029 | } |
| 13030 | |
| 13031 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X4, batch_lt_4) { |
| 13032 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13033 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13034 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13035 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13036 | } |
| 13037 | } |
| 13038 | |
| 13039 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X4, batch_gt_4) { |
| 13040 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13041 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13042 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13043 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13044 | } |
| 13045 | } |
| 13046 | |
| 13047 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X4, inplace) { |
| 13048 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13049 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13050 | .batch_size(batch_size) |
| 13051 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13052 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13053 | } |
| 13054 | } |
| 13055 | |
| 13056 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X4, prescale) { |
| 13057 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 13058 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13059 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13060 | .batch_size(batch_size) |
| 13061 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13062 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13063 | } |
| 13064 | } |
| 13065 | } |
| 13066 | |
| 13067 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X4, alpha) { |
| 13068 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 13069 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13070 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13071 | .batch_size(batch_size) |
| 13072 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13073 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13074 | } |
| 13075 | } |
| 13076 | } |
| 13077 | |
| 13078 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X4, beta) { |
| 13079 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 13080 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13081 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13082 | .batch_size(batch_size) |
| 13083 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13084 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x4, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13085 | } |
| 13086 | } |
| 13087 | } |
| 13088 | |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13089 | |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13090 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X5, batch_eq_5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13091 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13092 | .batch_size(5) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13093 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13094 | } |
| 13095 | |
| 13096 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X5, batch_div_5) { |
| 13097 | for (size_t batch_size = 10; batch_size < 50; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13098 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13099 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13100 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13101 | } |
| 13102 | } |
| 13103 | |
| 13104 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X5, batch_lt_5) { |
| 13105 | for (size_t batch_size = 1; batch_size < 5; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13106 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13107 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13108 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13109 | } |
| 13110 | } |
| 13111 | |
| 13112 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X5, batch_gt_5) { |
| 13113 | for (size_t batch_size = 6; batch_size < 10; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13114 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13115 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13116 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13117 | } |
| 13118 | } |
| 13119 | |
| 13120 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X5, inplace) { |
| 13121 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13122 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13123 | .batch_size(batch_size) |
| 13124 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13125 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13126 | } |
| 13127 | } |
| 13128 | |
| 13129 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X5, prescale) { |
| 13130 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 13131 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13132 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13133 | .batch_size(batch_size) |
| 13134 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13135 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13136 | } |
| 13137 | } |
| 13138 | } |
| 13139 | |
| 13140 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X5, alpha) { |
| 13141 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 13142 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13143 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13144 | .batch_size(batch_size) |
| 13145 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13146 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13147 | } |
| 13148 | } |
| 13149 | } |
| 13150 | |
| 13151 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X5, beta) { |
| 13152 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 13153 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13154 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13155 | .batch_size(batch_size) |
| 13156 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13157 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x5, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13158 | } |
| 13159 | } |
| 13160 | } |
| 13161 | |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13162 | |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13163 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X6, batch_eq_6) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13164 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13165 | .batch_size(6) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13166 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13167 | } |
| 13168 | |
| 13169 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X6, batch_div_6) { |
| 13170 | for (size_t batch_size = 12; batch_size < 60; batch_size += 6) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13171 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13172 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13173 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13174 | } |
| 13175 | } |
| 13176 | |
| 13177 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X6, batch_lt_6) { |
| 13178 | for (size_t batch_size = 1; batch_size < 6; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13179 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13180 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13181 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13182 | } |
| 13183 | } |
| 13184 | |
| 13185 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X6, batch_gt_6) { |
| 13186 | for (size_t batch_size = 7; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13187 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13188 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13189 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13190 | } |
| 13191 | } |
| 13192 | |
| 13193 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X6, inplace) { |
| 13194 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13195 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13196 | .batch_size(batch_size) |
| 13197 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13198 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13199 | } |
| 13200 | } |
| 13201 | |
| 13202 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X6, prescale) { |
| 13203 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 13204 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13205 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13206 | .batch_size(batch_size) |
| 13207 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13208 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13209 | } |
| 13210 | } |
| 13211 | } |
| 13212 | |
| 13213 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X6, alpha) { |
| 13214 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 13215 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13216 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13217 | .batch_size(batch_size) |
| 13218 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13219 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13220 | } |
| 13221 | } |
| 13222 | } |
| 13223 | |
| 13224 | TEST(F32_VELU__SCALAR_RR2_LUT16_P3_X6, beta) { |
| 13225 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 13226 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13227 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13228 | .batch_size(batch_size) |
| 13229 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13230 | .Test(xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x6, xnn_init_f32_elu_scalar_rr2_lut16_p3_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13231 | } |
| 13232 | } |
| 13233 | } |
| 13234 | |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13235 | |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13236 | TEST(F32_VELU__SCALAR_RR2_P6_X1, batch_eq_1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13237 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13238 | .batch_size(1) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13239 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x1, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13240 | } |
| 13241 | |
| 13242 | TEST(F32_VELU__SCALAR_RR2_P6_X1, batch_gt_1) { |
| 13243 | for (size_t batch_size = 2; batch_size < 10; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13244 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13245 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13246 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x1, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13247 | } |
| 13248 | } |
| 13249 | |
| 13250 | TEST(F32_VELU__SCALAR_RR2_P6_X1, inplace) { |
| 13251 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13252 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13253 | .batch_size(batch_size) |
| 13254 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13255 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x1, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13256 | } |
| 13257 | } |
| 13258 | |
| 13259 | TEST(F32_VELU__SCALAR_RR2_P6_X1, prescale) { |
| 13260 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 13261 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13262 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13263 | .batch_size(batch_size) |
| 13264 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13265 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x1, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13266 | } |
| 13267 | } |
| 13268 | } |
| 13269 | |
| 13270 | TEST(F32_VELU__SCALAR_RR2_P6_X1, alpha) { |
| 13271 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 13272 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13273 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13274 | .batch_size(batch_size) |
| 13275 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13276 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x1, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13277 | } |
| 13278 | } |
| 13279 | } |
| 13280 | |
| 13281 | TEST(F32_VELU__SCALAR_RR2_P6_X1, beta) { |
| 13282 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 13283 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13284 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13285 | .batch_size(batch_size) |
| 13286 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13287 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x1, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13288 | } |
| 13289 | } |
| 13290 | } |
| 13291 | |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13292 | |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13293 | TEST(F32_VELU__SCALAR_RR2_P6_X2, batch_eq_2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13294 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13295 | .batch_size(2) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13296 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13297 | } |
| 13298 | |
| 13299 | TEST(F32_VELU__SCALAR_RR2_P6_X2, batch_div_2) { |
| 13300 | for (size_t batch_size = 4; batch_size < 20; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13301 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13302 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13303 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13304 | } |
| 13305 | } |
| 13306 | |
| 13307 | TEST(F32_VELU__SCALAR_RR2_P6_X2, batch_lt_2) { |
| 13308 | for (size_t batch_size = 1; batch_size < 2; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13309 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13310 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13311 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13312 | } |
| 13313 | } |
| 13314 | |
| 13315 | TEST(F32_VELU__SCALAR_RR2_P6_X2, batch_gt_2) { |
| 13316 | for (size_t batch_size = 3; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13317 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13318 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13319 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13320 | } |
| 13321 | } |
| 13322 | |
| 13323 | TEST(F32_VELU__SCALAR_RR2_P6_X2, inplace) { |
| 13324 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13325 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13326 | .batch_size(batch_size) |
| 13327 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13328 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13329 | } |
| 13330 | } |
| 13331 | |
| 13332 | TEST(F32_VELU__SCALAR_RR2_P6_X2, prescale) { |
| 13333 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 13334 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13335 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13336 | .batch_size(batch_size) |
| 13337 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13338 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13339 | } |
| 13340 | } |
| 13341 | } |
| 13342 | |
| 13343 | TEST(F32_VELU__SCALAR_RR2_P6_X2, alpha) { |
| 13344 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 13345 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13346 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13347 | .batch_size(batch_size) |
| 13348 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13349 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13350 | } |
| 13351 | } |
| 13352 | } |
| 13353 | |
| 13354 | TEST(F32_VELU__SCALAR_RR2_P6_X2, beta) { |
| 13355 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 13356 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13357 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13358 | .batch_size(batch_size) |
| 13359 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13360 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x2, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13361 | } |
| 13362 | } |
| 13363 | } |
| 13364 | |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13365 | |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13366 | TEST(F32_VELU__SCALAR_RR2_P6_X3, batch_eq_3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13367 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13368 | .batch_size(3) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13369 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13370 | } |
| 13371 | |
| 13372 | TEST(F32_VELU__SCALAR_RR2_P6_X3, batch_div_3) { |
| 13373 | for (size_t batch_size = 6; batch_size < 30; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13374 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13375 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13376 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13377 | } |
| 13378 | } |
| 13379 | |
| 13380 | TEST(F32_VELU__SCALAR_RR2_P6_X3, batch_lt_3) { |
| 13381 | for (size_t batch_size = 1; batch_size < 3; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13382 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13383 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13384 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13385 | } |
| 13386 | } |
| 13387 | |
| 13388 | TEST(F32_VELU__SCALAR_RR2_P6_X3, batch_gt_3) { |
| 13389 | for (size_t batch_size = 4; batch_size < 6; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13390 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13391 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13392 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13393 | } |
| 13394 | } |
| 13395 | |
| 13396 | TEST(F32_VELU__SCALAR_RR2_P6_X3, inplace) { |
| 13397 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13398 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13399 | .batch_size(batch_size) |
| 13400 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13401 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13402 | } |
| 13403 | } |
| 13404 | |
| 13405 | TEST(F32_VELU__SCALAR_RR2_P6_X3, prescale) { |
| 13406 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 13407 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13408 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13409 | .batch_size(batch_size) |
| 13410 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13411 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13412 | } |
| 13413 | } |
| 13414 | } |
| 13415 | |
| 13416 | TEST(F32_VELU__SCALAR_RR2_P6_X3, alpha) { |
| 13417 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 13418 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13419 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13420 | .batch_size(batch_size) |
| 13421 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13422 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13423 | } |
| 13424 | } |
| 13425 | } |
| 13426 | |
| 13427 | TEST(F32_VELU__SCALAR_RR2_P6_X3, beta) { |
| 13428 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 13429 | for (size_t batch_size = 1; batch_size <= 15; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13430 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13431 | .batch_size(batch_size) |
| 13432 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13433 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x3, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13434 | } |
| 13435 | } |
| 13436 | } |
| 13437 | |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13438 | |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13439 | TEST(F32_VELU__SCALAR_RR2_P6_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13440 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13441 | .batch_size(4) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13442 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13443 | } |
| 13444 | |
| 13445 | TEST(F32_VELU__SCALAR_RR2_P6_X4, batch_div_4) { |
| 13446 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13447 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13448 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13449 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13450 | } |
| 13451 | } |
| 13452 | |
| 13453 | TEST(F32_VELU__SCALAR_RR2_P6_X4, batch_lt_4) { |
| 13454 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13455 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13456 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13457 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13458 | } |
| 13459 | } |
| 13460 | |
| 13461 | TEST(F32_VELU__SCALAR_RR2_P6_X4, batch_gt_4) { |
| 13462 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13463 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13464 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13465 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13466 | } |
| 13467 | } |
| 13468 | |
| 13469 | TEST(F32_VELU__SCALAR_RR2_P6_X4, inplace) { |
| 13470 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13471 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13472 | .batch_size(batch_size) |
| 13473 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13474 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13475 | } |
| 13476 | } |
| 13477 | |
| 13478 | TEST(F32_VELU__SCALAR_RR2_P6_X4, prescale) { |
| 13479 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 13480 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13481 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13482 | .batch_size(batch_size) |
| 13483 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13484 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13485 | } |
| 13486 | } |
| 13487 | } |
| 13488 | |
| 13489 | TEST(F32_VELU__SCALAR_RR2_P6_X4, alpha) { |
| 13490 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 13491 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13492 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13493 | .batch_size(batch_size) |
| 13494 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13495 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13496 | } |
| 13497 | } |
| 13498 | } |
| 13499 | |
| 13500 | TEST(F32_VELU__SCALAR_RR2_P6_X4, beta) { |
| 13501 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 13502 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13503 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13504 | .batch_size(batch_size) |
| 13505 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13506 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x4, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13507 | } |
| 13508 | } |
| 13509 | } |
| 13510 | |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13511 | |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13512 | TEST(F32_VELU__SCALAR_RR2_P6_X5, batch_eq_5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13513 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13514 | .batch_size(5) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13515 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13516 | } |
| 13517 | |
| 13518 | TEST(F32_VELU__SCALAR_RR2_P6_X5, batch_div_5) { |
| 13519 | for (size_t batch_size = 10; batch_size < 50; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13520 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13521 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13522 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13523 | } |
| 13524 | } |
| 13525 | |
| 13526 | TEST(F32_VELU__SCALAR_RR2_P6_X5, batch_lt_5) { |
| 13527 | for (size_t batch_size = 1; batch_size < 5; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13528 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13529 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13530 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13531 | } |
| 13532 | } |
| 13533 | |
| 13534 | TEST(F32_VELU__SCALAR_RR2_P6_X5, batch_gt_5) { |
| 13535 | for (size_t batch_size = 6; batch_size < 10; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13536 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13537 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13538 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13539 | } |
| 13540 | } |
| 13541 | |
| 13542 | TEST(F32_VELU__SCALAR_RR2_P6_X5, inplace) { |
| 13543 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13544 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13545 | .batch_size(batch_size) |
| 13546 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13547 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13548 | } |
| 13549 | } |
| 13550 | |
| 13551 | TEST(F32_VELU__SCALAR_RR2_P6_X5, prescale) { |
| 13552 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 13553 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13554 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13555 | .batch_size(batch_size) |
| 13556 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13557 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13558 | } |
| 13559 | } |
| 13560 | } |
| 13561 | |
| 13562 | TEST(F32_VELU__SCALAR_RR2_P6_X5, alpha) { |
| 13563 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 13564 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13565 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13566 | .batch_size(batch_size) |
| 13567 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13568 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13569 | } |
| 13570 | } |
| 13571 | } |
| 13572 | |
| 13573 | TEST(F32_VELU__SCALAR_RR2_P6_X5, beta) { |
| 13574 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 13575 | for (size_t batch_size = 1; batch_size <= 25; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13576 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13577 | .batch_size(batch_size) |
| 13578 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13579 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x5, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13580 | } |
| 13581 | } |
| 13582 | } |
| 13583 | |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13584 | |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13585 | TEST(F32_VELU__SCALAR_RR2_P6_X6, batch_eq_6) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13586 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13587 | .batch_size(6) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13588 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13589 | } |
| 13590 | |
| 13591 | TEST(F32_VELU__SCALAR_RR2_P6_X6, batch_div_6) { |
| 13592 | for (size_t batch_size = 12; batch_size < 60; batch_size += 6) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13593 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13594 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13595 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13596 | } |
| 13597 | } |
| 13598 | |
| 13599 | TEST(F32_VELU__SCALAR_RR2_P6_X6, batch_lt_6) { |
| 13600 | for (size_t batch_size = 1; batch_size < 6; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13601 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13602 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13603 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13604 | } |
| 13605 | } |
| 13606 | |
| 13607 | TEST(F32_VELU__SCALAR_RR2_P6_X6, batch_gt_6) { |
| 13608 | for (size_t batch_size = 7; batch_size < 12; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13609 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13610 | .batch_size(batch_size) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13611 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13612 | } |
| 13613 | } |
| 13614 | |
| 13615 | TEST(F32_VELU__SCALAR_RR2_P6_X6, inplace) { |
| 13616 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13617 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13618 | .batch_size(batch_size) |
| 13619 | .inplace(true) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13620 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13621 | } |
| 13622 | } |
| 13623 | |
| 13624 | TEST(F32_VELU__SCALAR_RR2_P6_X6, prescale) { |
| 13625 | for (float prescale : std::vector<float>({0.1f, 10.0f})) { |
| 13626 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13627 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13628 | .batch_size(batch_size) |
| 13629 | .prescale(prescale) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13630 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13631 | } |
| 13632 | } |
| 13633 | } |
| 13634 | |
| 13635 | TEST(F32_VELU__SCALAR_RR2_P6_X6, alpha) { |
| 13636 | for (float alpha : std::vector<float>({0.3f, 3.0f})) { |
| 13637 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13638 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13639 | .batch_size(batch_size) |
| 13640 | .alpha(alpha) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13641 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13642 | } |
| 13643 | } |
| 13644 | } |
| 13645 | |
| 13646 | TEST(F32_VELU__SCALAR_RR2_P6_X6, beta) { |
| 13647 | for (float beta : std::vector<float>({0.3f, 3.0f})) { |
| 13648 | for (size_t batch_size = 1; batch_size <= 30; batch_size += 5) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13649 | VUnaryMicrokernelTester() |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13650 | .batch_size(batch_size) |
| 13651 | .beta(beta) |
Marat Dukhan | 4a79ff2 | 2022-01-01 12:16:48 -0800 | [diff] [blame] | 13652 | .Test(xnn_f32_velu_ukernel__scalar_rr2_p6_x6, xnn_init_f32_elu_scalar_rr2_p6_params); |
Marat Dukhan | ed6baaf | 2020-12-01 15:07:08 -0800 | [diff] [blame] | 13653 | } |
| 13654 | } |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 13655 | } |