Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1 | // Copyright 2019 Google LLC |
| 2 | // |
| 3 | // This source code is licensed under the BSD-style license found in the |
| 4 | // LICENSE file in the root directory of this source tree. |
| 5 | // |
| 6 | // Auto-generated file. Do not edit! |
| 7 | // Specification: test/f32-vlrelu.yaml |
| 8 | // Generator: tools/generate-vunary-test.py |
| 9 | |
| 10 | |
| 11 | #include <gtest/gtest.h> |
| 12 | |
| 13 | #include <xnnpack/common.h> |
| 14 | #include <xnnpack/isa-checks.h> |
| 15 | |
| 16 | #include <xnnpack/vunary.h> |
| 17 | #include "vunary-microkernel-tester.h" |
| 18 | |
| 19 | |
| 20 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 21 | TEST(F32_VLRELU__NEON_X4, batch_eq_4) { |
| 22 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 23 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 24 | .batch_size(4) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 25 | .Test(xnn_f32_vlrelu_ukernel__neon_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 26 | } |
| 27 | |
| 28 | TEST(F32_VLRELU__NEON_X4, batch_div_4) { |
| 29 | TEST_REQUIRES_ARM_NEON; |
| 30 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 31 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 32 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 33 | .Test(xnn_f32_vlrelu_ukernel__neon_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 34 | } |
| 35 | } |
| 36 | |
| 37 | TEST(F32_VLRELU__NEON_X4, batch_lt_4) { |
| 38 | TEST_REQUIRES_ARM_NEON; |
| 39 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 40 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 41 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 42 | .Test(xnn_f32_vlrelu_ukernel__neon_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 43 | } |
| 44 | } |
| 45 | |
| 46 | TEST(F32_VLRELU__NEON_X4, batch_gt_4) { |
| 47 | TEST_REQUIRES_ARM_NEON; |
| 48 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 49 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 50 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 51 | .Test(xnn_f32_vlrelu_ukernel__neon_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 52 | } |
| 53 | } |
| 54 | |
| 55 | TEST(F32_VLRELU__NEON_X4, inplace) { |
| 56 | TEST_REQUIRES_ARM_NEON; |
| 57 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 58 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 59 | .batch_size(batch_size) |
| 60 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 61 | .Test(xnn_f32_vlrelu_ukernel__neon_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 62 | } |
| 63 | } |
| 64 | |
| 65 | TEST(F32_VLRELU__NEON_X4, slope) { |
| 66 | TEST_REQUIRES_ARM_NEON; |
| 67 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 68 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 69 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 70 | .batch_size(batch_size) |
| 71 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 72 | .Test(xnn_f32_vlrelu_ukernel__neon_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 73 | } |
| 74 | } |
| 75 | } |
| 76 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 77 | |
| 78 | |
| 79 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 80 | TEST(F32_VLRELU__NEON_X8, batch_eq_8) { |
| 81 | TEST_REQUIRES_ARM_NEON; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 82 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 83 | .batch_size(8) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 84 | .Test(xnn_f32_vlrelu_ukernel__neon_x8, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 85 | } |
| 86 | |
| 87 | TEST(F32_VLRELU__NEON_X8, batch_div_8) { |
| 88 | TEST_REQUIRES_ARM_NEON; |
| 89 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 90 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 91 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 92 | .Test(xnn_f32_vlrelu_ukernel__neon_x8, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 93 | } |
| 94 | } |
| 95 | |
| 96 | TEST(F32_VLRELU__NEON_X8, batch_lt_8) { |
| 97 | TEST_REQUIRES_ARM_NEON; |
| 98 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 99 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 100 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 101 | .Test(xnn_f32_vlrelu_ukernel__neon_x8, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 102 | } |
| 103 | } |
| 104 | |
| 105 | TEST(F32_VLRELU__NEON_X8, batch_gt_8) { |
| 106 | TEST_REQUIRES_ARM_NEON; |
| 107 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 108 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 109 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 110 | .Test(xnn_f32_vlrelu_ukernel__neon_x8, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 111 | } |
| 112 | } |
| 113 | |
| 114 | TEST(F32_VLRELU__NEON_X8, inplace) { |
| 115 | TEST_REQUIRES_ARM_NEON; |
| 116 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 117 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 118 | .batch_size(batch_size) |
| 119 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 120 | .Test(xnn_f32_vlrelu_ukernel__neon_x8, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 121 | } |
| 122 | } |
| 123 | |
| 124 | TEST(F32_VLRELU__NEON_X8, slope) { |
| 125 | TEST_REQUIRES_ARM_NEON; |
| 126 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 127 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 128 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 129 | .batch_size(batch_size) |
| 130 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 131 | .Test(xnn_f32_vlrelu_ukernel__neon_x8, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 132 | } |
| 133 | } |
| 134 | } |
| 135 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
| 136 | |
| 137 | |
| 138 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 139 | TEST(F32_VLRELU__SSE_X4, batch_eq_4) { |
| 140 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 141 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 142 | .batch_size(4) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 143 | .Test(xnn_f32_vlrelu_ukernel__sse_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 144 | } |
| 145 | |
| 146 | TEST(F32_VLRELU__SSE_X4, batch_div_4) { |
| 147 | TEST_REQUIRES_X86_SSE; |
| 148 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 149 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 150 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 151 | .Test(xnn_f32_vlrelu_ukernel__sse_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 152 | } |
| 153 | } |
| 154 | |
| 155 | TEST(F32_VLRELU__SSE_X4, batch_lt_4) { |
| 156 | TEST_REQUIRES_X86_SSE; |
| 157 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 158 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 159 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 160 | .Test(xnn_f32_vlrelu_ukernel__sse_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 161 | } |
| 162 | } |
| 163 | |
| 164 | TEST(F32_VLRELU__SSE_X4, batch_gt_4) { |
| 165 | TEST_REQUIRES_X86_SSE; |
| 166 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 167 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 168 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 169 | .Test(xnn_f32_vlrelu_ukernel__sse_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 170 | } |
| 171 | } |
| 172 | |
| 173 | TEST(F32_VLRELU__SSE_X4, inplace) { |
| 174 | TEST_REQUIRES_X86_SSE; |
| 175 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 176 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 177 | .batch_size(batch_size) |
| 178 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 179 | .Test(xnn_f32_vlrelu_ukernel__sse_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 180 | } |
| 181 | } |
| 182 | |
| 183 | TEST(F32_VLRELU__SSE_X4, slope) { |
| 184 | TEST_REQUIRES_X86_SSE; |
| 185 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 186 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 187 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 188 | .batch_size(batch_size) |
| 189 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 190 | .Test(xnn_f32_vlrelu_ukernel__sse_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 191 | } |
| 192 | } |
| 193 | } |
| 194 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 195 | |
| 196 | |
| 197 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 198 | TEST(F32_VLRELU__SSE_X8, batch_eq_8) { |
| 199 | TEST_REQUIRES_X86_SSE; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 200 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 201 | .batch_size(8) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 202 | .Test(xnn_f32_vlrelu_ukernel__sse_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 203 | } |
| 204 | |
| 205 | TEST(F32_VLRELU__SSE_X8, batch_div_8) { |
| 206 | TEST_REQUIRES_X86_SSE; |
| 207 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 208 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 209 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 210 | .Test(xnn_f32_vlrelu_ukernel__sse_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 211 | } |
| 212 | } |
| 213 | |
| 214 | TEST(F32_VLRELU__SSE_X8, batch_lt_8) { |
| 215 | TEST_REQUIRES_X86_SSE; |
| 216 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 217 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 218 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 219 | .Test(xnn_f32_vlrelu_ukernel__sse_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 220 | } |
| 221 | } |
| 222 | |
| 223 | TEST(F32_VLRELU__SSE_X8, batch_gt_8) { |
| 224 | TEST_REQUIRES_X86_SSE; |
| 225 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 226 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 227 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 228 | .Test(xnn_f32_vlrelu_ukernel__sse_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 229 | } |
| 230 | } |
| 231 | |
| 232 | TEST(F32_VLRELU__SSE_X8, inplace) { |
| 233 | TEST_REQUIRES_X86_SSE; |
| 234 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 235 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 236 | .batch_size(batch_size) |
| 237 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 238 | .Test(xnn_f32_vlrelu_ukernel__sse_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 239 | } |
| 240 | } |
| 241 | |
| 242 | TEST(F32_VLRELU__SSE_X8, slope) { |
| 243 | TEST_REQUIRES_X86_SSE; |
| 244 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 245 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 246 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 247 | .batch_size(batch_size) |
| 248 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 249 | .Test(xnn_f32_vlrelu_ukernel__sse_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 250 | } |
| 251 | } |
| 252 | } |
| 253 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 254 | |
| 255 | |
| 256 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 257 | TEST(F32_VLRELU__SSE2_X4, batch_eq_4) { |
| 258 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 259 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 260 | .batch_size(4) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 261 | .Test(xnn_f32_vlrelu_ukernel__sse2_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 262 | } |
| 263 | |
| 264 | TEST(F32_VLRELU__SSE2_X4, batch_div_4) { |
| 265 | TEST_REQUIRES_X86_SSE2; |
| 266 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 267 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 268 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 269 | .Test(xnn_f32_vlrelu_ukernel__sse2_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 270 | } |
| 271 | } |
| 272 | |
| 273 | TEST(F32_VLRELU__SSE2_X4, batch_lt_4) { |
| 274 | TEST_REQUIRES_X86_SSE2; |
| 275 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 276 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 277 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 278 | .Test(xnn_f32_vlrelu_ukernel__sse2_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 279 | } |
| 280 | } |
| 281 | |
| 282 | TEST(F32_VLRELU__SSE2_X4, batch_gt_4) { |
| 283 | TEST_REQUIRES_X86_SSE2; |
| 284 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 285 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 286 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 287 | .Test(xnn_f32_vlrelu_ukernel__sse2_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 288 | } |
| 289 | } |
| 290 | |
| 291 | TEST(F32_VLRELU__SSE2_X4, inplace) { |
| 292 | TEST_REQUIRES_X86_SSE2; |
| 293 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 294 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 295 | .batch_size(batch_size) |
| 296 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 297 | .Test(xnn_f32_vlrelu_ukernel__sse2_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 298 | } |
| 299 | } |
| 300 | |
| 301 | TEST(F32_VLRELU__SSE2_X4, slope) { |
| 302 | TEST_REQUIRES_X86_SSE2; |
| 303 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 304 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 305 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 306 | .batch_size(batch_size) |
| 307 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 308 | .Test(xnn_f32_vlrelu_ukernel__sse2_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 309 | } |
| 310 | } |
| 311 | } |
| 312 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 313 | |
| 314 | |
| 315 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 316 | TEST(F32_VLRELU__SSE2_X8, batch_eq_8) { |
| 317 | TEST_REQUIRES_X86_SSE2; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 318 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 319 | .batch_size(8) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 320 | .Test(xnn_f32_vlrelu_ukernel__sse2_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 321 | } |
| 322 | |
| 323 | TEST(F32_VLRELU__SSE2_X8, batch_div_8) { |
| 324 | TEST_REQUIRES_X86_SSE2; |
| 325 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 326 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 327 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 328 | .Test(xnn_f32_vlrelu_ukernel__sse2_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 329 | } |
| 330 | } |
| 331 | |
| 332 | TEST(F32_VLRELU__SSE2_X8, batch_lt_8) { |
| 333 | TEST_REQUIRES_X86_SSE2; |
| 334 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 335 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 336 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 337 | .Test(xnn_f32_vlrelu_ukernel__sse2_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 338 | } |
| 339 | } |
| 340 | |
| 341 | TEST(F32_VLRELU__SSE2_X8, batch_gt_8) { |
| 342 | TEST_REQUIRES_X86_SSE2; |
| 343 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 344 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 345 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 346 | .Test(xnn_f32_vlrelu_ukernel__sse2_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 347 | } |
| 348 | } |
| 349 | |
| 350 | TEST(F32_VLRELU__SSE2_X8, inplace) { |
| 351 | TEST_REQUIRES_X86_SSE2; |
| 352 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 353 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 354 | .batch_size(batch_size) |
| 355 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 356 | .Test(xnn_f32_vlrelu_ukernel__sse2_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 357 | } |
| 358 | } |
| 359 | |
| 360 | TEST(F32_VLRELU__SSE2_X8, slope) { |
| 361 | TEST_REQUIRES_X86_SSE2; |
| 362 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 363 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 364 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 365 | .batch_size(batch_size) |
| 366 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 367 | .Test(xnn_f32_vlrelu_ukernel__sse2_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 368 | } |
| 369 | } |
| 370 | } |
| 371 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 372 | |
| 373 | |
| 374 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 375 | TEST(F32_VLRELU__SSE41_X4, batch_eq_4) { |
| 376 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 377 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 378 | .batch_size(4) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 379 | .Test(xnn_f32_vlrelu_ukernel__sse41_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 380 | } |
| 381 | |
| 382 | TEST(F32_VLRELU__SSE41_X4, batch_div_4) { |
| 383 | TEST_REQUIRES_X86_SSE41; |
| 384 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 385 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 386 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 387 | .Test(xnn_f32_vlrelu_ukernel__sse41_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 388 | } |
| 389 | } |
| 390 | |
| 391 | TEST(F32_VLRELU__SSE41_X4, batch_lt_4) { |
| 392 | TEST_REQUIRES_X86_SSE41; |
| 393 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 394 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 395 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 396 | .Test(xnn_f32_vlrelu_ukernel__sse41_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 397 | } |
| 398 | } |
| 399 | |
| 400 | TEST(F32_VLRELU__SSE41_X4, batch_gt_4) { |
| 401 | TEST_REQUIRES_X86_SSE41; |
| 402 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 403 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 404 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 405 | .Test(xnn_f32_vlrelu_ukernel__sse41_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 406 | } |
| 407 | } |
| 408 | |
| 409 | TEST(F32_VLRELU__SSE41_X4, inplace) { |
| 410 | TEST_REQUIRES_X86_SSE41; |
| 411 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 412 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 413 | .batch_size(batch_size) |
| 414 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 415 | .Test(xnn_f32_vlrelu_ukernel__sse41_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 416 | } |
| 417 | } |
| 418 | |
| 419 | TEST(F32_VLRELU__SSE41_X4, slope) { |
| 420 | TEST_REQUIRES_X86_SSE41; |
| 421 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 422 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 423 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 424 | .batch_size(batch_size) |
| 425 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 426 | .Test(xnn_f32_vlrelu_ukernel__sse41_x4, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 427 | } |
| 428 | } |
| 429 | } |
| 430 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 431 | |
| 432 | |
| 433 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 434 | TEST(F32_VLRELU__SSE41_X8, batch_eq_8) { |
| 435 | TEST_REQUIRES_X86_SSE41; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 436 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 437 | .batch_size(8) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 438 | .Test(xnn_f32_vlrelu_ukernel__sse41_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 439 | } |
| 440 | |
| 441 | TEST(F32_VLRELU__SSE41_X8, batch_div_8) { |
| 442 | TEST_REQUIRES_X86_SSE41; |
| 443 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 444 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 445 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 446 | .Test(xnn_f32_vlrelu_ukernel__sse41_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 447 | } |
| 448 | } |
| 449 | |
| 450 | TEST(F32_VLRELU__SSE41_X8, batch_lt_8) { |
| 451 | TEST_REQUIRES_X86_SSE41; |
| 452 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 453 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 454 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 455 | .Test(xnn_f32_vlrelu_ukernel__sse41_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 456 | } |
| 457 | } |
| 458 | |
| 459 | TEST(F32_VLRELU__SSE41_X8, batch_gt_8) { |
| 460 | TEST_REQUIRES_X86_SSE41; |
| 461 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 462 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 463 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 464 | .Test(xnn_f32_vlrelu_ukernel__sse41_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 465 | } |
| 466 | } |
| 467 | |
| 468 | TEST(F32_VLRELU__SSE41_X8, inplace) { |
| 469 | TEST_REQUIRES_X86_SSE41; |
| 470 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 471 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 472 | .batch_size(batch_size) |
| 473 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 474 | .Test(xnn_f32_vlrelu_ukernel__sse41_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 475 | } |
| 476 | } |
| 477 | |
| 478 | TEST(F32_VLRELU__SSE41_X8, slope) { |
| 479 | TEST_REQUIRES_X86_SSE41; |
| 480 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 481 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 482 | VUnaryMicrokernelTester() |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 483 | .batch_size(batch_size) |
| 484 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 485 | .Test(xnn_f32_vlrelu_ukernel__sse41_x8, xnn_init_f32_lrelu_sse_params); |
Marat Dukhan | 0d3f467 | 2020-06-25 16:42:58 -0700 | [diff] [blame] | 486 | } |
| 487 | } |
| 488 | } |
| 489 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 490 | |
| 491 | |
| 492 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 493 | TEST(F32_VLRELU__AVX_X8, batch_eq_8) { |
| 494 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 495 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 496 | .batch_size(8) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 497 | .Test(xnn_f32_vlrelu_ukernel__avx_x8, xnn_init_f32_lrelu_avx_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 498 | } |
| 499 | |
| 500 | TEST(F32_VLRELU__AVX_X8, batch_div_8) { |
| 501 | TEST_REQUIRES_X86_AVX; |
| 502 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 503 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 504 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 505 | .Test(xnn_f32_vlrelu_ukernel__avx_x8, xnn_init_f32_lrelu_avx_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 506 | } |
| 507 | } |
| 508 | |
| 509 | TEST(F32_VLRELU__AVX_X8, batch_lt_8) { |
| 510 | TEST_REQUIRES_X86_AVX; |
| 511 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 512 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 513 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 514 | .Test(xnn_f32_vlrelu_ukernel__avx_x8, xnn_init_f32_lrelu_avx_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 515 | } |
| 516 | } |
| 517 | |
| 518 | TEST(F32_VLRELU__AVX_X8, batch_gt_8) { |
| 519 | TEST_REQUIRES_X86_AVX; |
| 520 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 521 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 522 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 523 | .Test(xnn_f32_vlrelu_ukernel__avx_x8, xnn_init_f32_lrelu_avx_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 524 | } |
| 525 | } |
| 526 | |
| 527 | TEST(F32_VLRELU__AVX_X8, inplace) { |
| 528 | TEST_REQUIRES_X86_AVX; |
| 529 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 530 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 531 | .batch_size(batch_size) |
| 532 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 533 | .Test(xnn_f32_vlrelu_ukernel__avx_x8, xnn_init_f32_lrelu_avx_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 534 | } |
| 535 | } |
| 536 | |
| 537 | TEST(F32_VLRELU__AVX_X8, slope) { |
| 538 | TEST_REQUIRES_X86_AVX; |
| 539 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 540 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 541 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 542 | .batch_size(batch_size) |
| 543 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 544 | .Test(xnn_f32_vlrelu_ukernel__avx_x8, xnn_init_f32_lrelu_avx_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 545 | } |
| 546 | } |
| 547 | } |
| 548 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 549 | |
| 550 | |
| 551 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 552 | TEST(F32_VLRELU__AVX_X16, batch_eq_16) { |
| 553 | TEST_REQUIRES_X86_AVX; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 554 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 555 | .batch_size(16) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 556 | .Test(xnn_f32_vlrelu_ukernel__avx_x16, xnn_init_f32_lrelu_avx_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 557 | } |
| 558 | |
| 559 | TEST(F32_VLRELU__AVX_X16, batch_div_16) { |
| 560 | TEST_REQUIRES_X86_AVX; |
| 561 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 562 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 563 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 564 | .Test(xnn_f32_vlrelu_ukernel__avx_x16, xnn_init_f32_lrelu_avx_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 565 | } |
| 566 | } |
| 567 | |
| 568 | TEST(F32_VLRELU__AVX_X16, batch_lt_16) { |
| 569 | TEST_REQUIRES_X86_AVX; |
| 570 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 571 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 572 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 573 | .Test(xnn_f32_vlrelu_ukernel__avx_x16, xnn_init_f32_lrelu_avx_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 574 | } |
| 575 | } |
| 576 | |
| 577 | TEST(F32_VLRELU__AVX_X16, batch_gt_16) { |
| 578 | TEST_REQUIRES_X86_AVX; |
| 579 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 580 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 581 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 582 | .Test(xnn_f32_vlrelu_ukernel__avx_x16, xnn_init_f32_lrelu_avx_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 583 | } |
| 584 | } |
| 585 | |
| 586 | TEST(F32_VLRELU__AVX_X16, inplace) { |
| 587 | TEST_REQUIRES_X86_AVX; |
| 588 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 589 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 590 | .batch_size(batch_size) |
| 591 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 592 | .Test(xnn_f32_vlrelu_ukernel__avx_x16, xnn_init_f32_lrelu_avx_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 593 | } |
| 594 | } |
| 595 | |
| 596 | TEST(F32_VLRELU__AVX_X16, slope) { |
| 597 | TEST_REQUIRES_X86_AVX; |
| 598 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 599 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 600 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 601 | .batch_size(batch_size) |
| 602 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 603 | .Test(xnn_f32_vlrelu_ukernel__avx_x16, xnn_init_f32_lrelu_avx_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 604 | } |
| 605 | } |
| 606 | } |
| 607 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 608 | |
| 609 | |
| 610 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 611 | TEST(F32_VLRELU__AVX512F_X16, batch_eq_16) { |
| 612 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 613 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 614 | .batch_size(16) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 615 | .Test(xnn_f32_vlrelu_ukernel__avx512f_x16, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 616 | } |
| 617 | |
| 618 | TEST(F32_VLRELU__AVX512F_X16, batch_div_16) { |
| 619 | TEST_REQUIRES_X86_AVX512F; |
| 620 | for (size_t batch_size = 32; batch_size < 160; batch_size += 16) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 621 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 622 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 623 | .Test(xnn_f32_vlrelu_ukernel__avx512f_x16, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 624 | } |
| 625 | } |
| 626 | |
| 627 | TEST(F32_VLRELU__AVX512F_X16, batch_lt_16) { |
| 628 | TEST_REQUIRES_X86_AVX512F; |
| 629 | for (size_t batch_size = 1; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 630 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 631 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 632 | .Test(xnn_f32_vlrelu_ukernel__avx512f_x16, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 633 | } |
| 634 | } |
| 635 | |
| 636 | TEST(F32_VLRELU__AVX512F_X16, batch_gt_16) { |
| 637 | TEST_REQUIRES_X86_AVX512F; |
| 638 | for (size_t batch_size = 17; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 639 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 640 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 641 | .Test(xnn_f32_vlrelu_ukernel__avx512f_x16, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 642 | } |
| 643 | } |
| 644 | |
| 645 | TEST(F32_VLRELU__AVX512F_X16, inplace) { |
| 646 | TEST_REQUIRES_X86_AVX512F; |
| 647 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 648 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 649 | .batch_size(batch_size) |
| 650 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 651 | .Test(xnn_f32_vlrelu_ukernel__avx512f_x16, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 652 | } |
| 653 | } |
| 654 | |
| 655 | TEST(F32_VLRELU__AVX512F_X16, slope) { |
| 656 | TEST_REQUIRES_X86_AVX512F; |
| 657 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 658 | for (size_t batch_size = 1; batch_size <= 80; batch_size += 15) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 659 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 660 | .batch_size(batch_size) |
| 661 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 662 | .Test(xnn_f32_vlrelu_ukernel__avx512f_x16, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 663 | } |
| 664 | } |
| 665 | } |
| 666 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 667 | |
| 668 | |
| 669 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 670 | TEST(F32_VLRELU__AVX512F_X32, batch_eq_32) { |
| 671 | TEST_REQUIRES_X86_AVX512F; |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 672 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 673 | .batch_size(32) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 674 | .Test(xnn_f32_vlrelu_ukernel__avx512f_x32, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 675 | } |
| 676 | |
| 677 | TEST(F32_VLRELU__AVX512F_X32, batch_div_32) { |
| 678 | TEST_REQUIRES_X86_AVX512F; |
| 679 | for (size_t batch_size = 64; batch_size < 320; batch_size += 32) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 680 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 681 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 682 | .Test(xnn_f32_vlrelu_ukernel__avx512f_x32, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 683 | } |
| 684 | } |
| 685 | |
| 686 | TEST(F32_VLRELU__AVX512F_X32, batch_lt_32) { |
| 687 | TEST_REQUIRES_X86_AVX512F; |
| 688 | for (size_t batch_size = 1; batch_size < 32; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 689 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 690 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 691 | .Test(xnn_f32_vlrelu_ukernel__avx512f_x32, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 692 | } |
| 693 | } |
| 694 | |
| 695 | TEST(F32_VLRELU__AVX512F_X32, batch_gt_32) { |
| 696 | TEST_REQUIRES_X86_AVX512F; |
| 697 | for (size_t batch_size = 33; batch_size < 64; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 698 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 699 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 700 | .Test(xnn_f32_vlrelu_ukernel__avx512f_x32, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 701 | } |
| 702 | } |
| 703 | |
| 704 | TEST(F32_VLRELU__AVX512F_X32, inplace) { |
| 705 | TEST_REQUIRES_X86_AVX512F; |
| 706 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 707 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 708 | .batch_size(batch_size) |
| 709 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 710 | .Test(xnn_f32_vlrelu_ukernel__avx512f_x32, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 711 | } |
| 712 | } |
| 713 | |
| 714 | TEST(F32_VLRELU__AVX512F_X32, slope) { |
| 715 | TEST_REQUIRES_X86_AVX512F; |
| 716 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 717 | for (size_t batch_size = 1; batch_size <= 160; batch_size += 31) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 718 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 719 | .batch_size(batch_size) |
| 720 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 721 | .Test(xnn_f32_vlrelu_ukernel__avx512f_x32, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 722 | } |
| 723 | } |
| 724 | } |
| 725 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
| 726 | |
| 727 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 728 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 729 | TEST(F32_VLRELU__WASMSIMD_BITSELECT_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 730 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 731 | .batch_size(4) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 732 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_bitselect_x4, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 733 | } |
| 734 | |
| 735 | TEST(F32_VLRELU__WASMSIMD_BITSELECT_X4, batch_div_4) { |
| 736 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 737 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 738 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 739 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_bitselect_x4, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 740 | } |
| 741 | } |
| 742 | |
| 743 | TEST(F32_VLRELU__WASMSIMD_BITSELECT_X4, batch_lt_4) { |
| 744 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 745 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 746 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 747 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_bitselect_x4, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 748 | } |
| 749 | } |
| 750 | |
| 751 | TEST(F32_VLRELU__WASMSIMD_BITSELECT_X4, batch_gt_4) { |
| 752 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 753 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 754 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 755 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_bitselect_x4, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 756 | } |
| 757 | } |
| 758 | |
| 759 | TEST(F32_VLRELU__WASMSIMD_BITSELECT_X4, inplace) { |
| 760 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 761 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 762 | .batch_size(batch_size) |
| 763 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 764 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_bitselect_x4, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 765 | } |
| 766 | } |
| 767 | |
| 768 | TEST(F32_VLRELU__WASMSIMD_BITSELECT_X4, slope) { |
| 769 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 770 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 771 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 772 | .batch_size(batch_size) |
| 773 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 774 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_bitselect_x4, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 775 | } |
| 776 | } |
| 777 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 778 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 779 | |
| 780 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 781 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 782 | TEST(F32_VLRELU__WASMSIMD_BITSELECT_X8, batch_eq_8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 783 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 784 | .batch_size(8) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 785 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_bitselect_x8, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 786 | } |
| 787 | |
| 788 | TEST(F32_VLRELU__WASMSIMD_BITSELECT_X8, batch_div_8) { |
| 789 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 790 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 791 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 792 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_bitselect_x8, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 793 | } |
| 794 | } |
| 795 | |
| 796 | TEST(F32_VLRELU__WASMSIMD_BITSELECT_X8, batch_lt_8) { |
| 797 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 798 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 799 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 800 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_bitselect_x8, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 801 | } |
| 802 | } |
| 803 | |
| 804 | TEST(F32_VLRELU__WASMSIMD_BITSELECT_X8, batch_gt_8) { |
| 805 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 806 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 807 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 808 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_bitselect_x8, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 809 | } |
| 810 | } |
| 811 | |
| 812 | TEST(F32_VLRELU__WASMSIMD_BITSELECT_X8, inplace) { |
| 813 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 814 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 815 | .batch_size(batch_size) |
| 816 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 817 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_bitselect_x8, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 818 | } |
| 819 | } |
| 820 | |
| 821 | TEST(F32_VLRELU__WASMSIMD_BITSELECT_X8, slope) { |
| 822 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 823 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 824 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 825 | .batch_size(batch_size) |
| 826 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 827 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_bitselect_x8, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 828 | } |
| 829 | } |
| 830 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 831 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 832 | |
| 833 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 834 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 835 | TEST(F32_VLRELU__WASMSIMD_MINMAX_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 836 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 837 | .batch_size(4) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 838 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_minmax_x4, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 839 | } |
| 840 | |
| 841 | TEST(F32_VLRELU__WASMSIMD_MINMAX_X4, batch_div_4) { |
| 842 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 843 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 844 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 845 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_minmax_x4, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 846 | } |
| 847 | } |
| 848 | |
| 849 | TEST(F32_VLRELU__WASMSIMD_MINMAX_X4, batch_lt_4) { |
| 850 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 851 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 852 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 853 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_minmax_x4, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 854 | } |
| 855 | } |
| 856 | |
| 857 | TEST(F32_VLRELU__WASMSIMD_MINMAX_X4, batch_gt_4) { |
| 858 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 859 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 860 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 861 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_minmax_x4, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 862 | } |
| 863 | } |
| 864 | |
| 865 | TEST(F32_VLRELU__WASMSIMD_MINMAX_X4, inplace) { |
| 866 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 867 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 868 | .batch_size(batch_size) |
| 869 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 870 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_minmax_x4, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 871 | } |
| 872 | } |
| 873 | |
| 874 | TEST(F32_VLRELU__WASMSIMD_MINMAX_X4, slope) { |
| 875 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 876 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 877 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 878 | .batch_size(batch_size) |
| 879 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 880 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_minmax_x4, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 881 | } |
| 882 | } |
| 883 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 884 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 885 | |
| 886 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 887 | #if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 888 | TEST(F32_VLRELU__WASMSIMD_MINMAX_X8, batch_eq_8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 889 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 890 | .batch_size(8) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 891 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_minmax_x8, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 892 | } |
| 893 | |
| 894 | TEST(F32_VLRELU__WASMSIMD_MINMAX_X8, batch_div_8) { |
| 895 | for (size_t batch_size = 16; batch_size < 80; batch_size += 8) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 896 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 897 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 898 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_minmax_x8, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 899 | } |
| 900 | } |
| 901 | |
| 902 | TEST(F32_VLRELU__WASMSIMD_MINMAX_X8, batch_lt_8) { |
| 903 | for (size_t batch_size = 1; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 904 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 905 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 906 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_minmax_x8, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 907 | } |
| 908 | } |
| 909 | |
| 910 | TEST(F32_VLRELU__WASMSIMD_MINMAX_X8, batch_gt_8) { |
| 911 | for (size_t batch_size = 9; batch_size < 16; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 912 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 913 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 914 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_minmax_x8, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 915 | } |
| 916 | } |
| 917 | |
| 918 | TEST(F32_VLRELU__WASMSIMD_MINMAX_X8, inplace) { |
| 919 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 920 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 921 | .batch_size(batch_size) |
| 922 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 923 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_minmax_x8, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 924 | } |
| 925 | } |
| 926 | |
| 927 | TEST(F32_VLRELU__WASMSIMD_MINMAX_X8, slope) { |
| 928 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 929 | for (size_t batch_size = 1; batch_size <= 40; batch_size += 7) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 930 | VUnaryMicrokernelTester() |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 931 | .batch_size(batch_size) |
| 932 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 933 | .Test(xnn_f32_vlrelu_ukernel__wasmsimd_minmax_x8, xnn_init_f32_lrelu_wasmsimd_params); |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 934 | } |
| 935 | } |
| 936 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 937 | #endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | e6502da | 2020-07-15 16:31:36 -0700 | [diff] [blame] | 938 | |
| 939 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 940 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 941 | TEST(F32_VLRELU__WASM_X1, batch_eq_1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 942 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 943 | .batch_size(1) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 944 | .Test(xnn_f32_vlrelu_ukernel__wasm_x1, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 945 | } |
| 946 | |
| 947 | TEST(F32_VLRELU__WASM_X1, batch_gt_1) { |
| 948 | for (size_t batch_size = 2; batch_size < 10; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 949 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 950 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 951 | .Test(xnn_f32_vlrelu_ukernel__wasm_x1, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 952 | } |
| 953 | } |
| 954 | |
| 955 | TEST(F32_VLRELU__WASM_X1, inplace) { |
| 956 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 957 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 958 | .batch_size(batch_size) |
| 959 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 960 | .Test(xnn_f32_vlrelu_ukernel__wasm_x1, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 961 | } |
| 962 | } |
| 963 | |
| 964 | TEST(F32_VLRELU__WASM_X1, slope) { |
| 965 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 966 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 967 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 968 | .batch_size(batch_size) |
| 969 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 970 | .Test(xnn_f32_vlrelu_ukernel__wasm_x1, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 971 | } |
| 972 | } |
| 973 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 974 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 975 | |
| 976 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 977 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 978 | TEST(F32_VLRELU__WASM_X2, batch_eq_2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 979 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 980 | .batch_size(2) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 981 | .Test(xnn_f32_vlrelu_ukernel__wasm_x2, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 982 | } |
| 983 | |
| 984 | TEST(F32_VLRELU__WASM_X2, batch_div_2) { |
| 985 | for (size_t batch_size = 4; batch_size < 20; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 986 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 987 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 988 | .Test(xnn_f32_vlrelu_ukernel__wasm_x2, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 989 | } |
| 990 | } |
| 991 | |
| 992 | TEST(F32_VLRELU__WASM_X2, batch_lt_2) { |
| 993 | for (size_t batch_size = 1; batch_size < 2; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 994 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 995 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 996 | .Test(xnn_f32_vlrelu_ukernel__wasm_x2, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 997 | } |
| 998 | } |
| 999 | |
| 1000 | TEST(F32_VLRELU__WASM_X2, batch_gt_2) { |
| 1001 | for (size_t batch_size = 3; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1002 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1003 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1004 | .Test(xnn_f32_vlrelu_ukernel__wasm_x2, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1005 | } |
| 1006 | } |
| 1007 | |
| 1008 | TEST(F32_VLRELU__WASM_X2, inplace) { |
| 1009 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1010 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1011 | .batch_size(batch_size) |
| 1012 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1013 | .Test(xnn_f32_vlrelu_ukernel__wasm_x2, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1014 | } |
| 1015 | } |
| 1016 | |
| 1017 | TEST(F32_VLRELU__WASM_X2, slope) { |
| 1018 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 1019 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1020 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1021 | .batch_size(batch_size) |
| 1022 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1023 | .Test(xnn_f32_vlrelu_ukernel__wasm_x2, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1024 | } |
| 1025 | } |
| 1026 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 1027 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1028 | |
| 1029 | |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 1030 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1031 | TEST(F32_VLRELU__WASM_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1032 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1033 | .batch_size(4) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1034 | .Test(xnn_f32_vlrelu_ukernel__wasm_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1035 | } |
| 1036 | |
| 1037 | TEST(F32_VLRELU__WASM_X4, batch_div_4) { |
| 1038 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1039 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1040 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1041 | .Test(xnn_f32_vlrelu_ukernel__wasm_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1042 | } |
| 1043 | } |
| 1044 | |
| 1045 | TEST(F32_VLRELU__WASM_X4, batch_lt_4) { |
| 1046 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1047 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1048 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1049 | .Test(xnn_f32_vlrelu_ukernel__wasm_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1050 | } |
| 1051 | } |
| 1052 | |
| 1053 | TEST(F32_VLRELU__WASM_X4, batch_gt_4) { |
| 1054 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1055 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1056 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1057 | .Test(xnn_f32_vlrelu_ukernel__wasm_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1058 | } |
| 1059 | } |
| 1060 | |
| 1061 | TEST(F32_VLRELU__WASM_X4, inplace) { |
| 1062 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1063 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1064 | .batch_size(batch_size) |
| 1065 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1066 | .Test(xnn_f32_vlrelu_ukernel__wasm_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1067 | } |
| 1068 | } |
| 1069 | |
| 1070 | TEST(F32_VLRELU__WASM_X4, slope) { |
| 1071 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 1072 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1073 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1074 | .batch_size(batch_size) |
| 1075 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1076 | .Test(xnn_f32_vlrelu_ukernel__wasm_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1077 | } |
| 1078 | } |
| 1079 | } |
Marat Dukhan | 4c61779 | 2021-12-21 15:47:58 -0800 | [diff] [blame] | 1080 | #endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1081 | |
| 1082 | |
| 1083 | TEST(F32_VLRELU__SCALAR_X1, batch_eq_1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1084 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1085 | .batch_size(1) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1086 | .Test(xnn_f32_vlrelu_ukernel__scalar_x1, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1087 | } |
| 1088 | |
| 1089 | TEST(F32_VLRELU__SCALAR_X1, batch_gt_1) { |
| 1090 | for (size_t batch_size = 2; batch_size < 10; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1091 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1092 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1093 | .Test(xnn_f32_vlrelu_ukernel__scalar_x1, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1094 | } |
| 1095 | } |
| 1096 | |
| 1097 | TEST(F32_VLRELU__SCALAR_X1, inplace) { |
| 1098 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1099 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1100 | .batch_size(batch_size) |
| 1101 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1102 | .Test(xnn_f32_vlrelu_ukernel__scalar_x1, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1103 | } |
| 1104 | } |
| 1105 | |
| 1106 | TEST(F32_VLRELU__SCALAR_X1, slope) { |
| 1107 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 1108 | for (size_t batch_size = 1; batch_size <= 5; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1109 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1110 | .batch_size(batch_size) |
| 1111 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1112 | .Test(xnn_f32_vlrelu_ukernel__scalar_x1, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1113 | } |
| 1114 | } |
| 1115 | } |
| 1116 | |
| 1117 | TEST(F32_VLRELU__SCALAR_X2, batch_eq_2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1118 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1119 | .batch_size(2) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1120 | .Test(xnn_f32_vlrelu_ukernel__scalar_x2, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1121 | } |
| 1122 | |
| 1123 | TEST(F32_VLRELU__SCALAR_X2, batch_div_2) { |
| 1124 | for (size_t batch_size = 4; batch_size < 20; batch_size += 2) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1125 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1126 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1127 | .Test(xnn_f32_vlrelu_ukernel__scalar_x2, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1128 | } |
| 1129 | } |
| 1130 | |
| 1131 | TEST(F32_VLRELU__SCALAR_X2, batch_lt_2) { |
| 1132 | for (size_t batch_size = 1; batch_size < 2; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1133 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1134 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1135 | .Test(xnn_f32_vlrelu_ukernel__scalar_x2, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1136 | } |
| 1137 | } |
| 1138 | |
| 1139 | TEST(F32_VLRELU__SCALAR_X2, batch_gt_2) { |
| 1140 | for (size_t batch_size = 3; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1141 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1142 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1143 | .Test(xnn_f32_vlrelu_ukernel__scalar_x2, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1144 | } |
| 1145 | } |
| 1146 | |
| 1147 | TEST(F32_VLRELU__SCALAR_X2, inplace) { |
| 1148 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1149 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1150 | .batch_size(batch_size) |
| 1151 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1152 | .Test(xnn_f32_vlrelu_ukernel__scalar_x2, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1153 | } |
| 1154 | } |
| 1155 | |
| 1156 | TEST(F32_VLRELU__SCALAR_X2, slope) { |
| 1157 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 1158 | for (size_t batch_size = 1; batch_size <= 10; batch_size += 1) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1159 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1160 | .batch_size(batch_size) |
| 1161 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1162 | .Test(xnn_f32_vlrelu_ukernel__scalar_x2, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1163 | } |
| 1164 | } |
| 1165 | } |
| 1166 | |
| 1167 | TEST(F32_VLRELU__SCALAR_X4, batch_eq_4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1168 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1169 | .batch_size(4) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1170 | .Test(xnn_f32_vlrelu_ukernel__scalar_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1171 | } |
| 1172 | |
| 1173 | TEST(F32_VLRELU__SCALAR_X4, batch_div_4) { |
| 1174 | for (size_t batch_size = 8; batch_size < 40; batch_size += 4) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1175 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1176 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1177 | .Test(xnn_f32_vlrelu_ukernel__scalar_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1178 | } |
| 1179 | } |
| 1180 | |
| 1181 | TEST(F32_VLRELU__SCALAR_X4, batch_lt_4) { |
| 1182 | for (size_t batch_size = 1; batch_size < 4; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1183 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1184 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1185 | .Test(xnn_f32_vlrelu_ukernel__scalar_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1186 | } |
| 1187 | } |
| 1188 | |
| 1189 | TEST(F32_VLRELU__SCALAR_X4, batch_gt_4) { |
| 1190 | for (size_t batch_size = 5; batch_size < 8; batch_size++) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1191 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1192 | .batch_size(batch_size) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1193 | .Test(xnn_f32_vlrelu_ukernel__scalar_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1194 | } |
| 1195 | } |
| 1196 | |
| 1197 | TEST(F32_VLRELU__SCALAR_X4, inplace) { |
| 1198 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1199 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1200 | .batch_size(batch_size) |
| 1201 | .inplace(true) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1202 | .Test(xnn_f32_vlrelu_ukernel__scalar_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1203 | } |
| 1204 | } |
| 1205 | |
| 1206 | TEST(F32_VLRELU__SCALAR_X4, slope) { |
| 1207 | for (float slope : std::vector<float>({-0.7f, 0.3f, 1.3f})) { |
| 1208 | for (size_t batch_size = 1; batch_size <= 20; batch_size += 3) { |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1209 | VUnaryMicrokernelTester() |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1210 | .batch_size(batch_size) |
| 1211 | .slope(slope) |
Marat Dukhan | 2894e99 | 2021-12-30 08:29:48 -0800 | [diff] [blame] | 1212 | .Test(xnn_f32_vlrelu_ukernel__scalar_x4, xnn_init_f32_lrelu_scalar_params); |
Marat Dukhan | 8cc7efe | 2020-06-10 16:24:27 -0700 | [diff] [blame] | 1213 | } |
| 1214 | } |
Marat Dukhan | 87ed45c | 2021-05-13 12:25:22 -0700 | [diff] [blame] | 1215 | } |