XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1 | // Copyright (c) Facebook, Inc. and its affiliates. |
| 2 | // All rights reserved. |
| 3 | // |
| 4 | // Copyright 2019 Google LLC |
| 5 | // |
| 6 | // This source code is licensed under the BSD-style license found in the |
| 7 | // LICENSE file in the root directory of this source tree. |
| 8 | // |
| 9 | // Auto-generated file. Do not edit! |
| 10 | // Specification: test/q8-dwconv.yaml |
| 11 | // Generator: tools/generate-dwconv-test.py |
| 12 | |
| 13 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 14 | #include <gtest/gtest.h> |
| 15 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 16 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 17 | #include <xnnpack/isa-checks.h> |
| 18 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 19 | #include <xnnpack/dwconv.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 20 | #include "dwconv-microkernel-tester.h" |
| 21 | |
| 22 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 23 | #if XNN_ARCH_ARM |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 24 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, c_eq_8) { |
| 25 | TEST_REQUIRES_ARM_NEON; |
| 26 | DWConvMicrokernelTester() |
| 27 | .cr(8) |
| 28 | .kr(9) |
| 29 | .channels(8) |
| 30 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 31 | } |
| 32 | |
| 33 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, c_div_8) { |
| 34 | TEST_REQUIRES_ARM_NEON; |
| 35 | for (uint32_t channels = 16; channels < 128; channels += 24) { |
| 36 | DWConvMicrokernelTester() |
| 37 | .cr(8) |
| 38 | .kr(9) |
| 39 | .channels(channels) |
| 40 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 41 | } |
| 42 | } |
| 43 | |
| 44 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, c_div_8_with_qmin) { |
| 45 | TEST_REQUIRES_ARM_NEON; |
| 46 | for (uint32_t channels = 16; channels < 128; channels += 24) { |
| 47 | DWConvMicrokernelTester() |
| 48 | .cr(8) |
| 49 | .kr(9) |
| 50 | .channels(channels) |
| 51 | .qmin(128) |
| 52 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 53 | } |
| 54 | } |
| 55 | |
| 56 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, c_div_8_with_qmax) { |
| 57 | TEST_REQUIRES_ARM_NEON; |
| 58 | for (uint32_t channels = 16; channels < 128; channels += 24) { |
| 59 | DWConvMicrokernelTester() |
| 60 | .cr(8) |
| 61 | .kr(9) |
| 62 | .channels(channels) |
| 63 | .qmax(128) |
| 64 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 65 | } |
| 66 | } |
| 67 | |
| 68 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, c_lt_8) { |
| 69 | TEST_REQUIRES_ARM_NEON; |
| 70 | for (uint32_t channels = 1; channels < 8; channels++) { |
| 71 | DWConvMicrokernelTester() |
| 72 | .cr(8) |
| 73 | .kr(9) |
| 74 | .channels(channels) |
| 75 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 76 | } |
| 77 | } |
| 78 | |
| 79 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, c_gt_8) { |
| 80 | TEST_REQUIRES_ARM_NEON; |
| 81 | for (uint32_t channels = 9; channels < 16; channels++) { |
| 82 | DWConvMicrokernelTester() |
| 83 | .cr(8) |
| 84 | .kr(9) |
| 85 | .channels(channels) |
| 86 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 87 | } |
| 88 | } |
| 89 | |
| 90 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, c_gt_8_with_qmin) { |
| 91 | TEST_REQUIRES_ARM_NEON; |
| 92 | for (uint32_t channels = 9; channels < 16; channels++) { |
| 93 | DWConvMicrokernelTester() |
| 94 | .cr(8) |
| 95 | .kr(9) |
| 96 | .channels(channels) |
| 97 | .qmin(128) |
| 98 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 99 | } |
| 100 | } |
| 101 | |
| 102 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, c_gt_8_with_qmax) { |
| 103 | TEST_REQUIRES_ARM_NEON; |
| 104 | for (uint32_t channels = 9; channels < 16; channels++) { |
| 105 | DWConvMicrokernelTester() |
| 106 | .cr(8) |
| 107 | .kr(9) |
| 108 | .channels(channels) |
| 109 | .qmax(128) |
| 110 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 111 | } |
| 112 | } |
| 113 | |
| 114 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, multipixel) { |
| 115 | TEST_REQUIRES_ARM_NEON; |
| 116 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 117 | DWConvMicrokernelTester() |
| 118 | .cr(8) |
| 119 | .kr(9) |
| 120 | .channels(channels) |
| 121 | .width(3) |
| 122 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 123 | } |
| 124 | } |
| 125 | |
| 126 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, multipixel_with_step) { |
| 127 | TEST_REQUIRES_ARM_NEON; |
| 128 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 129 | for (size_t step = 2; step <= 9; step++) { |
| 130 | DWConvMicrokernelTester() |
| 131 | .cr(8) |
| 132 | .kr(9) |
| 133 | .channels(channels) |
| 134 | .width(3) |
| 135 | .step(step) |
| 136 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 137 | } |
| 138 | } |
| 139 | } |
| 140 | |
| 141 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, multipixel_with_output_stride) { |
| 142 | TEST_REQUIRES_ARM_NEON; |
| 143 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 144 | DWConvMicrokernelTester() |
| 145 | .cr(8) |
| 146 | .kr(9) |
| 147 | .channels(8) |
| 148 | .width(5) |
| 149 | .output_stride(43) |
| 150 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 151 | } |
| 152 | } |
| 153 | |
| 154 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, multipixel_with_qmin) { |
| 155 | TEST_REQUIRES_ARM_NEON; |
| 156 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 157 | DWConvMicrokernelTester() |
| 158 | .cr(8) |
| 159 | .kr(9) |
| 160 | .channels(channels) |
| 161 | .width(3) |
| 162 | .qmin(128) |
| 163 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 164 | } |
| 165 | } |
| 166 | |
| 167 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, multipixel_with_qmax) { |
| 168 | TEST_REQUIRES_ARM_NEON; |
| 169 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 170 | DWConvMicrokernelTester() |
| 171 | .cr(8) |
| 172 | .kr(9) |
| 173 | .channels(channels) |
| 174 | .width(3) |
| 175 | .qmax(128) |
| 176 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 177 | } |
| 178 | } |
| 179 | |
| 180 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, input_zero_point_only) { |
| 181 | TEST_REQUIRES_ARM_NEON; |
| 182 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 183 | DWConvMicrokernelTester() |
| 184 | .cr(8) |
| 185 | .kr(9) |
| 186 | .channels(channels) |
| 187 | .width(3) |
| 188 | .input_zero_point(255) |
| 189 | .kernel_zero_point(0) |
| 190 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 191 | } |
| 192 | } |
| 193 | |
| 194 | TEST(Q8_DWCONV_UP8X9__AARCH32_NEON, kernel_zero_point_only) { |
| 195 | TEST_REQUIRES_ARM_NEON; |
| 196 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 197 | DWConvMicrokernelTester() |
| 198 | .cr(8) |
| 199 | .kr(9) |
| 200 | .channels(channels) |
| 201 | .width(3) |
| 202 | .input_zero_point(0) |
| 203 | .kernel_zero_point(255) |
| 204 | .Test(xnn_q8_dwconv_ukernel_up8x9__aarch32_neon); |
| 205 | } |
| 206 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 207 | #endif // XNN_ARCH_ARM |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 208 | |
| 209 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 210 | #if XNN_ARCH_ARM || XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 211 | TEST(Q8_DWCONV_UP8X9__NEON, c_eq_8) { |
| 212 | TEST_REQUIRES_ARM_NEON; |
| 213 | DWConvMicrokernelTester() |
| 214 | .cr(8) |
| 215 | .kr(9) |
| 216 | .channels(8) |
| 217 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 218 | } |
| 219 | |
| 220 | TEST(Q8_DWCONV_UP8X9__NEON, c_div_8) { |
| 221 | TEST_REQUIRES_ARM_NEON; |
| 222 | for (uint32_t channels = 16; channels < 128; channels += 24) { |
| 223 | DWConvMicrokernelTester() |
| 224 | .cr(8) |
| 225 | .kr(9) |
| 226 | .channels(channels) |
| 227 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 228 | } |
| 229 | } |
| 230 | |
| 231 | TEST(Q8_DWCONV_UP8X9__NEON, c_div_8_with_qmin) { |
| 232 | TEST_REQUIRES_ARM_NEON; |
| 233 | for (uint32_t channels = 16; channels < 128; channels += 24) { |
| 234 | DWConvMicrokernelTester() |
| 235 | .cr(8) |
| 236 | .kr(9) |
| 237 | .channels(channels) |
| 238 | .qmin(128) |
| 239 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 240 | } |
| 241 | } |
| 242 | |
| 243 | TEST(Q8_DWCONV_UP8X9__NEON, c_div_8_with_qmax) { |
| 244 | TEST_REQUIRES_ARM_NEON; |
| 245 | for (uint32_t channels = 16; channels < 128; channels += 24) { |
| 246 | DWConvMicrokernelTester() |
| 247 | .cr(8) |
| 248 | .kr(9) |
| 249 | .channels(channels) |
| 250 | .qmax(128) |
| 251 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 252 | } |
| 253 | } |
| 254 | |
| 255 | TEST(Q8_DWCONV_UP8X9__NEON, c_lt_8) { |
| 256 | TEST_REQUIRES_ARM_NEON; |
| 257 | for (uint32_t channels = 1; channels < 8; channels++) { |
| 258 | DWConvMicrokernelTester() |
| 259 | .cr(8) |
| 260 | .kr(9) |
| 261 | .channels(channels) |
| 262 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 263 | } |
| 264 | } |
| 265 | |
| 266 | TEST(Q8_DWCONV_UP8X9__NEON, c_gt_8) { |
| 267 | TEST_REQUIRES_ARM_NEON; |
| 268 | for (uint32_t channels = 9; channels < 16; channels++) { |
| 269 | DWConvMicrokernelTester() |
| 270 | .cr(8) |
| 271 | .kr(9) |
| 272 | .channels(channels) |
| 273 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 274 | } |
| 275 | } |
| 276 | |
| 277 | TEST(Q8_DWCONV_UP8X9__NEON, c_gt_8_with_qmin) { |
| 278 | TEST_REQUIRES_ARM_NEON; |
| 279 | for (uint32_t channels = 9; channels < 16; channels++) { |
| 280 | DWConvMicrokernelTester() |
| 281 | .cr(8) |
| 282 | .kr(9) |
| 283 | .channels(channels) |
| 284 | .qmin(128) |
| 285 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 286 | } |
| 287 | } |
| 288 | |
| 289 | TEST(Q8_DWCONV_UP8X9__NEON, c_gt_8_with_qmax) { |
| 290 | TEST_REQUIRES_ARM_NEON; |
| 291 | for (uint32_t channels = 9; channels < 16; channels++) { |
| 292 | DWConvMicrokernelTester() |
| 293 | .cr(8) |
| 294 | .kr(9) |
| 295 | .channels(channels) |
| 296 | .qmax(128) |
| 297 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 298 | } |
| 299 | } |
| 300 | |
| 301 | TEST(Q8_DWCONV_UP8X9__NEON, multipixel) { |
| 302 | TEST_REQUIRES_ARM_NEON; |
| 303 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 304 | DWConvMicrokernelTester() |
| 305 | .cr(8) |
| 306 | .kr(9) |
| 307 | .channels(channels) |
| 308 | .width(3) |
| 309 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 310 | } |
| 311 | } |
| 312 | |
| 313 | TEST(Q8_DWCONV_UP8X9__NEON, multipixel_with_step) { |
| 314 | TEST_REQUIRES_ARM_NEON; |
| 315 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 316 | for (size_t step = 2; step <= 9; step++) { |
| 317 | DWConvMicrokernelTester() |
| 318 | .cr(8) |
| 319 | .kr(9) |
| 320 | .channels(channels) |
| 321 | .width(3) |
| 322 | .step(step) |
| 323 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 324 | } |
| 325 | } |
| 326 | } |
| 327 | |
| 328 | TEST(Q8_DWCONV_UP8X9__NEON, multipixel_with_output_stride) { |
| 329 | TEST_REQUIRES_ARM_NEON; |
| 330 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 331 | DWConvMicrokernelTester() |
| 332 | .cr(8) |
| 333 | .kr(9) |
| 334 | .channels(8) |
| 335 | .width(5) |
| 336 | .output_stride(43) |
| 337 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 338 | } |
| 339 | } |
| 340 | |
| 341 | TEST(Q8_DWCONV_UP8X9__NEON, multipixel_with_qmin) { |
| 342 | TEST_REQUIRES_ARM_NEON; |
| 343 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 344 | DWConvMicrokernelTester() |
| 345 | .cr(8) |
| 346 | .kr(9) |
| 347 | .channels(channels) |
| 348 | .width(3) |
| 349 | .qmin(128) |
| 350 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 351 | } |
| 352 | } |
| 353 | |
| 354 | TEST(Q8_DWCONV_UP8X9__NEON, multipixel_with_qmax) { |
| 355 | TEST_REQUIRES_ARM_NEON; |
| 356 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 357 | DWConvMicrokernelTester() |
| 358 | .cr(8) |
| 359 | .kr(9) |
| 360 | .channels(channels) |
| 361 | .width(3) |
| 362 | .qmax(128) |
| 363 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 364 | } |
| 365 | } |
| 366 | |
| 367 | TEST(Q8_DWCONV_UP8X9__NEON, input_zero_point_only) { |
| 368 | TEST_REQUIRES_ARM_NEON; |
| 369 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 370 | DWConvMicrokernelTester() |
| 371 | .cr(8) |
| 372 | .kr(9) |
| 373 | .channels(channels) |
| 374 | .width(3) |
| 375 | .input_zero_point(255) |
| 376 | .kernel_zero_point(0) |
| 377 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 378 | } |
| 379 | } |
| 380 | |
| 381 | TEST(Q8_DWCONV_UP8X9__NEON, kernel_zero_point_only) { |
| 382 | TEST_REQUIRES_ARM_NEON; |
| 383 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 384 | DWConvMicrokernelTester() |
| 385 | .cr(8) |
| 386 | .kr(9) |
| 387 | .channels(channels) |
| 388 | .width(3) |
| 389 | .input_zero_point(0) |
| 390 | .kernel_zero_point(255) |
| 391 | .Test(xnn_q8_dwconv_ukernel_up8x9__neon); |
| 392 | } |
| 393 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 394 | #endif // XNN_ARCH_ARM || XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 395 | |
| 396 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 397 | #if XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 398 | TEST(Q8_DWCONV_UP8X9__SSE2, c_eq_8) { |
| 399 | TEST_REQUIRES_X86_SSE2; |
| 400 | DWConvMicrokernelTester() |
| 401 | .cr(8) |
| 402 | .kr(9) |
| 403 | .channels(8) |
| 404 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 405 | } |
| 406 | |
| 407 | TEST(Q8_DWCONV_UP8X9__SSE2, c_div_8) { |
| 408 | TEST_REQUIRES_X86_SSE2; |
| 409 | for (uint32_t channels = 16; channels < 128; channels += 24) { |
| 410 | DWConvMicrokernelTester() |
| 411 | .cr(8) |
| 412 | .kr(9) |
| 413 | .channels(channels) |
| 414 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 415 | } |
| 416 | } |
| 417 | |
| 418 | TEST(Q8_DWCONV_UP8X9__SSE2, c_div_8_with_qmin) { |
| 419 | TEST_REQUIRES_X86_SSE2; |
| 420 | for (uint32_t channels = 16; channels < 128; channels += 24) { |
| 421 | DWConvMicrokernelTester() |
| 422 | .cr(8) |
| 423 | .kr(9) |
| 424 | .channels(channels) |
| 425 | .qmin(128) |
| 426 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 427 | } |
| 428 | } |
| 429 | |
| 430 | TEST(Q8_DWCONV_UP8X9__SSE2, c_div_8_with_qmax) { |
| 431 | TEST_REQUIRES_X86_SSE2; |
| 432 | for (uint32_t channels = 16; channels < 128; channels += 24) { |
| 433 | DWConvMicrokernelTester() |
| 434 | .cr(8) |
| 435 | .kr(9) |
| 436 | .channels(channels) |
| 437 | .qmax(128) |
| 438 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 439 | } |
| 440 | } |
| 441 | |
| 442 | TEST(Q8_DWCONV_UP8X9__SSE2, c_lt_8) { |
| 443 | TEST_REQUIRES_X86_SSE2; |
| 444 | for (uint32_t channels = 1; channels < 8; channels++) { |
| 445 | DWConvMicrokernelTester() |
| 446 | .cr(8) |
| 447 | .kr(9) |
| 448 | .channels(channels) |
| 449 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 450 | } |
| 451 | } |
| 452 | |
| 453 | TEST(Q8_DWCONV_UP8X9__SSE2, c_gt_8) { |
| 454 | TEST_REQUIRES_X86_SSE2; |
| 455 | for (uint32_t channels = 9; channels < 16; channels++) { |
| 456 | DWConvMicrokernelTester() |
| 457 | .cr(8) |
| 458 | .kr(9) |
| 459 | .channels(channels) |
| 460 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 461 | } |
| 462 | } |
| 463 | |
| 464 | TEST(Q8_DWCONV_UP8X9__SSE2, c_gt_8_with_qmin) { |
| 465 | TEST_REQUIRES_X86_SSE2; |
| 466 | for (uint32_t channels = 9; channels < 16; channels++) { |
| 467 | DWConvMicrokernelTester() |
| 468 | .cr(8) |
| 469 | .kr(9) |
| 470 | .channels(channels) |
| 471 | .qmin(128) |
| 472 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 473 | } |
| 474 | } |
| 475 | |
| 476 | TEST(Q8_DWCONV_UP8X9__SSE2, c_gt_8_with_qmax) { |
| 477 | TEST_REQUIRES_X86_SSE2; |
| 478 | for (uint32_t channels = 9; channels < 16; channels++) { |
| 479 | DWConvMicrokernelTester() |
| 480 | .cr(8) |
| 481 | .kr(9) |
| 482 | .channels(channels) |
| 483 | .qmax(128) |
| 484 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 485 | } |
| 486 | } |
| 487 | |
| 488 | TEST(Q8_DWCONV_UP8X9__SSE2, multipixel) { |
| 489 | TEST_REQUIRES_X86_SSE2; |
| 490 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 491 | DWConvMicrokernelTester() |
| 492 | .cr(8) |
| 493 | .kr(9) |
| 494 | .channels(channels) |
| 495 | .width(3) |
| 496 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 497 | } |
| 498 | } |
| 499 | |
| 500 | TEST(Q8_DWCONV_UP8X9__SSE2, multipixel_with_step) { |
| 501 | TEST_REQUIRES_X86_SSE2; |
| 502 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 503 | for (size_t step = 2; step <= 9; step++) { |
| 504 | DWConvMicrokernelTester() |
| 505 | .cr(8) |
| 506 | .kr(9) |
| 507 | .channels(channels) |
| 508 | .width(3) |
| 509 | .step(step) |
| 510 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 511 | } |
| 512 | } |
| 513 | } |
| 514 | |
| 515 | TEST(Q8_DWCONV_UP8X9__SSE2, multipixel_with_output_stride) { |
| 516 | TEST_REQUIRES_X86_SSE2; |
| 517 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 518 | DWConvMicrokernelTester() |
| 519 | .cr(8) |
| 520 | .kr(9) |
| 521 | .channels(8) |
| 522 | .width(5) |
| 523 | .output_stride(43) |
| 524 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 525 | } |
| 526 | } |
| 527 | |
| 528 | TEST(Q8_DWCONV_UP8X9__SSE2, multipixel_with_qmin) { |
| 529 | TEST_REQUIRES_X86_SSE2; |
| 530 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 531 | DWConvMicrokernelTester() |
| 532 | .cr(8) |
| 533 | .kr(9) |
| 534 | .channels(channels) |
| 535 | .width(3) |
| 536 | .qmin(128) |
| 537 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 538 | } |
| 539 | } |
| 540 | |
| 541 | TEST(Q8_DWCONV_UP8X9__SSE2, multipixel_with_qmax) { |
| 542 | TEST_REQUIRES_X86_SSE2; |
| 543 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 544 | DWConvMicrokernelTester() |
| 545 | .cr(8) |
| 546 | .kr(9) |
| 547 | .channels(channels) |
| 548 | .width(3) |
| 549 | .qmax(128) |
| 550 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 551 | } |
| 552 | } |
| 553 | |
| 554 | TEST(Q8_DWCONV_UP8X9__SSE2, input_zero_point_only) { |
| 555 | TEST_REQUIRES_X86_SSE2; |
| 556 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 557 | DWConvMicrokernelTester() |
| 558 | .cr(8) |
| 559 | .kr(9) |
| 560 | .channels(channels) |
| 561 | .width(3) |
| 562 | .input_zero_point(255) |
| 563 | .kernel_zero_point(0) |
| 564 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 565 | } |
| 566 | } |
| 567 | |
| 568 | TEST(Q8_DWCONV_UP8X9__SSE2, kernel_zero_point_only) { |
| 569 | TEST_REQUIRES_X86_SSE2; |
| 570 | for (size_t channels = 1; channels <= 40; channels += 7) { |
| 571 | DWConvMicrokernelTester() |
| 572 | .cr(8) |
| 573 | .kr(9) |
| 574 | .channels(channels) |
| 575 | .width(3) |
| 576 | .input_zero_point(0) |
| 577 | .kernel_zero_point(255) |
| 578 | .Test(xnn_q8_dwconv_ukernel_up8x9__sse2); |
| 579 | } |
| 580 | } |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 581 | #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 582 | |
| 583 | |
| 584 | TEST(Q8_DWCONV_UP1X9__SCALAR, c_eq_1) { |
| 585 | DWConvMicrokernelTester() |
| 586 | .cr(1) |
| 587 | .kr(9) |
| 588 | .channels(1) |
| 589 | .Test(xnn_q8_dwconv_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar); |
| 590 | } |
| 591 | |
| 592 | TEST(Q8_DWCONV_UP1X9__SCALAR, c_gt_1) { |
| 593 | for (uint32_t channels = 2; channels < 10; channels++) { |
| 594 | DWConvMicrokernelTester() |
| 595 | .cr(1) |
| 596 | .kr(9) |
| 597 | .channels(channels) |
| 598 | .Test(xnn_q8_dwconv_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar); |
| 599 | } |
| 600 | } |
| 601 | |
| 602 | TEST(Q8_DWCONV_UP1X9__SCALAR, c_gt_1_with_qmin) { |
| 603 | for (uint32_t channels = 2; channels < 10; channels++) { |
| 604 | DWConvMicrokernelTester() |
| 605 | .cr(1) |
| 606 | .kr(9) |
| 607 | .channels(channels) |
| 608 | .qmin(128) |
| 609 | .Test(xnn_q8_dwconv_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar); |
| 610 | } |
| 611 | } |
| 612 | |
| 613 | TEST(Q8_DWCONV_UP1X9__SCALAR, c_gt_1_with_qmax) { |
| 614 | for (uint32_t channels = 2; channels < 10; channels++) { |
| 615 | DWConvMicrokernelTester() |
| 616 | .cr(1) |
| 617 | .kr(9) |
| 618 | .channels(channels) |
| 619 | .qmax(128) |
| 620 | .Test(xnn_q8_dwconv_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar); |
| 621 | } |
| 622 | } |
| 623 | |
| 624 | TEST(Q8_DWCONV_UP1X9__SCALAR, multipixel) { |
| 625 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 626 | DWConvMicrokernelTester() |
| 627 | .cr(1) |
| 628 | .kr(9) |
| 629 | .channels(channels) |
| 630 | .width(3) |
| 631 | .Test(xnn_q8_dwconv_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar); |
| 632 | } |
| 633 | } |
| 634 | |
| 635 | TEST(Q8_DWCONV_UP1X9__SCALAR, multipixel_with_step) { |
| 636 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 637 | for (size_t step = 2; step <= 9; step++) { |
| 638 | DWConvMicrokernelTester() |
| 639 | .cr(1) |
| 640 | .kr(9) |
| 641 | .channels(channels) |
| 642 | .width(3) |
| 643 | .step(step) |
| 644 | .Test(xnn_q8_dwconv_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar); |
| 645 | } |
| 646 | } |
| 647 | } |
| 648 | |
| 649 | TEST(Q8_DWCONV_UP1X9__SCALAR, multipixel_with_output_stride) { |
| 650 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 651 | DWConvMicrokernelTester() |
| 652 | .cr(1) |
| 653 | .kr(9) |
| 654 | .channels(1) |
| 655 | .width(5) |
| 656 | .output_stride(7) |
| 657 | .Test(xnn_q8_dwconv_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar); |
| 658 | } |
| 659 | } |
| 660 | |
| 661 | TEST(Q8_DWCONV_UP1X9__SCALAR, multipixel_with_qmin) { |
| 662 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 663 | DWConvMicrokernelTester() |
| 664 | .cr(1) |
| 665 | .kr(9) |
| 666 | .channels(channels) |
| 667 | .width(3) |
| 668 | .qmin(128) |
| 669 | .Test(xnn_q8_dwconv_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar); |
| 670 | } |
| 671 | } |
| 672 | |
| 673 | TEST(Q8_DWCONV_UP1X9__SCALAR, multipixel_with_qmax) { |
| 674 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 675 | DWConvMicrokernelTester() |
| 676 | .cr(1) |
| 677 | .kr(9) |
| 678 | .channels(channels) |
| 679 | .width(3) |
| 680 | .qmax(128) |
| 681 | .Test(xnn_q8_dwconv_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar); |
| 682 | } |
| 683 | } |
| 684 | |
| 685 | TEST(Q8_DWCONV_UP1X9__SCALAR, input_zero_point_only) { |
| 686 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 687 | DWConvMicrokernelTester() |
| 688 | .cr(1) |
| 689 | .kr(9) |
| 690 | .channels(channels) |
| 691 | .width(3) |
| 692 | .input_zero_point(255) |
| 693 | .kernel_zero_point(0) |
| 694 | .Test(xnn_q8_dwconv_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar); |
| 695 | } |
| 696 | } |
| 697 | |
| 698 | TEST(Q8_DWCONV_UP1X9__SCALAR, kernel_zero_point_only) { |
| 699 | for (size_t channels = 1; channels <= 5; channels += 1) { |
| 700 | DWConvMicrokernelTester() |
| 701 | .cr(1) |
| 702 | .kr(9) |
| 703 | .channels(channels) |
| 704 | .width(3) |
| 705 | .input_zero_point(0) |
| 706 | .kernel_zero_point(255) |
| 707 | .Test(xnn_q8_dwconv_ukernel_up1x9__scalar, DWConvMicrokernelTester::Variant::Scalar); |
| 708 | } |
| 709 | } |