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Marat Dukhan4ba70b72021-07-19 11:20:16 -07001// Auto-generated file. Do not edit!
2// Template: src/qs8-dwconv/unipass-neon-mul8.c.in
3// Generator: tools/xngen
4//
5// Copyright 2020 Google LLC
6//
7// This source code is licensed under the BSD-style license found in the
8// LICENSE file in the root directory of this source tree.
9
10#include <assert.h>
11
12#include <arm_neon.h>
13
14#include <xnnpack/dwconv.h>
15
16
Marat Dukhan5f2939f2021-07-23 13:38:32 -070017void xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__neon_mul8_ld128(
Marat Dukhan4ba70b72021-07-19 11:20:16 -070018 size_t channels,
19 size_t output_width,
20 const int8_t** input,
21 const void* weights,
22 int8_t* output,
23 size_t input_stride,
24 size_t output_increment,
25 size_t input_offset,
26 const int8_t* zero,
Marat Dukhan7be427a2021-12-13 23:38:20 -080027 const union xnn_qs8_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
Marat Dukhan4ba70b72021-07-19 11:20:16 -070028{
29 assert(channels != 0);
30 assert(output_width != 0);
31
Marat Dukhan7988a182021-12-06 22:00:33 -080032 const float32x4_t vmagic_bias = vld1q_dup_f32(&params->neon.magic_bias);
Marat Dukhan5a31dc62021-12-07 00:54:02 -080033 const int32x4_t vmagic_bias_less_output_zero_point = vld1q_dup_s32(&params->neon.magic_bias_less_output_zero_point);
Marat Dukhan03efa0f2021-12-07 10:53:39 -080034 const int8x16_t voutput_min = vld1q_dup_s8(&params->neon.output_min);
Marat Dukhan5a31dc62021-12-07 00:54:02 -080035 const int8x16_t voutput_max = vld1q_dup_s8(&params->neon.output_max);
Marat Dukhan4ba70b72021-07-19 11:20:16 -070036 do {
37 const int8_t* i0 = input[0];
38 assert(i0 != NULL);
39 if XNN_UNPREDICTABLE(i0 != zero) {
40 i0 = (const int8_t*) ((uintptr_t) i0 + input_offset);
41 }
42 const int8_t* i1 = input[1];
43 assert(i1 != NULL);
44 if XNN_UNPREDICTABLE(i1 != zero) {
45 i1 = (const int8_t*) ((uintptr_t) i1 + input_offset);
46 }
47 const int8_t* i2 = input[2];
48 assert(i2 != NULL);
49 if XNN_UNPREDICTABLE(i2 != zero) {
50 i2 = (const int8_t*) ((uintptr_t) i2 + input_offset);
51 }
52 const int8_t* i3 = input[3];
53 assert(i3 != NULL);
54 if XNN_UNPREDICTABLE(i3 != zero) {
55 i3 = (const int8_t*) ((uintptr_t) i3 + input_offset);
56 }
57 const int8_t* i4 = input[4];
58 assert(i4 != NULL);
59 if XNN_UNPREDICTABLE(i4 != zero) {
60 i4 = (const int8_t*) ((uintptr_t) i4 + input_offset);
61 }
62 const int8_t* i5 = input[5];
63 assert(i5 != NULL);
64 if XNN_UNPREDICTABLE(i5 != zero) {
65 i5 = (const int8_t*) ((uintptr_t) i5 + input_offset);
66 }
67 const int8_t* i6 = input[6];
68 assert(i6 != NULL);
69 if XNN_UNPREDICTABLE(i6 != zero) {
70 i6 = (const int8_t*) ((uintptr_t) i6 + input_offset);
71 }
72 const int8_t* i7 = input[7];
73 assert(i7 != NULL);
74 if XNN_UNPREDICTABLE(i7 != zero) {
75 i7 = (const int8_t*) ((uintptr_t) i7 + input_offset);
76 }
77 const int8_t* i8 = input[8];
78 assert(i8 != NULL);
79 if XNN_UNPREDICTABLE(i8 != zero) {
80 i8 = (const int8_t*) ((uintptr_t) i8 + input_offset);
81 }
82 input = (const int8_t**) ((uintptr_t) input + input_stride);
83
84 size_t c = channels;
85 const void* w = weights;
86 for (; c >= 16; c -= 16) {
87 int32x4_t vacc0123 = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
88 int32x4_t vacc4567 = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
89 int32x4_t vacc89AB = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
90 int32x4_t vaccCDEF = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
91
Marat Dukhan5f2939f2021-07-23 13:38:32 -070092 const int8x16_t vi0x0123456789ABCDEF = vld1q_s8(i0); i0 += 16;
93 const int8x16_t vk0x0123456789ABCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
Marat Dukhan4ba70b72021-07-19 11:20:16 -070094
Marat Dukhan5f2939f2021-07-23 13:38:32 -070095 int16x8_t vprod01234567 = vmull_s8(vget_low_s8(vi0x0123456789ABCDEF), vget_low_s8(vk0x0123456789ABCDEF));
96 int16x8_t vprod89ABCDEF = vmull_s8(vget_high_s8(vi0x0123456789ABCDEF), vget_high_s8(vk0x0123456789ABCDEF));
Marat Dukhan4ba70b72021-07-19 11:20:16 -070097
Marat Dukhancaccd8e2021-07-22 23:09:00 -070098 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
99 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
100 vacc89AB = vaddw_s16(vacc89AB, vget_low_s16(vprod89ABCDEF));
101 vaccCDEF = vaddw_s16(vaccCDEF, vget_high_s16(vprod89ABCDEF));
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700102 const int8x16_t vi1x0123456789ABCDEF = vld1q_s8(i1); i1 += 16;
103 const int8x16_t vk1x0123456789ABCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700104
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700105 vprod01234567 = vmull_s8(vget_low_s8(vi1x0123456789ABCDEF), vget_low_s8(vk1x0123456789ABCDEF));
106 vprod89ABCDEF = vmull_s8(vget_high_s8(vi1x0123456789ABCDEF), vget_high_s8(vk1x0123456789ABCDEF));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700107
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700108 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
109 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
110 vacc89AB = vaddw_s16(vacc89AB, vget_low_s16(vprod89ABCDEF));
111 vaccCDEF = vaddw_s16(vaccCDEF, vget_high_s16(vprod89ABCDEF));
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700112 const int8x16_t vi2x0123456789ABCDEF = vld1q_s8(i2); i2 += 16;
113 const int8x16_t vk2x0123456789ABCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700114
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700115 vprod01234567 = vmull_s8(vget_low_s8(vi2x0123456789ABCDEF), vget_low_s8(vk2x0123456789ABCDEF));
116 vprod89ABCDEF = vmull_s8(vget_high_s8(vi2x0123456789ABCDEF), vget_high_s8(vk2x0123456789ABCDEF));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700117
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700118 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
119 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
120 vacc89AB = vaddw_s16(vacc89AB, vget_low_s16(vprod89ABCDEF));
121 vaccCDEF = vaddw_s16(vaccCDEF, vget_high_s16(vprod89ABCDEF));
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700122 const int8x16_t vi3x0123456789ABCDEF = vld1q_s8(i3); i3 += 16;
123 const int8x16_t vk3x0123456789ABCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700124
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700125 vprod01234567 = vmull_s8(vget_low_s8(vi3x0123456789ABCDEF), vget_low_s8(vk3x0123456789ABCDEF));
126 vprod89ABCDEF = vmull_s8(vget_high_s8(vi3x0123456789ABCDEF), vget_high_s8(vk3x0123456789ABCDEF));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700127
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700128 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
129 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
130 vacc89AB = vaddw_s16(vacc89AB, vget_low_s16(vprod89ABCDEF));
131 vaccCDEF = vaddw_s16(vaccCDEF, vget_high_s16(vprod89ABCDEF));
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700132 const int8x16_t vi4x0123456789ABCDEF = vld1q_s8(i4); i4 += 16;
133 const int8x16_t vk4x0123456789ABCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700134
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700135 vprod01234567 = vmull_s8(vget_low_s8(vi4x0123456789ABCDEF), vget_low_s8(vk4x0123456789ABCDEF));
136 vprod89ABCDEF = vmull_s8(vget_high_s8(vi4x0123456789ABCDEF), vget_high_s8(vk4x0123456789ABCDEF));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700137
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700138 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
139 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
140 vacc89AB = vaddw_s16(vacc89AB, vget_low_s16(vprod89ABCDEF));
141 vaccCDEF = vaddw_s16(vaccCDEF, vget_high_s16(vprod89ABCDEF));
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700142 const int8x16_t vi5x0123456789ABCDEF = vld1q_s8(i5); i5 += 16;
143 const int8x16_t vk5x0123456789ABCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700144
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700145 vprod01234567 = vmull_s8(vget_low_s8(vi5x0123456789ABCDEF), vget_low_s8(vk5x0123456789ABCDEF));
146 vprod89ABCDEF = vmull_s8(vget_high_s8(vi5x0123456789ABCDEF), vget_high_s8(vk5x0123456789ABCDEF));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700147
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700148 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
149 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
150 vacc89AB = vaddw_s16(vacc89AB, vget_low_s16(vprod89ABCDEF));
151 vaccCDEF = vaddw_s16(vaccCDEF, vget_high_s16(vprod89ABCDEF));
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700152 const int8x16_t vi6x0123456789ABCDEF = vld1q_s8(i6); i6 += 16;
153 const int8x16_t vk6x0123456789ABCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700154
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700155 vprod01234567 = vmull_s8(vget_low_s8(vi6x0123456789ABCDEF), vget_low_s8(vk6x0123456789ABCDEF));
156 vprod89ABCDEF = vmull_s8(vget_high_s8(vi6x0123456789ABCDEF), vget_high_s8(vk6x0123456789ABCDEF));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700157
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700158 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
159 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
160 vacc89AB = vaddw_s16(vacc89AB, vget_low_s16(vprod89ABCDEF));
161 vaccCDEF = vaddw_s16(vaccCDEF, vget_high_s16(vprod89ABCDEF));
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700162 const int8x16_t vi7x0123456789ABCDEF = vld1q_s8(i7); i7 += 16;
163 const int8x16_t vk7x0123456789ABCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700164
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700165 vprod01234567 = vmull_s8(vget_low_s8(vi7x0123456789ABCDEF), vget_low_s8(vk7x0123456789ABCDEF));
166 vprod89ABCDEF = vmull_s8(vget_high_s8(vi7x0123456789ABCDEF), vget_high_s8(vk7x0123456789ABCDEF));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700167
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700168 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
169 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
170 vacc89AB = vaddw_s16(vacc89AB, vget_low_s16(vprod89ABCDEF));
171 vaccCDEF = vaddw_s16(vaccCDEF, vget_high_s16(vprod89ABCDEF));
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700172 const int8x16_t vi8x0123456789ABCDEF = vld1q_s8(i8); i8 += 16;
173 const int8x16_t vk8x0123456789ABCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700174
Marat Dukhan5f2939f2021-07-23 13:38:32 -0700175 vprod01234567 = vmull_s8(vget_low_s8(vi8x0123456789ABCDEF), vget_low_s8(vk8x0123456789ABCDEF));
176 vprod89ABCDEF = vmull_s8(vget_high_s8(vi8x0123456789ABCDEF), vget_high_s8(vk8x0123456789ABCDEF));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700177
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700178 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
179 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
180 vacc89AB = vaddw_s16(vacc89AB, vget_low_s16(vprod89ABCDEF));
181 vaccCDEF = vaddw_s16(vaccCDEF, vget_high_s16(vprod89ABCDEF));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700182
183 float32x4_t vfpacc0123 = vcvtq_f32_s32(vacc0123);
184 float32x4_t vfpacc4567 = vcvtq_f32_s32(vacc4567);
185 float32x4_t vfpacc89AB = vcvtq_f32_s32(vacc89AB);
186 float32x4_t vfpaccCDEF = vcvtq_f32_s32(vaccCDEF);
187
188 const float32x4_t vscale0123 = vld1q_f32((const float*) w); w = (const void*) ((const float*) w + 4);
189 const float32x4_t vscale4567 = vld1q_f32((const float*) w); w = (const void*) ((const float*) w + 4);
190 const float32x4_t vscale89AB = vld1q_f32((const float*) w); w = (const void*) ((const float*) w + 4);
191 const float32x4_t vscaleCDEF = vld1q_f32((const float*) w); w = (const void*) ((const float*) w + 4);
192
193 vfpacc0123 = vmulq_f32(vfpacc0123, vscale0123);
194 vfpacc4567 = vmulq_f32(vfpacc4567, vscale4567);
195 vfpacc89AB = vmulq_f32(vfpacc89AB, vscale89AB);
196 vfpaccCDEF = vmulq_f32(vfpaccCDEF, vscaleCDEF);
197
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700198 vacc0123 = vreinterpretq_s32_f32(vaddq_f32(vfpacc0123, vmagic_bias));
199 vacc4567 = vreinterpretq_s32_f32(vaddq_f32(vfpacc4567, vmagic_bias));
200 vacc89AB = vreinterpretq_s32_f32(vaddq_f32(vfpacc89AB, vmagic_bias));
201 vaccCDEF = vreinterpretq_s32_f32(vaddq_f32(vfpaccCDEF, vmagic_bias));
202
Marat Dukhan03efa0f2021-12-07 10:53:39 -0800203 vacc0123 = vqsubq_s32(vacc0123, vmagic_bias_less_output_zero_point);
204 vacc4567 = vqsubq_s32(vacc4567, vmagic_bias_less_output_zero_point);
205 vacc89AB = vqsubq_s32(vacc89AB, vmagic_bias_less_output_zero_point);
206 vaccCDEF = vqsubq_s32(vaccCDEF, vmagic_bias_less_output_zero_point);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700207
208#if XNN_ARCH_ARM64
Marat Dukhan5a31dc62021-12-07 00:54:02 -0800209 int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567);
210 int16x8_t vacc89ABCDEF = vqmovn_high_s32(vqmovn_s32(vacc89AB), vaccCDEF);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700211
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700212
Marat Dukhan5a31dc62021-12-07 00:54:02 -0800213 int8x16_t vout0123456789ABCDEF = vqmovn_high_s16(vqmovn_s16(vacc01234567), vacc89ABCDEF);
214#else // !XNN_ARCH_ARM64
215 int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567));
216 int16x8_t vacc89ABCDEF = vcombine_s16(vqmovn_s32(vacc89AB), vqmovn_s32(vaccCDEF));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700217
218
Marat Dukhan5a31dc62021-12-07 00:54:02 -0800219 int8x16_t vout0123456789ABCDEF = vcombine_s8(vqmovn_s16(vacc01234567), vqmovn_s16(vacc89ABCDEF));
220#endif // !XNN_ARCH_ARM64
221
Marat Dukhan03efa0f2021-12-07 10:53:39 -0800222 vout0123456789ABCDEF = vmaxq_s8(vout0123456789ABCDEF, voutput_min);
Marat Dukhan5a31dc62021-12-07 00:54:02 -0800223
224 vout0123456789ABCDEF = vminq_s8(vout0123456789ABCDEF, voutput_max);
225
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700226 vst1q_s8(output, vout0123456789ABCDEF); output += 16;
227 }
228 if XNN_UNLIKELY(c != 0) {
229 const int8_t* k = (const int8_t*) ((const int32_t*) w + 16);
230 do {
231 int32x4_t vacc0123 = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
232 int32x4_t vacc4567 = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
233
234 const int8x8_t vi0x01234567 = vld1_s8(i0); i0 += 8;
235 const int8x8_t vk0x01234567 = vld1_s8(k); k += 8;
236
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700237 int16x8_t vprod01234567 = vmull_s8(vi0x01234567, vk0x01234567);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700238
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700239 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
240 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700241 const int8x8_t vi1x01234567 = vld1_s8(i1); i1 += 8;
242 const int8x8_t vk1x01234567 = vld1_s8((const void*) (k + 8));
243
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700244 vprod01234567 = vmull_s8(vi1x01234567, vk1x01234567);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700245
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700246 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
247 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700248 const int8x8_t vi2x01234567 = vld1_s8(i2); i2 += 8;
249 const int8x8_t vk2x01234567 = vld1_s8((const void*) (k + 24));
250
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700251 vprod01234567 = vmull_s8(vi2x01234567, vk2x01234567);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700252
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700253 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
254 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700255 const int8x8_t vi3x01234567 = vld1_s8(i3); i3 += 8;
256 const int8x8_t vk3x01234567 = vld1_s8((const void*) (k + 40));
257
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700258 vprod01234567 = vmull_s8(vi3x01234567, vk3x01234567);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700259
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700260 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
261 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700262 const int8x8_t vi4x01234567 = vld1_s8(i4); i4 += 8;
263 const int8x8_t vk4x01234567 = vld1_s8((const void*) (k + 56));
264
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700265 vprod01234567 = vmull_s8(vi4x01234567, vk4x01234567);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700266
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700267 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
268 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700269 const int8x8_t vi5x01234567 = vld1_s8(i5); i5 += 8;
270 const int8x8_t vk5x01234567 = vld1_s8((const void*) (k + 72));
271
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700272 vprod01234567 = vmull_s8(vi5x01234567, vk5x01234567);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700273
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700274 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
275 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700276 const int8x8_t vi6x01234567 = vld1_s8(i6); i6 += 8;
277 const int8x8_t vk6x01234567 = vld1_s8((const void*) (k + 88));
278
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700279 vprod01234567 = vmull_s8(vi6x01234567, vk6x01234567);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700280
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700281 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
282 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700283 const int8x8_t vi7x01234567 = vld1_s8(i7); i7 += 8;
284 const int8x8_t vk7x01234567 = vld1_s8((const void*) (k + 104));
285
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700286 vprod01234567 = vmull_s8(vi7x01234567, vk7x01234567);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700287
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700288 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
289 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700290 const int8x8_t vi8x01234567 = vld1_s8(i8); i8 += 8;
291 const int8x8_t vk8x01234567 = vld1_s8((const void*) (k + 120));
292
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700293 vprod01234567 = vmull_s8(vi8x01234567, vk8x01234567);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700294
Marat Dukhancaccd8e2021-07-22 23:09:00 -0700295 vacc0123 = vaddw_s16(vacc0123, vget_low_s16(vprod01234567));
296 vacc4567 = vaddw_s16(vacc4567, vget_high_s16(vprod01234567));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700297
298 float32x4_t vfpacc0123 = vcvtq_f32_s32(vacc0123);
299 float32x4_t vfpacc4567 = vcvtq_f32_s32(vacc4567);
300
301 const float32x4_t vscale0123 = vld1q_f32((const float*) ((uintptr_t) w + 8 * sizeof(int32_t) + 144 * sizeof(int8_t)));
302 const float32x4_t vscale4567 = vld1q_f32((const float*) ((uintptr_t) w + 8 * sizeof(int32_t) + 144 * sizeof(int8_t) + 4 * sizeof(float)));
303 vfpacc0123 = vmulq_f32(vfpacc0123, vscale0123);
304 vfpacc4567 = vmulq_f32(vfpacc4567, vscale4567);
305
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700306 vacc0123 = vreinterpretq_s32_f32(vaddq_f32(vfpacc0123, vmagic_bias));
307 vacc4567 = vreinterpretq_s32_f32(vaddq_f32(vfpacc4567, vmagic_bias));
308
Marat Dukhan03efa0f2021-12-07 10:53:39 -0800309 vacc0123 = vqsubq_s32(vacc0123, vmagic_bias_less_output_zero_point);
310 vacc4567 = vqsubq_s32(vacc4567, vmagic_bias_less_output_zero_point);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700311
312#if XNN_ARCH_ARM64
Marat Dukhan5a31dc62021-12-07 00:54:02 -0800313 int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567);
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700314#else
Marat Dukhan5a31dc62021-12-07 00:54:02 -0800315 int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700316#endif
317
Marat Dukhan5a31dc62021-12-07 00:54:02 -0800318 int8x8_t vout01234567 = vqmovn_s16(vacc01234567);
Marat Dukhan03efa0f2021-12-07 10:53:39 -0800319 vout01234567 = vmax_s8(vout01234567, vget_low_s8(voutput_min));
Marat Dukhan5a31dc62021-12-07 00:54:02 -0800320 vout01234567 = vmin_s8(vout01234567, vget_low_s8(voutput_max));
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700321
322 if XNN_LIKELY(c >= 8) {
323 vst1_s8(output, vout01234567); output += 8;
324 c -= 8;
325 } else {
326 if (c & 4) {
Marat Dukhan5f7cf552021-11-25 17:37:03 -0800327 vst1_lane_u32((void*) output, vreinterpret_u32_s8(vout01234567), 0); output += 4;
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700328 vout01234567 = vext_s8(vout01234567, vout01234567, 4);
329 }
330 if (c & 2) {
Marat Dukhan5f7cf552021-11-25 17:37:03 -0800331 vst1_lane_u16((void*) output, vreinterpret_u16_s8(vout01234567), 0); output += 2;
Marat Dukhan4ba70b72021-07-19 11:20:16 -0700332 vout01234567 = vext_s8(vout01234567, vout01234567, 2);
333 }
334 if (c & 1) {
335 vst1_lane_s8(output, vout01234567, 0); output += 1;
336 }
337 c = 0;
338 }
339 } while (c != 0);
340 }
341
342 output = (int8_t*) ((uintptr_t) output + output_increment);
343 } while (--output_width != 0);
344}