- 102a739 Fix typos in exp-based microkernels and evaluation stubs by Marat Dukhan · 3 years, 11 months ago
- ad71b9a Refactor naming of DEPTHTOSPACE microkernels by Marat Dukhan · 3 years, 11 months ago
- bef9a4d Do not set ukernel type in operators with a single type of kernel by Marat Dukhan · 3 years, 11 months ago
- 9cef5ea dwconv wasm remove shuffle wrappers. by Frank Barchard · 3 years, 11 months ago
- db5c32d WasmSIMD dwconv2d generate x86 optimized version. by Frank Barchard · 3 years, 11 months ago
- 498cb50 Initialize select SpMM microkernel for x86 or ARM based on cpu detect, by Frank Barchard · 3 years, 11 months ago
- 1a95305 Replace DWConv2D PSIMD with WAsm SIMD. by Frank Barchard · 3 years, 11 months ago
- e8bfcc8 Add output_stride argument in SpMM microkernels by Marat Dukhan · 3 years, 11 months ago
- e278a55 Pre-scale batch_size by element size in SpMM microkernels by Marat Dukhan · 3 years, 11 months ago
- 1717075 Check output_channels argument in SpMM microkernels by Marat Dukhan · 3 years, 11 months ago
- ee2df51 Use size_t in SpMM arguments by Marat Dukhan · 3 years, 11 months ago
- bb781b6 Refactor Depth-To-Space operator by Marat Dukhan · 4 years ago
- b4ac61d Make DepthToSpace X32 operator consistent with other X32 operators by Marat Dukhan · 4 years ago
- 13b68f2 Rename CHW2HWC to NCHW2NCHW in DepthToSpace operator by Marat Dukhan · 4 years ago
- b48802e Remove redundant parameter checks in DepthToSpace operator by Marat Dukhan · 4 years ago
- 2da0de8 SpMM move prefetch to fetch next input instead of after the current input. by Frank Barchard · 4 years ago
- f673b2c SpMM microkernels advance output by byte stride by Frank Barchard · 4 years ago
- a19cff3 Neon prefetch for MR >= 16 allowing 32xNR to also prefetch by Frank Barchard · 4 years ago
- bbe8506 Introduce DEPTH_TO_SPACE operator and enable it for graph rewriting by Artsiom Ablavatski · 4 years ago
- e784186 Basic scalar implementation of CHW-to-HWC Depth-to-Space. by Yury Kartynnik · 4 years ago
- 8ef44cd Pipelined Web Assembly Sparse Matrix Multiply by Frank Barchard · 4 years ago
- beca652 Rename unroll to x for SpMM microkernels with unrolled loop by Frank Barchard · 4 years ago
- ccca214 SSE variant of 5x5s2 DWCONV CHW micro-kernels by Marat Dukhan · 4 years ago
- 4fd38b2 Enable 32x1 SpMM microkernels for WAsm and SSE by Frank Barchard · 4 years ago
- d050389 SSE variants of 5x5 DWCONV CHW micro-kernels by Marat Dukhan · 4 years ago
- 30d4b25 Auto-generate 5x5s2 DWCONV CHW micro-kernels by Marat Dukhan · 4 years ago
- 29c0c33 Auto-generate 5x5s2p2 DWCONV CHW micro-kernels by Marat Dukhan · 4 years ago
- e6beeba Add Bilinear Upsampling 2D to the supported by sparse inference ops by Artsiom Ablavatski · 4 years ago
- 9791810 Add operator implementation and tests for IBILINEAR CHW microkernel by Artsiom Ablavatski · 4 years ago
- b392f8e VDIV unrolled for WebAssembly by Frank Barchard · 4 years ago
- 846c0c6 Add 32x1 32x2 32x4 SPMM microkernels and remove 4x1 4x2 4x4 for WASMSIMD, Neon and SSE by Frank Barchard · 4 years ago
- 149f0ea Auto-generate NEON 5x5p2 DWCONV micro-kernels by Marat Dukhan · 4 years ago
- c4efb00 Auto-generate scalar 5x5p2 DWCONV CHW micro-kernels by Marat Dukhan · 4 years ago
- cf5b3c3 Auto-generate scalar versions of DWCONV2D CHW 3x3s2p1 micro-kernels by Marat Dukhan · 4 years ago
- 82f0c32 Auto-generate NEON/NEONFMA versions of DWCONV2D CHW 3x3s2p1 micro-kernels by Marat Dukhan · 4 years ago
- 0ff9718 Auto-generate SSE versions of DWCONV2D CHW 3x3s2p1 micro-kernels by Marat Dukhan · 4 years ago
- 91249d2 Auto-generate scalar versions of DWCONV2D CHW 3x3p1 micro-kernels by Marat Dukhan · 4 years ago
- c581e48 NEON versions of DWCONV2D CHW 3x3p1 micro-kernels by Marat Dukhan · 4 years ago
- 1268a24 Auto-generate AArch64 NEONFMA versions of DWCONV2D CHW 3x3p1 micro-kernels by Marat Dukhan · 4 years ago
- 98f2eeb SSSE3 versions of DWCONV2D CHW 3x3p1 micro-kernels by Marat Dukhan · 4 years ago
- 470078a Auto-generate SSE versions of DWCONV2D CHW 3x3p1 micro-kernels by Marat Dukhan · 4 years ago
- 965272b Add WebAssembly SIMD IBILINEAR microkernels for CHW layout by XNNPACK Team · 4 years ago
- bf715f9 Rename DWCONV CHW microkernels to DWCONV2D CHW by Marat Dukhan · 4 years ago
- 3155c47 Remove right corners from indirection tables in IBILINEAR CHW microkernel interface by XNNPACK Team · 4 years ago
- cb2b667 Roll back the decision to split the packed weights for the CHW IBILINEAR microkernel interface by XNNPACK Team · 4 years ago
- 0dde1af Split packed weights into horizontal and vertical in IBILINEAR CHW microkernel interface by XNNPACK Team · 4 years ago
- 6be46b2 Add input increment parameter in IBILINEAR CHW microkernels by XNNPACK Team · 4 years ago
- fea2680 WAsm SpMM microkernel assign vzero vector once by Frank Barchard · 4 years ago
- b9deb96 Polyfill missing intrinsics for legacy compilers by Marat Dukhan · 4 years ago
- e5b5dea Polyfill _kshiftli_mask64 for legacy compilers by Marat Dukhan · 4 years ago
- 6f469a5 Minor refactoring in DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- c451e8a WAsm SpMM microkernels unrolled by 2 and 4. by Frank Barchard · 4 years ago
- 1c6cad9 Suffix DWCONV CHW microkernels with block size by Marat Dukhan · 4 years ago
- faf332d Optimize PSIMD 5x5 DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- 7515777 Scale input width in DWCONV CHW interface by sizeof(float) by Marat Dukhan · 4 years ago
- 7ed0e3c Refactor and simplify DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- a982bb7 Rollback the renaming of indirection map since we can reuse the code for CHW and HWC layouts by XNNPACK Team · 4 years ago
- c808c97 Simplify output pointer updates in DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- a690c09 Minor refactoring of DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- 04d91c8 Remove redundant m variable in DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- bc967c7 Simplify pointer arithmetics in DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- a5cb677 Add "nhwc" into the naming of indirection map function and tests by XNNPACK Team · 4 years ago
- ae7e8b2 Remove remnants of SpCHW layout in DWCONV-CHW microkernels by Marat Dukhan · 4 years ago
- 2143267 IBILINEAR CHW microkernels by XNNPACK Team · 4 years ago
- 9e05340 Replace PSIMD SpMM microkernels with WAsm SIMD. by Frank Barchard · 4 years ago
- d923d7f Rename parameters in prototypes to reflect their meanings in microkernel implementations. by XNNPACK Team · 4 years ago
- 39ab16f Evaluation stub for AVX Sigmoid with 1 Newton-Raphson iteration by Marat Dukhan · 4 years ago
- 45aec16 Fix bug in QS8 Global Average Pooling by Marat Dukhan · 4 years ago
- ac5f160 SSE2 Sigmoid evaluation stubs using Newton-Raphson reciprocal by Marat Dukhan · 4 years ago
- 36173d2 Evaluation stubs for gather-based AVX2/AVX512 Sigmoid by Marat Dukhan · 4 years ago
- c79427c Avoid batch-replication of indirection buffer in DW Conv and Avg Pooling by Marat Dukhan · 4 years ago
- dc2b29c AVX float32 sigmoid ukernels. by T.J. Alumbaugh · 4 years ago
- 31677ad Enable Cortex-A55 QS8 GEMM microkernel on HMP systems by Marat Dukhan · 4 years ago
- 146e999 Replace QS8 4x8 with 2x8 neon microkernel. Improves performance for aarch32. by Frank Barchard · 4 years ago
- 1e8590e Enable QS8 A55 GEMM microkernel by Frank Barchard · 4 years ago
- f2742c4 Cortex A55r1 QS8 GEMM microkernel by Frank Barchard · 4 years ago
- 0797eb1 Rename QS8 assembly GEMM kernels to ld64 by Frank Barchard · 4 years ago
- a463285 4x16 QS8 GEMM use 4 less registers, avoiding push/pop. by Frank Barchard · 4 years ago
- ab8c4c8 Add basic unit tests for graph rewriting procedure by XNNPACK Team · 4 years ago
- 46aadda Enable 1x16 QS8 assembly GEMM for Neon dotproduct by Frank Barchard · 4 years ago
- 59df88b 4x16 QS8 GEMM defer params by Frank Barchard · 4 years ago
- f1fd89e 1x16 QS8 GEMM AARCH64 assembly microkernel using dot product. by Frank Barchard · 4 years ago
- a5237a5 Rename 4x16 GEMM dot product microkernel file name to allow for future variations. by Frank Barchard · 4 years ago
- bc0c729 Enable GEMM 4x16 QS8 using dot product microkernels. by Frank Barchard · 4 years ago
- 31bb45b 4x16 QS8 GEMM AARCH64 assembly microkernel using dot product. by Frank Barchard · 4 years ago
- a117ce7 Fix graph rewriting procedure for graph without NCHW2NHWC compatible nodes/ops by XNNPACK Team · 4 years ago
- 3b26206 Renumber labels in assembly sequentially by Frank Barchard · 4 years ago
- 87318a2 Refactor scalar and NEON Sigmoid microkernels by Marat Dukhan · 4 years ago
- 6edeade Refactor SSE2/SSE4/AVX2/AVX512F/WAsm SIMD Sigmoid microkernels by Marat Dukhan · 4 years ago
- 66ccf64 Rename QS8 generator templates by Marat Dukhan · 4 years ago
- c3001e1 Refactor Sigmoid evaluation stubs by Marat Dukhan · 4 years ago
- 9501298 Refactor SSE2/AVX/AVX2/AVX512 Sigmoid evaluation stubs by Marat Dukhan · 4 years ago
- 04fd73a Reoptimize LUT-based ExpMinus evaluation stubs by Marat Dukhan · 4 years ago
- 1f256fc Reoptimize LUT-based Sigmoid evaluation stubs by Marat Dukhan · 4 years ago
- 3cfe8f5 Refactor SSE2 Sigmoid evaluation stub by Marat Dukhan · 4 years, 1 month ago
- a48848f 4x8, 6x8 and 8x16 Neon dot product GEMM microkernels by Frank Barchard · 4 years, 1 month ago
- 2e4727b AVX versions of Sigmoid evaluation stubs by Marat Dukhan · 4 years, 1 month ago
- d9ca7e6 AVX512F versions of Sigmoid microkernel by Marat Dukhan · 4 years, 1 month ago
- 6a34c5f Refactor AVX512F Sigmoid evaluation stubs by Marat Dukhan · 4 years, 1 month ago
- 2fa1745 6x16 QS8 GEMM for Neon dot product by Frank Barchard · 4 years, 1 month ago