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gerrit-public.fairphone.software / platform / external / XNNPACK / 2188833bcb0a80a253f6ad8315ed647c758c2ea6
  1. 2188833 Fix F32 IGEMM benchmark loop to not require capping NC to NR by Zhi An Ng · 2 years, 4 months ago
  2. 94def8a Fix bug in Convert operator on large tensors with multi-threading by Marat Dukhan · 2 years, 4 months ago
  3. 4620ca6 Reland "Graph rewriting for FP16 inference" by Marat Dukhan · 2 years, 4 months ago
  4. 6b72e6c Convert F32 IGEMM for A75 to JIT, add tests by Zhi An Ng · 2 years, 4 months ago
  5. e96b6bc Split qs8-igemm-minmax-rndnu tests into 1 more file (4 total), seeing compile timeouts in coverage runs by Zhi An Ng · 2 years, 4 months ago
  6. 9a365d0 Revert "Graph rewriting for FP16 inference" by Antonio Sanchez · 2 years, 4 months ago
  7. f0f374f Rename f32-gemm/6x8-aarch64-neonfma-prfm-cortex-a75.cc to remove prfm from file name by Zhi An Ng · 2 years, 4 months ago
  8. 4decc8e Implement mov (x registers) for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  9. 8ceeebe Implement stp (x registers) for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  10. 9e51ad6 Implement cmp (x registers) for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  11. 1d5c616 Enable QU8 AAarch microkernels based on uarch by Frank Barchard · 2 years, 4 months ago
  12. 94a0b0b Graph rewriting for FP16 inference by Marat Dukhan · 2 years, 4 months ago
  13. 77d2885 QS8 AArch32 GEMM benchmark build fix by Frank Barchard · 2 years, 4 months ago
  14. 6cb0fd0 Add AArch32 GEMM benchmarks for Cortex A53 and Cortex A7 by Frank Barchard · 2 years, 4 months ago
  15. ca51090 QS8 GEMM benchmark for JIT add ISA check by Frank Barchard · 2 years, 4 months ago
  16. 2991acf Enable QS8/QC8 4x8 lane GEMM AArch32 microkernel for Cortex A7 by Frank Barchard · 2 years, 4 months ago
  17. 043c1f5 Include JIT_SRCS in XNNPACK build by Marat Dukhan · 2 years, 4 months ago
  18. 18f71e0 Support vld1r_32 with 1 or 2 register(s) in list by Zhi An Ng · 2 years, 4 months ago
  19. 60c9bcb Fix incorrect k argument to QC8/QS8 GEMM microkernel test by Zhi An Ng · 2 years, 4 months ago
  20. 9fd2f3e Fix passing of kc JIT generator in F32 GEMM benchmarks by Zhi An Ng · 2 years, 4 months ago
  21. 237473f Include missing <limits> header in 4x8 F32 GEMM codegen for A53 by Marat Dukhan · 2 years, 4 months ago
  22. 3e3124e Make void* params argument of JIT generators const by Zhi An Ng · 2 years, 4 months ago
  23. 34251d8 QS8 4x8 lane GEMM AArch32 microkernel for Cortex A7 by Frank Barchard · 2 years, 4 months ago
  24. a312e9a Enable QS8 4x8 lane GEMM AArch32 microkernel for Cortex A5r0 and A7 by Frank Barchard · 2 years, 4 months ago
  25. 5ec5591 Fix tfjs build by adding dependency on jit by Zhi An Ng · 2 years, 4 months ago
  26. 5ebe686 Specialize 6x8-aarch64-neonfma-cortex-a75 on min/max params by Zhi An Ng · 2 years, 4 months ago
  27. 101271e QC8 4x8 lane GEMM AArch32 microkernel for Cortex A7 by Frank Barchard · 2 years, 4 months ago
  28. f82410d Enable QU8 4x8 lane GEMM AArch32 microkernel for Cortex A53 by Frank Barchard · 2 years, 4 months ago
  29. 0455acf Enable QC8 4x8 lane GEMM AArch32 microkernel for Cortex A53 by Frank Barchard · 2 years, 4 months ago
  30. 879ab98 Make SSE2 microkernels consistent with neon zip microkernels. by Alan Kelly · 2 years, 4 months ago
  31. 77a3b5f Enable QS8 4x8 lane GEMM AArch32 microkernel for Cortex A53 by Frank Barchard · 2 years, 4 months ago
  32. 9e4d2aa QS8 4x8 lane GEMM AArch32 microkernel for Cortex A53 by Frank Barchard · 2 years, 4 months ago
  33. cfd947d Add neon zip microkernel generator by Alan Kelly · 2 years, 4 months ago
  34. a63651c Set F32 GEMM generator function for A75 if XNN_ENABLE_JIT is set (defaults to off) by Zhi An Ng · 2 years, 4 months ago
  35. 930df8d Store rows in direct order in F16 GEMM microkernels by Marat Dukhan · 2 years, 4 months ago
  36. d9aaf69 Explicitly disable -ffast-math for scalar & WAsm microkernels by Marat Dukhan · 2 years, 4 months ago
  37. 3deae1d Guard JIT-related structs and functionality behind XNN_PLATFORM_JIT by Zhi An Ng · 2 years, 4 months ago
  38. f9fc9ec Integrate JIT generated GEMM microkernels into create_convolution2d_nhwc by Zhi An Ng · 2 years, 4 months ago
  39. 58cdcf2 Reoptimize QC8/QS8/QU8 GEMM/IGEMM WAsm SIMD microkernel selection by Marat Dukhan · 2 years, 4 months ago
  40. 348c377 QU8 GEMM/IGEMM WAsm SIMD microkernels with SR=4 by Marat Dukhan · 2 years, 4 months ago
  41. 3ceb4f1 Reoptimize NEON QC8/QS8 GEMM/IGEMM microkernels with SR > 1 by Marat Dukhan · 2 years, 4 months ago
  42. 8319baa Re-generate amalgamated FMA3 microkernels by Marat Dukhan · 2 years, 4 months ago
  43. 69b7f14 Reoptimize QS8/QC8 GEMM/IGEMM WAsm SIMD microkernels with swizzle by Marat Dukhan · 2 years, 4 months ago
  44. fbd67a7 Pad K to a multiple of SR in GEMM/IGEMM microkernels by Marat Dukhan · 2 years, 4 months ago
  45. 20151d9 Fix excessive memory allocation for packed weights in Deconvolution by Marat Dukhan · 2 years, 4 months ago
  46. 4ef2352 Improve test coverage for quantized Depthwise Convolutions in TFLite weight layout by Marat Dukhan · 2 years, 4 months ago
  47. 9dc0452 Link LibM to indirection target in CMake build by Marat Dukhan · 2 years, 4 months ago
  48. 5e8033a Make SSE2 microkernels consistent with neon zip microkernels. by Alan Kelly · 2 years, 4 months ago
  49. 5c37527 Make SSE2 microkernels consistent with neon zip microkernels. by Alan Kelly · 2 years, 4 months ago
  50. f2b233b Make SSE2 microkernels consistent with neon zip microkernels. - DEC is now MOV by Alan Kelly · 2 years, 4 months ago
  51. 8b758bf Integrate JIT generated GEMM microkernels into create_convolution2d_nhwc by XNNPACK Team · 2 years, 4 months ago
  52. 64cb10f Guard JIT-related structs and functionality behind XNN_PLATFORM_JIT by XNNPACK Team · 2 years, 4 months ago
  53. c9a2e74 Guard JIT-related structs and functionality behind XNN_PLATFORM_JIT by Zhi An Ng · 2 years, 4 months ago
  54. df51e11 Integrate JIT generated GEMM microkernels into create_convolution2d_nhwc by Zhi An Ng · 2 years, 4 months ago
  55. 15dd611 Check code_buffer capacity before attempting to release it by Zhi An Ng · 2 years, 4 months ago
  56. c607028 Remove wb from JIT aarch32 instructions, use mem operand and ++ instead by Zhi An Ng · 2 years, 4 months ago
  57. d236074 Add F32 GEMM 6x8 aarch64 neonfma cortex a75 JIT microkernel to benchmark by Zhi An Ng · 2 years, 4 months ago
  58. fc67a86 Fix encoding of prfm by Zhi An Ng · 2 years, 4 months ago
  59. 6cc5b48 QS8/QC8 4x8 dot product IGEMM AArch32 microkernel for Cortex A55 by Frank Barchard · 2 years, 4 months ago
  60. 2269ac8 Add default cases for switch, GCC warns that control reaches the end of non-void function. by Zhi An Ng · 2 years, 4 months ago
  61. d2bea50 Remove default member initializer for VRegister and ScalarVRegister so that we can aggregate initialize them (on GCC) by Zhi An Ng · 2 years, 4 months ago
  62. c2f62ea Remove redundant closing brace in CMakeLists by Marat Dukhan · 2 years, 4 months ago
  63. 870108c QS8/QC8 4x8 dot product IGEMM AArch32 microkernel for Cortex A55 by Frank Barchard · 2 years, 4 months ago
  64. e8fd444 QS8 IGEMM AArch64 LD64 round KC up to multiple of 4 before saving it on stack by Frank Barchard · 2 years, 4 months ago
  65. adf087d Remove 3 blank lines after last jit assembly instruction before end of function by Frank Barchard · 2 years, 4 months ago
  66. 773458c Change return type for assembler functions to void to simplify code, move emit32 into common assembler by Zhi An Ng · 2 years, 4 months ago
  67. 752b980 Avoid importing the entire xnnpack namespace in aarch32 assembler by Zhi An Ng · 2 years, 4 months ago
  68. c2e2da8 Fix conversion script for aarch64 assembly kernels and convert a single F32 GEMM as a test by Zhi An Ng · 2 years, 4 months ago
  69. 4a1c6a8 Implement ldp (d registers) offset and post index for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  70. 193f4e1 Disable QU8 dot product for AArch32 IOS by Frank Barchard · 2 years, 4 months ago
  71. 048704d Implement stp (q registers) offset and post indexed for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  72. 3cec451 Implement tst (immediate) for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  73. 8709ac9 Implement csel for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  74. ba5091f Enable QC8 4x8 dot product GEMM AArch32 microkernel for Cortex A55 by Frank Barchard · 2 years, 4 months ago
  75. a1cad4a Add x8 transpose bench by Alan Kelly · 2 years, 4 months ago
  76. ba68f44 Add x64 transpose bench by Alan Kelly · 2 years, 4 months ago
  77. e1ff738 Update assembly register usage comments. by Frank Barchard · 2 years, 4 months ago
  78. 35d8e68 Implemnet stp (d register) offset and pre-index for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  79. 6c30427 Remove unused transpose ukernel declarations and unnecessary semi-colons. by Alan Kelly · 2 years, 4 months ago
  80. c821ea7 Refactor x16 transpose bench and add missing ukernels. by Alan Kelly · 2 years, 4 months ago
  81. 658a67d Implement add (x registers) for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  82. 80eac62 Implement cmp (immediate) for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  83. c98f0d2 Fix patching of branch instructions immediate by Zhi An Ng · 2 years, 4 months ago
  84. e8bbda0 Re-factor x32 transpose bench by Alan Kelly · 2 years, 4 months ago
  85. ac654f1 QC8 4x8 dot product GEMM AArch32 microkernel for Cortex A55 by Frank Barchard · 2 years, 4 months ago
  86. 364598a Enable QS8 4x8 dot product GEMM AArch32 microkernel little core by Frank Barchard · 2 years, 4 months ago
  87. 1e277fd Bug fixes for QS8 Cortex A55 by Frank Barchard · 2 years, 4 months ago
  88. 491e9e0 Implement ldr for s and d registers and str for d registers (post-indexed) for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  89. 708874b Add cpu configs to support iOS simulator builds on M1-based macs. by XNNPACK Team · 2 years, 4 months ago
  90. 1228b3e Enable QS8 4x8 dot product GEMM AArch32 microkernel for Cortex A55 by Frank Barchard · 2 years, 4 months ago
  91. 0f294ad QS8 4x8 dot product GEMM AArch32 microkernel for Cortex A55 by Frank Barchard · 2 years, 4 months ago
  92. 2f24c3e Implement dup (vector) for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  93. f761632 Implement str (q register, post-indexed) and str (s register, offset) for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  94. 5a5c9e1 Implement mov (VRegister) for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  95. 5e31395 Implement stp (post-indexed) for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  96. 4915509 Implement add with immediate for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  97. 4ab1390 Rename kTbz enum to kTbxz and add comment to clarify its usage for both TBZ and TBNZ by Zhi An Ng · 2 years, 4 months ago
  98. b10677e Implement unconditional branch for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  99. 56e8b91 Implement tbz for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago
  100. cdfff79 Implement ret for aarch64 assembler by Zhi An Ng · 2 years, 4 months ago