- 470078a Auto-generate SSE versions of DWCONV2D CHW 3x3p1 micro-kernels by Marat Dukhan · 4 years ago
- 965272b Add WebAssembly SIMD IBILINEAR microkernels for CHW layout by XNNPACK Team · 4 years ago
- bf715f9 Rename DWCONV CHW microkernels to DWCONV2D CHW by Marat Dukhan · 4 years ago
- 3155c47 Remove right corners from indirection tables in IBILINEAR CHW microkernel interface by XNNPACK Team · 4 years ago
- cb2b667 Roll back the decision to split the packed weights for the CHW IBILINEAR microkernel interface by XNNPACK Team · 4 years ago
- 0dde1af Split packed weights into horizontal and vertical in IBILINEAR CHW microkernel interface by XNNPACK Team · 4 years ago
- 6be46b2 Add input increment parameter in IBILINEAR CHW microkernels by XNNPACK Team · 4 years ago
- fea2680 WAsm SpMM microkernel assign vzero vector once by Frank Barchard · 4 years ago
- b9deb96 Polyfill missing intrinsics for legacy compilers by Marat Dukhan · 4 years ago
- e5b5dea Polyfill _kshiftli_mask64 for legacy compilers by Marat Dukhan · 4 years ago
- 6f469a5 Minor refactoring in DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- c451e8a WAsm SpMM microkernels unrolled by 2 and 4. by Frank Barchard · 4 years ago
- 1c6cad9 Suffix DWCONV CHW microkernels with block size by Marat Dukhan · 4 years ago
- faf332d Optimize PSIMD 5x5 DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- 7515777 Scale input width in DWCONV CHW interface by sizeof(float) by Marat Dukhan · 4 years ago
- 7ed0e3c Refactor and simplify DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- a982bb7 Rollback the renaming of indirection map since we can reuse the code for CHW and HWC layouts by XNNPACK Team · 4 years ago
- c808c97 Simplify output pointer updates in DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- a690c09 Minor refactoring of DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- 04d91c8 Remove redundant m variable in DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- bc967c7 Simplify pointer arithmetics in DWCONV CHW microkernels by Marat Dukhan · 4 years ago
- a5cb677 Add "nhwc" into the naming of indirection map function and tests by XNNPACK Team · 4 years ago
- ae7e8b2 Remove remnants of SpCHW layout in DWCONV-CHW microkernels by Marat Dukhan · 4 years ago
- 2143267 IBILINEAR CHW microkernels by XNNPACK Team · 4 years ago
- 9e05340 Replace PSIMD SpMM microkernels with WAsm SIMD. by Frank Barchard · 4 years ago
- d923d7f Rename parameters in prototypes to reflect their meanings in microkernel implementations. by XNNPACK Team · 4 years ago
- 39ab16f Evaluation stub for AVX Sigmoid with 1 Newton-Raphson iteration by Marat Dukhan · 4 years ago
- 45aec16 Fix bug in QS8 Global Average Pooling by Marat Dukhan · 4 years ago
- ac5f160 SSE2 Sigmoid evaluation stubs using Newton-Raphson reciprocal by Marat Dukhan · 4 years ago
- 36173d2 Evaluation stubs for gather-based AVX2/AVX512 Sigmoid by Marat Dukhan · 4 years ago
- c79427c Avoid batch-replication of indirection buffer in DW Conv and Avg Pooling by Marat Dukhan · 4 years ago
- dc2b29c AVX float32 sigmoid ukernels. by T.J. Alumbaugh · 4 years ago
- 31677ad Enable Cortex-A55 QS8 GEMM microkernel on HMP systems by Marat Dukhan · 4 years ago
- 146e999 Replace QS8 4x8 with 2x8 neon microkernel. Improves performance for aarch32. by Frank Barchard · 4 years ago
- 1e8590e Enable QS8 A55 GEMM microkernel by Frank Barchard · 4 years ago
- f2742c4 Cortex A55r1 QS8 GEMM microkernel by Frank Barchard · 4 years ago
- 0797eb1 Rename QS8 assembly GEMM kernels to ld64 by Frank Barchard · 4 years ago
- a463285 4x16 QS8 GEMM use 4 less registers, avoiding push/pop. by Frank Barchard · 4 years ago
- ab8c4c8 Add basic unit tests for graph rewriting procedure by XNNPACK Team · 4 years ago
- 46aadda Enable 1x16 QS8 assembly GEMM for Neon dotproduct by Frank Barchard · 4 years ago
- 59df88b 4x16 QS8 GEMM defer params by Frank Barchard · 4 years ago
- f1fd89e 1x16 QS8 GEMM AARCH64 assembly microkernel using dot product. by Frank Barchard · 4 years ago
- a5237a5 Rename 4x16 GEMM dot product microkernel file name to allow for future variations. by Frank Barchard · 4 years ago
- bc0c729 Enable GEMM 4x16 QS8 using dot product microkernels. by Frank Barchard · 4 years ago
- 31bb45b 4x16 QS8 GEMM AARCH64 assembly microkernel using dot product. by Frank Barchard · 4 years ago
- a117ce7 Fix graph rewriting procedure for graph without NCHW2NHWC compatible nodes/ops by XNNPACK Team · 4 years ago
- 3b26206 Renumber labels in assembly sequentially by Frank Barchard · 4 years ago
- 87318a2 Refactor scalar and NEON Sigmoid microkernels by Marat Dukhan · 4 years ago
- 6edeade Refactor SSE2/SSE4/AVX2/AVX512F/WAsm SIMD Sigmoid microkernels by Marat Dukhan · 4 years ago
- 66ccf64 Rename QS8 generator templates by Marat Dukhan · 4 years ago
- c3001e1 Refactor Sigmoid evaluation stubs by Marat Dukhan · 4 years ago
- 9501298 Refactor SSE2/AVX/AVX2/AVX512 Sigmoid evaluation stubs by Marat Dukhan · 4 years ago
- 04fd73a Reoptimize LUT-based ExpMinus evaluation stubs by Marat Dukhan · 4 years ago
- 1f256fc Reoptimize LUT-based Sigmoid evaluation stubs by Marat Dukhan · 4 years ago
- 3cfe8f5 Refactor SSE2 Sigmoid evaluation stub by Marat Dukhan · 4 years ago
- a48848f 4x8, 6x8 and 8x16 Neon dot product GEMM microkernels by Frank Barchard · 4 years ago
- 2e4727b AVX versions of Sigmoid evaluation stubs by Marat Dukhan · 4 years ago
- d9ca7e6 AVX512F versions of Sigmoid microkernel by Marat Dukhan · 4 years ago
- 6a34c5f Refactor AVX512F Sigmoid evaluation stubs by Marat Dukhan · 4 years ago
- 2fa1745 6x16 QS8 GEMM for Neon dot product by Frank Barchard · 4 years ago
- 80a8ac5 AVX512F LUT-based with SCALEF Exp evaluation stubs by Marat Dukhan · 4 years ago
- 9490613 Reoptimize LUT-based NEON Sigmoid evaluation stubs by Marat Dukhan · 4 years ago
- b32b018 Reoptimize LUT-based SSE2 Exp evaluation stub by Marat Dukhan · 4 years ago
- 272139e Reoptimize LUT-based NEONFMA Exp/ExpMinus evaluation stubs by Marat Dukhan · 4 years ago
- d08abcb AVX Exp evaluation stub by Marat Dukhan · 4 years ago
- 8e17294 LUT-based SSE2 Exp evaluation stub by Marat Dukhan · 4 years ago
- 47ffc41 AVX512F Sigmoid evaluation stubs by Marat Dukhan · 4 years ago
- 5876c83 Reoptimize SSE4 LUT-based Sigmoid microkernels by Marat Dukhan · 4 years ago
- 6dd7136 Use LUT-based Sigmoid microkernels on SSE2/SSE4 systems by Marat Dukhan · 4 years ago
- d243c1a LUT-based SSE Sigmoid microkernels by Marat Dukhan · 4 years, 1 month ago
- f8475d6 SSE2 version of LUT64 Sigmoid evaluation stub by Marat Dukhan · 4 years, 1 month ago
- 6844730 Fix segfault due to out-of-bounds reads of internally allocated values by Marat Dukhan · 4 years, 1 month ago
- a96948e FP16 HardSwish operator by Frank Barchard · 4 years, 1 month ago
- ef4ce31 Remove trailing whitespace by Marat Dukhan · 4 years, 1 month ago
- d4c8303 Enable NEON DOT QS8 [I]GEMM microkernels on ARM64 by Marat Dukhan · 4 years, 1 month ago
- 0ea6a77 FP16 binary multiply operator by Frank Barchard · 4 years, 1 month ago
- e6dc0b6 AVX2 versions of QS8 VADD[C] microkernels by Marat Dukhan · 4 years, 1 month ago
- bb9225e SSE4.1 and XOP versions of MUL32 VADD[C] microkernels by Marat Dukhan · 4 years, 1 month ago
- 2ffc5e6 AVX512 versions of QS8 DWCONV microkernels by Marat Dukhan · 4 years, 1 month ago
- ff20948 QS8 version of ND ADD operator by Marat Dukhan · 4 years, 1 month ago
- 5df27f8 WAsm SIMD versions of QS8 VADD[C] microkernels by Marat Dukhan · 4 years, 1 month ago
- ba7b279 NEON variants of QS8 VADD[C] microkernels by Marat Dukhan · 4 years, 1 month ago
- 9c7308f vbinary microkernels unrolled to x8 for scalar and web assembly and x16 web assembly simd by Frank Barchard · 4 years, 1 month ago
- 37297a6 F32-RELU unrolled more for improved performance on Web Assembly by Frank Barchard · 4 years, 1 month ago
- 4422f10 FP16 hswish fix cast fix for improved GCC compatability. by Frank Barchard · 4 years, 1 month ago
- 12c5777 Optimization: 2x partial unroll to load 8 contiguous bytes. by Benoit Jacob · 4 years, 1 month ago
- 919328c Improve compatibility with -fno-lax-vector-conversions by Marat Dukhan · 4 years, 1 month ago
- 7359463 Fix incompatibilities with ARM GCC by Marat Dukhan · 4 years, 1 month ago
- c2146cc Added support for specialized batch_size == 1 convolutions. by Fabio Riccardi · 4 years, 1 month ago
- 62d752e Function macro for WASM assembly by Frank Barchard · 4 years, 2 months ago
- 9bd894b Relu wasm assembly use if statements instead of block for readability. by Frank Barchard · 4 years, 2 months ago
- 9f5ccb3 f32 relu microkernel WASM assembly x2 and x4 unrolled loops by Frank Barchard · 4 years, 2 months ago
- a05487f Add xnn_qs8_igemm_minmax_ukernel_${MR}x${NR}c4__neondot (ARMv8.2+dotprod). by Benoit Jacob · 4 years, 2 months ago
- a964473 Add xnn_qs8_gemm_minmax_ukernel_${MR}x${NR}c4__neondot (ARMv8.2+dotprod). by Benoit Jacob · 4 years, 2 months ago
- 0af63ab Include polyfills for intrinsics in QS8 AVX512 GEMM/IGEMM microkernels by Marat Dukhan · 4 years, 2 months ago
- d91624e f32 relu microkernel WASM assembly optimized implementation by Frank Barchard · 4 years, 2 months ago
- 2a18f7e Polyfill _mm512_set_epi8 for older gcc by Marat Dukhan · 4 years, 2 months ago
- 0270d9f QS8 VADDC microkernels in SSE2 and SSE4.1 implementations by Marat Dukhan · 4 years, 2 months ago
- f28cddf Initialize QS8 microkernels in ARM/ARM64 builds by Marat Dukhan · 4 years, 2 months ago
- 281262d NEON variant of QS8 GAVGPOOL microkernel by Marat Dukhan · 4 years, 2 months ago