- da78da1 QS8 C8 Neon microkernels with MUL and MLA versions. by Frank Barchard · 3 years, 8 months ago
- 4a4be4e QS8 1x16c4 ld32 GEMM microkernel using NEON dot product by Frank Barchard · 3 years, 9 months ago
- 02121ca QS8 Neon IGEMM microkernels with 8 bit MUL using DUP by Frank Barchard · 3 years, 9 months ago
- 77e93a2 Fix mismatch in block layout in mixed-layout Depth-To-Space operator by Marat Dukhan · 3 years, 9 months ago
- a5e242c QS8 LD32 GEMM microkernel for big cores with dotproduct by Frank Barchard · 3 years, 9 months ago
- 36f95cf QS8 Neon IGEMM C16 microkernel with two 8 bit multiplies and vpadal to accumulate. by Frank Barchard · 3 years, 9 months ago
- 71c4d1a QS8 Neon GEMM C16 microkernel with two 8 bit multiplies and vpadal to accumulate. by Frank Barchard · 3 years, 9 months ago
- 6d138db Remove scalar C4 QS8 and QU8 gemm microkernels. by Frank Barchard · 3 years, 9 months ago
- 6fa8078 QS8 C2 Neon igemm by Frank Barchard · 3 years, 9 months ago
- d79391d QS8 C8 Neon igemm by Frank Barchard · 3 years, 9 months ago
- c8532ae Unroll KC loop to do MULL and then MLAL to 16 bit before lengthening to 32 bit. by Frank Barchard · 3 years, 9 months ago
- 8247e21 C2 QS8 microkernel using mull then mlal with KC loop of 16 by Frank Barchard · 3 years, 9 months ago
- 5899012 QS8 Neon GEMM C8 microkernel with 8 bit multiply and vpadal to accumulate. by Frank Barchard · 3 years, 10 months ago
- 6d490f7 Change isfinite() to std::isfinite() by Anush Elangovan · 3 years, 10 months ago
- 2202c81 Implement bilinear upsampling (CHW layout) for ARM architecture by Artsiom Ablavatski · 3 years, 10 months ago
- 2302ffd QS8 Neon GEMM microkernel with 8 bit multiply and vpadal to accumulate by Frank Barchard · 3 years, 10 months ago
- ec0bf14 QS8 GEMM and IGEMM 3x8 3x16 and IGEMM 4x8 and 4x16 by Frank Barchard · 3 years, 10 months ago
- 4ecae2e QS8 Neon GEMM microkernel with 8 bit multiply by Frank Barchard · 3 years, 10 months ago
- cfbc849 Add 4x8 and 4x16 qs8 gemm microkernels by Frank Barchard · 3 years, 10 months ago
- c5704bf WebAssembly DWConv2D 3x3 stride 2 loadsplat by Frank Barchard · 3 years, 11 months ago
- c6889b3 WebAssembly DWConv2D 5x5 stride 2 loadsplat by Frank Barchard · 3 years, 11 months ago
- 02bb429 WebAssembly DWConv2D 3x3p1 adapted from NEON by Frank Barchard · 4 years ago
- b20dcd6 WASMSIMD dwconv2d 5x5p2 use loadsplat by Frank Barchard · 4 years ago
- 4eddb9c Fix incompatibility with Apple Clang in Subgraph tester by Marat Dukhan · 4 years ago
- 802fcae Additional SSE/SSE2 GEMM/IGEMM microkernels by Marat Dukhan · 4 years ago
- 412e2f4 Rename WASMSIMD dwconv2d functions to splat or loadsplat by Frank Barchard · 4 years ago
- 3de5dfa Remove PSIMD dependency by Marat Dukhan · 4 years ago
- b36582b Enable sparse inference by default by Marat Dukhan · 4 years ago
- c10585f Minor refactoring of SubgraphTester by Marat Dukhan · 4 years ago
- 54b2d54 Disable sparse graph rewriting for clusters with <= 2/3 zeroes by Marat Dukhan · 4 years ago
- c763488 CONV2D HWC2CHW microkernel for ARM NEON by Marat Dukhan · 4 years ago
- 0725b8d Rename WebAssembly SIMD source files and functions with x86 or arm suffix after wasmsimd by Frank Barchard · 4 years ago
- 5d7ca1a Remove duplicate WASMSIMD dwconv2d 5x5s2 tests by Frank Barchard · 4 years ago
- 3a30521 Refactor accuracy evaluation benchmarks by Marat Dukhan · 4 years ago
- 5b86c43 NEON versions of non-blocked F32 SpMM microkernels by Marat Dukhan · 4 years ago
- 2fa7a0c Build and test non-blocked NEONFMA SpMM microkernels on AArch32 by Marat Dukhan · 4 years ago
- 102e9ea Revert "Remove PSIMD dependency" by Marat Dukhan · 4 years ago
- cee4e95 Remove PSIMD dependency by Marat Dukhan · 4 years ago
- e7223ee WASMSIMD dwconv2d 5x5s2 tests and benchmark by Frank Barchard · 4 years ago
- b88d011 WebAssembly SIMD DWConv2D 3x3 stride-2 adapted from NEON by Frank Barchard · 4 years ago
- b6bd4bc Implement ELU operator by Marat Dukhan · 4 years ago
- ed6baaf Vector ELU microkernels by Marat Dukhan · 4 years ago
- 20a0741 Web Assemble DWConv2D f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd adapted from Neon by Frank Barchard · 4 years ago
- 0e52117 NHWC version of Depth-To-Space operator by Marat Dukhan · 4 years ago
- 1810c6e Limit range of fp16 test data to avoid denormals by Frank Barchard · 4 years ago
- 188d104 Refactor Depth To Space NCHW2NHWC operator test by Marat Dukhan · 4 years ago
- 2213606 xnn_f32_conv_hwc2chw_ukernel_3x3s2p1c3x4__wasmsimd_2x2 based on SSE version by Frank Barchard · 4 years ago
- 3b80045 WAsm SIMD version of DWCONV2D CHW 3x3p1 by Frank Barchard · 4 years ago
- ad71b9a Refactor naming of DEPTHTOSPACE microkernels by Marat Dukhan · 4 years ago
- db5c32d WasmSIMD dwconv2d generate x86 optimized version. by Frank Barchard · 4 years ago
- 1a95305 Replace DWConv2D PSIMD with WAsm SIMD. by Frank Barchard · 4 years ago
- e8bfcc8 Add output_stride argument in SpMM microkernels by Marat Dukhan · 4 years ago
- e278a55 Pre-scale batch_size by element size in SpMM microkernels by Marat Dukhan · 4 years ago
- bb781b6 Refactor Depth-To-Space operator by Marat Dukhan · 4 years ago
- 13b68f2 Rename CHW2HWC to NCHW2NCHW in DepthToSpace operator by Marat Dukhan · 4 years ago
- 0f1dc18 Add operator level tests for DEPTH_TO_SPACE op by Artsiom Ablavatski · 4 years ago
- bbe8506 Introduce DEPTH_TO_SPACE operator and enable it for graph rewriting by Artsiom Ablavatski · 4 years ago
- e784186 Basic scalar implementation of CHW-to-HWC Depth-to-Space. by Yury Kartynnik · 4 years ago
- 8ef44cd Pipelined Web Assembly Sparse Matrix Multiply by Frank Barchard · 4 years ago
- beca652 Rename unroll to x for SpMM microkernels with unrolled loop by Frank Barchard · 4 years ago
- ccca214 SSE variant of 5x5s2 DWCONV CHW micro-kernels by Marat Dukhan · 4 years ago
- d050389 SSE variants of 5x5 DWCONV CHW micro-kernels by Marat Dukhan · 4 years ago
- 30d4b25 Auto-generate 5x5s2 DWCONV CHW micro-kernels by Marat Dukhan · 4 years ago
- 29c0c33 Auto-generate 5x5s2p2 DWCONV CHW micro-kernels by Marat Dukhan · 4 years ago
- 9791810 Add operator implementation and tests for IBILINEAR CHW microkernel by Artsiom Ablavatski · 4 years, 1 month ago
- 846c0c6 Add 32x1 32x2 32x4 SPMM microkernels and remove 4x1 4x2 4x4 for WASMSIMD, Neon and SSE by Frank Barchard · 4 years, 1 month ago
- 149f0ea Auto-generate NEON 5x5p2 DWCONV micro-kernels by Marat Dukhan · 4 years, 1 month ago
- c4efb00 Auto-generate scalar 5x5p2 DWCONV CHW micro-kernels by Marat Dukhan · 4 years, 1 month ago
- cf5b3c3 Auto-generate scalar versions of DWCONV2D CHW 3x3s2p1 micro-kernels by Marat Dukhan · 4 years, 1 month ago
- 82f0c32 Auto-generate NEON/NEONFMA versions of DWCONV2D CHW 3x3s2p1 micro-kernels by Marat Dukhan · 4 years, 1 month ago
- 0ff9718 Auto-generate SSE versions of DWCONV2D CHW 3x3s2p1 micro-kernels by Marat Dukhan · 4 years, 1 month ago
- 91249d2 Auto-generate scalar versions of DWCONV2D CHW 3x3p1 micro-kernels by Marat Dukhan · 4 years, 1 month ago
- c581e48 NEON versions of DWCONV2D CHW 3x3p1 micro-kernels by Marat Dukhan · 4 years, 1 month ago
- 1268a24 Auto-generate AArch64 NEONFMA versions of DWCONV2D CHW 3x3p1 micro-kernels by Marat Dukhan · 4 years, 1 month ago
- 98f2eeb SSSE3 versions of DWCONV2D CHW 3x3p1 micro-kernels by Marat Dukhan · 4 years, 1 month ago
- 470078a Auto-generate SSE versions of DWCONV2D CHW 3x3p1 micro-kernels by Marat Dukhan · 4 years, 1 month ago
- 965272b Add WebAssembly SIMD IBILINEAR microkernels for CHW layout by XNNPACK Team · 4 years, 1 month ago
- bf715f9 Rename DWCONV CHW microkernels to DWCONV2D CHW by Marat Dukhan · 4 years, 1 month ago
- 3155c47 Remove right corners from indirection tables in IBILINEAR CHW microkernel interface by XNNPACK Team · 4 years, 1 month ago
- cb2b667 Roll back the decision to split the packed weights for the CHW IBILINEAR microkernel interface by XNNPACK Team · 4 years, 1 month ago
- dc6c77f Generate DWCONV CHW microkernel tests from a YAML specification by Marat Dukhan · 4 years, 1 month ago
- 0dde1af Split packed weights into horizontal and vertical in IBILINEAR CHW microkernel interface by XNNPACK Team · 4 years, 1 month ago
- 6be46b2 Add input increment parameter in IBILINEAR CHW microkernels by XNNPACK Team · 4 years, 1 month ago
- 6f469a5 Minor refactoring in DWCONV CHW microkernels by Marat Dukhan · 4 years, 1 month ago
- c451e8a WAsm SpMM microkernels unrolled by 2 and 4. by Frank Barchard · 4 years, 1 month ago
- 1c6cad9 Suffix DWCONV CHW microkernels with block size by Marat Dukhan · 4 years, 1 month ago
- 42c32ce Fix compilation of f32_ibilinear_chw_test for WAsm SIMD by Marat Dukhan · 4 years, 1 month ago
- 7515777 Scale input width in DWCONV CHW interface by sizeof(float) by Marat Dukhan · 4 years, 1 month ago
- a5cb677 Add "nhwc" into the naming of indirection map function and tests by XNNPACK Team · 4 years, 1 month ago
- ae7e8b2 Remove remnants of SpCHW layout in DWCONV-CHW microkernels by Marat Dukhan · 4 years, 1 month ago
- 2143267 IBILINEAR CHW microkernels by XNNPACK Team · 4 years, 1 month ago
- 9e05340 Replace PSIMD SpMM microkernels with WAsm SIMD. by Frank Barchard · 4 years, 1 month ago
- dc2b29c AVX float32 sigmoid ukernels. by T.J. Alumbaugh · 4 years, 1 month ago
- 146e999 Replace QS8 4x8 with 2x8 neon microkernel. Improves performance for aarch32. by Frank Barchard · 4 years, 1 month ago
- f2742c4 Cortex A55r1 QS8 GEMM microkernel by Frank Barchard · 4 years, 1 month ago
- 0797eb1 Rename QS8 assembly GEMM kernels to ld64 by Frank Barchard · 4 years, 1 month ago
- ab8c4c8 Add basic unit tests for graph rewriting procedure by XNNPACK Team · 4 years, 1 month ago
- f1fd89e 1x16 QS8 GEMM AARCH64 assembly microkernel using dot product. by Frank Barchard · 4 years, 1 month ago
- d2750b0 Limit testing range for FP16 global-average-pooling to 1.0e-3f to 1 to avoid by Frank Barchard · 4 years, 1 month ago
- 31bb45b 4x16 QS8 GEMM AARCH64 assembly microkernel using dot product. by Frank Barchard · 4 years, 1 month ago