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gerrit-public.fairphone.software / platform / external / XNNPACK / 618d85d315bd2b6d6e861e45f0d8e882096d5245 / src
  1. 618d85d QS8 Neon dot product intrinsics GEMM and IGEMM microkernels reduced remainder code. by Frank Barchard · 3 years, 9 months ago
  2. d76a37b Re-label branch targets in c4-neondot assembly QS8 GEMM microkernels. by Frank Barchard · 3 years, 9 months ago
  3. 4a4be4e QS8 1x16c4 ld32 GEMM microkernel using NEON dot product by Frank Barchard · 3 years, 9 months ago
  4. 7aa4bfd QS8 Cortex A55 GEMM microkernel bump kc to be a multiple of channels. by Frank Barchard · 3 years, 9 months ago
  5. 6d8ca7d Quantized GEMM/IGEMM microkernels bump kc to be a multiple of channels. by Frank Barchard · 3 years, 9 months ago
  6. 02121ca QS8 Neon IGEMM microkernels with 8 bit MUL using DUP by Frank Barchard · 3 years, 9 months ago
  7. 8f6a1ed QS8 LD64 C4 dot product GEMM microkernel reduced remainder handling by Frank Barchard · 3 years, 9 months ago
  8. fd1dee7 QS8 C16 GEMM microkernel source renamed from mull to mlal by Frank Barchard · 3 years, 9 months ago
  9. 77e93a2 Fix mismatch in block layout in mixed-layout Depth-To-Space operator by Marat Dukhan · 3 years, 9 months ago
  10. a5e242c QS8 LD32 GEMM microkernel for big cores with dotproduct by Frank Barchard · 3 years, 9 months ago
  11. 01c341b C8 MLA Neon GEMM/IGEMM microkernels count k down from kc. by Frank Barchard · 3 years, 9 months ago
  12. a414daa Enable Quantized C2 microkernel for Neon by Frank Barchard · 3 years, 9 months ago
  13. 36f95cf QS8 Neon IGEMM C16 microkernel with two 8 bit multiplies and vpadal to accumulate. by Frank Barchard · 3 years, 9 months ago
  14. 55d53a4 Fix bug in NHWC Convolution with depthwise kernels by Marat Dukhan · 3 years, 9 months ago
  15. 71c4d1a QS8 Neon GEMM C16 microkernel with two 8 bit multiplies and vpadal to accumulate. by Frank Barchard · 3 years, 9 months ago
  16. 6d138db Remove scalar C4 QS8 and QU8 gemm microkernels. by Frank Barchard · 3 years, 9 months ago
  17. a0fe11d QS8 C8 Neon remove remainder handling code and rewind the A pointers by kc by Frank Barchard · 3 years, 9 months ago
  18. 32389c6 QS8 e2e benchmark for C2 neon microkernels by Frank Barchard · 3 years, 9 months ago
  19. 6fa8078 QS8 C2 Neon igemm by Frank Barchard · 3 years, 9 months ago
  20. d79391d QS8 C8 Neon igemm by Frank Barchard · 3 years, 9 months ago
  21. aaafdc7 QS8 scalar gemm remove bias variables. by Frank Barchard · 3 years, 9 months ago
  22. fe14b85 Add space after casting by Frank Barchard · 3 years, 9 months ago
  23. 10f9f05 Remove 0 from ranges where not needed by Frank Barchard · 3 years, 9 months ago
  24. 4baa2ac Process 32 pixels at a time in ARM64 SpMM microkernels by Marat Dukhan · 3 years, 9 months ago
  25. c8532ae Unroll KC loop to do MULL and then MLAL to 16 bit before lengthening to 32 bit. by Frank Barchard · 3 years, 9 months ago
  26. 2d6bcbb Reorder a few gemm1 initializations to match end to end order of gemm, igemm, gemm1, igemm1 by Jared Duke · 3 years, 9 months ago
  27. 9b7562b Reorder a few gemm1 initializations to match end to end order of gemm, igemm, gemm1, igemm1 by Frank Barchard · 3 years, 9 months ago
  28. 7e1f371 QS8 GEMM for neon reorder with MR inner loop so mull and mlal to avoid dependency on destination. by Frank Barchard · 3 years, 9 months ago
  29. 8247e21 C2 QS8 microkernel using mull then mlal with KC loop of 16 by Frank Barchard · 3 years, 9 months ago
  30. 5899012 QS8 Neon GEMM C8 microkernel with 8 bit multiply and vpadal to accumulate. by Frank Barchard · 3 years, 10 months ago
  31. 2202c81 Implement bilinear upsampling (CHW layout) for ARM architecture by Artsiom Ablavatski · 3 years, 10 months ago
  32. 2302ffd QS8 Neon GEMM microkernel with 8 bit multiply and vpadal to accumulate by Frank Barchard · 3 years, 10 months ago
  33. ec0bf14 QS8 GEMM and IGEMM 3x8 3x16 and IGEMM 4x8 and 4x16 by Frank Barchard · 3 years, 10 months ago
  34. 4ecae2e QS8 Neon GEMM microkernel with 8 bit multiply by Frank Barchard · 3 years, 10 months ago
  35. b94e34b QS8 GEMM select 2x16 for Neon MLAL. by Frank Barchard · 3 years, 10 months ago
  36. cfbc849 Add 4x8 and 4x16 qs8 gemm microkernels by Frank Barchard · 3 years, 10 months ago
  37. db2475b Include <memory> for `std::addressof` after libc++ commit 7ad49aec125b3c1205b164331d0aa954d773f890. by XNNPACK Team · 3 years, 11 months ago
  38. c5704bf WebAssembly DWConv2D 3x3 stride 2 loadsplat by Frank Barchard · 3 years, 11 months ago
  39. c6889b3 WebAssembly DWConv2D 5x5 stride 2 loadsplat by Frank Barchard · 3 years, 11 months ago
  40. 02bb429 WebAssembly DWConv2D 3x3p1 adapted from NEON by Frank Barchard · 4 years ago
  41. b20dcd6 WASMSIMD dwconv2d 5x5p2 use loadsplat by Frank Barchard · 4 years ago
  42. c30f310 WASMSIMD dwconv2d chw 3x3p1 replace loadsplat with vector load and shuffle by Frank Barchard · 4 years ago
  43. e332dd6 Fix bug in EXPM1MINUS and ELU implementation by Marat Dukhan · 4 years ago
  44. dfe47b9 Use iOS microkernels for Apple Silicon Macs by Marat Dukhan · 4 years ago
  45. 802fcae Additional SSE/SSE2 GEMM/IGEMM microkernels by Marat Dukhan · 4 years ago
  46. 412e2f4 Rename WASMSIMD dwconv2d functions to splat or loadsplat by Frank Barchard · 4 years ago
  47. 3de5dfa Remove PSIMD dependency by Marat Dukhan · 4 years ago
  48. 094e692 Support sparse rewriting for clusters with ELU operator by Marat Dukhan · 4 years ago
  49. cfbed0a Disable sparse graph rewriting on x86 with AVX+ by Marat Dukhan · 4 years ago
  50. 54b2d54 Disable sparse graph rewriting for clusters with <= 2/3 zeroes by Marat Dukhan · 4 years ago
  51. 6f7d4a2 Remove unused input_width_tile from dwconv2d_chw_parameters by Marat Dukhan · 4 years ago
  52. 4ddfab4 Optimize CHW microkernel selection for pre-NEON AArch32 by Marat Dukhan · 4 years ago
  53. c763488 CONV2D HWC2CHW microkernel for ARM NEON by Marat Dukhan · 4 years ago
  54. 3e91338 Initialize pointers to NEON CHW microkernels by Marat Dukhan · 4 years ago
  55. 3b32261 Simplify constant expressions in WAsm SIMD DWConv CHW by Frank Barchard · 4 years ago
  56. 0725b8d Rename WebAssembly SIMD source files and functions with x86 or arm suffix after wasmsimd by Frank Barchard · 4 years ago
  57. c12dcda Fix typo in sparse rewriting by Marat Dukhan · 4 years ago
  58. 7332e83 Add Runtime flag to indicate sparse inference preference by Marat Dukhan · 4 years ago
  59. 3a30521 Refactor accuracy evaluation benchmarks by Marat Dukhan · 4 years ago
  60. 5b86c43 NEON versions of non-blocked F32 SpMM microkernels by Marat Dukhan · 4 years ago
  61. f56b4bb Fix classification of Depth-to-Space operator in Sparse rewriting by Marat Dukhan · 4 years ago
  62. 102e9ea Revert "Remove PSIMD dependency" by Marat Dukhan · 4 years ago
  63. cee4e95 Remove PSIMD dependency by Marat Dukhan · 4 years ago
  64. 892310c Simplify parallelization in elementwise binary and Padding operators by Marat Dukhan · 4 years ago
  65. e7223ee WASMSIMD dwconv2d 5x5s2 tests and benchmark by Frank Barchard · 4 years ago
  66. ff0624e Add WebAssembly dwconv2d_chw_3x3s2p1 benchmark by Frank Barchard · 4 years ago
  67. b88d011 WebAssembly SIMD DWConv2D 3x3 stride-2 adapted from NEON by Frank Barchard · 4 years ago
  68. 729f07b WebAssembly SIMD DWConv2D 5x5 stride 2 adapted from NEON by Frank Barchard · 4 years ago
  69. 710612f dwconv2d_chw_ukernel_5x5p2__wasmsimd simplify shuffle expressions to a constant. by Frank Barchard · 4 years ago
  70. 6b1629a Remove code generator for old 5x5p2 by Frank Barchard · 4 years ago
  71. 1a803b6 Improve compatibility with legacy compilers by Marat Dukhan · 4 years ago
  72. a160020 Support ELU operator in Subgraph API by Marat Dukhan · 4 years ago
  73. b6bd4bc Implement ELU operator by Marat Dukhan · 4 years ago
  74. ed6baaf Vector ELU microkernels by Marat Dukhan · 4 years ago
  75. 20a0741 Web Assemble DWConv2D f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd adapted from Neon by Frank Barchard · 4 years ago
  76. de390d4 EXPM1MINUS evaluation stubs by Marat Dukhan · 4 years ago
  77. ffedf80 Refactor IBILINEAR CHW microkernels by Marat Dukhan · 4 years ago
  78. 0a9c120 Enable NCHW Depth-To-Space in Subgraph API by Marat Dukhan · 4 years ago
  79. 0e52117 NHWC version of Depth-To-Space operator by Marat Dukhan · 4 years ago
  80. 188d104 Refactor Depth To Space NCHW2NHWC operator test by Marat Dukhan · 4 years ago
  81. 322b21e Remove no longer used input2_pixel_stride in xnn_operator by Marat Dukhan · 4 years ago
  82. 9cbaa63 Unify parameters of DepthToSpace NCHW->NHWC operator with other operators by Marat Dukhan · 4 years ago
  83. 048931b Extract memcpy wrapper used by Copy operator into a microkernel by Marat Dukhan · 4 years ago
  84. 2213606 xnn_f32_conv_hwc2chw_ukernel_3x3s2p1c3x4__wasmsimd_2x2 based on SSE version by Frank Barchard · 4 years ago
  85. 0a94d9a Evaluate f32_expm1minus__scalar_rr2_p5 in f32-expm1minus-eval by Marat Dukhan · 4 years ago
  86. 97883b8 Enable dwconv2d_chw_3x3p1__wasmsimd_x86_2x4 microkernel by Frank Barchard · 4 years ago
  87. c60742b Scalar EXPM1MINUS evaluation stubs by Marat Dukhan · 4 years ago
  88. 2af73ac Minor improvements to WAsm SIMD version of DWCONV2D CHW by Frank Barchard · 4 years ago
  89. 0b18cb3 Enable dwconv2d_chw_3x3p1__ssse3_2x4_acc2 microkernel by Frank Barchard · 4 years ago
  90. 3b80045 WAsm SIMD version of DWCONV2D CHW 3x3p1 by Frank Barchard · 4 years ago
  91. b3fa13c Refactor EXPMINUS evaluation stubs by Marat Dukhan · 4 years ago
  92. d6d321e Evaluation stub for SSE2 EXPM1MINUS with degree-5 polynomial approximation by Marat Dukhan · 4 years ago
  93. 9dd119a Unify naming of EXPMINUS evaluation stubs by Marat Dukhan · 4 years ago
  94. b7633f2 Unify naming of EXP evaluation stubs by Marat Dukhan · 4 years ago
  95. a438aca SSE2 EXPM1MINUS evaluation stubs by Marat Dukhan · 4 years ago
  96. 102a739 Fix typos in exp-based microkernels and evaluation stubs by Marat Dukhan · 4 years ago
  97. ad71b9a Refactor naming of DEPTHTOSPACE microkernels by Marat Dukhan · 4 years ago
  98. bef9a4d Do not set ukernel type in operators with a single type of kernel by Marat Dukhan · 4 years ago
  99. 9cef5ea dwconv wasm remove shuffle wrappers. by Frank Barchard · 4 years ago
  100. db5c32d WasmSIMD dwconv2d generate x86 optimized version. by Frank Barchard · 4 years ago