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gerrit-public.fairphone.software / platform / external / XNNPACK / 7be427a5408fcd911b339d936f2edf7c1acb0847 / src / f32-vlrelu
  1. 7be427a Disable MSan and TSan in most microkernels with Out-of-Bounds reads by Marat Dukhan · 2 years, 7 months ago
  2. 4810905 Leverage v128.const WAsm SIMD instruction by Marat Dukhan · 2 years, 10 months ago
  3. 2dac7bb Unify on wasm_f64x2_spalt(0.0) to materialize zero SIMD vector in WAsm by Marat Dukhan · 2 years, 11 months ago
  4. d4db6af Replace wasm_i32x4_lt(vzero, vXX) with wasm_i32x4_shr(vXX, 31) by Marat Dukhan · 2 years, 11 months ago
  5. ee029b2 Replace deprecated wasm_simd128.h intrinsics with new versions by Marat Dukhan · 3 years ago
  6. 6eca86c Remove PSIMD variants of unary elementwise microkernels by Marat Dukhan · 4 years ago
  7. 19dd91d Prefix generated VLRELU microkernels with vlrelu- by Marat Dukhan · 4 years ago
  8. e6502da WAsm SIMD versions of Leaky ReLU microkernels by Marat Dukhan · 4 years ago
  9. 0d3f467 SSE2 and SSE4.1 versions of Leaky ReLU microkernels by Marat Dukhan · 4 years ago
  10. 8cc7efe LRELU (Leaky ReLU) micro-kernels by Marat Dukhan · 4 years, 1 month ago