1. 88d06fc Disable neondot microkernels on iOS 32 bit by Frank Barchard · 2 years, 5 months ago
  2. ba05c64 Fix MSVC compilation issues by Marat Dukhan · 2 years, 5 months ago
  3. 6b45a7f 16-bit Constant Pad ND operator by Marat Dukhan · 2 years, 5 months ago
  4. cde8bdf Q8 GEMM for Cortex A7 reduce prefetch to weights by Frank Barchard · 2 years, 5 months ago
  5. 16c0912 F16 MAXPOOL microkernel for NEON FP16ARITH by Marat Dukhan · 2 years, 5 months ago
  6. f9ca9af Fix typo in CMakeLists.txt by Marat Dukhan · 2 years, 5 months ago
  7. 9532079 Create a macro to define JIT GEMM generators by Zhi An Ng · 2 years, 5 months ago
  8. f30a859 Port aarch64 F32 IGEMM 1x8 A75 microkernel to JIT, add tests, benchmarks, enable in init.c if JIT is enabled by Zhi An Ng · 2 years, 5 months ago
  9. f672851 Implement str (s register, post index) for aarch64 assembler by Zhi An Ng · 2 years, 5 months ago
  10. c92034d Define constants for +/- infinity to check for clamping in JIT generators by Zhi An Ng · 2 years, 5 months ago
  11. 1738f11 Implement ldr (post-index) for aarch64 assembler by Zhi An Ng · 2 years, 5 months ago
  12. eb7256b Port F32 GEMM A75 1x8 microkernel to JIT and specialize for min/max, add tests and benchmarks by Zhi An Ng · 2 years, 5 months ago
  13. a3bf3ea Use JIT F32 IGEMM if JIT is enabled by Zhi An Ng · 2 years, 5 months ago
  14. 6d7cd2c Specialize F32 IGEMM for a75 on mix/max by Zhi An Ng · 2 years, 5 months ago
  15. 1425eb5 Copy IGEMM benchmark code into JIT's IGEMM benchmark code, and add JIT aarch64 generators to benchmarks by Zhi An Ng · 2 years, 5 months ago
  16. 2188833 Fix F32 IGEMM benchmark loop to not require capping NC to NR by Zhi An Ng · 2 years, 5 months ago
  17. 94def8a Fix bug in Convert operator on large tensors with multi-threading by Marat Dukhan · 2 years, 5 months ago
  18. 4620ca6 Reland "Graph rewriting for FP16 inference" by Marat Dukhan · 2 years, 5 months ago
  19. 6b72e6c Convert F32 IGEMM for A75 to JIT, add tests by Zhi An Ng · 2 years, 5 months ago
  20. e96b6bc Split qs8-igemm-minmax-rndnu tests into 1 more file (4 total), seeing compile timeouts in coverage runs by Zhi An Ng · 2 years, 5 months ago
  21. 9a365d0 Revert "Graph rewriting for FP16 inference" by Antonio Sanchez · 2 years, 5 months ago
  22. f0f374f Rename f32-gemm/6x8-aarch64-neonfma-prfm-cortex-a75.cc to remove prfm from file name by Zhi An Ng · 2 years, 5 months ago
  23. 4decc8e Implement mov (x registers) for aarch64 assembler by Zhi An Ng · 2 years, 5 months ago
  24. 8ceeebe Implement stp (x registers) for aarch64 assembler by Zhi An Ng · 2 years, 5 months ago
  25. 9e51ad6 Implement cmp (x registers) for aarch64 assembler by Zhi An Ng · 2 years, 5 months ago
  26. 1d5c616 Enable QU8 AAarch microkernels based on uarch by Frank Barchard · 2 years, 5 months ago
  27. 94a0b0b Graph rewriting for FP16 inference by Marat Dukhan · 2 years, 5 months ago
  28. 77d2885 QS8 AArch32 GEMM benchmark build fix by Frank Barchard · 2 years, 5 months ago
  29. 6cb0fd0 Add AArch32 GEMM benchmarks for Cortex A53 and Cortex A7 by Frank Barchard · 2 years, 5 months ago
  30. ca51090 QS8 GEMM benchmark for JIT add ISA check by Frank Barchard · 2 years, 5 months ago
  31. 2991acf Enable QS8/QC8 4x8 lane GEMM AArch32 microkernel for Cortex A7 by Frank Barchard · 2 years, 5 months ago
  32. 043c1f5 Include JIT_SRCS in XNNPACK build by Marat Dukhan · 2 years, 5 months ago
  33. 18f71e0 Support vld1r_32 with 1 or 2 register(s) in list by Zhi An Ng · 2 years, 5 months ago
  34. 60c9bcb Fix incorrect k argument to QC8/QS8 GEMM microkernel test by Zhi An Ng · 2 years, 5 months ago
  35. 9fd2f3e Fix passing of kc JIT generator in F32 GEMM benchmarks by Zhi An Ng · 2 years, 5 months ago
  36. 237473f Include missing <limits> header in 4x8 F32 GEMM codegen for A53 by Marat Dukhan · 2 years, 5 months ago
  37. 3e3124e Make void* params argument of JIT generators const by Zhi An Ng · 2 years, 5 months ago
  38. 34251d8 QS8 4x8 lane GEMM AArch32 microkernel for Cortex A7 by Frank Barchard · 2 years, 5 months ago
  39. a312e9a Enable QS8 4x8 lane GEMM AArch32 microkernel for Cortex A5r0 and A7 by Frank Barchard · 2 years, 5 months ago
  40. 5ec5591 Fix tfjs build by adding dependency on jit by Zhi An Ng · 2 years, 5 months ago
  41. 5ebe686 Specialize 6x8-aarch64-neonfma-cortex-a75 on min/max params by Zhi An Ng · 2 years, 5 months ago
  42. 101271e QC8 4x8 lane GEMM AArch32 microkernel for Cortex A7 by Frank Barchard · 2 years, 5 months ago
  43. f82410d Enable QU8 4x8 lane GEMM AArch32 microkernel for Cortex A53 by Frank Barchard · 2 years, 5 months ago
  44. 0455acf Enable QC8 4x8 lane GEMM AArch32 microkernel for Cortex A53 by Frank Barchard · 2 years, 5 months ago
  45. 879ab98 Make SSE2 microkernels consistent with neon zip microkernels. by Alan Kelly · 2 years, 5 months ago
  46. 77a3b5f Enable QS8 4x8 lane GEMM AArch32 microkernel for Cortex A53 by Frank Barchard · 2 years, 5 months ago
  47. 9e4d2aa QS8 4x8 lane GEMM AArch32 microkernel for Cortex A53 by Frank Barchard · 2 years, 5 months ago
  48. cfd947d Add neon zip microkernel generator by Alan Kelly · 2 years, 5 months ago
  49. a63651c Set F32 GEMM generator function for A75 if XNN_ENABLE_JIT is set (defaults to off) by Zhi An Ng · 2 years, 5 months ago
  50. 930df8d Store rows in direct order in F16 GEMM microkernels by Marat Dukhan · 2 years, 5 months ago
  51. d9aaf69 Explicitly disable -ffast-math for scalar & WAsm microkernels by Marat Dukhan · 2 years, 5 months ago
  52. 3deae1d Guard JIT-related structs and functionality behind XNN_PLATFORM_JIT by Zhi An Ng · 2 years, 5 months ago
  53. f9fc9ec Integrate JIT generated GEMM microkernels into create_convolution2d_nhwc by Zhi An Ng · 2 years, 5 months ago
  54. 58cdcf2 Reoptimize QC8/QS8/QU8 GEMM/IGEMM WAsm SIMD microkernel selection by Marat Dukhan · 2 years, 5 months ago
  55. 348c377 QU8 GEMM/IGEMM WAsm SIMD microkernels with SR=4 by Marat Dukhan · 2 years, 5 months ago
  56. 3ceb4f1 Reoptimize NEON QC8/QS8 GEMM/IGEMM microkernels with SR > 1 by Marat Dukhan · 2 years, 5 months ago
  57. 8319baa Re-generate amalgamated FMA3 microkernels by Marat Dukhan · 2 years, 5 months ago
  58. 69b7f14 Reoptimize QS8/QC8 GEMM/IGEMM WAsm SIMD microkernels with swizzle by Marat Dukhan · 2 years, 5 months ago
  59. fbd67a7 Pad K to a multiple of SR in GEMM/IGEMM microkernels by Marat Dukhan · 2 years, 5 months ago
  60. 20151d9 Fix excessive memory allocation for packed weights in Deconvolution by Marat Dukhan · 2 years, 5 months ago
  61. 4ef2352 Improve test coverage for quantized Depthwise Convolutions in TFLite weight layout by Marat Dukhan · 2 years, 5 months ago
  62. 9dc0452 Link LibM to indirection target in CMake build by Marat Dukhan · 2 years, 5 months ago
  63. 5e8033a Make SSE2 microkernels consistent with neon zip microkernels. by Alan Kelly · 2 years, 5 months ago
  64. 5c37527 Make SSE2 microkernels consistent with neon zip microkernels. by Alan Kelly · 2 years, 5 months ago
  65. f2b233b Make SSE2 microkernels consistent with neon zip microkernels. - DEC is now MOV by Alan Kelly · 2 years, 5 months ago
  66. 8b758bf Integrate JIT generated GEMM microkernels into create_convolution2d_nhwc by XNNPACK Team · 2 years, 5 months ago
  67. 64cb10f Guard JIT-related structs and functionality behind XNN_PLATFORM_JIT by XNNPACK Team · 2 years, 5 months ago
  68. c9a2e74 Guard JIT-related structs and functionality behind XNN_PLATFORM_JIT by Zhi An Ng · 2 years, 6 months ago
  69. df51e11 Integrate JIT generated GEMM microkernels into create_convolution2d_nhwc by Zhi An Ng · 2 years, 6 months ago
  70. 15dd611 Check code_buffer capacity before attempting to release it by Zhi An Ng · 2 years, 6 months ago
  71. c607028 Remove wb from JIT aarch32 instructions, use mem operand and ++ instead by Zhi An Ng · 2 years, 6 months ago
  72. d236074 Add F32 GEMM 6x8 aarch64 neonfma cortex a75 JIT microkernel to benchmark by Zhi An Ng · 2 years, 6 months ago
  73. fc67a86 Fix encoding of prfm by Zhi An Ng · 2 years, 6 months ago
  74. 6cc5b48 QS8/QC8 4x8 dot product IGEMM AArch32 microkernel for Cortex A55 by Frank Barchard · 2 years, 6 months ago
  75. 2269ac8 Add default cases for switch, GCC warns that control reaches the end of non-void function. by Zhi An Ng · 2 years, 6 months ago
  76. d2bea50 Remove default member initializer for VRegister and ScalarVRegister so that we can aggregate initialize them (on GCC) by Zhi An Ng · 2 years, 6 months ago
  77. c2f62ea Remove redundant closing brace in CMakeLists by Marat Dukhan · 2 years, 6 months ago
  78. 870108c QS8/QC8 4x8 dot product IGEMM AArch32 microkernel for Cortex A55 by Frank Barchard · 2 years, 6 months ago
  79. e8fd444 QS8 IGEMM AArch64 LD64 round KC up to multiple of 4 before saving it on stack by Frank Barchard · 2 years, 6 months ago
  80. adf087d Remove 3 blank lines after last jit assembly instruction before end of function by Frank Barchard · 2 years, 6 months ago
  81. 773458c Change return type for assembler functions to void to simplify code, move emit32 into common assembler by Zhi An Ng · 2 years, 6 months ago
  82. 752b980 Avoid importing the entire xnnpack namespace in aarch32 assembler by Zhi An Ng · 2 years, 6 months ago
  83. c2e2da8 Fix conversion script for aarch64 assembly kernels and convert a single F32 GEMM as a test by Zhi An Ng · 2 years, 6 months ago
  84. 4a1c6a8 Implement ldp (d registers) offset and post index for aarch64 assembler by Zhi An Ng · 2 years, 6 months ago
  85. 193f4e1 Disable QU8 dot product for AArch32 IOS by Frank Barchard · 2 years, 6 months ago
  86. 048704d Implement stp (q registers) offset and post indexed for aarch64 assembler by Zhi An Ng · 2 years, 6 months ago
  87. 3cec451 Implement tst (immediate) for aarch64 assembler by Zhi An Ng · 2 years, 6 months ago
  88. 8709ac9 Implement csel for aarch64 assembler by Zhi An Ng · 2 years, 6 months ago
  89. ba5091f Enable QC8 4x8 dot product GEMM AArch32 microkernel for Cortex A55 by Frank Barchard · 2 years, 6 months ago
  90. a1cad4a Add x8 transpose bench by Alan Kelly · 2 years, 6 months ago
  91. ba68f44 Add x64 transpose bench by Alan Kelly · 2 years, 6 months ago
  92. e1ff738 Update assembly register usage comments. by Frank Barchard · 2 years, 6 months ago
  93. 35d8e68 Implemnet stp (d register) offset and pre-index for aarch64 assembler by Zhi An Ng · 2 years, 6 months ago
  94. 6c30427 Remove unused transpose ukernel declarations and unnecessary semi-colons. by Alan Kelly · 2 years, 6 months ago
  95. c821ea7 Refactor x16 transpose bench and add missing ukernels. by Alan Kelly · 2 years, 6 months ago
  96. 658a67d Implement add (x registers) for aarch64 assembler by Zhi An Ng · 2 years, 6 months ago
  97. 80eac62 Implement cmp (immediate) for aarch64 assembler by Zhi An Ng · 2 years, 6 months ago
  98. c98f0d2 Fix patching of branch instructions immediate by Zhi An Ng · 2 years, 6 months ago
  99. e8bbda0 Re-factor x32 transpose bench by Alan Kelly · 2 years, 6 months ago
  100. ac654f1 QC8 4x8 dot product GEMM AArch32 microkernel for Cortex A55 by Frank Barchard · 2 years, 6 months ago