- 91cd2b7 Rename binary operation micro-kernels by Marat Dukhan · 4 years, 5 months ago
- 355ab43 Rename SpMM micro-kernels by Marat Dukhan · 4 years, 5 months ago
- 869c62d Auto-switch to LINEAR GEMM/IGEMM/DWCONV micro-kernels by Marat Dukhan · 4 years, 5 months ago
- aefaef3 Prepare xnn_params for variations in fused activations by Marat Dukhan · 4 years, 5 months ago
- 163a7e6 Scalar & WAsm GEMM/IGEMM/DWCONV micro-kernels without activation by Marat Dukhan · 4 years, 5 months ago
- de06f49 Add MINMAX suffix to GEMM/IGEMM/DWCONV/PPMM micro-kernel names by Marat Dukhan · 4 years, 5 months ago
- 8452ff5 Refactor AVGPOOL micro-kernel parameters by Marat Dukhan · 4 years, 5 months ago
- 1c58711 Add MINMAX suffix to filenames of GEMM/IGEMM/PPMM/DWCONV micro-kernels by Marat Dukhan · 4 years, 5 months ago
- eb09a6b Rename F32/U8 output params to minmax params by Marat Dukhan · 4 years, 5 months ago
- a51cf48 Unify layout of min/max parameters by Marat Dukhan · 4 years, 5 months ago
- 1841b1a Avoid signbit in scalar PReLU micro-kernel by Marat Dukhan · 4 years, 5 months ago
- 05702cf Dynamically choose micro-kernel depending on active core by Marat Dukhan · 4 years, 6 months ago
- d21fdcb Fix FP16 SpMM incompatibility with gcc by Marat Dukhan · 4 years, 6 months ago
- 0d1052c iOS 6x8 microkernel based on Cortex-A75 but with X18 avoided. by Frank Barchard · 4 years, 6 months ago
- 4195af5 Avoid push d8, d9 for xnn_f32_dwconv_ukernel_up4x9__aarch64_neonfma_cortex_a55. by Frank Barchard · 4 years, 6 months ago
- 6f8c966 Use x13 instead of x18. by Frank Barchard · 4 years, 6 months ago
- 1c8bc0c Fix bug in Average Pooling operator by Marat Dukhan · 4 years, 6 months ago
- c58bd34 Fix bug in dilated max pooling with padding by Marat Dukhan · 4 years, 6 months ago
- 5868d80 Automatically switch to GAVGPOOL micro-kernels in Average Pooling operator by Marat Dukhan · 4 years, 6 months ago
- b187835 Polyfill _cvtu32_mask16 for Apple Clang 10.x by Marat Dukhan · 4 years, 6 months ago
- 057e796 For IOS disable assembly, falling back on intrinsics. by Frank Barchard · 4 years, 6 months ago
- 8fb9055 4x8 GEMM and IGEMM microkernels for Cortex A55. 7.8% faster for e2e mobile net v2. by Frank Barchard · 4 years, 6 months ago
- b3801eb Micro-kernel selection for newly detected microarchitectures by Marat Dukhan · 4 years, 6 months ago
- 36053aa 4x8 AARCH32 GEMM/IGEMM avoid r2 push/pop. by Frank Barchard · 4 years, 6 months ago
- b7dd29e 4x8 GEMM and IGEMM microkernels for AARCH32 Cortex A55. 11.5% faster end to end: by Frank Barchard · 4 years, 6 months ago
- d6a5463 Refactor Average Pooling setup by Marat Dukhan · 4 years, 6 months ago
- d9e92eb Fix AVX and AVX512F PReLU microkernels by Marat Dukhan · 4 years, 6 months ago
- 90eca0a AVX and AVX512F versions of PReLU micro-kernel by Marat Dukhan · 4 years, 6 months ago
- f32ae34 Unify the value of $ABC variable across all templates by Marat Dukhan · 4 years, 6 months ago
- 5c5fa96 Auto-generate CLAMP micro-kernels by Marat Dukhan · 4 years, 6 months ago
- a63a6fc Refactor GAVGPOOL micro-kernels by Marat Dukhan · 4 years, 6 months ago
- 660fd19 Rename BILINEAR microkernels into IBILINEAR by Marat Dukhan · 4 years, 6 months ago
- 64debce Cortex-A55 cpu detect and select 6x8 GEMM and IGEMM microkernels. 9% faster end to end on mobile net v2. 16.5% faster on mobile net v1. 6.4% faster on mobile net v3. by Frank Barchard · 4 years, 6 months ago
- fe7acb6 Targets for requantization tests and benchmarks by Marat Dukhan · 4 years, 6 months ago
- 91e1999 6x8 GEMM and IGEMM microkernels for Cortex A55. 9% faster end to end: by Frank Barchard · 4 years, 6 months ago
- f42facc Completely remove NaCl and PNaCl support by Marat Dukhan · 4 years, 6 months ago
- 49a5969 More descriptive entry point names for operators with groups by Marat Dukhan · 4 years, 6 months ago
- 892687b Fix typo in comment by Marat Dukhan · 4 years, 7 months ago
- f092a4a f32-maxpool microkernel for ARM Neon. by Frank Barchard · 4 years, 7 months ago
- 5b3185b Merge pull request #381 from mattn:build-windows by XNNPACK Team · 4 years, 7 months ago
- 21d3bd6 Support Average Pooling and Max Pooling in Subgraph API by Marat Dukhan · 4 years, 7 months ago
- dac1a0e Fix macro for exception to disable exception by Yasuhiro Matsumoto · 4 years, 7 months ago
- 462be05 Build on Windows by Yasuhiro Matsumoto · 4 years, 7 months ago
- 466da75 Support TF SAME padding in Average Pooling operator by Marat Dukhan · 4 years, 7 months ago
- bee7825 Support TF SAME padding in Max Pooling operator by Marat Dukhan · 4 years, 7 months ago
- 96171aa Refactor Average Pooling operator by Marat Dukhan · 4 years, 7 months ago
- ee1f63e Support input_offset in AVGPOOL and PAVGPOOL micro-kernels by Marat Dukhan · 4 years, 7 months ago
- 6ee435a Refactor AVGPOOL & PAVGPOOL micro-kernels & unit tests by Marat Dukhan · 4 years, 7 months ago
- 7493bfb Add Qualcomm Krait cpu detect and initial kernel. by Frank Barchard · 4 years, 7 months ago
- c8230a4 Remove output_min & output_max arguments in PReLU operator by Marat Dukhan · 4 years, 7 months ago
- 7353eea Fix typo in initialization of GEMM micro-kernels for WAsm SIMD by Marat Dukhan · 4 years, 7 months ago
- 2995427 Optimized Indirect Deconvolution algorithm for 1x1 subconvolutions by Marat Dukhan · 4 years, 7 months ago
- 5b5a062 Use generic LD64 GEMM/IGEMM micro-kernels on Cortex-A5/A7 by Marat Dukhan · 4 years, 7 months ago
- b00004d 4x2c4 GEMM micro-kernels for PSIMD and SSE by Marat Dukhan · 4 years, 7 months ago
- 52261a8 IGEMM for Cortex-A75 aarch32 pad stack so vector push is aligned. by Frank Barchard · 4 years, 7 months ago
- 775d349 Detect Cortex-A53/A55 and use IGEMM optimized for Cortex-A53 on aarch32 by Frank Barchard · 4 years, 7 months ago
- 16d7272 ks loop use B.HI instead of B.NE to avoid bugs causing infinite loop. by Frank Barchard · 4 years, 7 months ago
- d6f77a6 Fix bug in computing batch size in activations by Marat Dukhan · 4 years, 7 months ago
- c87a8fd Cortex A53 IGEMM 32 bit ARM by Frank Barchard · 4 years, 7 months ago
- c1a0697 Replace load with mov for ks in xnn_f32_igemm_ukernel_4x8__aarch32_neon_cortex_a75 by Frank Barchard · 4 years, 7 months ago
- 9b499d6 Load parameters in order of usage. by Frank Barchard · 4 years, 7 months ago
- 52bd86f Support Clamp, HardSwish, Sigmoid, Softmax in Subgraph API by Marat Dukhan · 4 years, 7 months ago
- 8155854 Direct branch to source remainder handler for GEMM/IGEMM. by Frank Barchard · 4 years, 7 months ago
- 79ade18 LD64 microkernels branch directly to remainder if less than 2 channels. by Frank Barchard · 4 years, 7 months ago
- 7cdeede CPU detect and select Cortex-A75 IGEMM for 32 bit ARM. by Frank Barchard · 4 years, 7 months ago
- fd262e1 IGEMM 4x8 LD64 pad stack with 4 bytes to align to 8 bytes by Frank Barchard · 4 years, 7 months ago
- 90ce789 Cortex A75 IGEMM 32 bit ARM. by Frank Barchard · 4 years, 7 months ago
- 90dff80 Work around MemorySanitizer alarm in AVX512 DWCONV micro-kernels by Marat Dukhan · 4 years, 7 months ago
- dc38f07 LD64 IGEMM 32 bit ARM by Frank Barchard · 4 years, 7 months ago
- 2fd2ba1 Support PReLU operator in Subgraph API by Marat Dukhan · 4 years, 7 months ago
- 54dcb46 Support Add2 and Multiply2 Nodes in Subgraph API by Marat Dukhan · 4 years, 7 months ago
- 01a1e98 Fix data pointers for static inputs in Subgraph API by Marat Dukhan · 4 years, 7 months ago
- bdb56f5 FP16 versions of SpMM micro-kernels by Marat Dukhan · 4 years, 7 months ago
- d16d0f0 Work around msan failured in AVX micro-kernels by Marat Dukhan · 4 years, 7 months ago
- 022c659 Support multithreading in Subgraph API by Marat Dukhan · 4 years, 7 months ago
- 484bfc4 Kryo, Cortex-A77 and Exynos-M5 use IGEMM 4x8 with no prefetch. by Frank Barchard · 4 years, 7 months ago
- fbbb40e Add Cortex-A77 and Exynos-M5 to init. by Frank Barchard · 4 years, 8 months ago
- 4d402b4 Fix another typo bug in runtime initialization by Marat Dukhan · 4 years, 8 months ago
- 93d61a7 Fix typo bug in XNNPACK runtime construction by Marat Dukhan · 4 years, 8 months ago
- 6866099 Harden DWCONV micro-kernels with extra asserts by Marat Dukhan · 4 years, 8 months ago
- 1d75a54 Subgraph API by Marat Dukhan · 4 years, 8 months ago
- fd8e689 Rename SoftArgMax operator to SoftMax by Marat Dukhan · 4 years, 8 months ago
- 1edc454 SoftArgMax operator by Marat Dukhan · 4 years, 8 months ago
- 8137e4c NEON/NEONFMA RAddStoreExpMinusMax micro-kernels by Marat Dukhan · 4 years, 8 months ago
- b39689d SSE2/PSIMD RAddStoreExpMinusMax micro-kernels by Marat Dukhan · 4 years, 8 months ago
- f46f675 Scalar RAddStoreExpMinusMax micro-kernels by Marat Dukhan · 4 years, 8 months ago
- d6ebf0c 6x8 a53 use X8 for GPR shadow register. Eliminate GPR push/pop by Frank Barchard · 4 years, 8 months ago
- 534375d A53 GEMM / IGEMM kernel prefetches adjust by 1 by Frank Barchard · 4 years, 8 months ago
- c03b2bd 4x12 A53 GEMM and IGEMM use X8 for temp GPR by Frank Barchard · 4 years, 8 months ago
- 324f2bb 4x8 A53 GEMM use X4 for temp GPR Saves a push/pop of X19. by Frank Barchard · 4 years, 8 months ago
- 7693acf 4x8 Cortex-A53 GEMM / IGEMM use 1 GPR instead of 2. by Frank Barchard · 4 years, 8 months ago
- f884a7b 6X8 Cortex-A53 GEMM use 1 GPR instead of 2. by Frank Barchard · 4 years, 8 months ago
- 54afb13 Use 2 GPR registers instead of 4 for GPR loads. by Frank Barchard · 4 years, 8 months ago
- cbb35d0 4x12 IGEMM use prefetch on A and B by Frank Barchard · 4 years, 8 months ago
- 3216758 6X8 Cortex-A53 IGEMM use 1 GPR instead of 2. by Frank Barchard · 4 years, 8 months ago
- 4cd8907 4x12 A53 kernel use prefetches on A by Frank Barchard · 4 years, 8 months ago
- 26cda6d Fix gcc incompatibilities in NEON Sigmoid micro-kernels by Marat Dukhan · 4 years, 8 months ago
- c01d8a4 A53 aarch32 pipelined. 19.2% faster 4x8 GEMM, 9.3% faster end to end by Frank Barchard · 4 years, 8 months ago
- b177732 Remove prefetch of output buffer from A53 kernels. by Frank Barchard · 4 years, 8 months ago
- fa0a432 F32 Sigmoid micro-kernels in AVX2 implementation by Marat Dukhan · 4 years, 8 months ago