- e6502da WAsm SIMD versions of Leaky ReLU microkernels by Marat Dukhan · 4 years, 3 months ago
- fb158e2 RELU microkernel to clamp values to 0 for a specialized clamp operator by Frank Barchard · 4 years, 3 months ago
- d816f62 WAsm SIMD versions of VMULCADDC microkernels by Marat Dukhan · 4 years, 3 months ago
- 08b7a97 Rename Q8 microkernels and operators to QU8 by Marat Dukhan · 4 years, 3 months ago
- 688f6d8 Unify x86 and ARM flavors of WAsm SIMD GEMM/IGEMM/DWCONV with RELU by Marat Dukhan · 4 years, 3 months ago
- 55dde5b NEON F32 HSWISH microkernel unrolled by 16 by Marat Dukhan · 4 years, 3 months ago
- 201ea0e Reoptimize F16 HSWISH microkernels by Marat Dukhan · 4 years, 3 months ago
- 9df9dc6 Reoptimize HSWISH microkernels by Marat Dukhan · 4 years, 3 months ago
- 00d1d6e WAsm SIMD variants of F32 IBILINEAR microkernels by Marat Dukhan · 4 years, 3 months ago
- e39e646 WAsm SIMD versions of [I]GEMM microkernels with NR=2 by Marat Dukhan · 4 years, 3 months ago
- f6e2480 WAsm SIMD variants of F32 MAXPOOL microkernels by Marat Dukhan · 4 years, 3 months ago
- 3fa52c8 WAsm SIMD versions of F32 CLAMP microkernel by Marat Dukhan · 4 years, 3 months ago
- 8c41796 WAsm SIMD versions of F32 RMAX microkernel by Marat Dukhan · 4 years, 3 months ago
- 5a698bb Generalize Deconvolution operator creation across data types by Marat Dukhan · 4 years, 3 months ago
- bc08f31 Generalize Fully Connected operator creation across data types by Marat Dukhan · 4 years, 3 months ago
- 8e229db Add scalar binary ops with linear activation by Frank Barchard · 4 years, 3 months ago
- b42f866 Unify interface of weights packing functions by Marat Dukhan · 4 years, 3 months ago
- d5b9f1c Add WASMSIMD binary ops with linear activation by Frank Barchard · 4 years, 3 months ago
- 609ac84 Update avgpool tests with ifdef for WASMSIMD by Frank Barchard · 4 years, 3 months ago
- 6804bbd Square Root operator by Marat Dukhan · 4 years, 3 months ago
- f4db2f3 Vector SQRT microkernels by Marat Dukhan · 4 years, 3 months ago
- 37c8351 Port unary elementwise microkernels to WAsm SIMD by Marat Dukhan · 4 years, 3 months ago
- 47387d6 Fix parameter initializion and WAsm microkernel tests by Marat Dukhan · 4 years, 3 months ago
- 72b399a Port RND microkernels to WAsm SIMD intrinsics by Marat Dukhan · 4 years, 3 months ago
- f2ebd89 Remove VRSQRDIFFC microkernels by Marat Dukhan · 4 years, 3 months ago
- 0e97d6f Vector Elementwise Binary with Scalar microkernels in WAsm SIMD by Marat Dukhan · 4 years, 3 months ago
- 49b4dcc FP16 Convolution NHWC operator by Frank Barchard · 4 years, 3 months ago
- fb5b20a Enable WAsm MVP tests in WAsm SIMD builds by Marat Dukhan · 4 years, 3 months ago
- 93d1ba1 WAsm SIMD versions of Vector Elementwise Binary microkernels by Marat Dukhan · 4 years, 3 months ago
- c303fe6 Optimize selection of HSWISH microkernels in WAsm SIMD by Marat Dukhan · 4 years, 3 months ago
- 9baec80 WAsm SIMD versions of HSWISH microkernels by Marat Dukhan · 4 years, 3 months ago
- 0d3f467 SSE2 and SSE4.1 versions of Leaky ReLU microkernels by Marat Dukhan · 4 years, 3 months ago
- 7c1f808 WAsm implementation of PReLU microkernels by Marat Dukhan · 4 years, 3 months ago
- 195f8eb WAsm SIMD implementation of PReLU microkernels by Marat Dukhan · 4 years, 3 months ago
- 39b5e94 SSE versions of PReLU microkernels by Marat Dukhan · 4 years, 3 months ago
- 01898c0 FP16 binary add operator by Frank Barchard · 4 years, 3 months ago
- fa75714 Remove XNN_NO_Q8_OPERATORS and XNN_NO_F16_OPERATORS guards from tests by Frank Barchard · 4 years, 3 months ago
- 0ccccf1 Group FP16 operators together in a section guarded by #ifndef XNN_NO_F16_OPERATORS by Frank Barchard · 4 years, 3 months ago
- 3913370 FP16 global average pool NHWC operator test round accumulated min and max by Frank Barchard · 4 years, 3 months ago
- ef61d02 Guard FP16 Global Average Pooling by initialization flags by Marat Dukhan · 4 years, 3 months ago
- af4dad4 Add ISA check for FP16 to GLOBAL_AVERAGE_POOLING_NWC_F16 tests by Frank Barchard · 4 years, 3 months ago
- 3303271 Support Depthwise kernel layout in NCHW Convolution by Marat Dukhan · 4 years, 4 months ago
- c3d52cf Parametrise Convolution operators by strides along the channel dimension by Marat Dukhan · 4 years, 4 months ago
- 569561d Generate PLD variation of AARCH32 LD64 by Frank Barchard · 4 years, 4 months ago
- b8e7b07 DWCONV microkernels with alternative activations in WAsm SIMD by Marat Dukhan · 4 years, 4 months ago
- 802808c GEMM/IGEMM microkernels with alternative activations in WAsm SIMD by Marat Dukhan · 4 years, 4 months ago
- ac014d7 DWCONV microkernels in WAsm SIMD intrinsics by Marat Dukhan · 4 years, 4 months ago
- 1bbf96b GEMM/IGEMM implementations in WAsm SIMD intrinsics by Marat Dukhan · 4 years, 4 months ago
- 7465a89 Add PSIMD DWCONV CHW 5X5S2P2 kernel. by Erich Elsen · 4 years, 4 months ago
- 2892889 Add PSIMD DWCONV 5x5s2 kernel. by Erich Elsen · 4 years, 4 months ago
- 7e2cbb0 FP16 Global Average Pooling operator by Frank Barchard · 4 years, 4 months ago
- 314030b Relax hswish FP16 microkernel test threshold by Frank Barchard · 4 years, 4 months ago
- 016e586 iOS use Cortex-A75 microkernel which avoids x18 register by Frank Barchard · 4 years, 4 months ago
- fd7a6e3 Add PSIMD DWCONV-CHW 3x3s2p1 kernel. by Erich Elsen · 4 years, 4 months ago
- 177fe2d Re-generate unary tests by Frank Barchard · 4 years, 4 months ago
- e6214af Add PSIMD dwconv 3x3s1 kernel. by Erich Elsen · 4 years, 4 months ago
- af45248 Include AVX512 polyfills in VRND microkernels by Marat Dukhan · 4 years, 4 months ago
- 2881333 FP32 Leaky ReLU operator by Marat Dukhan · 4 years, 4 months ago
- 8cc7efe LRELU (Leaky ReLU) micro-kernels by Marat Dukhan · 4 years, 4 months ago
- 6f278b5 Add PSIMD gavgpool kernel by Erich Elsen · 4 years, 4 months ago
- f870d04 Use exact comparison in PRELU microkernel tests by Marat Dukhan · 4 years, 4 months ago
- 0a1970e PSIMD F32-CONV-HWC2CHW kernel by Erich Elsen · 4 years, 4 months ago
- 6e80fdc Add 16x1 SSE f32-SpMM kernels, which is faster than the existing 8x1 kernel. by Erich Elsen · 4 years, 4 months ago
- 64e5251 Rounding operators by Marat Dukhan · 4 years, 4 months ago
- 290055c Requantization implementation in WAsm SIMD intrinsics by Marat Dukhan · 4 years, 4 months ago
- eecf8fd RND microkernels and tests by Marat Dukhan · 4 years, 4 months ago
- 34ccfba Fix incompatibilities with gcc by Marat Dukhan · 4 years, 4 months ago
- 361e44a Re-generate HWC CONV microkernels and SIGMOID tests by Frank Barchard · 4 years, 4 months ago
- b123340 Add SSE versions of conv-hwc2chw by Erich Elsen · 4 years, 4 months ago
- 5020b96 Abs, Negate, and Square NC operators by Marat Dukhan · 4 years, 4 months ago
- 2b9efd8 Vector Unary (ABS/NEG/SQR) micro-kernels by Marat Dukhan · 4 years, 4 months ago
- f739926 Squared Difference operator by Marat Dukhan · 4 years, 4 months ago
- 16b52e3 Remove Channel Pad NC operator by Marat Dukhan · 4 years, 4 months ago
- a5adc1f Remove WAsm versions of SQRDIFF microkernels by Marat Dukhan · 4 years, 4 months ago
- 13bafb0 SQRDIFF (Squared Difference) microkernels by Marat Dukhan · 4 years, 4 months ago
- 9c1a735 Include FP16 header for conversions by Frank Barchard · 4 years, 4 months ago
- 5a599a6 FP16 DWCONV microkernel by Frank Barchard · 4 years, 4 months ago
- 8fb51b6 Remove Add NC operator by Marat Dukhan · 4 years, 4 months ago
- 4e21b27 Copy NC operator by Marat Dukhan · 4 years, 4 months ago
- 0bb49a7 FP16 GAVGPOOL microkernel by Frank Barchard · 4 years, 4 months ago
- 2a1049c FP16 VMULCADDC microkernel by Frank Barchard · 4 years, 4 months ago
- 9f3a843 Replace comment Prepare output parameters with Prepare parameters. by Frank Barchard · 4 years, 4 months ago
- b2217dd Disable tsan for micro-kernels which read out-of-bounds by Marat Dukhan · 4 years, 4 months ago
- 467f636 Fused [I]GEMM+RELU micro-kernels by Marat Dukhan · 4 years, 4 months ago
- 63523d4 Refactor X32 PAD micro-kernels by Marat Dukhan · 4 years, 4 months ago
- f5c4625 Remove redundant TF legacy + align corners mode in Resize Bilinear by Marat Dukhan · 4 years, 4 months ago
- 065b11e Rename Pad operator to Constant Pad in Operator API by Marat Dukhan · 4 years, 4 months ago
- 4662b19 N-dimensional Pad operator by Marat Dukhan · 4 years, 4 months ago
- 6c74cd1 Test generator for gavgpool by Frank Barchard · 4 years, 4 months ago
- dcc8321 Fix stride in F32_GAVGPOOL_MINMAX_7P7X__SSE2_C4, channels_eq_4_2pass_subtile_with_input_stride by Frank Barchard · 4 years, 4 months ago
- 3bb3bfc X32 FILL micro-kernels by Marat Dukhan · 4 years, 4 months ago
- 56b10cd CONV-HWC NEONFMA micro-kernels with width tile 1 by Marat Dukhan · 4 years, 5 months ago
- d18cec3 Add more missing "assembly: true" specifications by Marat Dukhan · 4 years, 5 months ago
- ce7a3f8 Auto-generate NEON CONV micro-kernels by Marat Dukhan · 4 years, 5 months ago
- 32f9381 4x4 LD64 GEMM microkernel in AArch32+VFP assembly by Marat Dukhan · 4 years, 5 months ago
- d536072 DWCONV add input_offset and zero parameters by Frank Barchard · 4 years, 5 months ago
- 3b98f6b 4x4 LD64 GEMM+MINMAX microkernel in AArch32+VFP assembly by Marat Dukhan · 4 years, 5 months ago
- f606806 Add missing "assembly: true" specifications by Marat Dukhan · 4 years, 5 months ago
- 1f29b80 Refactor CHW micro-kernels by Marat Dukhan · 4 years, 5 months ago
- 7e4ca40 3x3s2c3 CONV NEONFMA microkernel with 0+1 padding by Marat Dukhan · 4 years, 5 months ago