- 34976aa Add XNNPACK to hwasan-postsubmit am: c7e3c5bcb7 am: 49d47a6522 am: 4bbb3b5369 by Florian Mayer · 2 years, 2 months ago int/13/fp4
- 4bbb3b5 Add XNNPACK to hwasan-postsubmit am: c7e3c5bcb7 am: 49d47a6522 by Florian Mayer · 2 years, 2 months ago
- 49d47a6 Add XNNPACK to hwasan-postsubmit am: c7e3c5bcb7 by Florian Mayer · 2 years, 2 months ago
- c7e3c5b Add XNNPACK to hwasan-postsubmit by Florian Mayer · 2 years, 2 months ago
- 30a8dd0 Update Android.bp for XNNPACK following latest update (06acbb) am: 663cd1e319 am: b10cef7997 am: f1e5a19aab am: e9fabe207d by Miao Wang · 2 years, 3 months ago
- 3d6448d Upgrade XNNPACK to cb872b09e8e4655e00efa22cc4fdf433ee06acbb am: 511c275c2e am: 93df4d866d am: 27d7dcc4f1 am: d54cd8e0fd by Miao Wang · 2 years, 3 months ago
- e9fabe2 Update Android.bp for XNNPACK following latest update (06acbb) am: 663cd1e319 am: b10cef7997 am: f1e5a19aab by Miao Wang · 2 years, 3 months ago
- d54cd8e Upgrade XNNPACK to cb872b09e8e4655e00efa22cc4fdf433ee06acbb am: 511c275c2e am: 93df4d866d am: 27d7dcc4f1 by Miao Wang · 2 years, 3 months ago
- f1e5a19 Update Android.bp for XNNPACK following latest update (06acbb) am: 663cd1e319 am: b10cef7997 by Miao Wang · 2 years, 3 months ago
- 27d7dcc Upgrade XNNPACK to cb872b09e8e4655e00efa22cc4fdf433ee06acbb am: 511c275c2e am: 93df4d866d by Miao Wang · 2 years, 3 months ago
- b10cef7 Update Android.bp for XNNPACK following latest update (06acbb) am: 663cd1e319 by Miao Wang · 2 years, 3 months ago
- 93df4d8 Upgrade XNNPACK to cb872b09e8e4655e00efa22cc4fdf433ee06acbb am: 511c275c2e by Miao Wang · 2 years, 3 months ago
- 663cd1e Update Android.bp for XNNPACK following latest update (06acbb) by Miao Wang · 2 years, 3 months ago
- 511c275 Upgrade XNNPACK to cb872b09e8e4655e00efa22cc4fdf433ee06acbb by Miao Wang · 2 years, 3 months ago
- cb872b0 Support Static Reshape for QS8/QU8 Tensors and in FP16 graph rewriting by Marat Dukhan · 2 years, 3 months ago
- 2bd2bd2 X8 & X16 Copy NC operators by Marat Dukhan · 2 years, 3 months ago
- 670826b Support Max Pooling 2D in FP16 graph rewriting by Marat Dukhan · 2 years, 3 months ago
- 170f95a Support PReLU in FP16 graph rewriting by Marat Dukhan · 2 years, 3 months ago
- 5756a92 F16 Max Pooling NHWC operator by Marat Dukhan · 2 years, 3 months ago
- af1671a Support FP32 weights in F16 PReLU operator by Marat Dukhan · 2 years, 3 months ago
- 4b90bee Support Static Constant Pad in FP16 graph rewriting by Marat Dukhan · 2 years, 3 months ago
- 10f2bf8 F16 MAXPOOL microkernel for F16C by Marat Dukhan · 2 years, 3 months ago
- 0a756b5 F16 PReLU operator by Marat Dukhan · 2 years, 3 months ago
- 88d06fc Disable neondot microkernels on iOS 32 bit by Frank Barchard · 2 years, 3 months ago
- ba05c64 Fix MSVC compilation issues by Marat Dukhan · 2 years, 3 months ago
- 6b45a7f 16-bit Constant Pad ND operator by Marat Dukhan · 2 years, 3 months ago
- cde8bdf Q8 GEMM for Cortex A7 reduce prefetch to weights by Frank Barchard · 2 years, 3 months ago
- 16c0912 F16 MAXPOOL microkernel for NEON FP16ARITH by Marat Dukhan · 2 years, 3 months ago
- f9ca9af Fix typo in CMakeLists.txt by Marat Dukhan · 2 years, 3 months ago
- 9532079 Create a macro to define JIT GEMM generators by Zhi An Ng · 2 years, 3 months ago
- f30a859 Port aarch64 F32 IGEMM 1x8 A75 microkernel to JIT, add tests, benchmarks, enable in init.c if JIT is enabled by Zhi An Ng · 2 years, 3 months ago
- f672851 Implement str (s register, post index) for aarch64 assembler by Zhi An Ng · 2 years, 3 months ago
- c92034d Define constants for +/- infinity to check for clamping in JIT generators by Zhi An Ng · 2 years, 3 months ago
- 1738f11 Implement ldr (post-index) for aarch64 assembler by Zhi An Ng · 2 years, 3 months ago
- eb7256b Port F32 GEMM A75 1x8 microkernel to JIT and specialize for min/max, add tests and benchmarks by Zhi An Ng · 2 years, 3 months ago
- a3bf3ea Use JIT F32 IGEMM if JIT is enabled by Zhi An Ng · 2 years, 3 months ago
- 6d7cd2c Specialize F32 IGEMM for a75 on mix/max by Zhi An Ng · 2 years, 3 months ago
- 1425eb5 Copy IGEMM benchmark code into JIT's IGEMM benchmark code, and add JIT aarch64 generators to benchmarks by Zhi An Ng · 2 years, 3 months ago
- 2188833 Fix F32 IGEMM benchmark loop to not require capping NC to NR by Zhi An Ng · 2 years, 3 months ago
- 94def8a Fix bug in Convert operator on large tensors with multi-threading by Marat Dukhan · 2 years, 3 months ago
- 4620ca6 Reland "Graph rewriting for FP16 inference" by Marat Dukhan · 2 years, 3 months ago
- 6b72e6c Convert F32 IGEMM for A75 to JIT, add tests by Zhi An Ng · 2 years, 3 months ago
- e96b6bc Split qs8-igemm-minmax-rndnu tests into 1 more file (4 total), seeing compile timeouts in coverage runs by Zhi An Ng · 2 years, 3 months ago
- 9a365d0 Revert "Graph rewriting for FP16 inference" by Antonio Sanchez · 2 years, 3 months ago
- f0f374f Rename f32-gemm/6x8-aarch64-neonfma-prfm-cortex-a75.cc to remove prfm from file name by Zhi An Ng · 2 years, 3 months ago
- 4decc8e Implement mov (x registers) for aarch64 assembler by Zhi An Ng · 2 years, 3 months ago
- 8ceeebe Implement stp (x registers) for aarch64 assembler by Zhi An Ng · 2 years, 3 months ago
- 9e51ad6 Implement cmp (x registers) for aarch64 assembler by Zhi An Ng · 2 years, 3 months ago
- 1d5c616 Enable QU8 AAarch microkernels based on uarch by Frank Barchard · 2 years, 3 months ago
- 94a0b0b Graph rewriting for FP16 inference by Marat Dukhan · 2 years, 3 months ago
- 77d2885 QS8 AArch32 GEMM benchmark build fix by Frank Barchard · 2 years, 3 months ago
- 6cb0fd0 Add AArch32 GEMM benchmarks for Cortex A53 and Cortex A7 by Frank Barchard · 2 years, 3 months ago
- ca51090 QS8 GEMM benchmark for JIT add ISA check by Frank Barchard · 2 years, 3 months ago
- 2991acf Enable QS8/QC8 4x8 lane GEMM AArch32 microkernel for Cortex A7 by Frank Barchard · 2 years, 3 months ago
- 043c1f5 Include JIT_SRCS in XNNPACK build by Marat Dukhan · 2 years, 3 months ago
- 18f71e0 Support vld1r_32 with 1 or 2 register(s) in list by Zhi An Ng · 2 years, 3 months ago
- 60c9bcb Fix incorrect k argument to QC8/QS8 GEMM microkernel test by Zhi An Ng · 2 years, 3 months ago
- 9fd2f3e Fix passing of kc JIT generator in F32 GEMM benchmarks by Zhi An Ng · 2 years, 3 months ago
- 237473f Include missing <limits> header in 4x8 F32 GEMM codegen for A53 by Marat Dukhan · 2 years, 3 months ago
- 3e3124e Make void* params argument of JIT generators const by Zhi An Ng · 2 years, 3 months ago
- 34251d8 QS8 4x8 lane GEMM AArch32 microkernel for Cortex A7 by Frank Barchard · 2 years, 3 months ago
- a312e9a Enable QS8 4x8 lane GEMM AArch32 microkernel for Cortex A5r0 and A7 by Frank Barchard · 2 years, 3 months ago
- 5ec5591 Fix tfjs build by adding dependency on jit by Zhi An Ng · 2 years, 3 months ago
- 5ebe686 Specialize 6x8-aarch64-neonfma-cortex-a75 on min/max params by Zhi An Ng · 2 years, 3 months ago
- 101271e QC8 4x8 lane GEMM AArch32 microkernel for Cortex A7 by Frank Barchard · 2 years, 3 months ago
- f82410d Enable QU8 4x8 lane GEMM AArch32 microkernel for Cortex A53 by Frank Barchard · 2 years, 3 months ago
- 0455acf Enable QC8 4x8 lane GEMM AArch32 microkernel for Cortex A53 by Frank Barchard · 2 years, 3 months ago
- 879ab98 Make SSE2 microkernels consistent with neon zip microkernels. by Alan Kelly · 2 years, 3 months ago
- 77a3b5f Enable QS8 4x8 lane GEMM AArch32 microkernel for Cortex A53 by Frank Barchard · 2 years, 3 months ago
- 9e4d2aa QS8 4x8 lane GEMM AArch32 microkernel for Cortex A53 by Frank Barchard · 2 years, 3 months ago
- cfd947d Add neon zip microkernel generator by Alan Kelly · 2 years, 3 months ago
- a63651c Set F32 GEMM generator function for A75 if XNN_ENABLE_JIT is set (defaults to off) by Zhi An Ng · 2 years, 3 months ago
- 930df8d Store rows in direct order in F16 GEMM microkernels by Marat Dukhan · 2 years, 3 months ago
- d9aaf69 Explicitly disable -ffast-math for scalar & WAsm microkernels by Marat Dukhan · 2 years, 3 months ago
- 3deae1d Guard JIT-related structs and functionality behind XNN_PLATFORM_JIT by Zhi An Ng · 2 years, 3 months ago
- f9fc9ec Integrate JIT generated GEMM microkernels into create_convolution2d_nhwc by Zhi An Ng · 2 years, 3 months ago
- 58cdcf2 Reoptimize QC8/QS8/QU8 GEMM/IGEMM WAsm SIMD microkernel selection by Marat Dukhan · 2 years, 3 months ago
- 348c377 QU8 GEMM/IGEMM WAsm SIMD microkernels with SR=4 by Marat Dukhan · 2 years, 3 months ago
- 3ceb4f1 Reoptimize NEON QC8/QS8 GEMM/IGEMM microkernels with SR > 1 by Marat Dukhan · 2 years, 3 months ago
- 8319baa Re-generate amalgamated FMA3 microkernels by Marat Dukhan · 2 years, 3 months ago
- 69b7f14 Reoptimize QS8/QC8 GEMM/IGEMM WAsm SIMD microkernels with swizzle by Marat Dukhan · 2 years, 3 months ago
- fbd67a7 Pad K to a multiple of SR in GEMM/IGEMM microkernels by Marat Dukhan · 2 years, 3 months ago
- 20151d9 Fix excessive memory allocation for packed weights in Deconvolution by Marat Dukhan · 2 years, 3 months ago
- 4ef2352 Improve test coverage for quantized Depthwise Convolutions in TFLite weight layout by Marat Dukhan · 2 years, 3 months ago
- 9dc0452 Link LibM to indirection target in CMake build by Marat Dukhan · 2 years, 3 months ago
- 5e8033a Make SSE2 microkernels consistent with neon zip microkernels. by Alan Kelly · 2 years, 3 months ago
- 5c37527 Make SSE2 microkernels consistent with neon zip microkernels. by Alan Kelly · 2 years, 3 months ago
- f2b233b Make SSE2 microkernels consistent with neon zip microkernels. - DEC is now MOV by Alan Kelly · 2 years, 3 months ago
- 8b758bf Integrate JIT generated GEMM microkernels into create_convolution2d_nhwc by XNNPACK Team · 2 years, 3 months ago
- 64cb10f Guard JIT-related structs and functionality behind XNN_PLATFORM_JIT by XNNPACK Team · 2 years, 3 months ago
- c9a2e74 Guard JIT-related structs and functionality behind XNN_PLATFORM_JIT by Zhi An Ng · 2 years, 3 months ago
- df51e11 Integrate JIT generated GEMM microkernels into create_convolution2d_nhwc by Zhi An Ng · 2 years, 3 months ago
- 15dd611 Check code_buffer capacity before attempting to release it by Zhi An Ng · 2 years, 4 months ago
- c607028 Remove wb from JIT aarch32 instructions, use mem operand and ++ instead by Zhi An Ng · 2 years, 4 months ago
- d236074 Add F32 GEMM 6x8 aarch64 neonfma cortex a75 JIT microkernel to benchmark by Zhi An Ng · 2 years, 4 months ago
- fc67a86 Fix encoding of prfm by Zhi An Ng · 2 years, 4 months ago
- 6cc5b48 QS8/QC8 4x8 dot product IGEMM AArch32 microkernel for Cortex A55 by Frank Barchard · 2 years, 4 months ago
- 2269ac8 Add default cases for switch, GCC warns that control reaches the end of non-void function. by Zhi An Ng · 2 years, 4 months ago
- d2bea50 Remove default member initializer for VRegister and ScalarVRegister so that we can aggregate initialize them (on GCC) by Zhi An Ng · 2 years, 4 months ago
- c2f62ea Remove redundant closing brace in CMakeLists by Marat Dukhan · 2 years, 4 months ago