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gerrit-public.fairphone.software / platform / external / XNNPACK / refs/heads/odm/rc/qssi/13/fp5 / src / qc8-dwconv / gen / up8x9-minmax-fp32-sse41-mul16.c
  1. 7be427a Disable MSan and TSan in most microkernels with Out-of-Bounds reads by Marat Dukhan · 2 years, 7 months ago
  2. 13c9f8d Support requantization scale over 1 in SSE/AVX GEMM/IGEMM/DWCONV by Marat Dukhan · 2 years, 7 months ago
  3. 0966856 Accumulate in 16 bits once in SSE2/SSE4/AVX/XOP MUL16 QS8/QC8 DWCONV before extending to 32 bits by Marat Dukhan · 3 years ago
  4. ab952f1 Remove multiplication in QS8/QC8 DWCONV MUL16 microkernels for SSE4 by Marat Dukhan · 3 years ago
  5. 575dfb9 Disable MSan in quantized DWCONV microkernels by Marat Dukhan · 3 years ago
  6. e5eee46 Refactor pre-SSE4 versions of QS8/QC8 GEMM/IGEMM microkernels by Marat Dukhan · 3 years ago
  7. 98042f2 QC8 DWCONV microkernels for SSE/AVX/XOP/AVX512 by Marat Dukhan · 3 years ago