- 3fa1f01 Revert "Revert "Upgrade XNNPACK to 1498d1d4d0430480dfe5c4538049b4f789d29134"" by Miao Wang · 4 years, 3 months ago
- 016db6e Revert "Upgrade XNNPACK to 1498d1d4d0430480dfe5c4538049b4f789d29134" by Haibo Huang · 4 years, 3 months ago
- 52bd86f Support Clamp, HardSwish, Sigmoid, Softmax in Subgraph API by Marat Dukhan · 4 years, 3 months ago
- 8155854 Direct branch to source remainder handler for GEMM/IGEMM. by Frank Barchard · 4 years, 3 months ago
- 79ade18 LD64 microkernels branch directly to remainder if less than 2 channels. by Frank Barchard · 4 years, 3 months ago
- 7cdeede CPU detect and select Cortex-A75 IGEMM for 32 bit ARM. by Frank Barchard · 4 years, 3 months ago
- fd262e1 IGEMM 4x8 LD64 pad stack with 4 bytes to align to 8 bytes by Frank Barchard · 4 years, 3 months ago
- 90ce789 Cortex A75 IGEMM 32 bit ARM. by Frank Barchard · 4 years, 3 months ago
- 90dff80 Work around MemorySanitizer alarm in AVX512 DWCONV micro-kernels by Marat Dukhan · 4 years, 3 months ago
- dc38f07 LD64 IGEMM 32 bit ARM by Frank Barchard · 4 years, 3 months ago
- 2fd2ba1 Support PReLU operator in Subgraph API by Marat Dukhan · 4 years, 3 months ago
- 54dcb46 Support Add2 and Multiply2 Nodes in Subgraph API by Marat Dukhan · 4 years, 3 months ago
- 01a1e98 Fix data pointers for static inputs in Subgraph API by Marat Dukhan · 4 years, 3 months ago
- bdb56f5 FP16 versions of SpMM micro-kernels by Marat Dukhan · 4 years, 4 months ago
- d16d0f0 Work around msan failured in AVX micro-kernels by Marat Dukhan · 4 years, 4 months ago
- 022c659 Support multithreading in Subgraph API by Marat Dukhan · 4 years, 4 months ago
- 484bfc4 Kryo, Cortex-A77 and Exynos-M5 use IGEMM 4x8 with no prefetch. by Frank Barchard · 4 years, 4 months ago
- fbbb40e Add Cortex-A77 and Exynos-M5 to init. by Frank Barchard · 4 years, 4 months ago
- 4d402b4 Fix another typo bug in runtime initialization by Marat Dukhan · 4 years, 4 months ago
- 93d61a7 Fix typo bug in XNNPACK runtime construction by Marat Dukhan · 4 years, 4 months ago
- 6866099 Harden DWCONV micro-kernels with extra asserts by Marat Dukhan · 4 years, 4 months ago
- 1d75a54 Subgraph API by Marat Dukhan · 4 years, 4 months ago
- fd8e689 Rename SoftArgMax operator to SoftMax by Marat Dukhan · 4 years, 4 months ago
- 1edc454 SoftArgMax operator by Marat Dukhan · 4 years, 4 months ago
- 8137e4c NEON/NEONFMA RAddStoreExpMinusMax micro-kernels by Marat Dukhan · 4 years, 4 months ago
- b39689d SSE2/PSIMD RAddStoreExpMinusMax micro-kernels by Marat Dukhan · 4 years, 4 months ago
- f46f675 Scalar RAddStoreExpMinusMax micro-kernels by Marat Dukhan · 4 years, 4 months ago
- d6ebf0c 6x8 a53 use X8 for GPR shadow register. Eliminate GPR push/pop by Frank Barchard · 4 years, 4 months ago
- 534375d A53 GEMM / IGEMM kernel prefetches adjust by 1 by Frank Barchard · 4 years, 4 months ago
- c03b2bd 4x12 A53 GEMM and IGEMM use X8 for temp GPR by Frank Barchard · 4 years, 4 months ago
- 324f2bb 4x8 A53 GEMM use X4 for temp GPR Saves a push/pop of X19. by Frank Barchard · 4 years, 4 months ago
- 7693acf 4x8 Cortex-A53 GEMM / IGEMM use 1 GPR instead of 2. by Frank Barchard · 4 years, 4 months ago
- f884a7b 6X8 Cortex-A53 GEMM use 1 GPR instead of 2. by Frank Barchard · 4 years, 4 months ago
- 54afb13 Use 2 GPR registers instead of 4 for GPR loads. by Frank Barchard · 4 years, 5 months ago
- cbb35d0 4x12 IGEMM use prefetch on A and B by Frank Barchard · 4 years, 5 months ago
- 3216758 6X8 Cortex-A53 IGEMM use 1 GPR instead of 2. by Frank Barchard · 4 years, 5 months ago
- 4cd8907 4x12 A53 kernel use prefetches on A by Frank Barchard · 4 years, 5 months ago
- 26cda6d Fix gcc incompatibilities in NEON Sigmoid micro-kernels by Marat Dukhan · 4 years, 5 months ago
- c01d8a4 A53 aarch32 pipelined. 19.2% faster 4x8 GEMM, 9.3% faster end to end by Frank Barchard · 4 years, 5 months ago
- b177732 Remove prefetch of output buffer from A53 kernels. by Frank Barchard · 4 years, 5 months ago
- fa0a432 F32 Sigmoid micro-kernels in AVX2 implementation by Marat Dukhan · 4 years, 5 months ago
- 4a24a58 Use 1-step range reduction in NEONFMA Sigmoid micro-kernels by Marat Dukhan · 4 years, 5 months ago
- 77221d3 NEON Sigmoid evaluation stubs with 1-step range reduction by Marat Dukhan · 4 years, 5 months ago
- 7241600 AVX2 Sigmoid accuracy evaluation stubs by Marat Dukhan · 4 years, 5 months ago
- 68b3b45 Complete set of NEON F32 Sigmoid micro-kernels by Marat Dukhan · 4 years, 5 months ago
- 1f5d9bc Apply patch to cpuinfo by Marat Dukhan · 4 years, 5 months ago
- 8d3c07e Additional Sigmoid micro-kernels and accuracy evaluation stub by Marat Dukhan · 4 years, 5 months ago
- 279908a A75 / A53 aarch32 epilogue reordered by B the same as main loop. by Frank Barchard · 4 years, 5 months ago
- 3a77ea7 Scalar F32 Sigmoid micro-kernels by Marat Dukhan · 4 years, 5 months ago
- dffaa46 Remove sse2-p5-div.c.in Sigmoid template by Marat Dukhan · 4 years, 5 months ago
- 5739f70 Evaluation stubs for Sigmoid function in scalar implementation by Marat Dukhan · 4 years, 5 months ago
- 5e9a91e Evaluation stubs for ExpMinus function in scalar implementation by Marat Dukhan · 4 years, 5 months ago
- 9520fc9 Tighten the compiler detection guards in intrinsics-polyfill.h. by Ashkan Aliabadi · 4 years, 5 months ago
- 387c2d1 Generate A57 micro-kernels from A75 source. by Frank Barchard · 4 years, 5 months ago
- 005feb8 A53 push r1, r2 so they can be used as scratch. Reorder FMA by B by Frank Barchard · 4 years, 5 months ago
- 0090f5b 4x8 FMA sorted by B to match load order by Frank Barchard · 4 years, 5 months ago
- 5cc1cc2 Select a default kernel optimized for big cores. by Frank Barchard · 4 years, 5 months ago
- abf8154 Code generator for PLD and non-PLD versions of aarch32 4x8 Cortex-A75 kernel by Frank Barchard · 4 years, 5 months ago
- 9e0e8ee Fix gcc-6 build by Marat Dukhan · 4 years, 5 months ago
- 4d281a5 Enable PLD prefetch version of a75 microkernel for aarch32 by Frank Barchard · 4 years, 5 months ago
- 07efec4 Run generator for A73 kernel NOP by Frank Barchard · 4 years, 5 months ago
- f9a3484 Detect A53 in aarch32 and use a53 specific micro kernel. by Frank Barchard · 4 years, 5 months ago
- 9f7d555 Prefetch version of the aarch32 a75 GEMM kernel by Frank Barchard · 4 years, 5 months ago
- 73ccfb4 Move SUBS to 2nd instruction of clamp code. by Frank Barchard · 4 years, 5 months ago
- c659140 a73 kernel move SUBS before clamp and add NOP before branch by Frank Barchard · 4 years, 6 months ago
- 1391604 Initial Cortex A53 kernel for aarch32 by Frank Barchard · 4 years, 6 months ago
- d94b856 Rename strided gemm and igemm fma3 broadcasts. by Ashkan Aliabadi · 4 years, 6 months ago
- 9a88efe AVX & AVX512F versions of binary elementwise micro-kernels by Marat Dukhan · 4 years, 6 months ago
- f52eff5 Fix typos in AVX/AVX512 HSWISH micro-kernels by Marat Dukhan · 4 years, 6 months ago
- b738ad2 fix for linux arm 32 bit by Frank Barchard · 4 years, 6 months ago
- 662faa0 Refactor HardSwish micro-kernels by Marat Dukhan · 4 years, 6 months ago
- 2712132 FMA3 microkernels with 4-wide shuffle by Marat Dukhan · 4 years, 6 months ago
- 4c4eb00 Additional variants of Softmax microkernels by Marat Dukhan · 4 years, 6 months ago
- eccfd71 NR=16 GEMM and IGEMM micro-kernels in AVX and FMA3 implementations by Marat Dukhan · 4 years, 6 months ago
- 6918050 ND Divide operator with broadcasting support by Marat Dukhan · 4 years, 6 months ago
- 77ca630 Elementwise Divide micro-kernels by Marat Dukhan · 4 years, 6 months ago
- bd8a962 Fix incorrect indirection buffer size in pooling operators by Marat Dukhan · 4 years, 6 months ago
- 79e7f84 ND Maximum and Minimum operators (with broadcasting support) by Marat Dukhan · 4 years, 6 months ago
- 403b7d4 Elementwise minimum and maximum micro-kernels by Marat Dukhan · 4 years, 6 months ago
- 65a0139 Polyfill _mm512_reduce_add_ps and _mm512_reduce_max_ps for old gcc by Marat Dukhan · 4 years, 6 months ago
- cfb3134 Polyfill missing _cvtu32_mask16 intrinsic on old gcc by Marat Dukhan · 4 years, 6 months ago
- 03ff294 Fix incorrect indirection size computation for DWCONV by Marat Dukhan · 4 years, 6 months ago
- 3e237f2 AARCH32 4x8 for Cortex A75 by Frank Barchard · 4 years, 6 months ago
- f917cbd AARCH32 4x8 LD64 stores simplified by Frank Barchard · 4 years, 6 months ago
- 6383f49 Assembly GEMM kernel NC loop use SUBS instead of CMP+SUBS by Frank Barchard · 4 years, 6 months ago
- 441e221 Scalar 3x3s2c3 HWC dconv micro-kernel with 0+1 width padding by Marat Dukhan · 4 years, 6 months ago
- 6b7dfae Refactor scalar 3x3s2c3 HWC->HWC2CHW dconv, add 3x3s2c3 HWC dconv by Marat Dukhan · 4 years, 6 months ago
- 436ebe6 Separate WAsm micro-kernels and scalar micro-kernels by Marat Dukhan · 4 years, 6 months ago
- 05f3f6d Subtract ND operator by Marat Dukhan · 4 years, 6 months ago
- c4f0ff9 Support built-in transposition of static weights in Fully Connected operator by Marat Dukhan · 4 years, 6 months ago
- fc2b96e Support up to 6 dimensions in ND operators with broadcasting by Marat Dukhan · 4 years, 6 months ago
- bfd02cd Fix assert in AVX/AVX512 Clamp micro-kernels by Marat Dukhan · 4 years, 6 months ago
- b1a0fc3 Add ND operator with broadcasting by Marat Dukhan · 4 years, 6 months ago
- 61cad89 AARCH32 4x8 GEMM kernel fully register based. by Frank Barchard · 4 years, 6 months ago
- 3267092 Enable AARCH32 4x8 GEMM kernel by Frank Barchard · 4 years, 6 months ago
- 72d6afb AARCH32 4x8 kernel code clean up. by Frank Barchard · 4 years, 6 months ago
- 8b0f026 AARCH32 4x8 NEON GEMM Assembly version of 4x8 for 32 bit ARM. Based on LD64. by Frank Barchard · 4 years, 6 months ago
- e2c3f29 F32 CLAMP micro-kernels in AVX and AVX512F implementations by Marat Dukhan · 4 years, 6 months ago
- 479f87e AVX512F implementation of DWCONV micro-kernels by Marat Dukhan · 4 years, 6 months ago
- 91f8d86 Accuracy evaluation stubs for LUT-based Sigmoid implementations by Marat Dukhan · 4 years, 6 months ago