- 2bd2bd2 X8 & X16 Copy NC operators by Marat Dukhan · 2 years, 8 months ago
- 5756a92 F16 Max Pooling NHWC operator by Marat Dukhan · 2 years, 8 months ago
- af1671a Support FP32 weights in F16 PReLU operator by Marat Dukhan · 2 years, 8 months ago
- 0a756b5 F16 PReLU operator by Marat Dukhan · 2 years, 8 months ago
- 6b45a7f 16-bit Constant Pad ND operator by Marat Dukhan · 2 years, 8 months ago
- 94def8a Fix bug in Convert operator on large tensors with multi-threading by Marat Dukhan · 2 years, 8 months ago
- 3deae1d Guard JIT-related structs and functionality behind XNN_PLATFORM_JIT by Zhi An Ng · 2 years, 8 months ago
- f9fc9ec Integrate JIT generated GEMM microkernels into create_convolution2d_nhwc by Zhi An Ng · 2 years, 8 months ago
- fbd67a7 Pad K to a multiple of SR in GEMM/IGEMM microkernels by Marat Dukhan · 2 years, 8 months ago
- 20151d9 Fix excessive memory allocation for packed weights in Deconvolution by Marat Dukhan · 2 years, 8 months ago
- 8b758bf Integrate JIT generated GEMM microkernels into create_convolution2d_nhwc by XNNPACK Team · 2 years, 8 months ago
- 64cb10f Guard JIT-related structs and functionality behind XNN_PLATFORM_JIT by XNNPACK Team · 2 years, 8 months ago
- c9a2e74 Guard JIT-related structs and functionality behind XNN_PLATFORM_JIT by Zhi An Ng · 2 years, 8 months ago
- df51e11 Integrate JIT generated GEMM microkernels into create_convolution2d_nhwc by Zhi An Ng · 2 years, 8 months ago
- 1d6b7c9 Support FP32 weights in FP16 NC Fully Connected operator by Marat Dukhan · 2 years, 8 months ago
- 6989ec4 Support FP32 weights in FP16 NHWC Convolution operator by Marat Dukhan · 2 years, 8 months ago
- 645af97 FMA3 implementation of F16 DWCONV/VCLAMP/VMULCADDC microkernels by Marat Dukhan · 2 years, 9 months ago
- 8459822 Split F32 SCALEMINMAX parameter initialization functions by ISA by Marat Dukhan · 2 years, 9 months ago
- da382d1 Refactor parameter initialization for AVGPOOL/GAVGPOOL/PAVGPOOL microkernels by Marat Dukhan · 2 years, 9 months ago
- 5d456ce Refactor naming of QS8/QU8 AVGPOOL parameters by Marat Dukhan · 2 years, 9 months ago
- c4302c2 AVX2 implementations of F16 GEMM/IGEMM microkernels by Marat Dukhan · 2 years, 9 months ago
- 14dd8d0 Convert F16 parameter structures to unions by Marat Dukhan · 2 years, 9 months ago
- 4a5c771 Refactor F32 RADDSTOREEXPMINUSMAX microkernels by Marat Dukhan · 2 years, 9 months ago
- 0e80137 Refactor parameters in F32 VRND microkernels by Marat Dukhan · 2 years, 9 months ago
- ce834ad Refactor parameters in F32 VSIGMOID microkernels by Marat Dukhan · 2 years, 9 months ago
- 4a79ff2 Refactor parameters in F32 VELU microkernels by Marat Dukhan · 2 years, 9 months ago
- e5efb16 Refactor VUNARY microkernel parameters by Marat Dukhan · 2 years, 9 months ago
- e72b282 Refactor parameters in F32 VSQRT microkernels by Marat Dukhan · 2 years, 9 months ago
- 98c5215 Move mask_table into VBINARY[C] AVX microkernel parameters by Marat Dukhan · 2 years, 9 months ago
- f600497 Refactor parameter initialization in Vector Binary Elementwise microkernels by Marat Dukhan · 2 years, 9 months ago
- 2894e99 Refactor F32 VLRELU microkernels by Marat Dukhan · 2 years, 9 months ago
- b7c1b71 Refactor F32->F16 VCVT microkernels by Marat Dukhan · 2 years, 9 months ago
- 134f984 Refactor F16->F32 VCVT microkernels by Marat Dukhan · 2 years, 9 months ago
- 561d068 Refactor parameter initialization for VHSWISH microkernels by Marat Dukhan · 2 years, 9 months ago
- 0fd983b Adds -Wcast-qual flag to detect cast dropping const. by Alan Kelly · 2 years, 9 months ago
- f92206b QS8->F32 and QU8->F32 Convert NC operators by Marat Dukhan · 2 years, 10 months ago
- 4bdc9f5 Refactor VCVT microkernels by Marat Dukhan · 2 years, 10 months ago
- 57256c5 Optimize single-threaded execution of vector unary elementwise operators by Marat Dukhan · 2 years, 10 months ago
- 9855537 Support requantization scale up to 256 by Marat Dukhan · 2 years, 10 months ago
- ed2d776 F32->QS8 and F32->QU8 Convert NC operators by Marat Dukhan · 2 years, 10 months ago
- 03f1297 F32->QS8 and F32->QU8 Convert NC operators by XNNPACK Team · 2 years, 10 months ago
- 7d2d85c F32->QS8 and F32->QU8 Convert NC operators by Marat Dukhan · 2 years, 10 months ago
- 0ab7553 S8 & U8 Resize Bilinear NHWC operators by Marat Dukhan · 2 years, 10 months ago
- a0c6168 F32->F16 Convert operator by Marat Dukhan · 2 years, 11 months ago
- 758b979 Expose XNNPACK transpose convolution implementation as TRANSPOSE_CONV builtin op by Yury Kartynnik · 2 years, 11 months ago
- 0214d86 Expose XNNPACK transpose convolution implementation as TRANSPOSE_CONV builtin op by XNNPACK Team · 2 years, 11 months ago
- 1f31f99 Expose XNNPACK transpose convolution implementation as TRANSPOSE_CONV builtin op by Yury Kartynnik · 2 years, 11 months ago
- ddb3d16 F16 Fully Connected operator by Marat Dukhan · 2 years, 11 months ago
- af2ba00 F16->F32 Convert operator by Marat Dukhan · 3 years ago
- eec0052 QS8 ELU operator by Marat Dukhan · 3 years ago
- 5de7bc0 QS8/QU8 Tanh operator using LUT microkernels by Marat Dukhan · 3 years, 1 month ago
- 71a9bb1 QS8 Sigmoid operator by Marat Dukhan · 3 years, 1 month ago
- f6c991e Implement generic LUT-based elementwise operator by Marat Dukhan · 3 years, 1 month ago
- 8e2fd20 QS8 and QU8 Subtract ND operators by Marat Dukhan · 3 years, 1 month ago
- 6428725 Rename ADD quantization parameters to ADDSUB by Marat Dukhan · 3 years, 1 month ago
- 61c0c9e Clamp NC operator for S8 data type by Marat Dukhan · 3 years, 1 month ago
- 9491279 Refactor parameter initialization for VCLAMP microkernels by Marat Dukhan · 3 years, 1 month ago
- dc5c148 S8 Max Pooling operator by Marat Dukhan · 3 years, 1 month ago
- f158942 WAsm SIMD implementation of U8 MAXPOOL microkernel by Marat Dukhan · 3 years, 1 month ago
- 139e961 X8 version of Constand Pad ND operator by Marat Dukhan · 3 years, 2 months ago
- 0461f2d Generalize PAD microkernels to all 8-/16-/32-bit data types by Marat Dukhan · 3 years, 2 months ago
- 933051b Generalize FILL microkernels to all 8-/16-/32-bit data types by Marat Dukhan · 3 years, 2 months ago
- 8a211a3 Check parameter initialization functions for non-NULL before calling by Marat Dukhan · 3 years, 2 months ago
- 0853b8a QS8/QU8 Multiply ND operators by Marat Dukhan · 3 years, 2 months ago
- bea849a QS8 Deconvolution operator by Marat Dukhan · 3 years, 2 months ago
- 28407b2 Support zeroes in shape dimensions in binary elementwise operators by Marat Dukhan · 3 years, 2 months ago
- db007cd QU8 Add ND operator by Marat Dukhan · 3 years, 2 months ago
- 6691324 Split initialization function for QS8 VADD parameters by Marat Dukhan · 3 years, 2 months ago
- 288ecd4 Use function pointer to initialize microkernel parameters in QS8 Addition operator by Marat Dukhan · 3 years, 2 months ago
- d4c478b Restrict input-to-output scale ratio in quantized addition by Marat Dukhan · 3 years, 2 months ago
- 6e0fc39 Relax initialization of Quantized Addition microkernel parameters by Marat Dukhan · 3 years, 2 months ago
- 898d585 Initialize QC8 microkernels on ARM/ARM64/WAsm/WAsm SIMD by Marat Dukhan · 3 years, 3 months ago
- 9726246 QC8 NHWC Convolution operator by Marat Dukhan · 3 years, 3 months ago
- 942359e Add XNN_FLAG_YIELD_WORKERS flag to avoid busy-wait at op-level by Marat Dukhan · 3 years, 4 months ago
- 8228689 Support QC8 DWCONV microkernels by Marat Dukhan · 3 years, 4 months ago
- e06c813 Support QC8 IGEMM microkernels by Marat Dukhan · 3 years, 4 months ago
- 0b04374 Support QC8 GEMM microkernels by Marat Dukhan · 3 years, 4 months ago
- e3d17bf Rename microkernel-related types and structures by Marat Dukhan · 3 years, 4 months ago
- c58453f Initialize VMULCADDC microkernel parameters through function pointers by Marat Dukhan · 3 years, 4 months ago
- 104ae5e Use ISA-specific layouts in F32 [I]GEMM & DWCONV microkernels by Marat Dukhan · 3 years, 4 months ago
- c5a7a39 Initialize GEMM/IGEMM/DWCONV microkernel parameters through function pointers by Marat Dukhan · 3 years, 4 months ago
- f56f4c4 Refactor interface of microkernel parameter initialization by Marat Dukhan · 3 years, 4 months ago
- d23cb6e Fully Connected operator for QS8 datatype by Marat Dukhan · 3 years, 6 months ago
- 77e93a2 Fix mismatch in block layout in mixed-layout Depth-To-Space operator by Marat Dukhan · 3 years, 7 months ago
- 55d53a4 Fix bug in NHWC Convolution with depthwise kernels by Marat Dukhan · 3 years, 7 months ago
- cfbed0a Disable sparse graph rewriting on x86 with AVX+ by Marat Dukhan · 3 years, 10 months ago
- 6f7d4a2 Remove unused input_width_tile from dwconv2d_chw_parameters by Marat Dukhan · 3 years, 10 months ago
- 892310c Simplify parallelization in elementwise binary and Padding operators by Marat Dukhan · 3 years, 10 months ago
- b6bd4bc Implement ELU operator by Marat Dukhan · 3 years, 10 months ago
- 0e52117 NHWC version of Depth-To-Space operator by Marat Dukhan · 3 years, 10 months ago
- 188d104 Refactor Depth To Space NCHW2NHWC operator test by Marat Dukhan · 3 years, 10 months ago
- 9cbaa63 Unify parameters of DepthToSpace NCHW->NHWC operator with other operators by Marat Dukhan · 3 years, 10 months ago
- 048931b Extract memcpy wrapper used by Copy operator into a microkernel by Marat Dukhan · 3 years, 10 months ago
- ad71b9a Refactor naming of DEPTHTOSPACE microkernels by Marat Dukhan · 3 years, 10 months ago
- bef9a4d Do not set ukernel type in operators with a single type of kernel by Marat Dukhan · 3 years, 10 months ago
- e8bfcc8 Add output_stride argument in SpMM microkernels by Marat Dukhan · 3 years, 10 months ago
- e278a55 Pre-scale batch_size by element size in SpMM microkernels by Marat Dukhan · 3 years, 10 months ago
- bb781b6 Refactor Depth-To-Space operator by Marat Dukhan · 3 years, 11 months ago
- b4ac61d Make DepthToSpace X32 operator consistent with other X32 operators by Marat Dukhan · 3 years, 11 months ago
- 13b68f2 Rename CHW2HWC to NCHW2NCHW in DepthToSpace operator by Marat Dukhan · 3 years, 11 months ago