Merge pull request #1433 from sivadur/integration
xilinx: fix zynqmp build when tsp is enabled
diff --git a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
index b144c84..c361270 100644
--- a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
+++ b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
@@ -205,12 +205,21 @@
{
uint32_t id, ver, chipid[2];
size_t i, j, len;
- enum pm_ret_status ret;
const char *name = "EG/EV";
- ret = pm_get_chipid(chipid);
- if (ret)
+#ifdef IMAGE_BL32
+ /*
+ * For BL32, get the chip id info directly by reading corresponding
+ * registers instead of making pm call. This has limitation
+ * that these registers should be configured to have access
+ * from APU which is default case.
+ */
+ chipid[0] = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_IDCODE_OFFSET);
+ chipid[1] = mmio_read_32(EFUSE_BASEADDR + EFUSE_IPDISABLE_OFFSET);
+#else
+ if (pm_get_chipid(chipid) != PM_RET_SUCCESS)
return "UNKN";
+#endif
id = chipid[0] & (ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK |
ZYNQMP_CSU_IDCODE_SVD_MASK);
diff --git a/plat/xilinx/zynqmp/include/platform_def.h b/plat/xilinx/zynqmp/include/platform_def.h
index ebbc8c2..49766cc 100644
--- a/plat/xilinx/zynqmp/include/platform_def.h
+++ b/plat/xilinx/zynqmp/include/platform_def.h
@@ -34,7 +34,7 @@
* little space for growth.
*/
#ifndef ZYNQMP_ATF_MEM_BASE
-#if !DEBUG
+#if !DEBUG && defined(SPD_none)
# define BL31_BASE 0xfffea000
# define BL31_LIMIT 0xffffffff
#else