commit 03363af88871f9d6298a6e8cff40dc0714e782e2
author Marcin Wojtas <mw@semihalf.com> Tue Jun 02 15:12:06 2020 +0200
committer Marcin Wojtas <mw@semihalf.com> Wed Jun 03 12:22:31 2020 +0200
tree 87d61cbcc370b387bac9eb686a55cf64b32851ab
parent ec29ce67cfedc58e3679c6a05c46e54ce2910e19

marvell: a8k: enable BL31 cache by default

BL31_CACHE_DISABLE flag was introduced as a work-around
for the older SoC revisions. Since it is not relevant in the
newest versions, toggle it to be disabled by default.
One can still specify it by adding 'BL31_CACHE_DISABLE=1'
string to the build command.

Change-Id: I11b52dade3ff7f8ee643b8078c6e447c45946570
Signed-off-by: Marcin Wojtas <mw@semihalf.com>

plat/marvell/a8k/common/a8k_common.mk

diff --git a/plat/marvell/a8k/common/a8k_common.mk b/plat/marvell/a8k/common/a8k_common.mk
index bf79ebe..1ff28f8 100644
--- a/plat/marvell/a8k/common/a8k_common.mk
+++ b/plat/marvell/a8k/common/a8k_common.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (C) 2016 - 2018 Marvell International Ltd.
+# Copyright (C) 2016 - 2020 Marvell International Ltd.
 #
 # SPDX-License-Identifier:     BSD-3-Clause
 # https://spdx.org/licenses
@@ -22,7 +22,7 @@
 MSS_SUPPORT		:= 1
 
 # Disable EL3 cache for power management
-BL31_CACHE_DISABLE	:= 1
+BL31_CACHE_DISABLE	:= 0
 $(eval $(call add_define,BL31_CACHE_DISABLE))
 
 $(eval $(call add_define,PCI_EP_SUPPORT))