Merge pull request #259 from soby-mathew/sm/plat_max_afflvl
Export maximum affinity using PLATFORM_MAX_AFFLVL macro
diff --git a/plat/fvp/aarch64/fvp_common.c b/plat/fvp/aarch64/fvp_common.c
index 55c2cbb..fcda2a8 100644
--- a/plat/fvp/aarch64/fvp_common.c
+++ b/plat/fvp/aarch64/fvp_common.c
@@ -115,6 +115,9 @@
};
#endif
+CASSERT((sizeof(fvp_mmap)/sizeof(fvp_mmap[0])) + FVP_BL_REGIONS \
+ <= MAX_MMAP_REGIONS, assert_max_mmap_regions);
+
/* Array of secure interrupts to be configured by the gic driver */
const unsigned int irq_sec_array[] = {
IRQ_TZ_WDOG,
diff --git a/plat/fvp/fvp_def.h b/plat/fvp/fvp_def.h
index d1d9adb..e3442fc 100644
--- a/plat/fvp/fvp_def.h
+++ b/plat/fvp/fvp_def.h
@@ -150,6 +150,33 @@
#define FUNC_SHUTDOWN 0x08
#define FUNC_REBOOT 0x09
+/*
+ * The number of regions like RO(code), coherent and data required by
+ * different BL stages which need to be mapped in the MMU.
+ */
+#if USE_COHERENT_MEM
+#define FVP_BL_REGIONS 3
+#else
+#define FVP_BL_REGIONS 2
+#endif
+
+/*
+ * The FVP_MAX_MMAP_REGIONS depend on the number of entries in fvp_mmap[]
+ * defined for each BL stage in fvp_common.c.
+ */
+#if IMAGE_BL1
+#define FVP_MMAP_ENTRIES 5
+#endif
+#if IMAGE_BL2
+#define FVP_MMAP_ENTRIES 7
+#endif
+#if IMAGE_BL31
+#define FVP_MMAP_ENTRIES 4
+#endif
+#if IMAGE_BL32
+#define FVP_MMAP_ENTRIES 3
+#endif
+
/* Load address of BL33 in the FVP port */
#define NS_IMAGE_OFFSET (DRAM1_BASE + 0x8000000) /* DRAM + 128MB */
diff --git a/plat/fvp/include/platform_def.h b/plat/fvp/include/platform_def.h
index fcecc56..6713c5c 100644
--- a/plat/fvp/include/platform_def.h
+++ b/plat/fvp/include/platform_def.h
@@ -209,7 +209,7 @@
# endif
#endif
-#define MAX_MMAP_REGIONS 16
+#define MAX_MMAP_REGIONS (FVP_MMAP_ENTRIES + FVP_BL_REGIONS)
/*******************************************************************************
* Declarations and constants to access the mailboxes safely. Each mailbox is
diff --git a/plat/juno/aarch64/juno_common.c b/plat/juno/aarch64/juno_common.c
index 7ad40d0..6ea0b15 100644
--- a/plat/juno/aarch64/juno_common.c
+++ b/plat/juno/aarch64/juno_common.c
@@ -114,6 +114,9 @@
};
#endif
+CASSERT((sizeof(juno_mmap)/sizeof(juno_mmap[0])) + JUNO_BL_REGIONS \
+ <= MAX_MMAP_REGIONS, assert_max_mmap_regions);
+
/* Array of secure interrupts to be configured by the gic driver */
const unsigned int irq_sec_array[] = {
IRQ_MHU,
diff --git a/plat/juno/include/platform_def.h b/plat/juno/include/platform_def.h
index f7d79cc..9eb3053 100644
--- a/plat/juno/include/platform_def.h
+++ b/plat/juno/include/platform_def.h
@@ -184,7 +184,7 @@
# define MAX_XLAT_TABLES 3
#endif
-#define MAX_MMAP_REGIONS 16
+#define MAX_MMAP_REGIONS (JUNO_MMAP_ENTRIES + JUNO_BL_REGIONS)
/*******************************************************************************
* ID of the secure physical generic timer interrupt used by the TSP
diff --git a/plat/juno/juno_def.h b/plat/juno/juno_def.h
index 8a85aec..62bdda3 100644
--- a/plat/juno/juno_def.h
+++ b/plat/juno/juno_def.h
@@ -140,6 +140,33 @@
#define SYS_LED_EL_SHIFT 0x1
#define SYS_LED_EC_SHIFT 0x3
+/*
+ * The number of regions like RO(code), coherent and data required by
+ * different BL stages which need to be mapped in the MMU.
+ */
+#if USE_COHERENT_MEM
+#define JUNO_BL_REGIONS 3
+#else
+#define JUNO_BL_REGIONS 2
+#endif
+
+/*
+ * The JUNO_MAX_MMAP_REGIONS depend on the number of entries in juno_mmap[]
+ * defined for each BL stage in juno_common.c.
+ */
+#if IMAGE_BL1
+#define JUNO_MMAP_ENTRIES 6
+#endif
+#if IMAGE_BL2
+#define JUNO_MMAP_ENTRIES 8
+#endif
+#if IMAGE_BL31
+#define JUNO_MMAP_ENTRIES 5
+#endif
+#if IMAGE_BL32
+#define JUNO_MMAP_ENTRIES 4
+#endif
+
/*******************************************************************************
* GIC-400 & interrupt handling related constants
******************************************************************************/
@@ -244,4 +271,10 @@
#define PRIMARY_CPU_SHIFT 8
#define PRIMARY_CPU_MASK 0xf
+/*******************************************************************************
+ * MMU-401 related constants
+ ******************************************************************************/
+#define MMU401_SSD_OFFSET 0x4000
+#define MMU401_DMA330_BASE 0x7fb00000
+
#endif /* __JUNO_DEF_H__ */
diff --git a/plat/juno/plat_security.c b/plat/juno/plat_security.c
index 64e493f..254357d 100644
--- a/plat/juno/plat_security.c
+++ b/plat/juno/plat_security.c
@@ -29,6 +29,7 @@
*/
#include <debug.h>
+#include <mmio.h>
#include <tzc400.h>
#include "juno_def.h"
@@ -94,6 +95,19 @@
}
/*******************************************************************************
+ * Set up the MMU-401 SSD tables. The power-on configuration has all stream IDs
+ * assigned to Non-Secure except some for the DMA-330. Assign those back to the
+ * Non-Secure world as well, otherwise EL1 may end up erroneously generating
+ * (untranslated) Secure transactions if it turns the SMMU on.
+ ******************************************************************************/
+static void init_mmu401(void)
+{
+ uint32_t reg = mmio_read_32(MMU401_DMA330_BASE + MMU401_SSD_OFFSET);
+ reg |= 0x1FF;
+ mmio_write_32(MMU401_DMA330_BASE + MMU401_SSD_OFFSET, reg);
+}
+
+/*******************************************************************************
* Initialize the secure environment. At this moment only the TrustZone
* Controller is initialized.
******************************************************************************/
@@ -101,4 +115,6 @@
{
/* Initialize the TrustZone Controller */
init_tzc400();
+ /* Initialize the SMMU SSD tables*/
+ init_mmu401();
}