xlat lib v2: Remove hard-coded virtual address space size
Previous patches have made it possible to specify the physical and
virtual address spaces sizes for each translation context. However,
there are still some places in the code where the physical (resp.
virtual) address space size is assumed to be PLAT_PHY_ADDR_SPACE_SIZE
(resp. PLAT_VIRT_ADDR_SPACE_SIZE).
This patch removes them and reads the relevant address space size
from the translation context itself instead. This information is now
passed in argument to the enable_mmu_arch() function, which needs it
to configure the TCR_ELx.T0SZ field (in AArch64) or the TTBCR.T0SZ
field (in AArch32) appropriately.
Change-Id: I20b0e68b03a143e998695d42911d9954328a06aa
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
diff --git a/lib/xlat_tables_v2/xlat_tables_internal.c b/lib/xlat_tables_v2/xlat_tables_internal.c
index cdf1669..5efc834 100644
--- a/lib/xlat_tables_v2/xlat_tables_internal.c
+++ b/lib/xlat_tables_v2/xlat_tables_internal.c
@@ -1178,8 +1178,7 @@
mm++;
}
- assert((PLAT_PHY_ADDR_SPACE_SIZE - 1) <=
- xlat_arch_get_max_supported_pa());
+ assert(ctx->pa_max_address <= xlat_arch_get_max_supported_pa());
assert(ctx->max_va <= ctx->va_max_address);
assert(ctx->max_pa <= ctx->pa_max_address);
@@ -1205,7 +1204,7 @@
* space size might be mapped.
*/
#ifdef PLAT_XLAT_TABLES_DYNAMIC
-#define MAX_PHYS_ADDR PLAT_PHY_ADDR_SPACE_SIZE
+#define MAX_PHYS_ADDR tf_xlat_ctx.pa_max_address
#else
#define MAX_PHYS_ADDR tf_xlat_ctx.max_pa
#endif
@@ -1214,19 +1213,22 @@
void enable_mmu_secure(unsigned int flags)
{
- enable_mmu_arch(flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR);
+ enable_mmu_arch(flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR,
+ tf_xlat_ctx.va_max_address);
}
#else
void enable_mmu_el1(unsigned int flags)
{
- enable_mmu_arch(flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR);
+ enable_mmu_arch(flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR,
+ tf_xlat_ctx.va_max_address);
}
void enable_mmu_el3(unsigned int flags)
{
- enable_mmu_arch(flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR);
+ enable_mmu_arch(flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR,
+ tf_xlat_ctx.va_max_address);
}
#endif /* AARCH32 */