commit | 39a8fa70f0d9a1d7093020fcd00e565e99a2306f | [log] [tgz] |
---|---|---|
author | Andrew F. Davis <afd@ti.com> | Thu Jul 26 14:00:32 2018 -0500 |
committer | Andrew F. Davis <afd@ti.com> | Thu Jul 26 14:14:06 2018 -0500 |
tree | 03dcaa1e2dc937671f37d407428beb50ae193f94 | |
parent | 60e062fb0e33f7d9825267cbfb397d7c7aca1169 [diff] |
PSCI: Fix logic error to skip cache flushing If either USE_COHERENT_MEM or HW_ASSISTED_COHERENCY being true should cause us to not enter the ifdef block, then the logic is not correct here. Posibly bad use of De Morgan's law? Fix this. Signed-off-by: Andrew F. Davis <afd@ti.com>