| commit | 47d6f5ff16d1f2ad009d630a381054b10fa0a06f | [log] [tgz] |
|---|---|---|
| author | Varun Wadekar <vwadekar@nvidia.com> | Tue Jul 27 02:32:29 2021 -0700 |
| committer | Varun Wadekar <vwadekar@nvidia.com> | Thu Aug 19 02:15:09 2021 -0700 |
| tree | 34b7cd6fcba1faf7edfd796ab3c4f18ec7a783b3 | |
| parent | 0ed87212a9c1d21c7fb116bb606c64381d6b897b [diff] |
feat(cpus): workaround for Cortex A78 AE erratum 1941500 Cortex A78 AE erratum 1941500 is a Cat B erratum that applies to revisions <= r0p1. It is still open. This erratum is avoided by by setting CPUECTLR_EL1[8] to 1. There is a small performance cost (<0.5%) for setting this bit. SDEN is available at https://developer.arm.com/documentation/SDEN1707912/0900 Change-Id: I2d72666468b146714a0340ba114ccf0f5165b39c Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>