diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h
index c236970..452c385 100644
--- a/include/plat/arm/common/arm_def.h
+++ b/include/plat/arm/common/arm_def.h
@@ -44,7 +44,8 @@
 /* Special value used to verify platform parameters from BL2 to BL3-1 */
 #define ARM_BL31_PLAT_PARAM_VAL		0x0f1e2d3c4b5a6978ULL
 
-#define ARM_CLUSTER_COUNT		2ull
+#define ARM_CLUSTER_COUNT		2
+#define ARM_SYSTEM_COUNT		1
 
 #define ARM_CACHE_WRITEBACK_SHIFT	6
 
@@ -54,6 +55,7 @@
  */
 #define ARM_PWR_LVL0		MPIDR_AFFLVL0
 #define ARM_PWR_LVL1		MPIDR_AFFLVL1
+#define ARM_PWR_LVL2		MPIDR_AFFLVL2
 
 /*
  *  Macros for local power states in ARM platforms encoded by State-ID field
@@ -179,10 +181,6 @@
 
 #define ADDR_SPACE_SIZE			(1ull << 32)
 
-#define PLAT_NUM_PWR_DOMAINS		(ARM_CLUSTER_COUNT + \
-					 PLATFORM_CORE_COUNT)
-#define PLAT_MAX_PWR_LVL		ARM_PWR_LVL1
-
 /*
  * This macro defines the deepest retention state possible. A higher state
  * id will represent an invalid or a power down state.
diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h
index ad41f4f..3c8a811 100644
--- a/include/plat/arm/common/plat_arm.h
+++ b/include/plat/arm/common/plat_arm.h
@@ -123,6 +123,11 @@
 		(((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
 		arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
 
+/* Make composite power state parameter till power level 2 */
+#define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \
+		(((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \
+		arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
+
 #endif /* __ARM_RECOM_STATE_ID_ENC__ */
 
 
diff --git a/plat/arm/board/fvp/include/platform_def.h b/plat/arm/board/fvp/include/platform_def.h
index 840676c..9ada6b2 100644
--- a/plat/arm/board/fvp/include/platform_def.h
+++ b/plat/arm/board/fvp/include/platform_def.h
@@ -38,9 +38,13 @@
 #include <v2m_def.h>
 #include "../fvp_def.h"
 
+/* Required platform porting definitions */
+#define PLAT_NUM_PWR_DOMAINS		(ARM_CLUSTER_COUNT + \
+					PLATFORM_CORE_COUNT)
+#define PLAT_MAX_PWR_LVL		ARM_PWR_LVL1
 
 /*
- * Most platform porting definitions provided by included headers
+ * Other platform porting definitions are provided by included headers
  */
 
 /*
diff --git a/plat/arm/board/juno/include/platform_def.h b/plat/arm/board/juno/include/platform_def.h
index ba93254..39283c5 100644
--- a/plat/arm/board/juno/include/platform_def.h
+++ b/plat/arm/board/juno/include/platform_def.h
@@ -41,9 +41,13 @@
 #include <v2m_def.h>
 #include "../juno_def.h"
 
-
+/* Juno supports system power domain */
+#define PLAT_MAX_PWR_LVL		ARM_PWR_LVL2
+#define PLAT_NUM_PWR_DOMAINS		(ARM_SYSTEM_COUNT + \
+					ARM_CLUSTER_COUNT + \
+					PLATFORM_CORE_COUNT)
 /*
- * Most platform porting definitions provided by included headers
+ * Other platform porting definitions are provided by included headers
  */
 
 /*
diff --git a/plat/arm/css/common/css_pm.c b/plat/arm/css/common/css_pm.c
index c0c615b..2d0e901 100644
--- a/plat/arm/css/common/css_pm.c
+++ b/plat/arm/css/common/css_pm.c
@@ -51,18 +51,23 @@
  *  The table must be terminated by a NULL entry.
  */
 const unsigned int arm_pm_idle_states[] = {
-	/* State-id - 0x01 */
-	arm_make_pwrstate_lvl1(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_RET,
-			ARM_PWR_LVL0, PSTATE_TYPE_STANDBY),
-	/* State-id - 0x02 */
-	arm_make_pwrstate_lvl1(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_OFF,
-			ARM_PWR_LVL0, PSTATE_TYPE_POWERDOWN),
-	/* State-id - 0x22 */
-	arm_make_pwrstate_lvl1(ARM_LOCAL_STATE_OFF, ARM_LOCAL_STATE_OFF,
-			ARM_PWR_LVL1, PSTATE_TYPE_POWERDOWN),
+	/* State-id - 0x001 */
+	arm_make_pwrstate_lvl2(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_RUN,
+		ARM_LOCAL_STATE_RET, ARM_PWR_LVL0, PSTATE_TYPE_STANDBY),
+	/* State-id - 0x002 */
+	arm_make_pwrstate_lvl2(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_RUN,
+		ARM_LOCAL_STATE_OFF, ARM_PWR_LVL0, PSTATE_TYPE_POWERDOWN),
+	/* State-id - 0x022 */
+	arm_make_pwrstate_lvl2(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_OFF,
+		ARM_LOCAL_STATE_OFF, ARM_PWR_LVL1, PSTATE_TYPE_POWERDOWN),
+#if PLAT_MAX_PWR_LVL > ARM_PWR_LVL1
+	/* State-id - 0x222 */
+	arm_make_pwrstate_lvl2(ARM_LOCAL_STATE_OFF, ARM_LOCAL_STATE_OFF,
+		ARM_LOCAL_STATE_OFF, ARM_PWR_LVL2, PSTATE_TYPE_POWERDOWN),
+#endif
 	0,
 };
-#endif
+#endif /* __ARM_RECOM_STATE_ID_ENC__ */
 
 /*******************************************************************************
  * Handler called when a power domain is about to be turned on. The
diff --git a/plat/arm/css/common/css_topology.c b/plat/arm/css/common/css_topology.c
index 381e786..03f81e6 100644
--- a/plat/arm/css/common/css_topology.c
+++ b/plat/arm/css/common/css_topology.c
@@ -31,26 +31,28 @@
 #include <plat_arm.h>
 
 /*
- * On ARM platforms, by default the cluster power level is treated as the
+ * On ARM CSS platforms, by default, the system power level is treated as the
  * highest. The first entry in the power domain descriptor specifies the
- * number of cluster power domains i.e. 2.
+ * number of system power domains i.e. 1.
  */
-#define CSS_PWR_DOMAINS_AT_MAX_PWR_LVL	ARM_CLUSTER_COUNT
+#define CSS_PWR_DOMAINS_AT_MAX_PWR_LVL	ARM_SYSTEM_COUNT
 
 /*
- * The CSS power domain tree descriptor. The cluster power domains are
- * arranged so that when the PSCI generic code creates the power domain tree,
- * the indices of the CPU power domain nodes it allocates match the linear
- * indices returned by plat_core_pos_by_mpidr() i.e.
- * CLUSTER1 CPUs are allocated indices from 0 to 3 and the higher indices for
- * CLUSTER0 CPUs.
+ * The CSS power domain tree descriptor for dual cluster CSS platforms.
+ * The cluster power domains are arranged so that when the PSCI generic
+ * code creates the power domain tree, the indices of the CPU power
+ * domain nodes it allocates match the linear indices returned by
+ * plat_core_pos_by_mpidr() i.e. CLUSTER1 CPUs are allocated indices
+ * from 0 to 3 and the higher indices for CLUSTER0 CPUs.
  */
 const unsigned char arm_power_domain_tree_desc[] = {
 	/* No of root nodes */
 	CSS_PWR_DOMAINS_AT_MAX_PWR_LVL,
-	/* No of children for the first node */
+	/* No of children for the root node */
+	ARM_CLUSTER_COUNT,
+	/* No of children for the first cluster node */
 	PLAT_ARM_CLUSTER1_CORE_COUNT,
-	/* No of children for the second node */
+	/* No of children for the second cluster node */
 	PLAT_ARM_CLUSTER0_CORE_COUNT
 };