Add PMF instrumentation points in TF

In order to quantify the overall time spent in the PSCI software
implementation, an initial collection of PMF instrumentation points
has been added.

Instrumentation has been added to the following code paths:

- Entry to PSCI SMC handler.  The timestamp is captured as early
  as possible during the runtime exception and stored in memory
  before entering the PSCI SMC handler.

- Exit from PSCI SMC handler.  The timestamp is captured after
  normal return from the PSCI SMC handler or if a low power state
  was requested it is captured in the bl31 warm boot path before
  return to normal world.

- Entry to low power state.  The timestamp is captured before entry
  to a low power state which implies either standby or power down.
  As these power states are mutually exclusive, only one timestamp
  is defined to describe both.  It is possible to differentiate between
  the two power states using the PSCI STAT interface.

- Exit from low power state.  The timestamp is captured after a standby
  or power up operation has completed.

To calculate the number of cycles spent running code in Trusted Firmware
one can perform the following calculation:

(exit_psci - enter_psci) - (exit_low_pwr - enter_low_pwr).

The resulting number of cycles can be converted to time given the
frequency of the counter.

Change-Id: Ie3b8f3d16409b6703747093b3a2d5c7429ad0166
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
12 files changed
tree: c3cb92eeef9b70c1d8b7a34a95a2396d1dbc4d27
  1. bl1/
  2. bl2/
  3. bl2u/
  4. bl31/
  5. bl32/
  6. common/
  7. docs/
  8. drivers/
  9. fdts/
  10. include/
  11. lib/
  12. make_helpers/
  13. plat/
  14. services/
  15. tools/
  16. .checkpatch.conf
  17. .gitignore
  18. acknowledgements.md
  19. contributing.md
  20. dco.txt
  21. license.md
  22. Makefile
  23. readme.md
readme.md

ARM Trusted Firmware - version 1.2

ARM Trusted Firmware provides a reference implementation of secure world software for ARMv8-A, including a [Secure Monitor] TEE-SMC executing at Exception Level 3 (EL3). It implements various ARM interface standards, such as the Power State Coordination Interface (PSCI), Trusted Board Boot Requirements (TBBR, ARM DEN0006C-1) and SMC Calling Convention. As far as possible the code is designed for reuse or porting to other ARMv8-A model and hardware platforms.

ARM will continue development in collaboration with interested parties to provide a full reference implementation of PSCI, TBBR and Secure Monitor code to the benefit of all developers working with ARMv8-A TrustZone technology.

License

The software is provided under a BSD 3-Clause license. Certain source files are derived from FreeBSD code: the original license is included in these source files.

This Release

This release provides a suitable starting point for productization of secure world boot and runtime firmware. Future versions will contain new features, optimizations and quality improvements.

Users are encouraged to do their own security validation, including penetration testing, on any secure world code derived from ARM Trusted Firmware.

Functionality

  • Initialization of the secure world (for example, exception vectors, control registers, interrupt controller and interrupts for the platform), before transitioning into the normal world at the Exception Level and Register Width specified by the platform.

  • Library support for CPU specific reset and power down sequences. This includes support for errata workarounds.

  • Drivers for both the version 2.0 and version 3.0 ARM Generic Interrupt Controller specifications (GICv2 and GICv3). The latter also enables GICv3 hardware systems that do not contain legacy GICv2 support.

  • Drivers to enable standard initialization of ARM System IP, for example Cache Coherent Interconnect (CCI), Cache Coherent Network (CCN), Network Interconnect (NIC) and TrustZone Controller (TZC).

  • SMC (Secure Monitor Call) handling, conforming to the SMC Calling Convention using an EL3 runtime services framework.

  • SMC handling relating to PSCI for the Secondary CPU Boot, CPU Hotplug, CPU Idle and System Shutdown/Reset/Suspend use-cases.

  • Secure Monitor library code such as world switching, EL1 context management and interrupt routing. This must be integrated with a Secure-EL1 Payload Dispatcher (SPD) component to customize the interaction with a Secure-EL1 Payload (SP), for example a Secure OS.

  • A Test Secure-EL1 Payload and Dispatcher to demonstrate Secure Monitor functionality and Secure-EL1 interaction with PSCI.

  • SPDs for the OP-TEE Secure OS and [NVidia Trusted Little Kernel] NVidia TLK.

  • A Trusted Board Boot implementation, conforming to all mandatory TBBR requirements. This includes image authentication using certificates, a Firmware Update (or recovery mode) boot flow, and packaging of the various firmware images into a Firmware Image Package (FIP) to be loaded from non-volatile storage.

  • Support for alternative boot flows. Some platforms have their own boot firmware and only require the ARM Trusted Firmware Secure Monitor functionality. Other platforms require minimal initialization before booting into an arbitrary EL3 payload.

For a full description of functionality and implementation details, please see the Firmware Design and supporting documentation. The Change Log provides details of changes made since the last release.

Platforms

This release of the Trusted Firmware has been tested on variants r0 and r1 of the [Juno ARM Development Platform] Juno with [Linaro Release 15.10] Linaro Release Notes.

The Trusted Firmware has also been tested on the 64-bit Linux versions of the following ARM FVPs:

  • Foundation_Platform (Version 9.4, Build 9.4.59)
  • FVP_Base_AEMv8A-AEMv8A (Version 7.0, Build 0.8.7004)
  • FVP_Base_Cortex-A57x4-A53x4 (Version 7.0, Build 0.8.7004)
  • FVP_Base_Cortex-A57x1-A53x1 (Version 7.0, Build 0.8.7004)
  • FVP_Base_Cortex-A57x2-A53x4 (Version 7.0, Build 0.8.7004)

The Foundation FVP can be downloaded free of charge. The Base FVPs can be licensed from ARM: see [www.arm.com/fvp] FVP.

This release also contains the following platform support:

  • NVidia T210 and T132 SoCs
  • MediaTek MT8173 SoC

Still to Come

  • Complete implementation of the PSCI v1.0 specification.

  • Support for new CPUs and System IP.

  • More platform support.

  • Optimization and quality improvements.

For a full list of detailed issues in the current code, please see the Change Log and the GitHub issue tracker.

Getting Started

Get the Trusted Firmware source code from GitHub.

See the User Guide for instructions on how to install, build and use the Trusted Firmware with the ARM FVPs.

See the Firmware Design for information on how the ARM Trusted Firmware works.

See the Porting Guide as well for information about how to use this software on another ARMv8-A platform.

See the Contributing Guidelines for information on how to contribute to this project and the Acknowledgments file for a list of contributors to the project.

Feedback and support

ARM welcomes any feedback on the Trusted Firmware. Please send feedback using the GitHub issue tracker.

ARM licensees may contact ARM directly via their partner managers.


Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.