tree 5bd4c5eef67f9fdcffd201dea2efe52bf38bf888
parent 064d3f64180442c2dbde9805b2ef8c72b93ed4e0
parent 532df956306d31ba04235cf05abb88683d3836d0
author Soby Mathew <soby.mathew@arm.com> 1579870807 +0000
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> 1579870807 +0000

Merge changes from topic "tegra-downstream-01202020" into integration

* changes:
  Tegra194: mce: remove unused NVG functions
  Tegra194: support for NVG interface v6.6
  Tegra194: smmu: add PCIE0R1 mc reg to system suspend save list
  Tegra194: enable driver for general purpose DMA engine
  Tegra194: access XUSB_PADCTL registers on Si/FPGA platforms
  Tegra194: organize the memory/mmio map to make it linear
  Tegra194: memctrl: enable mc sid OVERRIDE for PCIE0R1
  Tegra194: support for boot params wider than 32-bits
  Tegra194: memctrl: set reorder depth limit for PCIE blocks
  Tegra194: memctrl: program MC_TXN_OVERRIDE reg for PTCR, MPCORE and MIU
  Tegra194: memctrl: set CGID_TAG_ADR instead of CGID_TAG_DEFAULT
  Tegra194: memctrl: update mss reprogramming as HW PROD settings
  Tegra194: memctrl: Disable PVARDC coalescer
  Tegra194: memctrl: force seswr/rd transactions as passsthru & coherent
  Tegra194: Request CG7 from last core in cluster
  Tegra194: toggle SE clock during context save/restore
  Tegra: bpmp: fix header file paths