AArch32: Fix the stack alignment issue
The AArch32 Procedure call Standard mandates that the stack must be aligned
to 8 byte boundary at external interfaces. This patch does the required
changes.
This problem was detected when a crash was encountered in
`psci_print_power_domain_map()` while printing 64 bit values. Aligning
the stack to 8 byte boundary resolved the problem.
Fixes ARM-Software/tf-issues#437
Change-Id: I517bd8203601bb88e9311bd36d477fb7b3efb292
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
diff --git a/lib/psci/aarch32/psci_helpers.S b/lib/psci/aarch32/psci_helpers.S
index 36d5d7d..373c184 100644
--- a/lib/psci/aarch32/psci_helpers.S
+++ b/lib/psci/aarch32/psci_helpers.S
@@ -93,7 +93,8 @@
* -----------------------------------------------------------------------
*/
func psci_do_pwrup_cache_maintenance
- push {lr}
+ /* r12 is pushed to meet the 8 byte stack alignment requirement */
+ push {r12, lr}
/* ---------------------------------------------
* Ensure any inflight stack writes have made it
@@ -123,7 +124,7 @@
stcopr r0, SCTLR
isb
- pop {pc}
+ pop {r12, pc}
endfunc psci_do_pwrup_cache_maintenance
/* ---------------------------------------------