tree 00b8bcf90a3c7f05c058f743c8d970f0504729b1
parent 79d89e3da078fa0e169a47bcc360c5e3308cdf42
author Andre Przywara <andre.przywara@arm.com> 1598290124 +0100
committer Andre Przywara <andre.przywara@arm.com> 1601382505 +0100

fdt: Add function to adjust GICv3 redistributor size

We now have code to detect the CPU topology at runtime, and can also
populate the CPU nodes in a devicetree accordingly. This is used by the
ARM FPGA port, for instance.
But also a GICv3 compatible interrupt controller provides MMIO frames
per core, so the size of this region needs to be adjusted in the DT,
to match the number of cores as well.

Provide a generic function to find the GICv3 interrupt controller in
the DT, then adjust the "reg" entry to match the number of detected
cores. Since the size of the GICR frame per cores differs between
GICv4 and GICv3, this size is supplied as a parameter to the function.
The caller should determine the applicable value by either hardcoding
it or by observing GICR_TYPER.VLPIS.

Change-Id: Ic2a6445c2c5381a36bf24263f52fcbefad378c05
Signed-off-by: Andre Przywara <andre.przywara@arm.com>