Factor out translation table setup in ARM FVP port
This patch factors out the ARM FVP specific code to create MMU
translation tables so that it is possible for a boot loader stage to
create a different set of tables instead of using the default ones.
The default translation tables are created with the assumption that
the calling boot loader stage executes out of secure SRAM. This might
not be true for the BL3_2 stage in the future.
A boot loader stage can define the `fill_xlation_tables()` function as
per its requirements. It returns a reference to the level 1
translation table which is used by the common platform code to setup
the TTBR_EL3.
This patch is a temporary solution before a larger rework of
translation table creation logic is introduced.
Change-Id: I09a075d5da16822ee32a411a9dbe284718fb4ff6
diff --git a/include/aarch64/arch_helpers.h b/include/aarch64/arch_helpers.h
index 4acf551..fe96b4d 100644
--- a/include/aarch64/arch_helpers.h
+++ b/include/aarch64/arch_helpers.h
@@ -37,6 +37,23 @@
#include <stdio.h>
/*******************************************************************************
+ * Aarch64 translation tables manipulation helper prototypes
+ ******************************************************************************/
+extern unsigned long create_table_desc(unsigned long *next_table_ptr);
+extern unsigned long create_block_desc(unsigned long desc,
+ unsigned long addr,
+ unsigned int level);
+extern unsigned long create_device_block(unsigned long output_addr,
+ unsigned int level,
+ unsigned int ns);
+extern unsigned long create_romem_block(unsigned long output_addr,
+ unsigned int level,
+ unsigned int ns);
+extern unsigned long create_rwmem_block(unsigned long output_addr,
+ unsigned int level,
+ unsigned int ns);
+
+/*******************************************************************************
* TLB maintenance accessor prototypes
******************************************************************************/
extern void tlbialle1(void);