commit | dcbfbcb5de2c0110cf397dae62a4f6cf7ad2a6a2 | [log] [tgz] |
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author | johpow01 <john.powell@arm.com> | Tue Jun 02 15:02:28 2020 -0500 |
committer | johpow01 <john.powell@arm.com> | Mon Jun 22 17:47:54 2020 -0500 |
tree | 4b835f66789ef4c441e8853b27af29f5b46b9961 | |
parent | d7b08e69044611c13f2691011a0dc02383106474 [diff] |
Workaround for Cortex A76 erratum 1800710 Cortex A76 erratum 1800710 is a Cat B erratum, present in older revisions of the Cortex A76 processor core. The workaround is to set a bit in the ECTLR_EL1 system register, which disables allocation of splintered pages in the L2 TLB. This errata is explained in this SDEN: https://static.docs.arm.com/sden885749/g/Arm_Cortex_A76_MP052_Software_Developer_Errata_Notice_v20.pdf Signed-off-by: John Powell <john.powell@arm.com> Change-Id: Ifc34f2e9e053dcee6a108cfb7df7ff7f497c9493