Merge "Add Makalu ELP CPU lib" into integration
diff --git a/include/lib/cpus/aarch64/cortex_makalu_elp.h b/include/lib/cpus/aarch64/cortex_makalu_elp.h
new file mode 100644
index 0000000..4a16996
--- /dev/null
+++ b/include/lib/cpus/aarch64/cortex_makalu_elp.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef CORTEX_MAKALU_ELP_H
+#define CORTEX_MAKALU_ELP_H
+
+#define CORTEX_MAKALU_ELP_MIDR U(0x410FD4E0)
+
+/*******************************************************************************
+ * CPU Extended Control register specific definitions
+ ******************************************************************************/
+#define CORTEX_MAKALU_ELP_CPUECTLR_EL1 S3_0_C15_C1_4
+
+/*******************************************************************************
+ * CPU Power Control register specific definitions
+ ******************************************************************************/
+#define CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1 S3_0_C15_C2_7
+#define CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
+
+#endif /* CORTEX_MAKALU_ELP_H */
diff --git a/lib/cpus/aarch64/cortex_makalu_elp.S b/lib/cpus/aarch64/cortex_makalu_elp.S
new file mode 100644
index 0000000..e3a3e9d
--- /dev/null
+++ b/lib/cpus/aarch64/cortex_makalu_elp.S
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <arch.h>
+#include <asm_macros.S>
+#include <common/bl_common.h>
+#include <cortex_makalu_elp.h>
+#include <cpu_macros.S>
+#include <plat_macros.S>
+
+/* Hardware handled coherency */
+#if HW_ASSISTED_COHERENCY == 0
+#error "Cortex Makalu ELP must be compiled with HW_ASSISTED_COHERENCY enabled"
+#endif
+
+/* 64-bit only core */
+#if CTX_INCLUDE_AARCH32_REGS == 1
+#error "Cortex Makalu ELP supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
+#endif
+
+ /* ----------------------------------------------------
+ * HW will do the cache maintenance while powering down
+ * ----------------------------------------------------
+ */
+func cortex_makalu_elp_core_pwr_dwn
+ /* ---------------------------------------------------
+ * Enable CPU power down bit in power control register
+ * ---------------------------------------------------
+ */
+ mrs x0, CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1
+ orr x0, x0, #CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
+ msr CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1, x0
+ isb
+ ret
+endfunc cortex_makalu_elp_core_pwr_dwn
+
+#if REPORT_ERRATA
+/*
+ * Errata printing function for Cortex Makalu ELP. Must follow AAPCS.
+ */
+func cortex_makalu_elp_errata_report
+ ret
+endfunc cortex_makalu_elp_errata_report
+#endif
+
+func cortex_makalu_elp_reset_func
+ /* Disable speculative loads */
+ msr SSBS, xzr
+ isb
+ ret
+endfunc cortex_makalu_elp_reset_func
+
+ /* ---------------------------------------------
+ * This function provides Cortex Makalu ELP-
+ * specific register information for crash
+ * reporting. It needs to return with x6
+ * pointing to a list of register names in ascii
+ * and x8 - x15 having values of registers to be
+ * reported.
+ * ---------------------------------------------
+ */
+.section .rodata.cortex_makalu_elp_regs, "aS"
+cortex_makalu_elp_regs: /* The ascii list of register names to be reported */
+ .asciz "cpuectlr_el1", ""
+
+func cortex_makalu_elp_cpu_reg_dump
+ adr x6, cortex_makalu_elp_regs
+ mrs x8, CORTEX_MAKALU_ELP_CPUECTLR_EL1
+ ret
+endfunc cortex_makalu_elp_cpu_reg_dump
+
+declare_cpu_ops cortex_makalu_elp, CORTEX_MAKALU_ELP_MIDR, \
+ cortex_makalu_elp_reset_func, \
+ cortex_makalu_elp_core_pwr_dwn
diff --git a/plat/arm/board/arm_fpga/platform.mk b/plat/arm/board/arm_fpga/platform.mk
index 7bc6a40..3a5f74d 100644
--- a/plat/arm/board/arm_fpga/platform.mk
+++ b/plat/arm/board/arm_fpga/platform.mk
@@ -69,7 +69,8 @@
lib/cpus/aarch64/cortex_a65ae.S \
lib/cpus/aarch64/cortex_klein.S \
lib/cpus/aarch64/cortex_matterhorn.S \
- lib/cpus/aarch64/cortex_makalu.S
+ lib/cpus/aarch64/cortex_makalu.S \
+ lib/cpus/aarch64/cortex_makalu_elp.S
# AArch64/AArch32 cores
FPGA_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index 3bcfe91..53145f2 100644
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -131,9 +131,10 @@
lib/cpus/aarch64/neoverse_e1.S \
lib/cpus/aarch64/neoverse_v1.S \
lib/cpus/aarch64/cortex_a78_ae.S \
- lib/cpus/aarch64/cortex_klein.S \
+ lib/cpus/aarch64/cortex_klein.S \
lib/cpus/aarch64/cortex_matterhorn.S \
lib/cpus/aarch64/cortex_makalu.S \
+ lib/cpus/aarch64/cortex_makalu_elp.S \
lib/cpus/aarch64/cortex_a65.S \
lib/cpus/aarch64/cortex_a65ae.S
endif