Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 1 | /* |
Soby Mathew | 0c306cc | 2018-01-10 15:59:31 +0000 | [diff] [blame^] | 2 | * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 3 | * |
dp-arm | 82cb2c1 | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 5 | */ |
| 6 | #ifndef __PLAT_ARM_H__ |
| 7 | #define __PLAT_ARM_H__ |
| 8 | |
Antonio Nino Diaz | 3b211ff | 2017-04-11 14:04:56 +0100 | [diff] [blame] | 9 | #include <arm_xlat_tables.h> |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 10 | #include <bakery_lock.h> |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 11 | #include <cassert.h> |
| 12 | #include <cpu_data.h> |
| 13 | #include <stdint.h> |
Scott Branden | 53d9c9c | 2017-04-10 11:45:52 -0700 | [diff] [blame] | 14 | #include <utils_def.h> |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 15 | |
Sandrine Bailleux | afc931f | 2016-09-15 10:09:53 +0100 | [diff] [blame] | 16 | /******************************************************************************* |
| 17 | * Forward declarations |
| 18 | ******************************************************************************/ |
| 19 | struct bl31_params; |
| 20 | struct meminfo; |
Yatharth Kochar | a8aa7fe | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 21 | struct image_info; |
Sandrine Bailleux | afc931f | 2016-09-15 10:09:53 +0100 | [diff] [blame] | 22 | |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 23 | #define ARM_CASSERT_MMAP \ |
| 24 | CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \ |
| 25 | <= MAX_MMAP_REGIONS, \ |
| 26 | assert_max_mmap_regions); |
| 27 | |
| 28 | /* |
| 29 | * Utility functions common to ARM standard platforms |
| 30 | */ |
Soby Mathew | 4c0d039 | 2016-06-16 14:52:04 +0100 | [diff] [blame] | 31 | void arm_setup_page_tables(uintptr_t total_base, |
| 32 | size_t total_size, |
| 33 | uintptr_t code_start, |
| 34 | uintptr_t code_limit, |
| 35 | uintptr_t rodata_start, |
| 36 | uintptr_t rodata_limit |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 37 | #if USE_COHERENT_MEM |
Soby Mathew | 4c0d039 | 2016-06-16 14:52:04 +0100 | [diff] [blame] | 38 | , uintptr_t coh_start, |
| 39 | uintptr_t coh_limit |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 40 | #endif |
| 41 | ); |
| 42 | |
Soby Mathew | e40e075 | 2017-02-28 22:58:29 +0000 | [diff] [blame] | 43 | #if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32)) |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 44 | /* |
| 45 | * Use this macro to instantiate lock before it is used in below |
| 46 | * arm_lock_xxx() macros |
| 47 | */ |
Jeenu Viswambharan | 1958316 | 2017-08-23 14:12:59 +0100 | [diff] [blame] | 48 | #define ARM_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(arm_lock) |
Soby Mathew | c04a3b6 | 2016-11-14 12:25:45 +0000 | [diff] [blame] | 49 | #define ARM_LOCK_GET_INSTANCE (&arm_lock) |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 50 | /* |
| 51 | * These are wrapper macros to the Coherent Memory Bakery Lock API. |
| 52 | */ |
| 53 | #define arm_lock_init() bakery_lock_init(&arm_lock) |
| 54 | #define arm_lock_get() bakery_lock_get(&arm_lock) |
| 55 | #define arm_lock_release() bakery_lock_release(&arm_lock) |
| 56 | |
| 57 | #else |
| 58 | |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 59 | /* |
Yatharth Kochar | 6f24934 | 2016-11-14 12:00:41 +0000 | [diff] [blame] | 60 | * Empty macros for all other BL stages other than BL31 and BL32 |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 61 | */ |
Jeenu Viswambharan | 1958316 | 2017-08-23 14:12:59 +0100 | [diff] [blame] | 62 | #define ARM_INSTANTIATE_LOCK static int arm_lock __unused |
Soby Mathew | c04a3b6 | 2016-11-14 12:25:45 +0000 | [diff] [blame] | 63 | #define ARM_LOCK_GET_INSTANCE 0 |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 64 | #define arm_lock_init() |
| 65 | #define arm_lock_get() |
| 66 | #define arm_lock_release() |
| 67 | |
Soby Mathew | e40e075 | 2017-02-28 22:58:29 +0000 | [diff] [blame] | 68 | #endif /* defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32)) */ |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 69 | |
Soby Mathew | 2204afd | 2015-04-16 14:49:09 +0100 | [diff] [blame] | 70 | #if ARM_RECOM_STATE_ID_ENC |
| 71 | /* |
| 72 | * Macros used to parse state information from State-ID if it is using the |
| 73 | * recommended encoding for State-ID. |
| 74 | */ |
| 75 | #define ARM_LOCAL_PSTATE_WIDTH 4 |
| 76 | #define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1) |
| 77 | |
| 78 | /* Macros to construct the composite power state */ |
| 79 | |
| 80 | /* Make composite power state parameter till power level 0 */ |
| 81 | #if PSCI_EXTENDED_STATE_ID |
| 82 | |
| 83 | #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ |
| 84 | (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT)) |
| 85 | #else |
| 86 | #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ |
| 87 | (((lvl0_state) << PSTATE_ID_SHIFT) | \ |
| 88 | ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \ |
| 89 | ((type) << PSTATE_TYPE_SHIFT)) |
| 90 | #endif /* __PSCI_EXTENDED_STATE_ID__ */ |
| 91 | |
| 92 | /* Make composite power state parameter till power level 1 */ |
| 93 | #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ |
| 94 | (((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \ |
| 95 | arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type)) |
| 96 | |
Soby Mathew | 5f3a603 | 2015-05-08 10:18:59 +0100 | [diff] [blame] | 97 | /* Make composite power state parameter till power level 2 */ |
| 98 | #define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ |
| 99 | (((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \ |
| 100 | arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type)) |
| 101 | |
Soby Mathew | 2204afd | 2015-04-16 14:49:09 +0100 | [diff] [blame] | 102 | #endif /* __ARM_RECOM_STATE_ID_ENC__ */ |
| 103 | |
Jeenu Viswambharan | b10d449 | 2017-02-16 14:55:15 +0000 | [diff] [blame] | 104 | /* ARM State switch error codes */ |
| 105 | #define STATE_SW_E_PARAM (-2) |
| 106 | #define STATE_SW_E_DENIED (-3) |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 107 | |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 108 | /* IO storage utility functions */ |
| 109 | void arm_io_setup(void); |
| 110 | |
| 111 | /* Security utility functions */ |
Soby Mathew | 57f7820 | 2016-02-26 14:23:19 +0000 | [diff] [blame] | 112 | void arm_tzc400_setup(void); |
Vikram Kanigiri | 618f0fe | 2016-01-29 12:32:58 +0000 | [diff] [blame] | 113 | struct tzc_dmc500_driver_data; |
| 114 | void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 115 | |
Soby Mathew | c1bb8a0 | 2015-10-12 17:32:29 +0100 | [diff] [blame] | 116 | /* Systimer utility function */ |
| 117 | void arm_configure_sys_timer(void); |
| 118 | |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 119 | /* PM utility functions */ |
Soby Mathew | 38dce70 | 2015-07-01 16:16:20 +0100 | [diff] [blame] | 120 | int arm_validate_power_state(unsigned int power_state, |
| 121 | psci_power_state_t *req_state); |
Jeenu Viswambharan | 71e7a4e | 2017-09-19 09:27:18 +0100 | [diff] [blame] | 122 | int arm_validate_psci_entrypoint(uintptr_t entrypoint); |
Soby Mathew | f9e858b | 2015-07-15 13:36:24 +0100 | [diff] [blame] | 123 | int arm_validate_ns_entrypoint(uintptr_t entrypoint); |
Soby Mathew | e35a3fb | 2017-10-11 16:08:58 +0100 | [diff] [blame] | 124 | void arm_system_pwr_domain_save(void); |
Soby Mathew | c1bb8a0 | 2015-10-12 17:32:29 +0100 | [diff] [blame] | 125 | void arm_system_pwr_domain_resume(void); |
Sandrine Bailleux | 4c117f6 | 2015-11-26 16:31:34 +0000 | [diff] [blame] | 126 | void arm_program_trusted_mailbox(uintptr_t address); |
Roberto Vargas | f145403 | 2017-08-03 09:16:43 +0100 | [diff] [blame] | 127 | int arm_psci_read_mem_protect(int *val); |
| 128 | int arm_nor_psci_write_mem_protect(int val); |
| 129 | void arm_nor_psci_do_mem_protect(void); |
| 130 | int arm_psci_mem_protect_chk(uintptr_t base, u_register_t length); |
Soby Mathew | 38dce70 | 2015-07-01 16:16:20 +0100 | [diff] [blame] | 131 | |
| 132 | /* Topology utility function */ |
| 133 | int arm_check_mpidr(u_register_t mpidr); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 134 | |
| 135 | /* BL1 utility functions */ |
| 136 | void arm_bl1_early_platform_setup(void); |
| 137 | void arm_bl1_platform_setup(void); |
| 138 | void arm_bl1_plat_arch_setup(void); |
| 139 | |
| 140 | /* BL2 utility functions */ |
Sandrine Bailleux | afc931f | 2016-09-15 10:09:53 +0100 | [diff] [blame] | 141 | void arm_bl2_early_platform_setup(struct meminfo *mem_layout); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 142 | void arm_bl2_platform_setup(void); |
| 143 | void arm_bl2_plat_arch_setup(void); |
| 144 | uint32_t arm_get_spsr_for_bl32_entry(void); |
| 145 | uint32_t arm_get_spsr_for_bl33_entry(void); |
Yatharth Kochar | 07570d5 | 2016-11-14 12:01:04 +0000 | [diff] [blame] | 146 | int arm_bl2_handle_post_image_load(unsigned int image_id); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 147 | |
Roberto Vargas | 81528db | 2017-11-17 13:22:18 +0000 | [diff] [blame] | 148 | /* BL2 at EL3 functions */ |
| 149 | void arm_bl2_el3_early_platform_setup(void); |
| 150 | void arm_bl2_el3_plat_arch_setup(void); |
| 151 | |
Yatharth Kochar | dcda29f | 2015-10-14 15:28:11 +0100 | [diff] [blame] | 152 | /* BL2U utility functions */ |
| 153 | void arm_bl2u_early_platform_setup(struct meminfo *mem_layout, |
| 154 | void *plat_info); |
| 155 | void arm_bl2u_platform_setup(void); |
| 156 | void arm_bl2u_plat_arch_setup(void); |
| 157 | |
Juan Castillo | d178637 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 158 | /* BL31 utility functions */ |
Yatharth Kochar | a8aa7fe | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 159 | #if LOAD_IMAGE_V2 |
Soby Mathew | 0c306cc | 2018-01-10 15:59:31 +0000 | [diff] [blame^] | 160 | void arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config, |
| 161 | uintptr_t hw_config, void *plat_params_from_bl2); |
Yatharth Kochar | a8aa7fe | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 162 | #else |
Soby Mathew | 0c306cc | 2018-01-10 15:59:31 +0000 | [diff] [blame^] | 163 | void arm_bl31_early_platform_setup(struct bl31_params *from_bl2, uintptr_t soc_fw_config, |
| 164 | uintptr_t hw_config, void *plat_params_from_bl2); |
Yatharth Kochar | a8aa7fe | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 165 | #endif /* LOAD_IMAGE_V2 */ |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 166 | void arm_bl31_platform_setup(void); |
Soby Mathew | 080225d | 2015-12-09 11:38:43 +0000 | [diff] [blame] | 167 | void arm_bl31_plat_runtime_setup(void); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 168 | void arm_bl31_plat_arch_setup(void); |
| 169 | |
| 170 | /* TSP utility functions */ |
| 171 | void arm_tsp_early_platform_setup(void); |
| 172 | |
Soby Mathew | 181bbd4 | 2016-07-11 14:15:27 +0100 | [diff] [blame] | 173 | /* SP_MIN utility functions */ |
Soby Mathew | 0c306cc | 2018-01-10 15:59:31 +0000 | [diff] [blame^] | 174 | void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config, |
| 175 | uintptr_t hw_config, void *plat_params_from_bl2); |
Dimitris Papastamos | 2156830 | 2017-06-07 13:45:41 +0100 | [diff] [blame] | 176 | void arm_sp_min_plat_runtime_setup(void); |
Soby Mathew | 181bbd4 | 2016-07-11 14:15:27 +0100 | [diff] [blame] | 177 | |
Yatharth Kochar | 436223d | 2015-10-11 14:14:55 +0100 | [diff] [blame] | 178 | /* FIP TOC validity check */ |
| 179 | int arm_io_is_toc_valid(void); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 180 | |
| 181 | /* |
| 182 | * Mandatory functions required in ARM standard platforms |
| 183 | */ |
Soby Mathew | 0108047 | 2016-02-01 14:04:34 +0000 | [diff] [blame] | 184 | unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr); |
Achin Gupta | 27573c5 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 185 | void plat_arm_gic_driver_init(void); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 186 | void plat_arm_gic_init(void); |
Achin Gupta | 27573c5 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 187 | void plat_arm_gic_cpuif_enable(void); |
| 188 | void plat_arm_gic_cpuif_disable(void); |
Jeenu Viswambharan | d17b953 | 2016-12-09 11:12:34 +0000 | [diff] [blame] | 189 | void plat_arm_gic_redistif_on(void); |
| 190 | void plat_arm_gic_redistif_off(void); |
Achin Gupta | 27573c5 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 191 | void plat_arm_gic_pcpu_init(void); |
Soby Mathew | e35a3fb | 2017-10-11 16:08:58 +0100 | [diff] [blame] | 192 | void plat_arm_gic_save(void); |
| 193 | void plat_arm_gic_resume(void); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 194 | void plat_arm_security_setup(void); |
| 195 | void plat_arm_pwrc_setup(void); |
Vikram Kanigiri | 6355f23 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 196 | void plat_arm_interconnect_init(void); |
| 197 | void plat_arm_interconnect_enter_coherency(void); |
| 198 | void plat_arm_interconnect_exit_coherency(void); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 199 | |
Summer Qin | d8d6cf2 | 2017-02-28 16:46:17 +0000 | [diff] [blame] | 200 | #if ARM_PLAT_MT |
| 201 | unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr); |
| 202 | #endif |
| 203 | |
Yatharth Kochar | a8aa7fe | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 204 | #if LOAD_IMAGE_V2 |
| 205 | /* |
| 206 | * This function is called after loading SCP_BL2 image and it is used to perform |
| 207 | * any platform-specific actions required to handle the SCP firmware. |
| 208 | */ |
| 209 | int plat_arm_bl2_handle_scp_bl2(struct image_info *scp_bl2_image_info); |
| 210 | #endif |
| 211 | |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 212 | /* |
| 213 | * Optional functions required in ARM standard platforms |
| 214 | */ |
| 215 | void plat_arm_io_setup(void); |
| 216 | int plat_arm_get_alt_image_source( |
Juan Castillo | 16948ae | 2015-04-13 17:36:19 +0100 | [diff] [blame] | 217 | unsigned int image_id, |
| 218 | uintptr_t *dev_handle, |
| 219 | uintptr_t *image_spec); |
Soby Mathew | 38dce70 | 2015-07-01 16:16:20 +0100 | [diff] [blame] | 220 | unsigned int plat_arm_calc_core_pos(u_register_t mpidr); |
Vikram Kanigiri | 65cb1c4 | 2015-11-12 18:52:34 +0000 | [diff] [blame] | 221 | const mmap_region_t *plat_arm_get_mmap(void); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 222 | |
Soby Mathew | 5486a96 | 2016-10-21 17:51:22 +0100 | [diff] [blame] | 223 | /* Allow platform to override psci_pm_ops during runtime */ |
| 224 | const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops); |
| 225 | |
Jeenu Viswambharan | b10d449 | 2017-02-16 14:55:15 +0000 | [diff] [blame] | 226 | /* Execution state switch in ARM platforms */ |
| 227 | int arm_execution_state_switch(unsigned int smc_fid, |
| 228 | uint32_t pc_hi, |
| 229 | uint32_t pc_lo, |
| 230 | uint32_t cookie_hi, |
| 231 | uint32_t cookie_lo, |
| 232 | void *handle); |
| 233 | |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 234 | #endif /* __PLAT_ARM_H__ */ |