Roberto Vargas | 5accce5 | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 1 | # |
John Tsichritzis | ae2e01b | 2019-03-08 16:54:13 +0000 | [diff] [blame] | 2 | # Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. |
Roberto Vargas | 5accce5 | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
| 7 | AS = $(CROSS_COMPILE)as |
| 8 | LD = $(CROSS_COMPILE)ld |
| 9 | OC = $(CROSS_COMPILE)objcopy |
| 10 | CPP = $(CROSS_COMPILE)cpp |
| 11 | BUILD_DIR = ../../$(BUILD_PLAT)/romlib |
| 12 | LIB_DIR = ../../$(BUILD_PLAT)/lib |
| 13 | WRAPPER_DIR = ../../$(BUILD_PLAT)/libwrapper |
| 14 | LIBS = -lmbedtls -lfdt -lc |
| 15 | INC = $(INCLUDES:-I%=-I../../%) |
| 16 | PPFLAGS = $(INC) $(DEFINES) -P -D__ASSEMBLY__ -D__LINKER__ -MD -MP -MT $(BUILD_DIR)/romlib.ld |
| 17 | OBJS = $(BUILD_DIR)/jmptbl.o $(BUILD_DIR)/init.o |
Sathees Balya | 582133a | 2018-11-14 11:59:12 +0000 | [diff] [blame] | 18 | MAPFILE = ../../$(BUILD_PLAT)/romlib/romlib.map |
Roberto Vargas | 5accce5 | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 19 | |
| 20 | V ?= 0 |
| 21 | ifeq ($(V),0) |
| 22 | Q := @ |
| 23 | else |
| 24 | Q := |
| 25 | endif |
| 26 | |
Louis Mayencourt | 2b929c9 | 2019-04-29 16:35:30 +0100 | [diff] [blame] | 27 | LDFLAGS := --gc-sections -O1 |
Roberto Vargas | 5accce5 | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 28 | ifeq ($(DEBUG),1) |
Louis Mayencourt | 2b929c9 | 2019-04-29 16:35:30 +0100 | [diff] [blame] | 29 | LDFLAGS += -Map=$(MAPFILE) |
Roberto Vargas | 5accce5 | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 30 | endif |
| 31 | |
John Tsichritzis | bbb24f6 | 2019-05-21 15:47:37 +0100 | [diff] [blame] | 32 | ifeq (${ARM_ARCH_MINOR},0) |
| 33 | ASFLAGS = -march=armv8-a |
| 34 | else |
| 35 | ASFLAGS = -march=armv8.${ARM_ARCH_MINOR}-a |
| 36 | endif |
Roberto Vargas | 5accce5 | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 37 | |
| 38 | .PHONY: all clean distclean |
| 39 | |
| 40 | all: $(BUILD_DIR)/romlib.bin $(LIB_DIR)/libwrappers.a |
| 41 | |
| 42 | %.o: %.s |
| 43 | @echo " AS $@" |
| 44 | $(Q)$(AS) $(ASFLAGS) -o $@ $< |
| 45 | |
| 46 | $(BUILD_DIR)/%.o: %.s |
| 47 | @echo " AS $@" |
| 48 | $(Q)$(AS) $(ASFLAGS) -o $@ $< |
| 49 | |
| 50 | $(BUILD_DIR)/romlib.ld: romlib.ld.S |
| 51 | @echo " PP $@" |
| 52 | $(Q)$(CPP) $(PPFLAGS) -o $@ romlib.ld.S |
| 53 | |
| 54 | $(BUILD_DIR)/romlib.elf: $(OBJS) $(BUILD_DIR)/romlib.ld |
| 55 | @echo " LD $@" |
| 56 | $(Q)$(LD) -T $(BUILD_DIR)/romlib.ld -L$(LIB_DIR) $(LDFLAGS) -o $@ $(OBJS) $(LIBS) |
| 57 | |
| 58 | $(BUILD_DIR)/romlib.bin: $(BUILD_DIR)/romlib.elf |
| 59 | @echo " BIN $@" |
| 60 | $(Q)$(OC) -O binary $(BUILD_DIR)/romlib.elf $@ |
| 61 | |
| 62 | $(WRAPPER_DIR)/jmpvar.s: $(BUILD_DIR)/romlib.elf |
| 63 | @echo " VAR $@" |
| 64 | $(Q)./genvar.sh -o $@ $(BUILD_DIR)/romlib.elf |
| 65 | |
John Tsichritzis | ae2e01b | 2019-03-08 16:54:13 +0000 | [diff] [blame] | 66 | $(LIB_DIR)/libwrappers.a: $(BUILD_DIR)/jmptbl.i $(WRAPPER_DIR)/jmpvar.o |
Roberto Vargas | 5accce5 | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 67 | @echo " AR $@" |
John Tsichritzis | bbb24f6 | 2019-05-21 15:47:37 +0100 | [diff] [blame] | 68 | $(Q)./genwrappers.sh -b $(WRAPPER_DIR) -o $@ --bti=$(ENABLE_BTI) --asflags=$(ASFLAGS) $(BUILD_DIR)/jmptbl.i |
Roberto Vargas | 5accce5 | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 69 | |
John Tsichritzis | ae2e01b | 2019-03-08 16:54:13 +0000 | [diff] [blame] | 70 | $(BUILD_DIR)/jmptbl.i: $(BUILD_DIR)/jmptbl.s |
| 71 | |
| 72 | $(BUILD_DIR)/jmptbl.s: ../../$(PLAT_DIR)/jmptbl.i |
Roberto Vargas | 5accce5 | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 73 | @echo " TBL $@" |
John Tsichritzis | bbb24f6 | 2019-05-21 15:47:37 +0100 | [diff] [blame] | 74 | $(Q)./gentbl.sh -o $@ -b $(BUILD_DIR) --bti=$(ENABLE_BTI) ../../$(PLAT_DIR)/jmptbl.i |
Roberto Vargas | 5accce5 | 2018-05-22 16:05:42 +0100 | [diff] [blame] | 75 | |
| 76 | clean: |
| 77 | @rm -f $(BUILD_DIR)/* |
| 78 | |
| 79 | -include $(BUILD_DIR)/romlib.d |