Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 1 | /* |
Roberto Vargas | f4953e7 | 2017-07-26 14:15:07 +0100 | [diff] [blame] | 2 | * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 3 | * |
dp-arm | 82cb2c1 | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <errno.h> |
Antonio Nino Diaz | 09d40e0 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 8 | |
| 9 | #include <drivers/cfi/v2m_flash.h> |
| 10 | #include <lib/mmio.h> |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 11 | |
Antonio Nino Diaz | aa7877c | 2018-10-10 11:14:44 +0100 | [diff] [blame] | 12 | /* |
| 13 | * This file supplies a low level interface to the vexpress NOR flash |
| 14 | * memory of juno and fvp. This memory is organized as an interleaved |
| 15 | * memory of two chips with a 16 bit word. It means that every 32 bit |
| 16 | * access is going to access to two different chips. This is very |
| 17 | * important when we send commands or read status of the chips. |
| 18 | */ |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 19 | |
| 20 | /* |
| 21 | * DWS ready poll retries. The number of retries in this driver have been |
| 22 | * obtained empirically from Juno. FVP implements a zero wait state NOR flash |
| 23 | * model |
| 24 | */ |
| 25 | #define DWS_WORD_PROGRAM_RETRIES 1000 |
Roberto Vargas | 784502a | 2017-07-28 10:38:24 +0100 | [diff] [blame] | 26 | #define DWS_WORD_ERASE_RETRIES 3000000 |
Roberto Vargas | 9753cb5 | 2017-07-26 14:37:56 +0100 | [diff] [blame] | 27 | #define DWS_WORD_LOCK_RETRIES 1000 |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 28 | |
Roberto Vargas | f4953e7 | 2017-07-26 14:15:07 +0100 | [diff] [blame] | 29 | /* Helper macro to detect end of command */ |
| 30 | #define NOR_CMD_END (NOR_DWS | NOR_DWS << 16l) |
| 31 | |
Roberto Vargas | 3bbe34e | 2017-07-28 10:43:28 +0100 | [diff] [blame] | 32 | /* Helper macros to access two flash banks in parallel */ |
| 33 | #define NOR_2X16(d) ((d << 16) | (d & 0xffff)) |
| 34 | |
| 35 | static unsigned int nor_status(uintptr_t base_addr) |
| 36 | { |
| 37 | unsigned long status; |
| 38 | |
| 39 | nor_send_cmd(base_addr, NOR_CMD_READ_STATUS_REG); |
| 40 | status = mmio_read_32(base_addr); |
| 41 | status |= status >> 16; /* merge status from both flash banks */ |
| 42 | |
| 43 | return status & 0xFFFF; |
| 44 | } |
| 45 | |
| 46 | /* |
| 47 | * Poll Write State Machine. |
| 48 | * Return values: |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 49 | * 0 = WSM ready |
| 50 | * -EBUSY = WSM busy after the number of retries |
| 51 | */ |
Roberto Vargas | 784502a | 2017-07-28 10:38:24 +0100 | [diff] [blame] | 52 | static int nor_poll_dws(uintptr_t base_addr, unsigned long int retries) |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 53 | { |
Roberto Vargas | f4953e7 | 2017-07-26 14:15:07 +0100 | [diff] [blame] | 54 | unsigned long status; |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 55 | |
Roberto Vargas | f4953e7 | 2017-07-26 14:15:07 +0100 | [diff] [blame] | 56 | do { |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 57 | nor_send_cmd(base_addr, NOR_CMD_READ_STATUS_REG); |
| 58 | status = mmio_read_32(base_addr); |
Roberto Vargas | f4953e7 | 2017-07-26 14:15:07 +0100 | [diff] [blame] | 59 | if ((status & NOR_CMD_END) == NOR_CMD_END) |
| 60 | return 0; |
| 61 | } while (retries-- > 0); |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 62 | |
Roberto Vargas | f4953e7 | 2017-07-26 14:15:07 +0100 | [diff] [blame] | 63 | return -EBUSY; |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 64 | } |
| 65 | |
Roberto Vargas | 3bbe34e | 2017-07-28 10:43:28 +0100 | [diff] [blame] | 66 | /* |
| 67 | * Return values: |
| 68 | * 0 = success |
| 69 | * -EPERM = Device protected or Block locked |
| 70 | * -EIO = General I/O error |
| 71 | */ |
| 72 | static int nor_full_status_check(uintptr_t base_addr) |
| 73 | { |
| 74 | unsigned long status; |
| 75 | |
| 76 | /* Full status check */ |
| 77 | status = nor_status(base_addr); |
| 78 | |
| 79 | if (status & (NOR_PS | NOR_BLS | NOR_ESS | NOR_PSS)) |
| 80 | return -EPERM; |
| 81 | if (status & (NOR_VPPS | NOR_ES)) |
| 82 | return -EIO; |
| 83 | return 0; |
| 84 | } |
| 85 | |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 86 | void nor_send_cmd(uintptr_t base_addr, unsigned long cmd) |
| 87 | { |
| 88 | mmio_write_32(base_addr, NOR_2X16(cmd)); |
| 89 | } |
| 90 | |
| 91 | /* |
Roberto Vargas | f4953e7 | 2017-07-26 14:15:07 +0100 | [diff] [blame] | 92 | * This function programs a word in the flash. Be aware that it only |
| 93 | * can reset bits that were previously set. It cannot set bits that |
| 94 | * were previously reset. The resulting bits = old_bits & new bits. |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 95 | * Return values: |
Roberto Vargas | 3bbe34e | 2017-07-28 10:43:28 +0100 | [diff] [blame] | 96 | * 0 = success |
| 97 | * otherwise it returns a negative value |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 98 | */ |
| 99 | int nor_word_program(uintptr_t base_addr, unsigned long data) |
| 100 | { |
| 101 | uint32_t status; |
| 102 | int ret; |
| 103 | |
Roberto Vargas | b4b09ca | 2017-07-26 15:17:24 +0100 | [diff] [blame] | 104 | nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG); |
| 105 | |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 106 | /* Set the device in write word mode */ |
| 107 | nor_send_cmd(base_addr, NOR_CMD_WORD_PROGRAM); |
| 108 | mmio_write_32(base_addr, data); |
| 109 | |
| 110 | ret = nor_poll_dws(base_addr, DWS_WORD_PROGRAM_RETRIES); |
Roberto Vargas | f4953e7 | 2017-07-26 14:15:07 +0100 | [diff] [blame] | 111 | if (ret == 0) { |
| 112 | /* Full status check */ |
| 113 | nor_send_cmd(base_addr, NOR_CMD_READ_STATUS_REG); |
| 114 | status = mmio_read_32(base_addr); |
| 115 | |
| 116 | if (status & (NOR_PS | NOR_BLS)) { |
| 117 | nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG); |
| 118 | ret = -EPERM; |
| 119 | } |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 120 | } |
| 121 | |
Roberto Vargas | 3bbe34e | 2017-07-28 10:43:28 +0100 | [diff] [blame] | 122 | if (ret == 0) |
| 123 | ret = nor_full_status_check(base_addr); |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 124 | nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY); |
Roberto Vargas | 3bbe34e | 2017-07-28 10:43:28 +0100 | [diff] [blame] | 125 | |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 126 | return ret; |
| 127 | } |
| 128 | |
Roberto Vargas | f4953e7 | 2017-07-26 14:15:07 +0100 | [diff] [blame] | 129 | /* |
Roberto Vargas | 784502a | 2017-07-28 10:38:24 +0100 | [diff] [blame] | 130 | * Erase a full 256K block |
| 131 | * Return values: |
| 132 | * 0 = success |
Roberto Vargas | 3bbe34e | 2017-07-28 10:43:28 +0100 | [diff] [blame] | 133 | * otherwise it returns a negative value |
Roberto Vargas | 784502a | 2017-07-28 10:38:24 +0100 | [diff] [blame] | 134 | */ |
| 135 | int nor_erase(uintptr_t base_addr) |
| 136 | { |
| 137 | int ret; |
| 138 | |
| 139 | nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG); |
| 140 | |
| 141 | nor_send_cmd(base_addr, NOR_CMD_BLOCK_ERASE); |
| 142 | nor_send_cmd(base_addr, NOR_CMD_BLOCK_ERASE_ACK); |
| 143 | |
| 144 | ret = nor_poll_dws(base_addr, DWS_WORD_ERASE_RETRIES); |
Roberto Vargas | 3bbe34e | 2017-07-28 10:43:28 +0100 | [diff] [blame] | 145 | if (ret == 0) |
| 146 | ret = nor_full_status_check(base_addr); |
Roberto Vargas | 784502a | 2017-07-28 10:38:24 +0100 | [diff] [blame] | 147 | nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY); |
| 148 | |
| 149 | return ret; |
| 150 | } |
| 151 | |
| 152 | /* |
Roberto Vargas | f4953e7 | 2017-07-26 14:15:07 +0100 | [diff] [blame] | 153 | * Lock a full 256 block |
Roberto Vargas | 9753cb5 | 2017-07-26 14:37:56 +0100 | [diff] [blame] | 154 | * Return values: |
| 155 | * 0 = success |
| 156 | * otherwise it returns a negative value |
Roberto Vargas | f4953e7 | 2017-07-26 14:15:07 +0100 | [diff] [blame] | 157 | */ |
Roberto Vargas | 9753cb5 | 2017-07-26 14:37:56 +0100 | [diff] [blame] | 158 | int nor_lock(uintptr_t base_addr) |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 159 | { |
Roberto Vargas | 9753cb5 | 2017-07-26 14:37:56 +0100 | [diff] [blame] | 160 | int ret; |
| 161 | |
Roberto Vargas | b4b09ca | 2017-07-26 15:17:24 +0100 | [diff] [blame] | 162 | nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG); |
| 163 | |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 164 | nor_send_cmd(base_addr, NOR_CMD_LOCK_UNLOCK); |
Roberto Vargas | b4b09ca | 2017-07-26 15:17:24 +0100 | [diff] [blame] | 165 | nor_send_cmd(base_addr, NOR_LOCK_BLOCK); |
Roberto Vargas | 9753cb5 | 2017-07-26 14:37:56 +0100 | [diff] [blame] | 166 | |
| 167 | ret = nor_poll_dws(base_addr, DWS_WORD_LOCK_RETRIES); |
Roberto Vargas | 3bbe34e | 2017-07-28 10:43:28 +0100 | [diff] [blame] | 168 | if (ret == 0) |
| 169 | ret = nor_full_status_check(base_addr); |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 170 | nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY); |
Roberto Vargas | 9753cb5 | 2017-07-26 14:37:56 +0100 | [diff] [blame] | 171 | |
| 172 | return ret; |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 173 | } |
| 174 | |
Roberto Vargas | f4953e7 | 2017-07-26 14:15:07 +0100 | [diff] [blame] | 175 | /* |
| 176 | * unlock a full 256 block |
Roberto Vargas | 9753cb5 | 2017-07-26 14:37:56 +0100 | [diff] [blame] | 177 | * Return values: |
| 178 | * 0 = success |
| 179 | * otherwise it returns a negative value |
Roberto Vargas | f4953e7 | 2017-07-26 14:15:07 +0100 | [diff] [blame] | 180 | */ |
Roberto Vargas | 9753cb5 | 2017-07-26 14:37:56 +0100 | [diff] [blame] | 181 | int nor_unlock(uintptr_t base_addr) |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 182 | { |
Roberto Vargas | 9753cb5 | 2017-07-26 14:37:56 +0100 | [diff] [blame] | 183 | int ret; |
| 184 | |
Roberto Vargas | b4b09ca | 2017-07-26 15:17:24 +0100 | [diff] [blame] | 185 | nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG); |
| 186 | |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 187 | nor_send_cmd(base_addr, NOR_CMD_LOCK_UNLOCK); |
Roberto Vargas | b4b09ca | 2017-07-26 15:17:24 +0100 | [diff] [blame] | 188 | nor_send_cmd(base_addr, NOR_UNLOCK_BLOCK); |
Roberto Vargas | 9753cb5 | 2017-07-26 14:37:56 +0100 | [diff] [blame] | 189 | |
| 190 | ret = nor_poll_dws(base_addr, DWS_WORD_LOCK_RETRIES); |
Roberto Vargas | 3bbe34e | 2017-07-28 10:43:28 +0100 | [diff] [blame] | 191 | if (ret == 0) |
| 192 | ret = nor_full_status_check(base_addr); |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 193 | nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY); |
Roberto Vargas | 9753cb5 | 2017-07-26 14:37:56 +0100 | [diff] [blame] | 194 | |
| 195 | return ret; |
Juan Castillo | 9784dbd | 2015-08-12 12:53:02 +0100 | [diff] [blame] | 196 | } |