Joanna Farley | f9f26a5 | 2018-09-28 08:38:17 +0100 | [diff] [blame] | 1 | Trusted Firmware-A - version 2.0 |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 2 | ================================ |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 3 | |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 4 | Trusted Firmware-A (TF-A) provides a reference implementation of secure world |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 5 | software for `Armv7-A and Armv8-A`_, including a `Secure Monitor`_ executing |
| 6 | at Exception Level 3 (EL3). It implements various Arm interface standards, |
| 7 | such as: |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 8 | |
| 9 | - The `Power State Coordination Interface (PSCI)`_ |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 10 | - Trusted Board Boot Requirements (TBBR, Arm DEN0006C-1) |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 11 | - `SMC Calling Convention`_ |
| 12 | - `System Control and Management Interface`_ |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 13 | - `Software Delegated Exception Interface (SDEI)`_ |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 14 | |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 15 | Where possible, the code is designed for reuse or porting to other Armv7-A and |
| 16 | Armv8-A model and hardware platforms. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 17 | |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 18 | Arm will continue development in collaboration with interested parties to |
| 19 | provide a full reference implementation of Secure Monitor code and Arm standards |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 20 | to the benefit of all developers working with Armv7-A and Armv8-A TrustZone |
| 21 | technology. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 22 | |
| 23 | License |
| 24 | ------- |
| 25 | |
| 26 | The software is provided under a BSD-3-Clause `license`_. Contributions to this |
| 27 | project are accepted under the same license with developer sign-off as |
| 28 | described in the `Contributing Guidelines`_. |
| 29 | |
| 30 | This project contains code from other projects as listed below. The original |
| 31 | license text is included in those source files. |
| 32 | |
Antonio Nino Diaz | 27989a8 | 2018-08-17 10:45:47 +0100 | [diff] [blame] | 33 | - The libc source code is derived from `FreeBSD`_ and `SCC`_. FreeBSD uses |
| 34 | various BSD licenses, including BSD-3-Clause and BSD-2-Clause. The SCC code |
| 35 | is used under the BSD-3-Clause license with the author's permission. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 36 | |
Dan Handley | 327cfc2 | 2018-07-25 16:42:10 +0100 | [diff] [blame] | 37 | - The libfdt source code is disjunctively dual licensed |
| 38 | (GPL-2.0+ OR BSD-2-Clause). It is used by this project under the terms of |
| 39 | the BSD-2-Clause license. Any contributions to this code must be made under |
| 40 | the terms of both licenses. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 41 | |
Dan Handley | 327cfc2 | 2018-07-25 16:42:10 +0100 | [diff] [blame] | 42 | - The LLVM compiler-rt source code is disjunctively dual licensed |
| 43 | (NCSA OR MIT). It is used by this project under the terms of the NCSA |
| 44 | license (also known as the University of Illinois/NCSA Open Source License), |
| 45 | which is a permissive license compatible with BSD-3-Clause. Any |
| 46 | contributions to this code must be made under the terms of both licenses. |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 47 | |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 48 | - The zlib source code is licensed under the Zlib license, which is a |
| 49 | permissive license compatible with BSD-3-Clause. |
| 50 | |
Dan Handley | 327cfc2 | 2018-07-25 16:42:10 +0100 | [diff] [blame] | 51 | - Some STMicroelectronics platform source code is disjunctively dual licensed |
| 52 | (GPL-2.0+ OR BSD-3-Clause). It is used by this project under the terms of the |
| 53 | BSD-3-Clause license. Any contributions to this code must be made under the |
| 54 | terms of both licenses. |
| 55 | |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 56 | This release |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 57 | ------------ |
| 58 | |
| 59 | This release provides a suitable starting point for productization of secure |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 60 | world boot and runtime firmware, in either the AArch32 or AArch64 execution |
| 61 | state. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 62 | |
| 63 | Users are encouraged to do their own security validation, including penetration |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 64 | testing, on any secure world code derived from TF-A. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 65 | |
| 66 | Functionality |
| 67 | ~~~~~~~~~~~~~ |
| 68 | |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 69 | - Initialization of the secure world, for example exception vectors, control |
| 70 | registers and interrupts for the platform. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 71 | |
| 72 | - Library support for CPU specific reset and power down sequences. This |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 73 | includes support for errata workarounds and the latest Arm DynamIQ CPUs. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 74 | |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 75 | - Drivers to enable standard initialization of Arm System IP, for example |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 76 | Generic Interrupt Controller (GIC), Cache Coherent Interconnect (CCI), |
| 77 | Cache Coherent Network (CCN), Network Interconnect (NIC) and TrustZone |
| 78 | Controller (TZC). |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 79 | |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 80 | - A generic `SCMI`_ driver to interface with conforming power controllers, for |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 81 | example the Arm System Control Processor (SCP). |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 82 | |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 83 | - SMC (Secure Monitor Call) handling, conforming to the `SMC Calling |
| 84 | Convention`_ using an EL3 runtime services framework. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 85 | |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 86 | - `PSCI`_ library support for CPU, cluster and system power management |
| 87 | use-cases. |
| 88 | This library is pre-integrated with the AArch64 EL3 Runtime Software, and |
| 89 | is also suitable for integration with other AArch32 EL3 Runtime Software, |
| 90 | for example an AArch32 Secure OS. |
| 91 | |
| 92 | - A minimal AArch32 Secure Payload (SP\_MIN) to demonstrate `PSCI`_ library |
| 93 | integration with AArch32 EL3 Runtime Software. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 94 | |
| 95 | - Secure Monitor library code such as world switching, EL1 context management |
| 96 | and interrupt routing. |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 97 | When a Secure-EL1 Payload (SP) is present, for example a Secure OS, the |
| 98 | AArch64 EL3 Runtime Software must be integrated with a dispatcher component |
| 99 | (SPD) to customize the interaction with the SP. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 100 | |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 101 | - A Test SP/SPD to demonstrate AArch64 Secure Monitor functionality and SP |
| 102 | interaction with PSCI. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 103 | |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 104 | - SPDs for the `OP-TEE Secure OS`_, `NVidia Trusted Little Kernel`_ |
| 105 | and `Trusty Secure OS`_. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 106 | |
| 107 | - A Trusted Board Boot implementation, conforming to all mandatory TBBR |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 108 | requirements. This includes image authentication, Firmware Update (or |
| 109 | recovery mode), and packaging of the various firmware images into a |
| 110 | Firmware Image Package (FIP). |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 111 | |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 112 | - Pre-integration of TBB with the Arm CryptoCell product, to take advantage of |
| 113 | its hardware Root of Trust and crypto acceleration services. |
| 114 | |
| 115 | - Reliability, Availability, and Serviceability (RAS) functionality, including |
| 116 | |
| 117 | - A Secure Partition Manager (SPM) to manage Secure Partitions in |
| 118 | Secure-EL0, which can be used to implement simple management and |
| 119 | security services. |
| 120 | |
| 121 | - An SDEI dispatcher to route interrupt-based SDEI events. |
| 122 | |
| 123 | - An Exception Handling Framework (EHF) that allows dispatching of EL3 |
| 124 | interrupts to their registered handlers, to facilitate firmware-first |
| 125 | error handling. |
| 126 | |
| 127 | - A dynamic configuration framework that enables each of the firmware images |
| 128 | to be configured at runtime if required by the platform. It also enables |
| 129 | loading of a hardware configuration (for example, a kernel device tree) |
| 130 | as part of the FIP, to be passed through the firmware stages. |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 131 | |
| 132 | - Support for alternative boot flows, for example to support platforms where |
| 133 | the EL3 Runtime Software is loaded using other firmware or a separate |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 134 | secure system processor, or where a non-TF-A ROM expects BL2 to be loaded |
| 135 | at EL3. |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 136 | |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 137 | - Support for the GCC, LLVM and Arm Compiler 6 toolchains. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 138 | |
Joanna Farley | d83bf0b | 2018-09-11 15:51:31 +0100 | [diff] [blame] | 139 | - Support combining several libraries into a self-called "romlib" image, that |
| 140 | may be shared across images to reduce memory footprint. The romlib image |
| 141 | is stored in ROM but is accessed through a jump-table that may be stored |
| 142 | in read-write memory, allowing for the library code to be patched. |
| 143 | |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 144 | For a full description of functionality and implementation details, please |
| 145 | see the `Firmware Design`_ and supporting documentation. The `Change Log`_ |
| 146 | provides details of changes made since the last release. |
| 147 | |
| 148 | Platforms |
| 149 | ~~~~~~~~~ |
| 150 | |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 151 | Various AArch32 and AArch64 builds of this release has been tested on variants |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 152 | r0, r1 and r2 of the `Juno Arm Development Platform`_. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 153 | |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 154 | Various AArch64 builds of this release have been tested on the following Arm |
Joanna Farley | d83bf0b | 2018-09-11 15:51:31 +0100 | [diff] [blame] | 155 | Fixed Virtual Platforms (`FVP`_) without shifted affinities that do not |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 156 | support threaded CPU cores (64-bit host machine only): |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 157 | |
Joanna Farley | d83bf0b | 2018-09-11 15:51:31 +0100 | [diff] [blame] | 158 | NOTE: Unless otherwise stated, the model version is Version 11.4 Build 37. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 159 | |
Joanna Farley | d83bf0b | 2018-09-11 15:51:31 +0100 | [diff] [blame] | 160 | - ``FVP_Base_Aresx4`` |
| 161 | - ``FVP_Base_AEMv8A-AEMv8A`` |
| 162 | - ``FVP_Base_AEMv8A-AEMv8A-AEMv8A-AEMv8A-CCN502`` |
| 163 | - ``FVP_Base_AEMv8A-AEMv8A`` |
| 164 | - ``FVP_Base_RevC-2xAEMv8A`` |
| 165 | - ``FVP_Base_Cortex-A32x4`` |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 166 | - ``FVP_Base_Cortex-A35x4`` |
| 167 | - ``FVP_Base_Cortex-A53x4`` |
Joanna Farley | d83bf0b | 2018-09-11 15:51:31 +0100 | [diff] [blame] | 168 | - ``FVP_Base_Cortex-A55x4+Cortex-A75x4`` |
| 169 | - ``FVP_Base_Cortex-A55x4`` |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 170 | - ``FVP_Base_Cortex-A57x4-A53x4`` |
| 171 | - ``FVP_Base_Cortex-A57x4`` |
| 172 | - ``FVP_Base_Cortex-A72x4-A53x4`` |
| 173 | - ``FVP_Base_Cortex-A72x4`` |
| 174 | - ``FVP_Base_Cortex-A73x4-A53x4`` |
| 175 | - ``FVP_Base_Cortex-A73x4`` |
Joanna Farley | d83bf0b | 2018-09-11 15:51:31 +0100 | [diff] [blame] | 176 | - ``FVP_Base_Cortex-A75x4`` |
| 177 | - ``FVP_Base_Cortex-A76x4`` |
| 178 | - ``FVP_CSS_SGI-575`` (Version 11.3 build 40) |
| 179 | - ``Foundation_Platform`` |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 180 | |
Joanna Farley | d83bf0b | 2018-09-11 15:51:31 +0100 | [diff] [blame] | 181 | The latest version of the AArch32 build of TF-A has been tested on the following |
| 182 | Arm FVPs without shifted affinities that do not support threaded CPU cores |
| 183 | (64-bit host machine only). |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 184 | |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 185 | - ``FVP_Base_AEMv8A-AEMv8A`` |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 186 | - ``FVP_Base_Cortex-A32x4`` |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 187 | |
| 188 | The Foundation FVP can be downloaded free of charge. The Base FVPs can be |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 189 | licensed from Arm. See the `Arm FVP website`_. |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 190 | |
Joanna Farley | d83bf0b | 2018-09-11 15:51:31 +0100 | [diff] [blame] | 191 | All the above platforms have been tested with `Linaro Release 18.04`_. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 192 | |
| 193 | This release also contains the following platform support: |
| 194 | |
Joanna Farley | d83bf0b | 2018-09-11 15:51:31 +0100 | [diff] [blame] | 195 | - Allwinner sun50i_64 and sun50i_h6 |
Antonio Nino Diaz | 37f647a | 2018-10-10 23:52:39 +0100 | [diff] [blame] | 196 | - Amlogic Meson S905 (GXBB) |
Joanna Farley | d83bf0b | 2018-09-11 15:51:31 +0100 | [diff] [blame] | 197 | - ARM SGI-575 and SGM-775 |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 198 | - HiKey, HiKey960 and Poplar boards |
Joanna Farley | f9f26a5 | 2018-09-28 08:38:17 +0100 | [diff] [blame] | 199 | - Marvell Armada 8K |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 200 | - MediaTek MT6795 and MT8173 SoCs |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 201 | - NVidia T132, T186 and T210 SoCs |
Joanna Farley | f9f26a5 | 2018-09-28 08:38:17 +0100 | [diff] [blame] | 202 | - NXP QorIQ LS1043A, i.MX8QX, i.MX8QM and i.MX7Solo WaRP7 |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 203 | - QEMU emulator |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 204 | - Raspberry Pi 3 board |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 205 | - RockChip RK3328, RK3368 and RK3399 SoCs |
Sumit Garg | 150c38e | 2018-06-21 11:28:18 +0530 | [diff] [blame] | 206 | - Socionext UniPhier SoC family and SynQuacer SC2A11 SoCs |
Joanna Farley | d83bf0b | 2018-09-11 15:51:31 +0100 | [diff] [blame] | 207 | - STMicroelectronics STM32MP1 |
Nishanth Menon | 1841c53 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 208 | - Texas Instruments K3 SoCs |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 209 | - Xilinx Zynq UltraScale + MPSoC |
| 210 | |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 211 | Still to come |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 212 | ~~~~~~~~~~~~~ |
| 213 | |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 214 | - More platform support. |
| 215 | |
Joanna Farley | d83bf0b | 2018-09-11 15:51:31 +0100 | [diff] [blame] | 216 | - Position independent executable (PIE) support. |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 217 | |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 218 | - Ongoing support for new architectural features, CPUs and System IP. |
| 219 | |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 220 | - Ongoing support for new Arm system architecture specifications. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 221 | |
| 222 | - Ongoing security hardening, optimization and quality improvements. |
| 223 | |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 224 | For a full list of detailed issues in the current code, please see the `Change |
| 225 | Log`_ and the `GitHub issue tracker`_. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 226 | |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 227 | Getting started |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 228 | --------------- |
| 229 | |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 230 | Get the TF-A source code from `GitHub`_. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 231 | |
| 232 | See the `User Guide`_ for instructions on how to install, build and use |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 233 | the TF-A with the Arm `FVP`_\ s. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 234 | |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 235 | See the `Firmware Design`_ for information on how the TF-A works. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 236 | |
| 237 | See the `Porting Guide`_ as well for information about how to use this |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 238 | software on another Armv7-A or Armv8-A platform. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 239 | |
| 240 | See the `Contributing Guidelines`_ for information on how to contribute to this |
| 241 | project and the `Acknowledgments`_ file for a list of contributors to the |
| 242 | project. |
| 243 | |
Dimitris Papastamos | 8dd7bc6 | 2018-07-30 15:38:04 +0100 | [diff] [blame] | 244 | IRC channel |
| 245 | ~~~~~~~~~~~ |
| 246 | |
| 247 | Development discussion takes place on the #trusted-firmware-a channel |
| 248 | on the Freenode IRC network. This is not an official support channel. |
| 249 | If you have an issue to raise, please use the `GitHub issue tracker`_. |
| 250 | |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 251 | Feedback and support |
| 252 | ~~~~~~~~~~~~~~~~~~~~ |
| 253 | |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 254 | Arm welcomes any feedback on TF-A. If you think you have found a security |
| 255 | vulnerability, please report this using the process defined in the TF-A |
| 256 | `Security Centre`_. For all other feedback, please use the |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 257 | `GitHub issue tracker`_. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 258 | |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 259 | Arm licensees may contact Arm directly via their partner managers. |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 260 | |
| 261 | -------------- |
| 262 | |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 263 | *Copyright (c) 2013-2018, Arm Limited and Contributors. All rights reserved.* |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 264 | |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 265 | .. _Armv7-A and Armv8-A: https://developer.arm.com/products/architecture/a-profile |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 266 | .. _Secure Monitor: http://www.arm.com/products/processors/technologies/trustzone/tee-smc.php |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 267 | .. _Power State Coordination Interface (PSCI): PSCI_ |
| 268 | .. _PSCI: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf |
| 269 | .. _SMC Calling Convention: http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf |
| 270 | .. _System Control and Management Interface: SCMI_ |
| 271 | .. _SCMI: http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf |
danh-arm | ed81126 | 2018-03-20 17:01:39 +0000 | [diff] [blame] | 272 | .. _Software Delegated Exception Interface (SDEI): SDEI_ |
Dan Handley | 5b0b727 | 2018-03-14 13:01:39 +0000 | [diff] [blame] | 273 | .. _SDEI: http://infocenter.arm.com/help/topic/com.arm.doc.den0054a/ARM_DEN0054A_Software_Delegated_Exception_Interface.pdf |
Dan Handley | 4def07d | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 274 | .. _Juno Arm Development Platform: http://www.arm.com/products/tools/development-boards/versatile-express/juno-arm-development-platform.php |
| 275 | .. _Arm FVP website: FVP_ |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 276 | .. _FVP: https://developer.arm.com/products/system-design/fixed-virtual-platforms |
Joanna Farley | d83bf0b | 2018-09-11 15:51:31 +0100 | [diff] [blame] | 277 | .. _Linaro Release 18.04: https://community.arm.com/dev-platforms/b/documents/posts/linaro-release-notes-deprecated#LinaroRelease18.04 |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 278 | .. _OP-TEE Secure OS: https://github.com/OP-TEE/optee_os |
| 279 | .. _NVidia Trusted Little Kernel: http://nv-tegra.nvidia.com/gitweb/?p=3rdparty/ote_partner/tlk.git;a=summary |
Dan Handley | 4bf3349 | 2017-07-05 17:40:29 +0100 | [diff] [blame] | 280 | .. _Trusty Secure OS: https://source.android.com/security/trusty |
| 281 | .. _GitHub: https://www.github.com/ARM-software/arm-trusted-firmware |
| 282 | .. _GitHub issue tracker: https://github.com/ARM-software/tf-issues/issues |
| 283 | .. _Security Centre: https://github.com/ARM-software/arm-trusted-firmware/wiki/ARM-Trusted-Firmware-Security-Centre |
| 284 | .. _license: ./license.rst |
| 285 | .. _Contributing Guidelines: ./contributing.rst |
| 286 | .. _Acknowledgments: ./acknowledgements.rst |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 287 | .. _Firmware Design: ./docs/firmware-design.rst |
| 288 | .. _Change Log: ./docs/change-log.rst |
Douglas Raillard | 6f62574 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 289 | .. _User Guide: ./docs/user-guide.rst |
| 290 | .. _Porting Guide: ./docs/porting-guide.rst |
Antonio Nino Diaz | 27989a8 | 2018-08-17 10:45:47 +0100 | [diff] [blame] | 291 | .. _FreeBSD: http://www.freebsd.org |
| 292 | .. _SCC: http://www.simple-cc.org/ |