Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 31 | #include <arch_helpers.h> |
Dan Handley | 97043ac | 2014-04-09 13:14:54 +0100 | [diff] [blame^] | 32 | #include <assert.h> |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 33 | #include <bl_common.h> |
Dan Handley | 97043ac | 2014-04-09 13:14:54 +0100 | [diff] [blame^] | 34 | #include <context.h> |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 35 | #include <context_mgmt.h> |
Dan Handley | 97043ac | 2014-04-09 13:14:54 +0100 | [diff] [blame^] | 36 | #include <platform.h> |
| 37 | #include <runtime_svc.h> |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 38 | |
| 39 | /******************************************************************************* |
| 40 | * Data structure which holds the pointers to non-secure and secure security |
| 41 | * state contexts for each cpu. It is aligned to the cache line boundary to |
| 42 | * allow efficient concurrent manipulation of these pointers on different cpus |
| 43 | ******************************************************************************/ |
| 44 | typedef struct { |
| 45 | void *ptr[2]; |
Dan Handley | fb037bf | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 46 | } __aligned (CACHE_WRITEBACK_GRANULE) context_info_t; |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 47 | |
Dan Handley | fb037bf | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 48 | static context_info_t cm_context_info[PLATFORM_CORE_COUNT]; |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 49 | |
| 50 | /******************************************************************************* |
| 51 | * Context management library initialisation routine. This library is used by |
| 52 | * runtime services to share pointers to 'cpu_context' structures for the secure |
| 53 | * and non-secure states. Management of the structures and their associated |
| 54 | * memory is not done by the context management library e.g. the PSCI service |
| 55 | * manages the cpu context used for entry from and exit to the non-secure state. |
| 56 | * The Secure payload dispatcher service manages the context(s) corresponding to |
| 57 | * the secure state. It also uses this library to get access to the non-secure |
| 58 | * state cpu context pointers. |
| 59 | * Lastly, this library provides the api to make SP_EL3 point to the cpu context |
| 60 | * which will used for programming an entry into a lower EL. The same context |
| 61 | * will used to save state upon exception entry from that EL. |
| 62 | ******************************************************************************/ |
| 63 | void cm_init() |
| 64 | { |
| 65 | /* |
| 66 | * The context management library has only global data to intialize, but |
| 67 | * that will be done when the BSS is zeroed out |
| 68 | */ |
| 69 | } |
| 70 | |
| 71 | /******************************************************************************* |
| 72 | * This function returns a pointer to the most recent 'cpu_context' structure |
| 73 | * that was set as the context for the specified security state. NULL is |
| 74 | * returned if no such structure has been specified. |
| 75 | ******************************************************************************/ |
| 76 | void *cm_get_context(uint64_t mpidr, uint32_t security_state) |
| 77 | { |
| 78 | uint32_t linear_id = platform_get_core_pos(mpidr); |
| 79 | |
| 80 | assert(security_state <= NON_SECURE); |
| 81 | |
| 82 | return cm_context_info[linear_id].ptr[security_state]; |
| 83 | } |
| 84 | |
| 85 | /******************************************************************************* |
| 86 | * This function sets the pointer to the current 'cpu_context' structure for the |
| 87 | * specified security state. |
| 88 | ******************************************************************************/ |
| 89 | void cm_set_context(uint64_t mpidr, void *context, uint32_t security_state) |
| 90 | { |
| 91 | uint32_t linear_id = platform_get_core_pos(mpidr); |
| 92 | |
| 93 | assert(security_state <= NON_SECURE); |
| 94 | |
| 95 | cm_context_info[linear_id].ptr[security_state] = context; |
| 96 | } |
| 97 | |
| 98 | /******************************************************************************* |
| 99 | * The next four functions are used by runtime services to save and restore EL3 |
| 100 | * and EL1 contexts on the 'cpu_context' structure for the specified security |
| 101 | * state. |
| 102 | ******************************************************************************/ |
| 103 | void cm_el3_sysregs_context_save(uint32_t security_state) |
| 104 | { |
Dan Handley | fb037bf | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 105 | cpu_context_t *ctx; |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 106 | |
| 107 | ctx = cm_get_context(read_mpidr(), security_state); |
| 108 | assert(ctx); |
| 109 | |
| 110 | el3_sysregs_context_save(get_el3state_ctx(ctx)); |
| 111 | } |
| 112 | |
| 113 | void cm_el3_sysregs_context_restore(uint32_t security_state) |
| 114 | { |
Dan Handley | fb037bf | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 115 | cpu_context_t *ctx; |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 116 | |
| 117 | ctx = cm_get_context(read_mpidr(), security_state); |
| 118 | assert(ctx); |
| 119 | |
| 120 | el3_sysregs_context_restore(get_el3state_ctx(ctx)); |
| 121 | } |
| 122 | |
| 123 | void cm_el1_sysregs_context_save(uint32_t security_state) |
| 124 | { |
Dan Handley | fb037bf | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 125 | cpu_context_t *ctx; |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 126 | |
| 127 | ctx = cm_get_context(read_mpidr(), security_state); |
| 128 | assert(ctx); |
| 129 | |
| 130 | el1_sysregs_context_save(get_sysregs_ctx(ctx)); |
| 131 | } |
| 132 | |
| 133 | void cm_el1_sysregs_context_restore(uint32_t security_state) |
| 134 | { |
Dan Handley | fb037bf | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 135 | cpu_context_t *ctx; |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 136 | |
| 137 | ctx = cm_get_context(read_mpidr(), security_state); |
| 138 | assert(ctx); |
| 139 | |
| 140 | el1_sysregs_context_restore(get_sysregs_ctx(ctx)); |
| 141 | } |
| 142 | |
| 143 | /******************************************************************************* |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 144 | * This function function populates 'cpu_context' pertaining to the given |
| 145 | * security state with the entrypoint, SPSR and SCR values so that an ERET from |
| 146 | * this securit state correctly restores corresponding values to drop the CPU to |
| 147 | * the next exception level |
| 148 | ******************************************************************************/ |
| 149 | void cm_set_el3_eret_context(uint32_t security_state, uint64_t entrypoint, |
| 150 | uint32_t spsr, uint32_t scr) |
| 151 | { |
Dan Handley | fb037bf | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 152 | cpu_context_t *ctx; |
| 153 | el3_state_t *state; |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 154 | |
| 155 | ctx = cm_get_context(read_mpidr(), security_state); |
| 156 | assert(ctx); |
| 157 | |
| 158 | /* Populate EL3 state so that we've the right context before doing ERET */ |
| 159 | state = get_el3state_ctx(ctx); |
| 160 | write_ctx_reg(state, CTX_SPSR_EL3, spsr); |
| 161 | write_ctx_reg(state, CTX_ELR_EL3, entrypoint); |
| 162 | write_ctx_reg(state, CTX_SCR_EL3, scr); |
| 163 | } |
| 164 | |
| 165 | /******************************************************************************* |
Achin Gupta | 607084e | 2014-02-09 18:24:19 +0000 | [diff] [blame] | 166 | * This function function populates ELR_EL3 member of 'cpu_context' pertaining |
| 167 | * to the given security state with the given entrypoint |
| 168 | ******************************************************************************/ |
| 169 | void cm_set_el3_elr(uint32_t security_state, uint64_t entrypoint) |
| 170 | { |
Dan Handley | fb037bf | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 171 | cpu_context_t *ctx; |
| 172 | el3_state_t *state; |
Achin Gupta | 607084e | 2014-02-09 18:24:19 +0000 | [diff] [blame] | 173 | |
| 174 | ctx = cm_get_context(read_mpidr(), security_state); |
| 175 | assert(ctx); |
| 176 | |
| 177 | /* Populate EL3 state so that ERET jumps to the correct entry */ |
| 178 | state = get_el3state_ctx(ctx); |
| 179 | write_ctx_reg(state, CTX_ELR_EL3, entrypoint); |
| 180 | } |
| 181 | |
| 182 | /******************************************************************************* |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 183 | * This function is used to program the context that's used for exception |
| 184 | * return. This initializes the SP_EL3 to a pointer to a 'cpu_context' set for |
| 185 | * the required security state |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 186 | ******************************************************************************/ |
| 187 | void cm_set_next_eret_context(uint32_t security_state) |
| 188 | { |
Dan Handley | fb037bf | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 189 | cpu_context_t *ctx; |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 190 | #if DEBUG |
| 191 | uint64_t sp_mode; |
| 192 | #endif |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 193 | |
Achin Gupta | 7aea908 | 2014-02-01 07:51:28 +0000 | [diff] [blame] | 194 | ctx = cm_get_context(read_mpidr(), security_state); |
| 195 | assert(ctx); |
| 196 | |
| 197 | #if DEBUG |
| 198 | /* |
| 199 | * Check that this function is called with SP_EL0 as the stack |
| 200 | * pointer |
| 201 | */ |
| 202 | __asm__ volatile("mrs %0, SPSel\n" |
| 203 | : "=r" (sp_mode)); |
| 204 | |
| 205 | assert(sp_mode == MODE_SP_EL0); |
| 206 | #endif |
| 207 | |
| 208 | __asm__ volatile("msr spsel, #1\n" |
| 209 | "mov sp, %0\n" |
| 210 | "msr spsel, #0\n" |
| 211 | : : "r" (ctx)); |
| 212 | } |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 213 | |
| 214 | /******************************************************************************* |
| 215 | * This function is used to program exception stack in the 'cpu_context' |
| 216 | * structure. This is the initial stack used for taking and handling exceptions |
| 217 | * at EL3. This stack is expected to be initialized once by each security state |
| 218 | ******************************************************************************/ |
| 219 | void cm_init_exception_stack(uint64_t mpidr, uint32_t security_state) |
| 220 | { |
Dan Handley | fb037bf | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 221 | cpu_context_t *ctx; |
| 222 | el3_state_t *state; |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 223 | |
| 224 | ctx = cm_get_context(mpidr, security_state); |
| 225 | assert(ctx); |
| 226 | |
| 227 | /* Set exception stack in the context */ |
| 228 | state = get_el3state_ctx(ctx); |
| 229 | |
| 230 | write_ctx_reg(state, CTX_EXCEPTION_SP, get_exception_stack(mpidr)); |
| 231 | } |