blob: 6c93a4ca276fcd5dfedb90dd729211611dd83a73 [file] [log] [blame]
Paul Beesleyca7145c2019-03-25 16:45:23 +00001Trusted Firmware-A - version 2.1
Dan Handley4def07d2018-03-01 18:44:00 +00002================================
Douglas Raillard6f625742017-06-28 15:23:03 +01003
John Tsichritzis0668dd72019-04-11 17:23:32 +01004.. section-numbering::
5 :suffix: .
6
7.. contents::
8
Dan Handley4def07d2018-03-01 18:44:00 +00009Trusted Firmware-A (TF-A) provides a reference implementation of secure world
Dan Handley5b0b7272018-03-14 13:01:39 +000010software for `Armv7-A and Armv8-A`_, including a `Secure Monitor`_ executing
11at Exception Level 3 (EL3). It implements various Arm interface standards,
12such as:
Dan Handley4bf33492017-07-05 17:40:29 +010013
14- The `Power State Coordination Interface (PSCI)`_
Sandrine Bailleuxc1491eb2019-04-24 10:41:24 +020015- `Trusted Board Boot Requirements CLIENT (TBBR-CLIENT)`_
Dan Handley4bf33492017-07-05 17:40:29 +010016- `SMC Calling Convention`_
Paul Beesley3c6261b2019-01-10 15:42:39 +000017- `System Control and Management Interface (SCMI)`_
Dan Handley5b0b7272018-03-14 13:01:39 +000018- `Software Delegated Exception Interface (SDEI)`_
Dan Handley4bf33492017-07-05 17:40:29 +010019
Dan Handley5b0b7272018-03-14 13:01:39 +000020Where possible, the code is designed for reuse or porting to other Armv7-A and
21Armv8-A model and hardware platforms.
Douglas Raillard6f625742017-06-28 15:23:03 +010022
Paul Beesleyca7145c2019-03-25 16:45:23 +000023This release provides a suitable starting point for productization of secure
24world boot and runtime firmware, in either the AArch32 or AArch64 execution
25states.
26
27Users are encouraged to do their own security validation, including penetration
28testing, on any secure world code derived from TF-A.
29
Dan Handley4def07d2018-03-01 18:44:00 +000030Arm will continue development in collaboration with interested parties to
31provide a full reference implementation of Secure Monitor code and Arm standards
Dan Handley5b0b7272018-03-14 13:01:39 +000032to the benefit of all developers working with Armv7-A and Armv8-A TrustZone
33technology.
Douglas Raillard6f625742017-06-28 15:23:03 +010034
John Tsichritzis0668dd72019-04-11 17:23:32 +010035Documentation contents
36----------------------
37
38The `Trusted Firmware-A Documentation Contents`_ page contains an overview of
39the documentation that is available, with links to facilitate easier browsing.
40
Douglas Raillard6f625742017-06-28 15:23:03 +010041License
42-------
43
44The software is provided under a BSD-3-Clause `license`_. Contributions to this
45project are accepted under the same license with developer sign-off as
46described in the `Contributing Guidelines`_.
47
48This project contains code from other projects as listed below. The original
49license text is included in those source files.
50
Antonio Nino Diaz27989a82018-08-17 10:45:47 +010051- The libc source code is derived from `FreeBSD`_ and `SCC`_. FreeBSD uses
52 various BSD licenses, including BSD-3-Clause and BSD-2-Clause. The SCC code
53 is used under the BSD-3-Clause license with the author's permission.
Douglas Raillard6f625742017-06-28 15:23:03 +010054
Dan Handley327cfc22018-07-25 16:42:10 +010055- The libfdt source code is disjunctively dual licensed
56 (GPL-2.0+ OR BSD-2-Clause). It is used by this project under the terms of
57 the BSD-2-Clause license. Any contributions to this code must be made under
58 the terms of both licenses.
Douglas Raillard6f625742017-06-28 15:23:03 +010059
Dan Handley327cfc22018-07-25 16:42:10 +010060- The LLVM compiler-rt source code is disjunctively dual licensed
61 (NCSA OR MIT). It is used by this project under the terms of the NCSA
62 license (also known as the University of Illinois/NCSA Open Source License),
63 which is a permissive license compatible with BSD-3-Clause. Any
64 contributions to this code must be made under the terms of both licenses.
Dan Handley4bf33492017-07-05 17:40:29 +010065
Dan Handley5b0b7272018-03-14 13:01:39 +000066- The zlib source code is licensed under the Zlib license, which is a
67 permissive license compatible with BSD-3-Clause.
68
Dan Handley327cfc22018-07-25 16:42:10 +010069- Some STMicroelectronics platform source code is disjunctively dual licensed
70 (GPL-2.0+ OR BSD-3-Clause). It is used by this project under the terms of the
71 BSD-3-Clause license. Any contributions to this code must be made under the
72 terms of both licenses.
73
Douglas Raillard6f625742017-06-28 15:23:03 +010074Functionality
Paul Beesleyca7145c2019-03-25 16:45:23 +000075-------------
Douglas Raillard6f625742017-06-28 15:23:03 +010076
Dan Handley4bf33492017-07-05 17:40:29 +010077- Initialization of the secure world, for example exception vectors, control
78 registers and interrupts for the platform.
Douglas Raillard6f625742017-06-28 15:23:03 +010079
80- Library support for CPU specific reset and power down sequences. This
Dan Handley4def07d2018-03-01 18:44:00 +000081 includes support for errata workarounds and the latest Arm DynamIQ CPUs.
Douglas Raillard6f625742017-06-28 15:23:03 +010082
Dan Handley4def07d2018-03-01 18:44:00 +000083- Drivers to enable standard initialization of Arm System IP, for example
Dan Handley4bf33492017-07-05 17:40:29 +010084 Generic Interrupt Controller (GIC), Cache Coherent Interconnect (CCI),
85 Cache Coherent Network (CCN), Network Interconnect (NIC) and TrustZone
86 Controller (TZC).
Douglas Raillard6f625742017-06-28 15:23:03 +010087
Dan Handley4bf33492017-07-05 17:40:29 +010088- A generic `SCMI`_ driver to interface with conforming power controllers, for
Dan Handley4def07d2018-03-01 18:44:00 +000089 example the Arm System Control Processor (SCP).
Douglas Raillard6f625742017-06-28 15:23:03 +010090
Dan Handley4bf33492017-07-05 17:40:29 +010091- SMC (Secure Monitor Call) handling, conforming to the `SMC Calling
92 Convention`_ using an EL3 runtime services framework.
Douglas Raillard6f625742017-06-28 15:23:03 +010093
Dan Handley4bf33492017-07-05 17:40:29 +010094- `PSCI`_ library support for CPU, cluster and system power management
95 use-cases.
96 This library is pre-integrated with the AArch64 EL3 Runtime Software, and
97 is also suitable for integration with other AArch32 EL3 Runtime Software,
98 for example an AArch32 Secure OS.
99
100- A minimal AArch32 Secure Payload (SP\_MIN) to demonstrate `PSCI`_ library
101 integration with AArch32 EL3 Runtime Software.
Douglas Raillard6f625742017-06-28 15:23:03 +0100102
103- Secure Monitor library code such as world switching, EL1 context management
104 and interrupt routing.
Dan Handley4bf33492017-07-05 17:40:29 +0100105 When a Secure-EL1 Payload (SP) is present, for example a Secure OS, the
Paul Beesleyd1ce4462019-01-10 16:14:04 +0000106 AArch64 EL3 Runtime Software must be integrated with a Secure Payload
107 Dispatcher (SPD) component to customize the interaction with the SP.
Douglas Raillard6f625742017-06-28 15:23:03 +0100108
Paul Beesleyd1ce4462019-01-10 16:14:04 +0000109- A Test SP and SPD to demonstrate AArch64 Secure Monitor functionality and SP
Dan Handley4bf33492017-07-05 17:40:29 +0100110 interaction with PSCI.
Douglas Raillard6f625742017-06-28 15:23:03 +0100111
Paul Beesleybe8b4d12019-01-10 15:53:12 +0000112- SPDs for the `OP-TEE Secure OS`_, `NVIDIA Trusted Little Kernel`_
Dan Handley4bf33492017-07-05 17:40:29 +0100113 and `Trusty Secure OS`_.
Douglas Raillard6f625742017-06-28 15:23:03 +0100114
115- A Trusted Board Boot implementation, conforming to all mandatory TBBR
Dan Handley4bf33492017-07-05 17:40:29 +0100116 requirements. This includes image authentication, Firmware Update (or
117 recovery mode), and packaging of the various firmware images into a
118 Firmware Image Package (FIP).
Douglas Raillard6f625742017-06-28 15:23:03 +0100119
Dan Handley5b0b7272018-03-14 13:01:39 +0000120- Pre-integration of TBB with the Arm CryptoCell product, to take advantage of
121 its hardware Root of Trust and crypto acceleration services.
122
123- Reliability, Availability, and Serviceability (RAS) functionality, including
124
125 - A Secure Partition Manager (SPM) to manage Secure Partitions in
126 Secure-EL0, which can be used to implement simple management and
127 security services.
128
129 - An SDEI dispatcher to route interrupt-based SDEI events.
130
131 - An Exception Handling Framework (EHF) that allows dispatching of EL3
132 interrupts to their registered handlers, to facilitate firmware-first
133 error handling.
134
135- A dynamic configuration framework that enables each of the firmware images
136 to be configured at runtime if required by the platform. It also enables
137 loading of a hardware configuration (for example, a kernel device tree)
138 as part of the FIP, to be passed through the firmware stages.
Dan Handley4bf33492017-07-05 17:40:29 +0100139
140- Support for alternative boot flows, for example to support platforms where
141 the EL3 Runtime Software is loaded using other firmware or a separate
Dan Handley5b0b7272018-03-14 13:01:39 +0000142 secure system processor, or where a non-TF-A ROM expects BL2 to be loaded
143 at EL3.
Dan Handley4bf33492017-07-05 17:40:29 +0100144
Dan Handley4def07d2018-03-01 18:44:00 +0000145- Support for the GCC, LLVM and Arm Compiler 6 toolchains.
Douglas Raillard6f625742017-06-28 15:23:03 +0100146
Paul Beesleyca7145c2019-03-25 16:45:23 +0000147- Support for combining several libraries into a "romlib" image that may be
148 shared across images to reduce memory footprint. The romlib image is stored
149 in ROM but is accessed through a jump-table that may be stored
Joanna Farleyd83bf0b2018-09-11 15:51:31 +0100150 in read-write memory, allowing for the library code to be patched.
151
Paul Beesleyca7145c2019-03-25 16:45:23 +0000152- A prototype implementation of a Secure Partition Manager (SPM) that is based
Paul Beesleybf32bc92019-03-29 10:14:56 +0000153 on the SPCI Alpha 1 and SPRT draft specifications.
Paul Beesleyca7145c2019-03-25 16:45:23 +0000154
155- Support for ARMv8.3 pointer authentication in the normal and secure worlds.
156 The use of pointer authentication in the normal world is enabled whenever
157 architectural support is available, without the need for additional build
158 flags. Use of pointer authentication in the secure world remains an
159 experimental configuration at this time and requires the ``ENABLE_PAUTH``
160 build flag to be set.
161
162- Position-Independent Executable (PIE) support. Initially for BL31 only, with
163 further support to be added in a future release.
164
Douglas Raillard6f625742017-06-28 15:23:03 +0100165For a full description of functionality and implementation details, please
166see the `Firmware Design`_ and supporting documentation. The `Change Log`_
167provides details of changes made since the last release.
168
169Platforms
Paul Beesleyca7145c2019-03-25 16:45:23 +0000170---------
Douglas Raillard6f625742017-06-28 15:23:03 +0100171
Paul Beesleyd1ce4462019-01-10 16:14:04 +0000172Various AArch32 and AArch64 builds of this release have been tested on r0, r1
173and r2 variants of the `Juno Arm Development Platform`_.
Douglas Raillard6f625742017-06-28 15:23:03 +0100174
Ambroise Vincent61924482019-03-28 12:51:48 +0000175The latest version of the AArch64 build of TF-A has been tested on the following
176Arm FVPs without shifted affinities, and that do not support threaded CPU cores
177(64-bit host machine only).
Douglas Raillard6f625742017-06-28 15:23:03 +0100178
John Tsichritzis532a67d2019-05-20 13:09:34 +0100179The FVP models used are Version 11.6 Build 45, unless otherwise stated.
Douglas Raillard6f625742017-06-28 15:23:03 +0100180
Joanna Farleyd83bf0b2018-09-11 15:51:31 +0100181- ``FVP_Base_AEMv8A-AEMv8A``
182- ``FVP_Base_AEMv8A-AEMv8A-AEMv8A-AEMv8A-CCN502``
Joanna Farleyd83bf0b2018-09-11 15:51:31 +0100183- ``FVP_Base_RevC-2xAEMv8A``
184- ``FVP_Base_Cortex-A32x4``
Dan Handley4bf33492017-07-05 17:40:29 +0100185- ``FVP_Base_Cortex-A35x4``
186- ``FVP_Base_Cortex-A53x4``
Joanna Farleyd83bf0b2018-09-11 15:51:31 +0100187- ``FVP_Base_Cortex-A55x4+Cortex-A75x4``
188- ``FVP_Base_Cortex-A55x4``
Ambroise Vincent61924482019-03-28 12:51:48 +0000189- ``FVP_Base_Cortex-A57x1-A53x1``
190- ``FVP_Base_Cortex-A57x2-A53x4``
Dan Handley4bf33492017-07-05 17:40:29 +0100191- ``FVP_Base_Cortex-A57x4-A53x4``
192- ``FVP_Base_Cortex-A57x4``
193- ``FVP_Base_Cortex-A72x4-A53x4``
194- ``FVP_Base_Cortex-A72x4``
195- ``FVP_Base_Cortex-A73x4-A53x4``
196- ``FVP_Base_Cortex-A73x4``
Joanna Farleyd83bf0b2018-09-11 15:51:31 +0100197- ``FVP_Base_Cortex-A75x4``
198- ``FVP_Base_Cortex-A76x4``
John Tsichritzis532a67d2019-05-20 13:09:34 +0100199- ``FVP_Base_Cortex-A76AEx4``
200- ``FVP_Base_Cortex-A76AEx8``
Balint Dobszayf363deb2019-07-03 13:02:56 +0200201- ``FVP_Base_Cortex-A77x4`` (Version 11.7 build 36)
John Tsichritzis532a67d2019-05-20 13:09:34 +0100202- ``FVP_Base_Neoverse-N1x4``
Ambroise Vincent61924482019-03-28 12:51:48 +0000203- ``FVP_CSS_SGI-575`` (Version 11.3 build 42)
204- ``FVP_CSS_SGM-775`` (Version 11.3 build 42)
205- ``FVP_RD_E1Edge`` (Version 11.3 build 42)
John Tsichritzis532a67d2019-05-20 13:09:34 +0100206- ``FVP_RD_N1Edge``
Joanna Farleyd83bf0b2018-09-11 15:51:31 +0100207- ``Foundation_Platform``
Dan Handley5b0b7272018-03-14 13:01:39 +0000208
Joanna Farleyd83bf0b2018-09-11 15:51:31 +0100209The latest version of the AArch32 build of TF-A has been tested on the following
Ambroise Vincent61924482019-03-28 12:51:48 +0000210Arm FVPs without shifted affinities, and that do not support threaded CPU cores
Joanna Farleyd83bf0b2018-09-11 15:51:31 +0100211(64-bit host machine only).
Dan Handley4bf33492017-07-05 17:40:29 +0100212
Dan Handley5b0b7272018-03-14 13:01:39 +0000213- ``FVP_Base_AEMv8A-AEMv8A``
Dan Handley4bf33492017-07-05 17:40:29 +0100214- ``FVP_Base_Cortex-A32x4``
Douglas Raillard6f625742017-06-28 15:23:03 +0100215
Ambroise Vincent61924482019-03-28 12:51:48 +0000216NOTE: The ``FVP_Base_RevC-2xAEMv8A`` FVP only supports shifted affinities.
217
Douglas Raillard6f625742017-06-28 15:23:03 +0100218The Foundation FVP can be downloaded free of charge. The Base FVPs can be
Dan Handley4def07d2018-03-01 18:44:00 +0000219licensed from Arm. See the `Arm FVP website`_.
Dan Handley4bf33492017-07-05 17:40:29 +0100220
Joanna Farleyd83bf0b2018-09-11 15:51:31 +0100221All the above platforms have been tested with `Linaro Release 18.04`_.
Douglas Raillard6f625742017-06-28 15:23:03 +0100222
223This release also contains the following platform support:
224
Samuel Holland380cf742019-06-08 16:18:02 -0500225- Allwinner sun50i (A64, H5, and H6) SoCs
Antonio Nino Diaz37f647a2018-10-10 23:52:39 +0100226- Amlogic Meson S905 (GXBB)
Remi Pommarel9b5a8aa2019-04-01 11:34:09 +0200227- Amlogic Meson S905x (GXL)
Paul Beesleyca7145c2019-03-25 16:45:23 +0000228- Arm Juno Software Development Platform
229- Arm Neoverse N1 System Development Platform (N1SDP)
230- Arm Neoverse Reference Design N1 Edge (RD-N1-Edge) FVP
231- Arm Neoverse Reference Design E1 Edge (RD-E1-Edge) FVP
232- Arm SGI-575 and SGM-775
233- Arm Versatile Express FVP
Dan Handley5b0b7272018-03-14 13:01:39 +0000234- HiKey, HiKey960 and Poplar boards
Paul Beesleyca7145c2019-03-25 16:45:23 +0000235- Intel Stratix 10 SoC FPGA
Antonio Nino Diaz91ce07b2019-01-17 12:16:07 +0000236- Marvell Armada 3700 and 8K
Douglas Raillard6f625742017-06-28 15:23:03 +0100237- MediaTek MT6795 and MT8173 SoCs
Antonio Nino Diaz91ce07b2019-01-17 12:16:07 +0000238- NVIDIA T132, T186 and T210 SoCs
Paul Beesleyca7145c2019-03-25 16:45:23 +0000239- NXP QorIQ LS1043A, i.MX8MM, i.MX8MQ, i.MX8QX, i.MX8QM and i.MX7Solo WaRP7
Antonio Nino Diaz91ce07b2019-01-17 12:16:07 +0000240- QEMU
241- Raspberry Pi 3
Paul Beesleyca7145c2019-03-25 16:45:23 +0000242- Renesas R-Car Generation 3
Dan Handley4bf33492017-07-05 17:40:29 +0100243- RockChip RK3328, RK3368 and RK3399 SoCs
Sumit Garg150c38e2018-06-21 11:28:18 +0530244- Socionext UniPhier SoC family and SynQuacer SC2A11 SoCs
Joanna Farleyd83bf0b2018-09-11 15:51:31 +0100245- STMicroelectronics STM32MP1
Nishanth Menon1841c532016-10-14 01:13:34 +0000246- Texas Instruments K3 SoCs
Antonio Nino Diaz91ce07b2019-01-17 12:16:07 +0000247- Xilinx Versal and Zynq UltraScale + MPSoC
Douglas Raillard6f625742017-06-28 15:23:03 +0100248
Dan Handley5b0b7272018-03-14 13:01:39 +0000249Still to come
Paul Beesleyca7145c2019-03-25 16:45:23 +0000250-------------
Douglas Raillard6f625742017-06-28 15:23:03 +0100251
Paul Beesleyca7145c2019-03-25 16:45:23 +0000252- Support for additional platforms.
Douglas Raillard6f625742017-06-28 15:23:03 +0100253
Paul Beesleyca7145c2019-03-25 16:45:23 +0000254- Refinements to Position Independent Executable (PIE) support.
255
Paul Beesleybf32bc92019-03-29 10:14:56 +0000256- Refinements to the SPCI-based SPM implementation as the draft SPCI and SPRT
257 specifications continue to evolve.
Paul Beesleyca7145c2019-03-25 16:45:23 +0000258
259- Documentation enhancements.
Dan Handley5b0b7272018-03-14 13:01:39 +0000260
Douglas Raillard6f625742017-06-28 15:23:03 +0100261- Ongoing support for new architectural features, CPUs and System IP.
262
Dan Handley5b0b7272018-03-14 13:01:39 +0000263- Ongoing support for new Arm system architecture specifications.
Douglas Raillard6f625742017-06-28 15:23:03 +0100264
265- Ongoing security hardening, optimization and quality improvements.
266
Dan Handley4bf33492017-07-05 17:40:29 +0100267For a full list of detailed issues in the current code, please see the `Change
Louis Mayencourt63fdda22019-03-22 11:47:22 +0000268Log`_ and the `issue tracker`_.
Douglas Raillard6f625742017-06-28 15:23:03 +0100269
Dan Handley5b0b7272018-03-14 13:01:39 +0000270Getting started
Douglas Raillard6f625742017-06-28 15:23:03 +0100271---------------
272
Louis Mayencourt63fdda22019-03-22 11:47:22 +0000273See the `User Guide`_ for instructions on how to download, install, build and
274use TF-A with the Arm `FVP`_\ s.
Douglas Raillard6f625742017-06-28 15:23:03 +0100275
Paul Beesleyd1ce4462019-01-10 16:14:04 +0000276See the `Firmware Design`_ for information on how TF-A works.
Douglas Raillard6f625742017-06-28 15:23:03 +0100277
278See the `Porting Guide`_ as well for information about how to use this
Dan Handley5b0b7272018-03-14 13:01:39 +0000279software on another Armv7-A or Armv8-A platform.
Douglas Raillard6f625742017-06-28 15:23:03 +0100280
281See the `Contributing Guidelines`_ for information on how to contribute to this
282project and the `Acknowledgments`_ file for a list of contributors to the
283project.
284
John Tsichritzisd2944092019-06-03 10:51:22 +0100285Contact us
286~~~~~~~~~~
Douglas Raillard6f625742017-06-28 15:23:03 +0100287
John Tsichritzisd2944092019-06-03 10:51:22 +0100288We welcome any feedback on TF-A. If you think you have found a security
Dan Handley4def07d2018-03-01 18:44:00 +0000289vulnerability, please report this using the process defined in the TF-A
John Tsichritzisd2944092019-06-03 10:51:22 +0100290`Security Center`_. For all other feedback, you can use either the
291`issue tracker`_ or our `mailing list`_.
Douglas Raillard6f625742017-06-28 15:23:03 +0100292
Dan Handley4def07d2018-03-01 18:44:00 +0000293Arm licensees may contact Arm directly via their partner managers.
Douglas Raillard6f625742017-06-28 15:23:03 +0100294
Joel Huttond0f98092019-02-26 16:23:54 +0000295Security advisories
Paul Beesleyca7145c2019-03-25 16:45:23 +0000296-------------------
Joel Huttond0f98092019-02-26 16:23:54 +0000297
Sandrine Bailleux74f1f642019-03-12 15:10:49 +0100298- `Security Advisory TFV-1`_
299- `Security Advisory TFV-2`_
300- `Security Advisory TFV-3`_
301- `Security Advisory TFV-4`_
302- `Security Advisory TFV-5`_
303- `Security Advisory TFV-6`_
304- `Security Advisory TFV-7`_
305- `Security Advisory TFV-8`_
Joel Huttond0f98092019-02-26 16:23:54 +0000306
307
Douglas Raillard6f625742017-06-28 15:23:03 +0100308--------------
309
Antonio Nino Diaz91ce07b2019-01-17 12:16:07 +0000310*Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.*
Douglas Raillard6f625742017-06-28 15:23:03 +0100311
Dan Handley5b0b7272018-03-14 13:01:39 +0000312.. _Armv7-A and Armv8-A: https://developer.arm.com/products/architecture/a-profile
Douglas Raillard6f625742017-06-28 15:23:03 +0100313.. _Secure Monitor: http://www.arm.com/products/processors/technologies/trustzone/tee-smc.php
Dan Handley4bf33492017-07-05 17:40:29 +0100314.. _Power State Coordination Interface (PSCI): PSCI_
315.. _PSCI: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
Sandrine Bailleuxc1491eb2019-04-24 10:41:24 +0200316.. _Trusted Board Boot Requirements CLIENT (TBBR-CLIENT): https://developer.arm.com/docs/den0006/latest/trusted-board-boot-requirements-client-tbbr-client-armv8-a
Dan Handley4bf33492017-07-05 17:40:29 +0100317.. _SMC Calling Convention: http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf
Paul Beesley3c6261b2019-01-10 15:42:39 +0000318.. _System Control and Management Interface (SCMI): SCMI_
Dan Handley4bf33492017-07-05 17:40:29 +0100319.. _SCMI: http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf
danh-armed811262018-03-20 17:01:39 +0000320.. _Software Delegated Exception Interface (SDEI): SDEI_
Dan Handley5b0b7272018-03-14 13:01:39 +0000321.. _SDEI: http://infocenter.arm.com/help/topic/com.arm.doc.den0054a/ARM_DEN0054A_Software_Delegated_Exception_Interface.pdf
Dan Handley4def07d2018-03-01 18:44:00 +0000322.. _Juno Arm Development Platform: http://www.arm.com/products/tools/development-boards/versatile-express/juno-arm-development-platform.php
323.. _Arm FVP website: FVP_
Dan Handley4bf33492017-07-05 17:40:29 +0100324.. _FVP: https://developer.arm.com/products/system-design/fixed-virtual-platforms
Joanna Farleyd83bf0b2018-09-11 15:51:31 +0100325.. _Linaro Release 18.04: https://community.arm.com/dev-platforms/b/documents/posts/linaro-release-notes-deprecated#LinaroRelease18.04
Douglas Raillard6f625742017-06-28 15:23:03 +0100326.. _OP-TEE Secure OS: https://github.com/OP-TEE/optee_os
Paul Beesleybe8b4d12019-01-10 15:53:12 +0000327.. _NVIDIA Trusted Little Kernel: http://nv-tegra.nvidia.com/gitweb/?p=3rdparty/ote_partner/tlk.git;a=summary
Dan Handley4bf33492017-07-05 17:40:29 +0100328.. _Trusty Secure OS: https://source.android.com/security/trusty
Louis Mayencourt63fdda22019-03-22 11:47:22 +0000329.. _trustedfirmware.org: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
John Tsichritzis0668dd72019-04-11 17:23:32 +0100330.. _issue tracker: https://developer.trustedfirmware.org/project/board/1/
John Tsichritzisd2944092019-06-03 10:51:22 +0100331.. _mailing list: https://lists.trustedfirmware.org/mailman/listinfo/tf-a
John Tsichritzisa16fd372019-05-24 12:27:49 +0100332.. _Security Center: ./docs/process/security.rst
Dan Handley4bf33492017-07-05 17:40:29 +0100333.. _license: ./license.rst
John Tsichritzisa16fd372019-05-24 12:27:49 +0100334.. _Contributing Guidelines: ./docs/process/contributing.rst
335.. _Acknowledgments: ./docs/acknowledgements.rst
336.. _Firmware Design: ./docs/design/firmware-design.rst
Douglas Raillard6f625742017-06-28 15:23:03 +0100337.. _Change Log: ./docs/change-log.rst
John Tsichritzis566d15e2019-05-28 12:45:06 +0100338.. _User Guide: ./docs/getting_started/user-guide.rst
339.. _Porting Guide: ./docs/getting_started/porting-guide.rst
Antonio Nino Diaz27989a82018-08-17 10:45:47 +0100340.. _FreeBSD: http://www.freebsd.org
341.. _SCC: http://www.simple-cc.org/
Joel Huttond0f98092019-02-26 16:23:54 +0000342.. _Security Advisory TFV-1: ./docs/security_advisories/security-advisory-tfv-1.rst
343.. _Security Advisory TFV-2: ./docs/security_advisories/security-advisory-tfv-2.rst
344.. _Security Advisory TFV-3: ./docs/security_advisories/security-advisory-tfv-3.rst
345.. _Security Advisory TFV-4: ./docs/security_advisories/security-advisory-tfv-4.rst
346.. _Security Advisory TFV-5: ./docs/security_advisories/security-advisory-tfv-5.rst
347.. _Security Advisory TFV-6: ./docs/security_advisories/security-advisory-tfv-6.rst
348.. _Security Advisory TFV-7: ./docs/security_advisories/security-advisory-tfv-7.rst
349.. _Security Advisory TFV-8: ./docs/security_advisories/security-advisory-tfv-8.rst
Paul Beesleyca7145c2019-03-25 16:45:23 +0000350.. _Trusted Firmware-A Documentation Contents: ./docs/contents.rst