Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 1 | /* |
Vikram Kanigiri | 6355f23 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 2 | * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #include <arch.h> |
| 32 | #include <arch_helpers.h> |
| 33 | #include <arm_def.h> |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 34 | #include <assert.h> |
| 35 | #include <bl_common.h> |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 36 | #include <console.h> |
Yatharth Kochar | a8aa7fe | 2016-09-13 17:07:57 +0100 | [diff] [blame^] | 37 | #include <debug.h> |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 38 | #include <mmio.h> |
| 39 | #include <plat_arm.h> |
| 40 | #include <platform.h> |
| 41 | |
Soby Mathew | 4c0d039 | 2016-06-16 14:52:04 +0100 | [diff] [blame] | 42 | #define BL31_END (uintptr_t)(&__BL31_END__) |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 43 | |
| 44 | #if USE_COHERENT_MEM |
| 45 | /* |
| 46 | * The next 2 constants identify the extents of the coherent memory region. |
| 47 | * These addresses are used by the MMU setup code and therefore they must be |
| 48 | * page-aligned. It is the responsibility of the linker script to ensure that |
| 49 | * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols |
| 50 | * refer to page-aligned addresses. |
| 51 | */ |
Soby Mathew | 4c0d039 | 2016-06-16 14:52:04 +0100 | [diff] [blame] | 52 | #define BL31_COHERENT_RAM_BASE (uintptr_t)(&__COHERENT_RAM_START__) |
| 53 | #define BL31_COHERENT_RAM_LIMIT (uintptr_t)(&__COHERENT_RAM_END__) |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 54 | #endif |
| 55 | |
| 56 | /* |
| 57 | * Placeholder variables for copying the arguments that have been passed to |
Juan Castillo | d178637 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 58 | * BL31 from BL2. |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 59 | */ |
| 60 | static entry_point_info_t bl32_image_ep_info; |
| 61 | static entry_point_info_t bl33_image_ep_info; |
| 62 | |
| 63 | |
| 64 | /* Weak definitions may be overridden in specific ARM standard platform */ |
| 65 | #pragma weak bl31_early_platform_setup |
| 66 | #pragma weak bl31_platform_setup |
| 67 | #pragma weak bl31_plat_arch_setup |
| 68 | #pragma weak bl31_plat_get_next_image_ep_info |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 69 | |
| 70 | |
| 71 | /******************************************************************************* |
| 72 | * Return a pointer to the 'entry_point_info' structure of the next image for the |
Juan Castillo | d178637 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 73 | * security state specified. BL33 corresponds to the non-secure image type |
| 74 | * while BL32 corresponds to the secure image type. A NULL pointer is returned |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 75 | * if the image does not exist. |
| 76 | ******************************************************************************/ |
| 77 | entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) |
| 78 | { |
| 79 | entry_point_info_t *next_image_info; |
| 80 | |
| 81 | assert(sec_state_is_valid(type)); |
| 82 | next_image_info = (type == NON_SECURE) |
| 83 | ? &bl33_image_ep_info : &bl32_image_ep_info; |
| 84 | /* |
| 85 | * None of the images on the ARM development platforms can have 0x0 |
| 86 | * as the entrypoint |
| 87 | */ |
| 88 | if (next_image_info->pc) |
| 89 | return next_image_info; |
| 90 | else |
| 91 | return NULL; |
| 92 | } |
| 93 | |
| 94 | /******************************************************************************* |
Juan Castillo | d178637 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 95 | * Perform any BL31 early platform setup common to ARM standard platforms. |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 96 | * Here is an opportunity to copy parameters passed by the calling EL (S-EL1 |
| 97 | * in BL2 & S-EL3 in BL1) before they are lost (potentially). This needs to be |
| 98 | * done before the MMU is initialized so that the memory layout can be used |
| 99 | * while creating page tables. BL2 has flushed this information to memory, so |
| 100 | * we are guaranteed to pick up good data. |
| 101 | ******************************************************************************/ |
Yatharth Kochar | a8aa7fe | 2016-09-13 17:07:57 +0100 | [diff] [blame^] | 102 | #if LOAD_IMAGE_V2 |
| 103 | void arm_bl31_early_platform_setup(void *from_bl2, |
| 104 | void *plat_params_from_bl2) |
| 105 | #else |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 106 | void arm_bl31_early_platform_setup(bl31_params_t *from_bl2, |
| 107 | void *plat_params_from_bl2) |
Yatharth Kochar | a8aa7fe | 2016-09-13 17:07:57 +0100 | [diff] [blame^] | 108 | #endif |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 109 | { |
| 110 | /* Initialize the console to provide early debug support */ |
| 111 | console_init(PLAT_ARM_BOOT_UART_BASE, PLAT_ARM_BOOT_UART_CLK_IN_HZ, |
| 112 | ARM_CONSOLE_BAUDRATE); |
| 113 | |
| 114 | #if RESET_TO_BL31 |
Juan Castillo | d178637 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 115 | /* There are no parameters from BL2 if BL31 is a reset vector */ |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 116 | assert(from_bl2 == NULL); |
| 117 | assert(plat_params_from_bl2 == NULL); |
| 118 | |
Juan Castillo | 5ea8aa7 | 2015-11-06 10:01:37 +0000 | [diff] [blame] | 119 | #ifdef BL32_BASE |
Juan Castillo | d178637 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 120 | /* Populate entry point information for BL32 */ |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 121 | SET_PARAM_HEAD(&bl32_image_ep_info, |
| 122 | PARAM_EP, |
| 123 | VERSION_1, |
| 124 | 0); |
| 125 | SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); |
| 126 | bl32_image_ep_info.pc = BL32_BASE; |
| 127 | bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); |
Juan Castillo | 5ea8aa7 | 2015-11-06 10:01:37 +0000 | [diff] [blame] | 128 | #endif /* BL32_BASE */ |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 129 | |
Juan Castillo | d178637 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 130 | /* Populate entry point information for BL33 */ |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 131 | SET_PARAM_HEAD(&bl33_image_ep_info, |
| 132 | PARAM_EP, |
| 133 | VERSION_1, |
| 134 | 0); |
| 135 | /* |
Juan Castillo | d178637 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 136 | * Tell BL31 where the non-trusted software image |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 137 | * is located and the entry state information |
| 138 | */ |
| 139 | bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); |
Soby Mathew | 48ac1df | 2016-05-09 17:20:10 +0100 | [diff] [blame] | 140 | |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 141 | bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry(); |
| 142 | SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); |
| 143 | |
Yatharth Kochar | a8aa7fe | 2016-09-13 17:07:57 +0100 | [diff] [blame^] | 144 | #else /* RESET_TO_BL31 */ |
| 145 | |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 146 | /* |
| 147 | * In debug builds, we pass a special value in 'plat_params_from_bl2' |
Juan Castillo | d178637 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 148 | * to verify platform parameters from BL2 to BL31. |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 149 | * In release builds, it's not used. |
| 150 | */ |
| 151 | assert(((unsigned long long)plat_params_from_bl2) == |
| 152 | ARM_BL31_PLAT_PARAM_VAL); |
| 153 | |
Yatharth Kochar | a8aa7fe | 2016-09-13 17:07:57 +0100 | [diff] [blame^] | 154 | # if LOAD_IMAGE_V2 |
| 155 | /* |
| 156 | * Check params passed from BL2 should not be NULL, |
| 157 | */ |
| 158 | bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2; |
| 159 | assert(params_from_bl2 != NULL); |
| 160 | assert(params_from_bl2->h.type == PARAM_BL_PARAMS); |
| 161 | assert(params_from_bl2->h.version >= VERSION_2); |
| 162 | |
| 163 | bl_params_node_t *bl_params = params_from_bl2->head; |
| 164 | |
| 165 | /* |
| 166 | * Copy BL33 and BL32 (if present), entry point information. |
| 167 | * They are stored in Secure RAM, in BL2's address space. |
| 168 | */ |
| 169 | while (bl_params) { |
| 170 | if (bl_params->image_id == BL32_IMAGE_ID) |
| 171 | bl32_image_ep_info = *bl_params->ep_info; |
| 172 | |
| 173 | if (bl_params->image_id == BL33_IMAGE_ID) |
| 174 | bl33_image_ep_info = *bl_params->ep_info; |
| 175 | |
| 176 | bl_params = bl_params->next_params_info; |
| 177 | } |
| 178 | |
| 179 | if (bl33_image_ep_info.pc == 0) |
| 180 | panic(); |
| 181 | |
| 182 | # else /* LOAD_IMAGE_V2 */ |
| 183 | |
| 184 | /* |
| 185 | * Check params passed from BL2 should not be NULL, |
| 186 | */ |
| 187 | assert(from_bl2 != NULL); |
| 188 | assert(from_bl2->h.type == PARAM_BL31); |
| 189 | assert(from_bl2->h.version >= VERSION_1); |
| 190 | |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 191 | /* |
Juan Castillo | d178637 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 192 | * Copy BL32 (if populated by BL2) and BL33 entry point information. |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 193 | * They are stored in Secure RAM, in BL2's address space. |
| 194 | */ |
Juan Castillo | 5ea8aa7 | 2015-11-06 10:01:37 +0000 | [diff] [blame] | 195 | if (from_bl2->bl32_ep_info) |
| 196 | bl32_image_ep_info = *from_bl2->bl32_ep_info; |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 197 | bl33_image_ep_info = *from_bl2->bl33_ep_info; |
Yatharth Kochar | a8aa7fe | 2016-09-13 17:07:57 +0100 | [diff] [blame^] | 198 | |
| 199 | # endif /* LOAD_IMAGE_V2 */ |
| 200 | #endif /* RESET_TO_BL31 */ |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 201 | } |
| 202 | |
Yatharth Kochar | a8aa7fe | 2016-09-13 17:07:57 +0100 | [diff] [blame^] | 203 | #if LOAD_IMAGE_V2 |
| 204 | void bl31_early_platform_setup(void *from_bl2, |
| 205 | void *plat_params_from_bl2) |
| 206 | #else |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 207 | void bl31_early_platform_setup(bl31_params_t *from_bl2, |
| 208 | void *plat_params_from_bl2) |
Yatharth Kochar | a8aa7fe | 2016-09-13 17:07:57 +0100 | [diff] [blame^] | 209 | #endif |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 210 | { |
| 211 | arm_bl31_early_platform_setup(from_bl2, plat_params_from_bl2); |
| 212 | |
| 213 | /* |
Vikram Kanigiri | 6355f23 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 214 | * Initialize Interconnect for this cluster during cold boot. |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 215 | * No need for locks as no other CPU is active. |
| 216 | */ |
Vikram Kanigiri | 6355f23 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 217 | plat_arm_interconnect_init(); |
Sandrine Bailleux | a669527 | 2015-05-14 14:13:05 +0100 | [diff] [blame] | 218 | |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 219 | /* |
Vikram Kanigiri | 6355f23 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 220 | * Enable Interconnect coherency for the primary CPU's cluster. |
Sandrine Bailleux | a669527 | 2015-05-14 14:13:05 +0100 | [diff] [blame] | 221 | * Earlier bootloader stages might already do this (e.g. Trusted |
| 222 | * Firmware's BL1 does it) but we can't assume so. There is no harm in |
| 223 | * executing this code twice anyway. |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 224 | * Platform specific PSCI code will enable coherency for other |
| 225 | * clusters. |
| 226 | */ |
Vikram Kanigiri | 6355f23 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 227 | plat_arm_interconnect_enter_coherency(); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 228 | } |
| 229 | |
| 230 | /******************************************************************************* |
Juan Castillo | d178637 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 231 | * Perform any BL31 platform setup common to ARM standard platforms |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 232 | ******************************************************************************/ |
| 233 | void arm_bl31_platform_setup(void) |
| 234 | { |
Achin Gupta | 27573c5 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 235 | /* Initialize the GIC driver, cpu and distributor interfaces */ |
| 236 | plat_arm_gic_driver_init(); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 237 | plat_arm_gic_init(); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 238 | |
| 239 | #if RESET_TO_BL31 |
| 240 | /* |
| 241 | * Do initial security configuration to allow DRAM/device access |
| 242 | * (if earlier BL has not already done so). |
| 243 | */ |
| 244 | plat_arm_security_setup(); |
| 245 | |
| 246 | #endif /* RESET_TO_BL31 */ |
| 247 | |
| 248 | /* Enable and initialize the System level generic timer */ |
| 249 | mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, |
| 250 | CNTCR_FCREQ(0) | CNTCR_EN); |
| 251 | |
| 252 | /* Allow access to the System counter timer module */ |
Soby Mathew | c1bb8a0 | 2015-10-12 17:32:29 +0100 | [diff] [blame] | 253 | arm_configure_sys_timer(); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 254 | |
| 255 | /* Initialize power controller before setting up topology */ |
| 256 | plat_arm_pwrc_setup(); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 257 | } |
| 258 | |
Soby Mathew | 080225d | 2015-12-09 11:38:43 +0000 | [diff] [blame] | 259 | /******************************************************************************* |
Juan Castillo | d178637 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 260 | * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM |
Soby Mathew | 080225d | 2015-12-09 11:38:43 +0000 | [diff] [blame] | 261 | * standard platforms |
| 262 | ******************************************************************************/ |
| 263 | void arm_bl31_plat_runtime_setup(void) |
| 264 | { |
| 265 | /* Initialize the runtime console */ |
| 266 | console_init(PLAT_ARM_BL31_RUN_UART_BASE, PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ, |
| 267 | ARM_CONSOLE_BAUDRATE); |
| 268 | } |
| 269 | |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 270 | void bl31_platform_setup(void) |
| 271 | { |
| 272 | arm_bl31_platform_setup(); |
| 273 | } |
| 274 | |
Soby Mathew | 080225d | 2015-12-09 11:38:43 +0000 | [diff] [blame] | 275 | void bl31_plat_runtime_setup(void) |
| 276 | { |
| 277 | arm_bl31_plat_runtime_setup(); |
| 278 | } |
| 279 | |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 280 | /******************************************************************************* |
Sandrine Bailleux | b5fa656 | 2016-05-18 16:11:47 +0100 | [diff] [blame] | 281 | * Perform the very early platform specific architectural setup shared between |
| 282 | * ARM standard platforms. This only does basic initialization. Later |
| 283 | * architectural setup (bl31_arch_setup()) does not do anything platform |
| 284 | * specific. |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 285 | ******************************************************************************/ |
| 286 | void arm_bl31_plat_arch_setup(void) |
| 287 | { |
Sandrine Bailleux | 0af559a | 2016-07-08 14:38:16 +0100 | [diff] [blame] | 288 | arm_setup_page_tables(BL31_BASE, |
| 289 | BL31_END - BL31_BASE, |
| 290 | BL_CODE_BASE, |
| 291 | BL_CODE_LIMIT, |
| 292 | BL_RO_DATA_BASE, |
| 293 | BL_RO_DATA_LIMIT |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 294 | #if USE_COHERENT_MEM |
| 295 | , BL31_COHERENT_RAM_BASE, |
| 296 | BL31_COHERENT_RAM_LIMIT |
| 297 | #endif |
| 298 | ); |
Sandrine Bailleux | b5fa656 | 2016-05-18 16:11:47 +0100 | [diff] [blame] | 299 | enable_mmu_el3(0); |
Dan Handley | b431530 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 300 | } |
| 301 | |
| 302 | void bl31_plat_arch_setup(void) |
| 303 | { |
| 304 | arm_bl31_plat_arch_setup(); |
| 305 | } |