1. 57d1e5f Fix pointer type mismatch of handlers by Masahiro Yamada · 6 years ago
  2. ee1ebbd Fix order of remaining platform #includes by Isla Mitchell · 7 years ago
  3. f5f64e4 Tegra: memctrl: check GPU reset state from common place by Varun Wadekar · 7 years ago
  4. 82cb2c1 Use SPDX license identifiers by dp-arm · 7 years ago
  5. c76c1b7 Tegra186: Support AARCH32/64 encoding for MCE calls by Varun Wadekar · 7 years ago
  6. a9e0260 Tegra: Add support for fake system suspend by Vignesh Radhakrishnan · 7 years ago
  7. 6b51766 Tegra: SiP: 64-bit address for Video Memory base by Harvey Hsieh · 8 years ago
  8. 78e2bd1 Tegra: implement FIQ interrupt handler by Varun Wadekar · 9 years ago
  9. 2d05f81 Tegra: allow SiP smc calls from Secure World by Wayne Lin · 8 years ago
  10. d288ab2 Tegra: handlers for common and SoC-specific SiP calls by Varun Wadekar · 9 years ago[Renamed (82%) from plat/nvidia/tegra/soc/t210/plat_sip_calls.c]
  11. 87bf3c6 Merge pull request #845 from vwadekar/tegra-changes-from-downstream-v1 by davidcunado-arm · 8 years ago